EC 53 COMPUTER ORGANIZATIONS AND ARCHITECTURE

TWO MARKS QUESTIONS AND ANSWERS

UNIT I
1. What are the types of computer?
Personal computer, Notebook computer, Workstations, and Enterprise or Mainframes.

2. What are the functional units of a computer?

Input unit, Memory unit, Arithmetic and Logic unit, Output unit and Control unit.

3. What are instructions?

Instructions are explicit commands that,
• Govern the transfer of information within a computer as well as between the computer and its
I/O device
• Specify the Arithmetic and Logic operations to be performed.

4. What is a program?
A set of instructions for solving a particular problem is called a program.

5. Give some examples for input devices

Keyboard, Joystick, Mouse, Lightpen and trackball

6. What is object program?

Compiling a high-level language source program in to a list of machine instructions constituting
a machine language program is called an object program.

7. What do you mean by bits?

Each number, character, or instruction is encoded as a string of binary digits called as bits, each
having one of two possible values, 0 or 1.

8. Define RAM.

RAM stands for Random Access Memory, which is used to store program and data. It is very
faster.

9. What is the function of memory unit? How will you classify it?
Memory unit is used to store programs and data. There are two classes of storage namely
primary and secondary

10. Define word length.

The number of bits stored in each memory location is called word length. Typical word lengths
range from 16 to 64 bits.

11. Define memory access time?

The time required to access one word is called as memory access time. This time is fixed and
independent of the location of the word being accessed.
12. What is memory hierarchy?
The memory of a computer is normally implemented as a memory hierarchy of three or four
levels of semiconductor RAM units with different speeds and sizes. The small, fast RAM units are
called caches. The large and slowest unit is referred to as main memory.

13. What is primary storage and secondary storage?

Primary memory is a fast memory that operates at electronic speeds. It is expensive. Secondary
memory is used when large amounts of data and many programs have to be stored, particularly for
information that is accessed infrequently.
Example: Primary storage : RAM Secondary Storage : FDD, HDD, CD-ROM, DVD

14. What is a cache memory?

The cache is a small, fast memory. They are tightly coupled with the processor and are often
contained on the same IC chip to achieve high performance.

15. What are registers?

Registers are high speed storage elements. Each register can store one word of data. Access time
to registers is faster than access time to the fastest cache memory.

16. What is the use of secondary storage? Give Examples

Secondary storage is used to store large amount of data and programs. Ex: Magnetic disk
(FDD, HDD), tapes, Optical disks(CD, DVD)

17. What are registers?

Register is a high speed storage element, which are mainly used for storing operands while
performing computations. Each register can store one word of data. The registers are vary from one
processor to another processor.

18. What are timing signals?

Timing signals are generated by the control circuits. Data transfers between the processor and
memory are also controlled by the control unit through the timing signals.

19. What is an instruction register?

The instruction register (IR) holds the instruction that is currently being executed. Its output is
available to the control circuits which generate the timing signals that control the various processing
elements involved in executing the instruction.

20. What is a program counter?

The program counter (PC) keeps track of the execution of a program. It contains the memory
address of the next instruction to be fetched and executed.

21. What is MAR and MDR?

The Memory Address Register (MAR) holds the address of the location to be accessed. The
Memory Data or Buffer Register (MDR or MBR) contains the data to be written into or read out of
the addressed location.

22. What is an interrupt?

An interrupt is a request from an I/O device for service by the processor. The processor provides
the requested service by executing an appropriate interrupt-service routine.
23. Define bus.
A bus is a group of lines or wires that transmit signals from one place to another place. There
are three types of buses, namely, Address bus, Data bus and Control bus.

24. Define OS.

Operating system (OS) is system software which is used to execute our user programs and share
resources.

25. What is elapsed time?

The total time required to execute the given program is called elapsed time. It is a measure of
performance of the entire computer system. It is affected by the speed of the processor, the disk and
the printer.

26. Give the basic performance equation.

N×S
The basic performance equation is given by T =
R
Where, T – Performance parameter R – Clock Rate N – Number of instruction execution
S – Average number of basic steps needed to execute one machine instruction.

27. What is processor time?

The sum of the periods during which the processor is active is called the processor time. '

28. What are clock and clock cycles?

The timing signals that control the processor circuits are called as clocks. The clock defines
regular time intervals called clock cycles.

29. Explain briefly the operation of 'load'.

The load operation transfers a copy of the contents of a specific memory location to the
processor. The memory contents remain unchanged. To start a load operation, the processor sends
the address of the desired location to the memory and requests that its contents be read. The memory
reads the data stored at that address and sends them to the processor.

30. Explain briefly the operation of 'store'.

The store operation transfers an item of information from the processor to a specific memory
location, destroying the former contents of that location. The processor sends the address of the
desired location to the memory, together with the data to be written into that memory location.

31. What is a register transfer notation?

RD ← RS. It is used to transfer the contents of source register to any one of the destination register.

32. Define conditional code register (OR) status register.

The conditional code flags are usually grouped together in a special processor register called
conditional code registers or status registers.

33. What are the four commonly used flags?

N (negative) - set to 1 if the result is negative; otherwise, cleared to 0
Z (Zero) - set to 1 if the result is 0; therwise, cleared to 0.
V (overflow) - set to 1 if arithmetic overflow occurs; otherwise, cleared to 0
C (carry) - set to 1 if the carry-out results from the operation; otherwise, cleared to 0
34. What is addressing modes?
The different ways in which the location of an operand is specified in an instruction is
referred to as addressing modes.

35. What are the various addressing modes?

Register Direct, Register Indirect, Immediate, Relative, Indexed, Relative Indexed, Auto
increment/decrement Absolute.

36. Define register mode addressing.

In register mode addressing the operand is the contents of a process register. The name of the
register is given in the instruction.

37. Define absolute mode addressing.

In absolute mode addressing the operand is in a memory location. The address of this location is
given explicitly in the instruction. This is also called direct mode addressing.

38. Define immediate mode addressing.

In immediate mode addressing, the operand is given explicitly in the instruction.

39. List the basic instruction types

The various instruction types are:
Three address instruction, Two address instruction, One address instruction and Zero address
instruction.

40. What is a one address instruction?

The instruction that contains the memory address of only one operand is called one address
instruction. Example: LOAD A, STORE A.

41. What is a two address instruction?

The instruction that contains the memory address of two operands is called two byte address
instruction.
Example: ADD A,B , MOV B,C.

42. What is a three address instruction?

The instruction that contains the memory address of three operands is called three byte address
instruction. EXAMPLE: Add A,B,C.

43. What is a zero address instruction?

Instructions in which the locations of all operands are defined implicitly is called zero address
instruction. Such instructions are found in machines that store operands in a structure called
pushdown stack.

44. What is a branch instruction?

A branch instruction loads a new value into the program counter. The processor fetches and
executes the new instruction at this new address called the branch target, instead of the instruction at
the location that follows the branch instruction in sequential address order.
47. What is straight line sequencing?
To begin executing a program, the address of its first instruction must be placed into PC. Then
the processor control circuits use the information in the PC to fetch and execute instructions, one at a
time, in the order of increasing addresses. This is called straight line sequencing.

48. Define conditional branch.

A conditional branch instruction causes a branch only if a specified condition is satisfied. If the
condition is not satisfied, the PC is incremented in the normal way and next instruction in the
sequential address is fetched and executed.

49. Define conditional code flags.

The processor keeps track of information about the results of various operations for use by
subsequent conditional branch instructions. This is done by recording the required information in
individual bits called as conditional code flags.

50. List the four condition code flags

The code flags are:
• Negative
• Zero
• Overflow and
• Carry flags.

51. Define indirect mode addressing.

In indirect mode addressing the effective address of the operands is the content of a register or
memory location whose address appears in the instruction.

52. What is a pointer?

The register or memory location that contains the address of an operand is called a pointer.
Example: A= *B
Here B is a pointer variable.

53. Define index mode addressing.

In index mode addressing, the effective address of the operand is generated by adding a
constant value to the register.
EA= X + [Ri].

54. Define relative mode addressing.

In relative mode addressing the effective address is determined by the index mode using the
program counter in the place of the general purpose register Ri.

55. Define Auto increment mode.

In this mode the effective address of the operand is the contents of a register specified in the
instruction. After accessing the operand, the contents of this register are automatically incremented
to point to the next item in a list. It can be written as (Ri)+.

56. Define Auto decrement mode.

In this mode the contents of a register specified in the instruction are first automatically
decremented and then used as the effective address of the operand. . It can be written as -(Ri).
57. What are mnemonics?
When writing programs for a specific computer, words such as MOVE, ADDITION,
INCREMENT, and BRANCH are replaced by acronyms such as MOV, ADD, INC and BR. This is
called mnemonics.

58. What is a stack?

A stack is a storage unit, in which items can be inserted and deleted at the same end. This end is
called the top of the stack, and the other end is called the bottom of the stack.

59. What is a stack pointer?

Stack pointer is a processor register, which is used to keep track of the address of the element
of the top of the stack

60. Why is stack called as last-in-first-out?

Stack is called as last-in-first-out (LIFO), because the last data item placed on the stack is the
first one removed when retrieval begins. The term PUSH is used to describe placing a new item on
the stack and POP is used to describe removing the top item from the stack.

61. What is a bus? What are the different buses in a CPU?

The groups of wires that serve as a connecting path for several devices is called a bus.The
different types of buses are:
• Data bus
• Address bus
• Control bus.

62. What are the four basic types of operations that needed to be supported by an instructor
set?
The basic types of operations are:
(i) Data transfer between memory and the processor register.
(ii) Arithmetic and logic operations on Data.
(iii) Program sequencing and control.
(iv) I/O transfer.

63. Compare Stack based architecture with GPR architecture.

• Instruction lengths are smaller in stack based - because source and destination specifiers are
not required. Hence code length may be smaller.
• In stack based, register file stack is invisible to the programmer - only top of the stack is
visible. Hence easier to maintain compatibility with future versions where the amount of
storage allocated to the stack is increased.
• Reading a register in a GPR architecture does not affect its contents, but reading in a stack
architecture, removes it from top of stack.
• Lot of overhead involved in maintaining temporary variables in a stack - because of the LIFO
nature of the stack.

64. Consider a two level indirection instruction such as MOV A,[Ind], where Ind points to the
memory location that contains the address of the operand that needs to be moved to
register A. Give an application of such two level indirection.
Handling of pointers is easy with indirection. With two level indirections, it becomes easier
to handle pointer of pointers and makes implementation of pointer manipulations easy.
65. What are condition codes? Can a processor be designed without any condition code?
Explain.
Condition codes are 1-bit flags that store the information regarding the results of various
operations. These are made use of by subsequent conditional branch instructions.
They give an elegant way of handling conditional control flow. A processor may be designed
without condition codes, but it must have some other means of handling change in flow control -
may be instructions like Compare and Branch if equal to zero

66. Discuss the stored program concept. What are its advantages and disadvantages?
Programs are stored in the main memory. The processor will fetch and execute the
instructions in sequence.
Advantage: It facilitates the programming process.
Disadvantage: The instructions can be modified themselves during program execution. Hence,
writing, debugging programs will be difficult and error prone.

67. Define the terms software compatibility and hardware compatibility. What role have they
played in the evolution of computers?

Software Compatibility: Instruction set will be same for more than one machine.
Hardware compatibility: Same hardware components are used to build up one machine.

68.What are the requirements to be satisfied by an instruction set?

Instruction set should be Complete, Efficient, Regular and Compatible.

69. Define underflow.

If the result of the arithmetic operation involving n-bit numbers is too small to be
represented by n-bits, underflow is said to occur.
 UNIT II
l. What is an n-bit ripple carry adder?
A cascaded connection of n full adder blocks, can be used to add two n-bit numbers. Since the
carries must propagate, or ripple, through this cascade, the configuration is called an n-bit ripple
carry adder.

2. What are the two approaches to reduce delay in address?

• To use fastest possible electronic technology in implementing the ripple-carry logic
design or variations of it.
• To use an augmented logic gate network structure.

3. What is the purpose of using fast adder?

A fast adder circuit must speed up the generation of the carry signals.

4. What is Booth's Algorithm?

Booth's algorithm is a technique for generating a 2n-bit product. It treats both positive and
negative 2's complement of n-bit operands uniformly.

5. List the two attractive features of Booth algorithm.

Booth algorithm has the following features.
• It handles both positive and negative multipliers uniformly.
• It achieves some efficiency in the number of additions required when the multiplier has a
few large blocks of 1’s.

6. Give the algorithm for performing restoring division.

The algorithm for performing restoring division is as follows.
1. Shift A and Q left one bit position.
2. Subtract M from A and place the answer back in A.
3. If the sign of A is 1. set q0 to 0 and add M back to A; otherwise set q0 to 1.

7. What are guard bits?

Guard bits are the extra bits retained during the intermediate steps which yield maximum
accuracy in the final results.

8. Define a normalized number.

A normalized number is one in which the most significant digit of the significant is non-zero.

9. Give the normalized number for base 2 representation.

For base 2 representations, a normalized number is one in which the most significant bit of the
significant is one. .

10. What are denormalized numbers? _

Denormalized numbers are those numbers to handle cases of exponent underflow. When the
exponent of the exponent of the result becomes too small, the result is denormalized by right shifting
the fraction and incrementing the exponent for each shift ,until the exponent within a representable
range.
11. What is half adder?
A half adder is a logic circuit with two inputs and two outputs, which adds two bits at a time,
producing a sum and a carry.

12. What is full adder?

A full adder is logic circuit with three inputs and two outputs, which adds three bits at a time
giving a sum and a carry

13. What is signed binary?

A system in which the leading bit represents the sign and the remaining bits the magnitude of
the number is called signed binary. This is also known as sign magnitude.

14. What is a carry look-ahead adder?

The input carry needed by a stage is directly computed from carry signals obtained from all the
preceding stages i-1, i-2, …,2,1,0, rather than waiting for normal carries to supply slowly from stage
to stage. An adder that uses this principle is called carry look-ahead adder.

15. What is the method of achieving the 2's complement?

• Take the, 1 's complement of the number and add 1 to LSB.

16. What is the advantages (features) of using Booth algorithm?

1) It handles both positive and negative multiplier uniformly.
2) It achieves efficiency in the number of additions required when the multiplier has a
few large blocks of 1’s
3) The speed gained by skipping 1 's depends on the data.

17. Give the IEEE standard for floating point numbers for single precision and double
precision number.

18. When can you say that a number is normalized?

When the decimal point is placed to the right of the first (nonzero) significant digit, the number
is said to be normalized.

19. Write the Add/subtract rule for floating point numbers.

a. Check for Zero
b. Align mantissa
c. Add or Subtract exponent
d. Normalize the result
20. Write the multiply rule for floating point numbers.
a. Add the exponent and subtract 127
b. Multiply the mantissa and determine the sign of the result.
c. Normalize the result

21. Define carry save addition(CSA) process.

Instead of letting the carries ripple along the rows, they can be saved and introduced into the
next row at the correct weighted Position. Delay in CSA is less than delay through the ripple carry
adder.

22. What are generate and propagate function?

The generate function is given by Gi = xiyi and the Propagate function is given as Pi = xi + yi

23. In floating point numbers when so you say that an underflow or overflow has occurred?
In single precision numbers when an exponent is less than – 126 then we say that an
underflow has occurred. In single precision numbers when an exponent is greater than + 127 then we
say that an overflow has occurred.

24. Give the logic expression for sum and carry out functions for adding equally weighted bits
xi. and yi in two numbers x and y.
S i = x i y i c i + x i y i c i + x i y i ci + xi y i c i = xi ⊕ y i ⊕ c i
C i +1 = y i ci + xi ci + xi y i
25. When does an overflow occur?
Overflow can occur when the signs of two operands are the same. It obviously occurs if the
sign of the result is different. A circuit to detect overflow can be added to the n-bit adder by
implementing the logic expression.

26. List the conditions produced during a floating point operation.

During a floating point operation, the conditions produced are
Exponent overflow, Significant underflow, Exponent underflow, Significant overflow.
27. Give the five regions on the IEEE floating point number.
The five regions are:
Negative overflow, Negative underflow, Zero, Positive underflow and Positive overflow.

28. Give the four alternative approaches in rounding mode.

In rounding, the alternative approaches are: Round to nearest, Round toward +∞, Round
toward –∞ , Round toward 0.

29. Define underflow.

If the result of the arithmetic operation involving n-bit numbers is too small to be represented
by n-bits, underflow is said to occur.
 UNIT 3
1. What is an ISP?
ISP stands for Instruction Set Processor. This unit is also called as processor which executes
machine instruction and coordinates the activities of other units.

2. What are the three steps to execute an instruction?

To execute an instruction, the processor has to Perform the following steps
• Fetch the instruction
• Decode the instruction
• Fetch operand address
• Execute the instruction

3. Define Processor Clock.

All operations and data transfers within the processor take place within time periods defined by
the processor clock.

4. What is a data path?

The Register, the ALU, and the BUSES all collectively interconnected is called as data path.

5. What is the purpose of an instruction decoder?

The instruction decoder generates the control signals needed to select the registers involved and
direct the transfer of data.

6. Define register file.

It is a three-bus structure used to connect the registers and the ALU of a processor. All general-
purpose registers are combined into a singl block called the register file.

7. Define Control Store

The micro routines for all instructions in the instruction set of a computer are stored in a special
memory called the control store

8. An instruction can be executed by performing one or more operations in, some specified
sequence. What are those operations?
• Transfer a word of data from one processor register to another or to the ALU
• Perform an arithmetic or a logic operation and store the result in a processor register.
• Fetch the contents of a given memory location and load them into a processor register.
• Store a word of data from a processor register into a given memory location.

9. What are the steps accomplished when we wish to transfer the contents of register RI to
register R4?
• Enable the output of register R1 by setting R1 out to 1. This places the contents of R1 on
the processor bus.
• Enable the input of register, R4 by setting R4 into 1. This loads data from the processor
bus into register R4.
10. Define ALU.
ALU stands for Arithmetic and Logic Unit. It is a combinational circuit that has no internal
storage. It performs arithmetic and logic operations on two operands applied as the input.

11. What are the actions needed to execute the instruction ADD (R1) R2?
To execute the instruction ADD (R2) R1, the steps followed are:

(a) Fetch the instruction, (b) Fetch the first operand,

(c) Perform the addition, (d) Load the resu1t into R1.

12. What is a branch instruction?

A branch instruction replaces the contents of the PC with the branch target address. This
address is usually obtained by adding an offset x, which is given in the branch instruction, to the
updated value of the PC.

13. How will you determine the required control signals for hardwired control?
For hardwired control, the required control signals are determined by,
• Contents of the control step counter
• Contents of the instruction register
• Contents of the condition code flags
• External input signals, such as MFC and interrupt requests.

14. What is a hard wired control unit?

A hardwired control unit consists of a collection of combinational circuits to generate various
controls signals.

15. What is the difference between hard wired and micro programmed control unit?

S.No Hardwired Control Unit Microprogrammed Control Unit

1 Digital circuits generate the control The control signals are stored as bit pattern in a
signals ROM
2 It is conventional design technique It is modem design technique

16. What is a control word?

A control word is a word whose individual bits represent the various control signals.

17. What is a micro routine?

A sequence of control words corresponding to the control sequence of a machine instruction
constitutes the micro routine.

18. Define micro instructions.

The individual control words in the micro routine are called as micro instructions.

19. List any two situations where a PC is not incremented every time a new micro instruction is
fetched.
• When a new instruction is loaded into the IR, the PC is loaded with the starting address of the
micro routine for that instruction.
• When a branch instruction is encountered and the branch condition is satisfied, the PC is
loaded with the branch address.
20. Define vertical organization.
It is used to specify only a small number of control functions in each macro instruction are
referred to as a vertical organization

21. Define horizontal organization.

The minimally encoded scheme in which many resources can be controlled with a single
microinstruction is called a horizontal organization

22. Why does vertical micro programming organization result in slower operating speeds?
Because more micro instructions are needed to perform the desired control functions.

23. What is bit-OR ing technique?

It is a technique for modifying the branch address. This, technique by pass micro instruction
170 by having the preceding branch micro instructions specifying the address 170 and then an OR
gate to change the least significant bit of the address 0 if the direct addressing mode is involved.

24. What are the alternatives for the bit-OR ing technique?
• Use the two conditional branch micro instructions at certain locations.
• To include two next address fields within a branch micro instruction, one for the
direct and one for indirect addressing modes.

25. What are the advantages of microprogramming?

The advantages of microprogramming are:
• The design of micro program control unit is less complex.
• The microprogram is flexible.
• An CPU's instruction set can be easily modified.
• Debugging and maintenance of micro programmed CPU is easy.

26. What are the disadvantages of microprogramming

The disadvantages of microprogramming are:
• A microprogrammed CU is slow.
• For a small CPU with very limited hardware resource a microprogram CU is expensive.

27. What is the main function of micro programmed control?

The main function of micro programmed control is to provide a means for simple, flexible
and relatively inexpensive execution of machine instructions.

28. Define hazard.

Pipelined operation is said to have been stalled for two clock cycles. Any condition that causes
the pipeline to stall is called a hazard.

29. Define control hazards.

The Pipeline may also be stalled because of a delay in the availability of an instruction. For
example, this may be a result of a miss in the cache, requiring the instruction to be fetched from the
main memory. Such hazards are often called control hazards.
30. Define data hazard.
A data hazard is any condition in which either the source or destination operands of an
instruction are not available at the same time expected in the pipeline.

31. Define stalls.

The Decode unit is idle in cycle 3 through 5, the execute unit is idle in cycle 4 through 6 and the
write unit is idle in cycle 5 through 7, such idle period are called stalls.

32. Define structural hazard.

Hazard that may be encountered in pipelined operation is known as a structural hazard.

33. When does a structural hazard occur?

A structural hazard is a situation when two instruction require the use of a given hardware
resource at the same time. The most common case in which this hazard may arise is in access to the
memory unit.

34. What is a branch penalty?

The time lost as a result of a branch instruction is called as branch penalty.

35. What are the address-sequencing capabilities required in a control memory:

(i) Incrementing of the control address register.

(ii) Unconditional branch as specified by address field of the microinstruction.
(iii) Conditional branch dependit1g on status bits in registers of computer;
(iv) A facility for subroutines calls and returns.

36. What is pipelining?

The technique of overlapping the execution of successive instruction for substantial
improvement in performance is called pipelining.
OR
Pipeline is a technique of decomposing a sequential process into sub-processes with each sub-
process being executed in a special dedicated segment that operates concurrently with all other
segments

37 Faster operations can be achieved, by pre-fetching the next micro-instruction, while the
current one being executed. What are the complexities involved in pre-fetching micro-
instructions?

Whenever status flags need to be checked to determine the next address of the micro-
instruction, pre-fetching may get the incorrect instruction. More compllex hardware required to
correct for such cases.

38.What are the requirements to be satisfied by an instruction set?

Instruction set should be Complete, Efficient, Regular and Compatible.

39.Discuss the relative merits and demerits of a hardwired control unit and a
microprogrammed control unit.

Hardwired Control Unit

Merit : Speed will be more
Demerits: If some instructions are added to the instruction set, the existing control unit
cannot be used and a new control unit should be defined from the scratch.
Micro programmed Control Unit
Merit : Speed will be less
Demerits: If some instructions are added to the instruction set, only the microprogram of
the control unit has to be modified.

40. What is Pipelining?

Pipeline is a technique of decomposing a sequential process into sub-processes with each
sub-process being executed in a special dedicated segment that operates concurrently with all other
segments.
 UNIT 4
1. What are the characteristics of memory system?
Location: CPU, Internal (main), External(Secondary)
Capacity: Word size, Number of words
Unit of transfer: Word, Block
Access method: Sequential, Direct, Random, Associative
Performance: Access time, Cycle time, Transfer rate
Physical type: Semiconductor, Magnetic surface
Physical characteristics Organization: Volatile/ Non-volatile
Organization: Erasable / Non-erasable

2. Name the physical characteristics of memory

Volatile and Non-volatile

3. Mention the types of memory?

The information storage components of a computer can be placed in four memory groups. They
are:
Register
Cache (level-1)
Cache (level-2)
Main memory and
Secondary Memory

4. What is known as secondary memory?

Secondary memory is much larger in capacity but also much slower than main memory.
Secondary memory stores programs and data.

5. What is the use of a Main Memory?

The main memory is used to store the programs and data inactive use. Its location is addressed
directly by the CPU's LOAD and STORE instruction.

6. Name the two types of RAM

SRAM and DRAM

7. Write short notes on READ, WRITE and REFRESH operation in DRAM? '
WRITE: To enable write R/W line is made LOW, which enables input buffer and disables
output buffer.
READ : To read data from the cell, the R/W line is made HIGH, which enables output buffer
and disables input buffer.
REFRESH: To enable refresh operation R/W line, ROW line and REFRESH line are made
HIGH.

8. What is meant by cache?

Cache is positioned logically between the CPU registers and Main memory. The storage
capacity of a cache is less than main memory, but speed of the cache is faster than main memory.
9. Define memory access time(access time)?
The time required to access one word is called the memory access time (or) it is the time that
elapses between the initiation of an operation and the completion of that operation.

10. Compare between SRAM and DRAM

S.No Static RAM Dynamic RAM

1 Less memory cell per unit area
2 Access time is very low and hence it is
faster
3 It consists of number flip-flops. Each
flip flop is used to store one bit.
4 Refreshing is not required
5 Cost is more
More memory cell per unit area
Access time is higher than static RAM
It stores charge on a capacitor
Refreshing is required to maintain the
charge on the capacitors after every few
milliseconds. Extra hardware is required to
control refreshing.
Cost is less

11. What is ROM,PROM,EPROM and EEPROM?

ROM: It is Read only memory. It is a permanent storage.

PROM (Programmable ROM): The PROMs are one time programmable. Once programmed, the
information stored is permanent.

EPROM (Erasable PROM): Here, one erase the stored data in the EPROMs by exposing the chip
to ultraviolet light through its quartz window for 15 to 20 minutes.

EEPROM (Electrically EPROM): EEPROM allows selective erasing at the register level rather
than erasing all the information since the information can be
changed by using electrical signals. The EEPROM memory also
has a special chip erase mode by which entire chip can be erased in
10 ms. .

12. Write short note on flash memory?

Flash memories are read /write memories. In flash memories it is possible to read the contents of
a single cell, but it is not possible to write an entire block of cells. A flash cell is based on a single
transistor controlled by trapped charge. The flash memories are available in modules. These modules
are implemented in two types: flash cards and flash drives.

13. Define memory cycle time?

It is the minimum time delay required between the initiations of two successive memory
locations. For example it is the time between two successive read operation.

14. What are the characteristics of semiconductor RAM memories?

• They are available in a wide range of speeds.
• Their cycle time range from 100 ns to less than 10 ns.
• They replaced the expensive magnetic core memories.
• They are used for implementing memories.
15. Differentiate flash drives and hard disk drives
S.No Flash Drives Hard Drives
1 These are solid state electronic devices These are magnetic devices
2 They don't have movable parts and hence They have moveable parts. They are
insensitive to vibration. sensible to vibrations.
3 They have shorter seek and access times They have comparatively larger seek and
which results in faster response. access times
4 They have lower power consumption and They have comparatively large power
hence suitable for battery driven consumption.
applications
5 They are available in smaller storage Storage capacity is larger
capacity.
6 Higher cost per bit. Lower cost per bit.
7 Deterioration rate is high Deterioration rate is low.

16. How the performance of the memory can be measured?

The performance of the memory can be measured using two typical Performance parameters
namely, Memory latency and Bandwidth.

17. What is SIMM and DIMM?

The main memory (DRAM) is implemented using large memory modules known as SIMMs
(Single In-Line Memory Modules) and DIMMs (Dual-In-Line Memory Modules): These modules
are an assembly of several memory chips on a separate small board that plugs vertically into a single
socket on the motherboard.

18. What is cache memory and hit rate?

Cache memory is a small section of SRAM is added along with main memory. The
percentage of accesses where the processor finds the code or data word it needs in the cache memory
is called the hit rate. The hit rate is normally greater than 90 percent.

19. What is use of cache controller?

It is used to implement the cache logic.

20. What is program locality and locality of reference and mention its types?
The prediction of next memory address from the current memory address is known as program
locality. It enables cache controller to get a block of memory instead of getting just a single address.
Many instructions in localized area of the program are executed repeatedly during some time
period, and the remainder of the program is accessed relatively infrequently. This is referred to as
locality of reference.

14. What are the elements needed for the cache design?
The elements needed for the cache design are
Cache size, Mapping function, Replacement algorithm, Write policy, Block size, and Number of
Caches

15. What is mapping function and its types?

The cache memory can store a reasonable number of blocks at any given time, but this number is
small compared to the total number of blocks in the main memory. The correspondence between the
main memory blocks and those in the cache is specified by a mapping function.
 There are three types of mapping techniques. They are: Direct-mapping technique,
Associative-mapping technique and Set associative mapping technique.

16. What is cache updating and name the types?

In a cache system, two copies of same data can exist at time, one in cache and one in main
memory. If one copy is altered and other is not, two different sets of data become associated with the
same address. The types of the cache updating are:
Write Through System, Buffered Write Through System and Write-Back System

17. What is cache coherency and name the different approaches to prevent data inconsistency?
In multiprocessor systems, another bus master can take over control of the system bus. This bus
master could write data into a main memory blocks which are already held in the cache of another
processor. When this happens, the data in the cache no longer match those held in main memory
creating inconsistency. The different approaches to prevent data inconsistency are
Bus watching (snooping), Hardware transparency, Non-cacheable memory and Cache flushing.

18. What is replacement algorithms and name the various approaches?

When a new block is brought into the cache, one of the existing blocks must be replaced, by a
new block. The choice of replacement of the existing block should be such that the probability of
accessing same block must be very less. The replacement algorithms do the task of selecting the
existing block which must be replaced. The various approaches are
Least-Recently Used (LRU)
First-in-First-out (FIFO)
Least-Frequently-Used (LFU)
Random

19. What is memory interleaving?

The main memory is divided into a number of memory modules and the addresses are arranged
such that the successive words in the address space are placed in different modules.

20. What is virtual memory and MMU?

The operating system moves program and data automatically between the main memory and
secondary storage. Techniques that automatically swaps program and data blocks between main
memory and secondary storage device are called virtual memory. The memory management unit
controls this virtual memory system. It translates virtual address into physical addresses.

21. What is address translation page fault routine, page fault and demand paging?
If the page required by the processor is not in the main memory, the page fault occurs and the
required page is loaded into main memory from the secondary storage memory by special routine
called page routine.

22. What is TLB?

TLB (Translation Look aside Buffer) is use to store the most recently used page table entries in
an on-chip cache.

23. What is segment translation and page translation?

Segment translation is a process of converting logical address into a linear address. Page
translation is the second phase of address translation. It transforms a linear address generated by
segment translation into a physical address.
24. What is seek time and latency time?
SEEK TIME: The seek time is the time required to move the read / write head to the proper
track. This time depends on the initial position of the head relative to the track specified in the
address. The average seek time is in the range of 5 - 8 ms.
LATENCY TIME: The rotational delay also known as latency time is the amount of time
that elapses after the head is positioned over the correct track until the starting position of the
addressed section passes under the read / write head.

25. What is RAID and data striping?

In a multiple disk system, arrays of inexpensive disks operate independently and in parallel to
improve the speed of data transfer. This system is referred to as RAID (Redundant Arrays of
Inexpensive Disks)
In a RAID system, a single large file is stored in several separate disk units by breaking the flip
up into a number of smaller pieces and storing these pieces on different disks. This is called data
striping.

26 Write short notes on WORM?

One or a small number of copies of a set of data is needed, the write-once read-many (WORM)
CD is used. The WORM storage provides one-time writing but unlimited reading of data. Data
cannot be overwritten or erased but can be updating by writing new information into a file at another
location on the disk

27. What do you understand by hit ratio?

Hit ratio is a concept defined for any two adjacent level of a memory hierarchy. When an
information is found in cache we call it as a hit, otherwise miss. This hit and miss ratio is used to
measure the performance of cache.

28. Define locality of reference. What are its types?

During the course of execution of a program memory references by the processor for both the
instruction and the data tends to cluster. There are two types: (i) Spatial Locality, and (ii)
Temporal Locality.

29. Define byte addressable memory.

Byte locations have addresses 0,1,2Thus if the word length of the machine is 32 bits, successive
words are located at addresses 0,4,8with each word consisting of 4 bytes. This is called byte
addressable memory.

30. What are the two registers involved in data transfer between the memory and the
processor?
The registers used to transfer data are
MAR (Memory Address Register), MBR/MDR (Memory Buffer/Data Register)
31. Define rotational latency?
The time is consumed for the cell to reach the read write head for the data transfer to begin. The
average time for this movement to take place is the latency of the memory. In memories where
information rotates around a closed track is called the rotational latency.
32. Define seek time?
The time required to move the read write had to the proper track is called seek time.
33. What are called as the destructive read out and non destructive read out?
In some memories, the method of reading the memory destroys the stored information, this
phenomenon is called DRO. Memories in which, reading does not affect the stored data are called
NDRO.

34. What are the factors of the long access time?

• The read write head positioning time.
• The relatively slow speed at which, the track move.
• The fact that data transfer to and from the memory is serial rather than parallel.
35. What is called as sector?
The recording surface is divided into sectors so that, the part of a track within a sector stores a
fixed amount of information corresponding to the memory units block size.

36. Explain how the RAM operates?

RAM operates as follows:
• First address of the target location to be accessed is transferred via the address bus to the
RAM's address buffer.
• The address is then processed by the decoder which selects the required location in the
storage cell unit.

37. Define content addressable memory (CAM)?

A memory unit accessed by content is called content addressable memory (CAM). This type of
memory is accessed simultaneously and in parallel on the basis of data content rather than by
specific address or location.

38. What are the two ways in which the system using cache can proceed for a write operation?
• Write through protocol technique.
• Write - back or copy back protocol technique.

39. What is a hit & hit rate?

A successful access to data in cache memory is called hit & the number of hits stated as a
fraction of all attempted access.

40. What is virtual memory?

Techniques that automatically move program and data blocks into the physical main memory
when they are required for execution are called as virtual memory.

41. What is Virtual Address?

The binary address that the processor used for either instruction or data called as virtual address.

42. What is virtual page number?

Each virtual address generated by the processor whether it is for an instruction fetch is
interpreted as a virtual page.
43. In some computers, the processor responds only to leading edge of the interrupt-request
signal on one of its interrupt-request lines. What happens if two independent devices are
connected to this line?
The request from 1 device may be masked by the other - because only 1 edge will be seen
by the processor (if the two interrupts occur in quick succession i.e, before the first interrupt has
powered its line).

44. In many computers the Cache block size is in the range of 32 to 128 bytes. What would be
the main advantages and disadvantages of making the size of Cache blocks larger or
smaller?

Larger size cache would imply fewer misses if most of the data in the block are actually used,
and wasteful if much of the data are not used before the cache block is ejected from the cache.
Smaller size would mean more misses.

45. A two level memory (Ml, M2) has the access times tAl = 10-8 sec. and tA2 = 10-3 sec. What
must the hit ratio H be in order for the access efficiency to be at least 65% of its maximum
possible value?

0.65x10 −8 − 10 −3
Hit Ratio H =
10 −8 + 10 −3

46. How Cache memory is used in reducing the execution time?

If the active portions of the program and data are placed in a fast small memory, the average
memory access time can be reduced, thus reducing the total execution time of the program. Such a
fast small memory is referred to as a cache memory.

47. Define memory interleaving.

In order to carry out two or more simultaneous accesses to memory, the memory must be
partitioned into separate modules. The advantage of a modular memory is that it allows the
interleaving ie consecutive addresses are assigned to different memory module.

48.Define dumb terminal.

Early CRT terminals were relatively simple in their functional capability, being able only to
perform primitive I/O operations. Such terminals are sometimes called dumb terminals.
 UNIT -V
1. Why Input/Output devices cannot be connected directly to the System Bus?
• The data transfer rate of the Input/Output devices is often slower than, that of
memory or CPU.
• It has different data formats and word length than that of CPU.
• Each devices has different methods of operations.

2. Explain Input/Output Interfacing Techniques.

Two types of Interfacing Techniques are
• Memory mapped Input/Output
• Input/Output Mapped Input/Output.

3. Give the comparison between memory mapped I/O and I/O mapped I/O.
S.No Memory mapped I/O I/O Mapped I/O
1 Memory and Input/Output share the Processor provides separate address range
address range of address range of of address range for memory and I/O
processor. devices
2 Processor provides more address lines for Processor provides less address lines for
accessing memory. accessing Input/Output.
3 Memory control signals are used to I/O control signals are used to control
control read and write units I/O operations real/write
unit I/O operations

4. What is memory mapped I/O?

When the I/O devices share the same address space, then the arrangement is called memory
mapped I/O.

5. What is Program controlled I/O?

In program controlled I/O, the processor repeatedly checks a status flag to achieve the required
synchronization between the processor and an input and output device.

6. What is the various mechanisms for implementing I/O operation?

• Program controlled I/O
• Interrupts
• DMA

7. When the privilege exception arises?

An attempt to execute a privileged instruction while in the user mode leads to a special type of
interrupt called a privilege exception.

8. What are the 2 independent mechanisms for controlling interrupt request?

• At the device end, an interrupt enable bit in a control register determines whether the device
is allowed to generate an interrupt requires.
• At the processor end, either an interrupt enable bit in the priority structure determines
whether a given interrupt request will be accepted.
9. How do you differentiate the inter and intra system communication?
S.No Intra System Communication Inter System Communication
1 Which occur within a single computer Which can involve communication over much
system and involves information transfer longer distances
over lesser distances
2 Implemented by groups of electrical wires Implemented by a variety of physical media
called buses like electrical cable, optical fibers and wireless
links
3 It support parallel data transmission It support serial data transmission
4 Cost is high Cost is less

10. List down the arbitration schemes used in centralized bus arbitration approach.
• Daisy chaining.
• Polling method
• Independent Request.

11. Bring out the merits and demerits of Daisy chaining method.
Merits:
• It is simple and cheaper method.
• It requests the least number of lines and this number is independent of the number of
masters in the system.
Demerits:
• The propagation delay of bus grant signal is proportional to the number of masters in
the system. This makes arbitration time slow and hence limits the number of masters
in the system.
• The priority of the master is fixed by its physical location.
• Failure of any one master causes the whole system to fail.

12. What is cycle stealing?

The processor originates most memory access cycle and the DMA controller can be said to
cycle steal memory cycles from the processor. This technique is known as cycle stealing.

13. What are vectored interrupts?

To reduce the time involved in the polling process a device requesting an interrupt may identify
itself directly to the processor. Then the processor can immediately start executing the corresponding
ISR. The schemes based on this approach are called vectored interrupts.

14. What is PCI interrupts?

Each PCI device has its own interrupt line or lines to an interrupt controller. The interrupt pins
are provided for PCI devices that must generate request for service.

15. Give the classification of interrupts.

(i) Single level interrupts.
(ii) Multi level interrupts.

16. What is interrupt and be interrupt service routine.

The event that causes the interruption is called interrupt and the routine executed to service the
interrupt is called interrupt service routine.
17. List the different types of interrupts.
I. Hardware interrupt
- Single level interrupts
- Multi level interrupts
2. Software interrupts.

18. Explain Maskable interrupt.

Maskable interrupts are enabled and disabled under program control by setting or resetting the
particular flipflops in the processor. When masked, processor does not respond to the interrupt even
though the interrupt is inactive. In the processor those interrupts which can be masked under
software control are called maskable interrupts.

19. Explain vectored interrupt.

When the external device interrupts the processor. Processor has to execute interrupt service
routine for servicing that interrupt. If the internal control circuit of the processor produces a CALL
to a predetermined memory location which is the starting address of ISR, then that address is called
vector address and such interrupts are called vector interrupts.

20. What are the advantages of polling method?

• The priority can be changed by altering the polling sequence stored in the controller.
• If one module fails entire system does not fail.

21. What is the advantage and disadvantage of independent request bus arbitration method.

Advantage: Due to separate pain of bus request and bus grant signals, arbitration is fast and is
independent of the number of master in the system. .
Disadvantages: It requires more bus request and grant signals.

22. What is DMA and DMA controller.

DMA - Direct Memory Access.
In this technique external device is used to control data transfer which generates address and
control signals required to control data transfer. It allow peripheral device to access directly memory.
Hence this technique is referred as Direct Memory Access (DMA). The external device which
controls the data transfer is known as DMA controller.

23. Explain Synchronous Bus and asynchronous Bus.

In synchronous bus, all devices derive timing information from a common clock signal. In
asynchronous bus, the common clock is eliminated and data transfer on the system bus in achieved
by the use of a hand shake between the processor and the device being addressed.

24. Explain Parallel Port.

Parallel port is used to send or receive data having group of bits (8 bits or 16 bit)
simultaneously. According to the use, hardware and control signal requirements parallel ports are
classified as input port and output port.

25. Explain input port with an example.

Input ports are used to receive the data. Commonly used input device is a keyboard. A typical
keyboard consists of mechanical switches that are normally open. When key is pressed
corresponding, signal after and encoder circuit generates ASCII code for the corresponding key.
26. Explain output port with an example.
The output ports are used to send the data to the output device. Commonly used output device is
printer. The output port contains a data register and status flux.

27. Explain programmable parallel port.

The input and output interfaces can be combined into a single interface and the direction of data
flow can be controlled by data direction register. Hence single port ran be programmed to use for
input the data or output the data. Such a port is known as programmable parallel port.

28. Explain serial port.

A serial port is used to transmit/receive data serially. (i.e.) One bit at a time. A key feature of an
interface circuit for a serial port is that it is capable of communicating in a bit serial fashion on the
device side and in a bit parallel fashion on the processor side. A shift register is used to transform
information between the parallel and serial formats.

29. What is meant by super scalar processor?

Super scalar processors are designed to exploit more instruction level parallelism in user
programs. This means that multiple functional units are used. With such an arrangement it is
possible to start the execution of several instruction in every clock cycle. This mode of operation is
called superscalar execution.

30. What is DMA operation? State its advantages.

DMA stands for Direct Memory Access. In order to transfer large amount of data between
memory and I/O device without involvement of CPU, this technique is used. The advantage is fast
data transfer.

31. What is the necessity of an interface?

Any device that has to be connected to a CPU requires an interface, which takes care of the
mismatch in speed, data and electrical characteristics between the CPU to the device.

32. What is superscalar execution?

In this type of execution, multiple functional units are used to create parallel paths through
which different instructions can be executed in parallel so it is possible to start the execution of
several instructions in every clock cycle. This mode of operation is called superscalar execution.

33. What is RISC and CISC?

The processors with simple instructions are called as Reduced Instruction Set Computers
(RISC). The processors with more complex instructions are called as Complex Instruction Set
Computers (CISC).

34. How are multiprocessors classified based on their memory organization?

Multiprocessors are classified by the organization of their memory systems. There are:
• Distributed Memory ( loosely coupled)
• Shared memory (tightly coupled).

35. What is meant by multiprocessors?

The system contains two or more CPUs and can execute instructions independently then the
system is called multiprocessor system.
36. Define fault tolerance?
It is defined as the ability of a system to execute specified algorithms correctly regardless of
these failures.

37. What is an operating system?

An operating system is a program which acts as an interface between a user of a computer and
computer hardware.

38. What is the role of the operating system in the computer?

The role of the operating system is:
• Allocate resources to programs and users
• Control and execution of user program
• Reads commands from the user, verigy their accuracy and execute the command given by the
user.

39. What is meant by cache coherence problem in multiprocessors?

In multiprocessor, each CPUs has independent cache, the possibility exists for two or more
cache contain different version of the same information at the same time, this is known as cache
coherence problem.

40. Define deadlock?

Process is waiting for an event such as the release of a shared resource, but the event is never
occurs, this known as deadlock.

41. What is Vector Processor?

A vector computer or vector processor is a machine designed to efficiently handle arithmetic
operations on elements of arrays, called vectors. Such machines are especially useful in high
performance scientific computing, where matrix and vector arithmetic are quite common. The Cray
Y-MP and the Convex C3880 are two examples of vector processors used today.

42. Define Availability in fault tolerance?

Availability is defined as the probability that a system is operational at a given point in time.

43. Distinguish the reliability and availability:

Reliability characterizes the ability of a system to perform its service correctly when asked to
do so. Availability means that the system is available to perform this service when it is asked to do
so.

44. A computer has one delay slot. The instruction in this slot is always executed, but only on a
speculative basis. If a branch does not take place, the results of that instruction are
discarded. Suggest a way to implement program loops efficiently on this computer.
The instruction executed on a speculative basis should be one that is likely to be the correct
choice most often. Thus, the conditional branch should be placed at the end of the loop, with an
instruction from the body of the loop moved to the delay slot if possible. Alternatively, a copy of the
first instruction in the loop body can be placed in the delay slot and the branch address changed to
that of the second instruction in the loop.
45. RISC processors typically have all instructions of equal size. What is the advantage of such
a choice?
This makes the decoding easier, and hence faster. Fixed field decoders can be used.

46. Discuss the Flynn's classification of computers.

Single Instruction Stream Single Data Stream (SISD)

Single Instruction Stream Multiple Data Stream (SIMD)
Multiple Instruction Stream Single Data Stream (MISD)
Multiple Instruction Stream Multiple Data Stream (MIMD)

47. Distinguish between RISC and CISC machines.

S.No RISC
1 Number of instructions, addressing
modes, instruction formats will be less.
2 Hardwire control technique is used.
3 Instructions need one clock cycle for
execution.
CISC
Number of instructions, addressing modes,
instruction formats will be less.
Microprogrammed control technique is used.
Instructions need more than one clock cycle
for Execution.

48.What is meant by reliability? How is it defined for a series and parallel system?
Reliability : It is defined as the probability of a unit or system surviving (functioning
correctly) for a period of time t.
n
Serial System : Reliability is a product of the component reliabilities. R = ∏R
i =1
i

n
Parallel System: R = 1 - ∏ (1 − R )
i =1
i

49.What is meant by bit sliced processor?

If CPU is constructed with IC components such as processor unit, microprogram sequencer,
and control memory, then the CPU structured in this manner is called a bit sliced processor.