dfsazvczxvzzcx 25.

6 GB/s, which provides exactly double the theoretical bandwidth of

Intel's 1600 MHz FSB used in the X48 chipset.

Although some high-end Core i7 processors expose QPI, other "mainstream" Nehalem
desktop and mobile processors intended for single-socket boards (e.g. LGA 1156 Core
i3, Core i5, and other Core i7 processors from the Lynnfield/Clarksfield and successor
families) do not expose QPI externally, because these processors are not intended to
participate in multi-socket systems. However, QPI is used internally on these chips to
communicate with the "uncore", which is part of the chip containing memory
controllers, CPU-side PCI Express and GPU, if present; the uncore may or may not be
on the same die as the CPU core, for instance it is on a separate die in the Westmere-
based Clarkdale/Arrandale.[12][13][14][15]:3 These post-2009 single-socket chips
communicate externally via the slower DMI and PCI Express interfaces, because the
functions of the traditional northbridge are actually integrated into these processors,
starting with Lynnfield, Clarksfield, Clarkdale and Arrandale; thus, there is no need to
incur the expense of exposing the (former) front-side bus interface via the processor
socket.[16] Although the core–uncore QPI link is not present in desktop and mobile
Sandy Bridge processors (as it was on Clarkdale, for example), the internal ring
interconnect between on-die cores is also based on the principles behind QPI, at least as
far as cache coherency is concerned.[15]:10