EDITED BY BRAD THOMPSON
designideas
Digital countdown timer may never
need battery replacement
Mark E Buccini, Texas Instruments, Houston, TX

Comprising a microprocessor, an
LCD, a 32.768-kHz crystal, and
little else, the basic countdown-timer
circuit in Figure 1 operates from a
commonly available CR2032 lithium-
coin-cell battery. Based on the circuit’s
calculated current drain, the battery
may never need replacement over a
projected 10-year operational life.
Careful selection of the battery and dili-
gent exploitation of the microproces-
sor’s low-power modes help minimize
power consumption and thus maximize
battery life. The coin-cell battery’s size
and flat form factor encourage minia-
turization for portable-system applica-
tions. In addition, the lithium cell pres-
ents a flat voltage-versus-time discharge
curve that allows direct drive of the
LCD’s segments to produce high con-
trast without additional compensation
circuitry.
A typical CR2032 cell delivers ap-
DISPLAY
R1
DVCC/AVCC
3V 
68k

RESET
RST/NMI
BATTERY
DVSS/AVSS
MSP430F412IPM
S1
Figure 1 A half-dozen components are all it takes to build a battery-thrifty count-
down timer.
READERS SOLVE DESIGN PROBLEMS
proximately 200 mAhr of rated ener-
gy capacity. To achieve the design goal
of 10 years of continuous operation,
the system’s average current consump-
tion must not exceed 2.28
A, which
you calculate by dividing the battery’s
energy capacity by the system’s opera-
tional life: 200 mAhr/10 years/365
days/24 hours2.28
A. A micro-
processor from Texas Instruments’
MSP430 family presents a low-stand-
by-current demand of only 0.8
A,
which includes current drawn by its
crystal oscillator, integrated LCD
driver, and interrupt-driven wake-up
timer. The 31/2-digit LCD, a Varitronix
model VI-302-DP, consumes an addi-
tional 1
A. The total standby-current
consumption for all active countdown-
timer components is thus 1.80
A.
In normal (standby) operation, the
microprocessor’s 32-kHz external-crys-
tal clock drives an internal counter that
BUS
CONNECTIONS
S0-S23
COM0-3
IC1 32,768 Hz
XIN
XOUT
Y1
AND FRAN GRANVILLE
D Is Inside
80 Wide-range regulator delivers
12V, 3A output from 16 to 100V
source
82 Stable, 18-MHz oscillator
features automatic level control,
clean-sine-wave output
84 Ultra-low-noise low-dropout
regulator achieves 6-nV/Hz
noise floor
generates an interrupt once per second.
The interrupt awakens the processor,
which executes an active main-software
loop that decrements a countdown reg-
ister via direct BCD (binary-coded-dec-
imal) subtraction. Adding a value of 99
(decimal) to the countdown register
and discarding the leftmost digit per-
form a one-digit subtraction. For exam-
ple, 2199120; dropping the one in
the 100s place yields a value of 20. As
a bonus, this method directly displays
the countdown register’s contents on
the LCD without requiring current-
hungry binary-to-BCD conversions.
(You can download the timer software’s
assembly-language listing from the
online version of this Design Idea at
www.edn.com/050623di1.)
As a final step, the main loop com-
pares the countdown register’s contents
with zero to determine whether the pre-
programmed time interval has expired.
If so, the display flashes the time-out
message. The main loop activates the
CPU and its on-chip high-speed oscil-
lator, which consume a total of 250
A.
Writing the software to execute 100 or
fewer clock cycles—equivalent to 100

sec at the default 1-MHz CPU clock
frequency—reduces current demand.
With such a short active period, the
main loop’s total current consumption
is virtually negligible: Main loop250
mA(100/1 million)0.025
A.
JUNE 23, 2005 | EDN 79
designideas
Thus, total current consumption for
the digital countdown timer is the sum
of the standby- and main-loop currents:
1.80.025앓1.8
A.
At approximately 1.8-
A average
current consumption, the countdown
timer easily meets the 2.28-
A design
goal and ensures more than 10 years of
continuous operation. Given the de-
vice’s low current drain, a designer
could reduce the timer’s cost and com-
plexity by packaging the circuitry along
with a nonreplaceable battery. Many of
the microprocessor’s functions and I/O
pins remain unused and available for
additional features, and the compact
firmware for implementing the count-
er occupies less than 250 bytes of 8
kbytes of available flash memory.
Applications for the circuit range
from exercise-routine timing to a
restaurant-service-guarantee timer. In
such an application, the restaurant’s
greeter presses the timer’s reset switch
to reset the processor and start a pre-
programmed countdown interval. If the
time interval expires without the cus-
tomer’s being seated, the timer’s display
flashes to indicate that a guarantee of
service went unmet.EDN

Wide-range regulator delivers current to the LM5104. To reduce

power dissipation at high input volt-
12V, 3A output from 16 to 100V source ages, after initial power application,
Wayne Rewinkel, National Semiconductor, Schaumburg, IL diode D2, a 1N4148, supplies an 11.5V
bootstrap voltage to the remainder of
Synchronous buck regulators a relatively high-performance syn- the circuit. Transformer T1, a 100-to-

offer high efficiency and are pop- chronous buck regulator that can oper- 1 current transformer from Pulse
ular in applications in which available ate at inputs as high as 100V. Engineering, provides current feed-
input voltages are 12V or less. How- The circuit in Figure 1 uses National back during MOSFET Q1’s on-time. Q1
ever, as input voltage approaches Semiconductor’s LM5020 current- and Q2 are Siliconix Dpak devices,
100V, wide-range-regulator design be- mode PWM, IC1, to drive an LM5104 which have low gate-charge require-
comes more difficult, and the choice of gate driver, IC2, forming a synchronous ments and low on-resistances to mini-
suitable ICs narrows considerably. This controller. The LM5020 contains an mize total switching losses at the cir-
Design Idea combines a current-mode internal linear regulator that accepts cuit’s 200-kHz operating frequency. All
PWM IC for flyback-regulator circuits input as high as 100V and can also capacitors are of ceramic-dielectric
with a 100V gate-driver IC to produce deliver an output that can supply drive construction to withstand high tem-
perature and to meet
VIN packaging-size con-
T1 16 TO 100V
straints.
P8208 1
F2
100V CERAMIC C1A For sustained opera-
C1B
R2 10k N=100 N=1
tion at high input volt-
100 1N4148
age, maximum current,
D1 1N4148 and elevated-tempera-
ture conditions, transis-
SUD19N20-90
tor Q1 requires an ade-
100 nF
100 nF
Q1 quate heat sink or cool-
47 nF DO5010P-333
6.04k ing airflow to maintain
33
H
100 pF C9 its junction temperature
100 nF 1N4148 VOUT
12V
below the 175C maxi-
5 4 3 2 1 4 3 2 1 1
F 3A MAXIMUM mum specification. Q
1
OUT1 VCC CMP VFB VIN HS HO HB VDD
22
F2 C2A
has a low junction-to-
IC1 IC2 6V
LM5020MM-1 LM5104M CERAMIC
25V CERAMIC C2B case thermal resistance,
R10 GND UVLO CS RT SS RT IN GND LO and thus its case tem-
45.3k 6 7 8 9 10 5 6 7 8 perature must not
C
exceed 160C. L1, the
R7 4
R5 Q2
1k 31.6k 22 nF
100k
model DO5010 un-
4.99k
R4
SUD25N15-52 shielded ferrite-core
1k inductor from Coilcraft,
D3
C5
R6 MBRS1100 presents a small pc-
330 pF 1k
R3 board footprint and
8.66k
offers a high saturation-
current rating but repre-
Figure 1 Two ICs and two MOSFETs form the heart of this high-efficiency, wide-range voltage regulator. sents this design’s dom-

80 EDN | JUNE 23, 2005

designideas
inant loss component. For 100 currents as high as 3A. This rou-
95
applications with less critical tine-sounding specification also
90
space requirements, you can requires operation in a physi-
85
improve circuit efficiency by 80
cally and electrically harsh
increasing L1’s inductance and EFFICIENCY 75 environment in which the
(%)
size, thus reducing ripple cur- 70 packaged circuit resides on an
rent and enabling use of a larg- 65 engine block that reaches a
er core and increased winding- 60 temperature of 125C, and
wire gauge. Reducing the out- 55 ambient-air temperature reach-
50
put voltage improves efficien- 0.5 1 1.5 2 2.5 3
es 100C. In addition, the
cy, but, as output voltage drops OUTPUT CURRENT (A) power source comprises two
below the circuit’s 8V boot- Figure 2 Circuit efficiency varies as functions of power- series-connected 12V batteries
strap voltage, IC1 dissipates supply input voltage and load current. that provide a nominal voltage
additional power and requires of 24V, which in practice varies
caution to avoid exceeding its ratings. One practical application for the cir- from 18 to 40V and includes inductively
Figure 2 shows the circuit’s measured cuit met a customer’s requirement for a induced load-dump voltage spikes that
efficiency versus output current for dc/dc converter that would operate from reach 100V.EDN
three input voltages. a 24V source and deliver 12V output at

Stable, 18-MHz oscillator
features automatic level control,
clean-sine-wave output
Jim McLucas, Longmont, CO

A recent Design Idea described
a method for designing simple,
high-frequency LC oscillators with few
passive components (Reference 1).
However, for best results, practical hard-
ware design of a stable oscillator requires
more parts and greater complexity.
Figure 1 shows a stable, 18-MHz oscil-
lator with automatically leveled output
amplitude control and an output buffer
that delivers a sine wave with low har-
monic content (Reference 2). In addi-
tion, this Design Idea replaces the orig-
inal JFET oscillator with an inexpensive
dual-gate MOSFET: an Infineon Tech-
nologies BF998, available from DigiKey
and other sources.
The heart of the circuit comprises a
Hartley oscillator, Q1. To minimize
loading, a 10-k resistor couples the
output from Q1’s source to the high-in-
put-impedance gate of source follower
JFET Q2. In turn, Q2 drives Q3, a BJT
(bipolar-junction-transistor) emitter
follower, which in turn drives BJT am-
plifier Q4. Toroidal-core transformer T1
couples Q4’s output to a 50 load, de-
livering 2.61V p-p or 12.3 dBm. A
Spice-circuit simulation predicts a sec-
ond-harmonic amplitude of 35 dB be-
low the fundamental. The second har-
monic exceeds the amplitudes of all
higher order harmonics, and an oscil-
loscope measurement displays a clean-
looking sine wave across the 50 load.
To provide a good termination for
the amplifier and still obtain 7.3 dBm
(1.47 V p-p)—for example, to drive a
diode-ring mixer—you can insert a
50, 5-dB pad between output trans-
former T1 and the load. Potentiometer
R2 adjusts the RF output level, and, for
increased stability, you can replace R2
with a fixed resistive divider built with
low-temperature-coefficient, metal-
film, fixed resistors. Part of the signal
at Q4’s collector drives the gate of JFET
source follower Q5 through C7 and R9.
Diode D1 rectifies the signal, which, af-
ter filtering, feeds operational amplifi-
er IC1’s inverting input. Resistor R1 and
low-temperature-coefficient poten-
tiometer R2 divide the 12V supply to
produce a dc reference voltage for IC1’s
noninverting input and set the output
signal’s level. After filtering, IC1’s dc
output drives Q1’s Gate 2 to set the de-
vice’s gain and thus control RF output.
Connected to the center tap of coil
L1, trimmer capacitor C18 allows fine
adjustment of the oscillator’s frequen-
cy. If decreased frequency stability is
acceptable, you can replace C18 with a
low-cost ceramic trimmer. Piston-type
trimmers are rather expensive and less
available than ceramic trimmers, but a
typical ceramic trimmer exhibits a
temperature coefficient that’s at least
an order of magnitude worse than a pis-
ton trimmer’s. To operate the oscilla-
tor at a frequency other than 18 MHz,
multiply the inductance of L1 and the
capacitances of C12, C13, C16, C17, and
C18 by 18/fOSC2, where fOSC2 is the new
frequency in megahertz. Adjust the tap
for Q1’s source connection so that it re-
mains at about 20% of the winding’s
total number of turns as counted from
the inductor’s grounded end.
You can replace the series combina-
tions of C12 and C13 with a 13-pF ca-
pacitor, and you can replace C14 and
C15 with a 2.5-pF capacitor. If you re-
design the circuit for a different fre-
quency, adjust the values of C14 and
C15 or their single-capacitor replace-
ment for just enough capacitance to
ensure reliable start-up under all antic-
ipated operating conditions. Also, note
that using two capacitors for C16 and
C17 helps reduce start-up drift, as does

82 EDN | JUNE 23, 2005

designideas
12V NOTES:
L1: EIGHT TURNS #22 AWG WIRE ON A 5/8-IN.-DIAMETER
COIL FORM AT 24 TURNS PER IN.
SOURCE TAP IS 1.5 TURNS FROM THE GROUNDED END.
C2
TAP FOR C18 IS FOUR TURNS FROM THE GROUNDED END.
0.01
F
T1 PRIMARY: 25 TURNS #24 AWG WIRE ON A CWS
BYTEMARK F-50-61 CORE.
R1 SECONDARY: FIVE TURNS #24 AWG WIRE INTERLEAVED
10k R3 BETWEEN THE PRIMARY TURNS ON THE SIDE
3.3k C3
1% 2 _ OPPOSITE FROM THE PRIMARY LEADS.
0.01
F C18: 1- TO 10-pF GLASS OR CERAMIC PISTON TRIMMER.
IC1
1
½IL082
R2 3 + C4
5k 4 0.01
F D
C1
0.01
F Q5 12V
C6
2N5486 R
0.01
F S 8
10k R9
1% 3.32k
D1 1% PRIMARY SECONDARY
R4 R5 R6 R7
C5 SD101C
10k 33k 1.5k 3.3k R10
1000 pF
47
C7
0.01
F T1 WINDING
ARRANGEMENT

T1
ⳮ12V 8V 12V
25 FIVE R12 VOUT
C11 TURNS TURNS 50
0.01
F

C9 C10
R11 VOUT
C8 0.01
F 0.01
F
Q1 10k 2.61VP-P
1000 pF
BF998 D 12.3 dBm
C14 C15
G2
5 pF 5 pF
G1 Q2
2N5486 D
S
R13
L1
C12 FOUR C16 C17 1M R14 Q3 Q4
1.09 S
TURNS 10k C19
22 pF
H 22 pF 33 pF 2N3904 2N3904
0.01
F

R18
C13 FOUR 47
33 pF TURNS R15 R16 R17
1.5 C 2.2k 2.7k 1k
18
TURNS R19 C20
82 0.01
F

ⳮ12V

Figure 1 This low-distortion, 18-MHz oscillator offers high stability and automatic output-level control.

using temperature-stable (NP0-char-
acteristic) ceramic-dielectric capaci-
tors for C12 through C17. The buffer am-
plifier, Q2 through Q4, requires mod-
ifications for operation at frequencies
above approximately 25 MHz.
A well-regulated external dc source
(not shown) provides 12, 12, and 8V
to the circuit. To maintain high stabil-
ity and remain within Q1’s 12V maxi-
mum drain-to-source-voltage rating,
the 8V supply powers only the oscilla-
tor. Using the specified components
and at a constant ambient temperature
of 22C, after an initial 10-minute
warmup period, the oscillator’s fre-
quency drifts at an average rate of 2
to 3 Hz per minute over one hour.EDN
REFERENCES
1 Martínez, H, J Domingo, J Gámiz,
and A Grau, “JFETs offer LC oscillators
with few components,” EDN, Jan 20,
2005, pg 82.
2 Reed, DG, editor, “A JFET Hartley
VFO,” ARRL Handbook for Radio
Communications, 82nd Edition, Amer-
ican Radio Relay League, 2005.

Ultra-low-noise low-dropout regulator lators, demand even lower levels of

achieves 6-nV/Hz noise floor
Ken Yang, Maxim Integrated Products Inc, Sunnyvale, CA

Many low-dropout-voltage reg-
ulators see service in electronic
systems, but relatively few are designed
for low-noise operation. (For example,
Maxim’s MAX8887 achieves a noise
voltage of approximately 42
V rms.
However, certain applications, such as
ultra-low-noise instrumentation oscil-
power-supply noise. To reach this level,
the circuit in Figure 1 combines low-
noise components and extra filtering to
achieve an output noise floor of only 6
nV/Hz.
Voltage reference IC1, a Maxim
MAX6126, features low output noise.
Lowpass filter R1-C1 further reduces this
noise by attenuating noise frequencies

84 EDN | JUNE 23, 2005

designideas
VDD

VDD VDD
R1
2 7 10k
OUTF _ Q1*
IN
C4
OUTS 6
IC2 where VN_OUT represents
FDN302P
0.01
F + MAX4475
IC1 C3
1
F
C2
+
1
F
C1 the low-dropout circuit’s
MAX6126 100
F
output noise, VN_REF rep-
R2 VOUT
1
NR 3.9k resents the reference
C6
C5 1
F noise, VN_OPAMP repre-
0.1
F GND GNDS
3 4
R3
2.4k
sents the op amp’s input-
referred noise, and H(f)
represents the R1-C1 low-
*FAIRCHILD SEMICONDUCTOR OR EQUIVALENT pass filter’s transfer func-
tion. If a noise frequency
of interest falls well below
Figure 1 This low-dropout-voltage regulator features a noise floor of only 6 nV/Hz, making it an
the filter’s cutoff frequen-
ideal power source for low-noise oscillators.
cy, the reference noise is
negligible, and the low-
above IC1’s 0.16-Hz cutoff frequency. C1 attenuates high-frequency noise on dropout circuit’s output noise compris-
The filtered reference voltage drives the voltage reference’s output. The op es only the op amp’s noise multiplied by
the inverting terminal of error ampli- amp’s noise current, 0.5 fA/Hz, is the closed-loop gain. The feedback
fier IC2, a Maxim MAX4475, which negligible with respect to its voltage loop suppresses VN_FET, the MOSFET’s
regulates the output voltage by means noise, 4.5 nV/Hz. The reference- noise contribution, which therefore
of Q1, a P-channel power FET source noise source adds to the op-amp volt- can’t contribute to the output noise.
follower. Feedback resistors R2 and R3 age noise because they effectively con- For frequencies within the loop’s band-
determine the output voltage as fol- nect in series. The MOSFET’s noise width, the low-dropout circuit also
lows: R2R3[(VOUT/2.048V)1]. contribution appears at Q1’s input. rejects ripple and noise voltages that
The simplified noise-analysis diagram The noise at IC2’s inverting terminal the power supply introduces.
illustrates the components’ noise con- equals the noise at its noninverting ter- Figure 3 shows a plot of noise den-
tributions (Figure 2). Lowpass filter R1- minal: sity versus frequency for the circuit of
Figure 1, which exhibits a noise floor
MORE AT EDN.COM
of about 6 nV/Hz at 1 kHz. For com-
+ We now have a page exclusively parison, the plot shows the noise-meas-
devoted to Design Ideas on our Web urement instrument’s noise floor and a
site. Check it out at www.edn.com/ typical low-dropout circuit’s much
designideas. and higher noise density—for example, 500
nV/Hz at 1 kHz for the MAX8887
+ And to see our “Best of Design low-noise, low-dropout circuit.EDN
Ideas” in 10 categories, check out
www.edn.com/bestofdesignideas.

+ You can post a comment to any of 10,000

these Design Ideas by visiting their MAX8887
online versions and clicking on
1000
Feedback Loop.
IOUT=100 mA
VDD=3.4V, VOUT=3.3V
NOISE DENSITY FIGURE 1
100
VN_OPAMP (nV/Hz)
R1
IC1 _

IN_OPAMP IC2 Q1 10
+
C1 VN_FETs
VN_REF +

NOISE FLOOR
1
10 100 1000

FREQUENCY (Hz)

Figure 3 A noise-density-versus-frequency plot for the low-

dropout circuit in Figure 1 is 38 dB lower than that of a con-
Figure 2 This simplified version of Figure 1 highlights noise ventional low-noise, low-dropout-voltage regulator—in this
sources for analysis. case, a Maxim MAX8887.

86 EDN | JUNE 23, 2005