Beruflich Dokumente
Kultur Dokumente
• Any Complementary Drive Converters (Asymmetrical Half−Bridge, (Note: Microdot may be in either location)
VCC 1 VBOOT
IN_HI NC
IN_LO DRV_HI
GND NC
DRV_LO BRIDGE
10 Pin DFN Package
ORDERING INFORMATION
See detailed ordering and shipping information on page 16 of
this data sheet.
Vbulk +
C1
GND D4
Q1 T1 D1 L1 Out+
Vcc C3
U1 C4 +
GND C3
Vcc VBOOT
IN_HI DRV_HI Lf
NCP1395 Out−
IN_LO Bridge
D2
GND DRV_LO
C6
GND NCP5106 Q2
GND
GND R1
D3
GND U2
Figure 1. Typical Application Resonant Converter (LLC type)
Vbulk +
C1
C5
GND D4
Q1
Vcc C3 T1 D1 L1 Out+
U1 C4
GND +
Vcc VBOOT C3
MC34025 IN_HI DRV_HI
IN_LO Bridge Out−
GND DRV_LO D2
C6
GND NCP5106 Q2
GND
GND R1
D3
GND U2
Figure 2. Typical Application Half Bridge Converter
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2
NCP5106A, NCP5106B
BRIDGE
GND UV
GND DETECT
VCC
IN_LO DRV_LO
DELAY
GND
GND GND
GND
GND
BRIDGE
CROSS GND UV
GND CONDUCTION DETECT
VCC
PREVENTION
IN_LO DRV_LO
DELAY
GND
GND GND
PIN DESCRIPTION
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Pin Name Description
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
IN_HI Logic Input for High Side Driver Output in Phase
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
IN_LO Logic Input for Low Side Driver Output in Phase
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
GND Ground
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
DRV_LO Low Side Gate Drive Output
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
VCC Low Side and Main Power Supply
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
VBOOT
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
DRV_HI
Bootstrap Power Supply
High Side Gate Drive Output
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
BRIDGE
ÁÁÁÁÁÁÁ
NC
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Bootstrap Return or High Side Floating Supply Return
Removed for creepage distance (DFN package only)
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3
NCP5106A, NCP5106B
MAXIMUM RATINGS
Rating Symbol Value Unit
VCC Main power supply voltage −0.3 to 20 V
VCC_transient Main transient power supply voltage: 23 V
IVCC_max = 5 mA during 10 ms
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4
NCP5106A, NCP5106B
ELECTRICAL CHARACTERISTIC (VCC = Vboot = 15 V, VGND = Vbridge, −40°C < TJ < 125°C, Outputs loaded with 1 nF)
TJ −40°C to 125°C
INPUT SECTION
Low level input voltage threshold VIN − − 0.8 V
Input pull−down resistor (VIN < 0.5 V) RIN − 200 − kW
High level input voltage threshold VIN 2.3 − − V
Logic “1” input bias current @ VIN_XX = 5 V @ 25°C IIN+ − 5 25 mA
Logic “0” input bias current @ VIN_XX = 0 V @ 25°C IIN− − − 2.0 mA
SUPPLY SECTION
VCC UV Start−up voltage threshold VCC_stup 8.0 8.9 9.9 V
VCC UV Shut−down voltage threshold VCC_shtdwn 7.3 8.2 9.1 V
Hysteresis on VCC VCC_hyst 0.3 0.7 − V
Vboot Start−up voltage threshold reference to bridge pin Vboot_stup 8.0 8.9 9.9 V
(Vboot_stup = Vboot − Vbridge)
Vboot UV Shut−down voltage threshold Vboot_shtdwn 7.3 8.2 9.1 V
Hysteresis on Vboot Vboot_hyst 0.3 0.7 − V
Leakage current on high voltage pins to GND IHV_LEAK − 5 40 mA
(VBOOT = VBRIDGE = DRV_HI = 600 V)
Consumption in active mode (VCC = Vboot, fsw = 100 kHz and 1 nF load on both driv- ICC1 − 4 5 mA
er outputs)
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5
NCP5106A, NCP5106B
IN_HI
IN_LO
DRV_HI
DRV_LO
IN_HI
IN_LO
DRV_HI
DRV_LO
90% 90%
DRV_HI
(DRV_LO) 10% 10%
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6
NCP5106A, NCP5106B
IN_LO
&
50% 50%
IN_HI
ton_HI
toff_HI
Delta_t 90%
DRV_HI
10%
ton_LO
Delta_t
toff_LO 90%
DRV_LO
10% Matching Delay 1 = ton_HI − ton_LO
Matching Delay 2 = toff_LO − toff_HI
toff_HI
ton_HI
90%
DRV_HI
10%
Matching Delay1=ton_HI−ton_LO
Matching Delay2=toff_HI−toff_LO
IN_LO 50% 50%
toff_LO ton_LO
90%
DRV_LO
10%
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7
NCP5106A, NCP5106B
IN_HI
IN_LO
DRV_HI
DRV_LO
Figure 10. Input/Output Cross Conduction Output Protection Timing Diagram (B Version)
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8
NCP5106A, NCP5106B
CHARACTERIZATION CURVES
140 140
TON, PROPAGATION DELAY (ns)
80 80
60 60
TON High Side
40 TON Low Side 40
20 20
0 0
10 12 14 16 18 20 −40 −20 0 20 40 60 80 100 120
VCC, VOLTAGE (V) TEMPERATURE (°C)
Figure 11. Turn ON Propagation Delay vs. Figure 12. Turn ON Propagation Delay vs.
Supply Voltage (VCC = VBOOT) Temperature
140 140
TOFF, PROPAGATION DELAY (ns)
60 60
TOFF High Side
40 40
20 20
0 0
10 12 14 16 18 20 −40 −20 0 20 40 60 80 100 120
VCC, VOLTAGE (V) TEMPERATURE (°C)
Figure 13. Turn OFF Propagation Delay vs. Figure 14. Turn OFF Propagation Delay vs.
Supply Voltage (VCC = VBOOT) Temperature
140 160
TOFF PROPAGATION DELAY (ns)
TON, PROPAGATION DELAY (ns)
120 140
120
100
100
80
80
60
60
40
40
20 20
0 0
0 10 20 30 40 50 0 10 20 30 40 50
BRIDGE PIN VOLTAGE (V) BRIDGE PIN VOLTAGE (V)
Figure 15. High Side Turn ON Propagation Figure 16. High Side Turn OFF Propagation
Delay vs. VBRIDGE Voltage Delay vs. VBRIDGE Voltage
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9
NCP5106A, NCP5106B
CHARACTERIZATION CURVES
160 140
140 120
TON, RISETIME (ns)
120
100
0 0
10 12 14 16 18 20 −40 −20 0 20 40 60 80 100 120
VCC, VOLTAGE (V) TEMPERATURE (°C)
Figure 17. Turn ON Risetime vs. Supply Figure 18. Turn ON Risetime vs. Temperature
Voltage (VCC = VBOOT)
80 70
70 60
60
TOFF, FALLTIME (ns)
50
tf Low Side tf High Side
50
40
40
30
30
20
20
tf High Side
tf Low Side
10 10
0 0
10 12 14 16 18 20 −40 −20 0 20 40 60 80 100 120
VCC, VOLTAGE (V) TEMPERATURE (°C)
Figure 19. Turn OFF Falltime vs. Supply Figure 20. Turn OFF Falltime vs. Temperature
Voltage (VCC = VBOOT)
20 200
PROPAGATION DELAY MATCHING (ns)
180
160
15
140
DEAD TIME (ns)
120
10 100
80
60
5
40
20
0 0
−40 −20 0 20 40 60 80 100 120 −40 −20 0 20 40 60 80 100 120
TEMPERATURE (°C) TEMPERATURE (°C)
Figure 21. Propagation Delay Matching Figure 22. Dead Time vs. Temperature
Between High Side and Low Side Driver vs.
Temperature
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10
NCP5106A, NCP5106B
CHARACTERIZATION CURVES
1.4 1.4
LOW LEVEL INPUT VOLTAGE THRESHOLD (V)
1.2 1.2
THRESHOLD (V)
0.8 0.8
0.6 0.6
0.4 0.4
0.2 0.2
0 0.0
10 12 14 16 18 20 −40 −20 0 20 40 60 80 100 120
VCC, VOLTAGE (V) TEMPERATURE (°C)
Figure 23. Low Level Input Voltage Threshold Figure 24. Low Level Input Voltage Threshold
vs. Supply Voltage (VCC = VBOOT) vs. Temperature
2.5 2.5
HIGH LEVEL INPUT VOLTAGE
HIGH LEVEL INPUT VOLTAGE
2 2.0
THRESHOLD (V)
THRESHOLD (V)
1.5 1.5
1 1.0
0.5 0.5
0 0.0
10 12 14 16 18 20 −40 −20 0 20 40 60 80 100 120
VCC, VOLTAGE (V) TEMPERATURE (°C)
Figure 25. High Level Input Voltage Threshold Figure 26. High Level Input Voltage Threshold
vs. Supply Voltage (VCC = VBOOT) vs. Temperature
4 6
5.5
LOGIC “0” INPUT CURRENT (mA)
3.5
5
3 4.5
4
2.5
3.5
2 3
2.5
1.5
2
1 1.5
1
0.5
0.5
0 0
10 12 14 16 18 20 −40 −20 0 20 40 60 80 100 120
VCC, VOLTAGE (V) TEMPERATURE (°C)
Figure 27. Logic “0” Input Current vs. Supply Figure 28. Logic “0” Input Current vs.
Voltage (VCC = VBOOT) Temperature
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11
NCP5106A, NCP5106B
CHARACTERIZATION CURVES
8 10
LOGIC “1” INPUT CURRENT (mA)
5
6
4
3 4
2
2
1
0 0
10 12 14 16 18 20 −40 −20 0 20 40 60 80 100 120
VCC, VOLTAGE (V) TEMPERATURE (°C)
Figure 29. Logic “1” Input Current vs. Supply Figure 30. Logic “1” Input Current vs.
Voltage (VCC = VBOOT) Temperature
1 1.0
LOW LEVEL OUTPUT VOLTAGE (V)
LOW LEVEL OUTPUT VOLTAGE
0.8 0.8
THRESHOLD (V)
0.6 0.6
0.4 0.4
0.2 0.2
0 0.0
10 12 14 16 18 20 −40 −20 0 20 40 60 80 100 120
VCC, VOLTAGE (V) TEMPERATURE (°C)
Figure 31. Low Level Output Voltage vs. Figure 32. Low Level Output Voltage vs.
Supply Voltage (VCC = VBOOT) Temperature
1.6 1.6
HIGH LEVEL OUTPUT VOLTAGE (V)
HIGH LEVEL OUTPUT VOLTAGE
1.2 1.2
THRESHOLD (V)
0.8 0.8
0.4 0.4
0 0.0
10 12 14 16 18 20 −40 −20 0 20 40 60 80 100 120
VCC, VOLTAGE (V) TEMPERATURE (°C)
Figure 33. High Level Output Voltage vs. Figure 34. High Level Output Voltage vs.
Supply Voltage (VCC = VBOOT) Temperature
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12
NCP5106A, NCP5106B
CHARACTERIZATION CURVES
400 400
OUTPUT SOURCE CURRENT (mA)
250 250
100 100
50 50
0 0
10 12 14 16 18 20 −40 −20 0 20 40 60 80 100 120
VCC, VOLTAGE (V) TEMPERATURE (°C)
Figure 35. Output Source Current vs. Supply Figure 36. Output Source Current vs.
Voltage (VCC = VBOOT) Temperature
600 600
Isink High Side Isink High Side
OUTPUT SINK CURRENT (mA)
500 500
400 400
Isink Low Side
300 300
Isink Low Side
200 200
100 100
0 0
10 12 14 16 18 20 −40 −20 0 20 40 60 80 100 120
VCC, VOLTAGE (V) TEMPERATURE (°C)
Figure 37. Output Sink Current vs. Supply Figure 38. Output Sink Current vs.
Voltage (VCC = VBOOT) Temperature
0.2 20
HIGH SIDE LEAKAGE CURRENT ON
0.16
HV PINS TO GND (mA)
15
0.12
10
0.08
5
0.04
0 0
0 100 200 300 400 500 600 −40 −20 0 20 40 60 80 100 120
HV PINS VOLTAGE (V) TEMPERATURE (°C)
Figure 39. Leakage Current on High Voltage Figure 40. Leakage Current on High Voltage
Pins (600 V) to Ground vs. VBRIDGE Voltage Pins (600 V) to Ground vs. Temperature
(VBRIGDE = VBOOT = VDRV_HI) (VBRIDGE = VBOOT = VDRv_HI = 600 V)
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13
NCP5106A, NCP5106B
CHARACTERIZATION CURVES
100 100
80 80
60 60
40 40
20 20
0 0
0 4 8 12 16 20 −40 −20 0 20 40 60 80 100 120
VBOOT, VOLTAGE (V) TEMPERATURE (°C)
Figure 41. VBOOT Supply Current vs. Bootstrap Figure 42. VBOOT Supply Current vs.
Supply Voltage Temperature
240 400
VCC SUPPLY CURRENT (mA)
200
VCC CURRENT SUPPLY (mA)
300
160
120 200
80
100
40
0 0
0 4 8 12 16 20 −40 −20 0 20 40 60 80 100 120
VCC, VOLTAGE (V) TEMPERATURE (°C)
Figure 43. VCC Supply Current vs. VCC Supply Figure 44. VCC Supply Current vs. Temperature
Voltage
10.0 9.0
9.8 VCC UVLO Shutdown
8.8
UVLO STARTUP VOLTAGE (V)
9.6 8.6
VCC UVLO Startup
9.4 8.4
9.2 8.2
9.0 8.0
8.8 7.8 VBOOT UVLO Shutdown
8.6 7.6
VBOOT UVLO Startup
8.4 7.4
8.2 7.2
8.0 7.0
−40 −20 0 20 40 60 80 100 120 −40 −20 0 20 40 60 80 100 120
TEMPERATURE (°C) TEMPERATURE (°C)
Figure 45. UVLO Startup Voltage vs. Figure 46. UVLO Shutdown Voltage vs.
Temperature Temperature
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14
NCP5106A, NCP5106B
CHARACTERIZATION CURVES
25 40
ICC+ IBOOT CURRENT SUPPLY (mA)
25
15 RGATE = 10 R
20
10 RGATE = 22 R
15
10
5
RGATE = 0 R to 22 R 5
0 0
0 100 200 300 400 500 600 0 100 200 300 400 500 600
SWITCHING FREQUENCY (kHz) SWITCHING FREQUENCY (kHz)
Figure 47. ICC1 Consumption vs. Switching Figure 48. ICC1 Consumption vs. Switching
Frequency with 15 nC Load on Each Driver @ Frequency with 33 nC Load on Each Driver @
VCC = 15 V VCC = 15 V
70 120
ICC+ IBOOT CURRENT SUPPLY (mA)
50
80
40
RGATE = 10 R RGATE = 10 R
60
30
RGATE = 22 R 40
20 RGATE = 22 R
10 20
0 0
0 100 200 300 400 500 600 0 100 200 300 400 500 600
SWITCHING FREQUENCY (kHz) SWITCHING FREQUENCY (kHz)
Figure 49. ICC1 Consumption vs. Switching Figure 50. ICC1 Consumption vs. Switching
Frequency with 50 nC Load on Each Driver @ Frequency with 100 nC Load on Each Driver @
VCC = 15 V VCC = 15 V
0 0
NEGATIVE PULSE VOLTAGE (V)
−5 −40°C −5 −40°C
−10 −10
25°C
25°C
−15 −15
−30 −30
−35 −35
0 100 200 300 400 500 600 0 100 200 300 400 500 600
NEGATIVE PULSE DURATION (ns) NEGATIVE PULSE DURATION (ns)
Figure 51. NCP5106A, Negative Voltage Safe Figure 52. NCP5106B, Negative Voltage Safe
Operating Area on the Bridge Pin Operating Area on the Bridge Pin
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15
NCP5106A, NCP5106B
APPLICATION INFORMATION
Negative Voltage Safe Operating Area Summary:
When the driver is used in a half bridge configuration, it • If the negative pulse characteristic (negative voltage
is possible to see negative voltage appearing on the bridge level & pulse width) is above the curves the driver
pin (pin 6) during the power MOSFETs transitions. When runs in safe operating area.
the high−side MOSFET is switched off, the body diode of • If the negative pulse characteristic (negative voltage
the low−side MOSFET starts to conduct. The negative
level & pulse width) is below one or all curves the
voltage applied to the bridge pin thus corresponds to the
driver will NOT run in safe operating area.
forward voltage of the body diode. However, as pcb copper
Note, each curve of the Figure 51 (or 52) represents the
tracks and wire bonding introduce stray elements
negative voltage and width level where the driver starts to
(inductance and capacitor), the maximum negative voltage
fail at the corresponding die temperature.
of the bridge pin will combine the forward voltage and the
If in the application the bridge pin is too close of the safe
oscillations created by the parasitic elements. As any
operating limit, it is possible to limit the negative voltage
CMOS device, the deep negative voltage of a selected pin
to the bridge pin by inserting one resistor and one diode as
can inject carriers into the substrate, leading to an erratic
follows:
behavior of the concerned component. ON Semiconductor
provides characterization data of its half−bridge driver to Vcc D2
show the maximum negative voltage the driver can safely Vbulk
operate with. To prevent the negative injection, it is the MUR160
U1 C1
designer duty to verify that the amount of negative voltage NCP5106A 100n M1
1 8
pertinent to his/her application does not exceed the VCC VBOOT
characterization curve we provide, including some safety IN_Hi
2 7
IN_HI DRV_HI R1
margin. 3 6
In order to estimate the maximum negative voltage IN_LO IN_LO BRIDGE
4 5 10R
accepted by the driver, this parameter has been 0 GND DRV_LO
M2
characterized over full the temperature range of the
component. A test fixture has been developed in which we
D1
purposely negatively bias the bridge pin during the MUR160
freewheel period of a buck converter. When the upper gate
voltage shows signs of an erratic behavior, we consider the 0
limit has been reached. Figure 53. R1 and D1 Improves the Robustness of the
Figure 51 (or 52), illustrates the negative voltage safe Driver
operating area. Its interpretation is as follows: assume a
negative 10 V pulse featuring a 100 ns width is applied on R1 and D1 should be placed as close as possible of the
the bridge pin, the driver will work correctly over the whole driver. D1 should be connected directly between the bridge
die temperature range. Should the pulse swing to −20 V, pin (pin 6) and the ground pin (pin 4). By this way the
keeping the same width of 100 ns, the driver will not work negative voltage applied to the bridge pin will be limited
properly or will be damaged for temperatures below by D1 and R1 and will prevent any wrong behavior.
125°C.
ORDERING INFORMATION
Device Package Shipping†
NCP5106APG PDIP−8 (Pb−Free) 50 Units / Rail
NCP5106ADR2G SOIC−8 (Pb−Free) 2500 / Tape & Reel
NCP5106BPG PDIP−8 (Pb−Free) 50 Units / Rail
NCP5106BDR2G SOIC−8 (Pb−Free) 2500 / Tape & Reel
NCP5106AMNTWG DFN10 (Pb−Free) 4000 / Tape & Reel
NCP5106BMNTWG DFN10 (Pb−Free) 4000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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16
NCP5106A, NCP5106B
PACKAGE DIMENSIONS
8 LEAD PDIP
CASE 626−05
ISSUE N
NOTES:
D A 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
E 2. CONTROLLING DIMENSION: INCHES.
H 3. DIMENSIONS A, A1 AND L ARE MEASURED WITH THE PACK-
AGE SEATED IN JEDEC SEATING PLANE GAUGE GS−3.
8 5
4. DIMENSIONS D, D1 AND E1 DO NOT INCLUDE MOLD FLASH
OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS ARE NOT
E1 TO EXCEED 0.10 INCH.
5. DIMENSION E IS MEASURED AT A POINT 0.015 BELOW DATUM
1 4 PLANE H WITH THE LEADS CONSTRAINED PERPENDICULAR
TO DATUM C.
6. DIMENSION E3 IS MEASURED AT THE LEAD TIPS WITH THE
NOTE 8 LEADS UNCONSTRAINED.
c 7. DATUM PLANE H IS COINCIDENT WITH THE BOTTOM OF THE
b2 B END VIEW LEADS, WHERE THE LEADS EXIT THE BODY.
TOP VIEW WITH LEADS CONSTRAINED 8. PACKAGE CONTOUR IS OPTIONAL (ROUNDED OR SQUARE
CORNERS).
NOTE 5
INCHES MILLIMETERS
A2 DIM MIN MAX MIN MAX
e/2 A −−−− 0.210 −−− 5.33
A NOTE 3 A1 0.015 −−−− 0.38 −−−
A2 0.115 0.195 2.92 4.95
L b 0.014 0.022 0.35 0.56
b2 0.060 TYP 1.52 TYP
C 0.008 0.014 0.20 0.36
D 0.355 0.400 9.02 10.16
SEATING
PLANE D1 0.005 −−−− 0.13 −−−
A1 E 0.300 0.325 7.62 8.26
C M E1 0.240 0.280 6.10 7.11
D1 e 0.100 BSC 2.54 BSC
eB −−−− 0.430 −−− 10.92
e eB L 0.115 0.150 2.92 3.81
8X b END VIEW M −−−− 10 ° −−− 10 °
0.010 M C A M B M NOTE 6
SIDE VIEW
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17
NCP5106A, NCP5106B
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
NOTES:
−X−
ISSUE AK 1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
A 2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
8 5 PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
B S 0.25 (0.010) M Y M PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
1 IN EXCESS OF THE D DIMENSION AT
4 MAXIMUM MATERIAL CONDITION.
−Y− K 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
MILLIMETERS INCHES
G
DIM MIN MAX MIN MAX
A 4.80 5.00 0.189 0.197
C N X 45 _ B 3.80 4.00 0.150 0.157
SEATING C 1.35 1.75 0.053 0.069
PLANE D 0.33 0.51 0.013 0.020
−Z− G 1.27 BSC 0.050 BSC
H 0.10 0.25 0.004 0.010
0.10 (0.004) J 0.19 0.25 0.007 0.010
H M J K 0.40 1.27 0.016 0.050
D
M 0 _ 8 _ 0 _ 8 _
N 0.25 0.50 0.010 0.020
S 5.80 6.20 0.228 0.244
0.25 (0.010) M Z Y S X S
SOLDERING FOOTPRINT*
1.52
0.060
7.0 4.0
0.275 0.155
0.6 1.270
0.024 0.050
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18
NCP5106A, NCP5106B
PACKAGE DIMENSIONS
D A B NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
L L 2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS
MEASURED BETWEEN 0.25 AND 0.30 MM FROM THE
ÇÇÇÇ
L1 TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED PAD AS
ALTERNATE A−1 ALTERNATE A−2
ÇÇÇÇ
WELL AS THE TERMINALS.
PIN ONE E DETAIL A 5. FOR DEVICE OPN CONTAINING W OPTION, DETAIL A
REFERENCE ALTERNATE TERMINAL ALTERNATE CONSTRUCTION A−2 AND DETAIL B AL-
ÇÇÇÇ
CONSTRUCTIONS TERNATE CONSTRUCTION B−2 ARE NOT APPLICABLE.
ÇÇÇÇ ÉÉ ÉÉÉ
MILLIMETERS
2X DIM MIN MAX
A3
A 0.80 1.00
ÉÉ
ÇÇ ÉÉÉ
ÇÇÇ
0.10 C A1 EXPOSED Cu MOLD CMPD
A1 0.00 0.05
A3 0.20 REF
2X 0.10 C b 0.25 0.35
TOP VIEW D 4.00 BSC
D2 2.90 3.10
0.10 C DETAIL B A ALTERNATE B−1 ALTERNATE B−2 E 4.00 BSC
E2 1.85 2.05
DETAIL B E3 0.375 BSC
ALTERNATE e 0.80 BSC
10X CONSTRUCTIONS K 0.90 −−−
0.08 C L 0.35 0.45
A3 SEATING L1 0.00 0.15
NOTE 4 SIDE VIEW A1 C PLANE
0.10 C A B
DETAIL A
D2 10X L RECOMMENDED
1 5 MOUNTING FOOTPRINT
10X
0.10 C A B 3.20 0.60
PACKAGE
OUTLINE
E3
E2
4.30
0.75 2.15
K 10 6
10X b 1
e
10X
0.10 C A B 0.80 0.42
0.05 C NOTE 3 PITCH
BOTTOM VIEW DIMENSIONS: MILLIMETERS
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