Beruflich Dokumente
Kultur Dokumente
CR-5000, System Designer, Board Designer, PWS, Package Synthesizer and Lightning are
trademarks or registered trademarks of Zuken, Inc.
The other company names and product names are trademarks or registered trademarks of each
company.
2. Printing..........................................................................................................................5-4
z Printing (Hardcopy Image)............................................................................................................. 5-4
z Printing (Data Image)................................................................................................................... 5-16
* Drawing by Command Input (Batch) ......................................................................................... 5-34
Preface Welcome to the World of
PCB Design
The Master Training <PCB Design> is designed to enable you to perform a variety of
settings and operations required for the advanced operator based on basic knowledge
and operation learned in the CR-5000 Beginner's Training <PCB Design> Course.
Beginner’s Training
<PCB Design>
Master Training
<Engineering
Change/Operation>
Operation and knowledge related to
engineering design change/operation
Users engaged only in library design and management should study up through
Library but we also recommend reading Board Design. Users only engaged in board
design are expected to mainly study Board Design but are recommended to previously
read and try out Library.
Preface Preface - 1
1. Overview of the Lesson
In the Master Training <PCB Design> course, you will learn the knowledge and
functions necessary for PCB design based on the operations you have learned in the
CR-5000 Beginner's Training <PCB Design> Course.
Net Rule
ruleA ruleB
RUL PCB
PC board Design
Net Rule database rule
database
2. Printing
This section explains steps to output PC
board data to the printer or the plotter.
Place components
Wiring
Check
Introduced by this textbook.
Paneling
CAM output
Reference Refer to “Master Training <CAM>.”
Component Library
Register shapes, attributes, names, and other information about components to be
used.
Reference For details on the component library, refer to “Master Training <Component Library>”.
Technology Library
Register PC board layer structure, layer attributes, and other information.
Reference For details on the technology library, refer to “Master Training <PCB Design Library>”.
Reference For details on the design rule library, refer to “Master Training <PCB Design Library>”.
z Component Library
The component library has registered information on components used at PC board
design. Component attribute information is stored in the part library (PRT), package
information is stored in the package library (PKG), and component shape information
is stored in the footprint library (FTP). These three files are generically called CDB.
You need to register all component information required for various PC board designs
in the CDB. When you generate a PC board, only component information required for
the PC board is copied from the CDB containing all component information to the PC
board database (PCB) and design rule database (RUL).
Package type
1:1A 1 A
:DIP
2:1B 1 B
Component
3:1Y 1 Y
shapes to be used
4:2A 2 A
:DIP14-A
:
:DIP14-B
:
Only necessary
components are copied
from the CDB libraries to
generate a PC board.
PCB RUL
Reference For details on the component library, refer to “Master Training <Component Library>.”
z Technology Library
When designing a PC board, you will input various objects (such as conductive
patterns, symbol marks and resist) to “layers.”
The technology library (TCH) defines all layers necessary in designing a PC board.
Conductive Layer 1
Conductive Layer 2
Side A symbol
mark layer
Side B symbol
mark layer
In CR-5000, layers for components that register component data (“footprint layers”)
are defined in the CDB footprint library and layers necessary at PC board design
(“PCB layers”) are defined in the technology library.
Layer Mapping Therefore, to use components on the PC board, you must correlate individually defined
footprint layers and PCB layers, and the technology library will correlate those
footprint layers and PCB layers.
2-layered board
Footprint layer
Conductive Layer 1
Conductive Layer 1
Conductive Layer 2
Conductive Layer 3
Conductive Layer 4
Correspondence between footprint layers and PCB layers is called “layer mapping.”
According to the layer mapping, the same footprint can support correspondence
between 2-layered or 4-layered boards and all PCB layers, as seen in the diagram
above.
The layers required to design a PC board (PCB layers) vary depending on the number
of layers and/or board specifications. In the technology library, register all layer
definitions that are considered necessary in one file.
TCH
6-layered board
4-layered board (2)
When you generate a PC board, from the technology library containing multiple
technologies, only copy technology suitable for the board specifications to the PC board
database (PCB).
TCH
Reference For details on the technology library, refer to “Master Training <PCB Design Library>.”
Example
- Various clearance values
- Pattern width
- Via used during wiring
- Grid
When generating a new PC board, specify the design rules that best match the board
specifications. In this manner, general design rules are copied and a design rule
database (RUL) is generated.
The detailed specifications for each PC board (Example: pattern width for each net
name) are defined in the design rule database using other tools.
Reference Defining design rules specific to each PC board is explained in [3. Starting the Design Rule Editor] on page 3-15.
Reference For details on the design rule library, refer to “Master Training <PCB Design Library>.”
The design rule library consists of several files, each containing different
design rules depending on the number of PC board layers or set values.
MRDB
When you generate a panel database, only necessary information from the
manufacturing rule library is copied to the panel database (PNL) and manufacturing
rule database (MRL).
CDB
PNL MRL
MRDB
[Photo data]
The “PCB library list file (library.rsc)” defines the paths for files referenced as
libraries.
Example
Part{
"C:\\home\\master\\cdb\\cdb2.prt" Part library filename
}
Package{
"C:\\home\\master\\cdb\\cdb2.pkg" Package library filename
}
Footprint{
"C:\\home\\master\\cdb\\cdb2.ftp" Footprint library filename
}
Searcher{
"C:\\home\\master\\cdb\\searcher" Search data generation directory
} path name
Technology{
"C:\\home\\master\\tch\\lay.tch" Technology library filename
}
DesignRule{
"C:\\home\\master\\rule.rul" Design rule library directory name
}
ManufactureRule{
"C:\\home\\master\\mrdb\\pro.mrdb" Manufacturing rule library filename
}
PanelTemplate{
"C:\\home\\master\\pnl\\template" Panel template generation directory path
} name
The above format example is library.rsc in the Windows version. For details on the
UNIX format for the UNIX version, refer to $ZUEROOT/info/library.rsc in the UNIX version.
! Caution You can set only one library filename to one type of library. If you enter multiple filenames, names other than the
first filename are ignored.
Example
! Caution The %CR5_PROJECT_ROOT% environment variable is not automatically set at installation. You have to set this
for each client to use.
The PCB Design Library List File Editor can be used for all types of library.rsc: master
resource files (program environment), project resource files (project environment), and
local resource files (user environment).
Lesson Edit the prepared library.rsc for the user's environment according to your environment.
1. From the Start menu, click Programs Æ CR-5000 Board Designer 10.0 Æ Utilities Æ
PCB Design Library List File Editor to start the editor.
UNIX 1. Click Utilities Æ PCB library list file Editor in CR-5000 Root Menu to start the editor.
Click
library.rsc=library.rsc
=%HOME%\cr5000\ue\library.rsc for
the user environment is opened.
4. Change the part library path. Reverse the part library path by clicking it.
Click
Click
Click Change....
Click
Click
%ZUEROOT%\info\parameter.rsc
This is a resource file referred to at PC board generation. This file defines units stored on
the PC board database (PCB) and defaults for each table.
These resource files are referenced when the CAD File Manager starts, and define tools and
commands which are started from the CAD File Manager.
%HOME%\cr5000\sys\.bfminit
This is a resource file containing the initial settings for CAD File Manager. It is automatically
updated when CAD File Manager is terminated.
Reference The file priority and handling of the environment variable is the same as that for library.rsc.
For management, refer to “Managing the PCB Library List File” on page 2-10.
Reference CR-5000 refers to many resource files other than those related to PCB design. CR-5000 refers to many resource
files other than those related to PCB design. For a list of the resource files not referred to here, refer to [Resource
Files] in the Online Help.
Board Designer is equipped with the PC board design tools listed above.
z Board Generation Tool System Designer Board Designer
Generates PC board data based on the net list
and a design rule list extracted from the
NDF RUF PCB RUL
schematic (System Designer).
z Floor Planner
Examines component placement.
z Placement/Wiring Tool
Places components and performs wiring
accurately.
z Artwork Tool
Inputs and edits manufacturing data (such as IC1 R1
UNIX
1. Click (Layout Design System) in the CR-5000 root menu.
The CAD File Manager, which is the Board Designer/System Designer root menu, is
started.
Double-Click
Click
Click
Net Rule
ruleA ruleB
RUL PCB
Example
* Resource files
%ZUEROOT%\info\board.rsc
%CR5_PROJECT_ROOT%\zue\info\board.rsc
%HOME%\cr5000\ue\board.rsc
%ZUEROOT%\info\parameter.rsc
This is the file where you define command parameters and table initial values
for Board Designer and Board Producer. Information set in this file is saved
onto the PC board database.
Menu bar
Set Æ Library
Confirm the reference library name. The library names
in the following resource files are displayed:
1. %HOME%\cr5000\ue\library.rsc
2. %CR5_PROJECT_ROOT%\zue\info\library.rsc
3. %ZUEROOT%\info\library.rsc
Menu bar
Set Æ Net List Type Four nets are to be loaded:
• CR-5000 schematic (NDF/RUF extracted from schematic)
• CR-5000 net list (existing NDF/RUF)
• PWS/CCF net list
• PWS/ECF net list
Reference For details on CCF and ECF, refer to the online documentation.
Menu bar
Confirm Æ If the message area displays the message “An
Confirm Error error has occurred” or “Warning has been issued,”
confirm the contents.
Menu bar After executing the tool, you can confirm process
Confirm Æ results.
Confirm Process
Menu bar
Check whether related files exist at tool
Confirm Æ
Confirm Data
execution.
Check for setting errors in the design rule database (RUL) generated by
Steps 1 - 5 above.
8. Generate parameter DB
Load attributes such as layer colors from the resource files.
Click
Click
Click Click OK .
Click
Click Execute .
Click OK .
Click
Component ID (reference)
Part name
Stock code (*)
Package name
Footprint specification name (*) *: Changeable if the CDB contains multiple definitions.
Footprint name (*) (Double-clicking within the frame displays the list
dialog box.)
Side B footprint name (*)
Placement side
Placement angle
Click
When the editor is ended, processing automatically proceeds to the next operation.
Use the tool for component assignment to set the components used for the PC board.
You can specify three types of components:
• Components: Assign components defined in the net list.
• Decoupling capacitors: Define decoupling capacitors to be generated automatically
during PC board design.
• Jumpers: Define jumpers to be generated during PC board design.
The net list contains “Part name” and “Reference designator” for the components used
on the PC board.
As shown above, when the part name associated with the reference designator is
determined, the package and footprint names are naturally determined.
However, remember that one part may contain multiple stock codes or one package
may have multiple footprint specification names or multiple footprint names. So,
these names are not always decisive. For some boards, you may have to specify
names other than the defaults.
For component assignment, the default names are determined by the reference
designators and part names in the net list. Change them as needed.
This tool also allows you to set information other than CDB, such as the placement
side and angle.
Click OK.
Click
Click
Click Close.
! Caution In the lesson, the component area automatically generated is used as it is.
(If you do not want to use the automatically generated shape, delete the PC board and design rule databases,
re-edit the footprint library and re-execute Board Generation Tool.)
Click
Click
The data in the design rule library specified at execution of Board Generation Tool
are copied to the design rule database. Design Rule Editor allows you to modify these
contents or set design rules particular to a certain net.
[layer6]
PC Board A PC Board B
[layer6] [layer6]
General
design
rule
You may execute this tool any time after generating the design rule database.
* Resource files
%ZUEROOT%\info\library.rsc
%CR5_PROJECT_ROOT%\zue\info\library.rsc
%HOME%\cr5000\ue\info\library.rsc
Part {
“C:\\home\\lesson2\\cdb\\cdb2.prt”
} Defines the names of files or directories
Package { where the libraries used are registered.
“C:\\home\\lesson2\\cdb\\cdb2.pkg” Design Rule Editor refers to the following
} libraries.
Footprint {
“C:\\home\\lesson2\\cdb\\cdb2.ftp”
}
Technology { • Part library file name
“C:\\home\\lesson2\\tch\\lay.tch” • Package library file name
} • Footprint library file name
DesignRule { • Technology library file name
“C:\\home\\lesson2\\rule.rul”
• Directory name storing the design rule library
}
:
You can also check these files from Design Rule Editor.
Click
We will discuss difference between Design Rule Editor and Design Rule Library Edit
Tool on the following pages.
Reference For the same items, refer to “Master Training <PCB Design Library>.”
Reference The individual rules will not be described here. For details on the rules that can be defined for each object, refer
to the online help.
Via/Area Spec
[Qualified Padstack]
You can specify signal names and preferred padstacks for particular From-To pairs of inner layer vias.
Padstack Padstack
(VIA0.8-1.4) (VIA0.7-1.3)
Net Objects
You can set rules for each of the
following objects:
Default Settings
- Net Object
- Net group group
- Net group
- Net class
- Net
- Pin Object
- Pinpair group group
- Pinpair group
- Pinpair
Net
Net Group
Reference For details on how to add or delete net groups and their nets, refer to “Adding Groups and Group Groups, and
Adding and Deleting Members” on page 3-24.
Reference For details on how to add or delete net group groups and their nets, refer to “Adding Groups and Group Groups,
and Adding and Deleting Members” on page 3-24.
For net group groups, a design rule stack can be defined. This sets the clearance
between nets from net groups in the same group.
Net Class
Reference For details on the operations for adding or deleting net classes, or adding or deleting nets that belong to them,
refer to page 3 -24, “Adding Groups and Group Groups, and Adding and Deleting Members.”
The rules that can be defined for net classes are the same as for nets.
Pinpair
Define pinpairs.
Reference For details on how to add or delete pinpairs and their nets, refer to “Adding Groups and Group Groups, and
Adding and Deleting Members” on page 3-24.
Pinpair Group
Reference For details on how to add or delete pinpair groups and their nets, refer to “Adding Groups and Group Groups,
and Adding and Deleting Members” on page 3-24.
Reference For details on how to add or delete pinpair group groups and their nets, refer to “Adding Groups and Group
Groups, and Adding and Deleting Members “ on page 3-24.
*Adding Groups and Group Groups, and Adding and Deleting Members
To add groups and group groups, and add and delete members, do the following:
To add groups and group groups Select the desired object, and then
click Append from the assist
menu.
Click
In the dialog box displayed, enter
the group name or group group
Click
name and click OK.
Click
Select the desired net.
Comp. Objects
Note You can only customize the above dialogs and control edit permissions in Design
Rule Editor.
Click
Click
Lesson In this lesson, you will add signal rules to board-specific design rules.
1. Click Register Qualified padstack on the Via/Area Spec tab.
Click
2. Click the list icon for padstack names. In the list dialog box displayed, select
“VIA0.7-1.3” and click OK.
Click
Click
Click
3. Select the net names VCC and GND and click Add>>.
Click
Hold Click
Release
Click
5. Click Net Objects to display the dialog box for editing net objects. Select Net and
check Power/Ground net for filtering.
Click
6. Select the GND Design Rule Stack cell and click the action button. In the Design Rule
Stack dialog box, select all0.3 and click OK.
Click
Click
Click
8. Set the max total length and min total length for SIGN2 as follows.
9. From the menu bar, click File Æ Exit and save the settings.
Click
Click
10. Select the Wiring Clearance tab and change the settings as follows:
Clearance Priority : ON
Shield Gap Priority : Shield Gap
Click
Click
*Application Rule
This section explains the "application rule" set in Design Rule Library Editor and
Design Rule Editor.
The application rule is not board specifications, such as wire length and grid
settings, registered in the design rule library (RUL), but settings to control
clearance values to be used when you execute the Area DRC command or generate
shield patterns using Board Designer.
Reference For details on clearance settings, refer to “Appendix 1 List of Design Rule Unit Settings” in “Master Training
<PCB Design Library>”.
Clearance Priority
There are several places where you can specify the clearance value, and here you
can control the priority for referencing clearance values.
When unchecked:
The largest clearance value is used.
When checked:
Clearance values are used in the following order:
High
Net group group
Net group
(Priority)
Net
Board
Low
The Largest:
The largest of clearance and shield gap values is used.
Shield Gap:
The shield gap value is used.
Clearance:
The clearance value used by the net is used.
11. From the menu bar, click File Æ Exit Tool to exit the tool.
Click
Click
Click
There are two types of design rules: some design rules are stored only in the design
rule database (RUL), and others are stored both in the design rule database (RUL)
and the PC board database (PCB).
The following four items are stored in both of these databases:
• Wiring Spec - Net Name of Power Plane
• Via/Area Spec - Default Padstack
• Via/Area Spec - Qualified Padstack
• Via/Area Spec - Available Padstack
If any of these four items has been changed after the PC board database is created,
a message is displayed and the changes are automatically applied to the PC board
database before the tool is exited.
Click
Click
In this lesson, you will learn operations up to component placement using the PC
board “explc/[Board].” During the lesson, learn the functions of each command
reading the descriptions given here.(An explanation of the functions of each command
is provided. Confirm each command’s functions while proceeding with the lesson.)
- PC board shape
- Layout area
- Keep-out areas (placement, wiring, via)
- Height limit area
- Mounting hole
- Resist for mounting hole
- Various dimension lines
Note When using PC Board Shape Edit Tool to input objects, input them to the associated
layers.
For that purpose, be sure to confirm that the input layer is the active layer before
inputting objects.
Reference PC Board Shape Edit Tool operations are almost the same as those for Artwork Tool.
This section explains the commands particular to PC Board Shape Edit Tool. For details on operations, refer to
“Artwork Command Reference”.
PC Board Shape Edit Tool, Floor Planner, Placement/Wiring Tool, Artwork Tool and
Panel Design Tool refer to the following resource files:
%ZUEROOT%\info\board.rsc
%CR5_PROJECT_ROOT%\zue\info\board.rsc
%HOME%\cr5000\ue\board.rsc (Top priority)
They set the environment for Board Designer and Board Producer.
PC Board Shape Edit Tool refers to
the following items:
%ZUEROOT%\info\parameter.rsc
This file defines command parameters and initial values for tables in Board
Designer and Board Producer. The set information is stored in the PC board
database.
Loading a 1. Open the PC board database with Placement/Wiring Tool or other tools, and then
parameter click Environment Æ Parameter Resource Æ Load on the menu bar.
resource file
2. Select a resource filename
and click OK.
Click
Conversely, you can also reflect command parameters modified on the PC board
database to parameter.rsc.
Outputting a 1. Open the PC board database with Placement/Wiring Tool or other tools, and then
parameter click Environment Æ Parameter Resource Æ Output on the menu bar.
resource
2. Select a resource filename
and click OK.
Click
When input of one of the objects above is fixed, the area containing the object is
immediately set as the whole display area.
Use the following commands to input and edit the data above:
Reference For the Edit, Move and Erase commands, refer to “Artwork Command Reference.”
Now you will learn how to use the Input Area and Generate Offset Figure commands.
P4 P3 P2
P5
P1 P1
P2
When you input arcs and circles, you can select the
input modes.
Arc input modes Circle input modes
4. Input an area.
Target
Whole • • Generate in the whole figure.
Section • • Generate in the specific section.
Gap : Specify the offset gap.
Generate Count : Specify the number of figures generated.
Reference For details on parameters for the Generate Offset Figure command, refer to “Artwork Command Reference.”
Note When you select PC Board Shape or Layout Area for the active layer, the Outline
Width and Paint Width options are grayed out and thus cannot be set, because these
are in the section recognized by the system. (When PC Board Shape or Layout Area is
selected as the active layer, this becomes area for system recognition. Thus, the
Outline Width and Paint Width options are grayed out and cannot be set.)
Lesson 1. Set the active layer to PC Board Shape, and input the PC board shape based on the
coordinates shown below.
2. Change the active layer to Layout Area, and click (Generate Offset Figure) on
the tool bar to input the layout area with 2 mm offset inside the PC board shape.
PC board
shape
Layout area
When you input overlapping objects, the shorter one has priority.
Reference The component height can be set as a part attribute or package attribute, as well as being registered in the
footprint. For details, refer to “Master Training <Component Library>.”
3. Input the area in the same way as for the Input Area command.
PC board shape
Layout area
Note If you have any objects with a pre-determined input position such as mounting holes
and dimension lines, you can input them before beginning design.
Note Floor Planner is an option. If you are not using it, place components as shown on
page 3-63 and follow the operations explained from page 3-63.
Click
z Floor Planner
Floor Planner is a tool to check floor planning before precisely placing components.
Reference For the resource files that Floor Planner refers to, refer to “Resource file for each edit tool” on page 3-34.
Stack Components
This function displays all components on the canvas ignoring the online DRC, and allows you to check
whether placement/wiring is possible.
Group Area
This function gathers components placed close to each other into groups, and allows you to check their
placement positions as a group.
GroupA GroupB
GroupC
Trial Placement
This function uses the connection relationships among the components that have been placed, and
places the components automatically so that the wire length becomes shorter.
z Stacking Components
The Stack Components command arranges and places components. You can place the
components anywhere on the canvas, ignoring the DRC.
The arranged components hold their last arranged coordinates even after they have
been moved with the Move command, and so they can be returned to the last
arranged position using (the Out-board Standby instruction) in Move
Component.
• Auto Stack
Arranges the components matching the rules without specifying the area.
• Manual Stack
Arranges by specifying the components and area.
Note The Stack Components function arranges components so that the component areas do
not overlap each other.
[Horizontal] [Vertical]
3. Select a component to be arranged. (If they are on the canvas, click them one by
one. If not, use the Component Selector.)
4. Specify a position where data is ended.
5. When the cursor changes to , specify an arrangement area with two points.
Note You can arrange components anywhere on the canvas because you specify the area.
Lesson From the tool bar, click (Stack Components) to automatically arrange unplaced
components outside of the PC board shape.
Click Unplaced.
Click
IC4 IC5
Display Only the 1. Select Environment Æ Option from the menu bar.
Reference
Designators of Select the Component tab.
Specified
Components Target
All Comp. : For all components
Specified Comp. : For only components
specified for display
View Side
Both : Components on both sides
A Side : Components on A side
B Side : Components on B side
Display Attributes Following Active Layer :
Also displays marks for attributes. Follow the current active layer
Reference For details on setting these options, refer to “Setting Display Parameters” on page 3-200.
Lesson 1. Select View Æ Ref-Des from the menu bar to display reference designators for all
components.
z Selecting Components
In [CR-5000/Beginner's Training <PCB Design>], you had selected components to be
moved by clicking them on the screen or specifying the area. You can also select
components by their attributes without clicking.
Insert mounted
type components
Reference For details on the function types, refer to “Generating Components” on page 3-84.
2. Select the condition set check box for the item to be set, and then set the condition.
! Caution You cannot specify multiple package-types for one item. (For example, you cannot specify both “SOP” and
“QFP” at once).
Create If you save the conditions you have set using Select Manager, you can reuse the same
Component conditions as many times as you want.
Selection
Conditions 1. Click Utilities Æ Select Manager on the menu bar.
2. Set conditions.
Click
Click
Click
4. The Enter Name dialog box appears. Enter a name for the condition (Component
Selection Condition Name).
Click
3. Select the name assigned in the above step and click OK.
Click
Click
Note If you want to keep the set condition, specify it in the resource file (parameter.rsc).
z Creating Groups
By grouping components and circuit blocks that you want to be placed close to each
other, you can place them as a group.
GroupA GroupB GroupC
Component list
Note If you have defined a group using System Designer, the component group can be
generated automatically.
Click Click
3. Set the From: and To: options for components to be moved between groups.
4. Select the components to be added to the target group from the list of components in
the source group. You may also select components using Select Comp..
Hold
Release
Click
Register a Alternatively, you can select components from the canvas and group them together.
Component
Group after 1. Click (Move Components) on the tool bar.
Selecting
2. Select the components to be grouped.
Components
Release
Hold
3. Click Attributes Æ Grouping... from the menu bar, and then select the desired group
from the Select Group dialog box.
Click
Click
Click
Group Area
GroupB(18%:50%)
Inter-group net
GroupA(15%:50%)
GroupC(32%:50%)
Decide on the group area by referring to
the inter-group net.
Divide Group
P1
P3
P2
Data end GroupB(50%:50%)
P1
Note When a group area is re-input, the existing group will be replaced.
Group Area You can automatically generate a group shape for a component group without a
Automatic defined group shape.
Creation
1. Click (Generate Group Area) on the tool bar, and click Generate Automatically
in the panel menu.
Click
Numeric values in parentheses indicate current and index values for the component occupancy ratio.
Example GroupA (30% : 50%) Æ Group name (Current value : Index value)
For this group, the components occupy 30% of the total group area.
You can change index values for the component occupancy ratio.
From the menu bar, select Utilities Æ Placement Design Info..
Click
Edit Group Area Edit the group area shape on the PC board.
Click
3. Click two points on the group area outline and input a new shape.
P1
P3
P2
GroupA(50%:50%) GroupA(50%:50%)
Data End GroupA(50%:50%)
Divide Group If a group area has been input for both Sides A and B, you can divide it into
Area respective group areas.
Click
Note The above operation divided the group area input commonly for Sides A and B to
respective areas at the same point. You may also input respective areas by selecting
Side A or B from the panel menu when inputting the group area.
Move Group Area Move a group area already created, without changing its shape.
2. Panel menu
Actions for Groups
Delete Group
Divide Group
Segment Stretch
To fix the segment angles on both sides of the
specified side or construction point, select Lock.
To be able to change the segment angles to any
angle you want, select Free.
Move Segment
Specify one side of the group area and click the destination.
P1
! Caution To add construction points to the group area, use the Create Group Area command.
Display Related When a group area is created, you can display the following:
to Group Area
Group shape
Guide
Inter-group net
Fixed componet
1. Click View Æ Comp. Group from the menu bar to switch between displaying and
hiding group areas.
OFF ON
2. Select Environment Æ Option from the menu bar, and set the Shape and
View Side options on the Component tab.
Shape
Group Shape
GroupA(70%:50%)
3. You can display inter-group nets by selecting the Group Net edit-mode indicator.
Click
By clicking the list icon, you can also refer to or define the inter-group nets in detail.
Click
4. Click (Move Components) on the tool bar and select the group net components
to be displayed. Click Attributes Æ Group Net Display Component Æ Set from the
menu bar.
If you have defined Group Net Display Component
for a key component such as a connector component,
you can display the inter-group net between the
component and the group.
Lesson 1. Input group areas, and then move and edit them so that they have the following
shapes:
2. Click (Move Components) on the tool bar. Place CN1 and IC1 in the coordinates
shown below and define the group net display component for CN1.
3. Check Group Net on Edit-mode indicator to display the group nets between the group
net display components and the related component groups.
Click
z Checking Placement
Now we will try a trial placement.
Trial placement means that a search is made of the combinations of placed
components and non-placed or outside-board standby components for the one that
has the strongest connection relationship. Non-placed components are then
automatically placed near a placed component. This function allows you to place the
components that have strong connection relationships near each other, reducing the
estimated wire length.
Trial placement
Placed component
! Caution Before trying trial placement, you must define some key components.
Trial Placement (Repeat) Trial placement for the specified number of components.
Switch whether to use Bus Mode Specify the group names when the
(In Bus Mode, components that target components are grouped.
have bus relationships with
each other are grouped and Specify the area to place
placed once. You need to specify components.
the minimum number of (Group area, layout area)
connections between two
components for the Bus mode.) Specify the number of repetitions for
Trial Placement.
In this mode, the components
shown below are also Specify the placement side
processed: (No Change, Areas Equal, Side
y Components not connected to A, Side B)
nets
y Components connected only Specify whether to refer to existing
to power/ground If placement is impossible, wiring patterns.
y Components without change the angle by 90 When referred to, wiring is
connections to placed degrees and retry. regarded as wiring inhibited data
components processing.
Click
Note You can suspend the process with the Break key (Ctrl + Break for Windows-version).
At trial placement, components are placed so that a DRC error does not occur and the
estimated wire length is minimized.
Depending on how the net is filled and the number of connections, components may
be placed too close to each other. In such a case, you can use another grid or increase
the clearance between components for trial placement.
Clearance area
Only for trial placement, you can outwardly expand the component area for each
component selection condition.
Component area
Offset X
Offset Y
! Caution Before using Optional Placement Grid or Clearance Area, you must preset the component selection conditions
(using Select Manager).
! Caution When doing trial placement using Optional Placement Grid or Clearance Area, you
must consider the following two points:
1. Set the “Base Grid” and “Optional Placement Grid” with a sufficiently large pitch. For trial placement, the
system searches for a placement area based on the set grid. So, if the grid is too small, it will take a long time
to search for a placement area, causing the process to be delayed.
2. Use the placement grid to adjust the component interval and set the clearance areas only when necessary.
Placement is inhibited in all clearance areas set. If many clearance areas are specified, the area available for
placement is reduced and searching will take longer.
On the other hand, if the placement grid is used for adjusting component intervals, the search areas are
skipped by grid. In this way, unnecessary searches are not carried out and the processing time can be
reduced. In addition, unused areas are available for placing components for which other grids have been set.
Lesson 1. For an insert-mounted type component, set the Optional Placement Grid Pitches X
and Y both to 5.08.
Select Manager
Set the component select condition name with a mount-type of Insert Mount
(“Insert” is already provided in this data, so you do not have to add it).
2. Click Utilities Æ Trial Placement on the menu bar, and then set as follows:
Click
Lesson Move IC9 to a position where a maximum wire length error does not occur.
The maximum wiring length limit is set to net of IC9 pin 2, SIGN2.
Note For a net with the maximum or minimum total length specified, a diamond appears
when moving a component or inputting wire so that the design rule will not be
violated.
Click
Click
Placement Result 1
3. Change component placement. Click Utilities Æ Save Placement Results ... on the
menu bar again and save the result in Placement Results 2.
Click
Click
Placement Result 2
4. Change component placement again. Click Utilities Æ Save Placement Results ... on
the menu bar again and save the result in Placement Results 3.
Click
Click
Placement Result 3
5. Click Utilities Æ Load Placement Results ... on the menu bar. Click Placement
Results 1 and OK in the Load Placement Results dialog box.
Click
Click
Placement Result 1
6. Click Placement Results 3 and OK in the Load Placement Results dialog box.
Click
Click
Placement Result 3
You can calculate and display the estimated wire length based on the unconnected
net length (Manhattan length). Based on this information, you can evaluate the
placement of components.
Click
If the estimated wire length has been changed by executing commands such as Move
Component and Swap Gates, the difference is displayed in parentheses ( ).
! Caution Floor Planner does not calculate power or ground net lengths, but Placement/Wiring Tool does.
Click
2. View the information to see how the land status has been changed.
Click
Padstack with changed land status Layer with changed land status
Click
Click
! Caution Marks remain unless you remove them. Be sure to remove unnecessary marks each time.
5. Because Placement/Wiring Tool does not require the group area or inter-group net, set
the display mode to OFF.
When the module is switched from Floor Planner to Placement/Wiring Tool, the land
status of padstack is internally changed. This process is called “land status
normalization.”
If the inside layers contain a negative power plane layer or mixed layer, the padstack
(via) with the same signal name as the negative surface is connected on thermal land.
For those with a different signal name, “Unconnected” status is entered for the
clearance land.
Padstack signal : GND
VCC VDD
However, Floor Planner regards all vias as clearance land on the inside layers
regardless of signal name of the via and negative surface.
Because a position that should be thermal land must be changed to thermal land
before Placement/Wiring Tool operation, the land is automatically normalized at
module switching.
z Placement/Wiring Tool
When you have determined rough placement using Floor Planner, proceed to precise
placement and wiring steps.
This section explains the commands provided for placement and wiring.
Reference Although the following commands are not covered in Master Training, Beginner’s Training explains them in
detail. Refer to “CR-5000 Beginner's Training <PCB Design>“ and Online help.
Reference For resource files that Placement/Wiring Tool refers to, refer to “Resource files for each edit tool” on page 3-34.
z Displaying Nets
Unconnected Net Check the Net check box on the edit-mode indicator.
Display ON
Click
Set Net Display Open the Set Net Display Color dialog box from the edit-mode indicator.
Color Dialog Box
Click
Color Parameters
Set net display color and display mode.
Color:
Displays the net in a specified color.
Hatching:
Displays the net in the hatching mode.
Tone:
Displays the net with tone patterns.
Layer Color:
Selectable from the layer color names. You can
also read and output the layer color file.
* Net construction
You can specify whether to calculate net information in real-time at wiring input or
component moving.
When a net has many connections, such as a power or ground net, you can improve
the response to commands by turning off the Construct Net function.
<<Operation>>
1. Open the Set Net Display Color dialog box from the edit-mode indicator.
Click
2. Set the Construct Net function to ON or OFF in the Set Net Display Color dialog box.
Click
! Caution If No is selected in the confirmation dialog box, a net with the Construct Net function off is not calculated.
In other words, the wiring ratio and other data are not updated.
Reference For details on the Check Wiring command, refer to “CR-5000 Beginner's Training <PCB Design>.”
Click
Click
Click
Lesson In the Set Net Display Color dialog box, set the display colors for particular nets as
follows.
GND : Green
VCC : Yellow
SIGN2 : Magenta
(Setting Max/Min Wire Length)
You can change the net color, switch the unconnected net view, and switch net
construction ON/OFF by selecting Setting for Selected Net from the assist menu of
each command and specifying nets on the canvas without using the Set Net Display
Color dialog box.
Click
You can also display net density outside the PC board shape.
Click
By specifying Disp. Nets in the assist menu during execution of the Input Wire
command, you can display only the unconnected nets which contain pins in the
specified area.
This command allows you to input patterns, inhibiting display of unconnected nets
not related to the nets being operated.
Click
3. Specify the area for pins generated from the unconnected net to be displayed.
P1
P2
fc
Note Hold the Shift key down and select areas to display multiple unconnected nets in the
selected areas.
4. Click Command End in the assist menu or press the Return key on the keyboard.
Click
You can also select one of the three modes below from the assist menu, in addition
to displaying nets in the specified area:
• Display All Display all nets.
• Display Area Display the nets in the specified area (default).
• Undisplay area Do not display the nets in the specified area.
! Caution If you have used Display Area Net to limit the nets to be displayed, only nets in the specified area are displayed
unless you change the area with Display Area Net or change Display/Non-display using the Set Net Display
Color dialog box.
z Setting aTheGrid
Board Designer provides four types of grids:
Skip display/interval
Grids are displayed at
the specified intervals by
checking the Skip check
button and setting the
skip interval.
Point Grid
Grid types can also be selected from
Displays the set grids with points.
the predefined list by selecting the
grid type cell and clicking Grid List
from the assist menu.
Line Grid
Displays the set grids with broken
lines.
Click
! Caution Line grid does not support via grid and, therefore, the via grid is always point grid.
Change Grid You can temporarily change the wiring grid on the canvas without specifying
numerical values in the Set Grid dialog box. Based on the objects on the PC board,
specify the number of grid pitches to be generated between objects.
! Caution An object specifies any point on the wiring line or the center of a pin, via, or area.
P2 1
4. Click another object (P3).
P3
5. Click Environment Æ Change Grid from the menu bar, and then click Mode Æ Set To
Original in the assist menu.
Note In addition to the operation explained above, the temporary grid can be undone using
the Change Grid command if P1 and P2 are the same point.
Click
z Moving Components
Move components already placed.
Edit Æ
Move Component
! Caution The maze rerouting function is available only when the optional software Embedded Router is purchased.
Command
Outside-board Standby
Put the component standby
at the last arranged position.
Component Standby
Put the component in an
Optimize Component Angle
unplaced state.
Rotate the component so
that the estimated wire
Change Placement Side: Side A/B length is reduced.
(Available only in Floor
Switch the placement sides. Delete Component
Delete the component. Planner.)
Data End
Shift + P1
P4
P3
Rotate 1. Click (Move Component) on the tool bar and select components.
Component during
Moving or Change
Placement Side
P1
2. Click Rotate and Side B in the assist menu and click the destination.
P2
Note During move the components can be rotated and the placement side can be changed
also by using the Rotate button on the panel menu.
Relative Turn of 1. Click (Move Component) on the tool bar, select components, click Data End,
Component during and click the base point.
Moving
P1
Data End
Relative Turn
P2
Rotate 1. Click (Move Component) on the tool bar and select components.
Component at
Placement
Position or
Change
Placement Side The selected components will be
highlighted.
2. Click the Rotate button on the panel menu, and click the Place Side B button.
Click
Click
Move Component 1. Click (Move Component) on the tool bar, and check the Reroute check box and
with Reroute ON
select Simple mode on the panel menu.
(Simple
connection)
Click
Note The simple mode is useful in the parallel movement and rotation of components.
Non-parallel moving.
Move Component 1. Click (Move Component) on the tool bar, and check the Reroute check box and
with Reroute ON select the Channel mode on the panel menu.
(Channel
connection)
Click
Note The channel routing mode is valid in the parallel movement and the spread
movement.
! Caution Rotating and changing the component side is impossible.
z Aligning Components
Align disorderly placed components.
Edit Æ
Align Component
Note The components are aligned using the combination of align direction and align base
as follows. Top Center Bottom
Horizontal
3. Select multiple components to be aligned, click Data End in the assist menu, and drag
the components to the destination.
Data End
z Changing Components
While designing the PC board, you can change components to those from another
package.
Edit Æ
Change Component
You can only change components that use the same pin assignment names in parts.
Footprint Part
DIP14 Function
AND INV
SOP14
Pin assignment
AND*4 INV*6
Package
DIP14 SOP14
Part
74LS04-DIP 74LS08-DIP
74LS04-SOP 74LS08-SOP
! Caution If a component has been registered without pin assignment, all components with the same pin count are to be
changed.
Change Part
Change Part (In Table)
Change Footprint
Reset Footprint Shape
P1
The selected components will be highlighted.
Note When you select a component, other components having the same part name will
also be highlighted.
SN74LS08 SN74LS08
To simultaneously execute the change instruction to
P1 components that are highlighted, click them sequentially. To
IC1 IC2 change all components that are highlighted, select Select All
from the assist menu.
Note
When executing with CDB Components checked, information on the
components copied from CDB to the PC board is listed.
Change Part You can change all components having the specified name in one operation, instead of
(In Table) changing them individually.
1. Click (Change Component) on the tool bar.
2. Change the Change Mode to Change Part (In Table) in the panel menu and click
Change Part Dialog.
Click
Click
Keep the original footprint after changing the parts.
3. Filter the part names that you want to change to change them in one operation.
Click
Click
Click
Click
Click
Click Close.
Change Footprint You may also change the component shape only, leaving the part name as-is.
The component shape is determined from the package information in the CDB library
as you can see from the figure below. You can change the footprint, ignoring the
package information, just for practice.
Part Information
Part Name: SN74LS08
Package Name: LS08-DIP
Footprint information
Footprint Name: DIP14
Package Information
Package Name: LS08-DIP
Footprint Name: DIP14
2. Switch the Change Mode to Change Footprint in the panel menu and select
components to change.
P1
The selected components will be highlighted.
3. Select footprint names to be changed from the list and click Data End in the assist
menu.
Click
The part name is not changed and only the
footprint name is changed for each placement
side.
Reset Footprint You can reset the component shape that is edited (land cut, silk editing, etc.).
Shape
2. Switch the Change mode to Reset Footprint Figure in the panel menu, and select
components to change.
Click If any of these check boxes are checked, the original status
(edited status) remains unchanged after reset.
Padstack
Maintains all padstacks in the component
Pad
Maintains all pads in the component
General Figure (Edited)
Maintains edited figures in the component
Click
Click
z Generating Components
Utilities Æ All components on the PC board were in the net list, and then were generated on the
PC board database at PC board generation.
Add Component
You can also generate individual components, which are not in the net list, on the PC
board, if necessary.
Jumper components
Components that are defined as
jumpers in the part library
Non-electrical components
Components that are not related to ZUKEN
the net (having no terminal), such as
logos and drawing frame components
CDB Components
Check this check box to specify a component registered in the
CDB but not existent on the PC board. (The component is
automatically copied from the CDB to the PC board.)
Ref-Des
Specifies the header and starting number of the reference of
the component to be generated.
3. The component follows the cursor movement. Click the placement position.
P1
3. If the component allows pitch change, it is highlighted and dragging starts.
4. When you click while the pitch is changed, the pitch changes to that displayed by
dragging.
P2
Components that allow pitch change are 2-pin components with multiple footprint names defined in the
same package. When you execute the Change Pitch command, the footprint will actually be changed to
another.
z Locking Components
Attributes Æ You can place four types of locks on a component.
Lock Component Location Lock Inhibit changing the placement location, angle, and
or placement side.
Unlock Component Place Side Lock Inhibit changing the placement side.
Angle Lock Inhibit changing the angle.
Ref-Des Lock Inhibit changing the reference designator.
Click
The component is not dragged, but only is
P1 highlighted.
Unlock 1. Click (Move Component) on the tool bar and select locked components.
Component
P1
(L)
Click
Note When you lock a component, you must use the Move Component command to select
the component. By clicking Select Only in the assist menu of the Move Component
command, you can just select the component at the current position.
Click
Execute Check.
Panel menu
Clear Error Marks.
Component DRC
Setup dialog box
Che.:
Setting for checking or clearing error
marks.
Log:
Setting to either retain or clear the check
log.
Disp.:
Setting for displaying error marks.
Reference For details on the check items for Component DRC, refer to [Setting items of component DRC and check
contents] in the online help.
1. Click Check Æ Component DRC on the menu bar to open the DRC Settings
dialog.
Refer to 1. Click Error List in the DRC Settings dialog box to display the Error list dialogue.
Component DRC
Error Information
Click
Click
Click
Click the Error Type cell.
Clearing 1. Select the Clear Error Marks mode in the panel menu, and click on the PC board.
Component DRC
Error Marks Click
Click
Note
Instead of clearing error marks, you may temporarily turn off error display only.
! Caution Because error marks are stored internally when the display of error marks is disabled, repeating the check
without displaying error marks results in storing a great amount of error mark information.
Thus, if possible, keep the View Comp. DRC Errors ON, and execute Clear Error Marks on error marks that
are unnecessary.
Executing the component DRC check online allows you to check the component
movement real-time when deciding the placements.
Grid
Specify the number of vertical and
horizontal points for displaying a
color matrix.
Color scale
Indicates the probabilities shown by
these colors.
Component shape
We have now introduced you to all the commands related to component placement.
Next, we will show you commands for wiring.
Open “exwir/[Board]” provided for wiring and try the operations following the
instructions.
Click
Click
Note When you want to open another file, you can specify the filename after selecting File
Æ Open on the menu bar without ending the tool each time.
z Performing Wiring
Now we proceed to input wire. Various functions are provided.
Pair Layer
When you double-click to generate a via and switch the active
Edit Æ Input Wire layer, the layer set as paired layer is activated.
Shape
For details on each mode, see page 3-94 and onward.
Width Specify the wire width. Checking the Fix Width check
box allows setting a wire width different from the
default.
Change Padstack
Allows entering a via into a padstack different from the
default. (See page 3-107)
Parameters
Reference See pages indicated for details on parameters with pages noted.
In addition, a rubber band from the cursor to the end point is shown in
P2 a rectangle.
You may also generate a via by changing the active layer to another
P3 layer.
Reference For the generation of vias, see “High-level Wiring (Via)” on page 3-99.
P5
Note During the wire input, clicking Data End while entering a pattern sets the wiring made until then.
Data End
Draw from a point If a component pin is created with a line or area, you can specify any position (even a
other than the position other than center point) to draw the pattern to.
center
1. Click (Input Wire) on the tool bar, and click Parameters on the panel menu.
Click
Uncheck the Into CenterPoint check box.
Note Default setting for this check box is unchecked (no retraction to the center).
! Caution When the pin is a via, pattern is retracted to the center regardless of the setting.
Auto-draw-in If auto retraction is enabled for a retraction object when wiring is suspended, the line
Mode pattern is automatically generated to retract the end point to the object.
1. Click (Input Wire) on the tool bar, and click Parameter on the panel menu.
2. Now we will input wiring. Extend wire toward the retraction object and execute
Data End when the flag mark appears.
Data End
Auto-divide Mode When the line pattern input with Wire Input passes over the same net pad or
padstack, the line is connected to the pad or padstack in-batch.
1. Click (Input Wire) on the tool bar, and click Parameter on the panel menu.
2. Wire so that the wiring goes over the same net pad or padstack.
P1
Wiring to a When wiring to a 2-pin component that has been defined to have no logical polarity in
Non-polarized the part library, you can change the connection destination and draw the wire to
Component either of these two pins only if neither of them has been wired.
2. First, the line is drawn to the opposite pin where an unconnected line does not exist.
Considering the You can perform wiring checking maximum/minimum wire lengths by displaying the
wire length pattern’s current wire length.
1. Click (Input Wire) on the tool bar, click Display Chart on the panel menu, and
begin wire input.
Click
Wiring a If you input wire where no unconnected nets or patterns have been specified, a
temporary net temporary net (pattern without signal name) is generated.
1. Click (Input Wire) on the tool bar, and input wire to an area where nothing
exists.
2. Start inputting the wire that is to be connected to a temporary net, and connect it to
the wiring of the temporary net.
P2
P1 The connected net is added.
P1 P2
P3 P3 P3
P3
Mode1 Mode2
Check this check box to perform L-wiring to the first point of the
first segment.
Check this check box to process the corner point with the
specified length and 45 degree angle.
Click
4. Input wire.
[Mode 1]
[Mode 2]
Note When there are multiple possible shapes for L-wiring, you can switch them by
clicking Another on the assist menu.
! Caution Once you set L-wiring to ON, it remains on until you click L-wire again on the assist menu.
Edit Æ 1. Click (Input Wire) on the tool bar, and select Via in Shape on the panel menu.
Input Wire
Input a single via
Click
2. To input a via by specifying a net, click Select Net in the assist menu and specify the
conductive figure to be assigned on the canvas.
Click
Click
3. Input a via.
P1 P2
Input a via.
P3 P4
Any lines and vias nearby will be automatically snapped.
This is useful when multiple vias need to be input for reinforcement.
Generating a via 1. Click (Input Wire) on the tool bar, and select Std in Shape on the panel menu.
on the wire
Click
P2
P1
Double-Click
Note The FromTo of the via generated by double-clicking and the resulting active layer
follow the setting of the panel menu (FromTo, Pair Layer).
FromTo :1-6
Changed active layer: :6
Click
Change the active layer using the view area or the active
layer selection list.
Click
Note The FromTo of the via generated by a change of the active layer follows the setting of
the panel menu, and the resulting active layer will be the active layer that was
changed.
Reference For the generation of interstitial vias, see “Using Interstitial Via” on page 4-7.
Edit Æ 1. Click (Input Wire) on the tool bar, and select Auto Avoid in Shape on the panel
Input Wire menu.
Click
Edit Æ For the two types of pattern width, you must define the net and default values in
Input Wire advance using Design Rule Editor.
Default wiring width stack
1. Click (Input Wire) on the tool bar, and click Neck Down in Shape on the panel
menu.
Click
2. Input wire.
P1
P2
Lesson In the lesson data, the SIGN23 pattern is defined with maximum pattern width of 0.5
mm and minimum pattern width of 0.2 mm. Change the grid temporarily to G-0.635
so that the pattern can pass through the SMD pins after the neck-down process.
P2
P3
P1
P4
1. Click (Input Wire) on the tool bar, and click Spread in Shape on the panel menu.
Edit Æ
Input Wire
Click
2. Click Parameters from the panel menu and specify the target object for spread.
Antenna ON
3. Input wire.
Pattern
P5
P4
P2 P1 P3
Area
P4
P1
P3
P2
! Caution If the retraction destination for the line pattern is surrounded by areas, you cannot retract the line nor confirm it.
1. Click (Input Wire) on the tool bar, and click SemiAuto in Shape on the panel
Edit Æ
Input Wire menu.
Click
2. Click Parameter in the panel menu and select the search mode.
Search for a route in the rubber band status.
3. Specify an unconnected net to start inputting wire, and then specify the net end point.
P2
P1
P2 P3
P1 P4
Click
P2 P3
P1 P4
Note You can set a warning to be displayed when wiring that needs to be cut exists.
P1
P2
P3 Click
P4
The detailed parameters of both are set in the Parameters dialog box.
Tangent arc radius
1. Click (Input Wire) on the tool bar, and check the Tangent Arc and Teardrop
check boxes on the panel menu.
Click Click
2. Input wire.
P1
P2
Changing the wiring width automatically checks the Fix Width check
box.
! Caution Because the changed wiring width will be applied to subsequent wiring, if you want to restore the default setting,
you need deselect the Fix Width check box.
Change You can change vias to have non-default settings in via input or when you enter them
Padstack during wiring.
P1
3. Click Change Padstack on the panel menu, and select a padstack name.
Click
Click
Click
4. Input a via.
! Caution The specified padstack name is valid until you select Data End.
Note In the Change Padstack List dialog box, padstacks that are defined in via
specification for design rules (Qualified Padstack/Available Padstack) are listed.
Specify whether to Shield net name to Gap between the The wiring width
perform shield be generated at target net and the stack to be applied
wiring. shield wiring shield pattern to the shield
(optional) pattern (optional)
Shielding Mode Set shield parameters, such as specification of whether to generate a shield during
Environment Æ wiring or the shield shape to be generated.
Shielding Mode
Generate shield patterns at wiring input
Click
Clicking Data End retracts the shield pattern to an object with the
same signal.
Generate shield 1. Click (Post-wiring Process) on the tool bar, click the Generate mode on the
later panel menu, and check the Shielding check box.
Click
Click
Click
Reference For the post-wiring command, see “Executing Post-wiring Process” on page 3-123.
Reference For the gap value between the shield pattern and the target net that is referenced during the generation of
shield, see “*Application Rule” on page 3-29.
Note
Nets targeted for shield generation and shield patterns are internally correlated.
Therefore, if the pattern targeted for shield generation is edited, the corresponding
shield pattern is updated as well.
Likewise, if the pattern targeted for shield generation is deleted, the corresponding
shield pattern is deleted as well.
Implement pair 1. Click Edit Æ HSL Æ Pair Routing on the menu bar, and click Reference to Rule on
routing the panel menu.
Click
P1
! Caution A wiring route is being searched for on the currently active layer. Set the grid to OFF for wiring.
Note You can specify any unconnected net and implement pair routing using the Pair
Routing command, even if the Parallel Wiring attribute is not enabled in the net
group setting of the design rule.
Click
P1
P2
Prepare for Length control requires that each attribute that is going to be referred to has been
length control enabled for the net. The settings are defined in design rules.
Edit Design Rule - Net objects
Pinpair group
Control the wire 1. Click Edit Æ HSL Æ Length Control on the menu bar.
length
2. Select a mode and a detour shape in the panel menu.
Mode
Selects the wire length control mode to apply.
Prior Segment
Create a detour route passing through the designated line.
Shape
Accordion Trombone
P1
Trombone
P1
Note By specifying Report in the panel menu, you can display the Equal Length Wiring
and Minimum Wire Length information, current wiring pattern length, and check
whether there are any violations.
Click
z Wiring Net
zEditing without Net
Environment Æ You can wire from an unconnected pin that has no unconnected nets.
Net-less Design Mode
1. Click Environment Æ Net-less Design Mode on the menu bar.
Click
P1
Since the connection destination has not been selected, rubber band
is not displayed.
P4
P3
P2
Note You can also connect an unconnected pin to an existing net on the PC board.
! Caution When you have connected unconnected pins, they are only temporarily assigned a net. If the wiring pattern is
deleted, the pins return to unconnected.
To assign an internal net to the pin, you must execute the Edit Net command.
Reference For the Net Edit command, refer to the next page.
Enabling Net-less Design Mode may cause unintentional net connection or wiring, and a warning
dialog box will be displayed when one of the following actions takes place.
zEditing Net
Utilities Æ You can edit a net in the following manner:
Edit Net
• Delete Net - Delete the selected nets from the PC board.
• Delete Subnet - Disconnect the net from the specified object.
• No Net Æ Net - Connect an object without a connection to any net on the PC board.
• Generate New Net - Generate a net that does not exist on the PC board.
P1
Click
Delete a Sub-net
Click
P1
Specify a pin or an existing wire. A net is removed from the object that is
connected with the specified object.
No Net Æ Net
P1
P2
Click a pin connected Click an unconnected pin A net is added and an unconnected net
to a net (P1) (P2) is generated.(Click P1 and P2 in any
order.)
Connect two unconnected pins. Specify the area. The signal name is
automatically assigned.
! Caution The net name that is automatically assigned cannot be changed. If you want to change the net name, execute
Forward Annotation.
! Caution Nets on the power plane layer cannot be deleted.
Select Via Enable copying of vias. (Selecting only vias is also possible.)
Fix Width Maintain the line width when copying the object. (When unchecked, the
default line width is applied.)
Fix Net Maintain the original data's net when copying the object.
Lock Hierarchy Connector Keep hierarchy connectors generated at divided design on the divided area.
2. Click the copy source pattern and then click the copy destination.
P5 P6 P7
Selecting the Continuous check box
P1 P2 P3P4 enables copying the same shape
continually.
Note Edit Æ Move command can be executed from the menu bar in the same manner
as the Copy command.
z Moving by Block
Edit Æ You can move the components and wiring patterns in a specified area in one
Move Block operation.
If you must move components after inputting the wiring pattern, you can use this
convenient function to move them while keeping the current connections.
Input Area
Area Of Group
Cut Mode
Select the objects to cut when creating an area, and select the stretch line mode when moving
the lines.
Line and/or Area checked
Line and Area
Stretch Line Stretch Line Stretch Line
unchecked checked, No Jog checked, No Jog
unchecked unchecked checked
2. After specifying an input area, click Data End from the assist menu.
(Omit this operation if the group name has been specified.)
P1
Data End.
3. When the cursor turns into a cross cursor, specify the reference point to move, and
click the move destination.
Click
Note By clicking Apply All Area in the panel menu, you can select the entire PC board
according to the single/all-layer specification on the indicator.
3. Specify the wiring pattern to unlock by specifying a point or an area, and click Apply
from the panel menu.
Click
Note When any locked wiring pattern is referenced, an indication “Fix” is displayed.
! Caution With this command, padstack land status cannot be locked. For information on locking the land status, see
“Editing a Padstack” on page 3-127.
z Editing an Area
Input or edit an area.
Edit Æ If you end operation after confirming the shape when online DRC is activated, this
function searches for an obstacle that which does not maintain clearance from an
Input Area area. It then automatically cuts the area shape so that clearance can be maintained
(Conductive) from the obstacle (DRC error avoiding function).
Shape
Subcommands
Meshplane Parameters
Shape Parameters
Input an area with primitive shape by specifying parameters.
Commands
After starting the Edit Area command, specify the following necessary subcommands to edit the area.
Edit/Input Window Move Window Copy Window Delete Window Move
You can
specify the
target only
when moving.
A button that appears pressed is a subcommand that will be executed in command execution.
Reference For details on the commands to set mesh parameter, shape parameter and creating mesh plane, refer to Online
help.
Specify whether to generate an area inside Specify whether to generate an Divide mode
when an obstacle is looping. island area. When selected, an Offset Overlap
When selected, an area is generated inside. islannd area is not generated.
Input Area 1. Click (Input Area) on the toolbar, and click on the pin that has the same net with
(Standard) the area you want to input.
P1
2. Select the points on the outline sequentially, and click Data End in the assist menu.
P2 P3
Data End
P5 P4
For an object in the same net, an overlapping area is generated. For an object in a different
net, the generated area is set aside by the defined clearance (DRC error avoiding function).
Input Area 1. Click (Input Area) on the toolbar, and click Parameters in the panel menu.
(Thermal Process)
Check Thermal Process and Thermal Line Output, then
specify the width, the angle, and the count of thermal
lines.
2. Select an object (a pin or pattern) with the same net as the area.
P1
P2 P3
Data End
P5
P4
P7 P6
! Caution Thermal process is applied only to pins. Wiring vias are not processed.
P1
P2
A flag mark appears on the outline you specified.
Data End
P3
P1
P2
3. Change the outline width, pitch, and angle in the panel menu, and click Data End.
Data End
P1 P2
P4
P3
P6 P5
P4 P3 Data End
Note When executing a subcommand for an area already input, first click the subcommand
and then specify the target area or the window of the area.
Note If you specify the area outline while holding down the Shift key without specifying an
object on the same net, you can input an area that has no net.
z Reshaping Wiring
Edit Æ Reshape You can increase the area for wiring by deleting unnecessary corners and vias, or by
packing patterns.
Delete corner
You cannot delete a corner of a net having a power plane on the inside layer.
Packing
! Caution The patterns are packed based on the clearance values and may not be on the grid.
Delete vias
Merge vias
Merge duplicate vias that are on the same coordinate.
Note Merge vias and Remove antenna vias cannot be executed if the post-wiring process
will result in violation of [Design Rule] – [Via Spec. (Interstitial Via - Combination
Limit)].
Target
Check the process to be executed. (The Wiring Width check
box can be checked only if the process mode is Generate.)
Padstack
Select how to process padstacks.
Wiring Width
Change the wiring width.
SMD Pin Balance Process all the
specified wiring.
Increase Execute only when
increasing the
Via, Pad width.
Decrease Execute only when
decreasing the
width.
Max Pattern Width
Minimum Width Ratio Pattern Width
Generate teardrop if <wiring width>
× <width ratio> ≤ <teardrop width> . Min Pattern Width
SMD Pin
Specify the attributes of
the generated area to be
Via, Pad the same as Wiring
Width.
Power Plane
Specify the layer if one of the areas where vias are generated is
a power plane.
(Set “no value” to specify two areas.)
1. Click (Post-wiring Process) on the tool bar, and check the process to be
executed in the panel menu.
2. Specify the object to be processed.
z Editing a Pad
Edit Æ Edit Pad You can perform the following editing to pads on the PC board and pads in the
padstack.
Take in Area
The area on the visible layer that
overlaps with the pad is snapped
(taken in) as a pad.
Change Pad
Changes the pad, excludes pads,
changes their diameter, etc.
Click
Click
2. Select a target pad and click Select Area in the panel menu. When the area to take in
is highlighted, click Apply.
Click
P1
Click
Click
Click
! Caution You can execute Exclude Pad only for non-conductive layer pads.
! Caution You can execute Change Pad Diam only for round pads.
2. After selecting a target pad, in the panel menu, specify a new padstack name for the
Original Pad, and click Apply.
Click
P1
z Editing a Padstack
You can edit the padstack on the PC board as follows:
Change Padstack
Edit Æ Replaces the padstack.
Edit Padstack
Rotate
Rotates the padstack. Change padstack
Change From-to
Changes the padstack interstice.
Change From-to
Change Hole Diameter
Changes the hole diameter in the padstack.
Land Status
Select a process to change land status of the active layer
(Landless/Connect/Unconnect/Thermal/Clearance) and to normalize
(single/all).
Thermal Attributes:
When normalizing the land status, keep the land status for each
attribute as follows:
Prior Clearance: Changes to Clearance if the changed thermal is
on the same net.
Auto: Changes to Thermal/Clearance automatically considering
the connection to the same/different net.
All Layers Fixed: The current land status is maintained regardless
of the connection status.
Change Hole Diam: Change the diameter (for round holes only).
P1
Highlighted and a flag mark appears.
3. Specify a new padstack name on the panel menu and click Apply.
Click
Padstack is changed.
P1
Highlighted and a flag mark appears.
3. From the panel menu, change the land status to Clearance and click Apply; then
change the thermal attribute to Prior Clearance and click Apply.
Click
Click
! Caution The Edit Padstack command ignores Online DRC and makes changes on execution. When you execute the Edit
Padstack command, be sure to execute the Area DRC command in the end.
! Caution Locked padstacks cannot be selected. If you want to change their land status, unlock them first. For details on
unlocking, refer to “Locking a Wiring Pattern” on Page 3 –117.
Number Offset Provide offset reference numbers and re-assign them in one operation.
Change Header Text Re-assign only alphabetical parts of Reference designator in one operation.
Change Digit Count of No. Unify the number of digits for reference numbers and re-assign them in one
operation.
Batch Change Use the specified alphabetical letters and numbers and re-assign them in one
operation.
Change Sequence Re-assign numbers based on placement position separated by divide lines.
Change Location Separate with divide lines and re-assign using location addresses.
Click
Click
3. From the panel menu, specify the new reference designator header text, and click
Apply.
Click
Change in Batch 1. Click Attributes Æ Change Ref-Des on the menu bar, and change to
Change in Batch mode in the panel menu.
Click
2. Specify the area of the components to be changed, and specify Data End in the assist
menu.
Data End
3. From the panel menu, specify the new reference designator header text and starting
number, and then click Apply.
Click
2. Specify a component.
3. From the panel menu, click on a new stock code and click Apply.
Click
Click
Placement Layer:A
value:0.1u elec_type:capa
Board Designer
EMC Part:No
Placement Layer:A
elec_type:capa
value:0.1u
Circuit Information Change attributes for each component set in the schematic.
Component Attribute
Pin Attribute
Part Change attributes that have been set for parts on CDB.
Component Attribute
Pin Attribute
2. Select the component to be changed, enter the new attributes, and click OK.
Click
Click
Click
3. Click (Query Data) on the toolbar, and select the component whose attributes
have been changed.
Click
%ZUEROOT%\info\cpbrowser.rsc
%CR5_PROJECT_ROOT%\zue\info\cpbrowser.rsc
%HOME%\cr5000\ue\cpbrowser.rsc
####################################################################
##
## Component/Pin Browser Property Table
## [usage]
## “propName” type “propLabel” list listType editable
##
####################################################################
####################################################################
## COMP PROPERTY ITEMS
####################################################################
Comp*Property 6 {
“compComment” text “Comment” - - -
“decoupleBalance” float “Decoupling Balance” - - -
“decoupleDist” float “Decoupling Distance” - - -
“emcPart” text “EMC Part” (“YES” “NO”) fix -
“enetNonSeries” text “E-Net Non Series” (“YES” “NO”) fix -
“ICX_PART_MODEL” text “ICX_PART_MODEL” - - -
“placementGroup” text “Placement Group Name” - - -
“placementKind” text “Placement Kind” (“PASS” “SERIES”) - -
“powerDiss” float “Power Consumption(W)” - - -
Note The format is the same as cdb.rsc; by referencing files different from cdb.rsc, it is
possible to control between “reference only on the PC board” and “updatable on the
PC board.”
Action
Select a processing mode such as test point allocation or
deletion.
Allocation mode
Select an object to which the test point attribute is allocated.
Report Mode
Set the sorting method and name for the test point list and
Action
Auto Alloc./Auto Clear
Based on Allocation Mode and Parameters settings, generates/deletes all test points that can be
generated/deleted.
Mark TPs/Unmark TPs
Attach/detach only the test point attributes to/from existing objects (vias/pins).
Alloc.byHand
Allocate newly-generated pads/padstacks as test points.
Lock TPs/Unlock TPs
Lock/unlock test points already generated.
Inh. Comp./UnInh.Comp.
For the specified components, set/reset the attribute that inhibits generation of test points.
Set Probe/Delete Probe
For test points already generated, set/delete the probe provided in parameters.
Auto Extract
For test points already generated, set the probe defined in the resource file (tpprobe.rsc) in one
operation.
Adding Test Point Add only test point attributes to existing pins/vias.
Attributes
1. Click Edit Æ Testpoints on the menu bar, and specify settings in the panel menu.
2. Click Patameters in the panel menu to specify settings for pins/vias to which
attributes can be allocated.
Click
! Caution If you have not set “Usable Existing Padstacks”, test points cannot be generated. At generation, make sure you
have set “Usable Existing Padstacks” in advance.
3. On the PC board, click on the object to which you want to add test point attributes.
P1
P2
Click
A mark is displayed to
indicate a test point.
2. Click Parameters in the panel menu to specify settings for padstacks to generate TPs.
3. On the PC board, click on the component to which you want to add test point
attributes.
Click
By fan-out, padstacks to
generate TPs are generated.
Note By checking Fan-out TPad of Allocation Mode, fan-out from SMD pins is enabled for
newly generated TPs.
! Caution Because padstacks to generate TPs are not included in the training data, you need to prepare your data in order
to actually perform this function.
Listing Test Points 1. Click Edit Æ Testpoints on the menu bar, and click Do Report in the panel menu.
Click
zLowlight Display
View Æ Lowlight Select a net or a component on the canvas and display the unselected figures in a
lowlight color (a color like gray which does not stand out).
1. Click View Æ Lowlight from the menu bar and set the dialogs.
Target
Specify the target figure. (Other figures are displayed in a
lowlight color.)
2. Click the component to be highlighted. The other objects will be displayed in a lowlight
color.
Click
Click the component Only the selected component and the
at the lower left. net connected to it will be highlighted.
Check Æ
Area DRC
Panel menu
Perform checking.
Reference For details on the check items for Area DRC, refer to [Performing DRC by specifying an area] in the online help.
Executing Area
1. Click (Area DRC) from the toolbar, and click DRC Settings.
DRC
Select the Check and Disp cells for the items you
want to check.
Click
Error mark
DRC [1:0.135 ]
Layer Error
Once an error mark is generated, it
remains until error mark clear is performed
or data is modified.
Reviewing Area 1. From the panel menu, click View Error Marks, and click an error mark on the PC
DRC Error board.
Information
Click
Click
Note You can also view information for all errors on the PC board by clicking
Check All Area in the panel menu.
Clearing Area 1. From the panel menu, click Clear Error Marks, and click Check All Area to clear all
DRC Error Marks error marks.
Click
Click
Click
! Caution Only error marks that are checked in the Check cells of the Settings dialog box are cleared.
If the Disp cells of the Settings dialog box are unchecked, or if Check Æ DRC/MRC Draw Error Mark is
unchecked, you might overlook error marks that exist internally. Too many error marks can cause a huge file
size. Display error marks and clear unnecessary ones.
Approving Error 1. From Error list dialogue, select Action, and enter comments if necessary.
Information
Types of actions
Unprocessed: An action has not been specified yet
Modified: Errors that are already modified. Specify this if you want to keep error
information after the error has been modified.
Approved: Errors that can be avoided during manufacturing process, and thus
require no modification of data.
False error: Errors that are marked as errors by the system but cause no problem in
the actual design.
Query: Errors for which an action cannot be determined.
Modification required: Significant errors that need modification.
Note You can also view approval information when you query about error marks.
Click
Controlling how to 1. From the Error list dialogue, click Display option... and turn off the error information
display error items that you do not wish to display after the approval.
information
Click
Click
Click
! Caution Turning off the display will not delete the error information itself.
Resource File
Specify a file name to save settings to and load settings
from.
Select a mode.
Figure
Specify which clearance between objects is referred
to at the time of setting "Rule unit" and "Rule
stack".
Clearance
Specify clearance to be referred to.
2. Specify an area, or click Check All Area from the panel menu to perform checking.
You can view error information in Error list dialogue as you can in Area DRC.
! Caution When error information is displayed in General DRC, approval settings for error information cannot be
specified.
Artwork Tool enables you to input figures other than conductive patterns into the PC
board database designed by Board Designer.
Dimension lines
50 55
Alignment marks
ZUKEN Logo
Artwork Tool also provides various checking functions including the check for missing
resists or metal masks.
Errors
Note The Artwork Tool commands to input/edit figures are not explained in this textbook.
For details regarding the commands to input/edit artwork figures, refer to “Artwork
Command Reference”.
Lesson 1. Close the PC board file [exwir[Board]], used in the lesson for Placement/Wiring Tool,
and select the “exchk/[Board]” file set and click (Artwork).
Click Click
z Inputting a Component
Artwork Tool allows you to input logos, alignment marks and other non-electrical
Edit Æ components (printed components that have no pins, etc.).
Component Æ
Input
Printed components
ZUKEN
Type (Part/Footprint)
Select a type of component you want to input.
Ref-Des
Specify the header text and the number for reference designator.
Lesson 1. To input non-electrical parts, click Utilities Æ Copy Component from CDB on the menu
bar.
Click
Non-electrical components such as printed components, etc. have no pins and do not
exist in the schematic. Therefore, you must copy them into the PC board database in
advance before you input.
CDB Library
PLOGO1
Input
PLOGO1
PC Board Database
Reference For details on copying components from CDB, refer to “Master Training <Engineering Change/Operation>“.
zErasing a Component
You can erase the existing non-electrical components from the PC board (there is no
Edit Æ specific command mode).
Component Æ
Specify Single Object
Delete
P1
Specify Area
zMoving a Component
Edit Æ You can move the existing non-electrical parts on the PC board. The Drag mode and
the Relative mode are available.
Component Æ
Move Drag mode
P1 P2
Relative mode
Relative Distance
P1 Specify
relative Apply
distance
Destination
Two Points
P3
P2
P1
Indicate distance by specifying
two points
zCopying a Component
You can copy the existing non-electrical components on the PC board. The Drag mode
Edit Æ and the Relative mode are available.
Component Æ Copying process is similar to that of the Move command, except that you need to
Copy specify the target reference designator.
Drag Mode
P2
P1
CAM2
CAM1
Relative Mode
Relative Distance
P1 Specify
Apply CAM1
CAM1
relative
distance
CAM2
Two Points
P3
P2
CAM1 CAM1 CAM1
Specify relative
CAM3
distance
Apply
Specify number of
copies CAM2
P1
CAM1
CAM1
You can also use two points mode to
make multiple copies.
Lesson 1. Let's change the reference designator of the component you entered. Click Edit Æ
Component Æ Change Attribute from the menu bar, and click the component.
P1
Click
2. Review the reference designator of the component you have changed. Click
(Query Data) from the toolbar, and click that component.
P1
• Part Name
• Reference Designator
• User Defined (text)
Cutoutpoint ofCharacter
Ref. Point: Specify the reference the text.
Framed
Mirror in the X-axis direction. text
Rot. Angle
Specify the angle of rotation performed during dragging.
Style
Reverse Frame
Lesson 1. Let's input a component symbol. Click (Add Component Symbol) on the tool bar.
Symbol : Ref-Des
Method : Below Comp.
Select Comp. : R1
Char.Width : 1.27
Height : 1.27
Spacing : 0.1
Line Spacing : 0.0
Pen Width : 0.1
P1
Note
Layers on Which Component Symbols Can Be Input
You can input component symbols on the layers that are defined as follows in the
Technology Editor.
Creates a list
Generates text
Click
Hole Shape Hole Dia from-to Plating Hole Type Drill Type Gen. Text Symbol Type
Round 0.7 Through Plated Undefined Normal 0.7 String
Round 2.0 Through Unplated Undefined Normal 2.0 String
Click
Click Close.
Click
Click Click
! Caution The pads used for hole drawing must have been copied to PCB in advance.
Padstack mode
Specify the target of cutting and its pitch if the padstack
does not contain resist data.
Lesson 1. Let's cut symbol marks. Click Utilities Æ Cut Symbol Mark on the menu bar.
Click
Note The Cut Symbol Mark command is useful in editing errors detected by Area MRC
(Symbol Mark Check).
Files
Specify the photo data you want to
input (the file extension is .phd).
Machine Name
Specify the Photo Machine that defines
the format of the target photo data.
Reference For details on document layers, refer to “About Document Layers” on Page 3-163.
Click
2. Input data.
P1
Files Destination
Specify the target PC Specify the layer to
board data or panel which data is input.
data you want to
input.
If checked, import
between document
Source
layers is enabled.
Specify the layer
(If unchecked,
from which data is
import between data
input.
layers is performed.)
Reference For details on document layers, refer to “About Document Layers” on the next page.
2. Input data.
For each layer processed by Board Designer, there is a layer called “document layer”
that has one to one correspondence to the data layer.
A document layer contains data (such as dimension lines and comments) that is not
necessary in CAM output but is necessary in printer/plotter output.
70.0 50.0
80.0
50.0
120.0
120.0
[Plotter output]
Click Utilities Æ Documentation Toolbox on the menu bar to display icons that you
can use to execute input commands for document layers.
z Viewing a Figure
In the Query Data command, you can specify Change Search Layer to display object
attributes of an active or visible layer in the Query window, or to measure the foil
spacing between two objects.
Attributes Æ
Query Data Depending on how you specify objects (Single Select or Frame Select), different
information is displayed. Single Select and Frame Select are explained separately
below.
Single Select When specifying a single object, attributes of the specified object and the shortest
distance from the previously displayed object are displayed.
Search Data
ON: Display the object attributes.
OFF: Display the coordinates of the specified point.
Detail
ON: Displays the construction point information for the
figure also.
OFF: Displays only the attributes of the figure.
Segment Unit
ON: Displays segments of the specified line.
OFF: Displays the whole specified line.
Ruler
ON: Displays the shortest distance from the previously
specified object.
OFF: Does not display the shortest distance.
Ruler Settings
Pitch: Specify the graduation pitch of the displayed ruler.
Spacing: When the ruler is displayed, generates an error message if the distance is equal to or less
than the specified spacing value.
Padstack Layer: Specify the layer to be searched.
Text Shape: Specify either rectangle or actual shape.
Search Data: ON
P1
Detail: OFF
Segment Unit: OFF
Ruler: ON
Search Data: ON P1
Detail: OFF
Segment Unit: ON
Ruler: OFF
Frame Select When you specify a frame, the following information in the specified frame can be
referenced:
• Get Total Pen Width
• Pad List
• Padstack List
• Get Total Data Count
TEXT
Search Data: ON
Detail: ON
Segment Unit: OFF
Ruler: ON
In-component: OFF
P1
Search Data: ON
Detail: OFF
Segment Unit: OFF
Ruler: ON
In-component: ON
P1
C10
IC1
Settings Dialog
Check:
Settings for checking or clearing error
marks.
Log:
Settings of whether check log is
maintained or not.
Disp:
Settings of whether or not to display
error marks.
Reference For details on the check items for Area MRC, refer to [Performing MRC by specifying an area] in the online help.
For Resist Check, Symbol Mark Check, and Metal Mask Check, only data on layers
with proper layer attributes are checked.
! Caution Data on user-defined layers are not checked in the Area MRC check.
Note However, data on user-defined layers are checked for the “Square Line Angle” check.
In addition, Visible for each target layer must be checked when Area MRC is
performed.
Executing Area 1. Click Check Æ Area MRC on the menu bar, and click MRC Settings....
MRC
Reviewing Area 1. From the panel menu, select View Error Marks, and click an error mark on the PC
MRC Error board.
Information
Click
Click
Clearing Area 1. In the panel menu, select Clear Error Marks and click Check All Area.
MRC Error Marks
Click
Click
Click
Lesson 1. Click Check Æ Area MRC on the menu bar, and click MRC Settings....
Missing Resist : ON
Symbol Check : ON
Text-Copper : ON
Missing Metal Mask : ON
(other items : OFF)
2. In the panel menu, click Check and then click Check All Area.
Click
Click
Click
4. To correct the error positions, click (Input Pad) on the toolbar, and select a pad
from the panel menu.
Click
From the PadSelect dialog box,
select “C2.4” and click OK.
Click
P1 P2
Input a pad on each error position.
Click
Click on a cell of the type
“Text-Copper” in the error list.
7. Click (Move) on the toolbar, and move the text that caused an error.
P1
10. Click Check Æ Area MRC on the menu bar, and perform the check again.
The following are additional functions of the common Settings dialog box used in
Component DRC, Area DRC, and Area MRC.
You can save settings for the check (such as “Che.” on/off and “Disp” on/off) into a
file, and later load these settings onto another PC board.
You can review the log of information, such as the user who performed the check
and time.
! Caution Whether or not to maintain log can be set in the Settings dialog box.
Reference The Query commands described in this textbook can be used only for Floor Planner and Placement/Wiring Tool.
For the Query commands provided for the other tools, refer to “Artwork Command Reference.”
Reference For the functions with , refer to the documentation that explains each function.
Referring to Objects
You can query various information on specified objects, such as component
attributes and coordinates, total wiring length of the net, and the layers with
figures. You can also use this command to check the design state of a board,
Attributes such as connection ratio, placement status, and engineering changes.
Query
The Query Data command has the following two modes.
Object Info – A mode that queries the information of figure data by specifying a single
object or an area.
PCB Data – A mode that queries the design state of a board.
Object Info
Select a type of figure data to query from the Target items, and click the figure data.
Target figure data and displayed information vary depending on each item.
Target: Component
When you specify component(s) by clicking a single object (Specify Single Object) or enclosing an area
(Specify Area), the configuration of components, such as Part Name, Pin Count, Footprint name, and
User Property, is displayed.
(1) Use the Component Selector dialog in which the Reference designator is listed to select a component.
The component selected from the list is highlighted and its information is displayed.
(2) Check the Auto-zoom check box and select a component with the Component Selector dialog.
The specified component is zoomed in and its information is displayed. The specified component is
(1) zoomed in and its information is displayed. Select Fix Zoom Ratio to keep the zoom ratio fixed and
(2) adjust the display position. (This can also be used with pins and nets.)
(3) (3) Check the item(s) of Output Information (Part , Package , FootPrint, and/or
Comp. in Placement Group check boxes) and select a component. The component information as well
as the information of each library (Part, Package, FootPrint) that makes up that component are
displayed. In the case of a component in a placement group, the components that are either directly
or indirectly connected by a placement group name for component or pin properties will be selected.
For example, when you want to check the library information of the part used in IC1, you can check
it on board without referring to the master component library (CDB).
The content of the component library displayed here is that of the component library in PCB, not
the master component library (CDB) that was referred to when a new board was generated. This
makes it possible to use the displayed information to compare the contents of the master
component library with that of the component library in PCB.
Reference For the component selector, refer to “Beginner's Training <PCB Design>.”
Reference For the relationship between the master component library (CDB) and the component library in PCB, refer
to “Master Training <Engineering Change/Operation>.”
There are two ways to select components, Specify Single Object and Specify Area. Different information is
displayed for each specification
[When selecting with Single Select]
Ref-Des Part Name Gate ID Place Side Limit
Coordinates Pin Assign. Name Pin Count Permitted Angle
Placement Angle Package Name Comp. Group Name Component Height Information
Place Side Footprint Spec. Assignment Phase Comp. Drc Grop
Component Symbol Footprint Name Part Assignment Lock Comp. in Placement Group
Stock Code (Technology) Attribute User Property
Example
Example
Example
Example
Target: Pin
When you click a component pin, the following pin information is displayed.
* Pin information can be specified only for a single object.
(1) … If Send To Design Rule Editor is selected, you can send pin names of specified data to Net
Objects dialog in Design Rule Editor. (This is also applied to when you select either Net,
Subnet, or Figure/Area.)
Coordinates Gate Pin Name (Gate ID)
Padstack Name Net Name
Ref-Des Attribute
(Original Ref-Des) Part Pin Name
(1) Part Name Part Pin Number
Pin Number (Pin Name) Part Pin Property
(Input/Output Attribute)
Example
From the Query Data command, you can send the selection state to the Design Rule Editor, and you
can also send the selection state in the Design Rule Editor to the Query Data command.
For details, refer to the online help for the Placement/Wiring Tool and the Design Rule Editor.
Target: Net
When you click a wiring pattern (line/area), an unconnected net, or a pin, the information about the net,
such as a net name, wiring status, and a net rule, is displayed.
* Net information can be specified only for a single object.
Net Name
Pattern Width of Individual Conductive Layers
(1) Wiring Status (Number of Pin Pairs, Unconnected Count, Total Wiring Length, and Via Count)
Wiring Rule (the net rules, such as Max/Min Total Length and Max Via Count)
User Property (the user property assigned to the net is displayed)
Example
Note To specify a net, aside from clicking on the canvas, you can select the net name from the list in
the Set Net Display Color dialog.
1. Select Attributes Set Net Display Color or click the Net icon on the edit-mode indicator.
2. Select a net name to query on the Set Net Display Color dialog.
Send to
Click the canvas
Click
Target: Subnet
When you click a wiring pattern (line/area) or a pin, the following net information of figures (subnets)
that connect to the specified figure on the same net is displayed.
* Subnet information can be specified only for a single object.
Net Name
Wiring Status (Number of Subnets in Same Net, Total Wiring Length, Via Count)
Wiring Rule (the net rules, such as Max/Min Total Length and Max Via Count)
Connected Component Pin
Example
Target: Figure/Area
The name of a figure, a layer name, a net name, and figure information are displayed. You can switch the
target figures by selecting the layer type in the Select mode. You can also measure the shortest distance
between the specified figures.
* Figure/Area information can be specified only for a single object.
(3) When Details is checked, the Query window displays the construction point information of the
figure, the pad attributes of the padstack, etc.
Example
Example
Example
Example
Target: Segment
When you click a wiring pattern or an area outline, the coordinates of the start and end points and the
width between them are displayed for each line segment.
* Segment information can be specified only for a single object.
(1) If you check the Details mode, the construction points and angles of the segments are displayed.
(2) If you check the Same Width check box, the total length of the series of segments that preserve the
(1)
(2) same width with the segment clicked is displayed.
Layer Name
Length
Construction Point Information (when Details is selected)
Example
Example
Example
Example
PCB Data
You check the design information of a PC board, such as connection ratio, placement
status, and design changes.
You can check the following PC board information.
Note When you check the wiring status, the dialog “Recalculate unconnected nets?” is displayed in order to
calculate the unconnected count and the connection ratio. If you click Yes, all nets are recalculated. Click
Yes to confirm the correct wiring status.
Click
You can set the net construction in the Set Net Display Color dialog, but if you want to carry out net
reconstruction to all nets, you can execute a wiring status command. If you carry out net construction for
each net, you should set it in the Set Net Display Color dialog.
Ref-Des
Part Name
Footprint
Stock code
Pin Count
Placement Side
Ref-Des
Part Name
Footprint Name
Placement Side
Parent Component
Placement Priority
Click
Reference For a part, package, and footprint, refer to “Target: Component” on page 3-178.
P1
P1
P2
P1
P1
P2
P2
P1 P1
P2
P2
(4) Snap To
Edge
Center
(5) Text
Rectangle True Shape
(1)
Target Canvas:
Specify a canvas to set layer attributes.
zMain Canvas
zSub-canvas 1
zSub-canvas 2
zSub-canvas 3
Display
Display
Color Select the color to be displayed on the canvas from the color box
icon. The color box icon starts up by clicking inside the frame.
In addition to the four modes above, tone patterns such as Cross1 are also
available.
Hatching Pitch Enter the painting angle and pitch with the keyboard
Hatching Angle when Display Mode is Hatching.
Layer Type : Layer Type Column (conductive layer, symbol mark, etc.)
related to the layer name.
Object Settings: Columns of Object Settings for both the Data Layer and
the Document Layer
Display Document Layer: Following columns related to the document layer: Visible,
Color, Display Mode, Hatch Patch, Hatch Angle
Priority: Specify the layer display order on the canvas with a number from 0
to 1000.
Priority 1
Priority 5
Reference For the document layer, refer to “About Document Layers” on page 3-163.
Reference For a layer comment, refer to “Editing Layer comment” on page 3-199.
Note If you check View Æ Reference Act Layer on the menu bar, the active layers specified
to be hidden in the Layer Settings dialog box are displayed.
Click
Click New.
2. In the New Visible Layer Group dialog box, specify a visible layer group name and
check the layers to be displayed.
3. The created visible layer group name is listed in the Edit Visible Layer Groups dialog
box. You can change or delete the setting or change the list order as needed.
4. You can select the defined visible layer group(s) from the pull-down menu in the
edit-mode indicator at lower right on the canvas or by launching the Visible Layer
Group dialog box.
Click
Click
Note After setting visible layer groups, you can save them in a parameter resource.
The saved parameter resource can also be used for other PC board files.
Reference For saving and loading a parameter resource, refer to “Loading and Outputting parameter.rsc” on page 3-35.
! Caution Change Order of Layer Name cannot be applied to active layers in Placement/Wiring Tool, which lists only their
conductive layer numbers.
Reference For the Layer Settings dialog box, refer to “Setting the Display Status of Layer” on page 3-194.
Note The display order of layer names can also be set with Technology Editor.
If you generate PC board data using technology in which the display order of layer
names has been changed at the technology registration, the board data will be
created reflecting the changed contents.
In addition, for board data of newly generated board, you can update the display
order of layer names that has been changed with the technology by using PC Board
Technology/Component Update Tool.
Reference For how to set the display order of layer names with Technology Editor, refer to “Master Training <PCB Design
Library>.”
Reference For PC Board Technology/Component Update Tool, refer to “Master Training <Engineering
Change/Operation>.”
You can set and edit the comment for layer names.
The layer comments set or edited can be referred as comment information of board
layer names in the Layer Settings dialog box and the active layer.
! Caution The layer comments set or edited in the Edit Layer Comment dialog box cannot be displayed in the active layer
of Placement/Wiring Tool, where only conductive layer numbers are displayed.
Environment Æ You can display the layer comments edited in the Edit Layer Comment dialog box as
Option... layer names in the tools that display layer names, such as the Layer Settings
dialog box, the active layer, the Change Order of Layer Name dialog box, the Edit
Visible Layer Groups dialog box, etc.
Reference For the Option dialog box, refer to “Setting Display Environment” on the next page.
The Option dialog box has parameters for the following two
environments
Reference For searching objects, refer to “Setting Search Condition” on page 3-204.
(*1)
(*2)
Display Font/Ref-Des
Specify the font that is used when Ref-Des Display
is ON. (*This is also used in displaying pin numbers.)
Display Font/Group ID
Specify the font for group areas and group names
that are displayed when you design groups.
Precision
The number of decimal places for real numbers displayed
on the canvas or the Query window.
Reference For the display option of Via from-to, refer to “Displaying Via From-to” on page 4-11.
Reference For the display option of Block Area, refer to “Master Training <Engineering Change/Operation>.”
Reference For the display option of Layer Name, refer to “Displaying a layer comment as a layer name” on page 3-199.
! Caution Custom colors are available only for Windows. For UNIX, the display color is 24 colors.
Ref-Des -- Specify the display parameters for Reference designator that are displayed when you selected
View Æ Ref-Des on the menu bar and set it to ON
Ref-Des/Target
All Comp. : Displays the Reference designator of all components.
Specified Comp. : Displays the Reference designator only of the specified components.
When you specify components to be displayed, launch a command with which
you can select components (ex. Move Component) and click Attributes Æ
Set Display Comp. Attr. on the menu bar.
Ref-Des/View Side
Both : Displays the Reference designator of components placed on both sides.
A Side : Displays the Reference designator of only the components placed on A side.
B Side : Displays the Reference designator of only the components placed on B side.
Following Comp. Search Layer :
Displays the Reference designator of components placed on the current active
layer. Example) When the active layer is A side or the top layer, the
Reference designator is displayed only for the components placed on A side.
Ref-Des/Display Attributes
Displays the Reference designator of a component and the following attributes of the component
behind Reference designator:
(O).. Off-Board Component (S).. Placement Side Lock Specified Component
(J).. Jumper Component (A).. Angle Lock Specified Component
(B).. Decoupling Capacitor Component (R).. Reference Designator Lock Component
(L).. Position Lock Specified Component (F).. Group Net Component
Component Origin .. Specifies the display parameters for component origins that are displayed when you
selected View Æ Component Origin on the menu bar and set it to ON.
Component Origin/Target
All Comp. : Displays the component origins of all components.
Specified Comp. : Displays the component origins only of the specified components.
When you specify components to be displayed, launch a command with which
you can select components and click Attributes Æ Set Display Comp. Attr.
on the menu bar.
Pin No. .. Specifies the display parameters for Pin No. that are displayed when you selected View Æ Pin No.
on the menu bar and set it to ON.
Pin No./Target
All Comp. : Displays the pin numbers of all components.
Specified Comp. : Displays the pin numbers only of the specified components.
When you specify components to be displayed, launch a command with which
you can select components (ex. Move Component) and click Attributes Æ
Set Display Comp. Attr. on the menu bar.
Comp. Group .. Specifies the shape parameters for component group areas that are displayed when you
selected View Æ Component Group on the menu bar and set it to ON.
Component Group/Shape
Component Dragging ... Sets what is displayed when components are dragged using command such as the
Move Component command or the Align Components command.
Clipping
Cuts the part of a dimension
that overlaps the text Witness Line Offset
Frame Offset
The Option dialog box has parameters for the following two
environments.
Rectangle Polygon
Hold Click
P1 P2
P1
P3
P4
P6
Release
P2 P5
・ Press and hold the mouse button at the place ・ Click Frame Select in the assist menu.
without objects and drag the mouse.
・ Specify the polygon area by clicking.
・ After you enclosed the object with a rectangle,
release the mouse button. When you release ・ After you enclosed the object, click Data End
the button, the selection of the object is in the assist menu to complete the selection
completed. of the object.
Click free space to: Specify the operation when a place without objects is clicked during execution of a
command to specify objects.
Frame contains no object: Specify the operation to perform if there is no object when a frame is completed with
the polygon area selection mode.
Complete
Completes with no object selected and the polygon area selection mode ends.
Continue
Does not complete the frame and the polygon area selection mode continues. You can return to the
point you clicked immediately before completing and continue to recreate the frame with the Data
Cancel command.
Snap Point Search Conditions .. Controls the object for search target when a snap point
is used.
No Object Selected .. Sets whether the specified coordinates should be handled as an input point or an error
when there was no candidate for snap point.
Prohibit Construct Point Input (ON) Cancels the specified point as an error.
Prohibit Construct Point Input (OFF) Issues a warning and accepts the specified point.
Construct Point of Arc: Specify whether the snap point search of the figures with an arc searches for the
start/end point of an arc or the center point of an arc.
Start/End Point
When you click near the start/end point of an arc, that point is picked as a snap point. You can
also specify the arc center point as a snap point by clicking near the arc center point.
Click
Center
When you click a point on an arc, the arc center point is picked as a snap point.
Click
Target Layer: Sets the target layer for snap point search.
Visible Layer
The figures on the layer selected as a visible layer are the target for snap point search.
Designated Layer
The figures on the layer specified in Select Layer are the target for snap point search.
Search Target: Specify figures for the search target in Select Object.
Select Object
Specify the figure for the snap point search target from All Nouns, Pad, Line, Area, Constraints
Area, Hole, and Padstack.
! Caution * The setting of Select Layer and Select Object is valid only for the artwork type commands.
! Caution * Specify Trap is valid only for the artwork type commands
Individual Pick .. Specify the area recognized when a figure is clicked in the Individual Pick mode.
In the Individual Pick mode, the cursor becomes a rectangle (a search trap), and the figure
that overlaps with this rectangle is recognized. The search trap can be resized using “<” or
“>” keys on the keyboard.
Individual Pick/Line
Point Recognized when a construction point is clicked.
Series Recognized when a line is clicked.
Individual Pick/Area
Point Recognized when a construction point on an area outline is clicked.
Series Recognized when an area outline is clicked.
Whole Recognized when an area is clicked.
Area Pick .. Specify the area recognized when a figure is enclosed in the Area Select mode.
Area: Whole
Line: Whole
Area Area
Cursor Coordinates
Display coordinates for the
current cursor position.
Scale Display
Displays the origin mark and
coordinate scale.
Click Environment Æ Auto Security Copy and set it to ON (default) on the menu bar.
However, response is diminished when the file is overwritten at every Data End.
File Æ Therefore, the operator can specify the time to save the current status, without
Security Copy saving at every Data End.
You can save the current status by clicking File Æ Security Copy on the menu bar.
If the Auto security copy function is not activated, you should save the current status
at the appropriate time.
! Caution PC Board Shape Edit Tool and Artwork Tool do not have the security copy function.
The current status is always saved in the working file at every Data End.
z Using Subcanvas
View Æ Board Designer can provide three subcanvases besides the canvas.
Subcanvas The subcanvases allow you to mirror the entire PC board, to apply layer settings
different from that on the canvas, or to design on the subcanvas.
z Moving Origin
Environment Æ For PC board data or panel design data, you can move the origin as needed.
Move Origin
1. Click Environment Æ Move Origin on the menu bar, and enter the destination of the
origin directly on the canvas or enter the distance to move and click Apply on the panel
menu.
Click
Click Click
z Setting Highlight
You can display specified objects in specified colors.
Utilities Æ
The display color that you set here takes priority over the display colors specified in
Highlight the Layer Settings or Set Net Display Color dialog box.
! Caution Objects are highlighted only while you are editing a file. Switching modules or reopening the file clears the
highlight setting.
! Caution Editing a highlighted figure clears the highlight setting of the figure.
Highlighting is convenient:
z To change the display color of a particular object regardless of the colors that
have been specified for each layer.
z To highlight an object that meets certain conditions.
Click
2. Click Entry/Delete on the panel menu to launch the Highlight dialog box.
(1) Table Name ... Set the table name of a highlight color group.
You can register up to 5 table names.
(2) Display Color ... Set the highlight display color for the table name.
Double-click the cell and select a color from the color box icon.
(3) Hatching Pitch ... Set the hatching pitch for highlight display when the object
display mode is “hatching with width”.
(4) Hatching Angle ... Set the hatching angle for highlight display when the object
display mode is “hatching with width”.
3. Define the display color of the figure that you want to highlight in the setting table.
4. Select the table name that defines the highlight color that you want to use from Table,
and select a figure.
Click
Click
Select By Frame
Click
Clear
Click
3. Click File Æ Exit on the menu bar to end Design Rule Editor.
Note The changes you make here are reflected to the PC board database in real-time when
Board Design Rule Editor is ended.
Click
The Save command writes the current status in the database file without closing the
file. Therefore, you can continue the operation.
Repeat
Next
Another
Snap Point
Next Snap Point
Coordinates
X/Y-Coordinates
Relative Point
Division Point
Using Repeat
Repeat is an adjective used to input multiple objects at a time that are the same as
the one previously input.
Clicking Repeat displays a dialog box, from which you can specify the count and
pitch.
Repeat
Using Next
When an unexpected object has been recognized by a command such as (Query),
you can use an adjective called Next to cancel the currently recognized object and
search for the next adjacent object.
Next
Search
Search
An operation example is given below.
Next
Delete a pad.
If you have accidentally searched for a line with P1, specify Next to search for the pad.
When the next candidate was not found after repeating Next, the guide message “Returned to the first
selection.” appears and the first candidate object is selected.
Using Another
Another is an adjective used to display the next candidate in the temporary display
when multiple results are obtained by a command such as (Input Arc) command
in “Arc Tangent ” mode.
Target Whole
Gap 0.5
Gen. Cnt. 2
When you specify P1 and P2, offset lines are temporarily displayed downward in the traveling direction and
Another causes them to be generated upward.
! Caution Snap Point can be executed only once. Specify Snap Point each time it is required.
If you check Snap Point in the edit-mode indicator, Snap Point will always be activated.
! Caution You can search for objects even when they are not on the active layer.
Reference For detailed setting when using snap points, refer to “Setting Search Condition” on page 3-204.
Next Snap
Snap Point P1 Next Snap Point
Point
Snap Point P2 Snap Point P3
Snap Point P4 Snap Point P5
Snap Point P6
Command End
If a construction point on a PC board shape with P1 is searched accidentally, Next Snap Point allows you to
search for a construction point in the layout area.
Coordinates
OK Command End
X-/Y-coordinate input
Base point OK
Relative Point
P1
Relative Point
Relative
X=5 OK
P1 X=+5 Y=+4 Y=4
(1, 1)
P2 Command End
Command End
The attributes to be added to layers vary according to the purposes of the inside layers.
Positive layer
Mixed layer
Power plane and mixed layers require special specifications. We will describe the
procedures to design the layers from the next page.
Figures generated in a power plane layer are thermal or clearance lands only.
Place Components
Automatically generate
thermal/clearance lands
Wiring
Output
1. Register When registering a padstack, specify thermal/clearance land pad name for the
padstack conductive layer.
2. Define full Use Edit Technology to set “Power plane” as the Layer-Type for the conductive layer.
surface
3. Specify When executing Board Generation Tool, specify a signal name for the power plane
signal name layer.
4. Generate When you open a file with Placement/Wiring Tool, objects with the same signals as the
thermal/ Power Plane are automatically converted to thermal land, and the others are
clearance converted to clearance land.
lands Floor Planner Placement/Wiring Tool
(Normalize
land status)
You may input positive figures and negative figures to a mixed layer
(thermal/clearance).
Place Components
1. Register When registering a padstack, specify thermal/clearance land pad name for the
padstack conductive layer.
3. Input area Switch to Placement/Wiring Tool and input the area to be divided into islands.
4. Input an area.
4. Output For a mixed layer, the input positive and negative figures overlap with each other.
Therefore, when outputting the photo data, output positive and negative figures as
different data, and merge them on the film.
Lesson Open “exwir/[Board]” data for this lesson. Because layer 4 is a mixed layer, input an area
to Layer 4 for dividing into islands.
Place Components
CAM Output
2. Define the Enable Interstitial Via and Layer Combi. Limit. options.
Click
Check Enable Interstitial Via and
Click
Layer Combi. Limit..
Enable Interstitial Via
Check this option if you are using interstitial
vias on PC boards. Otherwise, interstitial
vias cannot be used on PC boards.
1. Double-clicking
2. Switching the active layer
1. Double-clicking
Double-clicking the snap point
will generate an interstitial via.
Click
Click
Interstitial via from 1 to 5
Note If it is difficult to change the active layer on the canvas because there are
too many conductive layers, you can also change the active layer from the
Cond. Layer dialog box.
Click
! Caution You cannot generate vias on the layer whose layer-type is power plane layer in the From-to specification.
Layer 5
The active layer changes from Layer 2 to Layer 5 and a via from Layer 1 to Layer 6 is generated.
• If you change the active layer from Layer 1 to Layer 2 with FromTo = 1-6
Via for Layer
Layer 1 1 to 6
Layer 1
Click
Layer 2
The active layer is switched from Layer 1 to Layer 2 and via for Layer 1 to 6 is generated.
Click
From-to mark is
displayed
zDirection
zLayer
[Direction]
This mark indicates whether the via extends
from an active layer toward the front or
towards the rear side.
Penetrates the
Penetrates the front front side Penetrates the
[Layer] and rear sides rear side
This mark shows a layer by a scale and
From-to layer by a vertical bar.
Layer 1 to 5 Layer 2 to 4
BLP
ASCII output
<Sample Output>
You can output the following information using Board List Processor:
Specify the target file Specify the starting column position, the maximum number of characters,
for ASCII output data. and the alignment setting to make the output list easier to read.
1. From CAD File Manager, select PC board data or panel data, and click Tool Action
Board List Processor on the menu bar.
Click
Click
Click
Append the items to be output to
Click Output list from Data.
Click Output.
Click
Note You can review the output results by clicking Option View Output on the menu
bar. This way you do not have to open the output file.
3. Save the output list and its format you have specified into a parameter file by clicking
File Parameter File Save from the menu bar.
Note Board List Processor also allows you to merge the output with csv files and set headers
and footers.
Reference For details on how to set parameters for each item and define the output format, refer to the online help.
Pre-processing
Read Write Read Write
PCB PNL
Intermediate data
Post-processing
Printer/plotter
output
The data flow for printing is shown in the figure above. Internally, the intermediate
plotting data for CR-5000 is output from the PC board and then converted to the
associated printer/plotter format before output.
Output objects
Now you will learn how to set each option on the Print dialog box.
The first two print options, the output layer and the draw mode, described in the
previous pages are defined on the Layer Settings dialog box for board data (panel
data).
Simple
Solid
Reference For details on the Layer Settings dialog box, refer to “Setting the Display Status of Layer” on page 3-194.
(2)
When you set the selected printer or plotter as a default target, the device is
automatically displayed in the Plotter Label field the next time you open the dialog
box.
Click
Property 4. Property
Define paper and color settings.
(2) (3)
The property set consists of parameters on the Paper tab, such as paper size,
orientation, and margins, as well as parameters on the Color tab, such as enabling or
disabling the pallet set.
(2) Paper
Set the appropriate paper parameters for printing on the Paper tab.
zSize
zOrientation
zMargins
zSize
Height
zOrientation
Select the paper orientation. When Automatic is selected, the optimum orientation is
determined based on the data.
zMargins
Specify the paper margins. The margin settings are used when automatic scale and
automatic offset settings are selected.
Top
Left Right
Bottom
(3) Color
Set color related settings for printing. Select the Color tab and set appropriate
parameters.
Specify whether the pallet set information is used when print operation is performed.
Always enabled
Can be configured
Add... : Saves the displayed pallet set with different file name.
Delete : Deletes the displayed pallet set.
OK : Updates the displayed pallet set and exits the dialog box.
Cancel : Exits the dialog box without updating the displayed pallet set.
zClipping
zMirror
zRotate
zScale
zOffset
zClipping
Specify the drawing area.
On : Draws data in the area displayed on the canvas.
Off : Draws all data in the displayed area.
zMirror
Specify the settings for mirroring process.
zRotate
Specify the setting for rotating process.
zScale
Specify the setting for scaling process.
Automatic: On The optimum scaling will be calculated based on paper size and margins.
Automatic: Off Scaling values must be set.
zOffset
Specify the setting for offset process based on the origin of the drawing area.
Automatic: On Offset values will be calculated based on paper size and margins so that the central
point of the data becomes the center of the drawing area.
Automatic: Off Offset values must be set.
X offset
Y offset
Reference For details on [Read Parameters] and [Save Parameters], refer to the online help.
Board names and reference designators are output only when View Æ Ref-Des is
Board name/
Reference selected on the menu bar.
designator print
parameters
Board Designer Board Producer
Chara. Height
Chara. Chara.
Spacing Width
Pen Width
9 types
Nowidth
Width
Hatching
Painting
Note For panel data, you can output board names (displayed when the subboard display
option is set to Simple) only when they are displayed on the canvas.
Reference For details about the setting, refer to the previous page.
Board Designer
Reference For details about the setting, refer to the previous page.
Board Designer
Lesson 1. Make simulative drawing for the PC board data on the screen as shown below. Use
the following board data:
Plotter Label
X-Window
Coordinate Conversion
Scale : Automatic
Offset : Automatic
Click Property.
Paper
Size : A4
(4) Orientation : Landscape
Click OK.
Click
Click
Click Ref-Des.
Click
Ref-Des
Plot Mode : Nowidth
Click OK.
Click
Click
Pre-processing
Read Write Read Write
PCB PNL
Intermediate data
Post-processing
Printer/plotter
output
In the same way as in the previous section “Printing (Hardcopy Image),” the data flow
is divided into two parts: pre-processing and post-processing. The pre-processing part
provides the following functions:
PC board drawing Output Plotter Specify Drawing Attribute for Drawing of Each
program functions Output Destination Positive/Negative figure
Output Format Specify Drawing Attribute for Each Specified Component
Output Paper Size Reference Designator
Paper Orientation Specify Drawing Attribute for Pin Attribute Figure
Rotate Draw Reference Designator
Scale Specify Drawing Attribute for Each Specified Net Attribute
Offset Specify Drawing Attribute for Drawing of Specified Net Name
Clipping Drawing Unconnected Net
Select Drawing Target Layer Drawing of Specified Figure
Specify Pen/Palette Numbers Specify Drawing Attribute for Each Specified Hole
Drawing Shape Draw Test Points
Output Mirror by Layer
From CAD File Manager, select the PC board data (panel data) you want to plot, and click
(Plot tool) on the tool box.
Click
Specify target PC board file 1. Specify PC board file name or panel file name to be output (required item)
name/panel file name
Specify the PCB (PNL) file name to be plotted.
In Plot Tool, the content of items that have been once specified can be saved in
parameter files, which can be loaded later if necessary.
To load an existing parameter file, select a parameter file in the file selector.
Specify Output
Destination
3. Specify Output Target
Specify the plotter label name for the output target. You can output directly to the
connected plotter or printer, or output to the specified file in the format for
various plotters and printers. When you select the device for file output, a field to
specify the file name is displayed.
(2)
(2)
CR5000
CR3000
LIPS
HP-GL
Paper Parameters
4. Specify paper size/orientation
Specify parameters for the paper used in printing.
The following settings are
available for output paper.
Size
Orientation
Size
Select output paper size from the pull-down menu.
You can set the Width and Height fields only when Specify Size is selected.
Landscape
Portrait
Orientation
Select the paper orientation. When Automatic is selected, the optimum
orientation is determined based on the data.
Rotate
Scale
Offset
Clipping
Option Unit
Rotate
Specify the setting for rotating process.
Scale
Specify the setting for scaling process.
Automatic: On Automatic: Off
The optimum scaling will be calculated Scaling values must be set.
based on paper size and margins.
Offset
Specify the setting for offset process based on the origin of the drawing area.
Automatic: On Automatic: Off
Offset values will be calculated based on Offset values must be set.
paper size and margins so that the central
point of the data becomes the center of the
drawing area.
Specify Clipping
Draw only the specified area of the PC board data.
Option Unit
Specify unit for the coordinate option settings.
mm/inch/mil/micron
Specify drawing
6. Specify drawing page
page
Set the combination of drawing target layers and output format for each page.
A “page” is a unit for drawing. Plot Tool outputs drawing data for each page.
Note You can preset multiple pages and have them output in one operation.
Click
(5) Page-Settings
Specify output layers and output format for each page.
Click
(b)
(a)
(c)
(a) Displays page names that have been registered with Append Page.
Click each individual page name to specify parameters when plotting the
page. You can also use to change the page order
(plotting order).
(b) Switch tabs to specify each setting item.
You can specify the following eight items.
(c) Each item has its own settings, which will be explained in the following
section.
Drawing Layer
Drawing Layer
Layer Name: Specify PC board layer name
Output: Specify output target layers. Select layer(s) you want to output.
Pen/Palette: Specify pen number and palette number.
Drawing Mode: Select a drawing shape from the following six types.
Widthless
Width
Tone Paint the inside using the specified
Hatching 1 pallete number.
Hatching 2
Paint Draw outline using the specified
pen number, and paint the inside
using the specified pallete number.
Angle 1
Positive/Negative
Positive/Negative
[Draw Figure]
Select whether to draw positive figures or negative figures (thermal/clearance
lands in padstacks, and mesh figures in mesh planes) in the drawing layers.
• Draw both positive and negative figures
• Draw positive figures only
• Draw negative figures only
[Negative Area]
Draw negative areas using Nega-Area creating function of Photo Tool.
Specify the following settings for nega-area drawing:
• Base area layer
• Base area pen width
• Base area outside offset
• Mirror
• Draw Mode etc.
Component/Ref-Des Component/Ref-Des
Specify special drawing attributes for figures that belong to the reference
designators specified in Drawing Layers.
You can specify the following attributes for reference designators.
• Drawing Mode
• Pen/Palette numbers
[Draw Attribute on Pin]
When checked, special drawing attributes can be specified for figures that
belong to pins.
[Ref-Des, Pin Number/Pin Name]
If you want to draw reference designators, pin numbers or pin names for
display on the canvas, specify the placement side for these components from
among A Side, B Side, or Both Sides. You can set the drawing attributes
during drawing with the [Parameters] button.
[Specified Drawing Target Comp.]
If this is checked, you can set the component to use for drawing with the
[Target Comp. Settings] button.
[Display Draw Data Only]
When checked, only rows specified as plotting targets are displayed in the list.
[Specified filter for Ref-Des]
Filter reference designators to display only reference designators that match
with the conditions.
[Destination]
The destination set for each component is displayed.
Note
The [Ref-Des] does not depend on Drawing Layers. You can draw them without
specifying Drawing Layers.
Net Attribute
Net Attribute
Specify special drawing attributes for each signal attribute of nets (Normal net,
Power net, Ground net, or Temporary net) in drawing layers.
You can specify the following attributes for net attributes.
• Drawing Mode
• Pen/Palette numbers
[Display Draw Data Only]
When checked, only rows specified as plotting targets are displayed in the list.
Net
Net
Specify special drawing attributes for nets specified in drawing layers.
You can specify the following attributes for net names.
• Drawing Mode
• Pen/Palette numbers
[Draw Unconnect Net]
When checked, unconnected nets are plotted in the mirror mode using the
specified pen number.
[Display Draw Data Only]
When checked, only rows specified as plotting targets are displayed in the list.
[Specified filter for Net name]
Filter net names and display only nets that match with the conditions.
[Import Net display colors]
Assign pen/pallet numbers used for drawing nets based on the net display
colors of System Designer or Board Designer
When imported, colors are converted to pen/pallet numbers that corresponds to
plotter labels.
If you want to specify pen/pallet numbers corresponding to display colors, click
PalletSet-Settings and open the PalletSet dialog to specify them.
Click
Click
Note [Draw Unconnected Net] does not depend on Drawing Layers. You can draw them
without specifying Drawing Layers.
Figure Object
Figure Object
Specify special drawing attributes for figure objects specified in drawing layers.
You can specify the following attributes for figure objects:
• Drawing Mode
• Pen/Palette numbers
You can specify the following figure objects:
Hole Hole
[Specified Setting Target]
Specify special drawing attributes for hole figures specified in drawing layers.
You can specify the following attributes for hole figures:
• Drawing Mode
• Pen/Palette numbers
You can specify the following. The edit menus will change accordingly, when you
switch between radio buttons.
Specified Plating
Specified From-To
Specified Dia./Kind
ICT
Ict
Draw test point (TP) information on the PC board (TP path, TP names, and TP
position marks).
Reference For details on test point generation command and prior reference nets, refer to online help.
[Fill Background]
Specify a pallet number used to paint the background of TP names.
-1: The background of TP names is blanked out (erased).
0: The background of TP names is not painted.
Numbers greater than 0: Paint the background of TP names using the
specified pallet number. (Overlay)
[Height]
Specify character height to draw TP names.
0.0: Calculate automatically based on the PC board shape and the layout area.
0.0 < H ≤ 2000 mm: Draw TP names using the specified height.
[Draw Position]
Specify a drawing position of TPs from the following nine options:
Lower Left Lower Center Lower Right
Center of Left Center Center of Right
Upper Left Upper Center Upper Right (default)
[Mirror]
Specify a mirroring mode when ICT is plotted.
! Caution ICT drawing does not depend on Drawing Layers. You can draw them without specifying Drawing Layers.
! Caution You can draw ICTs only if you have input test points (TPs) in Board Designer.
Reference For details on test point generation command and Prior Reference Nets, refer to online help.
Hole diameter/kind > Penetration attributes > Plating attributes > Figure object > Net >
Net attributes > Pins
Lesson Use the following conditions to output the drawing data to the screen “DISPLAY”, and
review the output image.
1. Select the file set [exwir/[Board]], and click (Plot Tool) in the tool box of the CAD
File Manager.
Click Page-Settings.
Click
Scale : Automatic ON
Offset : Automatic ON
Click
Click Close.
3. Perform drawing.
Click
Click OK.
Click
Click
You can draw PC boards from the command line without using Plot Tool.
<XX>zplot.exe [parameters] ↓
Output layer (Drawing mode & Pen No.) Output file name
When executing the above command, intermediate data will be generated with the file name specified in
the “-o” option and the file extension “.pld” into the folder where the command was issued.
Next, use the post-processing program “post1.bat” to output the already generated “sample.pld” to
“DISPLAY”.
Example If you want to use the parameter file “plot.plp” (which you've created in a previous lesson) to draw PC
board data “exwir.pcb” to a plotter label named “DISPLAY”:
<XX>zplot.exe -p plot ↓
Parameter file name
When you specify a parameter file, you do not need to specify the target PC board data on the command
line because it is already included in the parameter file.
Next, use the post-processing program “post1.bat” to output the already generated “sample.pld” to
“DISPLAY”.
<XX>post1.bat plot.pld ↓
As described above, you can use the parameter file generated from Plot Tool, and also
create a new parameter file from the command line using the “-p:mkparam” option.
Example If you want to create a parameter file “prm.clp” to be used for drawing the PC board data “exchk.pcb”:
Note You can specify both parameter file and optional parameters at the same time; in this
case, optional parameters take priority.
! Caution On UNIX, the post-processing program is named “post1.sh”. Also, you must add “-r” when you specify
intermediate data.
<XX> post1.sh -r plot.pld
! Caution When you install CR-5000, the post-processing program “post1.bat/sh”, which generates output to DISPLAY, is
provided by default. You need to create new post processing programs in order to output to printers/plotters.
The newly created post-processing programs will be named “post1.exe/sh”, “post2.exe/sh” ... and so on.
Reference For details on how to create the post-processing program (post.bat/sh), refer to the online documentation.
Reference For details on the batch program “zplot.exe/sh”, refer to the online help [Batch Programs].
Serial ID C2A1001E