1

Iyowu Muyiwa .O

Advantages of Field
Programmable Gate
Array (FPGA)

Muyiscoi Press

Lagos . London . Boston

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 To Dr. Atayero
for giving us this assignment

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Iyowu Muyiwa .O
Covenant University
Department of Electrical and Information Engineering
Ota, Ogun State,
Nigeria
muyiwa@muyiscoi.com

Cover Design by Iyowu Muyiwa

©2010. Muyiscoi Press
All rights reserved. This work may not be translated or copied in whole or in part without the writ-
ten permission of the publisher (Muyiscoi Press user Boston, c/o Springer Science+Business Media LLC, 233 Spring
Street, New York, NY 10013, USA), except for brief excerpts in connection with reviews or scholarly analysis. Use in
connection with any form of information storage and retrieval, electronic adaptation, computer software, or by similar
or dissimilar methodology now known or hereafter developed is forbidden.
The use in this publication of trade names, trademarks, service marks and similar terms, even if they
are not identified as such, is not to be taken as an expression of opinion as to whether or not they are
subject to proprietary rights.
www.muyiscoi.com

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Preface

This book provides an Introduction to Field-programmable Gate Arrays(FPGA). It also gives an

indept explanation of the advantages of FPGA. It was written specifically as an assignment on the
course but can also be used as a reference material by other students.

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Table of Contents
Preface..................................................................................................................................................5
Introduction..........................................................................................................................................6
Field Programmable Gate Array...........................................................................................................9
FPGA Architecture.........................................................................................................................10
Applications of FPGA...................................................................................................................12
Major Manufacturers of FPGA IC's...............................................................................................13
Advantages of FPGA..........................................................................................................................14
DSP design.....................................................................................................................................14
IP integration..................................................................................................................................14
Tool support...................................................................................................................................15
Transition to structured ASICs.......................................................................................................15
Flexible development.....................................................................................................................15
Reduced Development Time and Risk...........................................................................................16
Maintaining a market in your supply chain...................................................................................16
Simplification of Logistics.............................................................................................................16
IP Blocks........................................................................................................................................17
Harsh Environments......................................................................................................................17
Long-Term Availability..................................................................................................................17
Performance ..................................................................................................................................18
Time to market...............................................................................................................................18
Cost ...............................................................................................................................................18
Reliability ......................................................................................................................................19
Long-term maintenance ................................................................................................................19
Standardization..............................................................................................................................19
References..........................................................................................................................................20

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Introduction

Field-programmable Gate Arrays are IC's which can be reprogrammed on the Fly. This makes them
especially useful and leads to reduction in development costs as well as a host of other advantages.
Over the years, FPGA has grown to be known and respected in the industry. It has been
standardized to use the Very high speed Hardware Description Language (VHDL) for its
programming and this is vendor independent. Several models of VHDL chips are available today
and useful for different applications. In this book, we will look at FPGA, its architecture, major
uses, companies that produce it and finally, its numerous advantages.

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Field Programmable Gate Array

A field-programmable gate array (FPGA) is an integrated circuit designed to be configured by the

customer or designer after manufacturing—hence "field-programmable". The FPGA configuration
is generally specified using a hardware description language (HDL), similar to that used for an
application-specific integrated circuit (ASIC) (circuit diagrams were previously used to specify the
configuration, as they were for ASICs, but this is increasingly rare). FPGAs can be used to
implement any logical function that an ASIC could perform. The ability to update the functionality
after shipping, partial re-configuration of the portion of the design and the low non-recurring
engineering costs relative to an ASIC design (not withstanding the generally higher unit cost), offer
advantages for many applications.

FPGAs contain programmable logic components called "logic blocks", and a hierarchy of
reconfigurable interconnects that allow the blocks to be "wired together"—somewhat like a one-
chip programmable breadboard. Logic blocks can be configured to perform complex
combivnational functions, or merely simple logic gates like AND and XOR. In most FPGAs, the
logic blocks also include memory elements, which may be simple flip-flops or more complete
blocks of memory.

In addition to digital functions, some FPGAs have analog features. The most common analog
feature is programmable slew rate and drive strength on each output pin, allowing the engineer to
set slow rates on lightly loaded pins that would otherwise ring unacceptably, and to set stronger,
faster rates on heavily loaded pins on high-speed channels that would otherwise run too slow.
Another relatively common analog feature is differential comparators on input pins designed to be
connected to differential signaling channels. A few "mixed signal FPGAs" have integrated
peripheral ADCs and DACs and analog signal conditioning blocks allowing them to operate as a
system-on-a-chip. Such devices blur the line between an FPGA, which carries digital ones and zeros
on its internal programmable interconnect fabric, and field-programmable analog array (FPAA),
which carries analog values on its internal programmable interconnect fabric.

Illustration 1: Altera Illustration 2: Altera 9

Cyclone II FPGA IC Statix IV FPGA IC
FPGA Architecture
The most common FPGA architecture consists of an array of logic blocks (called Configurable
Logic Block, CLB, or Logic Array Block, LAB, depending on vendor), I/O pads, and routing
channels. Generally, all the routing channels have the same width (number of wires). Multiple I/O
pads may fit into the height of one row or the width of one column in the array.
An application circuit must be mapped into an FPGA with adequate resources. While the number of
CLBs/LABs and I/Os required is easily determined from the design, the number of routing tracks
needed may vary considerably even among designs with the same amount of logic. For example, a
crossbar switch requires much more routing than a systolic array with the same gate count. Since
unused routing tracks increase the cost (and decrease the performance) of the part without providing
any benefit, FPGA manufacturers try to provide just enough tracks so that most designs that will fit
in terms of LUTs and IOs can be routed. This is determined by estimates such as those derived from
Rent's rule or by experiments with existing designs.
In general, a logic block (CLB or LAB) consists of a few logical cells (called ALM, LE, Slice etc).
A typical cell consists of a 4-input Lookup table (LUT), a Full adder (FA) and a D-type flip-flop, as
shown below. The LUT are in this figure split into two 3-input LUTs. In normal mode those are
combined into a 4-input LUT through the left mux. In arithmetic mode, their outputs are fed to the
FA. The selection of mode are programmed into the middle mux. The output can be either
synchronous or asynchronous, depending on the programming of the mux to the right, in the figure
example. In practice, entire or parts of the FA are put as functions into the LUTs in order to save
space.

Illustration 3: Simplified example illustration of a logic cell

ALMs and Slices usually contains 2 or 4 structures similar to the example figure, with some shared
signals.

CLBs/LABs typically contains a few ALMs/LEs/Slices.

In recent years, manufacturers have started moving to 6-input LUTs in their high performance parts,
claiming increased performance.

Since clock signals (and often other high-fanout signals) are normally routed via special-purpose
dedicated routing networks in commercial FPGAs, they and other signals are separately

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managed.For this example architecture, the locations of the FPGA logic block pins are shown
below.

Illustration 4: Logic Block Pin

Locations

Each input is accessible from one side of the logic block, while the output pin can connect to
routing wires in both the channel to the right and the channel below the logic block.

Each logic block output pin can connect to any of the wiring segments in the channels adjacent to it.

Similarly, an I/O pad can connect to any one of the wiring segments in the channel adjacent to it.
For example, an I/O pad at the top of the chip can connect to any of the W wires (where W is the
channel width) in the horizontal channel immediately below it.

Generally, the FPGA routing is unsegmented. That is, each wiring segment spans only one logic
block before it terminates in a switch box. By turning on some of the programmable switches within
a switch box, longer paths can be constructed. For higher speed interconnect, some FPGA
architectures use longer routing lines that span multiple logic blocks.

Whenever a vertical and a horizontal channel intersect, there is a switch box. In this architecture,
when a wire enters a switch box, there are three programmable switches that allow it to connect to
three other wires in adjacent channel segments. The pattern, or topology, of switches used in this
architecture is the planar or domain-based switch box topology. In this switch box topology, a wire
in track number one connects only to wires in track number one in adjacent channel segments, wires
in track number 2 connect only to other wires in track number 2 and so on. The figure below
illustrates the connections in a switch box.

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 Illustration 5: Switch box topology

Modern FPGA families expand upon the above capabilities to include higher level functionality
fixed into the silicon. Having these common functions embedded into the silicon reduces the area
required and gives those functions increased speed compared to building them from primitives.
Examples of these include multipliers, generic DSP blocks, embedded processors, high speed IO
logic and embedded memories.

FPGAs are also widely used for systems validation including pre-silicon validation, post-silicon
validation, and firmware development. This allows chip companies to validate their design before
the chip is produced in the factory, reducing the time-to-market.

Applications of FPGA

Applications of FPGAs include digital signal processing, software-defined radio, aerospace and
defense systems, ASIC prototyping, medical imaging, computer vision, speech recognition,
cryptography, bioinformatics, computer hardware emulation, radio astronomy, metal detection and a
growing range of other areas.

FPGAs originally began as competitors to CPLDs and competed in a similar space, that of glue
logic for PCBs. As their size, capabilities, and speed increased, they began to take over larger and
larger functions to the state where some are now marketed as full systems on chips (SoC).

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Particularly with the introduction of dedicated multipliers into FPGA architectures in the late 1990s,
applications which had traditionally been the sole reserve of DSPs began to incorporate FPGAs
instead.

FPGAs especially find applications in any area or algorithm that can make use of the massive
parallelism offered by their architecture. One such area is code breaking, in particular brute-force
attack, of cryptographic algorithms.

FPGAs are increasingly used in conventional high performance computing applications where
computational kernels such as FFT or Convolution are performed on the FPGA instead of a
microprocessor.

The inherent parallelism of the logic resources on an FPGA allows for considerable computational
throughput even at a low MHz clock rates. The flexibility of the FPGA allows for even higher
performance by trading off precision and range in the number format for an increased number of
parallel arithmetic units. This has driven a new type of processing called reconfigurable computing,
where time intensive tasks are offloaded from software to FPGAs.

The adoption of FPGAs in high performance computing is currently limited by the complexity of
FPGA design compared to conventional software and the turn-around times of current design tools.

Traditionally, FPGAs have been reserved for specific vertical applications where the volume of
production is small. For these low-volume applications, the premium that companies pay in
hardware costs per unit for a programmable chip is more affordable than the development resources
spent on creating an ASIC for a low-volume application. Today, new cost and performance
dynamics have broadened the range of viable applications.

Major Manufacturers of FPGA IC's

The major manufacturers of FPGA are highlighted below

1. Xilinx
2. Altera
3. Lattice Semiconductor
4. Actel
5. Silicon Blue Technologies
6. Achronix
7. Quicklogic

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Advantages of FPGA

DSP design

DSP system design in programmable logic devices requires both high-level algorithm and hardware
description language (HDL) development tools. Major FPGA vendors offer DSP builder tools that
combine the algorithm development, simulation, and verification capabilities of Matlab and
Simulink with synthesis, simulation, and place and route.

These tools shorten DSP design cycles by helping designers create the hardware representation of a
DSP design in an algorithm-friendly development environment. The existing Matlab functions and
Simulink blocks can be combined with FPGA vendor blocks and vendor intellectual property (IP)
functions to link system-level design and implementation with DSP algorithm development. This
allows system, algorithm, and hardware designers to share a common development platform.

Designers can create a hardware implementation of a system modeled in Simulink in sampled time.
DSP tools contain bit and cycle-accurate Simulink blocks, which cover basic operations such as
arithmetic or storage functions. With the availability of such tools, designers are able to generate
and refine algorithmic designs in a fraction of the time that it took to hand code RTL.

IP integration

With the availability of multi-million gate FPGAs, to become significantly productive, the designer
has to leverage the use of IP as much as possible. Integration of a third party IP is not that easy to
perform, as one has to verify the IP to the targeted technology and then make sure that the IP meets
the area and performance specification.

But with FPGAs, the vendors themselves take the trouble of verifying the third party and in-house
developed IP for area and performance. The biggest advantage of platform based design is that it
supports integration of proprietary logic along with third party IP.

The challenge for any system-on-a-chip FPGA is to verify the functionality of the complete system
that includes processor cores, third party IP and proprietary logic. To perform this type of
verification, along with a high speed simulator, verification engineers also need a complete suite of
verification tools. To support system verification, the FPGA design methodology supports formal

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verification and static timing analysis.

Tool support

FPGA design flows support the use of third party EDA tools to perform design flow tasks such as
static timing analysis, formal verification, and RTL and gate level simulation.

Traditionally, FPGA design and PCB design has been done separately by different design teams
using multiple EDA tools and processes. This can create board level connectivity and timing closure
challenges, which can impact both performance and time-to-market for designers. New EDA tools
bring together PCB solutions and FPGA vendor design tools, helping enable a smooth integration of
FPGAs on PCBs.

Transition to structured ASICs

When the demand for the FPGA parts increases, FPGA vendors provide a comprehensive
alternative to ASICs called structured ASICs that offer a complete solution from prototype to high-
volume production, and maintain the powerful features and high-performance architecture of their
equivalent FPGAs with the programmability removed. Structured ASIC solutions not only provide
performance improvement, but also result in significant cost reduction.

With the advent of new technologies in the field of FPGAs, design houses are provided with an
option other than ASICs. With the mask costs approaching a one million dollar price tag, and NRE
costs in the neighborhood of another million dollars, it is very difficult to justify an ASIC for a low
unit volume. FPGAs, on the other hand, have improved their capacity to build systems on a chip
with more than million ASIC equivalent gates and a few megabits of on chip RAM. For high
volumes, a structured ASIC solution combines the cost advantage of ASICs with a low risk solution
of an FPGA.

Flexible development

Many FPGA devices provide dedicated functional blocks such as DSPs. This means that the
functional blocks of a system can be readily moved between software, compiled hardware, and DSP
inside the FPGA development. In addition to the different types of implementation different
parameters of each can be tested. For example, the application can be tested on many 8, 16 and 32

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bit cores at different clock speeds to see what provides the best power consumption or lowest cost.
We can fully develop and test the complete system before the first PCB is made.

Reduced Development Time and Risk

The number of hardware prototype cycles required to get a product to market can be significantly
reduced. Due to the flexible development approach the first prototype need only be made after the
system is fully working, tested and performance is understood. Also the actual PCB development
contains less risk. The PCB consists of a number of interfaces either bought in or constructed from
reference designs with the major parts of the development risk contained inside the re-
programmable FPGA device.
It is possible to reduce development time and risk still further with the increasing number of
commercial off-the-shelf (COTS) FPGA hardware development kits. If a suitable hardware platform
can be found your product can be produced with no hardware development. Many suppliers are
making generic products with combinations of I/O and FPGA devices. This can be used as a
development or low volume production hardware platform with all product IP contained inside the
FPGA.

Maintaining a market in your supply chain

Once a product is implemented in an FPGA based design the specific FPGA used can be changed
for an equivalent part with minimal re-development time. This has made the FPGA market
extremely competitive. In a conventional design, once a chip manufacturer is ‘sourced’ they can
relax and need put no additional effort into maintaining their position. However with the ability to
swap FPGA suppliers during production or even run suppliers in parallel the suppliers are motivated
to ‘stay’ on your PCB. In a recent meeting with CCL one large FPGA supplier started the meeting
by saying ‘We will better any like for like quote from any other supplier'.

Simplification of Logistics

Another advantage of the FPGA approach is that the PCB, although not simple, contains common
interface blocks. This PCB could be used for many different products allowing for economies of
scale and reducing complexity of logistics. The generic product can be manufactured in volume and
only programmed with the product IP at regional distribution hubs or even at point of sale. Another

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advantage of this approach is the product IP can be more tightly controlled and need not be
provided to ODMs or PCB manufacturing facilities.

IP Blocks

There has always been an active market for IP blocks. These are usually provided as VHDL or
linked netlists that can be implemented into an ASIC, Structured ASIC or FPGA. This market has
until recently been focused on chip manufacturers. With the increasing use of FPGAs in embedded
systems this market has expanded and many companies produce IP for sale or free distribution. As
with the selection of the FPGA device the IP blocks used can be changed at any time during
development or even in the field. This allows for the addition or upgrade of new features and also
possible on-going cost reduction options. This availability and market for direct IP has created some
interesting business models as more conventional players in this market attempt to retain their
‘locked in' customer base. For example, FPGA manufacturers are including processors and IP
blocks, often free of charge in some devices, in an attempt to lock their chip to a design. With so
many free processors and IP blocks, an article in Electronics Weekly asked the question, “does
anyone pay for processors any more?”

Harsh Environments

One of the most critical requirements is a qualified operational temperature between -40 and
+85°C. Many parts however can only be screened because the component manufacturer
often does not guarantee the needed temperature range. Since the functionality of many of
these components can now be programmed in FPGA, there is only one part which must be
in accordance with the requirements and this is the FPGA itself. The Altera Cyclone FPGAs
are defined for -40 to +85°C operation temperature. As required by standards like the EN
50155 railway norm the FPGA is used only in the specification range of the component data
sheet. It conforms to EN, CECC or IEC standards, is manufactured according to ISO 9000
and a second source is also available.

Long-Term Availability

Another important aspect is long-term availability. Many component manufacturers don't

agree on any long-term availability, some guarantee 5 years, and very few go up to 10 years.
This makes it difficult or impossible for the board manufacturer to support his product for

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more than 10 years. A significant example are mainstream graphics controllers which stay
on the market for a few months maximum. The advantage of FPGAs and their nearly unlim-
ited availability lies in the fact that — even if the device migrates to the next generation —
the code remains unchanged. This is in accordance with norms like the EN 50155 which
prescribes that customized parts like FPGAs must be documented to allow reproduction and
that the documentation and the source code must be handed out to the customer.

Performance

Taking advantage of hardware parallelism, FPGAs exceed the computing power of digital signal
processors (DSPs) by breaking the paradigm of sequential execution and accomplishing more per
clock cycle. BDTI, a noted analyst and benchmarking firm, released benchmarks showing how
FPGAs can deliver many times the processing power per dollar of a DSP solution in some

applications.2 Controlling inputs and outputs (I/O) at the hardware level provides faster response
times and specialized functionality to closely match application requirements.

Time to market

FPGA technology offers flexibility and rapid prototyping capabilities in the face of increased time-
to-market concerns. You can test an idea or concept and verify it in hardware without going through

the long fabrication process of custom ASIC design.3 You can then implement incremental changes
and iterate on an FPGA design within hours instead of weeks. Commercial off-the-shelf (COTS)
hardware is also available with different types of I/O already connected to a user-programmable
FPGA chip. The growing availability of high-level software tools decrease the learning curve with
layers of abstraction and often include valuable IP cores (prebuilt functions) for advanced control
and signal processing.

Cost

The nonrecurring engineering (NRE) expense of custom ASIC design far exceeds that of FPGA-
based hardware solutions. The large initial investment in ASICs is easy to justify for OEMs
shipping thousands of chips per year, but many end users need custom hardware functionality for
the tens to hundreds of systems in development. The very nature of programmable silicon means

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that there is no cost for fabrication or long lead times for assembly. As system requirements often
change over time, the cost of making incremental changes to FPGA designs are quite negligible
when compared to the large expense of respinning an ASIC.

Reliability

While software tools provide the programming environment, FPGA circuitry is truly a “hard”
implementation of program execution. Processor-based systems often involve several layers of
abstraction to help schedule tasks and share resources among multiple processes. The driver layer
controls hardware resources and the operating system manages memory and processor bandwidth.
For any given processor core, only one instruction can execute at a time, and processor-based
systems are continually at risk of time-critical tasks pre-empting one another. FPGAs, which do not
use operating systems, minimize reliability concerns with true parallel execution and deterministic
hardware dedicated to every task.

Long-term maintenance

As mentioned earlier, FPGA chips are field-upgradable and do not require the time and expense
involved with ASIC redesign. Digital communication protocols, for example, have specifications
that can change over time, and ASIC-based interfaces may cause maintenance and forward
compatibility challenges. Being reconfigurable, FPGA chips are able to keep up with future
modifications that might be necessary. As a product or system matures, you can make functional
enhancements without spending time redesigning hardware or modifying the board layout.

Standardization

All FPGA's irrespective of manufacturer are programmed using the Very High Speed Integrated
Circuit Hardware Description Language (VHDL). This makes it a very standardized platform and
ensures that there is no need to learn several languages when programming FPGA's.

Although FPGA's have some disadvantages such as the fact that it is slower than ASIC's, it's
advantages far outweigh the disadvantages. The wide usage of FPGA's today is a testament to that
fact.

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References
1. [Wikipedia] http://en.wikipedia.org/wiki/Field-programmable_gate_array

2. [Design reuse] http://www.design-reuse.com/exit/?

url=http://www.eetimes.com/showArticle.jhtml;jsessionid=3LHFKJXD0CBZAQSNDBGC
KHSCJUMEKJVN?articleID=26100997

3. [Canterbury consulting] http://www.canterbury-

consulting.co.uk/index.php/services/Advantages of FPGA devices.htm

4. [Time Logic] http://www.timelogic.com

5. [National Instruments] http://www.ni.com

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