B.E./B.Tech.

St. Xavier’s Catholic College of Engineering, Chunkankadai, Nagercoil – 629 003.

Second Semester
Information Technology (Common to CSE)
CS6201 - Digital Principles & System Design
Second Internal Assessment Test, March 2017
Time: 1½ Hours Maximum: 50 marks
ANSWER ALL QUESTIONS
PART – A (09 x 02 = 18 marks)
1. Realize 5 x 32 decoder using 3 x 8 and 2 x 4decoders with enable input.
2. Define decoder and its Application?
3. Define Moore and Melay model.
4. List out the application of multiplexer.
5. Write down the characteristic equation of SR flipflop?
6. Define priority encoder?
7. What is the difference between decoder and demultiplexer?
8. Write down the difference between sequential and combinational circuits?
9. What is a State assignment ?
PART – B (02 x 16 = 32 marks)
10. a. i) Design a 4-bit-magnitude comparator with three outputs:
A>B, A=B, A<B (16)
Or
10. b. i) Implement the following function using a multiplexer.
F(W, X, Y, Z)= Σm (0, 1, 3, 4, 8, 9, 15). (4)
ii) Explain with necessary diagram a BCD to 7 segment display decoder. (12)

11. a. Design the sequential circuit specified by the following state diagram using T flip-flop

(16)

Or

11. b. i) Design a BCD adder (10)

ii) Explain in detail carry lookahead adder (6)