You are on page 1of 5

DaVinci Processors & Zynq 7000 SoCs

A comparison has been made among different processors of DaVinci and Zynq 7000 SoCs.

DaVinci Processor:

Texas Instruments DaVinci is a family of system on chip processor that are primarily used in embedded video and vision
applications. Many of the processors in the family combine a DSP core based on the TMS320 C6000 VLIW DSP family and
an ARM CPU core into a single system on chip. By using both a general-purpose processor and a DSP, the control and media
portions can both be executed by processors that excel at their respective tasks. Later chips in the family included DSP only
and ARM only processors. This document includes processors which consists of both, DSP Core and ARM CPU. The release
date of each processor has been mentioned so to identify the latest model.
Below various Models of Davinci processors are listed along with their Parametric Table and Functional Diagram so a
comparison can be made for best parameters.

TMS320DM6446:

The TMS320DM6446 (also referenced as DM6446) leverages TI's DaVinci™ technology to meet the networked media encode
and decode application processing needs of next-generation embedded devices. This model was released in Dec 2005.

Model TMS320DM6446
Operating systems Linux
DSP/BIOS
Arm MHz (Max.) 405

Arm CPU 1-ARM926EJ-S core


Co-Processor ISP, OSD, VENC

DSP 1 C64x DSP core


Video acceleration VPSS
Audio Audio Serial Port
I2S
AC97 Audio Codec Interface
Standard Voice Codec Interface (AIC12)
Video port 2 Configurable Video Ports
USB 1 (USB Port With Integrated 2.0 PHY)
EMAC 10/100 Mb/s
DRAM 32-Bit DDR2 SDRAM Memory Controller with 256M-Byte
Address Space (1.8-V I/O)
Asynchronous 16-Bit-Wide EMIF (EMIFA) With 128M-Byte
Address Reach
SPI 1 (with 2 Chip Select)
I2C 1 (Master/Slave Inter-Integrated Circuit)
UART 3 (One with RTS and CTS Flow Control)

Functional Diagram of 6446


TMS320DM8168:

The DM816x DaVinci video processors are a highly integrated, programmable platform that leverages TI's DaVinci technology
to meet the processing needs of the following applications: video encode, decode, transcode, transrate, video security, video
conferencing, video infrastructure, media server and digital signage. It was released in Mar 2010.

Model TMS320DM8168

Operating systems Linux


Android
DSP/BIOS
Arm MHz (Max.) 1200
Arm CPU 1 ARM Cortex-A8
Co-Processor ISP, HDVICP2, HDVPSS, NF Engine, VCO
DSP 1 C674x
Video acceleration 3 HDVICPs
Video port (configurable) 1 HDMI TX
2 Input
2 Output
3 HD DACs
4 SD DACs
Audio Three Multichannel Audio Serial Ports (McASPs)
One Six-Serializer Transmit and Receive Port
Two Dual-Serializer Transmit and Receive Ports
DIT-Capable For SDIF and PDIF (All Ports)
USB 2 (Dual USB 2.0 Ports with Integrated PH)

PCI/PCIe 2 PCIe Gen2

EMAC 2x 10/100/1000
DRAM 2 (Dual 32-Bit DDR2 and DDR3 SDRAM Interfaces)
SPI 1 (One 40-MHz Serial Peripheral Interface (SPI) with Four Chip
Selects)
I2C 2 (Dual Inter-Integrated Circuit (I2C bus) Ports)
UART (SCI) 3 (Three Configurable UART, IrDA, and CIR Modules)

Functional Diagram of 8168


TMS320DM8148:

TMS320DM814x DaVinci video processors are highly integrated, programmable platforms that leverage the DaVinci processor
technology to meet the processing needs of the following applications to name a few: HD Video Conferencing - Skype
endpoints Video Surveillance DVRs IP Netcam Digital Signage Media Players and Adapters Mobile Medical Imaging Network
Projectors Home Audio and Video Equipment. This model was released in Mar 2011.

Model TMS320DM8148

Operating systems Linux


DSP/BIOS

Arm MHz (Max.) 1000

Arm CPU 1 ARM Cortex-A8

Co-Processor ISP, HDVICP2, HDVPSS, NF Engine, VCOP

DSP 1 C674x

Video acceleration 1 HDVICP

Video port (configurable) 2 Output


2 Input
2 SD DACs
1 HDMI TX

Audio Six Multichannel Audio Serial Ports (McASPs)


Dual Ten Serializer Transmit and Receive Ports
Quad Four Serializer Transmit and Receive Ports
DIT-Capable For S/PDIF (All Ports)
USB 2 (Dual USB 2.0 Ports with Integrated PHYs)

PCI/PCIe PCIe

EMAC 10/100/1000

DRAM Dual 32-Bit DDR2/DDR3 SDRAM Interfaces

SPI 4 (Each with 4 CS, 48MHz)


I2C 4 (Inter-Integrated Circuit (I2C Bus) Ports)
UART (SCI) 6 (Six Configurable UART/IrDA/CIR Modules)

Functional Diagram of 8148


ZYNQ 7000 SoCs
The Zynq-7000 AP SoC leverages the 28nm scalable optimized programmable logic used in Xilinx’s 7 series FPGAs. Each device
is designed to meet unique requirements across many use cases and applications. The Z-7010, Z-7015, and Z-7020 leverage
the Artix®-7 FPGA programmable logic and offer lower power and lower cost for high-volume applications. The Z-7030, Z-
7035, Z-7045, and Z-7100 are based on the Kintex®-7 FPGA programmable logic for higher-end applications that require
higher performance and high I/O throughput.

FPGA in ZYNQ:

The choice of FPGA gives designers the ability to match I/O, performance, feature quantities, packaging, and power
consumption to the target application—at the right cost points for each market.

Below is the Table to give comparison of three different models.

Device Name Z-7020 Z-7030 Z-7045

Device Part XC7Z020 XC7Z030 XC7Z045


Processor Core Dual ARM® Cortex™-A9 MPCore™ with CoreSight™
Processor Extension NEON™ & Single / Double Precision Floating Point for each processor
Maximum Frequency 866MHz Up to 1GHz Up to 1GHz
L1 Cache 32KB Instruction, 32KB Data per processor
L2 Cache 512KB
On Chip Memory 256KB
External Memory Support DDR3, DDR3L, DDR2, LPDDR2
External Static Memory 2x Quad-SPI, NAND, NOR
Support
DMA Channels 8 (4 dedicated to Programmable Logic)
Peripherals 2x UART, 2x CAN 2.0B, 2x I2C, 2x SPI, 4x 32b GPIO
Security AES and SHA 256b Decryption and Authentication for Secure Boot
Processing System to 2x AXI 32b Master, 2x AXI 32b Slave 4x AXI 64b/32b Memory AXI 64b ACP 16 Interrupt
Programmable Logic
Interface Ports
7 Series Programmable Artix-7 FPGA Kintex®-7 FPGA Kintex-7 FPGA
Logic Equivalent
Logic Cells (Approximate 85K (~1.3M) 125K (~1.9M) 350K (~5.2M)
ASIC Gates(4)
Look-Up Tables (LUTs) 53,200 78,600 218,600
Flip-Flops 106,400 157,200 437,200
Total Block RAM (# 36Kb 4.9Mb (140) 9.3Mb (265) 19.1Mb (545)
Blocks)
Programmable DSP Slices 220 400 900
(18x25 MACCs
Peak DSP Performance 276 GMACs 593 GMACs 1,334 GMACs
(Symmetric FIR)
PCI Express® (Root - Gen2 x4 Gen2 x8
Complex or Endpoint
Analog Mixed Signal (AMS) 2x 12 bit, MSPS ADCs with up to 17 Differential Inputs
/ XADC
Security AES and SHA 256b Decryption and Authentication for Secure Programmable Logic
Configuration