Dell n4010

1 2 3 4 5 6 7 8
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UM8B DIS SYSTEM DIAGRAM
14.318MHz
+3V/+5V PG.34
CLOCK GEN
PG.2
A
+1.05V/+1.8V A
PG.36
SODIMM1 INTEL
CPU Core PG.39 Max. 4GB DDR3 ATI HDMI HDMI PG.24
VGA Core/+1.1V PG.12
Channel A Arrandale PCI-E x16 Madison
PG.38 37.5mm X 37.5mm 29mm X 29mm CRT DB1
SODIMM2 DDR3 989pin PGA
CRT
+1.5V/+0.75V Max. 4GB
PG.35 Channel B TDP 35W
PG.13 LVDS
PG.14~21 LVDS PG.22
+1.05VTT PG.37 PG.3~6 DDR3 700MHz
FDI DMI VRAM
UMA VGACORE 64Mx16x4,64bit
4M ROM PG.19,20
B PG.26 B
Charger PG.33
DB2
LANEO SATA0
HDD FAN & THERMAL
USB 2.0 INTEL PCH PG.28
GMT G990/
WWAN PORT5 EMC1422-1-AIZL-TR PG.30
Ibex Peak-m SATA1 ODD PG.28
PCI-E x 1
27mm X 25mm
LANE6 LANE1
1071pin FCBGA USB2.0 USB2.0 Webcam
LAN WLAN USB 2.0 TDP 5W X1 X1
Atheros/AR8152 PORT4 PG.22
10/100 USB 2.0 PORT0,1,7 PORT0,1,7 PORT11
C C
PCI-E x 1
PORT12 PORT9
LANE5 Card Reader BT Stackup

PG.7~11 RTS5138 BT365
eSATA USB 2.0 PG.23 PG.31 TOP
SN75LVCP412 PORT8 GND
Combo port Azalia IN1
PG.27
LPC Speaker IN2
PG.25
KBC AUDIO VCC
ITE 8502 PG.25 CODEC IN3
HP/MIC
ALC269-GR
GND
KB TP 1M ROM Analog MIC BOT
D PG.28 PG.28 PG.26 D
Quanta Computer Inc.

PROJECT : UM8B DIS
Size Document Number Rev
1A
BLOCK DIAGRAM
Date: Friday, February 05, 2010 Sheet 1 of 46
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
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+1.05V_PCH
L25
1 2
25mA
+VDDIO_CLK
HCB1608KF-181T15_6
C327
C320
0.1U/ 10V/X7R
0.1U/ 10V/X7R
+3.3V_RUN
1
L27
2
HCB1608KF-181T15_6
300mA
+VDDSE_CLK
C352
C336
10U/6.3V_8/X5R
0.1U/ 10V/X7R
PDC (Power Cap quantities follow UM3)
02
C323 10U/6.3V_8/X5R C353 0.1U/ 10V/X7R
A C354 0.1U/ 10V/X7R A
C322 0.1U/ 10V/X7R
C321 0.1U/ 10V/X7R
Place each 0.1uF cap close to pin
Place each 0.1uF cap close to pin

8/20 Wait Victor check
Check CLK P/N and footprint

U10
Place within 0.5"
+VDDSE_CLK
58 5 23 CLK_BUF_BCLKP_R
of C/G
RP5 4 3 0X2
VDD_LCD CPU-0 CLK_BUF_BCLKP 8
29 22 CLK_BUF_BCLKN_R 2 1
VDD_REF CPU-0# CLK_BUF_BCLKN 8
1 VDD_USB CPU-1 20
17 VDD_SRC CPU-1# 19
24
B +VDDIO_CLK 18
VDD_CPU
VDD_CPU_IO
9LRS3197 DOT96T_LPR 3 CLK_BUF_DREFCLKP_R RP8 2 1 0X2 CLK_BUF_DREFCLKP 8 B
15 4 CLK_BUF_DREFCLKN_R 4 3
VDD_SRC_IO DOT96C_LPR CLK_BUF_DREFCLKN 8
31 13 CLK_BUF_PCIE_3GPLLP_R RP6 2 1 0X2
18,25,30 SMBDAT2 SDATA SRC-1 CLK_BUF_PCIE_3GPLLP 8
32 14 CLK_BUF_PCIE_3GPLLN_R 4 3
18,25,30 SMBCLK2 SCLK SRC-1# CLK_BUF_PCIE_3GPLLN 8
+3.3V_RUN R196 10K 16 10 CLK_BUF_DREFSSCLKP_R RP7 2 1 0X2

CPU_STOP# SATA CLK_BUF_DREFSSCLKP 8
CLK_PCH_14M R213 33/J_4 CPU_SEL 30 11 CLK_BUF_DREFSSCLKN_R 4 3
8 CLK_PCH_14M REF_0/CPU_SEL SATA# CLK_BUF_DREFSSCLKN 8
C338 *10P/50V_4_NC/COG
CK_PWRGD_R 25 6 CLK_VGA_27M_NOSS R217 33/J_4
CK_PWRGD/PD#_3.3 27MHz_nonSS EVGA-XTALI 15
Place R8044 within 0.5" of C/G 7 CLK_VGA_27M_SS R216 *33/J_4_NC
27MHz_SS CLK_27M_SS 15
XTAL_OUT 27
XTAL_IN XOUT
28 33 Discrete only
9
XIN
VSS_SATA
QFN32 GND
VSS_REF 26 C351
2 VSS_USB VSS_CPU 21 *10P/50V_4_NC/COG
8 VSS_LCD VSS_SRC 12
9LRS3197
+3.3V_RUN +3.3V_RUN
BOM check
Y1
C R212 R199 C
*10K_NC 1K/J_4 XTAL_IN 1 2XTAL_OUT
14.318MHZ
1
CPU_SEL CK_PWRGD_R
C330 C328
33P/50V_4/NPO 33P/50V_4/NPO
2
3
R209 Q13
10K FDN357N R201
*100K/F_4_NC
39 VR_PWRGD_CLKEN# 2
0 1
1
CPU_SEL CPU0/1=133MHz CPU0/1=100MHz

(default)
D D
SLG: SLG8SP590VTR Seligo QPN: AL8SP590000

SLG: SLG8SP585VTR Seligo QPN: AL8SP585000
RSC: RTM875N-632-VB-GRT Realtek QPN: AL000875002
PROJECT : UM8B DIS
1A
Clock Gen(9LRS3197)/HOLES
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
U14A
PEG_ICOMPI B26 PEG_COMP R314 49.9/F_4
www.bufanxiu.com DPLL_REF_SSCLK/DPLL_REF_SSCLK#:
Embedded Display Port PLL Differential Clock in. DPLL_REF_SSCLK
DPLL_REF_SSCLK#
DIS
GND
GND
UMA
PCH
PCH 03
PEG_ICOMPO A26
9 DMI_TXN0 A24 DMI_RX#[0] PEG_RCOMPO B27
C23 A25 PEG_RBIAS R315 750/F_4
9 DMI_TXN1 DMI_RX#[1] PEG_RBIAS
9 DMI_TXN2 B22 DMI_RX#[2]
A21 K35 PEG_RXN15 U14B TP29
9 DMI_TXN3 DMI_RX#[3] PEG_RX#[0] PEG_RXN15 14
J34 PEG_RXN14 R126 20/F_4 H_COMP3 AT23 A16
PEG_RX#[1] PEG_RXN14 14 COMP3 BCLK CLK_CPU_BCLKP 10
B24 J33 PEG_RXN13 R125 20/F_4 H_COMP2 AT24 B16
9 DMI_TXP0 DMI_RX[0] PEG_RX#[2] PEG_RXN13 14 COMP2 BCLK# CLK_CPU_BCLKN 10
PEG_RXN12 R18 49.9/F_4 H_COMP1 G16 TP30
A 9 DMI_TXP1 D23
B23
DMI_RX[1] PEG_RX#[3] G35
G32 PEG_RXN11
PEG_RXN12 14
R137 49.9/F_4 H_COMP0 AT26 COMP1 MISC AR30 For ITP CLk
A
9 DMI_TXP2 DMI_RX[2] PEG_RX#[4] PEG_RXN11 14 COMP0 BCLK_ITP
A22 F34 PEG_RXN10 AH24 AT30
9 DMI_TXP3 DMI_RX[3] PEG_RX#[5] PEG_RXN10 14 25 H_CPUDET# SKTOCC# BCLK_ITP# CLK_PCIE_3GPLLP 8
F31 PEG_RXN9
PEG_RX#[6] PEG_RXN9 14 CLK_PCIE_3GPLLN 8
D24 D35 PEG_RXN8 E16
9
9
DMI_RXN0
DMI_RXN1 G24
DMI_TX#[0]
DMI_TX#[1] DMI PEG_RX#[7]
PEG_RX#[8] E33 PEG_RXN7
PEG_RXN8 14
PEG_RXN7 14
H_CATERR# AK14 CATERR#
CLOCKS PEG_CLK#
PEG_CLK
D16
F23 C33 PEG_RXN6 AT15
9 DMI_RXN2 DMI_TX#[2] PEG_RX#[9] PEG_RXN6 14 10 H_PECI PECI
H23 D32 PEG_RXN5 H_PROCHOT# AN26 THERMAL A18 CLK_DREFSSCLKP_R R318 *0_NC
9 DMI_RXN3 DMI_TX#[3] PEG_RX#[10] PEG_RXN5 14 PROCHOT# DPLL_REF_SSCLK
B32 PEG_RXN4 AK15 A17 CLK_DREFSSCLKN_R R319 *0_NC
PEG_RX#[11] PEG_RXN4 14 10 H_THERM THERMTRIP# DPLL_REF_SSCLK#
D25 C31 PEG_RXN3
9 DMI_RXP0 DMI_TX[0] PEG_RX#[12] PEG_RXN3 14
F24 B28 PEG_RXN2
9 DMI_RXP1 DMI_TX[1] PEG_RX#[13] PEG_RXN2 14
E23 B30 PEG_RXN1 H_CPURST# AP26 F6 DDR3_DRAMRST#
9 DMI_RXP2 DMI_TX[2] PEG_RX#[14] PEG_RXN1 14 RESET_OBS# SM_DRAMRST# DDR3_DRAMRST# 12,13
G23 A31 PEG_RXN0 AL15
9 DMI_RXP3 DMI_TX[3] PEG_RX#[15] PEG_RXN0 14 9 PM_SYNC PM_SYNC
J35 PEG_RXP15
TP11 AN14
AN27
VCCPWRGOOD_1 DDR3 SM_RCOMP[0] AL1 SM_RCOMP_0 R69
AM1 SM_RCOMP_1 R68
100/F_4
24.9/F_4
PEG_RX[0] PEG_RXP15 14 10 H_PWRGOOD VCCPWRGOOD_0 SM_RCOMP[1]
PEG_RX[1] H34
H33
PEG_RXP14
PEG_RXP13
PEG_RXP14 14 9 PM_DRAM_PWRGD AK13 SM_DRAMPWROK MISC SM_RCOMP[2] AN1 SM_RCOMP_2 R70
R127
130/F_4
10K/J_4
PEG_RX[2] PEG_RXP13 14 +1.05V_VTT
E22 F35 PEG_RXP12 TP8 AM26 AN15
FDI_TX#[0] PEG_RX[3] PEG_RXP12 14 TAPPWRGOOD PM_EXT_TS#[0] PM_EXTTS#0 12
D21 G33 PEG_RXP11 AP15
FDI_TX#[1] PEG_RX[4] PEG_RXP11 14 PM_EXT_TS#[1] PM_EXTTS#1 13
D19 E34 PEG_RXP10 H_VTTPWRGD AM15 R128 10K/J_4 +1.05V_VTT
FDI_TX#[2] PEG_RX[5] PEG_RXP10 14 32 H_VTTPWRGD VTTPWRGOOD
D18 F32 PEG_RXP9 CPU_PLTRST# AL14 R129 *12.4K/F_NC
FDI_TX#[3] PEG_RX[6] PEG_RXP9 14 9,14,25,31 PLTRST# RSTIN#
G21 D34 PEG_RXP8 R134 1.5K/F_4 AT28 TP25
FDI_TX#[4] PEG_RX[7] PEG_RXP8 14 PRDY#
PEG_RXP7 TP14
Intel(R) FDI
E19 FDI_TX#[5] PEG_RX[8] F33 PEG_RXP7 14 PREQ# AP27

PEG_RXP6 R66 750/F_4 XDP_TCLK TP9
F21 B33 PWR MANAGEMENT AN28
PCI EXPRESS -- GRAPHICS
FDI_TX#[6] PEG_RX[9] PEG_RXP6 14 TCK
G18 D31 PEG_RXP5 TP16
FDI_TX#[7] PEG_RX[10] PEG_RXP5 14
A32 PEG_RXP4 AP28 XDP_TMS TP21
PEG_RX[11] PEG_RXP4 14 TMS
C30 PEG_RXP3
PEG_RX[12] PEG_RXP3 14
D22 A28 PEG_RXP2 AT27 XDP_TRST# TP24
B
C21
D20
FDI_TX[0]
FDI_TX[1]
FDI_TX[2]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
B29
A30
PEG_RXP1
PEG_RXP0
PEG_RXP2 14
PEG_RXP1 14
PEG_RXP0 14
TP12
TP19
AJ22
AK22
BPM#[0]
BPM#[1]
JTAG & BPM TRST#
TDI AT29 XDP_TDI TP22 B

C18 TP7 AK24 AR27 XDP_TDO TP17
FDI_TX[3] PEG_TXN15_C C510 PEG_TXN15
0.1U/ 10V/X7R TP5 BPM#[2] TDO XDP_TDI_M TP13
G22 FDI_TX[4] PEG_TX#[0] L33 PEG_TXN15 14 AJ24 BPM#[3] TDI_M AR29
E20 M35 PEG_TXN14_C C497 0.1U/ 10V/X7R
PEG_TXN14 TP3 AJ25 AP29 XDP_TDO_M TP10
FDI_TX[5] PEG_TX#[1] PEG_TXN14 14 BPM#[4] TDO_M
F20 M33 PEG_TXN13_C C487 PEG_TXN13
0.1U/ 10V/X7R TP18 AH22
FDI_TX[6] PEG_TX#[2] PEG_TXN13 14 BPM#[5]
G19 M30 PEG_TXN12_C C485 0.1U/ 10V/X7R
PEG_TXN12 TP15 AK23
FDI_TX[7] PEG_TX#[3] PEG_TXN12 14 BPM#[6]
L31 PEG_TXN11_C C480 PEG_TXN11
0.1U/ 10V/X7R TP2 AH23 AN25 R107 *0_NC
PEG_TX#[4] PEG_TXN11 14 BPM#[7] DBR# XDP_DBRESET# 9
FDI_FSYNC0 F17 K32 PEG_TXN10_C C473 PEG_TXN10
0.1U/ 10V/X7R
FDI_FSYNC[0] PEG_TX#[5] PEG_TXN10 14
FDI_FSYNC1 E17 M29 PEG_TXN9_C C471 0.1U/ 10V/X7R
PEG_TXN9 IC,AUB_CFD_rPGA,R1P0
FDI_FSYNC[1] PEG_TX#[6] PEG_TXN9 14
J31 PEG_TXN8_C C469 PEG_TXN8
0.1U/ 10V/X7R
PEG_TX#[7] PEG_TXN8 14
FDI_INT C17 K29 PEG_TXN7_C C466 0.1U/ 10V/X7R
PEG_TXN7
FDI_INT PEG_TX#[8] PEG_TXN7 14
H30 PEG_TXN6_C C463 PEG_TXN6
0.1U/ 10V/X7R
FDI_LSYNC0 F18 H29 PEG_TXN5_C C459 PEG_TXN5
0.1U/ 10V/X7R
FDI_LSYNC[0] PEG_TX#[10] PEG_TXN5 14
FDI_LSYNC1 D17 F29 PEG_TXN4_C C456 0.1U/ 10V/X7R
PEG_TXN4
FDI_LSYNC[1] PEG_TX#[11] PEG_TXN4 14
E28 PEG_TXN3_C C454 PEG_TXN3
0.1U/ 10V/X7R
D29 PEG_TXN2_C C452 0.1U/ 10V/X7R
PEG_TXN2
D27 PEG_TXN1_C C450 PEG_TXN1
0.1U/ 10V/X7R
C26 PEG_TXN0_C C448 PEG_TXN0
0.1U/ 10V/X7R
L34 PEG_TXP15_C C509 PEG_TXP15
0.1U/ 10V/X7R
PEG_TX[0] PEG_TXP15 14
M34 PEG_TXP14_C C493 0.1U/ 10V/X7R
PEG_TXP14
M32 PEG_TXP13_C C483 PEG_TXP13
0.1U/ 10V/X7R
L30 PEG_TXP12_C C484 PEG_TXP12
0.1U/ 10V/X7R
M31 PEG_TXP11_C C474 0.1U/ 10V/X7R
PEG_TXP11
PEG_TX[4] PEG_TXP11 14 +1.05V_VTT
K31 PEG_TXP10_C C472 PEG_TXP10
0.1U/ 10V/X7R
M28 PEG_TXP9_C C470 0.1U/ 10V/X7R
PEG_TXP9
H31 PEG_TXP8_C C467 PEG_TXP8
0.1U/ 10V/X7R
K28 PEG_TXP7_C C464 PEG_TXP7
0.1U/ 10V/X7R H_CATERR# R59 49.9/F_4
G30 PEG_TXP6_C C460 0.1U/ 10V/X7R
PEG_TXP6 H_PROCHOT# R114 49.9/F_4
G29 PEG_TXP5_C C457 PEG_TXP5
0.1U/ 10V/X7R CPU_PLTRST# R58 *68/J_4_NC
C PEG_TX[10] PEG_TXP5 14 C
F28 PEG_TXP4_C C455 0.1U/ 10V/X7R
PEG_TXP4 H_CPURST# R110 *68/J_4_NC
E27 PEG_TXP3_C C453 PEG_TXP3
0.1U/ 10V/X7R
D28 PEG_TXP2_C C451 PEG_TXP2
0.1U/ 10V/X7R
C27 PEG_TXP1_C C449 0.1U/ 10V/X7R
PEG_TXP1
C25 PEG_TXP0_C C447 PEG_TXP0
0.1U/ 10V/X7R
IC,AUB_CFD_rPGA,R1P0
Discrete Only JTAG MAPPING

R20 1K/F_4 FDI_INT
CPU THERMTRIP
FDI_FSYNC0 +1.5V_SUS XDP_TDO_M
FDI_FSYNC1 Intel Suggest to reserve
FDI_LSYNC0 0 ohm below for CPU AP29
R19 1K/F_4 FDI_LSYNC1 +3.3V_RUN R86
0 and AR29 pins.
PM_THRMTRIP# 34
FDI_FSYNC can gang all these 4 (DS 403777 Page 81)
signals together and tie them R130
with only one 1K resistor to 1.1K/F XDP_TDI_M
R279
GND ( Check list 1.0 ). *10M_NC PM_DRAM_PWRGD XDP_TRST#
3
DG(V1.0),P79: should be tied to GND Q12

(through 1K ±5% resistors), 2 *2N7002W-7-F_NC
1
if these signals are left floating, R98

C380 R131 Use a voltage divider with VDDQ (1.5 V) 51/J_4
there are nofunctional impacts
1
3
*2.2K/J_4_NC R185 *0.1U_NC 3K/F rail (ON in S3) and resistor combination
but a small amount of power (~15 mW)
2
H_THERM 2 10 of 1.1K ± (to VDDQ)/3K ± (to GND)

maybe wasted.
D to convert to processor VTT level. D
DG(V1.1) P83: Q11
1
FDI_FSYNC[0], FDI_FSYNC[1],FDI_LSYN[0],FDI_LSYN[1] *MMST3904-7-F_NC

can be ganged together with one resistor.

PROJECT : UM8B DIS
1A
PROCESSER 1/4(HOST&PEX)
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
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AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)
04
A A
U14C 13 M_B_DQ[0..63] U14D

12 M_A_DQ[0..63] M_A_DQ0 A10 M_B_DQ0
SA_DQ[0] SA_CK[0] AA6 M_A_CLKP0 12 B5 SB_DQ[0] SB_CK[0] W8 M_B_CLKP0 13
M_A_DQ1 C10 AA7 M_B_DQ1 A5 W9
SA_DQ[1] SA_CK#[0] M_A_CLKN0 12 SB_DQ[1] SB_CK#[0] M_B_CLKN0 13
M_A_DQ2 C7 P7 M_B_DQ2 C3 M3
SA_DQ[2] SA_CKE[0] M_A_CKE0 12 SB_DQ[2] SB_CKE[0] M_B_CKE0 13
M_A_DQ3 A7 M_B_DQ3 B3
M_A_DQ4 B10 SA_DQ[3] M_B_DQ4 SB_DQ[3]
SA_DQ[4] SA_CK[1] Y6 M_A_CLKP1 12 E4 SB_DQ[4] SB_CK[1] V7 M_B_CLKP1 13
M_A_DQ5 D10 Y5 M_B_DQ5 A6 V6
SA_DQ[5] SA_CK#[1] M_A_CLKN1 12 SB_DQ[5] SB_CK#[1] M_B_CLKN1 13
M_A_DQ6 E10 P6 M_B_DQ6 A4 M2
SA_DQ[6] SA_CKE[1] M_A_CKE1 12 SB_DQ[6] SB_CKE[1] M_B_CKE1 13
M_A_DQ7 A8 M_B_DQ7 C4
M_A_DQ8 SA_DQ[7] M_B_DQ8 SB_DQ[7]
D8 SA_DQ[8] SA_CS#[0] AE2 M_A_CS#0 12 D1 SB_DQ[8] SB_CS#[0] AB8 M_B_CS#0 13
M_A_DQ9 F10 AE8 M_B_DQ9 D2 AD6
SA_DQ[9] SA_CS#[1] M_A_CS#1 12 SB_DQ[9] SB_CS#[1] M_B_CS#1 13
M_A_DQ10 E6 M_B_DQ10 F2
M_A_DQ11 F7 SA_DQ[10] M_B_DQ11 SB_DQ[10]
SA_DQ[11] SA_ODT[0] AD8 M_A_ODT0 12 F1 SB_DQ[11] SB_ODT[0] AC7 M_B_ODT0 13
M_A_DQ12 E9 AF9 M_B_DQ12 C2 AD1
SA_DQ[12] SA_ODT[1] M_A_ODT1 12 SB_DQ[12] SB_ODT[1] M_B_ODT1 13
M_A_DQ13 B7 M_B_DQ13 F5
SA_DQ[13] M_A_DM[0..7] 12 SB_DQ[13] M_B_DM[0..7] 13
M_A_DQ14 E7 B9 M_A_DM0 M_B_DQ14 F3 D4 M_B_DM0
SA_DQ[14] SA_DM[0] SB_DQ[14] SB_DM[0]
M_A_DQ15 C6
SA_DQ[15] SA_DM[1] D7 M_A_DM1 M_B_DQ15 G4 SB_DQ[15] SB_DM[1] E1 M_B_DM1 DM signals are not present on Clarkfield
M_A_DQ16 H10 H7 M_A_DM2 M_B_DQ16 H6 H3 M_B_DM2 processor. All DM signal can be left as
M_A_DQ17 G8 SA_DQ[16] SA_DM[2] SB_DQ[16] SB_DM[2]
SA_DQ[17] SA_DM[3] M7 M_A_DM3 M_B_DQ17 G2 SB_DQ[17] SB_DM[3] K1 M_B_DM3
NC on Clarkfield and connect directly to
M_A_DQ18 K7 AG6 M_A_DM4 M_B_DQ18 J6 AH1 M_B_DM4
M_A_DQ19 SA_DQ[18] SA_DM[4] SB_DQ[18] SB_DM[4] GND on So-DIMM side for Clarkfield
J8 AM7 M_A_DM5 M_B_DQ19 J3 AL2 M_B_DM5
M_A_DQ20 G7 SA_DQ[19] SA_DM[5]
AN10 M_A_DM6 M_B_DQ20 G1
SB_DQ[19] SB_DM[5]
AR4 M_B_DM6 design only
SA_DQ[20] SA_DM[6] SB_DQ[20] SB_DM[6]
DDR SYSTEM MEMORY A

M_A_DQ21 G10 AN13 M_A_DM7 M_B_DQ21 G5 AT8 M_B_DM7
DDR SYSTEM MEMORY B

M_A_DQ22 SA_DQ[21] SA_DM[7] M_B_DQ22 SB_DQ[21] SB_DM[7]
J7 SA_DQ[22] M_A_DQSN[0..7] 12 J2 SB_DQ[22] M_B_DQSN[0..7] 13
M_A_DQ23 J10 C9 M_A_DQSN0 M_B_DQ23 J1 D5 M_B_DQSN0
M_A_DQ24 SA_DQ[23] SA_DQS#[0] M_A_DQSN1 M_B_DQ24 SB_DQ[23] SB_DQS#[0] M_B_DQSN1
L7 SA_DQ[24] SA_DQS#[1] F8 J5 SB_DQ[24] SB_DQS#[1] F4
M_A_DQ25 M6 J9 M_A_DQSN2 M_B_DQ25 K2 J4 M_B_DQSN2
M_A_DQ26 M8 SA_DQ[25] SA_DQS#[2] M_A_DQSN3 M_B_DQ26 SB_DQ[25] SB_DQS#[2] M_B_DQSN3
B SA_DQ[26] SA_DQS#[3] N9 L3 SB_DQ[26] SB_DQS#[3] L4 B
M_A_DQ27 L9 AH7 M_A_DQSN4 M_B_DQ27 M1 AH2 M_B_DQSN4
M_A_DQ28 SA_DQ[27] SA_DQS#[4] M_A_DQSN5 M_B_DQ28 SB_DQ[27] SB_DQS#[4] M_B_DQSN5
L6 SA_DQ[28] SA_DQS#[5] AK9 K5 SB_DQ[28] SB_DQS#[5] AL4
M_A_DQ29 K8 AP11 M_A_DQSN6 M_B_DQ29 K4 AR5 M_B_DQSN6
M_A_DQ30 N8 SA_DQ[29] SA_DQS#[6] M_A_DQSN7 M_B_DQ30 SB_DQ[29] SB_DQS#[6] M_B_DQSN7
SA_DQ[30] SA_DQS#[7] AT13 M4 SB_DQ[30] SB_DQS#[7] AR8
M_A_DQ31 P9 M_B_DQ31 N5
M_A_DQ32 AH5 SA_DQ[31] M_A_DQSP[0..7] 12 SB_DQ[31] M_B_DQSP[0..7] 13
SA_DQ[32] SA_DQS[0] C8 M_A_DQSP0 M_B_DQ32 AF3 SB_DQ[32] SB_DQS[0] C5 M_B_DQSP0
M_A_DQ33 AF5 F9 M_A_DQSP1 M_B_DQ33 AG1 E3 M_B_DQSP1
M_A_DQ34 AK6 SA_DQ[33] SA_DQS[1] SB_DQ[33] SB_DQS[1]
SA_DQ[34] SA_DQS[2] H9 M_A_DQSP2 M_B_DQ34 AJ3 SB_DQ[34] SB_DQS[2] H4 M_B_DQSP2
M_A_DQ35 AK7 M9 M_A_DQSP3 M_B_DQ35 AK1 M5 M_B_DQSP3
M_A_DQ36 AF6 SA_DQ[35] SA_DQS[3] SB_DQ[35] SB_DQS[3]
SA_DQ[36] SA_DQS[4] AH8 M_A_DQSP4 M_B_DQ36 AG4 SB_DQ[36] SB_DQS[4] AG2 M_B_DQSP4
M_A_DQ37 AG5 AK10 M_A_DQSP5 M_B_DQ37 AG3 AL5 M_B_DQSP5
M_A_DQ38 AJ7 SA_DQ[37] SA_DQS[5] SB_DQ[37] SB_DQS[5]
SA_DQ[38] SA_DQS[6] AN11 M_A_DQSP6 M_B_DQ38 AJ4 SB_DQ[38] SB_DQS[6] AP5 M_B_DQSP6
M_A_DQ39 AJ6 AR13 M_A_DQSP7 M_B_DQ39 AH4 AR7 M_B_DQSP7
M_A_DQ40 AJ10 SA_DQ[39] SA_DQS[7] M_B_DQ40 SB_DQ[39] SB_DQS[7]
SA_DQ[40] M_A_A[0..15] 12 AK3 SB_DQ[40] M_B_A[0..15] 13
M_A_DQ41 AJ9 Y3 M_A_A0 M_B_DQ41 AK4 U5 M_B_A0
M_A_DQ42 AL10 SA_DQ[41] SA_MA[0] M_A_A1 M_B_DQ42 SB_DQ[41] SB_MA[0] M_B_A1
SA_DQ[42] SA_MA[1] W1 AM6 SB_DQ[42] SB_MA[1] V2
M_A_DQ43 AK12 AA8 M_A_A2 M_B_DQ43 AN2 T5 M_B_A2
M_A_DQ44 AK8 SA_DQ[43] SA_MA[2] M_A_A3 M_B_DQ44 SB_DQ[43] SB_MA[2] M_B_A3
SA_DQ[44] SA_MA[3] AA3 AK5 SB_DQ[44] SB_MA[3] V3
M_A_DQ45 AL7 V1 M_A_A4 M_B_DQ45 AK2 R1 M_B_A4
M_A_DQ46 AK11 SA_DQ[45] SA_MA[4] M_A_A5 M_B_DQ46 SB_DQ[45] SB_MA[4] M_B_A5
SA_DQ[46] SA_MA[5] AA9 AM4 SB_DQ[46] SB_MA[5] T8
M_A_DQ47 AL8 V8 M_A_A6 M_B_DQ47 AM3 R2 M_B_A6
M_A_DQ48 AN8 SA_DQ[47] SA_MA[6] M_A_A7 M_B_DQ48 SB_DQ[47] SB_MA[6] M_B_A7
SA_DQ[48] SA_MA[7] T1 AP3 SB_DQ[48] SB_MA[7] R6
M_A_DQ49AM10 Y9 M_A_A8 M_B_DQ49 AN5 R4 M_B_A8
M_A_DQ50 AR11 SA_DQ[49] SA_MA[8] M_A_A9 M_B_DQ50 SB_DQ[49] SB_MA[8] M_B_A9
SA_DQ[50] SA_MA[9] U6 AT4 SB_DQ[50] SB_MA[9] R5
M_A_DQ51 AL11 AD4 M_A_A10 M_B_DQ51 AN6 AB5 M_B_A10
M_A_DQ52 AM9 SA_DQ[51] SA_MA[10] M_A_A11 M_B_DQ52 SB_DQ[51] SB_MA[10] M_B_A11
SA_DQ[52] SA_MA[11] T2 AN4 SB_DQ[52] SB_MA[11] P3
M_A_DQ53 AN9 U3 M_A_A12 M_B_DQ53 AN3 R3 M_B_A12
M_A_DQ54 AT11 SA_DQ[53] SA_MA[12] M_A_A13 M_B_DQ54 SB_DQ[53] SB_MA[12] M_B_A13
SA_DQ[54] SA_MA[13] AG8 AT5 SB_DQ[54] SB_MA[13] AF7
C
M_A_DQ55 AP12 T3 M_A_A14 M_B_DQ55 AT6 P5 M_B_A14 C
M_A_DQ56AM12 SA_DQ[55] SA_MA[14] M_A_A15 M_B_DQ56 SB_DQ[55] SB_MA[14] M_B_A15
SA_DQ[56] SA_MA[15] V9 AN7 SB_DQ[56] SB_MA[15] N1
M_A_DQ57 AN12 M_B_DQ57 AP6
M_A_DQ58AM13 SA_DQ[57] M_B_DQ58 SB_DQ[57]
SA_DQ[58] AP8 SB_DQ[58]
M_A_DQ59 AT14 M_B_DQ59 AT9
M_A_DQ60 AT12 SA_DQ[59] M_B_DQ60 SB_DQ[59]
SA_DQ[60] AT7 SB_DQ[60]
M_A_DQ61 AL13 M_B_DQ61 AP9
M_A_DQ62 AR14 SA_DQ[61] M_B_DQ62 SB_DQ[61]
SA_DQ[62] AR10 SB_DQ[62]
M_A_DQ63 AP14 M_B_DQ63 AT10
SA_DQ[63] SB_DQ[63]
12 M_A_BS#0 AC3 SA_BS[0] 13 M_B_BS#0 AB1 SB_BS[0]

12 M_A_BS#1 AB2 SA_BS[1] 13 M_B_BS#1 W5 SB_BS[1]
12 M_A_BS#2 U7 SA_BS[2] 13 M_B_BS#2 R7 SB_BS[2]
12 M_A_CAS# AE1 SA_CAS# 13 M_B_CAS# AC5 SB_CAS#

12 M_A_RAS# AB3 SA_RAS# 13 M_B_RAS# Y7 SB_RAS#
12 M_A_WE# AE9 SA_WE# 13 M_B_WE# AC6 SB_WE#
IC,AUB_CFD_rPGA,R1P0 IC,AUB_CFD_rPGA,R1P0
D D
Channel A DQ[15,32,48,54], DM[5]

Requires minimum 12mils spacing
with all other signals, including data signals.
Channel B DQ[16,18,36,42,56,57,60,61,62] Quanta Computer Inc.
Requires minimum 12mils spacing
with all other signals, including data signals. PROJECT : UM8B DIS
1A
PROCESSER 2/4(DDR)
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Name different with power

+VCC_CORE AG35
U14F
VCC1 VTT0_1 AH14
18A www.bufanxiu.com
+1.05V_VTT
U14G
05
C491 *22U/6.3V_8/X5R_NC
AG34 AH12 AT21
C490 *22U/6.3V_8/X5R_NC VCC2 VTT0_2 C519 10U/6.3V_8/X5R VAXG1
SENSE
LINES
AG33 VCC3 VTT0_3 AH11 AT19 VAXG2 VAXG_SENSE AR22
C92 *22U/6.3V_8/X5R_NC
AG32 AH10 C503 10U/6.3V_8/X5R AT18 AT22
C70 *22U/6.3V_8/X5R_NC VCC4 VTT0_4 C478 10U/6.3V_8/X5R VAXG3 VSSAXG_SENSE
AG31 VCC5 VTT0_5 J14 AT16 VAXG4
C521 *22U/6.3V_8/X5R_NC
AG30 J13 C73 10U/6.3V_8/X5R AR21
C125 22U/6.3V_8/X5R AG29 VCC6 VTT0_6 C46 *10U/6.3V_0805/X5R_NC VAXG5
VCC7 VTT0_7 H14 AR19 VAXG6
C103 22U/6.3V_8/X5R AG28 H12 C481 *10U/6.3V_0805/X5R_NC AR18
GRAPHICS VIDs
C121 22U/6.3V_8/X5R AG27 VCC8 VTT0_8 C47 *10U/6.3V_0805/X5R_NC VAXG7
A VCC9 VTT0_9 G14 AR16 VAXG8 GFX_VID[0] AM22 A
C126 22U/6.3V_8/X5R AG26 G13 C119 *10U/6.3V_0805/X5R_NC AP21 AP22
C77 22U/6.3V_8/X5R VCC10 VTT0_10 C114 *10U/6.3V_0805/X5R_NC VAXG9 GFX_VID[1]
AF35 VCC11 VTT0_11 G12 AP19 VAXG10 GFX_VID[2] AN22
C124 22U/6.3V_8/X5R AF34 G11 C524 22U/6.3V_8/X5R AP18 AP23
C129 22U/6.3V_8/X5R VCC12 VTT0_12 C48 22U/6.3V_8/X5R VAXG11 GFX_VID[3]
AF33 VCC13 VTT0_13 F14 AP16 VAXG12 GFX_VID[4] AM23
C78 10U/6.3V_8/X5R AF32 F13 C514 *22U/6.3V_8/X5R_NC AN21 AP24
C488 10U/6.3V_8/X5R VCC14 VTT0_14 VAXG13 GFX_VID[5]
AF31 VCC15 VTT0_15 F12 AN19 VAXG14 GFX_VID[6] AN24
GRAPHICS
C505 10U/6.3V_8/X5R AF30 F11 AN18
VCC16 VTT0_16 VAXG15
C445 10U/6.3V_8/X5R AF29 VCC17 VTT0_17 E14 Please note that +VCC_GFX_CORE AN16 VAXG16
C520 10U/6.3V_8/X5R AF28 VCC18 VTT0_18 E12 should be 1.05V in Auburndale AM21 VAXG17 GFX_VR_EN AR25 Pop it when Arrandale Graphics disable.
C60 10U/6.3V_8/X5R AF27 D14 AM19 AT25
C516 10U/6.3V_8/X5R VCC19 VTT0_19 VAXG18 GFX_DPRSLPVR R118 1K/J_4
AF26 VCC20 VTT0_20 D13 AM18 VAXG19 GFX_IMON AM24
C122 10U/6.3V_8/X5R AD35 D12 AM16
C515 *10U/6.3V_8/X5R_NC VCC21 VTT0_21 VAXG20
AD34 D11 AL21
1.1V RAIL POWER

C489 *10U/6.3V_8/X5R_NC VCC22 VTT0_22 VAXG21
AD33 VCC23 VTT0_23 C14 AL19 VAXG22
C120
C117
10U/6.3V_8/X5R AD32
10U/6.3V_8/X5R AD31 VCC24
VCC25
VTT0_24
VTT0_25
C13
C12
AL18
AL16
VAXG23
VAXG24
2A
C522 *10U/6.3V_8/X5R_NC
AD30 C11 AK21 AJ1 +1.5V_SUS
C518 *10U/6.3V_8/X5R_NC VCC26 VTT0_26 VAXG25 VDDQ1 C44 1U/6.3V/X5R
- 1.5V RAILS
AD29 VCC27 VTT0_27 B14 AK19 VAXG26 VDDQ2 AF1
C108 *10U/6.3V_8/X5R_NC
AD28 B12 AK18 AE7 C90 1U/6.3V/X5R
C123 *10U/6.3V_8/X5R_NC VCC28 VTT0_28 VAXG27 VDDQ3 C116 1U/6.3V/X5R
AD27 VCC29 VTT0_29 A14 AK16 VAXG28 VDDQ4 AE4
C53 1U/6.3V/X5R
POWER
AD26 VCC30 VTT0_30 A13 AJ21 VAXG29 VDDQ5 AC1
C446 *470U_NC/ AC35 A12 AJ19 AB7 C38 1U/6.3V/X5R
VCC31 VTT0_31 VAXG30 VDDQ6 C55 22U/6.3V_8/X5R
+
AC34 VCC32 VTT0_32 A11 AJ18 VAXG31 VDDQ7 AB4

C18 *470U_NC AC33 AJ16 Y1 C61 *22U/6.3V_8/X5R_NC
VCC33 VAXG32 VDDQ8
+
+
AC32 VCC34 AH21 VAXG33 VDDQ9 W7

AC31 AH19 W4 C20 330U/2V_7343
VCC35 VAXG34 VDDQ10
AC30 VCC36 VTT0_33 AF10 +1.05V_VTT AH18 VAXG35 VDDQ11 U1
AC29 VCC37 VTT0_34 AE10 AH16 VAXG36 VDDQ12 T7
AC28 AC10 C43 22U/6.3V_8/X5R T4
VCC38 VTT0_35 VDDQ13
CPU CORE SUPPLY
B AC27 AB10 C84 22U/6.3V_8/X5R P1 B

AC26 Y10 N7
DDR3
AA35 VCC41 VTT0_38 W10 VDDQ16 N4
AA34 VCC42 VTT0_39 U10 VTT Rail Values are VDDQ17 L1
FDI
AA33 T10 +1.05V_VTT J24 H1
AA32
VCC43 VTT0_40
J12 Auburndal VTT=1.05V C49 22U/6.3V_8/X5R J23
VTT1_45 VDDQ18
VCC44 VTT0_41 C475 *22U/6.3V_8/X5R_NCH25 VTT1_46
POWER
AA31 VCC45 VTT0_42 J11 Clarksfield VTT=1.1V VTT1_47

AA30 VCC46 VTT0_43 J16
AA29 VCC47 VTT0_44 J15
AA28 VCC48 VTT0_59 P10 +1.05V_VTT
AA27 +1.05V_VTT K26 N10 C486 10U/6.3V_8/X5R
VCC49 VTT1_48 VTT0_60
PEG & DMI

AA26 AN33 C56 22U/6.3V_8/X5R J27 L10 C495 *10U/6.3V_0805/X5R_NC
VCC50 PSI# H_PSI# 39 VTT1_49 VTT0_61
Y35 C62 22U/6.3V_8/X5R J26 K10 C476 22U/6.3V_8/X5R
VCC51 C98 *22U/6.3V_8/X5R_NC J25 VTT1_50 VTT0_62 C477 *22U/6.3V_8/X5R_NC
Y34 J22
1.1V
VCC52 C37 *22U/6.3V_8/X5R_NC H27 VTT1_51 VTT1_63
Y33 VCC53 VID[0] AK35 VID0 39 VTT1_52 VTT1_64 J20
Y32 VCC54 VID[1] AK33 VID1 39 G28 VTT1_53 VTT1_65 J18
Y31 VCC55 VID[2] AK34 VID2 39 G27 VTT1_54 VTT1_66 H21
Y30 VCC56 VID[3] AL35 VID3 39 G26 VTT1_55 VTT1_67 H20
Y29 AL33 F26 H19
CPU VIDS
VCC57 VID[4] VID4 39 VTT1_56 VTT1_68

Y28 VCC58 VID[5] AM33 VID5 39 E26 VTT1_57
Y27 VCC59 VID[6] AM35 VID6 39 E25 VTT1_58
Y26 AM34 DPRSLPVR 39 L26 +1.8V_RUN
1.8V
VCC60 PROC_DPRSLPVR VCCPLL1 C45 22U/6.3V_8/X5R
V35 VCC61 VCCPLL2 L27
V34 M26 C34 4.7U/6.3V/X5R
VCC62 VCCPLL3
V33 VCC63 VTT_SELECT: C42 2.2U/ 6.3V/X5R
V32 G15 TP1 High level 1.05V for Auburndale C36 1U/6.3V/X5R
VCC64 VTT_SELECT IC,AUB_CFD_rPGA,R1P0 C479 1U/6.3V/X5R
V31
V30
VCC65
H_VTTVID1=Low, 1.1V Low level 1.1V for Clarksfield
VCC66
V29
V28
VCC67 H_VTTVID1=High, 1.05V VCC_SENSE & VSS_SENSE:
C VCC68 SC(V1.0)P19 C
V27 VCC69
V26 100- ±1% pull-down to GND near processor
VCC70
U35 VCC71
U34 +VCC_CORE
VCC72
U33 AN35
SENSE LINES
VCC73 ISENSE I_MON 39

U32 VID0 R96 1K/J_4 +1.05V_VTT
VCC74 R313 *1K/J_4_NC
U31 VCC75 VTT_SENSE B15 VTT_SENSE 37
U30 VCC76 VSS_SENSE_VTT A15 TP_VSS_SENSE_VTT R64 VID1 R84 1K/J_4
U29 T34 100/F R312 *1K/J_4_NC
VCC77 VID2 R104 1K/J_4
U28 VCC78
U27 R311 *1K/J_4_NC
VCC79 VID3 R111 *1K/J_4_NC
U26 VCC80 VCC_SENSE AJ34 VCCSENSE 39
R35 AJ35 VSSSENSE 39 R310 1K/J_4
VCC81 VSS_SENSE VID4 R115 *1K/J_4_NC
R34 VCC82
R33 VSS_SENSE_VTT: R309 1K/J_4
VCC83 SC(V1.0)P20 VID5 R148 1K/J_4
R32 VCC84
R31 Connect VSS_SENSE_VTT to GND R308 *1K/J_4_NC
VCC85 or can be left floating. R61 VID6 R124 *1K/J_4_NC
R30 VCC86 Note: CRB has the VSS_SENSE_VTT floating. 100/F/ R307 1K/J_4
R29 VCC87
R28 DPRSLPVR R139 1K/J_4
VCC88 R306 *1K/J_4_NC
R27 VCC89
R26 PROC_DPRSLPVR: H_PSI# R140 *1K/J_4_NC
VCC90 SC(V1.0)P19: R305 1K/J_4
P35 VCC91
P34 It is important to have the resistor stuffing options
VCC92 in the design for the Turbo functionality.
P33 VCC93 The stuffing and no-stuffing of the resistors
P32 VCC94 will depend on the POC configuration of AUB HFM_VID : Max 1.4V
P31 VCC95 and CFD 0525 Steg : As an option, VTT_SENSE pin on the LFM_VID : Min 0.65V
P30 VCC96 CRB(V1.0)P67:
P29 VCC97 uses 1K pull-up and pull-down resistors processor can be left floating. But the platform
D P28 VCC98 CRB default setting is "1" needs to have the FB (feedback) pin of the VR tied D
P27 VCC99 to the VTT plane regulation.
P26 VCC100

PROJECT : UM8B DIS
1A
PROCESSER 3/4(POWER)
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
AUBURNDALE/CLARKSFIELD PROCESSOR (GND)

www.bufanxiu.com
AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG) 06
U14H U14I U14E
K27 VSS161
AT20 AE34 K9 +M_VREF_DQ_DIMM0 J17 AT2 TP38
VSS1 VSS81 VSS162 SA_DIMM_VREF RSVD_NCTF_41
AT17 VSS2 VSS82 AE33 K6 VSS163 +M_VREF_DQ_DIMM1 H17 SB_DIMM_VREF RSVD_NCTF_42 AT3
AR31 VSS3 VSS83 AE32 K3 VSS164 RSVD_NCTF_43 AR1
A AR28 AE31 J32 CFG0 AM30 AL28 A
VSS4 VSS84 VSS165 CFG[0] RSVD45
AR26 VSS5 VSS85 AE30 J30 VSS166 AM28 CFG[1] RSVD46 AL29
AR24 AE29 J21 CFG3 AP31 AP30
AR23 VSS7 VSS87 AE28 J19 VSS168 AL32 CFG[3] RSVD48 AP32
AR20 AE27 H35 CFG4 AL30 AL27
AR17 VSS9 VSS89 AE26 H32 VSS170 AM31 CFG[5] RSVD50 AT31
AR15 VSS10 VSS90 AE6 H28 VSS171 AN29 CFG[6]
AR12 AD10 H26 CFG7 AM32 AT32
AR9 VSS12 VSS92 AC8 H24 VSS173 AK32 CFG[8] RSVD52 AP33
AR6 VSS13 VSS93 AC4 H22 VSS174 AK31 CFG[9] RSVD53 AR33
AR3 VSS14 VSS94 AC2 H18 VSS175 AK28 CFG[10] RSVD_NCTF_54 AT33
AP20 VSS15 VSS95 AB35 H15 VSS176 AJ28 CFG[11] RSVD_NCTF_55 AT34
AP17 VSS16 VSS96 AB34 H13 VSS177 AN30 CFG[12] RSVD_NCTF_56 AP35
AP13 VSS17 VSS97 AB33 H11 VSS178 AN32 CFG[13] RSVD_NCTF_57 AR35
AP10 VSS18 VSS98 AB32 H8 VSS179 AJ32 CFG[14] RSVD58 AR32
AP7 VSS19 VSS99 AB31 H5 VSS180 AJ29 CFG[15] RSVD_TP_59 E15
AP4 VSS20 VSS100 AB30 H2 VSS181 AJ30 CFG[16] RSVD_TP_60 F15
AP2 VSS21 VSS101 AB29 G34 VSS182 AK30 CFG[17]
AN34 VSS22 VSS102 AB28 G31 VSS183 H16 RSVD_TP_86 KEY A2
AN31 VSS23 VSS103 AB27 G20 VSS184 RSVD62 D15
AN23 VSS24 VSS104 AB26 G9 VSS185 AP25 RSVD1 RSVD63 C15
AN20 AB6 G6 AL25 AJ15 RSVD64_R R136 *0_NC
VSS25 VSS105 VSS186 RSVD2 RSVD64 R65 *0_NC
AN17 AA10 G3 AL24 AH15
RESERVED
VSS26 VSS106 VSS187 RSVD3 RSVD65
AM29 VSS27 VSS107 Y8 F30 VSS188 AL22 RSVD4 RSVD_TP_66 AA5
AM27 VSS28 VSS108 Y4 F27 VSS189 AJ33 RSVD5 RSVD_TP_67 AA4
AM25 VSS29 VSS109 Y2 F25 VSS190 AG9 RSVD6 RSVD_TP_68 R8
AM20 VSS30 VSS110 W35 F22 VSS191 M27 RSVD7 RSVD_TP_69 AD3
AM17 VSS31 VSS111 W34 F19 VSS192 L28 RSVD8 RSVD_TP_70 AD2
AM14 VSS32 VSS112 W33 F16 VSS193
B AM11 VSS33 VSS113 W32 E35 VSS194 G25 RSVD11 RSVD_TP_71 AA2 B
AM8 VSS34 VSS114 W31 E32 VSS195 G17 RSVD12 RSVD_TP_72 AA1
AM5 VSS35 VSS115 W30 E29 VSS196 E31 RSVD13 RSVD_TP_73 R9
AM2 VSS36 VSS116 W29 E24 VSS197 E30 RSVD14 RSVD_TP_74 AG7
AL34 W28 E21 B19 AE3
AL31
AL23
VSS37
VSS38
VSS39
VSS VSS117
VSS118
VSS119
W27
W26
E18
E13
VSS198
VSS199
VSS200
VSS R317 *0_NC TP_RSVD17_R
A19
A20
RSVD15
RSVD16
RSVD17
RSVD_TP_75
RSVD_TP_76
RSVD_TP_77
V4
V5
AL20 W6 E11 R316 *0_NC TP_RSVD18_R B20 N2
VSS40 VSS120 VSS201 RSVD18 RSVD_TP_78
AL17 VSS41 VSS121 V10 E8 VSS202 U9 RSVD19 RSVD_TP_79 AD5
AL12 VSS42 VSS122 U8 E5 VSS203 T9 RSVD20 RSVD_TP_80 AD7
AL9 VSS43 VSS123 U4 E2 VSS204
AL6 VSS44 VSS124 U2 D33 VSS205 AC9 RSVD21 RSVD_TP_81 W3
AL3 VSS45 VSS125 T35 D30 VSS206 AB9 RSVD22 RSVD_TP_82 W2
AK29 VSS46 VSS126 T34 D26 VSS207 C1 RSVD_NCTF_23 RSVD_TP_83 N3
AK27 VSS47 VSS127 T33 D9 VSS208 A3 RSVD_NCTF_24 RSVD_TP_84 AE5
AK25 VSS48 VSS128 T32 D6 VSS209 J29 RSVD26 RSVD_TP_85 AD9
AK20 VSS49 VSS129 T31 D3 VSS210 J28 RSVD27
AK17 VSS50 VSS130 T30 C34 VSS211 A34 RSVD_NCTF_28
AJ31 VSS51 VSS131 T29 C32 VSS212 A33 RSVD_NCTF_29
AJ23 T28 C29 C35 AP34 R85 0
VSS52 VSS132 VSS213 RSVD_NCTF_30 VSS
AJ20 VSS53 VSS133 T27 C28 VSS214
AJ17 VSS54 VSS134 T26 C24 VSS215 B35 RSVD_NCTF_31
AJ14 T6 C22 TP23 AJ13
VSS55 VSS135 VSS216 RSVD32
AJ11 VSS56 VSS136 R10 C20 VSS217
TP20 AJ12 RSVD33 R8237 => UM7 POP
AJ8
AJ5
VSS57 VSS137 P8
P4
C19
C16
VSS218 TP4
AH25
AK26
RSVD34 UM9 DE-POP
AJ2
VSS58
VSS59
VSS138
VSS139 P2 B31
VSS219
VSS220
TP6 AL26
RSVD35
RSVD36
0918 check
AH35 VSS60 VSS140 N35 B25 VSS221 AR2 RSVD_NCTF_37
AH34 VSS61 VSS141 N34 B21 VSS222 AJ26 RSVD38
C AH33 VSS62 VSS142 N33 B18 VSS223 AJ27 RSVD39 C
AH32 VSS63 VSS143 N32 B17 VSS224 AP1 RSVD_NCTF_40
AH31 VSS64 VSS144 N31 B13 VSS225
AH30 N30 B11 IC,AUB_CFD_rPGA,R1P0
VSS65 VSS145 VSS226
AH26 VSS69 VSS149 N26 A29 VSS230
AH20 N6 A27 CFG7 R79 *3.01K/F_4_NC
VSS70 VSS150 VSS231
AH17 VSS71 VSS151 M10 A23 VSS232
AH13 VSS72 VSS152 L35 A9 VSS233
AH9 L32 CFG0 R78 *3.01K/F_4_NC
VSS73 VSS153
AH6 VSS74 VSS154 L29 AT35 VSS_NCTF1
AH3 VSS75 VSS155 L8 AT1 VSS_NCTF2
AG10 L5 AR34
NCTF
VSS76 VSS156 VSS_NCTF3 CFG4 R74 *3.01K/F_4_NC

AF8 VSS77 VSS157 L2 B34 VSS_NCTF4
AF4 K34 B2 CFG3 R73 3.01K/F_4
VSS78 VSS158 VSS_NCTF5
AF2 VSS79 VSS159 K33 B1 VSS_NCTF6
AE35 VSS80 VSS160 K30 A35 VSS_NCTF7
1 0
CFG4 Enabled; An external Display port
(Display Port Disabled; No Physical Display Port device is connected to the Embedded
Presence) attached to Embedded Diplay Port Display port
D D
The Clarkfield processor's PCI Express interface may CFG0
not meet PCI Express 2.0 jitter specifications. Intel (PCI-Epress
recommends placing a 3.01K +/- 5% pull down resistor to Single PEG Bifurcation enabled
Configuration Select)
VSS on CFG[7] pin for both rPGA and BGA components.
This pull down resistor should be removed when this CFG3
issue is fixed. (PCI-Epress Static Normal Operation Lane Numbers Reversed Quanta Computer Inc.
Lane Reversal) 15 -> 0 , 14 -> 1
PROJECT : UM8B DIS
1A
PROCESSER 4/4 (GND)
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
www.bufanxiu.com
INTVRMEN - Integrated SUS 1.1V VRM Enable
High - Enable Internal VRs
C422 18P/50V_4/COG
07
IBEX PEAK-M (HDA,JTAG,SATA)
2
1
Y3 R268
13 U21A
UMA CRT,LVDS&HDMI signals
32.768KHZ 10M/J_4
IBEX PEAK-M (LVDS,DDI)
3
4
RTC_X1 B13 Ibex-M D33
A RTCX1 FWH0 / LAD0 LAD0 25,31 A
C421 18P/50V_4/COG RTC_X2 D13 1 OF 10 B33 U21D
RTCX2 FWH1 / LAD1 LAD1 25,31
C32
LPC FWH2 / LAD2
FWH3 / LAD3 A32
LAD2
LAD3
25,31
25,31 T48 L_BKLTEN Ibex-M SDVO_TVCLKINN BJ46
RTC_RST# C14 C34 T47 4 OF 10 BG46
T46 PAD RTCRST# FWH4 / LFRAME# LFRAME# 25,31 L_VDD_EN SDVO_TVCLKINP
LDRQ0# A34
SRTC_RST# D17 F34 Y48 BJ48
T45 PAD SRTCRST# RTC (+3V) LDRQ1# / GPIO23
SERIRQ AB9 SERIRQ 25
L_BKLTCTL SDVO_STALLN
SDVO_STALLP BG48
SM_INTRUDER# A16 INTRUDER#
AK7
HDD AB48
Y45
L_DDC_CLK
BF45
SATA0RXN SATA_RXN0 28 L_DDC_DATA SDVO_INTN
R440 330K/J_6 PCH_INVRMEN
+RTC_CELL A14 INTVRMEN SATA0RXP AK6
AK11
SATA_RXP0 28
AB46
SDVO SDVO_INTP BH45
T47 PAD SATA0TXN SATA_TXN0 28 L_CTRL_CLK
SATA0TXP AK9 SATA_TXP0 28 V48 L_CTRL_DATA SDVO_CTRLCLK T51
SDVO_CTRLDATA T53
ACZ_BITCLK A30 AH6 AP39
HDA_BCLK SATA1RXN SATA_RXN1 28 T29 PAD LVD_IBG
ACZ_SYNC D29 AH5 AP41 BG44
HDA_SYNC SATA1RXP SATA_RXP1 28 T28 PAD LVD_VBG DDPB_AUXN
31 ACZ_SPKR P1 SPKR SATA1TXN AH9 SATA_TXN1 28 DDPB_AUXP BJ44
DISPLAY PORT B
ACZ_RST# C30 AH8 AT43 AU38
HDA_RST# SATA1TXP SATA_TXP1 28 T26 PAD LVD_VREFH DDPB_HPD
31 ACZ_SDIN0 G30 HDA_SDIN0 T27 PAD AT42 LVD_VREFL
F30 AF11 DG: Place TX cap close to connector ODD BD42
E32
HDA_SDIN1 IHDA SATA2RXN
AF9 LVDS--A
DDPB_0N
BC42
Digital Display Interface

HDA_SDIN2 SATA2RXP DDPB_0P
F32 AF7 SATA port 2/3 are not support in HM55 . AV53 BJ42
25 R452 *0_NC ACZ_SDOUT B29
HDA_SDIN3
HDA_SDO
SATA2TXN
SATA2TXP AF6 They are only in PM 55 AV51
LVDSA_CLK#
LVDSA_CLK
DDPB_1N
DDPB_1P BG42
PCH_GPIO33 H32 BB40
25 PCH_MELOCK HDA_DOCK_EN# / GPIO33 (+3V) DDPB_2N
J30 HDA_DOCK_RST# / GPIO13 (+3V_S5) SATA3RXN AH3 BB47 LVDSA_DATA#0 DDPB_2P BA40
AH1 BA52 AW38
SATA SATA3RXP
SATA3TXN AF3 AY48
LVDSA_DATA#1
LVDSA_DATA#2
DDPB_3N
DDPB_3P BA38
PCH_JTAG_TCK_BUF M3
SATA3TXP AF1 ESATA AV47 LVDSA_DATA#3
Y49
TP43 JTAG_TCK
SATA4RXN AD9 40 SATA_RXN4 27 BB48 LVDSA_DATA0
DDPC_CTRLCLK
DDPC_CTRLDATA AB49
PCH_JTAG_TMS K3 AD8 BA50
TP44 JTAG_TMS SATA4RXP SATA_RXP4 27 LVDSA_DATA1
DISPLAY PORT C
SATA4TXN AD6 SATA_TXN4 27 AY49 LVDSA_DATA2 DDPC_AUXN BE44
B PCH_JTAG_TDI B
K1 AD5 AV48 BD44
TP45 JTAG_TDI JTAG SATA4TXP SATA_TXP4 27 LVDSA_DATA3 DDPC_AUXP
DDPC_HPD AV40
TP46
PCH_JTAG_TDO J2 JTAG_TDO SATA5RXN AD3 Distance between the PCH and cap LVDS--B
PCH_JTAG_RST# J4
SATA5RXP AD1
AB3
on the "P" signal should be identical AP48
AP47
LVDSB_CLK# DDPC_0N BE40
BD40
TP47 TRST# SATA5TXN
SATA5TXP AB1 distace between the PCH and cap on LVDSB_CLK DDPC_0P
DDPC_1N BF41
must add test point. the "N" signal for the same pair. AY53 LVDSB_DATA#0 DDPC_1P BH41
AT49 LVDSB_DATA#1 DDPC_2N BD38
SPI_CLK BA2 AF16 AU52 BC38
26 SPI_CLK SPI_CLK SATAICOMPO LVDSB_DATA#2 DDPC_2P
TP39 AT53 LVDSB_DATA#3 DDPC_3N BB36
SPI_CS0# AV3 AF15 SATA_COMP R218 37.4/F_4 +1.05V_PCH BA36
26 SPI_CS0# SPI_CS0# SATAICOMPI DDPC_3P
TP40 AY51 LVDSB_DATA0
SPI_CS1# AY3 T3 SATA_LED# AT48 U50
TP41 SPI_CS1# SPI SATALED# SATA_LED# 29
AU50
LVDSB_DATA1
LVDSB_DATA2
DDPD_CTRLCLK
DDPD_CTRLDATA U52
AT51 LVDSB_DATA3
DISPLAY PORT D
SPI_SI AY1 BC46
26 SPI_SI SPI_MOSI DDPD_AUXN
Y9 SATA_DET0# AA52 BD46
TP28
SPI_SO AV1
(+3V) SATA0GP / GPIO21 V1 SATA_DET1# Serial ATA LED: This signal is an AB53
CRT_BLUE DDPD_AUXP
AT38
26 SPI_SO SPI_MISO (+3V_S5) SATA1GP / GPIO19 CRT_GREEN DDPD_HPD
TP42 open-drain output pin driven during AD53 CRT_RED
C602 *100P/NPO_NC IbexPeak-M_Rev1_0 SATA command activity. It is to be
36 1 2 V51
CRT DDPD_0N BJ40
BG40
1205 The SATALED# signal is connected to external circuitry that CRT_DDC_CLK DDPD_0P
V53 BJ38
Flash Descriptor Security Override open-collector and requires a can provide the current to drive a CRT_DDC_DATA DDPD_1N
BG38
weak external pull-up (8.2 k platform LED. When active, the LED Y53
DDPD_1P
BF37
is on. When tri-stated, the LED is off. CRT_HSYNC DDPD_2N
to 10 k ) to +V3.3. Y51 CRT_VSYNC DDPD_2P BH37
Low = Enabled An external pull-up resistor to Vcc3_3 DDPD_3N BE36
GPIO33 High = Disabled is required. R221 1K/F_4 DAC_IREF AD48
DAC_IREF DDPD_3P BD36
R411 10K/J_4 SATA_LED# AB51 CRT_IRTN
IbexPeak-M_Rev1_0
+3.3V_RUN
R237 10K/J_4 SATA_DET0#
UMA 0.5%
C R405 10K/J_4 SATA_DET1# DIS 1% C
R245 1 2 *1K_NC PCH_GPIO33

+3.3V_RUN
iTPM ENABLE/DISABLE
R208 *1K_NC/ SPI_SI

(Internal 20K/F pull high to +3.3V_RUN)
+3.3V_SUS Res. of TDI near PCH
TPM Function
Note : GPIO33 is a signal used for Flash
Descriptor Security Override/ME Debug Enable Mount
Mode.This signal should be only asserted Disable NC R416 R418 R420 R422
lowthrough an external pull-down in (Default)
manufacturing or debug environments ONLY. *200_NC *200_NC *200_NC *20K/F_4_NC
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_RST#
1mA R415 51/J_4 PCH_JTAG_TCK_BUF
For AUDIO
25,31 ACZ_RST#_AUDIO
R229
R235
33/J_4 ACZ_RST#
33/J_4 ACZ_SDOUT
+RTC_CELL RTC R417
*100_NC
R419
*100_NC
R421
*100_NC
R423
*10K_NC
NC all Res. when
PCH is production
stage.
31 ACZ_SDOUT_AUDIO
C404 *10P/50V_4_NC/COG
Res. of TDO
R234 33/J_4 ACZ_SYNC Note : Only pop when PCH is production
31 ACZ_SYNC_AUDIO PCH ES1 stage : NC
C399 *10P/50V_4_NC/COG R443 20K/F_4 RTC_RST#
C582 1U/6.3V/X5R PCH ES2 stage : pop stage & need "JTAG boundary Scan".
D D
R231 33/J_4 ACZ_BITCLK Remember to depop XDP side Res.
31 ACZ_BITCLK_AUDIO
C389 10P/50V_4/COG
R428 20K/F_4 SRTC_RST#
77 C583 1U/6.3V/X5R
No Reboot strap.
R412 *1K/F_4_NC ACZ_SPKR R427 1M/J_4 SM_INTRUDER#
+3.3V_RUN
Low = Default. Quanta Computer Inc.
SPKR High = No Reboot.
PROJECT : UM8B DIS
1A
PCH 1/5 (SATA,HDA,LPC)
1 2 3 4 5 6 7 8
5 4 3 2 1
IBEX PEAK-M (GND)

U21I
www.bufanxiu.com 08
AY7 H49
B11
B15
VSS[159]
VSS[160]
VSS[161]
VSS[259]
VSS[260]
VSS[261]
H5
J24
IBEX PEAK-M (PCI-E,SMBUS,CLK)
B19 K11 U21B
VSS[162] VSS[262] +3.3V_SUS
B23 VSS[163] VSS[263] K43
B31 K47 Ibex-M
B35
VSS[164]
VSS[165]
VSS[264]
VSS[265] K7 BG30 PERN1 2 OF 10 SMBus SMBALERT# 10K/J_4 R438
D B39 VSS[166] VSS[266] L14 BJ30 PERP1 (+3V_S5) SMBALERT# / GPIO11 B9 D
B43 L18 BF29 H14 ICH_SMBCLK 2.2K/J_4 R282
VSS[167] VSS[267] PETN1 SMBCLK ICH_SMBDATA 2.2K/J_4 R281
B47 VSS[168] VSS[268] L2 BH29 PETP1 SMBDATA C8
B7 L22 J14 SMBL0ALERT# 10K/J_4 R262
VSS[169] VSS[269] PCIE_RXN1
(+3V_S5) SML0ALERT# / GPIO60 SMB_CLK_ME0 2.2K/J_4 R433
BG12 VSS[170] VSS[270] L32 31 PCIE_RXN1 AW30 PERN2 SML0CLK C6
BB12 L36 PCIE_RXP1 BA30 G8 SMB_DATA_ME0 2.2K/J_4 R256
VSS[171] VSS[271] 31 PCIE_RXP1 PERP2 SML0DATA
BB16 L40 [WLAN] C348 0.1U/ 10V/X7R PCIE_TXN1_C BC30 M14 SML1ALERT# 10K/J_4 R263
VSS[172] VSS[272] 31 PCIE_TXN1 PETN2 (+3V_S5) SML1ALERT# / GPIO74
BB20 L52 C349 0.1U/ 10V/X7R PCIE_TXP1_C BD30 E10 SMB_CLK_ME1 2.2K/J_4 R272
VSS[173] VSS[273] 31 PCIE_TXP1 PETP2 (+3V_S5) SML1CLK / GPIO58
BB24 M12 G12 SMB_DATA_ME1 2.2K/J_4 R271
VSS[174] VSS[274] (+3V_S5) SML1DATA / GPIO75
BB30 VSS[175] VSS[275] M16 AU30 PERN3
BB34 VSS[176] VSS[276] M20 AT30 PERP3 SMB1 Check R value...
BB38 N38 AU32
BB42
VSS[177] VSS[277]
M34 AV32
PETN3 (R8283, R8296)
VSS[178] VSS[278] PETP3
BB49 VSS[179] VSS[279] M38 CL_CLK1 T13
BB5
BC10
VSS[180] VSS[280] M42
M46
BA32
BB32
PERN4 Controller T11 ICH_SMBCLK
VSS[181] VSS[281] PERP4 CL_DATA1 ICH_SMBCLK 31
BC14
BC18
VSS[182] VSS[282] M49
M5
BD32
BE32
PETN4 Link T9 ICH_SMBDATA
VSS[183] VSS[283] PETP4 CL_RST1# ICH_SMBDATA 31
BC2 VSS[184] VSS[284] M8
BC22 VSS[185] VSS[285] N24 BF33 PERN5
BC32 VSS[186] VSS[286] P11 BH33 PERP5
BC36 VSS[187] VSS[287] AD15 BG32 PETN5
BC40 VSS[188] VSS[288] P22 BJ32 PETP5
BC44 VSS[189] VSS[289] P30
PCIE_RXN6_LAN PCI-E* PEG
BC52 VSS[190] VSS[290] P32 31 PCIE_RXN6_LAN BA34 PERN6
BH9 P34 PCIE_RXP6_LAN AW34 H1 PEG_CLKREQ#
VSS[191] VSS[291] 31 PCIE_RXP6_LAN PERP6 (+3V_S5)PEG_A_CLKRQ# / GPIO47 PEG_CLKREQ# 15
BD48
BD49
VSS[192] VSS[292] P42
P45
PCIE Clock Request [LAN] 31 PCIE_TXN6_LAN
C334
C333
0.1U/ 10V/X7R
PCIE_TXN6_LAN_C BC34
0.1U/ 10V/X7R
PCIE_TXP6_LAN_C BD34 PETN6 CLKOUT_PEG_A_N AD43
AD45
CLK_PCIE_VGAN 14
VSS[193] VSS[293] +3.3V_RUN 31 PCIE_TXP6_LAN PETP6 CLKOUT_PEG_A_P CLK_PCIE_VGAP 14
BD5 VSS[194] VSS[294] P47 CLKOUT_DMI_N AN4 CLK_PCIE_3GPLLN 3
C BE12 R2 PCIE_CLK_REQ1# R406 10K/J_4 AT34 AN2 C
VSS[195] VSS[295] PERN7 CLKOUT_DMI_P CLK_PCIE_3GPLLP 3
BE16 R52 PCIE_CLK_REQ2# R413 10K/J_4 AU34
VSS[196] VSS[296] PERP7
BE20 VSS[197] VSS[297] T12 AU36 PETN7
BE24 T41 +3.3V_SUS AV36 AT1
VSS[198] VSS[298] PETP7 CLKOUT_DP_N / CLKOUT_BCLK1_N
BE30 VSS[199] VSS[299] T46 CLKOUT_DP_P / CLKOUT_BCLK1_P AT3
BE34 T49 PCIE_CLK_REQ0# R239 10K/J_4 BG34
VSS[200] VSS[300] PCIE_CLK_REQ3# R434 10K/J_4 PERN8
BE38 VSS[201] VSS[301] T5 BJ34 PERP8
BE42 T8 PCIE_CLK_REQ4# R249 10K/J_4 BG36 AW24
VSS[202] VSS[302] PETN8 CLKIN_DMI_N CLK_BUF_PCIE_3GPLLN 2
BE46 U30 PCIE_CLK_REQB#_R R265 10K/J_4 BJ36 BA24
VSS[203] VSS[303] PETP8 CLKIN_DMI_P CLK_BUF_PCIE_3GPLLP 2
BE48 VSS[204] VSS[304] U31 AK48 CLKOUT_PCIE0N
BE50 U32 PCIE_CLK_REQ5# R253 10K/J_4 AK47
VSS[205] VSS[305] CLKOUT_PCIE0P
BE6 VSS[206] VSS[306] U34 CLKIN_BCLK_N AP3 CLK_BUF_BCLKN 2
BE8 P38 PCIE_CLK_REQ0# P9 AP1
VSS[207] VSS[307] PCIECLKRQ0# / GPIO73 (+3V_S5) CLKIN_BCLK_P CLK_BUF_BCLKP 2
BF3 V11 31 CLK_PCIE_WLANN AM43
From CLK BUFFER

VSS[208] VSS[308] CLKOUT_PCIE1N
BF49 VSS[209] VSS[309] P16 PCIECLKRQ{0,3,4,5,6,7}# should have a 31 CLK_PCIE_WLANP AM45 CLKOUT_PCIE1P
BF51 VSS[210] VSS[310] V19 10K pull-up to +V3.3A.PCIECLKRQ{1,2} MiniWLAN CLKIN_DOT_96N F18 CLK_BUF_DREFCLKN 2
BG18 V20 should have a 10K pull-up to +3.3S 31 PCIE_CLK_REQ1# U4 E18 CLK_BUF_DREFCLKP 2
BG24
VSS[211] VSS[311]
V22
PCIECLKRQ1# / GPIO18 (+3V) CLKIN_DOT_96P
VSS[212] VSS[312] (DS 401376 Table2-26)
BG4 VSS[213] VSS[313] V30 AM47 CLKOUT_PCIE2N
BG50 VSS[214] VSS[314] V31 AM48 CLKOUT_PCIE2P CLKIN_SATA_N / CKSSCD_N AH13 CLK_BUF_DREFSSCLKN 2
BH11 VSS[215] VSS[315] V32 CLKIN_SATA_P / CKSSCD_P AH12 CLK_BUF_DREFSSCLKP 2
BH15 V34 PEG_CLKREQ# R435 10K/J_4 PCIE_CLK_REQ2# N4
BH19
VSS[216] VSS[316]
V35
PCIECLKRQ2# / GPIO20 (+3V)
VSS[217] VSS[317]
BH23 VSS[218] VSS[318] V38 AH42 CLKOUT_PCIE3N REFCLK14IN P41 CLK_PCH_14M 2
BH31 VSS[219] VSS[319] V43 AH41 CLKOUT_PCIE3P
BH35 V45 C384 *5.6P/50V_4_NC/COG
VSS[220] VSS[320] PCIE_CLK_REQ3# CLK_PCI_FB
BH39 VSS[221] VSS[321] V46 A8 PCIECLKRQ3# / GPIO25 (+3V_S5) CLKIN_PCILOOPBACK J42 CLK_PCI_FB 9
BH43 VSS[222] VSS[322] V47 LOW acvite on GPIO47 for GFX CLK output T33
BH47 VSS[223] VSS[323] V49 AM51 CLKOUT_PCIE4N Intel recommendation
B BH7 VSS[224] VSS[324] V5 AM53 CLKOUT_PCIE4P XTAL25_IN AH51 XTAL25_IN R227 *0_NC B
C12 VSS[225] VSS[325] V7 Q15 XTAL25_OUT AH53 XTAL25_OUT T56 short0402
C50 V8 PCIE_CLK_REQ4# M9
D51
VSS[226]
VSS[227]
VSS[326]
VSS[327] W2 FDN357N PCIECLKRQ4# / GPIO26 (+3V_S5)
XCLK_RCOMP AF38 XCLK_RCOMP 67
+1.05V_PCH
E12 W52 R219 90.9/F_4
VSS[228] VSS[328] SMB_CLK_ME1
E16 VSS[229] VSS[329] Y11 1 3 SMBCLK1 25 AJ50 CLKOUT_PCIE5N
E20 Y12 AJ52 T45 CLK_FLEX0 T30
E24
VSS[230] VSS[330]
Y15
CLKOUT_PCIE5P (+3V) CLKOUTFLEX0 / GPIO64
P43 CLK_FLEX1 T32
VSS[231] VSS[331] PCIE_CLK_REQ5# (+3V_S5) (+3V) CLKOUTFLEX1 / GPIO65 CLK_FLEX2 T31
E30 Y19 H6 T42
2
E34
VSS[232] VSS[332]
Y23
PCIECLKRQ5# / GPIO44 (+3V) CLKOUTFLEX2 / GPIO66
N50 CLK_FLEX3
E38
VSS[233] VSS[333]
Y28
(+3V) CLKOUTFLEX3 / GPIO67 R243 22/J_4
CLK_48M_CARD 23
VSS[234] VSS[334]
E42 Y30 AK53
E46
VSS[235]
VSS[236]
VSS[335]
VSS[336] Y31 +3.3V_SUS
31 CLK_PCIE_LANN
31 CLK_PCIE_LANP AK51
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P Clock Flex 77
E48 VSS[237] VSS[337] Y32 LAN R8236 => UM7 POP 33ohm
C419
PCIE_CLK_REQB#_R
E6
E8
VSS[238] VSS[338] Y38
Y43
31 PCIE_CLK_REQB#_R P13 PEG_B_CLKRQ# / GPIO56(+3V_S5) UM9 POP 22ohm 10P/50V/COG
F49
VSS[239]
VSS[240]
VSS[339]
VSS[340] Y46 0918 check
2
F5 P49 IbexPeak-M_Rev1_0
VSS[241] VSS[341]
G10 VSS[242] VSS[342] Y5
G14 Y6 SMB_DATA_ME1 1 3
VSS[243] VSS[343] SMBDAT1 25
G18 Y8
G2
VSS[244]
VSS[245]
VSS[344]
VSS[345] P24 66
G22 VSS[246] VSS[346] T43 Q14
G32 VSS[247] VSS[347] AD51
G36 AT8 FDN357N
VSS[248] VSS[348]
G40 VSS[249] VSS[349] AD47
G44 VSS[250] VSS[350] Y47
G52 VSS[251] VSS[351] AT12
AF39 VSS[252] VSS[352] AM6
A H16 VSS[253] VSS[353] AT13 A
H20 VSS[254] VSS[354] AM5
H30 VSS[255] VSS[355] AK45
H34 VSS[256] VSS[356] AK39
H38 VSS[257] VSS[366] AV14
H42 VSS[258]
IbexPeak-M_Rev1_0 Quanta Computer Inc.
PROJECT : UM8B DIS
1A
PCH 2/5 (PCIE, SMBUS, CK)
5 4 3 2 1
1 2 3 4 5 6 7 8
www.bufanxiu.com
+3.3V_RUN
IBEX PEAK-M (PCI,USB,NVRAM)
H40
U21E
AD0 Ibex-M NV_CE#0 AY9
IBEX PEAK-M (DMI,FDI,GPIO)
09
N34 AD1 5 OF 10 NV_CE#1 BD1
RP11 C44 AP15 U21C
PCI_PIRQD# AD2 NV_CE#2
5 6 A38 AD3 NV_CE#3 BD8 FDI_RXN0 BA18
PCI_IRDY# 4 7 PCI_SERR# C36 BC24 Ibex-M BH17
AD4 3 DMI_RXN0 DMI0RXN FDI_RXN1
A PCI_STOP# 3 8 REQ1# J34 AV9 BJ22 3 OF 10 BD16 A
AD5 NV_DQS0 3 DMI_RXN1 DMI1RXN FDI_RXN2
PCI_PIRQA# 2 9 PCI_FRAME# A40 BG8 AW20 BJ16
PCI_PIRQC# 1 10 +3.3V_RUN D45
E36
AD6
AD7 NVRAM NV_DQS1
AP7
3
3
DMI_RXN2
DMI_RXN3 BJ20
DMI2RXN
DMI3RXN
FDI_RXN3
FDI_RXN4 BA16
BE14
8.2KX8 AD8 NV_DQ0 / NV_IO0 FDI_RXN5
H48 AD9 NV_DQ1 / NV_IO1 AP6 3 DMI_RXP0 BD24 DMI0RXP FDI_RXN6 BA14
E40 AD10 NV_DQ2 / NV_IO2 AT6 3 DMI_RXP1 BG22 DMI1RXP FDI_RXN7 BC12
+3.3V_SUS C40 AT9 BA20
AD11 NV_DQ3 / NV_IO3 3 DMI_RXP2 DMI2RXP
RP9 M48 BB1 BG20 BB18
AD12 NV_DQ4 / NV_IO4 3 DMI_RXP3 DMI3RXP FDI_RXP0
5 6 USB_OC7# M45 AV6 BF17
USB_OC2# USB_OC5# AD13 NV_DQ5 / NV_IO5 FDI_RXP1
4 7 F53 AD14 NV_DQ6 / NV_IO6 BB3 3 DMI_TXN0 BE22 DMI0TXN FDI_RXP2 BC16
USB_OC6# 3 8 USB_OC4# M40 BA4 BF21 BG16
USB_OC1# 2 9 USB_OC3# M43
AD15
AD16
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8 BE4
3
3
DMI_TXN1
DMI_TXN2 BD20
DMI1TXN
DMI2TXN
DMI FDI FDI_RXP3
FDI_RXP4 AW16
USB_OC0# 1 10 +3.3V_SUS J36 BB6 BE18 BD14
AD17 NV_DQ9 / NV_IO9 3 DMI_TXN3 DMI3TXN FDI_RXP5
K48 AD18 NV_DQ10 / NV_IO10 BD6 FDI_RXP6 BB14
8.2KX8 F40 BB7 BD22 BD12
AD19 NV_DQ11 / NV_IO11 3 DMI_TXP0 DMI0TXP FDI_RXP7
C42 AD20 NV_DQ12 / NV_IO12 BC8 3 DMI_TXP1 BH21 DMI1TXP
+3.3V_RUN K46 BJ8 BC20
AD21 NV_DQ13 / NV_IO13 3 DMI_TXP2 DMI2TXP
RP12 M51 BJ6 BD18 BJ14
AD22 NV_DQ14 / NV_IO14 3 DMI_TXP3 DMI3TXP FDI_INT
5 6 PCI_PLOCK# J52 BG6 BF13
USB_MCARD1_DET# PCI_PERR# AD23 NV_DQ15 / NV_IO15 FDI_FSYNC0
4 7 K51 AD24 FDI_FSYNC1 BH13
PCI_DEVSEL# 3 8 REQ0# L34 BD3 NV_ALE BH25 BJ12
PCI_TRDY# PCI_PIRQB# AD25 NV_ALE NV_CLE DMI_COMP DMI_ZCOMP FDI_LSYNC0
2 9 F42 AD26 NV_CLE AY6 +1.05V_PCH BF25 DMI_IRCOMP FDI_LSYNC1 BG14
INTH# 1 10 +3.3V_RUN J40 R400 49.9/F_4
AD27
G46 AD28
8.2KX8 F44
M47
AD29 NV_RCOMP AU2
T6
System Power Management P12
H36
AD30
AD31 PCI NV_RB# AV7
3 XDP_DBRESET#
TP37 M6
B17
SYS_RESET#
SYS_PWROK
SLP_S3#
SLP_S4# H7 TP35
SIO_SLP_S3# 25
R273 *0_NC PCH_PWROK K5 PWROK SLP_M#

J50 C/BE0# NV_WR#0_RE# AY8 25 ECPWROK MEPWROK SLP_M# K8 TP32
B G42 C/BE1# NV_WR#1_RE# AY5 TP23 N2 B
H47 TP48 RSV_ICH_LAN_RST# A10
C/BE2# LAN_RST#
G34 AV11 3 PM_DRAM_PWRGD D9 M1 SUS_PWR_ACK 25
C/BE3# NV_WE#_CK0
BF5 C16
DRAMPWROK (+3V_S5) SUS_PWR_DN_ACK / GPIO30 P7
NV_WE#_CK1 25 RSMRST# RSMRST# (+3V_S5) ACPRESENT / GPIO31 AC_PRESENT 25
PCI_PIRQA# G38 Y1
PCI_PIRQB# H51
PIRQA#
P5
(+3V) CLKRUN# / GPIO32 P8
CLKRUN# 25
PIRQB# 25 PM_PWRBTN#_R PWRBTN# (+3V_S5) SUS_STAT# / GPIO61
PCI_PIRQC# B37 H18 TP31 F3 TP49
PCI_PIRQD# PIRQC# USBP0N USBP0- 31 (+3V_S5) SUSCLK / GPIO62 SIO_SLP_S5#
A44 PIRQD# USBP0P J18
A18
USBP0+ 31 USB #0 PM_RI# F14
(+3V_S5) SLP_S5# / GPIO63 E4
A6 PM_BATLOW#
SIO_SLP_S5# 25
REQ0# USBP1N USBP1- 31 RI# (+3V_S5) BATLOW# / GPIO72
F51 C18
REQ1# A46
REQ0# USBP1P
N20
USBP1+ 31 USB #1 31
3
PCIE_WAKE#
PM_SYNC
J12
BJ10
WAKE#
F6
REQ2# REQ1# / GPIO50 (+5V) USBP2N USBP2- 27 PMSYNCH (+3V_S5) SLP_LAN# / GPIO29
31 USB_MCARD1_DET#
USB_MCARD1_DET#
B45
M53
REQ2# / GPIO52 (+5V) USBP2P P20
J20
USBP2+ 27 USB #2 (eSATA)
REQ3# / GPIO54 (+5V) USBP3N
L20 IbexPeak-M_Rev1_0
GNT0# USBP3P
F48 GNT0# USBP4N F20 USBP4- 31
GNT1# K45
F36
GNT1# / GPIO51 (+3V) USBP4P G20
A20
USBP4+ 31 WLAN +3.3V_RUN
GNT3# GNT2# / GPIO53 (+3V) USBP5N USBP5- 31
H53 GNT3# / GPIO55 (+3V) USBP5P C20
M22
USBP5+ 31 WWAN +3.3V_RUN REQ2# R431 8.2K
PIRQE# USBP6N PIRQE# R260 8.2K
B41 PIRQE# / GPIO2 USBP6P N22
R254 PIRQF# K53 (+5V) B21 CLKRUN# R402 8.2K PIRQF# R247 8.2K
*10K/F_4_NC R242 BT_DET# PIRQF# / GPIO3 (+5V) USBP7N XDP_DBRESET# R240 10K/J_4 BT_DET# R266 8.2K
27 BT_DET# A36 PIRQG# / GPIO4 USBP7P D21
*1K/F_4_NC INTH# A48 (+5V) H22
PIRQH# / GPIO5 (+5V) USBP8N USBP8- 27
TP33 K6
USBP8P J22
E22
USBP8+ 27 BT +3.3V_SUS
PCIRST# USBP9N
USBP9P F22 Connect this signal on PCH directly to the
PCI_SERR# E44 A22 PM_RI# R269 10K/J_4
R252
*1K/F_4_NC
PCI_PERR# E50
SERR#
PERR# USB USBP10N
USBP10P C22
G24
reset button and pull‐up this signal to
+V3.3 (Core rail) through a weak pull‐up
PM_BATLOW#
PCIE_WAKE#
R437
R264
10K/J_4
1K/J_4
USBP11N USBP11- 22
C USBP11P H24 USBP11+ 22 Webcam resistor (8.2 to 10‐k ). C
PCI_IRDY# A42 L24
IRDY# USBP12N USBP12- 23 SUS_PWR_ACK R414 10K/J_4
PCI_DEVSEL#
H44
F46
PAR USBP12P M24
A24
USBP12+ 23 Card Reader AC_PRESENT R244 10K/J_4
PCI_FRAME# DEVSEL# USBP13N
C46 FRAME# USBP13P C24
RSMRST# R426 10K/J_4
PCI_PLOCK# D49 RSV_ICH_LAN_RST# R439 10K/J_4
PLOCK#
USBRBIAS# B25 USB_BIAS R430 22.6/F_4 PCH_PWROK R429 10K/J_4
R8404, R8403 and R8402 PCI_STOP# D41 STOP#
PCI_TRDY#
=> UM7 POP 22ohm C48 TRDY# USBRBIAS D25
UM9 POP 22ohm TP34 PME# M7 PME#
0918 check 76 PLT_RST-R# (+3V_S5)OC0# / GPIO59 N16 USB_OC0#
USB_OC1#
USB_OC0# 31 DMI Termination Voltage
D5 PLTRST# J16 USB_OC1# 27
(+3V_S5)OC1# / GPIO40 F16 USB_OC2#
R241 22/J_4 CLK_33M_LPC_R N52
(+3V_S5)OC2# / GPIO41 L16 USB_OC3# Set to Vcc when LOW
31 CLK_33M_LPC CLKOUT_PCI0 (+3V_S5)OC3# / GPIO42
P53 CLKOUT_PCI1 E14 USB_OC4# NV_CLE
R233 22/J_4 CLK_33M_KBC_R P46 (+3V_S5)OC4# / GPIO43 G16 USB_OC5# Set to Vcc/2 when HIGH +1.8V_RUN
25 CLK_33M_KBC CLKOUT_PCI2 (+3V_S5) OC5# / GPIO9
R255 22/J_4 CLK_PCI_FB_R P51 F12 USB_OC6#
8 CLK_PCI_FB CLKOUT_PCI3 (+3V_S5)OC6# / GPIO10
P48 T15 USB_OC7#
CLKOUT_PCI4 (+3V_S5)OC7# / GPIO14 NV_ALE R211 *1K_NC/
CLKOUT_PCI[0..4]:
IbexPeak-M_Rev1_0 +3.3V_SUS NV_CLE R214 *1K_NC
22 ohm series resistor is recommend
(single & double load) on PDG v1.1
Danbury Technology Enabled
U12 C425
Reserve capacitor pads for *MC74VHC1G08DFT2G_NC *0.1U/10V_NC/X7R High = Enable
5
improving WWAN. NV_ALE
D Boot BIOS Strap PLT_RST-R# 2 Low = Disable D
4 PLTRST# 3,14,25,31
CLK_33M_KBC CLK_33M_LPC A16 swap override Strap/Top-Block GNT0# GNT#1 Boot BIOS Location 1
76 Swap Override jumper
0 0 LPC R275 R278
3
100K/F_4 *100K/F_4_NC
C398 C411 Low = A16 swap 0 1 Reserved (NAND)
10P/50V/COG *5.6P/50V_4_NC/COG override/Top-Block R276 *0_NC Quanta Computer Inc.
GNT3# Swap Override enabled 1 0 PCI
High = Default
1 1 SPI PROJECT : UM8B DIS
1A
PCH 3/5 (PCI,ONFI,USB,DMI)
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)

U21F
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Ibex-M
IBEX PEAK-M (GND)
U21H
10
PCH_GPIO0 Y3 6 OF 10 AH45 AB16 AK30
BMBUSY# / GPIO0(+3V) CLKOUT_PCIE6N VSS[0] VSS[80]
CLKOUT_PCIE6P AH46 AA19 VSS[1] VSS[81] AK31
25 SIO_EXT_SMI# C38 AA20 AK32
TACH1 / GPIO1 (+3V) AA22
VSS[2] VSS[82]
AK34
VSS[3] VSS[83]
25 SIO_EXT_SCI# D37 TACH2 / GPIO6 (+3V) AM19 VSS[4] VSS[84] AK35
CLKOUT_PCIE7N AF48 AA24 VSS[5] VSS[85] AK38
J32 AF47 AA26 AK43
A
25 SIO_EXT_WAKE# TACH3 / GPIO7 (+3V) GPIO CLKOUT_PCIE7P
AA28
VSS[6]
VSS[7]
VSS[86]
VSS[87] AK46 A
TP36 PCH_GPIO8 F10 AA30 AK49
GPIO8(+3V_S5) MISC AA31
VSS[8]
VSS[9]
VSS[88]
VSS[89] AK5
LAN_PHY_PWR_CTRL K9 U2 AA32 AK8
LAN_PHY_PWR_CTRL / GPIO12 (+3V_S5) A20GATE GATEA20 25 VSS[10] VSS[90]
AB11 VSS[11] VSS[91] AL2
T7 GPIO15 (+3V_S5) AB15 VSS[12] VSS[92] AL52
AB23 VSS[13] VSS[93] AM11
SATA4GP AA2 AM3 AB30 BB44
SATA4GP / GPIO16 (+3V) CLKOUT_BCLK0_N/CLKOUT_PCIE8N CLK_CPU_BCLKN 3 VSS[14] VSS[94]
AB31 VSS[15] VSS[95] AD24
R251 PCIE_MCARD1_DET#_R
*0_NC F38 AM1 AB32 AM20
31 PCIE_MCARD1_DET# TACH0 / GPIO17(+3V) CLKOUT_BCLK0_P/CLKOUT_PCIE8P CLK_CPU_BCLKP 3 VSS[16] VSS[96]
PCIE_MCARD2_DET# Y7 BG10 PCH_PECI_R AB43 AM24
SCLOCK / GPIO22(+3V) PECI H_PECI 3 VSS[18] VSS[98]
GPIO27 reserve for R224 *10K_NC GPIO27 AB12
GPIO27 (+3V_S5) RCIN# T1 RCIN# 25 AB5 VSS[20] VSS[100] AM28
internal VR. TP_PCH_GPIO28 CPU AB8 VSS[21] VSS[101] BA42
V13 GPIO28 (+3V_S5) PROCPWRGD BE10 H_PWRGOOD 3 AC2 VSS[22] VSS[102] AM30
AC52 VSS[23] VSS[103] AM31
SATA2GP AB7 BD10 PCH_THRMTRIP#_R AD11 AM32
SATA2GP / GPIO36 (+3V) THRMTRIP# H_THERM 3 VSS[24] VSS[104]
R210 56/F AD12 AM34
SATA3GP VSS[25] VSS[105]
AB13 SATA3GP / GPIO37 TP1 BA22 +1.05V_VTT AD16 VSS[26] VSS[106] AM35
(+3V) AW22 R215 56/F AD23 AM38
BT_RADIO_DIS# TP2 VSS[27] VSS[107]
27 BT_RADIO_DIS# P3 SDATAOUT0 / GPIO39 (+3V) TP3 BB22 AD30 VSS[28] VSS[108] AM39
TP4 AY45
AY46
0821 UM8-0821_2.DSN AD31
AD32
VSS[29] VSS[109] AM42
AU20
GPIO46 TP5 VSS[30] VSS[110]
F1 PCIECLKRQ7# / GPIO46(+3V_S5) TP6 AV43 AD34 VSS[31] VSS[111] AM46
TP7 AV45 AU22 VSS[32] VSS[112] AV22
WWAN_RADIO_DIS# AB6 AF13 AD42 AM49
31 WWAN_RADIO_DIS# SDATAOUT1 / GPIO48 (+3V) TP8
M18 AD46
VSS[33] VSS[113]
AM7
CRIT_TEMP_REP# TP9 VSS[34] VSS[114]
25 CRIT_TEMP_REP# AA4 SATA5GP / GPIO49 (+3V) TP10 N18 AD49 VSS[35] VSS[115] AA50
B RSVD TP11 AJ24
AK41
AD7
AE2
VSS[36] VSS[116] BB10
AN32
B
TP12 VSS[37] VSS[117]
GPIO24 register not cleared TP13 AK42 AE4 VSS[38] VSS[118] AN50
by CF9h reset event. TP14 M32 AF12 VSS[39] VSS[119] AN52
H10 GPIO24 TP15 N32 Y13 VSS[40] VSS[120] AP12
GPIO45 H3 (+3V_S5) M30 AH49 AP42
VGA_TYPE PCIECLKRQ6# / GPIO45 (+3V_S5) TP16 VSS[41] VSS[121]
F8 GPIO57 TP17 N30 AU4 VSS[42] VSS[122] AP46
USB_MCARD2_DET# M11 (+3V_S5) H12 AF35 AP49
31 USB_MCARD2_DET# STP_PCI# / GPIO34 (+3V) TP18 VSS[43] VSS[123]
GPIO35 V6 AA23 AP13 AP5
WLAN_RADIO_DIS# SATACLKREQ# / GPIO35(+3V) TP19 VSS[44] VSS[124]
31 WLAN_RADIO_DIS# V3 AB45 AN34 AP8
SLOAD / GPIO38 (+3V) NC_1
AB38 AF45
VSS[45] VSS[125]
AR2
NC_2 VSS[46] VSS[126]
NC_3 AB42 AF46 VSS[47] VSS[127] AR52
NC_4 AB41 AF49 VSS[48] VSS[128] AT11
NC_5 T39 AF5 VSS[49] VSS[129] BA12
INIT3_3V# P6 AF8 VSS[50] VSS[130] AH48
TP24 C10 AG2 VSS[51] VSS[131] AT32
VGA Strap A4 BH2
AG52
AH11
VSS[52] VSS[132] AT36
AT41
VSS_NCTF_1 VSS_NCTF_16 VSS[53] VSS[133]
A49 VSS_NCTF_2 VSS_NCTF_17 BH52 AH15 VSS[54] VSS[134] AT47
+3.3V_SUS A5 BH53 AH16 AT7
A50
A52
VSS_NCTF_4 NCTF VSS_NCTF_19 BJ1
BJ2
AH24
AH32
VSS[56] VSS[136] AV12
AV16
A53 VSS_NCTF_6 VSS_NCTF_21 BJ4 AV18 VSS[58] VSS[138] AV20
Park 1G B2 VSS_NCTF_7 VSS_NCTF_22 BJ49 AH43 VSS[59] VSS[139] AV24
R261 B4 BJ5 AH47 AV30
*10K/F_4_NC B52 VSS_NCTF_9 VSS_NCTF_24 BJ50 AH7 VSS[61] VSS[141] AV34
B53 VSS_NCTF_10 VSS_NCTF_25 BJ52 AJ19 VSS[62] VSS[142] AV38
BE1 VSS_NCTF_11 VSS_NCTF_26 BJ53 AJ2 VSS[63] VSS[143] AV42
BE53 VSS_NCTF_12 VSS_NCTF_27 D1 AJ20 VSS[64] VSS[144] AV46
C
VGA_TYPE BF1 D2 AJ22 AV49 C
BF53 VSS_NCTF_14 VSS_NCTF_29 D53 AJ23 VSS[66] VSS[146] AV5
BH1 VSS_NCTF_15 VSS_NCTF_30 E1 AJ26 VSS[67] VSS[147] AV8
Park VSS_NCTF_31 E53 AJ28 VSS[68] VSS[148] AW14
R267 AJ32 AW18
IbexPeak-M_Rev1_0 VSS[69] VSS[149]
10K/F_4 AJ34 VSS[70] VSS[150] AW2
AT5 VSS[71] VSS[151] BF9
AJ4 VSS[72] VSS[152] AW32
AK12 VSS[73] VSS[153] AW36
AM41 VSS[74] VSS[154] AW40
AN19 VSS[75] VSS[155] AW52
AK26 VSS[76] VSS[156] AY11
AK22 VSS[77] VSS[157] AY43
AK23 VSS[78] VSS[158] AY47
AK28 VSS[79]
IbexPeak-M_Rev1_0
+3.3V_RUN
R230 10K GPIO35 +3.3V_RUN BMBUSY#:(Intel feedback)
RCIN# R409 10K Follow CRB checklist, 1K is
GATEA20 R408 10K for intel BIOS validation purpose.
BT_RADIO_DIS# R410 10K
SATA2GP R223 10K PCH_GPIO0 R404 10K
SATA3GP R222 10K BMBUSY#:
SATA4GP R401 10K WWAN_RADIO_DIS# R220 10K If not used, require a weak pull-up
PCIE_MCARD1_DET#_R R248 10K (8.2- KΩ to 10 kΩ) to Vcc3_3.
PCIE_MCARD2_DET# R238 10K CRB(V1.0)P28: it has 1K PU and
D 100 ohm on this net for validation purpose. D
SIO_EXT_SMI# R270 10K
+3.3V_SUS SIO_EXT_SCI# R274 10K
SIO_EXT_WAKE# R246 10K
WLAN_RADIO_DIS# R403 10K
TP_PCH_GPIO28 R232 10K CRIT_TEMP_REP# R228 10K
GPIO46 R432 10K USB_MCARD2_DET# R250 10K
GPIO45
LAN_PHY_PWR_CTRL
R436
R259
10K
*10K_NC
WWAN_RADIO_DIS# 1-X High = Strong (Default) Quanta Computer Inc.
PROJECT : UM8B DIS
1A
PCH 4/5 (GPIO & Strap)
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
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+VCCA_DAC_1_2
Cap quantities follow UM3
L29
11
+3.3V_RUN
HCB1608KF-181T15
1.524A U21G POWER U21J POWER
+1.05V_PCH AB24 VCCCORE[1] VCCADAC[1] AE50 C364 22U/6.3V_8/X5R VCCACLK = 100mA max Ibex-M 3.208A
A C355 1U/6.3V/X5R AB26 Ibex-M C368 0.1U/ 10V/X7R +1.05V_PCH L28 *10uH_NC +1.1V_LAN_VCCA_CLK AP51 10 OF 10VCCIO[5] V24 +1.05V_PCH A
C335 10U/6.3V_8/X5R VCCCORE[2] C367 0.01U/25V_4/X7R C350 *1U/6.3V_NC/X5R VCCACLK[1]
AB28 VCCCORE[3] 7 OF 10 VCCADAC[2] AE52 VCCIO[6] V26
AD26 C344 *10U/6.3V_0805_NC/X5RAP53 Y24 C387 1U/6.3V/X5R
VCCCORE[4] VCCACLK[2] VCCIO[7]
AD28 VCCCORE[5] CRT VSSA_DAC[1] AF53 Y20 DCPSUSBYP VCCIO[8] Y26
AF26 VCCCORE[6] DCPSUSBYP
USB 0.163A
AF28 VCCCORE[7] VSSA_DAC[2] AF51 VCCSUS3_3[1] V28 +3.3V_SUS
AF30 C393 0.1U/ 10V/X7R U28
VCCCORE[8] VCCSUS3_3[2] C406 0.1U/ 10V/X7R
AF31 VCCCORE[9] VCCSUS3_3[3] U26
AH26 AH38 R226 1 +VCCLAN
2 *0_NC AF23 U24 C395 0.1U/ 10V/X7R
VCCCORE[10] VCCALVDS VCCLAN[1] VCCSUS3_3[4]
AH28 VCCCORE[11] VSSA_LVDS AH39 VCCSUS3_3[5] P28
C378 *1U/6.3V_NC/X5R
AH30
AH31
VCCCORE[12] LVDS AP43
AF24 VCCLAN[2] VCCSUS3_3[6] P26
N28
VCCCORE[13] VCCTX_LVDS[1] VCCSUS3_3[7]
AJ30 VCCCORE[14] VCCTX_LVDS[2] AP45 VCCSUS3_3[8] N26
AJ31 AT46 AD38 M28 +3.3V_SUS
VCCCORE[15] VCCTX_LVDS[3] +1.05V_PCH VCCME[1] VCCSUS3_3[9]
VCCTX_LVDS[4] AT45 VCCSUS3_3[10] M26
+3.3V_RUN C401 22U/6.3_8/X5R AD39
VCC CORE VCCME[2] VCCSUS3_3[11] L28
3.208A 0.357A C385 22U/6.3_8/X5R AD41 VCCSUS3_3[12] L26
+1.05V_PCH AK24 VCCIO[24] VCC3_3[2] AB34 +3.3V_RUN VCCME[3] VCCSUS3_3[13] J28
J26 C424
L40 *1uH_NC +1.05V_LAN_VCCAPLL_EXP BJ24 C379 1U/6.3V/X5R VCCSUS3_3[14]
AB35 AF43 H28 10U/6.3V_8/X5R
C324 *10U/6.3V_0805_NC/X5R VCCAPLLEXP VCC3_3[3] C362 0.1U/ 10V/X7R C382 VCCME[4] VCCSUS3_3[15]
+1.05V_PCH HVCMOS VCCSUS3_3[16] H26
3.208A AN20 VCCIO[25] VCC3_3[4] AD35 10U/6.3V_8/X5R AF41 VCCME[5] VCCSUS3_3[17] G28
+1.05V_PCH AN22 G26
C374 10U/6.3V_8/X5R AN23 VCCIO[26] AF42
VCCSUS3_3[18]
F28
VCCIO[27] VCCME[6] VCCSUS3_3[19]
Clock and Miscellaneous

C371 1U/6.3V/X5R AN24 VCCIO[28] F26
C356 1U/6.3V/X5R VCCSUS3_3[20]
C343 1U/6.3V/X5R
AN26 VCCIO[29] 0.035A V39 VCCME[7] VCCSUS3_3[21] E28
AN28 VCCIO[30] VCCVRM[2] AT24 +1.8V_RUN VCCSUS3_3[22] E26
C365 1U/6.3V/X5R BJ26 VCCIO[31] 0.061A V41 C28
VCCME[8] VCCSUS3_3[23]
BJ28 VCCIO[32] VCCDMI[1] AT16 +1.05V_VTT VCCSUS3_3[24] C26
B AT26 VCCIO[33]
AT28 VCCIO[34]
DMI AU16
V42 VCCME[9] VCCSUS3_3[25] B27
A28
B
VCCDMI[2] C346 1U/6.3V/X5R VCCSUS3_3[26]
AU26 VCCIO[35] Y39 VCCME[10] VCCSUS3_3[27] A26
AU28 VCCIO[36]
AV26 VCCIO[37] Y41 VCCME[11] VCCSUS3_3[28] U23
AV28 VCCIO[38] PCI E* VCCPNAND[1] AM16 3.208A
AW26 VCCIO[39] VCCPNAND[2] AK16 Y42 VCCME[12] VCCIO[56] V23 +1.05V_PCH
AW28 VCCIO[40] VCCPNAND[3] AK20 0.156A +VCCRTCEXT +V5REF_SUS R257 100
BA26 VCCIO[41] VCCPNAND[4] AK19 +1.8V_RUN V9 DCPRTC V5REF_SUS F24 +5V_SUS
BA28 VCCIO[42] AK15 C391 0.1U/ 10V/X7R >1mA
VCCPNAND[5] D16 RB500V-40
BB26 VCCIO[43] VCCPNAND[6] AK13
C369 0.1U/ 10V/X7R
0.072A +3.3V_SUS
BB28 VCCIO[44] VCCPNAND[7] AM12 +1.8V_RUN AU24 VCCVRM[3]
BC26 VCCIO[45] AM13 C416 1U/6.3V/X5R
VCCPNAND[8]
BC28 VCCIO[46] VCCPNAND[9] AM15 0.072A
BD26 VCCIO[47]
+1.1V_VCCADPLLA
BB51 VCCADPLLA[1] >1mA
BD28 VCCIO[48] BB53 VCCADPLLA[2]
BE26 VCCIO[49] NAND / SPI V5REF K49 +V5REF R258 100 +5V_RUN
BE28 VCCIO[50] 0.073A D17 RB500V-40
BG26 VCCIO[51]
BG28 VCCIO[52]
VCCME3_3[1] AM8
AM9
0.085A +1.1V_VCCADPLLB
BD51
BD53
VCCADPLLB[1]
PCI/GPIO/LPC
+3.3V_RUN
VCCME3_3[2] +3.3V_RUN VCCADPLLB[2]
BH27 VCCIO[53] AP11 3.208A C418 1U/6.3V/X5R
VCCME3_3[3]
AN30 VCCIO[54] VCCME3_3[4] AP9
C361 0.1U/ 10V/X7R
+1.05V_PCH AH23 VCCIO[21] 0.357A
AN31 VCCIO[55] AJ35 VCCIO[22] VCC3_3[8] J38 +3.3V_RUN
0.357A C370 1U/6.3V/X5R AH35 L38
C373 1U/6.3V/X5R VCCIO[23] VCC3_3[9]
+3.3V_RUN AN35 VCC3_3[1] AF34 VCCIO[2] VCC3_3[10] M36
C410 0.1U/ 10V/X7R C366 1U/6.3V/X5R AH34 N36 C402 0.1U/ 10V/X7R
VCCIO[3] VCC3_3[11] C409 0.1U/ 10V/X7R
AF32 VCCIO[4] VCC3_3[12] P36
0.035A AT22 VCCVRM[1] VCC3_3[13] U35
+1.8V_RUN
BJ18
FDI C392 +VCCSST
0.1U/ 10V/X7R V12
VCC3_3[14] AD13
C VCCFDIPLL DCPSST C
L39 *1uH_NC +1.05V_VCCFDIPLL 3.208A
+1.05V_PCH C571 *10U/6.3V_0805_NC/X5R
AM23 +V1.1LAN_INT_VCCSUS Y22
VCCIO[1] C383 0.1U/ 10V/X7R DCPSUS
3.208A IbexPeak-M_Rev1_0 PCI/GPIO/LPC AK3 +1.05V_VCCSATAPLL L41 *10uH_NC +1.05V_PCH
VCCSATAPLL[1] C578 *1U/6.3V_NC/X5R
+1.05V_PCH 0.163A P18 VCCSUS3_3[29] VCCSATAPLL[2] AK1
C576 *10U/6.3V_0805_NC/X5R
+3.3V_SUS U19 VCCSUS3_3[30]
U20 VCCSUS3_3[31]
C415 0.1U/ 10V/X7R U22 AT20 +1.8V_RUN
VCCSUS3_3[32] VCCVRM[4]
0.035A
11 0.357A
V15
V16
VCC3_3[5] VCCIO[9] AH22
AH19
+1.05V_PCH
VCC3_3[6] VCCIO[10] C377 1U/6.3V/X5R
+3.3V_RUN Y16 VCC3_3[7] VCCIO[11] AD20
+1.05V_PCH L26 *0_NC +1.1V_VCCADPLLA C376 0.1U/ 10V/X7R AF22
VCCIO[12]
>1mA VCCIO[13] AD19
+1.05V_VTT AT18 V_CPU_IO[1] VCCIO[14] AF20
+ C326 C345 4.7U/6.3V/X5RAU18
10 10U C332 C358 0.1U/ 10V/X7R V_CPU_IO[2] SATA VCCIO[15] AF19
0805 1U/6.3V/X5R C347 0.1U/ 10V/X7R
CPU VCCIO[16] AH20
AB19
VCCIO[17]
2mA VCCIO[18] AB20
+RTC_CELL A12 VCCRTC VCCIO[19] AB22
C581 0.1U/ 10V/X7R RTC AD22
C584 0.1U/ 10V/X7R VCCIO[20]
L38 *0_NC +1.1V_VCCADPLLB C585 1U/6.3V/X5R 1.998A
L30 VCCSUSHDA VCCME[13] AA34 +1.05V_PCH
R236 1
6mA VCCME[14] Y34
2 *0_NC HDA Y35
3 + C570
10U C574
+3.3V_SUS
C408 1U/6.3V/X5R
VCCME[15]
VCCME[16] AA35
D 8 0805 1U/6.3V/X5R
IbexPeak-M_Rev1_0
D

PROJECT : UM8B DIS
1A
PCH 5/5 (POWER)
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
www.bufanxiu.com
12
JDIM1A M_A_DQ[0..63] 4
4 M_A_A[0..15] +1.5V_SUS
M_A_A0 98 5 M_A_DQ0
M_A_A1 A0 DQ0 M_A_DQ1
A 97 A1 DQ1 7 A
M_A_A2 96 15 M_A_DQ2
95 A3 DQ3 17 JDIM1B
M_A_A4 92 4 M_A_DQ4
91 A5 DQ5 6 75 VDD1 VSS16 44
M_A_A6 90 16 M_A_DQ6 76 48
M_A_A7 A6 DQ6 M_A_DQ7 VDD2 VSS17
86 A7 DQ7 18 81 VDD3 VSS18 49
M_A_A8 89 21 M_A_DQ8 82 54
A8 DQ8 VDD4 VSS19
SO-DIMMA SPD Address is 0XA0 M_A_A9 85 A9 DQ9 23 M_A_DQ9 87 VDD5 VSS20 55
SO-DIMMA TS Address is 0X30 M_A_A10 107 33 M_A_DQ10 88 60
M_A_A11 A10/AP DQ10 M_A_DQ11 VDD6 VSS21
84 A11 DQ11 35 93 VDD7 VSS22 61
M_A_A12 83 22 M_A_DQ12 94 65
M_A_A13 A12/BC# DQ12 M_A_DQ13 VDD8 VSS23
119 A13 DQ13 24 99 VDD9 VSS24 66
M_A_A14 80 34 M_A_DQ14 100 71
M_A_A15 A14 DQ14 M_A_DQ15 VDD10 VSS25
78 A15 DQ15 36 105 VDD11 VSS26 72
DQ16 39 M_A_DQ16 The EVENT# pin is reserved for use 106 VDD12 127
PC2100 DDR3 SDRAM SO-DIMM

VSS27

4 M_A_BS#0 109 BA0 DQ17 41 M_A_DQ17 to flag critical module temperature. 111 VDD13 VSS28 128
108 51 M_A_DQ18 A resistor may be connected from 112 133
4 M_A_BS#1 BA1 DQ18 VDD14 VSS29
79 53 M_A_DQ19 117 134
4 M_A_BS#2 BA2 DQ19 M_A_DQ20 EVENT# bus line to Vddspd on the VDD15 VSS30
4 M_A_CS#0 114 40 118 138
121
S0# DQ20
42 M_A_DQ21 system planer to act as a pullup. 123
VDD16 VSS31
139
4 M_A_CS#1 S1# DQ21 VDD17 VSS32
4 M_A_CLKP0 101 50 M_A_DQ22 (DDR3 DS REV0.5) 124 144
CK0 DQ22 M_A_DQ23 VDD18 VSS33
4 M_A_CLKN0 103 CK0# DQ23 52 VSS34 145
102 57 M_A_DQ24 +3.3V_RUN 199 150
4 M_A_CLKP1 CK1 DQ24 VDDSPD VSS35
104 59 M_A_DQ25 151
4 M_A_CLKN1 CK1# DQ25 VSS36
73 67 M_A_DQ26 77 155
4 M_A_CKE0 CKE0 DQ26 NC1 VSS37
4 M_A_CKE1 74 CKE1 DQ27 69 M_A_DQ27 for S3 power reduction 122 NC2 VSS38 156
115 56 M_A_DQ28 125 161
4 M_A_CAS# CAS# DQ28 NCTEST VSS39
110 58 M_A_DQ29 162
4 M_A_RAS# RAS# DQ29 VSS40
B 113 68 M_A_DQ30 PM_EXTTS#0 198 167 B
4 M_A_WE# WE# DQ30 3 PM_EXTTS#0 EVENT# VSS41
R146 10K/F_4 DIMM0_SA0 197 70 M_A_DQ31 30 168
SA0 DQ31 3,13 DDR3_DRAMRST# RESET# VSS42
R147 10K/F_4 DIMM0_SA1 201 129 M_A_DQ32 +1.5V_SUS R14 *1K/F_4_NC 172
SA1 DQ32 M_A_DQ33 VSS43
13,31 WLAN_SMBCLK 202 SCL DQ33 131 VSS44 173
200 141 M_A_DQ34 +SMDDR_VREF_DQ0 1 178
13,31 WLAN_SMBDATA SDA DQ34 M_A_DQ35 VREF_DQ VSS45
DQ35 143 +SMDDR_VREF_DIMM0 126 VREF_CA VSS46 179
116 130 M_A_DQ36 184
4 M_A_ODT0 ODT0 DQ36 VSS47
120 132 M_A_DQ37 185
4
4
M_A_ODT1
M_A_DM[0..7]
M_A_DM0
ODT1 DQ37
DQ38 140 M_A_DQ38
M_A_DQ39
32 2 VSS1
VSS48
VSS49 189
11 142 C599 C10 3 190
M_A_DM1 DM0 DQ39 M_A_DQ40 *0.01U/16V/X7R_4_NC VSS2 VSS50
28 DM1 DQ40 147 2.2U/ 6.3V/X5R 8 VSS3 VSS51 195
M_A_DM2 M_A_DQ41
(204P)
46 DM2 DQ41 149 9 VSS4 VSS52 196
M_A_DM3 M_A_DQ42
(204P)
63 DM3 DQ42 157 13 VSS5

M_A_DM4 136 159 M_A_DQ43 14
M_A_DM5 DM4 DQ43 M_A_DQ44 VSS6
153 DM5 DQ44 146 19 VSS7
M_A_DM6 170 148 M_A_DQ45 20
M_A_DM7 DM6 DQ45 M_A_DQ46 VSS8
187 DM7 DQ46 158 25 VSS9
160 M_A_DQ47 26 203 +0.75V_DDR_VTT
4 M_A_DQSP[0..7] M_A_DQSP0 DQ47 M_A_DQ48 VSS10 VTT1
12 DQS0 DQ48 163 31 VSS11 VTT2 204
M_A_DQSP1 29 165 M_A_DQ49 32
M_A_DQSP2 DQS1 DQ49 M_A_DQ50 VSS12
47 DQS2 DQ50 175 37 VSS13
M_A_DQSP3 64 177 M_A_DQ51 38
137 164 43
GND
GND
154 DQS5 DQ53 166
M_A_DQSP6 171 174 M_A_DQ54
M_A_DQSP7 DQS6 DQ54 M_A_DQ55 DDR3-DIMM0
188 176
205
206
4 M_A_DQSN[0..7] M_A_DQSN0 DQS7 DQ55 M_A_DQ56 +1.5V_SUS +VTT_DDR_REF
10 DQS#0 DQ56 181
M_A_DQSN1 27 183 M_A_DQ57
M_A_DQSN2 DQS#1 DQ57 M_A_DQ58
45 DQS#2 DQ58 191
C
M_A_DQSN3 62 193 M_A_DQ59 C
M_A_DQSN4 DQS#3 DQ59 M_A_DQ60 R28 R54 +SMDDR_VREF_DIMM0
135 DQS#4 DQ60 180
M_A_DQSN5 152 182 M_A_DQ61 1K/F *0_NC
M_A_DQSN6 DQS#5 DQ61 M_A_DQ62
169 DQS#6 DQ62 192
M_A_DQSN7 186 194 M_A_DQ63
DQS#7 DQ63 M2 VREF
DDR3-DIMM0
1
R33
1K/F C75 Remove M2 VREF Function
Place these Caps near So-Dimm0. 0.1U/16V_4/Y5V
Intel Design Guide1.5 had remove M2 VREF (I2C programble VREF)
2
16
Some Projects replace 10UF 0805 by 4.7UF 0603
It can cost down 30% Wait Victor check
+1.5V_SUS
+0.75V_DDR_VTT
M3 => support for Clarksfield processor
C40 10U/ 6.3V_6/X5R
C24 10U/ 6.3V_6/X5R C227 1U/6.3V/X5R
C23 10U/ 6.3V_6/X5R C203 1U/6.3V/X5R
C50 10U/ 6.3V_6/X5R C204 1U/6.3V/X5R Wait Victor check
C64 10U/ 6.3V_6/X5R C217 1U/6.3V/X5R
C66 10U/ 6.3V_6/X5R C234 10U/6.3V_8/X5R
C25 0.1U/ 10V/X7R C224 10U/6.3V_8/X5R
C59 0.1U/ 10V/X7R C244 10U/6.3V_8/X5R +1.5V_SUS +VTT_DDR_REF M1 VREF M3 VREF
C30 0.1U/ 10V/X7R
C35 0.1U/ 10V/X7R
C58 0.1U/ 10V/X7R
R4 R8
C21 *330U/_NC 1K/F
+
D *0_NC D
+SMDDR_VREF_DQ0 +SMDDR_VREF_DQ0 +M_VREF_DQ_DIMM0
7343 2.5
R7 *0_NC R6 *0_NC
+SMDDR_VREF_DIMM0
1
C80 0.1U/ 10V/X7R R5
+3.3V_RUN
C109
C99
2.2U/ 6.3V/X5R
2.2U/ 6.3V/X5R
1K/F C14 Quanta Computer Inc.
0.1U/16V_4/Y5V
2
C89 0.1U/ 10V/X7R

C189 2.2U/ 6.3V/X5R
16 PROJECT : UM8B DIS
C191 0.1U/ 10V/X7R Size Document Number Rev
1A
DDR3 DIMM-0
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
www.bufanxiu.com
13
JDIM2A M_B_DQ[0..63] 4
4 M_B_A[0..15] +1.5V_SUS
M_B_A0 98 5 M_B_DQ0
M_B_A1 A0 DQ0 M_B_DQ1
A 97 A1 DQ1 7 A
M_B_A2 96 15 M_B_DQ2
95 A3 DQ3 17 JDIM2B
M_B_A4 92 4 M_B_DQ4
91 A5 DQ5 6 75 VDD1 VSS16 44
M_B_A6 90 16 M_B_DQ6 76 48
M_B_A7 A6 DQ6 M_B_DQ7 VDD2 VSS17
86 A7 DQ7 18 81 VDD3 VSS18 49
M_B_A8 89 21 M_B_DQ8 82 54
85 A9 DQ9 23 87 VDD5 VSS20 55
M_B_A10 107 33 M_B_DQ10 88 60
M_B_A11 A10/AP DQ10 M_B_DQ11 VDD6 VSS21
84 A11 DQ11 35 93 VDD7 VSS22 61
M_B_A12 83 22 M_B_DQ12 94 65
M_B_A13 A12/BC# DQ12 M_B_DQ13 VDD8 VSS23
119 A13 DQ13 24 99 VDD9 VSS24 66
M_B_A14 80 34 M_B_DQ14 100 71
78 A15 DQ15 36 105 VDD11 VSS26 72
39 M_B_DQ16 106 127
DQ16 VDD12

VSS27

109 41 M_B_DQ17 111 128
4M_B_BS#0 BA0 DQ17 VDD13 VSS28
108 51 M_B_DQ18 112 133
79 53 M_B_DQ19 117 134
114 40 M_B_DQ20 118 138
4M_B_CS#0 S0# DQ20 VDD16 VSS31
121 42 M_B_DQ21 123 139
4M_B_CS#1 S1# DQ21 VDD17 VSS32
101 50 M_B_DQ22 124 144
4M_B_CLKP0 CK0 DQ22 VDD18 VSS33
103 52 M_B_DQ23 145
4M_B_CLKN0 CK0# DQ23 VSS34
102 57 M_B_DQ24 199 150
4M_B_CLKP1 CK1 DQ24 +3.3V_RUN VDDSPD VSS35
104 59 M_B_DQ25 151
4M_B_CLKN1 CK1# DQ25 VSS36
73 67 M_B_DQ26 77 155
4M_B_CKE0 CKE0 DQ26 NC1 VSS37
74 69 M_B_DQ27 122 156
4M_B_CKE1 CKE1 DQ27 NC2 VSS38
115 56 M_B_DQ28 125 161
4M_B_CAS# CAS# DQ28 NCTEST VSS39
110 58 M_B_DQ29 162
4M_B_RAS# RAS# DQ29 VSS40
B 113 68 M_B_DQ30 198 167 B
4M_B_WE# WE# DQ30 3 PM_EXTTS#1 EVENT# VSS41
R122 10K/F_4 DIMM1_SA0
197 70 M_B_DQ31 30 168
SA0 DQ31 3,12 DDR3_DRAMRST# RESET# VSS42
+3.3V_RUN R121 10K/F_4 DIMM1_SA1
201 129 M_B_DQ32 172
SA1 DQ32 M_B_DQ33 VSS43
12,31 WLAN_SMBCLK 202 SCL DQ33 131 VSS44 173
200 141 M_B_DQ34 +SMDDR_VREF_DQ1 1 178
12,31 WLAN_SMBDATA SDA DQ34 M_B_DQ35 VREF_DQ VSS45
DQ35 143 +SMDDR_VREF_DIMM1 126 VREF_CA VSS46 179
116 130 M_B_DQ36 184
4 M_B_ODT0 ODT0 DQ36 VSS47
120 132 M_B_DQ37 185
4
4
M_B_ODT1
M_B_DM[0..7]
M_B_DM0
ODT1 DQ37
DQ38 140 M_B_DQ38
M_B_DQ39
32 2 VSS1
VSS48
VSS49 189
11 142 C600 C12 3 190
DM0 DQ39 VSS2 VSS50
SO-DIMMB SPD Address is 0XA4 M_B_DM1 28 DM1 DQ40 147 M_B_DQ40 *0.01U/16V/X7R_4_NC 2.2U/ 6.3V/X5R 8 VSS3 VSS51 195
SO-DIMMB TS Address is 0X34 M_B_DM2 M_B_DQ41
(204P)
46 DM2 DQ41 149 9 VSS4 VSS52 196
M_B_DM3 M_B_DQ42
(204P)
63 DM3 DQ42 157 13 VSS5

M_B_DM4 136 159 M_B_DQ43 14
M_B_DM5 DM4 DQ43 M_B_DQ44 VSS6
153 DM5 DQ44 146 19 VSS7
M_B_DM6 170 148 M_B_DQ45 20
M_B_DM7 DM6 DQ45 M_B_DQ46 VSS8
187 DM7 DQ46 158 25 VSS9
160 M_B_DQ47 26 203 +0.75V_DDR_VTT
4 M_B_DQSP[0..7] M_B_DQSP0 12 DQ47 M_B_DQ48 VSS10 VTT1
DQS0 DQ48 163 31 VSS11 VTT2 204
M_B_DQSP1 29 165 M_B_DQ49 32
M_B_DQSP2 47 DQS1 DQ49 M_B_DQ50 VSS12
DQS2 DQ50 175 37 VSS13
M_B_DQSP3 64 177 M_B_DQ51 38
M_B_DQSP4 137 DQS3 DQ51 M_B_DQ52 +1.5V_SUS +VTT_DDR_REF VSS14
164 43
GND
GND
M_B_DQSP5 154 DQS4 DQ52 M_B_DQ53 VSS15
DQS5 DQ53 166
M_B_DQSP6 171 174 M_B_DQ54
M_B_DQSP7 188 DQS6 DQ54 M_B_DQ55 DDR3-DIMM1
176
205
206
4 M_B_DQSN[0..7] M_B_DQSN0 10 DQS7 DQ55 M_B_DQ56 R27 R52 +SMDDR_VREF_DIMM1
DQS#0 DQ56 181
M_B_DQSN1 27 183 M_B_DQ57 1K/F *0_NC
M_B_DQSN2 45 DQS#1 DQ57 M_B_DQ58
DQS#2 DQ58 191
C
M_B_DQSN3 62 193 M_B_DQ59 C
DQS#4 DQ60 180
M_B_DQSN5 152 182 M_B_DQ61
DQS#6 DQ62 192
1
M_B_DQSN7 186 194 M_B_DQ63 R35
DQS#7 DQ63 1K/F C88 Remove M2 VREF Function
0.1U/16V_4/Y5V
Intel Design Guide1.5 had remove M2 VREF (I2C programble VREF)
2
DDR3-DIMM1 16
Place these Caps near So-Dimm1.

Some Projects replace 10UF 0805 by 4.7UF 0603 M3 => support for Clarksfield processor
It can cost down 30%
+1.5V_SUS +0.75V_DDR_VTT Wait Victor check
C41 10U/ 6.3V_6/X5R C247 1U/6.3V/X5R
C31 10U/ 6.3V_6/X5R C226 1U/6.3V/X5R for arrandal nc, for clesfied connect
C29 10U/ 6.3V_6/X5R C209 1U/6.3V/X5R
C63 10U/ 6.3V_6/X5R C232 1U/6.3V/X5R
C32 10U/ 6.3V_6/X5R C211 10U/6.3V_8/X5R
C33 10U/ 6.3V_6/X5R C219 10U/6.3V_8/X5R
C52 0.1U/ 10V/X7R C250 10U/6.3V_8/X5R +1.5V_SUS +VTT_DDR_REF M1 VREF M3 VREF
C39 0.1U/ 10V/X7R
C28 0.1U/ 10V/X7R
C51 0.1U/ 10V/X7R
C27 0.1U/ 10V/X7R R15 R16
1K/F *0_NC
C26 330U +SMDDR_VREF_DQ1 +SMDDR_VREF_DQ1 +M_VREF_DQ_DIMM1
+
D D
7343 2.5 R11 *0_NC R9 *0_NC
+SMDDR_VREF_DIMM1
1
R13
C79 0.1U/ 10V/X7R 1K/F C15
C74 0.1U/ 10V/X7R 0.1U/16V_4/Y5V Quanta Computer Inc.
2
+3.3V_RUN C107 2.2U/ 6.3V/X5R 16

C96 2.2U/ 6.3V/X5R
C174 2.2U/ 6.3V/X5R PROJECT : UM8B DIS
C176 0.1U/ 10V/X7R Size Document Number Rev
1A
DDR3 DIMM-1
1 2 3 4 5 6 7 8
5 4 3 2 1
www.bufanxiu.com
U16A MADISON-GFX.DSN(0827)
14
PEG_TXP0 AA38 Y33 PEG_RXP0_C C238 0.1U/10V/X5R_4 PEG_RXP0
3 PEG_TXP0 PCIE_RX0P PCIE_TX0P PEG_RXP0 3
D PEG_TXN0 Y37 Y32 PEG_RXN0_C C246 0.1U/10V/X5R_4 PEG_RXN0 D
3 PEG_TXN0 PCIE_RX0N PCIE_TX0N PEG_RXN0 3
PEG_TXP1 Y35 W33 PEG_RXP1_C C237 0.1U/10V/X5R_4 PEG_RXP1

PEG_TXN1 W36 W32 PEG_RXN1_C C225 0.1U/10V/X5R_4 PEG_RXN1
PEG_TXP2 W38 U33 PEG_RXP2_C C248 0.1U/10V/X5R_4 PEG_RXP2

PEG_TXN2 V37 U32 PEG_RXN2_C C255 0.1U/10V/X5R_4 PEG_RXN2
PEG_TXP3 V35 U30 PEG_RXP3_C C215 0.1U/10V/X5R_4 PEG_RXP3

PEG_TXN3 U36 U29 PEG_RXN3_C C231 0.1U/10V/X5R_4 PEG_RXN3
PEG_TXP4 U38 T33 PEG_RXP4_C C259 0.1U/10V/X5R_4 PEG_RXP4

PEG_TXN4 T37 T32 PEG_RXN4_C C261 0.1U/10V/X5R_4 PEG_RXN4
PCI EXPRESS INTERFACE

PEG_TXP5 T35 T30 PEG_RXP5_C C256 0.1U/10V/X5R_4 PEG_RXP5
PEG_TXN5 R36 T29 PEG_RXN5_C C249 0.1U/10V/X5R_4 PEG_RXN5
PEG_TXP6 R38 P33 PEG_RXP6_C C264 0.1U/10V/X5R_4 PEG_RXP6

PEG_TXN6 P37 P32 PEG_RXN6_C C267 0.1U/10V/X5R_4 PEG_RXN6
C 3 PEG_TXN6 PCIE_RX6N PCIE_TX6N PEG_RXN6 3 C
PEG_TXP7 P35 P30 PEG_RXP7_C C266 0.1U/10V/X5R_4 PEG_RXP7

PEG_TXN7 N36 P29 PEG_RXN7_C C268 0.1U/10V/X5R_4 PEG_RXN7
PEG_TXP8 N38 N33 PEG_RXP8_C C270 0.1U/10V/X5R_4 PEG_RXP8

PEG_TXN8 M37 N32 PEG_RXN8_C C273 0.1U/10V/X5R_4 PEG_RXN8
PEG_TXP9 M35 N30 PEG_RXP9_C C262 0.1U/10V/X5R_4 PEG_RXP9

PEG_TXN9 L36 N29 PEG_RXN9_C C260 0.1U/10V/X5R_4 PEG_RXN9
PEG_TXP10 L38 L33 PEG_RXP10_C C277 0.1U/10V/X5R_4 PEG_RXP10

PEG_TXN10 K37 L32 PEG_RXN10_C C280 0.1U/10V/X5R_4 PEG_RXN10
PEG_TXP11 K35 L30 PEG_RXP11_C C269 0.1U/10V/X5R_4 PEG_RXP11

PEG_TXN11 J36 L29 PEG_RXN11_C C272 0.1U/10V/X5R_4 PEG_RXN11
PEG_TXP12 J38 K33 PEG_RXP12_C C283 0.1U/10V/X5R_4 PEG_RXP12

PEG_TXN12 H37 K32 PEG_RXN12_C C281 0.1U/10V/X5R_4 PEG_RXN12
B B
PEG_TXP13 H35 J33 PEG_RXP13_C C288 0.1U/10V/X5R_4 PEG_RXP13

PEG_TXN13 G36 J32 PEG_RXN13_C C282 0.1U/10V/X5R_4 PEG_RXN13
PEG_TXP14 G38 K30 PEG_RXP14_C C275 0.1U/10V/X5R_4 PEG_RXP14

PEG_TXN14 F37 K29 PEG_RXN14_C C278 0.1U/10V/X5R_4 PEG_RXN14
PEG_TXP15 F35 H33 PEG_RXP15_C C289 0.1U/10V/X5R_4 PEG_RXP15

PEG_TXN15 E37 H32 PEG_RXN15_C C291 0.1U/10V/X5R_4 PEG_RXN15
CLOCK
8 CLK_PCIE_VGAP AB35 PCIE_REFCLKP
8 CLK_PCIE_VGAN AA36 PCIE_REFCLKN
CALIBRATION
AJ21 Y30 R135 1.27K
NC#1 PCIE_CALRP
AK21 NC#2
R343 10K_4 AH16 Y29 R116 2K/F_4 +1.0V_GFX_PCIE
PWRGOOD PCIE_CALRN
A A
R120 *0_4_NC PERST# AA30
3,9,25,31 PLTRST# PERSTB
C193
216-0729051(M96-M2 XT)
*100P_NC/X7R
PROJECT : UM8B DIS
1A
Madison PCIE I/F
5 4 3 2 1
5 4 3 2 1
R342 R340 R341 R339
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RAM_ RAM_ RAM_ RAM_
Memory Straps TYPE_CFG3 TYPE_CFG2 TYPE_CFG1 TYPE_CFG0 U16B CONFIGURATION STRAPS
800 MHz 1GB(64M*16) Hynix_Orion die H5TQ1G63BFR-12C 0 0 0 0
STRAPS PIN DESCRIPTION SET
800 MHz 1GB(64M*16) Samsung_E die K4W1G1646E-HC12 0 0 0 1
Park and Madison TXCAP_DPA3P AU24 HDMI_CLK+ 24 TX_PWRS_ENB GPIO0 PCIE FULL TX OUTPUT SWING
800 MHz 1Gb(128M*16) Hynix_Orion die H5TQ2G63BFR-12C 0 0 1 0 TXCAM_DPA3N AV23 HDMI_CLK- 24 0 = 50% Tx output swing 0
800 MHz 1Gb(128M*16) Samsung_E die K4W2G1646b-HC12 0 0 1 1 AT25 1 = Full Tx output swing
MUTI GFX TX0P_DPA2P HDMI_TX0+ 24
TX0M_DPA2N AR24 HDMI_TX0- 24 TX_DEEMPH_EN GPIO1 PCIE TRANSMITTER DE-EMPHASIS ENABLED
0 1 0 0 DPA 0
0 = Disable ; 1 = Enable
TX1P_DPA1P AU26 HDMI_TX1+ 24
0 1 0 1 TX1M_DPA1N AV25 HDMI_TX1- 24 BIF_GEN2_EN_A GPIO2 0 = Advertises the PCIe device as
2.5 GT/s capable at power-on.
Note : Required Frequency = 800 MHz AR8 DVPCNTL_MVP_0 TX2P_DPA0P AT27 HDMI_TX2+ 24 0
!!! NC when PARK-M2 AU8 AR26 1 = Advertises the PCIe device as
D DVPCNTL_MVP_1 TX2M_DPA0N HDMI_TX2- 24 D
AP8 5.0 GT/s capable at power-on.
+1.8V_RUN_GFX DVPCNTL_0
AW8 DVPCNTL_1 TXCBP_DPB3P AR30
AR3 DVPCNTL_2 TXCBM_DPB3N AT29 GPIO_5_AC_BATT GPIO5 1 = AC (Performance mode)
R339 *10K_4_NC RAM_TYPE_CFG0 AR1 0
R341 *10K_4_NC RAM_TYPE_CFG1 RAM_TYPE_CFG0 DVPCLK (M96-M2) 0 = Battery saving mode
VRAM TYPE MEMORY APERTURE SIZE SELECT AU1 DVPDATA_0 TX3P_DPB2P AV31
R340 *10K_4_NC RAM_TYPE_CFG2 RAM_TYPE_CFG1 AU3 AU30 VGA_DIS GPIO9 0: VGA Controller capacity enabled
R342 *10K_4_NC RAM_TYPE_CFG3 RAM_TYPE_CFG2 DVPDATA_1 DPB TX3M_DPB2N
MEMORY CFG2 CFG1 CFG0 AW3 DVPDATA_2 1: The device will not be recognized 0
RAM_TYPE_CFG3 AP6 AR32
SIZE GPIO13 GPIO12 GPIO11 DVPDATA_3 TX4P_DPB1P as the system’s VGA controller
AW5 DVPDATA_4 TX4M_DPB1N AT31
+3.3V_DELAY 128MB 0 0 0 AU5 BIOS_ROM_EN GPIO22 Enable external BIOS ROM device
DVPDATA_5
AR6 DVPDATA_6 TX5P_DPB0P AT33 0 = Disable ; 1 = Enable 0
R330 10K_4 RAM_CFG0 256MB 0 0 1 AW6 AU32
R331 *10K_4_NC RAM_CFG1 DVPDATA_7 TX5M_DPB0N
APERTURE SIZE AU6 DVPDATA_8 AUD[1] VGAHSYNC AUD[1:0]:
R333 *10K_4_NC RAM_CFG2 64MB 0 1 0 AT7 AU14
DVPDATA_9 TXCCP_DPC3P AUD[0] VGAVSYNC 00 - No audio function;
AV7 DVPDATA_10 TXCCM_DPC3N AV13
+3.3V_DELAY AN7 01 - Audio for DisplayPort only; 11
DVPDATA_11 10 - Audio for DisplayPort and HDMI if dongle is
AV9 DVPDATA_12 TX0P_DPC2P AT15
R328 10K_4 GFX_CORE_CNTRL0 AT9 AR14 detected;
21 R327 10K_4 GFX_CORE_CNTRL1
GPIO0
(GPIO_19_CTF) AR10
DVPDATA_13
DVPDATA_14 DPC
TX0M_DPC2N
11 - Audio for both DisplayPort and HDMI.
R92 *10K_4_NC
14 R91 *10K_4_NC GPIO1 Critical temperature fault (active high) AW10
AU10
DVPDATA_15 TX1P_DPC1P AU16
AV15
R332 *10K_4_NC GPIO2 CTF will output 3.3 V if the on-die AP10
DVPDATA_16 TX1M_DPC1N
VIP_DEVICE_STRAP_EN VIP Device Strap Enable
DVPDATA_17
R87 *10K_4_NC GPIO3 temperature sensor exceeds a critical AV11 DVPDATA_18 TX2P_DPC0P AT17 VGAVSYNC2 0 = Disable ; 1 = Enable 0
R93 *10K_4_NC GPIO4 AT11 AR16
7 R334 *10K_4_NC GPIO5 temperature so that the motherboard !!! NC when PARK-M2 AR12
DVPDATA_19
DVPDATA_20
TX2M_DPC0N
BIOS_ROM_EN GPIO_22_ROMCSB 1 = Enable external BIOS ROM device
R335 *10K_4_NC GPIO6 can protect the ASIC from damage by AW12 DVPDATA_21 TXCDP_DPD3P AU20 (Internal pull down) 0 = Disable external BIOS ROM device 0
R89 *10K_4_NC GPIO8
R90 *10K_4_NC GPIO9
removing power. AU12 DVPDATA_22 TXCDM_DPD3N AT19
AP12 DVPDATA_23
R329 *10K_4_NC GPIO10 AT21
R376 10K_4 VGAHSYNC TX3P_DPD2P
TX3M_DPD2N AR20
R373 10K_4 VGAVSYNC
R94 *10K_4_NC VGAVSYNC2 +3.3V_DELAY DPD AU22 !!! NC when PARK-M2
3 R338 *10K_4_NC PANEL_BKEN
VGAHSYNC2
TX4P_DPD1P
TX4M_DPD1N AV21
R97 *10K_4_NC
I2C AT23 VGA_BLU
R337 TX5P_DPD0P VGA_GRN
AR22
AK26 SCL
TX5M_DPD0N 48 VGA_RED
C *10K_NC AJ26 C
D26 SDA
1
1 2 TEMP_FAIL 2 1 VGA_CLKREQ# AD39 R362 C592 R364 C594 R369 C595
8 PEG_CLKREQ# GENERAL PURPOSE I/O R VGA_RED 31
R42 10K_4 AD37 150/F_4 10P/50V_4/COG 150/F_4 10P/50V_4/COG 150/F_4 10P/50V_4/COG
GPIO0 RB
AH20 Layout Note:
2
*SDMK0340L-7-F_NC GPIO1 GPIO_0 50 50 50
AH18 GPIO_1 G AE36 VGA_GRN 31 Place 150 ohm
GPIO2 AN16 AD35
GPIO3 GPIO_2 GB termination resistors
AH23 GPIO_3_SMBDATA
GPIO4 AJ23 AF37 close to ATI CHIP.
GPU Power-on sequence GPIO5
GPIO6
AH17
GPIO_4_SMBCLK
GPIO_5_AC_BATT DAC1
B
BB AE38
VGA_BLU 31
AJ17 GPIO_6
PANEL_BKEN AK17 AC36 VGAHSYNC
1 => +3V_D 22,25 PANEL_BKEN
GPIO8 AJ13
GPIO_7_BLON
GPIO_8_ROMSO
HSYNC
VSYNC AC38 VGAVSYNC
VGAHSYNC
VGAVSYNC
31
31
+3.3V_DELAY
GPIO9 AH15
2 => +1.5V_GPU = +1.5V_RUN GPIO10 AJ16
GPIO_9_ROMSI
GPIO_10_ROMSCK
3
RAM_CFG0 AK16 AB34 RSET R106 2 1 499/F_4 R172 Q10
GPIO_11 RSET
3 => +VGPU_CORE RAM_CFG1
RAM_CFG2
AL16
AM16
GPIO_12
AD34
24 HDMI_DET 2 1 2 MMST3904-7-F
GPIO_13 AVDD +AVDD
4 => +VGPU_IO T18 PAD AM14 AE34 150K R170 *0_NC
1
GFX_CORE_CNTRL0 GPIO_14_HPD2 AVSSQ
38 GFX_CORE_CNTRL0 AM13 GPIO_15_PWRCNTL_0 2 1 HPD1
CLK_VGA_27M_SS_R AK14 AC33
5 => +1V = +1.0V_GFX_PCIE 18 THERMAL_INT# AG30
GPIO_16_SSIN
GPIO_17_THERMAL_INT
VDD1DI
VSS1DI AC34
+VDD1DI
T17 PAD AN14 R177 R171
6 => +1.8V_GPU = +1.8V_RUN_GFX 30 TEMP_FAIL
TEMP_FAIL
GFX_CORE_CNTRL1
AM17
GPIO_18_HPD3
GPIO_19_CTF *365K/F_NC 10K
38 GFX_CORE_CNTRL1 AL13 GPIO_20_PWRCNTL_1 R2 AC30
7 => dGPU_PWROK T14 PAD AJ14
AK13
GPIO_21_BB_EN R2B AC31
T16 PAD GPIO_22_ROMCSB
VGA_CLKREQ# AN13 AD30
JTAG_TRSTB GPIO_23_CLKREQB G2
T9 PAD AM23 JTAG_TRSTB G2B AD31
AN23 L14
T12 PAD JTAG_TDI
R45 *0_4_NC CLK_VGA_27M_SS_R JTAG_TCK AK23 AF30 +1.8V_RUN_GFX (1.8V @ 70mA AVDD)
2 CLK_27M_SS T6 PAD JTAG_TCK B2 +AVDD
JTAG_TMS AL24 AF31 BLM15BD121SN1D
T3 PAD JTAG_TMS B2B
AM24 120ohm, 300mA C143 C142 C141
T11 PAD JTAG_TDO
T10 PAD AJ19 GENERICA
R47 0.1U/10V/X7R_4
1U/10V/X5R_4
10U/6.3V/X5R_6
T4 PAD AK19 GENERICB C AC32
*10K_4_NC AJ20 AD32
T8 PAD GENERICC Y
T7 PAD AK20 GENERICD COMP AF32
B T1 PAD AJ24 GENERICE_HPD4 B
AH26 DAC2
T2 PAD GENERICF
AH24 AD29 VGAHSYNC2
T5 PAD GENERICG H2SYNC
AC29 VGAVSYNC2
L6 BLM15BD121SN1D V2SYNC L21
+1.8V_RUN_GFX +DPLL_PVDD +1.8V_RUN_GFX PLACE
120ohm, 300mA HPD1 AK24 +1.8V_RUN_GFX ( 1.8V @ 45mA VDD1DI)
C91 C100 C113 HPD1 BLM15BD121SN1D +VDD1DI
(1.8V @ 120mA DPLL_PVDD) VREFG VDD2DI AG31 +VDD2DI
AG32 120ohm, 300mA C181 C180 C179
0.1U/10V/X7R_4 DIVIDER VSS2DI C535 0.1U/10V/X7R_4 R113 *0_4_NC
1U/10V/X5R_4
( 1.8V @ 40mA VDD2DI)

10U/6.3V/X5R_6
R37 AND CAP 0.1U/10V/X7R_4 +VDD2DI
1U/10V/X5R_4
10U/6.3V/X5R_6
CLOSE TO A2VDD AG33 +3.3V_DELAY
499/F_4
ASIC
A2VDDQ AD33 +A2VDDQ
AH13 VREFG
L1 1.0V @ 150mA DPLL_VDDC AF33
R43 C82 A2VSSQ
+1.0V_GFX_PCIE +DPLL_VDDC
BLM15BD121SN1D L8
120ohm, 300mA C65 C72 C76 249/F_4 0.1U/10V/X7R_4 AA29 R2SET R101 2 1 715/F_4 +1.8V_RUN_GFX (1.8V @ 20mA A2VDDQ)
R2SET BLM15BD121SN1D +A2VDDQ
10U/6.3V/X5R_6
1U/10V/X5R_4
0.1U/10V/X7R_4 120ohm, 300mA C115 C118
DDC/AUX 0.1U/10V/X7R_4
1U/10V/X5R_4
DDC1CLK AM26 HDMI_SCL 24
PLL/CLOCK AN26 HDMI
DDC1DATA HDMI_SDA 24
+DPLL_PVDD AM32 DPLL_PVDD
AN32 DPLL_PVSS AUX1P AM27
AUX1N AL27
R336 *0_4_NC LCD_DDCDAT R51 2 1 2.2K +3.3V_DELAY
JTAG_TCK AN31 AM19 LCD_DDCCLK R44 2 1 2.2K
+DPLL_VDDC DPLL_VDDC DDC2CLK
DDC2DATA AL19
R351 0_4
R350 100/F_4 XTAIN AV33 AN20 JTAG_TRSTB +3.3V_DELAY
2 EVGA-XTALI XTALIN AUX2P
XTAOUT AU34 AM20 For Park,Madison production version ASIC
XTALOUT AUX2N
2 1 is need removed workaround.
R349 120/F_4 AL30
DDCCLK_AUX3P R38 R26
DDCDATA_AUX3N AM30
R321 *0_4_NC Park *10K/J_4_NC *10K/J_4_NC
DDCCLK_AUX4P AL29 pre-production build could get the "ENG"
Y4 R323 *0_4_NC AF29 AM29 !!! NC when PARK-M2
18 VGA_THERMDP DPLUS THERMAL DDCDATA_AUX4N marking.
A 1 2 18 VGA_THERMDN AG29 DMINUS
A
R324
AN21 LCD_DDCCLK JTAG_TMS

+TSVDD DDCCLK_AUX5P LCD_DDCDAT LCD_DDCCLK 22
27MHZ AM21 22LVDS
Madison
4 +1.8V_RUN_GFX L13 (1.8V @ 20mA TSVDD) AK32
AJ32
TS_FDO
DDCDATA_AUX5N
AJ30
LCD_DDCDAT
- date codes up to 0941 are NOT Production Samples Solve Intermittent
R322 1M BLM15BD121SN1D AJ33
TSVDD DDC6CLK
AJ31
DDCCLK 31
CRT - date codes from 0942 and up are Production Samples System Boot-up Hangs
26 C134 C137 C136 TSVSS DDC6DATA DDCDATA 31
*0_4_NC
120ohm, 300mA
C468 C482 AK30
NC_DDCCLK_AUX7P
1U/10V/X5R_4
!!! NC when PARK-M2

0.1U/10V/X7R_4
10U/6.3V/X5R_6
NC_DDCDATA_AUX7N AK29
27P/50V_4/COG 27P/50V_4/COG
50 50
216-0729051(M96-M2 XT) DDC6CLK/DDC6DATA support PROJECT : UM8B DIS
internal HDCP(High-bandwidth Size Document Number Rev
Digital Content Protection) function. 1A
Madison_IO&STRAP
5 4 3 2 1
5 4 3 2 1
+1.5V_RUN For DDR3, VDDR1 = 1.5V

(1.5V @ 2.9A VDDR1+VDDRHA+VDDRHB)
AC7
U16E
MEM I/O
VDDR1#1
PCIE
PCIE_VDDR#1
www.bufanxiu.com
AA31
(1.8V @ 504mA PCIE_VDDR)
+PCIE_VDDR
L18
+1.8V_RUN_GFX AB39
U16F
PCIE_VSS#1 GND#1 A3
16
AD11 AA32 BLM18PG471SN1D E39 A37
C530 C305 VDDR1#2 PCIE_VDDR#2 C164 C178 C192 C165 PCIE_VSS#2 GND#2
AF7 VDDR1#3 PCIE_VDDR#3 AA33 470ohm, 1A F34 PCIE_VSS#3 GND#3 AA16
AG10 VDDR1#4 PCIE_VDDR#4 AA34 F39 PCIE_VSS#4 GND#4 AA18
1U/10V/X5R_4 1U/10V/X5R_4 AJ7 V28 0.1U/10V/X7R_4 1U/10V/X5R_4 1U/10V/X5R_4 10U/6.3V/X5R_6 G33 AA2
VDDR1#5 PCIE_VDDR#5 PCIE_VSS#5 GND#5
AK8 VDDR1#6 PCIE_VDDR#6 W29 G34 PCIE_VSS#6 GND#6 AA21
AL9 VDDR1#7 PCIE_VDDR#7 W30 H31 PCIE_VSS#7 GND#7 AA23
G11 VDDR1#8 PCIE_VDDR#8 Y31 H34 PCIE_VSS#8 GND#8 AA26
C547 C162 G14 H39 AA28
VDDR1#9 PCIE_VSS#9 GND#9
D
G17 VDDR1#10 J31 PCIE_VSS#10 GND#10 AA6 D
1U/10V/X5R_4 1U/10V/X5R_4 G20 G30 (1.1V @ 1.92A PCIE_VDDC) +PCIE_VDDC J34 AB12
VDDR1#11 PCIE_VDDC#1 L22 PCIE_VSS#11 GND#11
G23 VDDR1#12 PCIE_VDDC#2 G31 K31 PCIE_VSS#12 GND#12 AB15
G26 VDDR1#13 PCIE_VDDC#3 H29 +1.0V_GFX_PCIE K34 PCIE_VSS#13 GND#13 AB17
G29 H30 BLM18PG121SN1D K39 AB20
C194 C163 VDDR1#14 PCIE_VDDC#4 C233 C229 C218 C243 C207 C257 PCIE_VSS#14 GND#14
H10 VDDR1#15 PCIE_VDDC#5 J29 120ohm, 2A L31 PCIE_VSS#15 GND#15 AB22
J7 VDDR1#16 PCIE_VDDC#6 J30 L34 PCIE_VSS#16 GND#16 AB24
1U/10V/X5R_4 1U/10V/X5R_4 J9 L28 1U/10V/X5R_4 1U/10V/X5R_4 1U/10V/X5R_4 1U/10V/X5R_4 1U/10V/X5R_4 10U/6.3V/X5R_6 M34 AB27
VDDR1#17 PCIE_VDDC#7 PCIE_VSS#17 GND#17
K11 VDDR1#18 PCIE_VDDC#8 M28 M39 PCIE_VSS#18 GND#18 AC11
K13 VDDR1#19 PCIE_VDDC#9 N28 N31 PCIE_VSS#19 GND#19 AC13
K8 VDDR1#20 PCIE_VDDC#10 R28 N34 PCIE_VSS#20 GND#20 AC16
C208 C258 L12 T28 P31 AC18
VDDR1#21 PCIE_VDDC#11 PCIE_VSS#21 GND#21
L16 VDDR1#22 PCIE_VDDC#12 U28 P34 PCIE_VSS#22 GND#22 AC2
1U/10V/X5R_4 1U/10V/X5R_4 L21 (1.2V @ 29.5A GFX_CORE) +VCC_GFX_CORE P39 AC21
VDDR1#23 PCIE_VSS#23 GND#23
L23 VDDR1#24 R34 PCIE_VSS#24 GND#24 AC23
L26 VDDR1#25 VDDC#1 AA15 T31 PCIE_VSS#25 GND#25 AC26
L7 CORE AA17 T34 AC28
C316 C531 C539 VDDR1#26 VDDC#2 C206 C173 C170 C171 PCIE_VSS#26 GND#26
M11 VDDR1#27 VDDC#3 AA20 T39 PCIE_VSS#27 GND#27 AC6
N11 VDDR1#28 VDDC#4 AA22 U31 PCIE_VSS#28 GND#28 AD15
10U/6.3V/X5R_6 10U/6.3V/X5R_6 10U/6.3V/X5R_6 P7 AA24 1U/10V/X5R_4 1U/10V/X5R_4 1U/10V/X5R_4 1U/10V/X5R_4 U34 AD17
VDDR1#29 VDDC#5 PCIE_VSS#29 GND#29
R11 VDDR1#30 VDDC#6 AA27 V34 PCIE_VSS#30 GND#30 AD20
U11 VDDR1#31 VDDC#7 AB16 V39 PCIE_VSS#31 GND#31 AD22
1U = 20 pcs U7 VDDR1#32 VDDC#8 AB18 W31 PCIE_VSS#32 GND#32 AD24
Y11 AB21 C172 C177 C198 C202 W34 AD27
10U = 5pcs VDDR1#33 VDDC#9 PCIE_VSS#33 GND#33
Y7 VDDR1#34 VDDC#10 AB23 Y34 PCIE_VSS#34 GND#34 AD9
AB26 1U/10V/X5R_4 1U/10V/X5R_4 1U/10V/X5R_4 1U/10V/X5R_4 Y39 AE2
VDDC#11 PCIE_VSS#35 GND#35
VDDC#12 AB28 GND#36 AE6
VDDC#13 AC17 GND#37 AF10
VDDC#14 AC20 GND#38 AF16
+1.8V_RUN_GFX +VDD_CT LEVEL AC22 C201 C200 C205 C213 AF18
VDDC#15 GND#39
GND
L2 (1.8V @ 136mA VDD_CT) TRANSLATION AC24 AF21
VDDC#16 GND#40
POWER
AF26 AC27 1U/10V/X5R_4 1U/10V/X5R_4 1U/10V/X5R_4 1U/10V/X5R_4 AG17
BLM15BD121SN1D VDD_CT#1 VDDC#17 GND#41
AF27 VDD_CT#2 VDDC#18 AD18 F15 GND#100 GND#42 AG2
120ohm, 300mA C81 C155 C156 AG26 AD21 F17 AG20
VDD_CT#3 VDDC#19 GND#101 GND#43
AG27 VDD_CT#4 VDDC#20 AD23 F19 GND#102 GND#44 AG22
10U/6.3V/X5R_6 1U/10V/X5R_4 0.1U/10V/X7R_4 AD26 C222 C228 C240 C245 F21 AG6
VDDC#21 GND#103 GND#45
VDDC#22 AF17 F23 GND#104 GND#46 AG9
I/O AF20 1U/10V/X5R_4 1U/10V/X5R_4 1U/10V/X5R_4 1U/10V/X5R_4 F25 AH21
C AF23 VDDR3#1 VDDC#24 AF22 F27 GND#106 GND#48 AJ10 C
+3.3V_DELAY AF24 AG16 F29 AJ11
VDDR3#2 VDDC#25 GND#107 GND#49
(3.3V @ 60mA VDDR3) AG23 VDDR3#3 VDDC#26 AG18 F31 GND#108 GND#50 AJ2
AG24 AG21 C223 C242 F33 AJ28
VDDR3#4 VDDC#27 GND#109 GND#51 PowerXpress control signal for Madsion and Park only
VDDC#28 AH22 F7 GND#110 GND#52 AJ6
C68 C149 AH27 1U/10V/X5R_4 1U/10V/X5R_4 F9 AK11 If not used, can be disconnected. (AL21 pin)
AF13 VDDR4#4 VDDC#30 AH28 G2 GND#112 GND#54 AK31
10U/6.3V/X5R_6 1U/10V/X5R_4 AF15 M26 G6 AK7 PX_EN = LOW, turn on
VDDR4#5 VDDC#31 GND#113 GND#55
AG13 VDDR4#7 VDDC#32 N24 H9 GND#114 GND#56 AL11 PX_EN = HIGH, turn off
AG15 VDDR4#8 VDDC#33 N27 J2 GND#115 GND#57 AL14
R18 C188 C168 C190 C216 J27 AL17
VDDC#35 R21 J6 GND#117 GND#59 AL2
+1.8V_RUN_GFX +VDDR4 AD12 R23 10U/6.3V/X5R_6 10U/6.3V/X5R_6 10U/6.3V/X5R_6 10U/6.3V/X5R_6 J8 AL20
L19 VDDR4#1 VDDC#36 GND#118 GND#60
AF11 VDDR4#2 VDDC#37 R26 K14 GND#119 GND#61 AL21
AF12 VDDR4#3 VDDC#38 T17 K7 GND#120 GND#62 AL23
BLM15BD121SN1D AG11 T20 L11 AL26 R50
C154 C148 VDDR4#6 VDDC#39 GND#121 GND#63
120ohm, 300mA VDDC#40 T22 L17 GND#122 GND#64 AL32 *0_4_NC
VDDC#41 T24 L2 GND#123 GND#65 AL6
1U/10V/X5R_4 0.1U/10V/X7R_4 T27 L22 AL8
VDDC#43 U16 L24 GND#125 GND#67 AM11
T25 M20 U18 L6 AM31
T24 NC_VDDRHA VDDC#44 GND#126 GND#68
M21 NC_VSSRHA VDDC#45 U21 M17 GND#127 GND#69 AM9 !!!
VDDC#46 U23 M22 GND#128 GND#70 AN11 Reserve for PX_EN
VDDC#47 U26 M24 GND#129 GND#71 AN2
T23 V12 V17 N16 AN30 for Park and Madison
T21 NC_VDDRHB VDDC#48 GND#130 GND#72
U12 NC_VSSRHB VDDC#49 V20 N18 GND#131 GND#73 AN6
VDDC#50 V22 N2 GND#132 GND#74 AN8
VDDC#51 V24 N21 GND#133 GND#75 AP11
V27 N23 AP7 Pin AL21 to Ground for Broadway
+1.8V_RUN_GFX +PCIE_PVDD VDDC#52 GND#134 GND#76
VDDC#53 Y16 N26 GND#135 GND#77 AP9
L16 (1.8V @ 68mA PCIE_PVDD) PLL Y18 N6 AR5
AB37 PCIE_PVDD VDDC#55 Y21 R15 GND#137 GND#79 AW34
BLM15BD121SN1D Y23 R17 B11
C150 C157 C158 +MPV18 VDDC#56 GND#138 GND#80
120ohm, 300mA H7 MPV18#1 VDDC#57 Y26 R2 GND#139 GND#81 B13
H8 Y28 R20 B15 R347
10U/6.3V/X5R_6 1U/10V/X5R_4 0.1U/10V/X7R_4 MPV18#2 VDDC#58 GND#140 GND#82
R22 GND#141 GND#83 B17 *0_4_NC
+SPV18 R24 B19
+VCC_GFX_CORE GND#142 GND#84
B
AM10 SPV18 R27 GND#143 GND#85 B21 B
VDDCI#1 AA13 R6 GND#144 GND#86 B23
(0.95-1.2V @ 136mA SPV10) AN9 SPV10 VDDCI#2 AB13 T11 GND#145 GND#87 B25
+SPV10 AC12 T13 B27
L5 AN10
VDDCI#3
AC15 C214 C186 C195 C187 C239 C241 C197 C199 C236 C235 T16
GND#146 GND#88
B29
UM8 POP 0 ohm
SPVSS VDDCI#4 GND#147 GND#89
+1.0V_GFX_PCIE VDDCI#5 AD13 T18 GND#148 GND#90 B31 UM9 DE-POP 0 ohm
1U/10V/X5R_4
1U/10V/X5R_4
1U/10V/X5R_4
1U/10V/X5R_4
1U/10V/X5R_4
1U/10V/X5R_4
1U/10V/X5R_4
1U/10V/X5R_4
1U/10V/X5R_4
10U/6.3V/X5R_6
BLM15BD121SN1D AD16 T21 B33
VDDCI#6 GND#149 GND#91
120ohm, 300mA C95 C104 C110
VDDCI#7 M15
M16
T23
T26
GND#150 GND#92 B7
B9
0918 check
10U/6.3V/X5R_6 1U/10V/X5R_4 0.1U/10V/X7R_4 VOLTAGE VDDCI#8 GND#151 GND#93
VDDCI#9 M18 U15 GND#153 GND#94 C1
SENESE M23 U17 C39
VDDCI#10 GND#154 GND#95
VDDCI#11 N13 U2 GND#155 GND#96 E35
T38 AF28 N15 U20 E5
FB_VDDC VDDCI#12 C167 C210 C253 GND#156 GND#97
VDDCI#13 N17 U22 GND#157 GND#98 F11
VDDCI#14 N20 U24 GND#158 GND#99 F13
T15 AG28 N22 22U/6.3V/X5R_8 22U/6.3V/X5R_8 22U/6.3V/X5R_8 U27
FB_VDDCI ISOLATED VDDCI#15 GND#159
R12 U6
CORE I/O VDDCI#16 R13 V11
GND#160
T19 VDDCI#17 GND#161
AH29 FB_GND VDDCI#18 R16 V16 GND#163
VDDCI#19 T12 V18 GND#164
T15 V21
VDDC_SENSE/VSS_SENSE and VDDCI_SENSE/VSS_SENSE route as differetial pair VDDCI#20
V15 V23
GND#165 from 47132 DS 1.01 XO_IN and XO_IN2
VDDCI#21 GND#166
VDDCI#22 Y13 V26
W2
GND#167 need connect to GND if these aren't used
GND#168
W6 GND#169
Y15 GND#170
216-0729051(M96-M2 XT) Y17
R520 *0_NC 603 GND#171
Y20
59 Q30 Y22
GND#172
GND#173 VSS_MECH#1 A39
Y24 GND#174 VSS_MECH#2 AW1
+1.8V_RUN_GFX +MPV18 *SI2303BDS-T1-E3_NC Y27 AW39
L24 GND#175 VSS_MECH#3
(1.8V @ 150mA MPV18) U13 GND#152
+3.3V_DELAY 3 1 +3.3V_RUN V13 GND#162
BLM15BD121SN1D
120ohm, 300mA C297 C299 C298
216-0729051(M96-M2 XT)
2
10U/6.3V/X5R_6 0.1U/10V/X7R_4 0.1U/10V/X7R_4 R521

*100K_4_NC
A A
3
R522 *75K/F_4_NC Q31 C777

25,38 GFX_ON 2 *4700P/25V/X7R_4_NC
+SPV18 OPTIONAL RC
1
L7 (1.8V @ 75mA SPV18) NETWORK C778 *2N7002W-7-F_NC

TO FINE TUNE *0.1U/10V/X7R_4_NC
BLM15BD121SN1D POWER SEQUENCING
120ohm, 300mA C105 C112 Quanta Computer Inc.
10U/6.3V/X5R_6 0.1U/10V/X7R_4
PROJECT : UM8B DIS
1A
Madison_Power
5 4 3 2 1
5 4 3 2 1
!!!
For M96/92, DPx_VDD10 = 1.1V
For M97 DPx_VDD10 = 1.0V
www.bufanxiu.com 19
DPC & DPD U16H
+1.8V_RUN_GFX aren't used. DP C/D POWER DP A/B POWER
AP20 AN24 +DPA_VDD18

DPC_VDD18#1 DPA_VDD18#1
AP21 DPC_VDD18#2 DPA_VDD18#2 AP24
D (1V @ 200mA DPA_VDD10) D
C499 +DPA_VDD10
+1.0V_GFX_PCIE L3
*0.1U/10V/X7R_4_NC AP13 AP31 +1.0V_GFX_PCIE
DPC_VDD10#1 DPA_VDD10#1 BLM15BD121SN1D
AT13 DPC_VDD10#2 DPA_VDD10#2 AP32
C101 C111 C83 120ohm, 300mA DPA for HDMI
C106
1U/10V/X5R_4
0.1U/10V/X7R_4
10U/6.3V/X5R_6
AN17 DPC_VSSR#1 DPA_VSSR#1 AN27
*0.1U/10V/X7R_4_NC AP16 AP27
DPC_VSSR#2 DPA_VSSR#2
AP17 DPC_VSSR#3 DPA_VSSR#3 AP28
AW14 DPC_VSSR#4 DPA_VSSR#4 AW24
AW16 DPC_VSSR#5 DPA_VSSR#5 AW26
+1.8V_RUN_GFX +1.8V_RUN_GFX
AP22 AP25 +DPB_VDD18

DPD_VDD18#1 DPB_VDD18#1 C513
AP23 DPD_VDD18#2 DPB_VDD18#2 AP26
C502 *0.1U/10V/X7R_4_NC
+1.0V_GFX_PCIE +1.0V_GFX_PCIE
*0.1U/10V/X7R_4_NC AP14 AN33
DPD_VDD10#1 DPB_VDD10#1
AP15 DPD_VDD10#2 DPB_VDD10#2 AP33
C67
C97
*0.1U/10V/X7R_4_NC
*0.1U/10V/X7R_4_NC AN19 AN29
DPD_VSSR#1 DPB_VSSR#1
AP18 DPD_VSSR#2 DPB_VSSR#2 AP29
AP19 DPD_VSSR#3 DPB_VSSR#3 AP30
C AW20 DPD_VSSR#4 DPB_VSSR#4 AW30 (1.8V @ 20 mA DPA_PVDD) C
AW22 DPD_VSSR#5 DPB_VSSR#5 AW32
+DPA_PVDD
L33
(1.8V @ 400mA DPE_VDD18; 150/F_4 R344 AW18 AW28 R345 150/F_4 +1.8V_RUN_GFX
DPCD_CALR DPAB_CALR BLM15BD121SN1D
200mA for DPE/DPF respectively) +DPE_VDD18 C511 C501 C498 120ohm, 300mA
0.1U/10V/X7R_4
L10 DP E/F POWER DP PLL POWER
1U/10V/X5R_4
10U/6.3V/X5R_6
+1.8V_RUN_GFX AH34 DPE_VDD18#1 DPA_PVDD AU28
BLM18PG600SN1D AJ34 AV27
C131 C128 C127 DPE_VDD18#2 DPA_PVSS
60ohm, 500mA
+DPE_VDD10 +1.8V_RUN_GFX
1U/10V/X5R_4
10U/6.3V/X5R_6
0.1U/10V/X7R_4
U16G R346 R30

AL33 DPE_VDD10#1 DPB_PVDD AV29
AM33 AR28 10K_4 10K_4
DPE_VDD10#2 DPB_PVSS C492
DPE & DPF for LVDS
DPC & DPD +1.8V_RUN_GFX LVDS CONTROL AK27 BIA_PWM
VARY_BL BIA_PWM 22
*0.1U/10V/X7R_4_NC AJ27 ENVDD
aren't used. DIGON ENVDD 22
AN34 DPE_VSSR#1 DPC_PVDD AU18
AP39 DPE_VSSR#2 DPC_PVSS AV17
AR39 C494
DPE_VSSR#3
UM8 POP 0 ohm AU37
AW35
DPE_VSSR#4 *0.1U/10V/X7R_4_NC AK35
DPE_VSSR#5 TXCLK_UP_DPF3P
UM9 DE-POP 0 ohm +DPE_VDD18 DPD_PVDD AV19
AR18 C508 (1.8V @ 40mA DPE_PVDD; 20mA
TXCLK_UN_DPF3N AL36
DPD_PVSS
0918 check R348
0_4 AF34 *0.1U/10V/X7R_4_NC +DPE_PVDD for DPE/DPF respectively) TXOUT_U0P_DPF2P AJ38
AK37
DPF_VDD18#1 L35 TXOUT_U0N_DPF2N
B (1.1V @ 200mA DPE_VDD10; AG34 DPF_VDD18#2 B
100mA for DPE/DPF respectively) +DPE_VDD10 DPE_PVDD AM37 +1.8V_RUN_GFX TXOUT_U1P_DPF1P AH35
AN38 BLM15BD121SN1D AJ36
L4 DPE_PVSS C529 C528 C523 TXOUT_U1N_DPF1N
120ohm, 300mA
+1.0V_GFX_PCIE AK33 DPF_VDD10#1 TXOUT_U2P_DPF0P AG38
1U/10V/X5R_4
0.1U/10V/X7R_4
10U/6.3V/X5R_6
BLM15BD121SN1D AK34 AH37
DPF_VDD10#2 TXOUT_U2N_DPF0N
120ohm, 300mA C94 C86 C102
NC_DPF_PVDD AL38
NC_DPF_PVSS AM35 TXOUT_U3P AF35 PAD T37
1U/10V/X5R_4
10U/6.3V/X5R_6
0.1U/10V/X7R_4
TXOUT_U3N AG36 PAD T20

AF39 DPF_VSSR#1
AH39 DPF_VSSR#2
AK39 LVTMDP
DPF_VSSR#3
AL34 DPF_VSSR#4
AM34 DPF_VSSR#5 TXCLK_LP_DPE3P AP34 LCD_ACLK+ LCD_ACLK+ 22
TXCLK_LN_DPE3N AR34 LCD_ACLK- LCD_ACLK- 22
(1.8V @ 110mA DPA_VDD18) TXOUT_L0P_DPE2P AW37 LCD_A0+ LCD_A0+ 22
150/F_4 R354 AM39 +DPA_VDD18 AU35 LCD_A0-
DPEF_CALR TXOUT_L0N_DPE2N LCD_A0- 22
L34
+1.8V_RUN_GFX TXOUT_L1P_DPE1P AR37 LCD_A1+ LCD_A1+ 22
BLM15BD121SN1D AU39 LCD_A1-
TXOUT_L1N_DPE1N LCD_A1- 22
216-0729051(M96-M2 XT) C87 C512 C500 120ohm, 300mA
TXOUT_L2P_DPE0P AP35 LCD_A2+ LCD_A2+ 22
1U/10V/X5R_4
10U/6.3V/X5R_6
0.1U/10V/X7R_4 AR35 LCD_A2-

from 47132 DS 1.01 XO_IN and XO_IN2 TXOUT_L2N_DPE0N LCD_A2- 22
need connect to GND if these aren't used TXOUT_L3P AN36

AP37
PAD T36
TXOUT_L3N PAD T35
A A
216-0729051(M96-M2 XT)

PROJECT : UM8B DIS
1A
Madison_DP_POWER
5 4 3 2 1
5 4 3 2 1
www.bufanxiu.com 18
U16C
VMA_RAS#0 DDR2 DDR2 U16D
19 VMA_RAS#0 GDDR3/GDDR5 GDDR5/GDDR3 DDR2 DDR2
VMA_RAS#1
19 VMA_RAS#1 DDR3 DDR3 GDDR3/GDDR5 GDDR5/GDDR3
VMA_CAS#0 VMA_DQ0 C37 G24 VMA_MA0 VMC_RAS#0 DDR3 DDR3
19 VMA_CAS#0 DQA0_0/DQA_0 MAA0_0/MAA_0 20 VMC_RAS#0
VMA_CAS#1 VMA_DQ1 C35 J23 VMA_MA1 VMC_RAS#1 VMC_DQ0 C5 P8 VMC_MA0
MEMORY INTERFACE A
19 VMA_CAS#1 DQA0_1/DQA_1 MAA0_1/MAA_1 20 VMC_RAS#1 DQB0_0/DQB_0 MAB0_0/MAB_0
VMA_DQ2 A35 H24 VMA_MA2 VMC_DQ1 C3 T9 VMC_MA1
VMA_WE#0 VMA_DQ3 DQA0_2/DQA_2 MAA0_2/MAA_2 VMA_MA3 VMC_CAS#0 VMC_DQ2 DQB0_1/DQB_1 MAB0_1/MAB_1 VMC_MA2
E34 J24 E3 P9
MEMORY INTERFACE B
19 VMA_WE#0 DQA0_3/DQA_3 MAA0_3/MAA_3 20 VMC_CAS#0 DQB0_2/DQB_2 MAB0_2/MAB_2
VMA_WE#1 VMA_DQ4 G32 H26 VMA_MA4 VMC_CAS#1 VMC_DQ3 E1 N7 VMC_MA3
19 VMA_WE#1 DQA0_4/DQA_4 MAA0_4/MAA_4 20 VMC_CAS#1 DQB0_3/DQB_3 MAB0_3/MAB_3
VMA_DQ5 D33 J26 VMA_MA5 VMC_DQ4 F1 N8 VMC_MA4
VMA_CKE0 VMA_DQ6 DQA0_5/DQA_5 MAA0_5/MAA_5 VMA_MA6 VMC_WE#0 VMC_DQ5 DQB0_4/DQB_4 MAB0_4/MAB_4 VMC_MA5
19 VMA_CKE0 F32 DQA0_6/DQA_6 MAA0_6/MAA_6 H21 20 VMC_WE#0 F3 DQB0_5/DQB_5 MAB0_5/MAB_5 N9
VMA_CKE1 VMA_DQ7 E32 G21 VMA_MA7 VMC_WE#1 VMC_DQ6 F5 U9 VMC_MA6
19 VMA_CKE1 DQA0_7/DQA_7 MAA0_7/MAA_7 20 VMC_WE#1 DQB0_6/DQB_6 MAB0_6/MAB_6
VMA_DQ8 D31 H19 VMA_MA8 VMC_DQ7 G4 U8 VMC_MA7
VMA_CS0#0 VMA_DQ9 DQA0_8/DQA_8 MAA1_0/MAA_8 VMA_MA9 VMC_CKE0 VMC_DQ8 DQB0_7/DQB_7 MAB0_7/MAB_7 VMC_MA8
19 VMA_CS0#0 F30 DQA0_9/DQA_9 MAA1_1/MAA_9 H20 20 VMC_CKE0 H5 DQB0_8/DQB_8 MAB1_0/MAB_8 Y9
VMA_CS1#0 VMA_DQ10 C30 L13 VMA_MA10 VMC_CKE1 VMC_DQ9 H6 W9 VMC_MA9
19 VMA_CS1#0 DQA0_10/DQA_10 MAA1_2/MAA_10 20 VMC_CKE1 DQB0_9/DQB_9 MAB1_1/MAB_9
D VMA_DQ11 A30 G16 VMA_MA11 VMC_DQ10 J4 AC8 VMC_MA10 D
VMA_ODT0 VMA_DQ12 DQA0_11/DQA_11 MAA1_3/MAA_11 VMA_MA12 VMC_CS0#0 VMC_DQ11 DQB0_10/DQB_10 MAB1_2/MAB_10 VMC_MA11
19 VMA_ODT0 F28 DQA0_12/DQA_12 MAA1_4/MAA_12 J16 20 VMC_CS0#0 K6 DQB0_11/DQB_11 MAB1_3/MAB_11 AC9
VMA_ODT1 VMA_DQ13 C28 H16 VMA_BA2 VMC_CS1#0 VMC_DQ12 K5 AA7 VMC_MA12
19 VMA_ODT1 DQA0_13/DQA_13 MAA1_5/MAA_13_BA2 20 VMC_CS1#0 DQB0_12/DQB_12 MAB1_4/MAB_12
VMA_DQ14 A28 J17 VMA_BA0 VMC_DQ13 L4 AA8 VMC_BA2
VMA_CLKP0 VMA_DQ15 DQA0_14/DQA_14 MAA1_6/MAA_14_BA0 VMA_BA1 VMC_ODT0 VMC_DQ14 DQB0_13/DQB_13 MAB1_5/BA2 VMC_BA0
19 VMA_CLKP0 E28 DQA0_15/DQA_15 MAA1_7/MAA_A15_BA1 H17 20 VMC_ODT0 M6 DQB0_14/DQB_14 MAB1_6/BA0 Y8
VMA_CLKN0 VMA_DQ16 D27 VMC_ODT1 VMC_DQ15 M1 AA9 VMC_BA1
19 VMA_CLKN0 DQA0_16/DQA_16 20 VMC_ODT1 DQB0_15/DQB_15 MAB1_7/BA1
VMA_DQ17 F26 A32 VMA_DM0 VMC_DQ16 M3
VMA_CLKP1 VMA_DQ18 DQA0_17/DQA_17 WCKA0_0/DQMA_0 VMA_DM1 VMC_CLKP0 VMC_DQ17 DQB0_16/DQB_16 VMC_DM0
19 VMA_CLKP1 C26 DQA0_18/DQA_18 WCKA0B_0/DQMA_1 C32 20 VMC_CLKP0 M5 DQB0_17/DQB_17 WCKB0_0/DQMB_0 H3
VMA_CLKN1 VMA_DQ19 A26 D23 VMA_DM2 VMC_CLKN0 VMC_DQ18 N4 H1 VMC_DM1
19 VMA_CLKN1 DQA0_19/DQA_19 WCKA0_1/DQMA_2 20 VMC_CLKN0 DQB0_18/DQB_18 WCKB0B_0/DQMB_1
VMA_DQ20 F24 E22 VMA_DM3 VMC_DQ19 P6 T3 VMC_DM2
VMA_DQ21 DQA0_20/DQA_20 WCKA0B_1/DQMA_3 VMA_DM4 VMC_CLKP1 VMC_DQ20 DQB0_19/DQB_19 WCKB0_1/DQMB_2 VMC_DM3
C24 DQA0_21/DQA_21 WCKA1_0/DQMA_4 C14 20 VMC_CLKP1 P5 DQB0_20/DQB_20 WCKB0B_1/DQMB_3 T5
VMA_WDQS[0..7] VMA_DQ22 A24 A14 VMA_DM5 VMC_CLKN1 VMC_DQ21 R4 AE4 VMC_DM4
19 VMA_WDQS[0..7] DQA0_22/DQA_22 WCKA1B_0/DQMA_5 20 VMC_CLKN1 DQB0_21/DQB_21 WCKB1_0/DQMB_4
VMA_DQ23 E24 E10 VMA_DM6 VMC_DQ22 T6 AF5 VMC_DM5
VMA_RDQS[0..7] VMA_DQ24 DQA0_23/DQA_23 WCKA1_1/DQMA_6 VMA_DM7 VMC_WDQS[0..7] VMC_DQ23 DQB0_22/DQB_22 WCKB1B_0/DQMB_5 VMC_DM6
19 VMA_RDQS[0..7] C22 DQA0_24/DQA_24 WCKA1B_1/DQMA_7 D9 20 VMC_WDQS[0..7] T1 DQB0_23/DQB_23 WCKB1_1/DQMB_6 AK6
VMA_DQ25 A22 VMC_DQ24 U4 AK5 VMC_DM7
VMA_DM[0..7] VMA_DQ26 DQA0_25/DQA_25 GDDR5/DDR2/GDDR3 VMA_RDQS0 VMC_RDQS[0..7] VMC_DQ25 DQB0_24/DQB_24 WCKB1B_1/DQMB_7
19 VMA_DM[0..7] F22 DQA0_26/DQA_26 EDCA0_0/QSA_0/RDQSA_0 C34 20 VMC_RDQS[0..7] V6 DQB0_25/DQB_25 GDDR5/DDR2/GDDR3
VMA_DQ27 D21 D29 VMA_RDQS1 VMC_DQ26 V1 F6 VMC_RDQS0
VMA_DQ[0..63] VMA_DQ28 DQA0_27/DQA_27 EDCA0_1/QSA_1/RDQSA_1 VMA_RDQS2 VMC_DM[0..7] VMC_DQ27 DQB0_26/DQB_26 EDCB0_0/QSB_0/RDQSB_0 VMC_RDQS1
19 VMA_DQ[0..63] A20 DQA0_28/DQA_28 EDCA0_2/QSA_2/RDQSA_2 D25 20 VMC_DM[0..7] V3 DQB0_27/DQB_27 EDCB0_1/QSB_1/RDQSB_1 K3
VMA_DQ29 F20 E20 VMA_RDQS3 VMC_DQ28 Y6 P3 VMC_RDQS2
VMA_MA[0..13] VMA_DQ30 DQA0_29/DQA_29 EDCA0_3/QSA_3/RDQSA_3 VMA_RDQS4 VMC_DQ[0..63] VMC_DQ29 DQB0_28/DQB_28 EDCB0_2/QSB_2/RDQSB_2 VMC_RDQS3
19 VMA_MA[0..13] D19 DQA0_30/DQA_30 EDCA1_0/QSA_4/RDQSA_4 E16 20 VMC_DQ[0..63] Y1 DQB0_29/DQB_29 EDCB0_3/QSB_3/RDQSB_3 V5
VMA_DQ31 E18 E12 VMA_RDQS5 VMC_DQ30 Y3 AB5 VMC_RDQS4
VMA_DQ32 DQA0_31/DQA_31 EDCA1_1/QSA_5/RDQSA_5 VMA_RDQS6 VMC_MA[0..13] VMC_DQ31 DQB0_30/DQB_30 EDCB1_0/QSB_4/RDQSB_4 VMC_RDQS5
C18 DQA1_0/DQA_32 EDCA1_2/QSA_6/RDQSA_6 J10 20 VMC_MA[0..13] Y5 DQB0_31/DQB_31 EDCB1_1/QSB_5/RDQSB_5 AH1
VMA_BA[0..2] VMA_DQ33 A18 D7 VMA_RDQS7 VMC_DQ32 AA4 AJ9 VMC_RDQS6
19 VMA_BA[0..2] DQA1_1/DQA_33 EDCA1_3/QSA_7/RDQSA_7 DQB1_0/DQB_32 EDCB1_2/QSB_6/RDQSB_6
VMA_DQ34 F18 VMC_DQ33 AB6 AM5 VMC_RDQS7
VMA_DQ35 DQA1_2/DQA_34 VMA_WDQS0 VMC_BA[0..2] VMC_DQ34 DQB1_1/DQB_33 EDCB1_3/QSB_7/RDQSB_7
D17 DQA1_3/DQA_35 DDBIA0_0/QSA_0B/WDQSA_0 A34 20 VMC_BA[0..2] AB1 DQB1_2/DQB_34
VMA_DQ36 A16 E30 VMA_WDQS1 VMC_DQ35 AB3 G7 VMC_WDQS0
VMA_DQ37 DQA1_4/DQA_36 DDBIA0_1/QSA_1B/WDQSA_1 VMA_WDQS2 VMC_DQ36 DQB1_3/DQB_35 DDBIB0_0/QSB_0B/WDQSB_0 VMC_WDQS1
F16 DQA1_5/DQA_37 DDBIA0_2/QSA_2B/WDQSA_2 E26 AD6 DQB1_4/DQB_36 DDBIB0_1/QSB_1B/WDQSB_1 K1
VMA_DQ38 D15 C20 VMA_WDQS3 VMC_DQ37 AD1 P1 VMC_WDQS2
E14 DQA1_7/DQA_39 DDBIA1_0/QSA_4B/WDQSA_4 C16 AD3 DQB1_6/DQB_38 DDBIB0_3/QSB_3B/WDQSB_3 W4
VMA_DQ40 F14 C12 VMA_WDQS5 VMC_DQ39 AD5 AC4 VMC_WDQS4
D13 DQA1_9/DQA_41 DDBIA1_2/QSA_6B/WDQSA_6 J11 AF1 DQB1_8/DQB_40 DDBIB1_1/QSB_5B/WDQSB_5 AH3
VMA_DQ42 F12 F8 VMA_WDQS7 VMC_DQ41 AF3 AJ8 VMC_WDQS6
VMA_DQ43 DQA1_10/DQA_42 DDBIA1_3/QSA_7B/WDQSA_7 VMC_DQ42 DQB1_9/DQB_41 DDBIB1_2/QSB_6B/WDQSB_6 VMC_WDQS7
A12 DQA1_11/DQA_43 AF6 DQB1_10/DQB_42 DDBIB1_3/QSB_7B/WDQSB_7 AM3
VMA_DQ44 D11 J21 VMA_ODT0 VMC_DQ43 AG4
VMA_DQ45 DQA1_12/DQA_44 ADBIA0/ODTA0 VMA_ODT1 VMC_DQ44 DQB1_11/DQB_43 VMC_ODT0
C
F10 DQA1_13/DQA_45 ADBIA1/ODTA1 G19 AH5 DQB1_12/DQB_44 ADBIB0/ODTB0 T7 C
VMA_DQ46 A10 VMC_DQ45 AH6 W7 VMC_ODT1
VMA_DQ47 DQA1_14/DQA_46 VMA_CLKP0 VMC_DQ46 DQB1_13/DQB_45 ADBIB1/ODTB1
C10 DQA1_15/DQA_47 CLKA0 H27 AJ4 DQB1_14/DQB_46
VMA_DQ48 G13 G27 VMA_CLKN0 VMC_DQ47 AK3 L9 VMC_CLKP0
VMA_DQ49 DQA1_16/DQA_48 CLKA0B VMC_DQ48 DQB1_15/DQB_47 CLKB0 VMC_CLKN0
H13 DQA1_17/DQA_49 AF8 DQB1_16/DQB_48 CLKB0B L8
+1.5V_RUN VMA_DQ50 J13 J14 VMA_CLKP1 VMC_DQ49 AF9
VMA_DQ51 DQA1_18/DQA_50 CLKA1 VMA_CLKN1 VMC_DQ50 DQB1_17/DQB_49 VMC_CLKP1
H11 DQA1_19/DQA_51 CLKA1B H14 AG8 DQB1_18/DQB_50 CLKB1 AD8
PLACE MVREF VMA_DQ52 G10 +1.5V_RUN VMC_DQ51 AG7 AD7 VMC_CLKN1
R175 VMA_DQ53 DQA1_20/DQA_52 VMA_RAS#0 VMC_DQ52 DQB1_19/DQB_51 CLKB1B
DIVIDERS G8 DQA1_21/DQA_53 RASA0B K23 AK9 DQB1_20/DQB_52
Ra VMA_DQ54 K9 K19 VMA_RAS#1 PLACE MVREF VMC_DQ53 AL7 T10 VMC_RAS#0
AND CAPS *40.2/F_4_Park VMA_DQ55 DQA1_22/DQA_54 RASA1B R102 VMC_DQ54 DQB1_21/DQB_53 RASB0B VMC_RAS#1
K10 DQA1_23/DQA_55 DIVIDERS AM8 DQB1_22/DQB_54 RASB1B Y10
CLOSE TO ASIC VMA_DQ56 G9 DQA1_24/DQA_56 CASA0B K20 VMA_CAS#0 Ra VMC_DQ55 AM7 DQB1_23/DQB_55
VMA_DQ57 A8 K17 VMA_CAS#1 AND CAPS 40.2/F_4 VMC_DQ56 AK1 W10 VMC_CAS#0
DQA1_25/DQA_57 CASA1B DQB1_24/DQB_56 CASB0B
VMA_DQ58 C8 DQA1_26/DQA_58
CLOSE TO ASIC VMC_DQ57 AL4 DQB1_25/DQB_57 CASB1B AA10 VMC_CAS#1
+1.5V_RUN R176 C295 VMA_DQ59 E8 K24 VMA_CS0#0 VMC_DQ58 AM6
VMA_DQ60 DQA1_27/DQA_59 CSA0B_0 VMC_DQ59 DQB1_26/DQB_58 VMC_CS0#0
Rb A6 DQA1_28/DQA_60 CSA0B_1 K27 AM1 DQB1_27/DQB_59 CSB0B_0 P10
*0.1U/10V/X7R_4_Park VMA_DQ61 C6 +1.5V_RUN R103 C182 VMC_DQ60 AN4 L10
R393 *100/F_4_Park VMA_DQ62 DQA1_29/DQA_61 VMA_CS1#0 VMC_DQ61 DQB1_28/DQB_60 CSB0B_1
E6 DQA1_30/DQA_62 CSA1B_0 M13 Rb AP3 DQB1_29/DQB_61
Ra VMA_DQ63 A5 K16 100/F_4 0.1U/10V/X7R_4 VMC_DQ62 AP1 AD10 VMC_CS1#0
*40.2/F_4_Park DQA1_31/DQA_63 CSA1B_1 R375 VMC_DQ63 DQB1_30/DQB_62 CSB1B_0
AP5 DQB1_31/DQB_63 CSB1B_1 AC10
MVREFDA L18 K21 VMA_CKE0 Ra
MVREFSA MVREFDA CKEA0 VMA_CKE1 40.2/F_4 VMC_CKE0
L20 MVREFSA CKEA1 J20 CKEB0 U10
MVREFDB Y12 AA11 VMC_CKE1
R392 C562 R156 *243/F_4_Park VMA_WE#0 MVREFSB AA12 MVREFDB CKEB1
+1.5V_RUN L27 MEM_CALRN0 WEA0B K26 MVREFSB
Rb R149 *243/F_4_Park N12 L15 VMA_WE#1 N10 VMC_WE#0
*0.1U/10V/X7R_4_Park R49 *243/F_4_Park MEM_CALRN1 WEA1B R117 C538 WEB0B VMC_WE#1
*100/F_4_Park
AG12 MEM_CALRN2
Rb change to 10k WEB1B AB11
R157 *243/F_4_Park VMA_MA13 100/F_4 0.1U/10V/X7R_4

GDDR5
M12 MEM_CALRP1 MAA0_8 H23

M27 J19 2 1 TESTEN AD28 T8 VMC_MA13
GDDR5
R150
R46
*243/F_4_Park
*243/F_4_Park
AH12
MEM_CALRP0
MEM_CALRP2
MAA1_8 R55 10K
AK10
TESTEN MAB0_8
MAB1_8 W8 8
CLKTESTA R366 680
AL10 AH11
6 C507 C506
CLKTESTB DRAM_RST
R370
DDR3_RST 19,20
*2.2K_4_NC
AL31 RSVD +1.5V_RUN
C160 R371
B *0.1U/10V/X7R_4_NC *0.1U/10V/X7R_4_NC 10K_4 B
68P/50V/COG_4
216-0729051(M96-M2 XT) Normal for NC, POP for test R326 R325 216-0729051(M96-M2 XT)
C3513, C3514, R3519 and R3515 *51.1/F_4_NC *51.1/F_4_NC
NC for GFX Park portion Memory address bus for channel x0.
Provides multiplexed row and column
For Park,Madison production version ASIC addresses. For 128-Mbit x16 DDR3
is need removed workaround. ADM1032-1 => Hex 4C (1001 100) AL001032001 Designator For M97-M2 For Madison
support, MAx13 is supported on MAx0_8.
(128x16x4/8=1024) ADM1032-2 => Hex 4D (1001 101) AL001032002 R272 10K 10K
Park
pre-production build could get the "ENG" 60
marking. +3.3V_DELAY +3.3V_DELAY R271 0R/Short 680R
Madison
- date codes up to 0941 are NOT Production Samples
R273 NC NC
2
Q48
- date codes from 0942 and up are Production Samples *2N7002W-7-F_NC R527 R526 4 C408 2.2nF 68pF
2,25,30 SMBCLK2 3 1
*4.7K_4_NC *4.7K_4_NC +3.3V_DELAY
1 2 U6
VGA_THERMDP 15
2
+3.3V_DELAY Q49 R528 *0_NC 8 SCLK 1

*2N7002W-7-F_NC VDD C293
DDR3/GDDR3 Memory Stuff Option
2,25,30 SMBDAT2 3 1 7 SDATA D+ 2
1
GDDR3 DDR3 2200P/50V/X7R_4

R48 1 2 15 THERMAL_INT# THERMAL_INT# 6 3 50
ALERT# D- VGA_THERMDN 15
*10K_NC MVDDQ 1.5V/1.8V 1.5V R529 *0_NC
5 4 SYS_SHDN#
GND THERM# SYS_SHDN# 30
Ra 40.2R 40.2R
2
A A
TESTEN ADM1032ARMZ-2RL C292
Rb 100R 100R SYS_SHDN# R178 2 1 *10K_4_NC +3.3V_DELAY
Solve Intermittent 0.1U/16V_4/X7R
THERMAL_INT# R179 2 1 10K 10
System Boot-up Hangs

PROJECT : UM8B DIS
1A
Madison_MEMORY/THERM
5 4 3 2 1
1 2 3 4 5 6 7 8
VREF_A0
U8
VMA_DQ29
CHECK PN
VREF_A2
U20
www.bufanxiu.com
VMA_DQ18
DDR3 64MX16, CH A : 512MB
VREF_A4
U7
VMA_DQ38 VREF_A6
U19
VMA_DQ57
19
M8 VREFCA DQL0 E3 M8 VREFCA DQL0 E3 M8 VREFCA DQL0 E3 M8 VREFCA DQL0 E3
VREF_A1 H1 F7 VMA_DQ24 VREF_A3 H1 F7 VMA_DQ22 VREF_A5 H1 F7 VMA_DQ34 VREF_A7 H1 F7 VMA_DQ60
VREFDQ DQL1 VMA_DQ30 VREFDQ DQL1 VMA_DQ17 VREFDQ DQL1 VMA_DQ39 VREFDQ DQL1 VMA_DQ58
DQL2 F2 DQL2 F2 DQL2 F2 DQL2 F2
VMA_MA0 N3 F8 VMA_DQ27 VMA_MA0 N3 F8 VMA_DQ21 VMA_MA0 N3 F8 VMA_DQ35 VMA_MA0 N3 F8 VMA_DQ61
VMA_MA1 A0 DQL3 VMA_DQ28 VMA_MA1 A0 DQL3 VMA_DQ19 VMA_MA1 A0 DQL3 VMA_DQ36 VMA_MA1 A0 DQL3 VMA_DQ56
P7 A1 DQL4 H3 P7 A1 DQL4 H3 P7 A1 DQL4 H3 P7 A1 DQL4 H3
VMA_MA2 P3 H8 VMA_DQ26 VMA_MA2 P3 H8 VMA_DQ20 VMA_MA2 P3 H8 VMA_DQ32 VMA_MA2 P3 H8 VMA_DQ63
VMA_MA3 A2 DQL5 VMA_DQ31 VMA_MA3 A2 DQL5 VMA_DQ16 VMA_MA3 A2 DQL5 VMA_DQ37 VMA_MA3 A2 DQL5 VMA_DQ59
N2 A3 DQL6 G2 N2 A3 DQL6 G2 N2 A3 DQL6 G2 N2 A3 DQL6 G2
VMA_MA4 P8 H7 VMA_DQ25 VMA_MA4 P8 H7 VMA_DQ23 VMA_MA4 P8 H7 VMA_DQ33 VMA_MA4 P8 H7 VMA_DQ62
VMA_MA5 A4 DQL7 VMA_MA5 A4 DQL7 VMA_MA5 A4 DQL7 VMA_MA5 A4 DQL7
P2 A5 P2 A5 P2 A5 P2 A5
A VMA_MA6 R8 VMA_MA6 R8 VMA_MA6 R8 VMA_MA6 R8 A
VMA_MA7 A6 VMA_DQ12 VMA_MA7 A6 VMA_DQ4 VMA_MA7 A6 VMA_DQ51 VMA_MA7 A6 VMA_DQ43
R2 A7 DQU0 D7 R2 A7 DQU0 D7 R2 A7 DQU0 D7 R2 A7 DQU0 D7
VMA_MA8 T8 C3 VMA_DQ15 VMA_MA8 T8 C3 VMA_DQ3 VMA_MA8 T8 C3 VMA_DQ50 VMA_MA8 T8 C3 VMA_DQ44
VMA_MA9 A8 DQU1 VMA_DQ8 VMA_MA9 A8 DQU1 VMA_DQ7 VMA_MA9 A8 DQU1 VMA_DQ49 VMA_MA9 A8 DQU1 VMA_DQ40
R3 A9 DQU2 C8 R3 A9 DQU2 C8 R3 A9 DQU2 C8 R3 A9 DQU2 C8
VMA_MA10 L7 C2 VMA_DQ13 VMA_MA10 L7 C2 VMA_DQ1 VMA_MA10 L7 C2 VMA_DQ48 VMA_MA10 L7 C2 VMA_DQ42
VMA_MA11 A10/AP DQU3 VMA_DQ10 VMA_MA11 A10/AP DQU3 VMA_DQ5 VMA_MA11 A10/AP DQU3 VMA_DQ54 VMA_MA11 A10/AP DQU3 VMA_DQ45
R7 A11 DQU4 A7 R7 A11 DQU4 A7 R7 A11 DQU4 A7 R7 A11 DQU4 A7
VMA_MA12 N7 A2 VMA_DQ11 VMA_MA12 N7 A2 VMA_DQ0 VMA_MA12 N7 A2 VMA_DQ53 VMA_MA12 N7 A2 VMA_DQ46
VMA_MA13 A12/BC DQU5 VMA_DQ9 VMA_MA13 A12/BC DQU5 VMA_DQ6 VMA_MA13 A12/BC DQU5 VMA_DQ52 VMA_MA13 A12/BC DQU5 VMA_DQ41
T3 A13 DQU6 B8 T3 A13 DQU6 B8 T3 A13 DQU6 B8 T3 A13 DQU6 B8
T7 A3 VMA_DQ14 T7 A3 VMA_DQ2 T7 A3 VMA_DQ55 T7 A3 VMA_DQ47
A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
M7 A15 M7 A15 M7 A15 M7 A15
+1.5V_RUN +1.5V_RUN +1.5V_RUN +1.5V_RUN
VMA_BA0 M2 B2 VMA_BA0 M2 B2 VMA_BA0 M2 B2 VMA_BA0 M2 B2

VMA_BA1 BA0 VDD#B2 VMA_BA1 BA0 VDD#B2 VMA_BA1 BA0 VDD#B2 VMA_BA1 BA0 VDD#B2
N8 BA1 VDD#D9 D9 N8 BA1 VDD#D9 D9 N8 BA1 VDD#D9 D9 N8 BA1 VDD#D9 D9
VMA_BA2 M3 G7 VMA_BA2 M3 G7 VMA_BA2 M3 G7 VMA_BA2 M3 G7
BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7
VDD#K2 K2 VDD#K2 K2 VDD#K2 K2 VDD#K2 K2
VDD#N1 N1 VDD#N1 N1 VDD#N1 N1 VDD#N1 N1
VMA_CLKP0 J7 N9 VMA_CLKP0 J7 N9 VMA_CLKP1 J7 N9 VMA_CLKP1 J7 N9
18 VMA_CLKP0 CK VDD#N9 CK VDD#N9 18 VMA_CLKP1 CK VDD#N9 CK VDD#N9
VMA_CLKN0 K7 R1 VMA_CLKN0 K7 R1 VMA_CLKN1 K7 R1 VMA_CLKN1 K7 R1
18 VMA_CLKN0 CK VDD#R1 CK VDD#R1 18 VMA_CLKN1 CK VDD#R1 CK VDD#R1
VMA_CKE0 K9 R9 VMA_CKE0 K9 R9 VMA_CKE1 K9 R9 VMA_CKE1 K9 R9
18 VMA_CKE0 CKE VDD#R9 +1.5V_RUN CKE VDD#R9 +1.5V_RUN 18 VMA_CKE1 CKE VDD#R9 +1.5V_RUN CKE VDD#R9 +1.5V_RUN
VMA_ODT0 K1 A1 VMA_ODT0 K1 A1 VMA_ODT1 K1 A1 VMA_ODT1 K1 A1

18 VMA_ODT0 ODT VDDQ#A1 ODT VDDQ#A1 18 VMA_ODT1 ODT VDDQ#A1 ODT VDDQ#A1
VMA_CS0#0 L2 A8 VMA_CS0#0 L2 A8 VMA_CS1#0 L2 A8 VMA_CS1#0 L2 A8
18 VMA_CS0#0 CS VDDQ#A8 CS VDDQ#A8 18 VMA_CS1#0 CS VDDQ#A8 CS VDDQ#A8
VMA_RAS#0 J3 C1 VMA_RAS#0 J3 C1 VMA_RAS#1 J3 C1 VMA_RAS#1 J3 C1
18 VMA_RAS#0 RAS VDDQ#C1 RAS VDDQ#C1 18 VMA_RAS#1 RAS VDDQ#C1 RAS VDDQ#C1
VMA_CAS#0 K3 C9 VMA_CAS#0 K3 C9 VMA_CAS#1 K3 C9 VMA_CAS#1 K3 C9
18 VMA_CAS#0 CAS VDDQ#C9 CAS VDDQ#C9 18 VMA_CAS#1 CAS VDDQ#C9 CAS VDDQ#C9
VMA_WE#0 L3 D2 VMA_WE#0 L3 D2 VMA_WE#1 L3 D2 VMA_WE#1 L3 D2
18 VMA_WE#0 WE VDDQ#D2 WE VDDQ#D2 18 VMA_WE#1 WE VDDQ#D2 WE VDDQ#D2
VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9
VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1
VMA_RDQS3 F3 H2 VMA_RDQS2 F3 H2 VMA_RDQS4 F3 H2 VMA_RDQS7 F3 H2
VMA_RDQS1 DQSL VDDQ#H2 VMA_RDQS0 DQSL VDDQ#H2 VMA_RDQS6 DQSL VDDQ#H2 VMA_RDQS5 DQSL VDDQ#H2
C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9
VMA_DM3 E7 A9 VMA_DM2 E7 A9 VMA_DM4 E7 A9 VMA_DM7 E7 A9

B
VMA_DM1 DML VSS#A9 VMA_DM0 DML VSS#A9 VMA_DM6 DML VSS#A9 VMA_DM5 DML VSS#A9 B
D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3
VSS#E1 E1 VSS#E1 E1 VSS#E1 E1 VSS#E1 E1
VSS#G8 G8 VSS#G8 G8 VSS#G8 G8 VSS#G8 G8
VMA_WDQS3 G3 J2 VMA_WDQS2 G3 J2 VMA_WDQS4 G3 J2 VMA_WDQS7 G3 J2
VMA_WDQS1 DQSL VSS#J2 VMA_WDQS0 DQSL VSS#J2 VMA_WDQS6 DQSL VSS#J2 VMA_WDQS5 DQSL VSS#J2
B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8
VSS#M1 M1 VSS#M1 M1 VSS#M1 M1 VSS#M1 M1
VSS#P1 P1 VSS#P1 P1 VSS#P1 P1 VSS#P1 P1
DDR3_RST T2 P9 DDR3_RST T2 P9 DDR3_RST T2 P9 DDR3_RST T2 P9
18,20 DDR3_RST RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
VSS#T1 T1 VSS#T1 T1 VSS#T1 T1 VSS#T1 T1
R192 *240/F_4_Park L8 T9 R391 *240/F_4_Park L8 T9 R167 *240/F_4_Park L8 T9 R395 *240/F_4_Park L8 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9
VSSQ#B1 B1 VSSQ#B1 B1 VSSQ#B1 B1 VSSQ#B1 B1

VSSQ#D1 D1 VSSQ#D1 D1 VSSQ#D1 D1 VSSQ#D1 D1
VSSQ#E2 E2 VSSQ#E2 E2 VSSQ#E2 E2 VSSQ#E2 E2
J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8
L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9
J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1
L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9
100-BALL 100-BALL 100-BALL 100-BALL

SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
*K4W1G1646E-HC12_Park *K4W1G1646E-HC12_Park *K4W1G1646E-HC12_Park *K4W1G1646E-HC12_Park
VMA_DQ[0..63]
18 VMA_DQ[0..63]
VMA_MA[0..13]
18 VMA_MA[0..13]
VMA_WDQS[0..7] +1.5V_RUN +1.5V_RUN +1.5V_RUN +1.5V_RUN +1.5V_RUN +1.5V_RUN +1.5V_RUN +1.5V_RUN
18 VMA_WDQS[0..7]
VMA_RDQS[0..7]
18 VMA_RDQS[0..7]
C C
VMA_DM[0..7] R186 R165 R390 R396 R163 R188 R399 R387
18 VMA_DM[0..7]
VMA_BA[0..2] *4.99K/F_4_Park *4.99K/F_4_Park *4.99K/F_4_Park *4.99K/F_4_Park *4.99K/F_4_Park *4.99K/F_4_Park *4.99K/F_4_Park *4.99K/F_4_Park
18 VMA_BA[0..2]
VREF_A0 VREF_A1 VREF_A2 VREF_A3 VREF_A4 VREF_A5 VREF_A6 VREF_A7
Placement has to be close to VRAM R191 C311 R166 C286 R389 C561 R397 C567 R164 C285 R187 C308 R398 C569 R388 C557
*0.1U/10V/X7R_4_Park *0.1U/10V/X7R_4_Park *0.1U/10V/X7R_4_Park *0.1U/10V/X7R_4_Park *0.1U/10V/X7R_4_Park *0.1U/10V/X7R_4_Park *0.1U/10V/X7R_4_Park *0.1U/10V/X7R_4_Park

VMA_CLKP0 R194 *56_4_Park *4.99K/F_4_Park *4.99K/F_4_Park *4.99K/F_4_Park *4.99K/F_4_Park *4.99K/F_4_Park *4.99K/F_4_Park *4.99K/F_4_Park
C315 *0.01U/16V/X7R_4_Park *4.99K/F_4_Park
VMA_CLKN0 R193 *56_4_Park
VMA_CLKP1 R189 *56_4_Park

C310 *0.01U/16V/X7R_4_Park
VMA_CLKN1 R190 *56_4_Park +1.5V_RUN +1.5V_RUN +1.5V_RUN +1.5V_RUN
C560 C307 C312 C566 C559 C568 C314 C306 C309 C313 C558 C565
*1U/6.3V/X5R_4_Park *1U/6.3V/X5R_4_Park *1U/6.3V/X5R_4_Park *1U/6.3V/X5R_4_Park *1U/6.3V/X5R_4_Park *1U/6.3V/X5R_4_Park *1U/6.3V/X5R_4_Park *1U/6.3V/X5R_4_Park *1U/6.3V/X5R_4_Park *1U/6.3V/X5R_4_Park *1U/6.3V/X5R_4_Park *1U/6.3V/X5R_4_Park
+1.5V_RUN +1.5V_RUN
C304 C284 C556 C317 C318 C555

D D
*10U/6.3V/X5R_6_Park *10U/6.3V/X5R_6_Park *10U/6.3V/X5R_6_Park *10U/6.3V/X5R_6_Park *10U/6.3V/X5R_6_Park
*10U/6.3V/X5R_6_Park
NC for GFX Park portion Samsung: AKD5LGGT505 Quanta Computer Inc.

PROJECT : UM8B DIS
Hynix: AKD5LZGTW03 Size Document Number Rev
1A
Madison_DDR3_A_512M
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
VREF_B0 M8
U17
E3 VMC_DQ3 VREF_B2 M8
U5 www.bufanxiu.com
E3 VMC_DQ16
DDR3 64MX16, CH B : 512MB
VREF_B4 M8
U3
E3 VMC_DQ55 VREF_B6 M8
U15
E3 VMC_DQ33
20
VREF_B1 VREFCA DQL0 VMC_DQ4 VREF_B3 VREFCA DQL0 VMC_DQ17 VREF_B5 VREFCA DQL0 VMC_DQ52 VREF_B7 VREFCA DQL0 VMC_DQ39
H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7
F2 VMC_DQ2 F2 VMC_DQ23 F2 VMC_DQ54 F2 VMC_DQ38
VMC_MA0 DQL2 VMC_DQ5 VMC_MA0 DQL2 VMC_DQ18 VMC_MA0 DQL2 VMC_DQ51 VMC_MA0 DQL2 VMC_DQ36
N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8
VMC_MA1 P7 H3 VMC_DQ0 VMC_MA1 P7 H3 VMC_DQ20 VMC_MA1 P7 H3 VMC_DQ49 VMC_MA1 P7 H3 VMC_DQ35
VMC_MA2 A1 DQL4 VMC_DQ6 VMC_MA2 A1 DQL4 VMC_DQ19 VMC_MA2 A1 DQL4 VMC_DQ48 VMC_MA2 A1 DQL4 VMC_DQ34
VMC_MA3 N2 G2 VMC_DQ1 VMC_MA3 N2 G2 VMC_DQ21 VMC_MA3 N2 G2 VMC_DQ53 VMC_MA3 N2 G2 VMC_DQ37
VMC_MA4 A3 DQL6 VMC_DQ7 VMC_MA4 A3 DQL6 VMC_DQ22 VMC_MA4 A3 DQL6 VMC_DQ50 VMC_MA4 A3 DQL6 VMC_DQ32
VMC_MA5 P2 VMC_MA5 P2 VMC_MA5 P2 VMC_MA5 P2
A VMC_MA6 A5 VMC_MA6 A5 VMC_MA6 A5 VMC_MA6 A5 A
R8 A6 R8 A6 R8 A6 R8 A6
VMC_MA7 R2 D7 VMC_DQ15 VMC_MA7 R2 D7 VMC_DQ24 VMC_MA7 R2 D7 VMC_DQ41 VMC_MA7 R2 D7 VMC_DQ63
VMC_MA8 A7 DQU0 VMC_DQ10 VMC_MA8 A7 DQU0 VMC_DQ31 VMC_MA8 A7 DQU0 VMC_DQ47 VMC_MA8 A7 DQU0 VMC_DQ56
T8 A8 DQU1 C3 T8 A8 DQU1 C3 T8 A8 DQU1 C3 T8 A8 DQU1 C3
VMC_MA9 R3 C8 VMC_DQ14 VMC_MA9 R3 C8 VMC_DQ28 VMC_MA9 R3 C8 VMC_DQ40 VMC_MA9 R3 C8 VMC_DQ60
L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2
VMC_MA11 R7 A7 VMC_DQ12 VMC_MA11 R7 A7 VMC_DQ26 VMC_MA11 R7 A7 VMC_DQ43 VMC_MA11 R7 A7 VMC_DQ62
N7 A12/BC DQU5 A2 N7 A12/BC DQU5 A2 N7 A12/BC DQU5 A2 N7 A12/BC DQU5 A2
VMC_MA13 T3 B8 VMC_DQ13 VMC_MA13 T3 B8 VMC_DQ25 VMC_MA13 T3 B8 VMC_DQ44 VMC_MA13 T3 B8 VMC_DQ61
A13 DQU6 VMC_DQ11 A13 DQU6 VMC_DQ27 A13 DQU6 VMC_DQ42 A13 DQU6 VMC_DQ59
T7 A14 DQU7 A3 T7 A14 DQU7 A3 T7 A14 DQU7 A3 T7 A14 DQU7 A3
M7 A15 M7 A15 M7 A15 M7 A15
VMC_BA0 M2 B2 VMC_BA0 M2 B2 VMC_BA0 M2 B2 VMC_BA0 M2 B2

VMC_BA1 BA0 VDD#B2 VMC_BA1 BA0 VDD#B2 VMC_BA1 BA0 VDD#B2 VMC_BA1 BA0 VDD#B2
N8 BA1 VDD#D9 D9 N8 BA1 VDD#D9 D9 N8 BA1 VDD#D9 D9 N8 BA1 VDD#D9 D9
VMC_BA2 M3 G7 VMC_BA2 M3 G7 VMC_BA2 M3 G7 VMC_BA2 M3 G7
BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7
VDD#N1 N1 VDD#N1 N1 VDD#N1 N1 VDD#N1 N1
VMC_CLKP0 J7 N9 VMC_CLKP0 J7 N9 VMC_CLKP1 J7 N9 VMC_CLKP1 J7 N9
18 VMC_CLKP0 CK VDD#N9 CK VDD#N9 18 VMC_CLKP1 CK VDD#N9 CK VDD#N9
VMC_CLKN0 K7 R1 VMC_CLKN0 K7 R1 VMC_CLKN1 K7 R1 VMC_CLKN1 K7 R1
18 VMC_CLKN0 CK VDD#R1 CK VDD#R1 18 VMC_CLKN1 CK VDD#R1 CK VDD#R1
VMC_CKE0 K9 R9 VMC_CKE0 K9 R9 VMC_CKE1 K9 R9 VMC_CKE1 K9 R9
18 VMC_CKE0 CKE VDD#R9 +1.5V_RUN CKE VDD#R9 +1.5V_RUN 18 VMC_CKE1 CKE VDD#R9 +1.5V_RUN CKE VDD#R9 +1.5V_RUN
VMC_ODT0 K1 A1 VMC_ODT0 K1 A1 VMC_ODT1 K1 A1 VMC_ODT1 K1 A1

18 VMC_ODT0 ODT VDDQ#A1 ODT VDDQ#A1 18 VMC_ODT1 ODT VDDQ#A1 ODT VDDQ#A1
VMC_CS0#0 L2 A8 VMC_CS0#0 L2 A8 VMC_CS1#0 L2 A8 VMC_CS1#0 L2 A8
18 VMC_CS0#0 CS VDDQ#A8 CS VDDQ#A8 18 VMC_CS1#0 CS VDDQ#A8 CS VDDQ#A8
VMC_RAS#0 J3 C1 VMC_RAS#0 J3 C1 VMC_RAS#1 J3 C1 VMC_RAS#1 J3 C1
18 VMC_RAS#0 RAS VDDQ#C1 RAS VDDQ#C1 18 VMC_RAS#1 RAS VDDQ#C1 RAS VDDQ#C1
VMC_CAS#0 K3 C9 VMC_CAS#0 K3 C9 VMC_CAS#1 K3 C9 VMC_CAS#1 K3 C9
18 VMC_CAS#0 CAS VDDQ#C9 CAS VDDQ#C9 18 VMC_CAS#1 CAS VDDQ#C9 CAS VDDQ#C9
VMC_WE#0 L3 D2 VMC_WE#0 L3 D2 VMC_WE#1 L3 D2 VMC_WE#1 L3 D2
18 VMC_WE#0 WE VDDQ#D2 WE VDDQ#D2 18 VMC_WE#1 WE VDDQ#D2 WE VDDQ#D2
VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9
VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1
VMC_RDQS0 F3 H2 VMC_RDQS2 F3 H2 VMC_RDQS6 F3 H2 VMC_RDQS4 F3 H2
VMC_RDQS1 DQSL VDDQ#H2 VMC_RDQS3 DQSL VDDQ#H2 VMC_RDQS5 DQSL VDDQ#H2 VMC_RDQS7 DQSL VDDQ#H2
C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9
B B
VMC_DM0 E7 A9 VMC_DM2 E7 A9 VMC_DM6 E7 A9 VMC_DM4 E7 A9

VMC_DM1 DML VSS#A9 VMC_DM3 DML VSS#A9 VMC_DM5 DML VSS#A9 VMC_DM7 DML VSS#A9
D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3
VSS#E1 E1 VSS#E1 E1 VSS#E1 E1 VSS#E1 E1
VSS#G8 G8 VSS#G8 G8 VSS#G8 G8 VSS#G8 G8
VMC_WDQS0 G3 J2 VMC_WDQS2 G3 J2 VMC_WDQS6 G3 J2 VMC_WDQS4 G3 J2
VMC_WDQS1 DQSL VSS#J2 VMC_WDQS3 DQSL VSS#J2 VMC_WDQS5 DQSL VSS#J2 VMC_WDQS7 DQSL VSS#J2
B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8
VSS#P1 P1 VSS#P1 P1 VSS#P1 P1 VSS#P1 P1
DDR3_RST T2 P9 DDR3_RST T2 P9 DDR3_RST T2 P9 DDR3_RST T2 P9
18,19 DDR3_RST RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
VSS#T1 T1 VSS#T1 T1 VSS#T1 T1 VSS#T1 T1
R385 240/F_4L8 T9 R138 240/F_4L8 T9 R75 240/F_4L8 T9 R381 240/F_4L8 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9

VSSQ#E2 E2 VSSQ#E2 E2 VSSQ#E2 E2 VSSQ#E2 E2
J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8
L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9
J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1
L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9
100-BALL 100-BALL 100-BALL 100-BALL

SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
K4W1G1646E-HC12 K4W1G1646E-HC12 K4W1G1646E-HC12 K4W1G1646E-HC12
C C
VMC_DQ[0..63]
18 VMC_DQ[0..63] +1.5V_RUN +1.5V_RUN +1.5V_RUN +1.5V_RUN +1.5V_RUN +1.5V_RUN +1.5V_RUN +1.5V_RUN
VMC_MA[0..13]
18 VMC_MA[0..13]
VMC_WDQS[0..7]
18 VMC_WDQS[0..7]
R384 R382 R155 R159 R109 R56 R379 R365
VMC_RDQS[0..7]
18 VMC_RDQS[0..7]
4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4
VMC_DM[0..7]
18 VMC_DM[0..7]
VREF_B0 VREF_B1 VREF_B2 VREF_B3 VREF_B4 VREF_B5 VREF_B6 VREF_B7
VMC_BA[0..2]
18 VMC_BA[0..2]
R383 C552 R386 C553 R158 C263 R161 C265 R99 C152 R63 C133 R378 C534 R361 C532
4.99K/F_4 0.1U/10V/X7R_4 4.99K/F_4 0.1U/10V/X7R_4 4.99K/F_4 0.1U/10V/X7R_4 4.99K/F_4 0.1U/10V/X7R_4 4.99K/F_4 0.1U/10V/X7R_4 4.99K/F_4 0.1U/10V/X7R_4 4.99K/F_4 0.1U/10V/X7R_4 4.99K/F_4 0.1U/10V/X7R_4
Placement has to be close to VRAM

VMC_CLKP0 R162 56_4

C271 0.01U/16V/X7R_4
VMC_CLKN0 R160 56_4 C548 C541 C537 C254 C274 C544 C526 C185 C196 C536 C549 C527
VMC_CLKP1 R82 56_4 1U/6.3V/X5R_4 1U/6.3V/X5R_4 1U/6.3V/X5R_4 1U/6.3V/X5R_4 1U/6.3V/X5R_4 1U/6.3V/X5R_4 1U/6.3V/X5R_4 1U/6.3V/X5R_4 1U/6.3V/X5R_4 1U/6.3V/X5R_4 1U/6.3V/X5R_4 1U/6.3V/X5R_4
C147 0.01U/16V/X7R_4
VMC_CLKN1 R76 56_4
D D
+1.5V_RUN +1.5V_RUN
C554 C540 C212 + C603 C184 C543 C542

*150U/6.3V_NC
10U/6.3V/X5R_6 10U/6.3V/X5R_6 10U/6.3V/X5R_6
6.3V_3528
10U/6.3V/X5R_6 10U/6.3V/X5R_6 10U/6.3V/X5R_6 Quanta Computer Inc.
PROJECT : UM8B DIS
1A
Madison_DDR3_B_512M
1 2 3 4 5 6 7 8
5 4 3 2 1
www.bufanxiu.com 21
D D
C C
B B
A A

PROJECT : UM8B DIS
1A
Blank
5 4 3 2 1
5 4 3 2 1
www.bufanxiu.com
FOOTPRINT is right,
1lvds-lvd-a30sfyg-30p-r need to check QPN
and symbol
+15V_ALW +3.3V_RUN +LCDVCC +LCDVCC JAE_FI-TD44SB-E-R750
Q22 1
6
FDC655BN 16 1
2 2
3
3 +GFX_PWR_SRC
2
5 4 4
5 4
1
R302 2 5 BLT_PWM
330K C437 C436 5 LCD_BACKLIGHT
1 6 6
2
D 0.1U/16V_4/Y5V 0.047U/10V_4/X7R 7 USBP11_D+ D
2
7
1
R300 8 USBP11_D-
3
47 C441 C435 16 10 8
9 9
LCDVCC_ON 0603 10U/ 6.3V_6/Y5V 10U/ 6.3V_6/Y5V 10 DMIC_CLK
2
603 603 10 DMIC_DATA DMIC_CLK 31
11
1
11 DMIC_DATA 31
1
10 10 12
12 +3.3V_RUN
2
13 13 +3.3V_RUN
R303 C444 +3.3V_RUN +3.3V_RUN 14
*100K_NC 0.01U/25V_4/X7R 14 +LCDVCC
15
1
15
16 LCD_TST 25
2
25 16 LCD_DDCCLK
17 17 LCD_DDCCLK 15
18 LCD_DDCDAT
18 LCD_DDCDAT 15
1
+3.3V_SUS 19
19
3
C438 C434 20 LCD_A0+
20 LCD_A0+ 17
2 2 0.1U/16V_4/Y5V 0.1U/16V_4/Y5V 21 LCD_A0-
LCD_A0- 17
2
Q23 21
22 22
1
Q25 2N7002W-7-F 16 16 23 LCD_A1+
LCD_A1+ 17
1
R304 2N7002W-7-F 23 LCD_A1-
24 24 LCD_A1- 17
47K 25
25 LCD_A2+
26 26 LCD_A2+ 17
Support the new imbeded 27 LCD_A2-
LCD_A2- 17
2
+3.3V_RUN 27
28
diagnostics. 28
29 LCD_ACLK+
D22 29 LCD_ACLK-
30 30
3
1
C 17 ENVDD 30 C
1
3 EN_LCDVCC 2 Q24 J1
DDTC124EUA-7-F C598 D21
2 10U/ 6.3V_6/Y5V 1
25 LCDVCC_TST_EN 25 LCD_BAK
2
1
BAT54C T/R 10 3LCD_BACKLIGHT
1
15,25 PANEL_BKEN 2
R297
BAT54C T/R 10K
2
R1 1 2 0 0805
Shunt capacitors on LVDS for improving WWAN.
USBP11_D-
+PWR_SRC +GFX_PWR_SRC USBP11_D+ USBP11- 9
USBP11+ 9
6
40mil
40mil 4 5
2
B 1 1 2 B
1
R299 *0_NC
2
Q1 C1 LCD_A0- C439 1 2 *3.3P_NC/NPO

50 LCD_A0+
3
R294 C433 *FDC658AP_NC *0.1U/Y5V_NC LCD_A1- C440 1 2 *3.3P_NC/NPO

50 LCD_A1+ 1 2
2
*100K_NC *0.1U/Y5V_NC 603 LCD_A2- C442 1 2 *3.3P_NC/NPO

50 LCD_A2+ R298 *0_NC
1
603 25
2
25
D1
2
17 BIA_PWM 1
R295
*100K_NC LCD_ACLK- 3 BLT_PWM
LCD_ACLK- 17
UM9-DIS-0821_2.DSN
2
25 PWM_VADJ 2
3 1
1
R301 C443 BAT54C T/R R296
2 Q21 *0_NC *3.3P_NC/NPO 10K
25,35,36,37,40 RUN_ON
1
*2N7002W-7-F_NC
1
LCD_ACLK+
LCD_ACLK+ 17
1
2
50
A A

PROJECT : UM8B DIS
1A
LCD CONN
5 4 3 2 1
5 4 3 2 1
37 www.bufanxiu.com
R407 +CARD_3V3
+CARD_3V3_L
RTS5138-QFN24
0
XD_D7
SP14
SP13
SP12
SP11
D CON1 D
SD_D2 1 24
SD-9(D2) SD(SW.COM) 8 CLK_48M_CARD
SD_D3 2 25 SD_CD#
SD_D4 SD-1(D3) SD(SW.CD) XD_CD#
24
23
22
21
20
19
3 MMC-10(D4) XD-1(CDSW) 26
SD_CMD 4 27 U11
SD_D5 SD-2(SD_CMD) XD-0(GND) XD_RDY
5 28
CLK_IN
XD_D7
SP14
SP13
SP12
SP11
MMC-11(D5) XD-2(R/-B) XD_RE#
6 SD-3(VSS) XD-3(RE) 29
7 30 XD_CE# R277 6.2K
RREF 1 18 SP10
C577 *10P/50V_4_NC/COG SD-4(VDD) XD-4(CE) XD_CLE +3.3V_RUN USBP12_D- RREF SP10
8 MS-10(VSS) XD-5(CLE) 31 2 DM GPIO0 17
9 32 XD_ALE USBP12_D+ 3 16 SP9
MS_CLK MS_CLK_R MS-9(VCC) XD-6(ALE) XD_WE# DP SP9 SP8
2 1 10 MS-8(SCLK) XD-7(WE) 33 4 3V3_IN SP8 15
MS_D3 R425 0 11 34 XD_WP +CARD_3V3 CARD_3V3 5 14 SP7
MS_INS# MS-7(D3) XD-8(-WP) VREG CARD_3V3 SP7 SP6
12 MS-6(INS) XD-9(GND) 35 6 V18 SP6 13
XD_CD#
MS_D2 13 36 XD_D0
MS_D0 MS-5(D2) XD-10(D0) XD_D1 C428 C427
14 MS-4(D0) XD-11(D1) 37
SP1
SP2
SP3
SP4
SP5
MS_D1 15 38 XD_D2 4.7U/6.3V/X5R 0.1U/16V_4/Y5V C423
MS_BS MS-3(D1) XD-12(D2) XD_D3 6.3 1U/6.3V/X5R
16 MS-2(BS) XD-13(D3) 39 25 GND
17 40 XD_D4 X5R
7
8
9
10
11
12
SD_CLK SD_CLK_R MS-1(VSS) XD-14(D4) XD_D5 603 RTS5138
2 1 18 SD-5(CLK) XD-15(D5) 41
SD_D6 R424 0 19 42 XD_D6
MMC-12(D6) XD-16(D6) XD_D7
XD_CD#
20 SD-6(GND) XD-17(D7) 43
SD_D7 21 44
MMC-13(D7) XD-18(VCC)
SP1
SP2
SP3
SP4
SP5
SD_D0 22 45 SD_WP C426
SD_D1 SD-7(D0) SD(SW.WP)
23 SD-8(D1) 0.1U/16V_4/Y5V
C572 ALPS
5IN1-SCDF1A0100-45P-V IC Bottom Ground
C *27P_NC/NPO C
50
NPO C573
0.1U/16V_4/Y5V
16
C575 C579 C580

*270P_NC/NPO 0.1U/16V_4/Y5V 0.1U/16V_4/Y5V
25 16 16
SP1 XD_RDY SD_WP MS_CLK 78 L30
old CONN SP2

SP3
SP4
XD_RE#
XD_CE#
XD_CLE
SD_D1
SD_D0
MS_INS#
MS_D7
USBP12_D+
USBP12_D-
1
4
2
3
USBP12+ 9
USBP12- 9
SP5 XD_ALE SD_D7 MS_D3 PLW3216S900SQ2T1
SP6 XD_WE# SD_CD# 1206
SP7 XD_WP SD_D6 MS_D6
SP8 XD_D0 SD_CLK MS_D2
SP9 XD_D1 SD_D5 MS_D0
SP10 XD_D2 SD_CMD
SP14 XD_D6 MS_BS
B B
Share Pin
A A

PROJECT : UM8B DIS
1A
Card Reader(RST5138)
5 4 3 2 1
5 4 3 2 1
www.bufanxiu.com
D D
CN2
DFHS19FR015
+3.3V_DELAY UM9-DIS-0821_2.DSN HDMI Female
TYPE A
+5V_HDMI HDMI_TX2+_C 1 D2+

2 GND
HDMI_TX2-_C 3 D2-
1
HDMI_TX1+_C 4 D1+
5 22
1
GND
R29 R36 HDMI_TX1-_C 6 D1-
4.7K/J_4 4.7K/J_4 HDMI_TX0+_C 7 D0+
R355 R357 8
2
GND
Q8 FDV301N 2.2K/J_4 2.2K/J_4 HDMI_TX0-_C 9 D0-
HDMI_CLK+_C 10
2
CK+
1 3 HDMI_CLK 11
15 HDMI_SCL HDMI_CLK-_C
GND
12 CK-
13 CEC
14 RSVD
2
UM9-DIS-0821_2.DSN +3.3V_DELAY 15 SCL 23
16 SDA
2
C C
17 GND
+5V_HDMI +5V_HDMI 18 +5V
1 3 HDMI_DAT 19
15 HDMI_SDA 15 HDMI_DET HPD
1
Q9 FDV301N GND DFHS19FR015
D8
*UDZSTE-1718B_NC 20
33 HDMIF1
21
+5V_RUN +5V_HDMI
2
1206L110WR
C525
*0.1U_NC/X5R
EXC24CG900U EXC24CG900U R372 2 1 499/F HDMI_TX2+_R

HDMI_TX2-_R 4 3 HDMI_TX2-_C HDMI_TX0+_R 2 1 HDMI_TX0+_C R367 2 1 499/F HDMI_TX2-_R
HDMI_TX2+_R 1 2 HDMI_TX2+_C HDMI_TX0-_R 3 4 HDMI_TX0-_C
R363 2 1 499/F HDMI_TX1+_R
L17 L20 R360 2 1 499/F HDMI_TX1-_R
R374 2 1 499/F HDMI_TX0+_R

R377 2 1 499/F HDMI_TX0-_R
B B
R359 2 1 499/F HDMI_CLK+_R
R358 2 1 499/F HDMI_CLK-_R
3
+5V_RUN 2
UM7 POP O ohm and DE-POP L Q27
2N7002W-7-F
UM9 POP L and DE-POP 0 ohm
1
0918 check
CHECK 1 or 2
L15 L12
HDMI_TX1-_R 4 3 HDMI_TX1-_C HDMI_CLK-_R 4 3 HDMI_CLK-_C C153 0.1U/10V_X7R_4 HDMI_TX2+_R
15 HDMI_TX2+
HDMI_TX1+_R 1 2 HDMI_TX1+_C HDMI_CLK+_R 1 2 HDMI_CLK+_C
C144 0.1U/10V_X7R_4 HDMI_TX2-_R
15 HDMI_TX2-
EXC24CG900U EXC24CG900U C140 0.1U/10V_X7R_4 HDMI_TX1+_R
15 HDMI_TX1+
C138 0.1U/10V_X7R_4 HDMI_TX1-_R
15 HDMI_TX1-
C161 0.1U/10V_X7R_4 HDMI_TX0+_R
15 HDMI_TX0+
C169 0.1U/10V_X7R_4 HDMI_TX0-_R
15 HDMI_TX0-
C135 0.1U/10V_X7R_4 HDMI_CLK+_R
15 HDMI_CLK+
C132 0.1U/16V_4/Y5V HDMI_CLK-_R
15 HDMI_CLK-
A A

PROJECT : UM8B DIS
1A
HDMI
5 4 3 2 1
5 4 3 2 1
www.bufanxiu.com
U4 +RTC_CELL
28 KSO[0..16]
UM3 3
R123
1
*0_NC
2 +3.3V_ALW
28 KSI[0..7] ITE8502E VBAT1
VCC 11 +3.3V_RUN
SMBDAT0 4 3 RP4
LQFP-128L
2
T55 PAD 57 26 +3.3V_ALW SMBCLK0 2 1 2.2KX2
KSO17/GPC5 VSTBY1
KSO16 56 KSO16/GPC3 VSTBY2 50 C183 UM7 POP 2.2k
KSO15 55 92 0.1U/16V_4/Y5V SMBDAT1 4 3 RP3
UM9 POP 10k
1
KSO14 KSO15 VSTBY3 SMBCLK1
54 KSO14 VSTBY4 114 2 1 10KX2
+3.3V_ALW KSO13 53 KSO13 VSTBY5 121 16 0918 check
KSO12 52 127
KSO12/SLCT VSTBY6
KSO11 51 KSO11/ERR UM7 DE-POP
KSO10 46
KSO9 45
KSO10/PE USB_LEFT_EN# R71 2 1 *10K_NC
UM9 POP
KSO9/BUSY 0918 check
2
2
KSO8 44 66 HWPG HWPG 30,32,39
D C93 C220 C221 C230 C85 KSO7 KSO8/ACK ADC0/GPI0 D
43 KSO7/PD7 ADC1/GPI1 67 PAD T39
10U/ 6.3V_6/X5R
0.1U/16V_4/Y5V
0.1U/16V_4/Y5V
0.1U/16V_4/Y5V
0.1U/16V_4/Y5V KSO6 42 68 SUS_PWR_ACK 9
1
1
603 KSO5 KSO6/PD6 ADC2/GPI2 SUS_ON R144 2
41 KSO5/PD5 KEYBOARD ADC3/GPI3 69 PAD T48 Check 1 100K
6.3 16 16 16 16 KSO4 40 70 V_ID1
KSO3 39
KSO4/PD4
KSO3/PD3
ADC4/GPI4
ADC5/GPI5 71 27
PBAT_PRES# 41 IMVP_VR_ON R105 *100K_NC
KSO2 38 72
KSO2/PD2 ADC6/GPI6 IINP 33
Place these caps close to ITE8502. KSO1 37 KSO1/PD1 ADC/DAC ADC7/GPI7 73 SIO_SLP_S5#
SIO_SLP_S5# 9 +3.3V_RUN
KSO0 36 KSO0/PD0
DAC0/GPJ0 76 CRIT_TEMP_REP# 10
KSI7 65 77
KSI7 DAC1/GPJ1 SIO_EXT_WAKE# 10
KSI6 64 78 USB_LEFT_EN# SERIRQ R95 1 2 10K/F_4
KSI6 DAC2/GPJ2 USB_LEFT_EN# 31
KSI5 63 79
KSI5 DAC3/GPJ3 FAN1_DA 30
KSI4 62 80
KSI4 DAC4/GPJ4 RSMRST# 9
KSI3 61 81 1 2 SMBDAT2 4 3 RP2
KSI3/SLIN DAC5/GPJ5 PM_PWRBTN#_R 9
KSI2 60 D10 SDMK0340L-7-F SMBCLK2 2 1 10KX2
KSI1 KSI2/INT
59 KSI1/AFD
KSI0 58 KSI0/STB
PWM0/GPA0 24 BREATH_LED# 29
PWM1/GPA1 25 PAD T49
R53 1 2 *0_NC 22 28
3,9,14,31 PLTRST# LPCRST/WUI4/GPD2 PWM2/GPA2 FAN1_PWM 30
13 29 R356 *0_NC
9 CLK_33M_KBC LPCCLK PWM3/GPA3 PWM_VADJ 22
7,31 LFRAME# 6 LFRAME PWM4/GPA4 30 PAD T50
7,31 LAD0 10 LAD0 PWM5/GPA5 31 PAD T51
9 PWM 32 PAD T13 +3.3V_RUN
7,31 LAD1 LAD1 PWM6/GPA6
7,31 LAD2 8 LAD2 PWM7/GPA7 34 EC_BEEP 31
7,31 LAD3 7 LAD3
47 R368 ICH_AZ_CODEC_RST0#
TACH0/GPD6 FAN1_TACH 30
9 CLKRUN# 93 CLKRUN/GPH0/ID0 TACH1/GPD7 48 PANEL_BKEN 15,22 *100K_NC
SERIRQ 5 LPC
7 SERIRQ SERIRQ
3
D9 2 SDMK0340L-7-F
1 15 120 Q28
SERIRQ 10 SIO_EXT_SMI# ECSMI/GPD4 TMRI0/WUI2/GPC4 LID_SW# 28
D6 2 SDMK0340L-7-F
1 23 124 2 *2N7002W-7-F_NC
10 SIO_EXT_SCI# ECSCI/GPD3 TMRI1/WUI3/GPC6 SIO_SLP_S3# 9 R380
3
SC(V1.0)P38: D12 2 SDMK0340L-7-F
1 126
10 GATEA20 GA20/GPB5
1
C 8.2-k pull-up to +V3.3S 17 1 2 2 C
22 LCD_TST 7,31 ACZ_RST#_AUDIO
1
CRB uses a 10-k pull-up to +V3.3S. LPCPD/WUI6/GPE6 C533
D11 2 SDMK0340L-7-F
1 4 108 PAD T52 *390K_NC *0.1U/10V_NC/X7R
10 RCIN#
2
WRST# KBRST/GPB6 RXD/GPB0 Q29 10
14 WRST TXD/GPB1 109 H_CPUDET# 3
LCD_BAK# 16 119 *MMST3904-7-F_NC
22 LCD_BAK PWUREQ/GPC7 GPC0 IMVP_PWRGD 39
IR/UART CTX0/GPB2 123 RUN_ON 22,35,36,37,40
31 NB_MUTE# 19 L80HLAT/GPE0 CRX1/GPH1/ID1 94 BAT1_LED 29
ICH_AZ_CODEC_RST0# 20 95 IMVP_VR_ON
L80LLAT/WUI7/GPE7 CTX1/GPH2/ID2 IMVP_VR_ON 39
SMBCLK0 110
33,41 SMBCLK0 SMCLK0/GPB3
Charge and BAT 33,41 SMBDAT0
SMBDAT0 111 SMDAT0/GPB4 FLFRAME/GPG2/LF 100 SUS_ON
SUS_ON 34,40
FLRST/GPG0/TM 106 KB_DET# 28 Board ID Straps
SMBCLK1 115 104 PAD T53
8 SMBCLK1 SMCLK1/GPC1 FLAD3/GPG6
PCH 8 SMBDAT1
SMBDAT1 116 SMDAT1/GPC2 SMBUS LPC/FWH PAD T42
24 +3.3V_ALW
FLASH FLAD2/SO 103 EC_FLASH_SPI_DO 26 Park 1G Discrete
LAN, Clock 2,18,30 SMBCLK2
SMBCLK2
SMBDAT2
117 SMCLK2/GPF6 FLAD1/SI 102 EC_FLASH_SPI_DIN 26 39
118 101
Thermal IC 2,18,30 SMBDAT2 SMDAT2/GPF7 FLAD0/SCE
FLCLK 105
EC_FLASH_SPI_CS#
EC_FLASH_SPI_CLK
26
26
PAD T43
PAD T22
25
1
PCH_MELOCK 85 PAD T44
7 PCH_MELOCK PS2CLK0/GPF0
86 82 ECPWROK R41 R154 R119 R153 R152 R151
T40 PAD PS2DAT0/GPF1 EGAD/GPE1 ECPWROK 9
EGPC 83 *10K_NC *10K_NC 10K 10K 10K 10K
EGCS/GPE2 ALW_ON 29
41 PS_ID 87 PS2CLK1/GPF2 EGCLK/GPE3 84 GFX_ON 16,38
T41 PAD 88 PS/2
2
PS2DAT1/GPF3 USB_RIGHT_EN#
89 BID1
28 CLK_TP_SIO PS2CLK2/GPF4 BID2 LCD_SIZE_ID
28 DAT_TP_SIO 90 PS2DAT2/GPF5 GPH3/ID3 96 BID2 26
97 USB_RIGHT_EN# BID2
GPH4/ID4 USB_RIGHT_EN# 26,27
GPIO 98 BID1 LCD_SIZE_ID2
+3.3V_ALW GPH5/ID5 BID1 26
99 LCD_SIZE_ID V_ID1
B GPH6/ID6 LCD_SIZE_ID 26 B
ITE8502_XTAL1 128 107 LCD_SIZE_ID2
CK32K GPG1/ID7
2
2
ITE8502_XTAL2 2 R57 *100K_NC +3.3V_ALW
CK32KE
R67 ITE8502IX_JX 12 18 PAD T54 R40 R145 R112 R143 R142 R141
100K VCORE RI1/WUI0/GPD0 10K 10K *10K_NC *10K_NC *10K_NC *10K_NC
1 VSS1 RI2/WUI1/GPD1 21 2 1 ACAV_IN 29,33
WRST# 27 35 SDMK0340L-7-F D7
BAT2_LED 29
1 1
1
VSS3 WUI5/GPE5
49 VSS4
C139 91 112
VSS5 RING/PWRFAIL/LPCRST/GPB7 AC_PRESENT 9
1U/ 10V/Y5V 113
603 +3.3V_ALW VSS6
122 125 SYS_PWR_SW# 29 Park UMA
2
10 L9 BLM11A05S VSS7 PWRSW/GPE4

74 AVCC GINT/GPD5 33 LCDVCC_TST_EN 22
603 75 AVSS VGA_TYPE VGA_IDENTIFY
2
C130
0.1U/16V_4/Y5V ITE8502E
32KHz Clock. L11 lqfp128-16x16-4
1
16 BID1 USB_RIGHT_EN# UM8(UMA) UM8C (Dis)

ITE8502_XTAL2 603
BLM11A05S
0 0 SSI (X00) SSI (X00)
LCD_SIZE_ID (99) LCD_SIZE_ID2 (107) 0 1 PT (X01) PT (X01)
13" 0 0 1 0 ST (X02) ST (X02)
CLK_33M_KBC ITE8502IX_JX 14" 1 0 1 1 QT (A00) QT (A00)
W1
17" 0 1 0 0 (A01) (A01)
4 1ITE8502_XTAL1
R81
2
3 2 10 C145
0.1U/16V_4/Y5V
C252 32.768KHZ C251
1
18P/50V_4/COG 18P/50V_4/COG 16
1
50 50
A C159 A
2.2P/NPO
2
50

PROJECT : UM8B DIS
1A
SIO ITE8502
5 4 3 2 1
5 4 3 2 1
www.bufanxiu.com
D For EC 8Mbit (1M Byte) RTC BATTERY D
+3.3V_ALW +3.3V_ALW
2nd source:AKE3GZN0N00 +RTC_CELL +3.3V_ALW
1
R32
1
3.3K
R24
U2 3.3K 1 2
2
1 8 D15
25 EC_FLASH_SPI_CS# CE# VDD
R34 1 2 15 EC_FLASH_SPI_CLK_R 6 SDMK0340L-7-F
25 EC_FLASH_SPI_CLK
2
SCK
1
25 EC_FLASH_SPI_DIN
R39 1 2 15 EC_FLASH_SPI_DIN_R 5 SI
C407
R25 33/J_4
EC_FLASH_SPI_DO_R 2 7 2.2U/ 6.3V/X5R
25 EC_FLASH_SPI_DO SO HOLD# 603 Check P/N & Footprint
2
2
C69 3 4 6.3
WP# VSS C57
MX25L8005M2C-15G
*22P/50V_4_NC/NPO 0.1U/16V_4/Y5V
64
1
50 RTCD1 RTCBT1
16 1 2 +RTC_1 1 2 +RTC 1 2
RTCR1 1K/F
SDMK0340L-7-F BATT_CONN
2
C388
1U/ 10V/Y5V
603
1
10
需加COIN BATTERY 料號IN BOM

C C
15
RTC-BATTERY
For PCH
32Mbit (4M Byte)
2nd source:AKE39ZP0N00
+3.3V_RUN +3.3V_RUN
R202
3.3K
R197
U9 3.3K
SPI_CS0# R198 15 SPI_CS0#_R 1 8
7 SPI_CS0# CE# VDD
SPI_CLK R200 15 SPI_CLK_R 6
7 SPI_CLK SCK
SPI_SI R207 15 SPI_SI_R 5
7 SPI_SI SI
SPI_SO R205 15 SPI_SO_R 2 7
B 7 SPI_SO SO HOLD# B
C325
close to PCH 3 WP#
*22P/50V_4_NC/NPO VSS 4 C319
MX25L3205DM2I-12G 0.1U/ 10V/X7R
36 50
2
C601 10
*100P/NPO_NC
1
R195 *0_NC
1 2 BID2 25
R203 *0_NC
1 2 USB_RIGHT_EN# 25,27
R204 *0_NC
1 2 LCD_SIZE_ID 25
R206 *0_NC
1 2 BID1 25
Close to U4
For HSPI Function
A A

PROJECT : UM8B DIS
1A
FLASH/RTC
5 4 3 2 1
1 2 3 4 5 6 7 8
www.bufanxiu.com
eSATA and USB To DB
USB and eSATA Conn.
External USB PORT hookup reference. Your design may
A need more or less external ports and may be mapped A
differently
8/20 Wait Victor check
CN3
54 78 DLW21HN900SQ2L
USBP2_D+ SATA_RXP4_C
11 GND SHIELD 12
1 2 0.01U/25V/X7R C276 10 13
9 USBP2+ 7 SATA_RXP4 B+ SHIELD
4 3 USBP2_D- 0.01U/25V/X7R C279 SATA_RXN4_C 9
9 USBP2- 7 SATA_RXN4 B-
8 GND GND1 4
L23 1206 0.01U/25V/X7R C287 SATA_TXN4_C 7 3 USBP2_D+
7 SATA_TXN4 A- D+1
0.01U/25V/X7R C290 SATA_TXP4_C 6 2 USBP2_D-
7 SATA_TXP4 A+ D-1
5 1 +USB_LSIDE_PWR
GND VBUS1
1
C296
0.1U/X7R
2
eSATA+SINGLE USB
10
+5V_SUS
2
Platforms should put in PADS for the USB chokes if they R394
have the room. Chokes should be NOPOP. Place one 150uF cap by each
*0_NC
USB connector.
1
U18 Each channel is 1A
B
56 2 IN GND 1
55 B
3 7 +USB_LSIDE_PWR
25,26 USB_RIGHT_EN# EN1# OUT1
OC1# 8 USB_OC1# 9
Place ESD diodes as close as USB connector.
1
4 6 +USB_LSIDE_PWR
C563 C564 EN2# OUT2
OC2# 5
ESD1 *10U_NC/X5R 0.1U/X7R
2
USBP2_D- 1 6 805
1 6 +USB_LSIDE_PWR 10 10 TPS2062AD + C294
2 2 5 5
USBP2_D+ 3 4 150U/6.3V
3 4
*SRV05-4.TCT_NC 6.3V_3528
C +3.3V_RUN C
C431 0.1U/16V_4/Y5V Support Dell BT365 (Little Stone) module

2 1
Bluetooth BTB Conn
J4 USBP8_D-
COEX1_BT_ACTIVE_MINI USBP8_D+ USBP8- 9
31 COEX1_BT_ACTIVE_MINI 2 COEX1_BT_ACTIVE BT_DET# 1 BT_DET# 9 USBP8+ 9
4 3 COEX2_WLAN_ACTIVE
3.3V COEX2_WLAN_ACTIVE COEX2_WLAN_ACTIVE 31
USBP8_D+ 6 5
USB+ NC
1 2
USBP8_D- 8 7 R289 *0_NC
USB- HW_RADIO_DIS# BT_RADIO_DIS# 10
10 GND BT_ACTIVE 9 1 2
1
R286 *0_NC
C430 12 11
GND NC
2
0.1U/16V_4/Y5V 14 13
GND NC
2
C432
R283 C429 100P/NPO
2
YEA-BTB-016-514-K 10K 33P/COH

2
1
D D

PROJECT : UM8B DIS
1A
eSATA & Right USB & BT
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
SATA Connector.
CON2
24
www.bufanxiu.com +5V_RUN
+3.3V_SUS +3.3V_SUS
GND
Check PIn Touch Pad
2
12V 22
1
3
12V 21 Definition RP10
R80
100K
12V 20
GND 19
18 4.7KX2
1
RSVD
GND 17
16 +5V_RUN
2
4
A 5V JP2 A
5V 15 25 LID_SW#
5V 14 1
13 L37 1 2 BLM18AG601SN1D TP_CLK
GND 25 CLK_TP_SIO 603 2
GND 12 3
11 L36 1 2 BLM18AG601SN1D TP_DATA
GND 25 DAT_TP_SIO 603 4
3.3V 10 +3.3V_RUN 5
3.3V 9 +5V_RUN 6
3.3V 8
88513-064N
1
C551 C550
7 10P/50V/COG 10P/50V/COG C545 C546 C175 C166 C151 C146
GND SATA_RXP0_C C339 0.01U/25V_4/X7R 10P/50V/COG
10P/50V/COG 0.1U/16V_4/Y5V
0.047U/10V_4/X7R 0.1U/16V_4/Y5V 0.047U/10V_4/X7R
6 SATA_RXP0 7
2
TXP SATA_RXN0_C C337 0.01U/25V_4/X7R 50 50
TXN 5 SATA_RXN0 7
4 50 50 16 10 16 10
GND SATA_TXN0_C C331 0.01U/25V_4/X7R
RXN 3 SATA_TXN0 7
2 SATA_TXP0_C C329 0.01U/25V_4/X7R
RXP SATA_TXP0 7
GND 1
DG: Place TX cap close to connector
GND 23
SATA HDD
+3.3V_RUN Place caps close to connector. KEYBOARD CONNECTOR
B
Top side LTS_ABA-FPC-014-030-K B
C372 C360 C363
GND1
*10U/10V/0805_NC/X5R
*1U_NC/X5R *1000P_NC/X7R 1
2
25 KSO[0..16] 3
KSO10 4
25 KSI[0..7] 5
Place caps close to connector. KSO11
6
+5V_RUN KSO9
KSO14 7
KSO13 8
KSO15 9
C394 C396 C400 C412 C413 C414 KSO16 10
KSO12 11
10U/6.3V_8/Y5V 1U/ 10V/Y5V 0.1U/16V_4/Y5V
0.1U/16V_4/Y5V
0.1U/16V_4/Y5V
1000P/50V_4/X7R KSO0 12
KSO2 13
KSO1 14
KSO3 15
KSO8 16
KSO6 17
C462 100P/NPOKSI7 KSO7 18
50 KSO4 19
KSO5 20
KSI0 21
KSI3 22
KSI1 23
+3.3V_ALW 24
KSI5
KSI2 25
ODD Connector R320 KSI4 26
CN4 10K/F_4 KSI6 27
28
DG: Place TX cap close to connector
GND2
KSI7
CP3 100PX4 CP2 100PX4 KB_DET# 29
25 KB_DET# 30
1 8 7 KSO12 8 7 KSO14
C GND1 SATA_TXP1_C C403 0.01U/25V_4/X7R KSO16 KSO9 C
RXP 2 SATA_TXP1 7 6 5 6 5
3 SATA_TXN1_C C397 0.01U/25V_4/X7R 4 3 KSO15 4 3 KSO11 JKB1
RXN SATA_TXN1 7
4 2 1 KSO13 2 1 KSO10
GND2 SATA_RXN1_C C381 0.01U/25V_4/X7R
TXN 5 SATA_RXN1 7
6 SATA_RXP1_C C375 0.01U/25V_4/X7R 1206 50 1206 50
TXP SATA_RXP1 7
GND3 7
CP1 100PX4 CP6 100PX4

8 8 7 KSI6 8 7 KSI1
DP KSI4 KSI3
5V_0 9 6 5 6 5
10 4 3 KSI2 4 3 KSI0
5V_1 +5V_RUN
11 2 1 KSI5 2 1 KSO5
MD
GND4 12
13 1206 50 1206 50
GND5
CP5 100PX4 CP4 100PX4

AOP_C18550-11305-L 8 7 KSO4 8 7 KSO3
6 5 KSO7 6 5 KSO1
4 3 KSO6 4 3 KSO2
2 1 KSO8 2 1 KSO0
1206 50 1206 50
Place caps close to connector.

+5V_RUN 100P CAPS CLOSE TO JKB1
C359 C357 C342 C340 C341
D *10U/10V/0805_NC/X5R
1U/ 10V/Y5V 0.1U/16V_4/Y5V
0.1U/16V_4/Y5V
1000P/50V_4/X7R D

PROJECT : UM8B DIS
1A
SATA (HDD&ODD) & TP & KB
1 2 3 4 5 6 7 8
A B C D E
www.bufanxiu.com
Power
+3.3V_SUS +5V_SUS +5V_SUS
High output current driver 24mA

R287
4 100K 4
5
1 3 2 4 BREATH_PWRLED
25 BREATH_LED#
Q16 U13
2N7002W-7-F TC7SZ04FU(T5L,F,T)
3
check outpout current for 3 LED
D18
BREATH_PWRLED R291 390 2 1 29
31 BREATH_PWRLED
HT-S91BP5 3VALW ON POWER LOGIC
If= 5mA WHITE
Vf= 3.2V +3.3V_ALW
+5V_RUN
2
+5V_ALW +5V_ALW
R31
100K
HDD activity LED. +3.3V_RUN R292
390
1
3 3
2
29
1
R23 R22 R21

D3
2
100K 100K 100K

R288
100K
D19
HT-S91BP5 WHITE SYS_PWR_SW# 25
1
2
BAS316
1
C71
3 1
0.1U/16V_4/Y5V
2
POWER_SW_IN0# 16
31 POWER_SW_IN0# 3.3V_ALW_ON 34
2 Q20
2N7002W-7-F
3
2 Q17
7 SATA_LED# D2
3
2N7002W-7-F
2 Q7
1
2N7002W-7-F
1
BAS316
1
C54
*0.1U/10V_NC/X7R
2
10
3
+3.3V_ALW 2 Q6
25 ALW_ON
2N7002W-7-F
Battery
1
3
+5V_ALW
2 Q5
2 25,33 ACAV_IN 2
2N7002W-7-F
1
ORANGE(1:3)
R293
330
R290
390 WHITE(2:4)
If= 5mA
If= 5mA
Vf= 3.2V
3
Vf= 2.4V D20
HT-261UD5/BP5
28
4
BREATH_LED# C17 *100P_NC/X7R

50
Q19 Q18
3
2N7002W-7-F 2N7002W-7-F
2 2 POWER_SW_IN0# C16 *100P_NC/X7R
50
25 BAT2_LED BAT1_LED 25
1
1
1
R285 R284
10K 10K
2
UM3_DIS_20090824_1000_SSI_STEPHEN.DSN
1 1

PROJECT : UM8B DIS
1A
SWITCH, LED
A B C D E
1 2 3 4 5 6 7 8
FAN CONTROL
www.bufanxiu.com
+5V_RUN +5V_RUN
2
J3
+5V_FAN 1
A 1 C587 A
2 2 *DA204U_NC
3 1U/ 10V/X5R
25 FAN1_TACH 3 D25
U22
C496 C517 FOX_HS8803F-S
3
2.2U 0.1U/16V_4/Y5V 1 8
805 VEN GND
2 VIN GND 7
25 16 Check Pin definition R441
+5V_FAN 3 VO GND 6
FAN1_PWM 4 5
25 FAN1_PWM SET GND
180K
G990P11U
2
+5V_RUN R352 4.7K/J_4
C586 R442
1000P/50V_4/X7R *0_NC
1
25 FAN1_DA
B B
OTP 85 degree C
Place under CPU 10/20mils

ADM1032-1 => Hex 4C (1001 100) AL001032001 R17 2 1 10K THERM_ALERT#
+3.3V_RUN
REM_DIODE1_P
ADM1032-2 => Hex 4D (1001 101) AL001032002
+3.3V_RUN
3
U1
1
Q26 2 C504 C22 1 8 SMBCLK2 SMBCLK2 2,18,25

MMST3904-7-F *100P_NC/NPO 2200P/50V/X7R VDD SCL
2 7 SMBDAT2 SMBDAT2 2,18,25
1
DP SDA
50
REM_DIODE1_N 50 3 6 THERM_ALERT#
DN ALERT#
4 SYS_SHDN# GND 5 SYS_SHD#
1.Place C160 close to EMC1422 EMC1422-1-ACZL-TR
2.Place C518 to be close to Q51 4.7K 6.8K 10K 15K 22K 33K
2 1 TEMP_FAIL 15
1
Total capacitance between D+/D- is 2200pF(max) D4 *SDMK0340L-7-F_NC ALERT#

C19
if use 2200pF for C160, then C518 should be dummy SYS_SHDN#
0.1U/ 10V/X7R
SYS_SHDN# 18
2
C
4.7K 77'C 83'C 89'C 95'C 101'C 107'C C
10
+3.3V_RUN
THERM_STP# 34
6.8K 78'C 84'C 90'C 96'C 102'C 108'C
2
R2
Q2
6.8K/F
2N7002W-7-F 10K 79'C 85'C 91'C 97'C 103'C 109'C
1
1 3
15K 80'C 86'C 92'C 98'C 104'C 110'C

2
22K 81'C 87'C 93'C 99'C 105'C 111'C

25,32,39 HWPG 1 2
R3 *0_NC
33K 82'C 88'C 94'C 100'C 106'C 112'C

UM7 change this pin to H_VTTPWRGD
D D

PROJECT : UM8B DIS
1A
FAN & THERMAL
1 2 3 4 5 6 7 8
5 4 3 2 1
+3.3V_RUN +5V_SUS
AUD_SPK_R+
AUD_SPK_R-
1
3
J6
1
3
2
4
2
4
www.bufanxiu.com +5V_SUS
Check P/N and footprint
AUD_SPK_L+ 5 6
5 6
1
1
AUD_SPK_L- 7 8
C5 C9 7 8 + C11 C7 DJ-CONN
+1.5V_RUN 9 9 10 10 +1.5V_RUN
0.1U/16V_4/Y5V 0.1U/16V_4/Y5V 11 12 *100U/6.3V_7343_NC/ 0.1U/16V_4/Y5V
35 +3.3V_RUN +3.3V_RUN 8 PCIE_RXN6_LAN
2
2
11 12 30
13 13 14 14 8 PCIE_RXP6_LAN 29
16 16 1106 add for LCD pin definition modify 15 16 16
15 16 28
+5V_RUN 17 17 18 18 +5V_RUN 8 PCIE_TXN6_LAN 27
22 DMIC_DATA R448 *0_NC 603 19 20 8 PCIE_TXP6_LAN
19 20 26
21 21 22 22 25
D 22 DMIC_CLK R451 *0_NC 603 23 24 +5V_SUS 8 CLK_PCIE_LANN D
+1.5V_RUN +5V_RUN 23 24 +5V_RUN 24
27 COEX2_WLAN_ACTIVE 25 25 26 26 8 CLK_PCIE_LANP 23
7,25 LFRAME# R449 0 603 27 28
R450 0 603 27 28 22
29 30
38 7,25 LAD3
7,25 LAD2 31
29
31
30
32 32 75 8 PCIE_CLK_REQB#_R
3,9,14,25 PLTRST#
21
20
7,25 LAD1 33 33 34 34 9 PCIE_WAKE# 1 2 19
1
1
35 36 R225 *0_NC +3.3V_SUS
C2 C6 7,25 LAD0 35 36 C8 18
9 CLK_33M_LPC 37 37 38 38 CLK_PCIE_WLANN 8 17
0.1U/16V_4/Y5V 0.1U/16V_4/Y5V 39 40 CLK_PCIE_WLANP 8 0.1U/16V_4/Y5V
10 WLAN_RADIO_DIS#
2
2
39 40 16
8 PCIE_CLK_REQ1# 41 41 42 42 15
16 16 43 44 16
38 10 PCIE_MCARD1_DET#
9 USB_MCARD1_DET# 45
43
45
44
46 46
PCIE_RXN1 8
PCIE_RXP1 8 +5V_RUN
14
13
27 COEX1_BT_ACTIVE_MINI 47 47 48 48 +3.3V_DELAY 12
3,9,14,25 PLTRST# 49 49 50 50 PCIE_TXN1 8 15 DDCDATA 11
WLAN_SMBCLK 51 52 PCIE_TXP1 8
10 USB_MCARD2_DET#
WLAN_SMBDATA53
55
51
53
52
54 54
56
+3.3V_RUN 12 15 DDCCLK 10
9
55 56 USBP4+ 9 15 VGAHSYNC 8
57 58
52
10 WWAN_RADIO_DIS#
25 USB_LEFT_EN# 59
57
59
58
60 60
USBP4- 9 49 15 VGAVSYNC 7
6
61 62 15 VGA_RED L42 BLM18BB750SN1D VGA_RED_R
9 USB_OC0# 61 62 USBP5+ 9 5
1
63 64 402
53 25 EC_BEEP
65
63
65
64
66 66
USBP5- 9
51 C4
0.1U/16V_4/Y5V
15 VGA_GRN L43
402
BLM18BB750SN1D VGA_GRN_R 4
3
7 ACZ_SPKR 67 68
2
67 68 USBP1+ 9 L44 BLM18BB750SN1D VGA_BLU_R 2
7,25 ACZ_RST#_AUDIO 69 69 70 70 USBP1- 9 15 VGA_BLU 1
71 72 16 402
7 ACZ_SYNC_AUDIO 71 72 JP1
7 ACZ_BITCLK_AUDIO 73 73 74 74 USBP0+ 9
7 ACZ_SDOUT_AUDIO 75 75 76 76 USBP0- 9
7 ACZ_SDIN0 77 77 78 78
25 NB_MUTE# 79 79 80 80
+1.5V_RUN
HEADER 40X2 +3.3V_SUS +5V_RUN +3.3V_DELAY
C13
*10P/16V_4_NC/NP0
1
1
C465 C461 C458
C C
C3 0.1U/16V_4/Y5V 0.1U/16V_4/Y5V 0.1U/16V_4/Y5V
2
0.1U/16V_4/Y5V
need update the qpn and part description
2
16 16 16
16
footprint is right
To CRT board
J5 +3.3V_RUN
AUD_SPK_R+ R447 *0_NC 603 1
AUD_SPK_R- R446 *0_NC 603 1
2 2
AUD_SPK_L+ R445 *0_NC 603 3 3
4
2
AUD_SPK_L- R444 *0_NC 603 4 4
1775295-4 RP1
2
2.2KX2
C591 C590 C589 C588 Q4
2
*100P_NC/NPO*100P_NC/NPO*100P_NC/NPO*100P_NC/NPO 2N7002W-7-F
1
3
1
Int. Stereo Speakers 50 50 50 50
12,13 WLAN_SMBCLK
WLAN_SMBCLK 1 3 ICH_SMBCLK 8
B B
5V / 4 Ohm / 2W
1 2
R12 *0_NC
+3.3V_RUN
J2 Q3
2
+5V_ALW 2N7002W-7-F
POWER_SW_IN0# 1
29 POWER_SW_IN0# BREATH_PWRLED 2 WLAN_SMBDATA
29 BREATH_PWRLED 3 5 12,13 WLAN_SMBDATA 1 3 ICH_SMBDATA 8
1
4 6
CON4_1
*DA204U_NC/
D5 1 2
R10 *0_NC
3
POWER_SW_IN0#
A A

PROJECT : UM8B DIS
1A
BTB CONN & Audio conn
5 4 3 2 1
1 2 3 4 5 6 7 8
www.bufanxiu.com
+PWR_SRC +PWR_SRC +PWR_SRC
A
1 C612 C610 C611
A
0.1U/25V_4 0.1U/25V_4 0.1U/25V_4
+3.3V_SUS
2
R184
10K
Check PWRGD Voltage
1
+3.3V_SUS
D13
9 C609 C607 C608
35 1.5V_DDR_PWRGD
0.1U/25V_4 0.1U/25V_4 0.1U/25V_4
2
BAS316 R182
R181 *0_NC 10K 100K to 10K(By Victor)
38 GFX_CORE_PWRGD
1
R183 *0_NC HWPG
37 1.05V_VTT_PWRGD HWPG 25,30,39

R180 *0_NC C303
36 1.05VPCH_PWRGD
B *100P_NC/X7R +3.3V_RUN B
9 C606 C604 C605
0.1U/25V_4 0.1U/25V_4 0.1U/25V_4
R133
2K/F_4
1 2 H_VTTPWRGD
H_VTTPWRGD 3
D14 SDM10K45-7-F
VTTPWRGOOD
R132 SC(V1.0)P18:
1K/F VTT_1.1 VR power good
signal to processor. Signal
voltage level is 1.1 V.
C C
D D

PROJECT : UM8B DIS
1A
System Reset Circuit
1 2 3 4 5 6 7 8
A B C D E
Continuous current : 11A

www.bufanxiu.com+PWR_SRC
Continuous current : 11A
Rds(on) : 18mohm
PQ4
FDS4435BZ
Rds(on) : 18mohm
1 8
2 7
PQ1 3 6
FDS4435BZ PR10 5
0.01_3720
8 1 PC14 PC134 PC133
1 4
+DC_IN_SS 7 2 1 2 CHGR_IN +DC_IN_SS
*4700P/25V/X7R_4_NC
*2200P/50V_NC
*0.1U_25V_0603_NC
+DC_IN_SS 1 2
6 3 3 3 4 4
1 1
5
PR130
4
470K
2
CSSP_1
1 2 1 2
PR126 10K PR6 100K
3
2
PR19 PR18
PQ23 10/F 10/F
1
2N7002W-7-F
PC28
+DC_IN_SS 2 1
0.1U 10
CSSN
CSSP
PR22 49.9/F
0603
PC25
1
1U PC11 PC9 PC131
PR134 0805 2200P 0.1U 10U
215K/F 25 PR20 0 0603 0603 1206
28
27
2
2
1
50 50 25
PR28
CSSP
GND
CSSN
2
LDO 49.9K/F 22 PC32 1U
DCIN LDO
2 1 2 1
1
2 0603 10 2
2 1 8731_ACIN 2 25 BST PC20
ACIN BST
5
6
7
8
PR47 PC33 0.01U PR32 0.1U
1
10K/F 25 4.7/F 0603 PQ25
21 0603 50 4 FDMC8884 PL1 change to 4.7uF 11/17
2
LDO PC23 1U PR127 PR125

25,29 ACAV_IN 13
2
ACOK PC24 PL1 0.01_3720 Short Jump
VCC 26 2 1
1
+3.3V_ALW 11 0603 10 *3300P_NC 4.7UH 20% 5.5A(EPI0603H-4R7M-K01)
1
2
3
VDD DHI CHG_CS2 +VCHGR_P
DHI 24 1 2 2 1 1 2 1 +VCHGR
PR46 1 2 4 4 3 3
5
6
7
8
2
15.8K/F PC45 0.1U
LX 23 LX PR21 short pad
0603 50 0603 PR4 PC12 PC132 PC130 PC10
2
10 20 DLO 50 4 *2.2_NC CSIP_1 *3300P_NC *1000P_NC *2200P_NC 0.1U

25,41 SMBCLK0 SCL DLO
1
9 0805 50 50 50 0603 50
25,41 SMBDAT0 SDA PC2 PC125
14 19
2 1
BATSEL PGND
SMBUS Address 12 GNDA_CHG 10U 10U
1
2
3
2
IINP 8 18 PQ24 PC1 PR132 PR131 1206 1206
25 IINP IINP CSIP
12H
Adress :
*1000P_NC 10/F 10/F 25 25
2
17 FDMC8884
1
CSIN 50
2
8731CCV 6 PC36
CCV
1
2 1 SJ1
PR36 CSIP Max Charging current close to
1
PR38
2
2.21K/F 5 15 2 1 0.1U 10 output Cap

CCI FBSA
100 CSIN setting 4.5A
FBSB 16
8731CCS 4
CCS RDS(ON)=26m
GND
ohm
DAC
1
3 REF
1
PC46 PC41 PC34 ISL88731A

7
12
0.1U 0.01U 0.01U PU2

3 10 25 25 3
2
FBSA_1
SJ7
1 1 2 2
+VCHGR
GNDA_CHG
Control IC: ISL88731A
H/S MOSFET: AON7410AOS), Qg=6.1nC, Rds(on)=26mohm, PD:3.1W
L/S MOSFET: AON7410(AOS), Qg=6.1nC, Rds(on)=26mohm, PD:3.1W
Inductor: 6.8UH +-30% 5.5A SDSL10D40F-5R8Y(TTA), DCR=21mohm
Output Cap: 2*10U 25V(+-10%,X6S,1206)
4 4

PROJECT : UM8B DIS
1A
Charger
A B C D E
5 4 3 2 1
www.bufanxiu.com
PR87
ISL6237_ONLOD
PR86 short pad
PD4 390K PR88
1 2 150K/F
close CAPs close to MOSFETs 603 close CAPs close to MOSFETs
*UDZSTE-175.6B_NC
+3V5V_PWR_SRC
+PWR_SRC
+5V_ALW PR89
*10/0603_NC
D D
PC170 PC116 PC117 PC118 PC119 PC166
10U PC84 10U
0.1U/25V_0603
0.1U/25V_0603
1206
2200P
50 4.7U/6.3V_0603
2200P
50 1206 +3.3V_ALW
25 25
6.3 Fs=250K
+5V_SUS 1206
TDC : 6.38(UMA) ; 7.6A(DIS)
PC88
Fs=200K PR90 0.1U OCP : 9.11(UMA) ; 10.9A(DIS)
ISL6237_ONLOD
TDC : 7.8A PC85
PC86
*1U/6.3V_NC
short pad
PC87
OCP : 11.1A 0.1U 1U/6.3V_4
+3.3V_ALW
50
10
603
5
6
7
8
+5V_SUS 603
PR94 PQ37
*0_NC 4 FDMC8884
42
8
7
6
5
4
3
2
1
1
2
3
8
7
6
5
41 PL7
PAD
LDOREFIN
LDO
VIN
RTC
ONLDO
VCC
TON
REF
PAD 3.3UH+-20% 6A(EPI0603H-3R3M-K01)
PQ22 40 PAD
FDMC8884 4 +5V_DH 39 +3.3V_LX 1 2 +3.3V_ALWP
PAD
38 PAD
2
+5V_SUSP 9 32 PR99 226K/F
PL9 BYP REFIN2 PR160
10 31
3
2
1
OUT1 ILIM2
2
3.3UH+-20% 6A(EPI0603H-3R3M-K01) 11 30 *2.2_NC
+5V_SUSP +5V_LX FB1 OUT2 PR102 0805
1 2 12 29
2
ILIM1 SKIP#
5
6
7
8
PR103 226K/F +5V_POK 13 PU6 28 POK short pad +
1
PGOOD1 PGOOD2
2
1
+5V_EN1 14 27 +3.3V_EN2 SJ10 PC160
PR162 ON1 RT8206BGQW ON2 +3.3V_DH PC115
close to
0.1U/25V_0603
C 15 26 4 C
2
1
DH1 DH2
2
*2.2_NC 16 25 PC161 output Cap 330U/6.3V/ESR25
LX1 LX2
8
7
6
5
1
SJ12 SJ11 0805 37 *1000P_NC

+ PAD 50
36
SECFB
1
1
2
3
1
PAD
AGND
PGND
PC165 close to +5V_DL
BST1
BST2
4 PQ35
VDD
PAD
PAD
PAD
DL1
DL2
PC168 PR100 PC99 PC100 FDMC8296
0.1U/25V_0603
output Cap
2
330U/6.3V/ESR25 *0_NC PC172 0.1U 0.1U

*1000P_NC PQ38 25 25
3
2
1
35
34
33
17
18
19
20
21
22
23
24
50 FDMC8296
1
603 PR122 603 1 603

PR121 +3.3V_DL
1 603
PR101
short pad +5V_ALW SJ9
1 1 2 2 +3.3V_ALW
Control IC: RT8206B
H/S MOSFET: FDMC8884(Fairchild), Qg=6.1nC, Rds(on)=26mohm, PD:3.1W
PC110 L/S MOSFET: FDMC8296(Fairchild), Qg=12nC, Rds(on)=22mohm, PD:3.1W
+3.3V_ALW 1U/6.3V_4 Inductor: 3 3.3UH,30%8A(TPRH10D45F-3R8Y-F02)(TTA), DCR=21mohm
Control IC: RT8206B +5V_ALW Output Cap: 1*330U,6.3V(20%ESR17,7343)
H/S MOSFET: FDMC8884(Fairchild), Qg=6.1nC, Rds(on)=26mohm, PD:3.1W
L/S MOSFET: FDMC8296(Fairchild), Qg=12nC, Rds(on)=22mohm, PD:3.1W PC114 0.1U/25V_0603 BAT54S-7-F
Inductor: 3 3.3UH,30%8A(TPRH10D45F-3R8Y-F02)(TTA), DCR=21mohm 1
PC107 0.1U/25V_0603
Output Cap: 1*330U,6.3V(20%ESR17,7343) PD6 +3.3V_ALW +3.3V_ALW
3
PC98 0.1U/25V_0603
2
B +15V_ALW B
PC93
PQ14 0.1U/25V_0603 PR109 PR108
1 100K 100K
DDTA114YUA-7-F
PD5 3
3 1 +15V_ALWP 2
47K
POK +5V_POK
+5V_POK 35
10K
BAT54S-7-F
PC92
2
0.1U/25V_0603
3
Ton GND VREF2 or Float 5V

2 PQ13
2N7002W-7-F
1
Channel1 Fs 400 kHz 300 kHz 200 kHz
Channel2 Fs
500 kHz 375 kHz 250 kHz
PR96 200K
A +5V_EN1 +3.3V_EN2 A
25,40 SUS_ON PM_THRMTRIP# 3
PR93 *0_NC
THERM_STP# 30
C405 PR91 short pad
*100P_NC
PR92 short pad

3.3V_ALW_ON 29
close to PR45
C390
close to PR46
PROJECT : UM8B DIS
*100P_NC Size Document Number Rev
1A
3V/5V
5 4 3 2 1
5 4 3 2 1
www.bufanxiu.com
Place these CAPs
close to MOSFETs
D D
+PWR_SRC
+1.5V_PWR_SRC
PC60 PC61
2200P/50V 0.1U_25V_0603 PC59
10U/25V_1206
+1.5V_SUS
+0.75V_DDR_VTT
+1.5V_SUS TDC : 13.65A
TDC : 0.7A
OCP: 19.5A
5
6
7
8
PR65
Short Jump
PC69 10U/6.3V_0805
+1.5V_DH
PQ10 Frequency : 280KHz
4 FDMC7692
+0.75V_DDR_VTT_P PR62 0_0603 PC70
+0.75V_DDR_VTT 1 2 PR57
RT8207A_BST
BST1 0.1U_25V_0603 PL5
1
2
3
1UH +-20% 12A(EPI0603H-1R0M-K01)
PC71 +1.5V_LX 1 2 +1.5V_SUS_P 2 1 +1.5V_SUS
PC67 10U/6.3V_0805
close to 10U/6.3V_0805 +1.5V_DL
2
output Cap Short Jump
5
6
7
8
PR56
2
2
2.2_0805
25
24
23
22
21
20
19
+
1
SJ5 4
2
PC65 PC139
LL
DRVL
GND
VTT
VLDOIN
VBST
DRVH
1
1
SJ2 SJ3
0.1U/25V_0603
330U/2.5V/ESR9
2
PC55
1
2
3
1
PQ7 1000P close to
FDMC7672 output Cap
1
1 18 50
VTTGND PGND
C C
2 VTTSNS CS_GND 17
PR64 11.8K/F
3 RT8207AGQW 16 CS
GND PU5 CS
4 15 Change from NC to no NC 11/12
MODE V5IN PR69 5.1_0603
+VTT_DDR_REF 5 14 DDR V5FILT +5V_ALW
VTTREF V5FILT
DDR V5FILT 6 13
COMP PGOOD
VDDQSNS
PC79 PC76
VDDQSET
PC78 1U/6.3V 1U/6.3V

0.047U/25V
NC
NC
S3
S5
7
10
11
12
FOR DDR II 1.5V_DDR_PWRGD 32

PR73
909K
TON +1.5V_PWR_SRC
PR84
S5_1.5V PR78 short pad
+5V_POK 34
S3_1.5V PR77 short pad
RUN_ON 22,25,36,37,40
short pad
RT8207A_FB
RT8207A_FB1
FB VDDQSNS VTT&VTTREF
R1 +1.5V_SUS
PC82 PR81 Control IC: RT8207A
*18P/50V_NC *75K/F_NC
B
VDDP +1.8V VDDQ/2 H/S MOSFET: FDMC7692(Fairchild), Qg=11nC, Rds(on)=14mohm, PD:2.5W B
L/S MOSFET: FDMC7672(Fairchild), Qg=24nC, Rds(on)=5mohm, PD:2.5W

Inductor: 1.0UH 20% 28A(EPI1004H-1R0M-K01)(TTA), DCR=2.8mohm
RT8207A_FB2 Output Cap: 1*330U,2.5V(20%,105C,3528),ESR=9mohm
GND +1.5V VDDQ/2 VOUT = (1+R1/R2)*0.75
R2
PR85
*75K/F_NC
S3_1.5V S5_1.5V
C302 C300
*100P_NC *100P_NC
A A
close to PR56 close to PR55

PROJECT : UM8B DIS
1A
1.5V_DDR/0.75V
5 4 3 2 1
5 4 3 2 1
www.bufanxiu.com
+PWR_SRC
+5V_SUS
D PD7 D
PR107 RTBST
2 1
PC163 PC162 PC164
RTVDD
10_6
2200P/50V_4
10U/25V_1206
0.1U/25V_0603
RB501V-40
PC90 PC113
1U/6.3V_4
13 1U/6.3V_4
RTBST_1 PR120 PC112 +1.05V_PCH
Fs=280K
0.1U/25V_4
1_6
5
6
7
8
PR113
909K Change PR120 to 1 ohm 11/23 PQ36 TDC : 4.816A
9
PU7 4 FDMC8884
12 RTDH OCP: 7A
VDD
VDDP
BST
RTTON DH
16 TON PR161
1
2
3
32 1.05VPCH_PWRGD RTPG 4 11 RTLX PL8 Short Jump
PGOOD LX 1.5UH+-20% 10A(EPI0603H-1R5M-K01)
RT8204C PR124
RTLPPG 5 10 RTILIM 1 2 +1.05V_VCCP 2 1 +1.05V_PCH
LPGOOD ILIM
7.87K/F_4
2
RUN_ON PR114 10_4 RTEN 15 8 RTDL
22,25,35,37,40 RUN_ON EN/DEM DL
2
VOUT
PR163 close to +
LDRI
LEN
5
6
7
8
LFB
17 3 SI modify *2.2_NC output Cap PC167 PC169
2
PR110 PAD FB 0805
0.1U/25V_0603
330U/2.5V/ESR9
RTFB
1
*1M/F_4_NC 4 SJ13
14
2 1
R1 R2
1
PC171
PR105 *1000P_NC
1
2
3
10K/F_4 PQ39
1
PR106 50
C C
PR118 4.02K/F_4 FDMC8884

RUN_ON RTLEN
22,25,35,37,40 RUN_ON
10_4 PC91
PR117 *100P/50V_4_NC Vo=0.75(R1+R2)/R2

*1M/F_4_NC
Change PR106 to 4.02K for output voltage level 11/17
+1.05V_PCH
Control IC: RT8209A
H/S MOSFET: AON7410(AOS), Qg=6.1nC, Rds(on)=26mohm, PD:3.1W
L/S MOSFET: AON7410(AOS), Qg=14nC, Rds(on)=17.5mohm, PD:3.1W
Inductor: 1.5UH+-20% 9A (10D40F-1R5M)(TTA), DCR=10.5mohm
+3.3V_ALW Output Cap: 1*330U,2.5V(20%,105C,3528),ESR=9mohm
PQ21
FDMC7692
RTLDRI
PC109 PC108
5
6
7
8
*10U/6.3V_NC
0.1U/10V_4
PR119 4
100/F_4
PC106
B B
33P/50V_4
+1.8V_RUN
1
2
3
PR104
Short Jump
RoHS issue TDC : 1.2A
PC105 +1.8V_VCCP 2 1 +1.8V_RUN
0.033U/10V_4
R1 +1.8V_RUN for CPU and PCH

PR116
PC95 14K/F_4
*39P/50V_4_NC PC102 PC111 PC96
*10U/6.3V_8_NC
10U/6.3V_8
0.1U/10V_4
RTLFB
R2
Vo=0.75(R1+R2)/R2 PR115
10K/F_4
A A

PROJECT : UM8B DIS
1A
1.05V_PCH
5 4 3 2 1
5 4 3 2 1
www.bufanxiu.com
D D
Place these CAPs +PWR_SRC

close to MOSFETs
+1.05V_VTT_PWR_SRC
+5V_SUS PC140 PC141 PC58 +1.05V_VTT

2200P/50V 0.1U_25V_0603
10U/25V_1206
Frequency : 300KHz
TDC : 12.64A
8209A_DH
PR74
TP26
8209A_DL
OCP : 18.06A
TP27
10_0603
PC73
8209A_VDD
+1.05V_VTT
1U/6.3V
5
6
7
8
8209A_LX PC80 PR66
2
8209A_BST PQ9
4 FDMC7692 PR59
1U/6.3V 0_0603 Short Jump
PR72
13
2
232K/F 9 PC74
1
2
3
VDDP 0.1U/50V_0603
BST
VDD
1
16 12 8209A_DH
TON UG PL4
C C
1UH +-20% 12A(EPI0603H-1R0M-K01)
4 11 8209A_LX 1 2 +1.05V_VTT_P
32 1.05V_VTT_PWRGD PGOOD PHASE
10/9 PR71 footpin is wrong PR63

5 NC PU4 CS 10
2
close to
5
6
7
8
11.5K/F PR55
RT8209A output Cap
2
15 8 8209A_DL *2.2_0805_NC
22,25,35,36,40 RUN_ON EN/DEM LG +
1
4 SJ4
PR70 PC68 PC138
1
PGND
VOUT
15K/F 8209A_VFB
0.1U/25V_0603
17 3
330U/2.5V/ESR9
GND
PR68 PAD FB PC54

NC
1
2
3
*15K/F_NC PQ6 *2200P/50V_NC PR82
FDMC7672 short pad
14
1 +1.05V_VTT_P
PR75
R1
8.06K/F
PC81
VFB=0.75 *1500P/50V_NC
8209A_VFB
PR76
20K/F
R2 +1.05V_VTT
Control IC: RT8209A
PR83 H/S MOSFET: FDMC7692(Fairchild), Qg=11nC, Rds(on)=14mohm, PD:2.5W
Vo=0.75(R1+R2)/R2 *0_NC L/S MOSFET: FDMC7672(Fairchild), Qg=24nC, Rds(on)=5mohm, PD:2.5W
Output Cap: 1*330U,2.5V(20%,105C,3528),ESR=9mohm
B VTT_SENSE 5 B
A A

PROJECT : UM8B DIS
1A
1.05V_VTT
5 4 3 2 1
5 4 3 2 1
www.bufanxiu.com +PWR_SRC
+5V_SUS PD10
RB501V-40
PR158
2 18208RTBST1
8208RTVDD1
10_6
PC153
+3.3V_SUS PC158 1U/6.3V_4
1U/6.3V_4 PC152 PC154 PC156 PC83 +VCC_GFX_CORE
2200P/50V_4 0.1U/25V_0603 10U/25V_1206 10U/25V_1206
D
8208BST1_1
1
PR154
2 PC155 Fs=220K D
1
PR148
0_6 .1U/25V_4
TDC : 22A
5
6
7
8
9
PU9 OCP:30.8A
13
100K
9
PR150
8208CS1 10 12 8208RTDH1 4 PQ34
VDDP
VDD
BST
2 CS DH
6.81K/F FDMS7692
For cost down 2/1
GFX_+1.1V_EN PR155 0_4 8208RTPG1 4 11 8208RTLX2 PL6
1
2
3
PGOOD PHASE 0.56UH+-20%25A FDUE1040D-H-R36M=P3
PR156 10K/F_4 8208RTEN1 15 8208TON1 PR157
16,25 GFX_ON EN/DEM TON 16 +VCC_GFX_CORE
232K/F_4
17 8 8208RTDL1
PAD DL
2
VOUT
PC157 close to
5
6
7
8
9
5
6
7
8
9
2
0.22U/10V_4 8208RTD11 PR147 +
G0
FB
D0
14 G1 D1 5 output Cap
*2.2_NC PC150 PC146 PC148
2
RT8208A 0805 10U/1206 Change PR144 to PJP14,15 (Space saving )11/16
0.1U/25V_0603
4 4
330U/2.5V/ESR9
7
1
PR153 SJ8
2 1
PR151 180K/F
1
8208VOUT1
8208RTD10 PC151
1
2
3
1
2
3
52.3K/F *1000P_NC
8208RTFB1 10/9 for AMD voltage
1
50 For cost down 2/1
GFX_+1.1V_EN PR159 12K/F PR152
15 GFX_CORE_CNTRL0
60.4K/F
PC159 *100P/50V_4_NC For cost down 2/1
PR95
PQ32 PQ33
C301 AMD spec 11/17
*10K/F_4_NC *FDMS0308S_NC FDMS0308S
*100P_NC
PR149 +VCC_GFX_CORE
*10K/F_4_NC Control IC: RT8208A
close to PR162 Vo=0.75(R1+R2)/R2
RDSon=20m ohm H/S MOSFET: FDMS7692(Fairchild), Qg=11nC, Rds(on)=14mohm, PD:2.5W
C 15 GFX_CORE_CNTRL1 L/S MOSFET: FDMS0310S(Fairchild), Qg=24nC, Rds(on)=5mohm, PD:2.5W C

Output Cap: 2*330U,2.5V(20%,105C,3528),ESR=9mohm
For M96-LP: +VCC_GFX_CORE_M92
GFX_CORE_CNTRL0 GFX_CORE_CNTRL1 +VCC_GFX_CORE
LOW LOW 0.9V +3.3V_SUS
HIGH LOW 0.95V
LOW HIGH 1.0V
1
HIGH HIGH 1.05V(N/A) PR146
100K
+1.0V_GFX_PCIE
TDC : 1.55A
2
For Park-XT: PU8 RT9018B PR143
GFX_+1.8V_EN 1 POK 8 Short Jump
40 GFX_+1.8V_EN GND
GFX_+1.1V_EN 2 VEN 7
ADJ +1.0V_GFX_PCIE_P
GFX_CORE_CNTRL0 GFX_CORE_CNTRL1 +VCC_GFX_CORE 3 VIN VO 6 2 1 +1.0V_GFX_PCIE
4 VPP NC 5
9
LOW LOW 0.9V PR145 +5V_SUS
*100K_NC PR80
9
2
HIGH LOW 0.95V +1.0V_GFX_PCIE_SOURCE 49.9K/F
+1.5V_SUS
PC143
R1
LOW HIGH 1.07V(N/A) PC144 PC145 PC147 0.1U/10V PC142
1U/6.3V 0.1U/10V 0.1U/10V 10U/6.3V_0805
HIGH HIGH 1.12V
1
PR79
196K/F
R2
B
Vout =0.8(1+R1/R2) B
Chagne List: Change from +5V_ALW to +5V_SUS 11/23 =1.0V
For Park-XT: For M96-LP:

PR151:52.3K PR151:90.9K PQ8
PN:CS35232FB10 PN:CS39092FB11 PJP1 POWER_JP FDMC7692 +1.8V_RUN_GFX
PR79:196K PR79:133K 2 1 +1.8V_RUN_GFX_SOURCE 8 3
TDC : 1.254A
+3.3V_ALW
7 2
PN:CS41962FB01 PN:CS41332FB06 6 1 PR58
5 Short Jump
PC57 PC56
*10U/6.3V_0805_NC 0.1U/10V +1.8V_RUN_GFX_P 2 1 +1.8V_RUN_GFX
4
PU3 RT9024PE PC62
100P/50V PR60 PC64 PC63
32 GFX_CORE_PWRGD 4 PGD DRV 5 R1 49.9K/F 10U/6.3V_0805
10U/6.3V_0805
GFX_+1.8V_EN 1 EN
FB 3
GND
+5V_SUS 6 VCC
2
Change from +5V_ALW to +5V_SUS 11/23 PC66 PC72 PR61

0.1U/10V 1U/6.3V
R2 39K/F
A A

PROJECT : UM8B DIS
1A
VGA power
5 4 3 2 1
5 4 3 2 1
www.bufanxiu.com +PWR_SRC
+CPU_PWR_SRC
PC128 PC129
+ +
100U/25V
100U/25V
For Accoustic issue 12/29
+CPU_PWR_SRC
D D
1
PC5 PC6 PC3 PC127
0.1U/25V_0603
2200P/50V
10U/25V/1206
10U/25V/1206
+VCC_CORE
2
Fs=300K
TDC : 48A
5
6
7
8
9
+5V_SUS 3212_DH1
OCP : 64A
4 PQ2
FDMS7692
PL2 +VCC_CORE
1
2
3
1 2 0.36UH+-20%29.8A FDUE1040D-H-R36M=P3
Change footpin 2/1 3212_LX1 2 1+VCC_CORE
PR15 10_0603
3
PC22
PR39 *0_NC 2.2U/6.3V/0603 PR128
*2.4_1206_NC PC31 + PC52 + PC136
5
25,32 HWPG
5
6
7
8
9
5
6
7
8
9
DPRSLPVR
0.1U/25V_0603
330U/2V/ESR6
330U/2V/ESR6
5
25 IMVP_VR_ON
H_PSI#
GND_VHCORE 3212_DL1 4 4
+3.3V_SUS PC123 PR26
PQ26 PQ27 *1000P/50V/0805_NC 10_F_0603
GND_VHCORE FDMS0310S FDMS0310S
1
2
3
1
2
3
5
5
VID0
VID1
VID2
VID3
VID4
VID5
VID6
+VCC_CORE_RTN
PR25
PR23
PR45 PR40
1.91K/F 1.91K/F
2 VR_PWRGD_CLKEN#
+CPU_PWR_SRC
0_0603
PR11
C PR41 C
+1.05V_VTT *100K_NC
41 short pad
40 short pad
3,25 IMVP_PWRGD
CPU_BST1
1
Change PR135 to 5.76K for IMON 12/25 PC8 PC7 PC4 PC126
0.1U/25V_0603
48
47
46
45
44
43
42
39
38
37
2200P/50V
Change PC38 to 68nF 11/23
10U/25V/1206
10U/25V/1206
5 I_MON
2
PSI
DPRSLP
VID0
VID1
VID2
VID3
VID4
VID5
VID6
PH0
PH1
VCC
PC18
PR135 0.22U/25V/0603
2
2
5
6
7
8
9
GND_VHCORE
5.76K/F 1 36 PQ3
PC38 EN BST1
0.068U/16V 2 35 3212_DH1 3212_DH2 4 FDMS7692
PWRGD DRVH1
3 34 3212_LX1
1
IMON SW1 PL3 +VCC_CORE
1
2
3
PC43 PR9 Change PR9 to 100 ohm 11/23 0.36UH+-20%29.8A FDUE1040D-H-R36M=P3
4 CLKEN SWFB1 33
1000P/50V +5V_SUS 3212_LX2 2 1 +VCC_CORE
100/F
5 FBRTN PVCC 32
Change P/N 12/8 PU1
3
PC44 150P/50V ADP3212MNR2G 3212_DL1 PC16
6 FB DRVL1 31
1 2 PR129
7 30 *2.4_1206_NC
COMP PGND
5
6
7
8
9
5
6
7
8
9
PC47 PC39 4.7U/6.3V_0603 PC135 + PC53
PR50 PR42
12P/50V_0402 3212_DL2
0.1U/25V_0603
330U/2V/ESR6
8 TRDET DRVL2 29
1.65K/F 25.5K/F 3212_DL2 4 4
220P/50V PR43 PR7 Change PR7 to 100 ohm 11/23 PC124 PR27
9 VARFR SWFB2 28
5.1K 100/F PQ29 PQ28 *1000P/50V/0805_NC 10_F_0603
Change PC47 to 220P and PR42 to 25.5k 11/12 10 27 3212_LX2 FDMS0310S FDMS0310S
1
2
3
1
2
3
PR44 VRTT SW2
11 26 3212_DH2
+5V_SUS TTSNS DRVH2
7.32K/F 12 25
CSCOMP
AGND BST2
CSSUM
SWFB3
CSREF
GND_VHCORE
PWM3
1
RAMP
LLINE
49 PC15 Del one for cost saving 11/10

IREF
RPM
OD3
ILIM
GND
RT
0.22U/25V/0603
PR13
0_0603
13
14
15
16
17
18
19
20
21
22
23
24
B B
2
CPU_BST2
PR49 PR48
short pad short pad
PR24 +VCC_CORE
2.05K/F Control IC: ADP3212
H/S MOSFET: FDMS7692(Fairchild), Qg=11nC, Rds(on)=14mohm, PD:2.5W
Change P/N 2/2 L/S MOSFET: FDMS0310S(Fairchild), Qg=84nC, Rds(on)=2.7mohm, PD:2.5W
PR37 PR33 Inductor: 0.36UH +-20% 45A(MPO104F-R36H1)(Delta), DCR=0.89mohm
80.6K/F 162K/F PR31 Output Cap: 4*330U 2V(20%,ESR=6,7343,H1.9)
1000P/50V
PR51 649K/F PR16 PR133

*27.4/F_NC PC26 PC27 73.2K/F 220K/NTC/6
820P/50V 1000P/50V/X7R
VCCSENSE
VCCSENSE 5
VSSSENSE
VSSSENSE 5
PC35
GND_VHCORE
GND_VHCORE
GND_VHCORE
PR52 PR17 191K/F Place close to

*27.4/F_NC PR29
Phase1 output
1K/F
PR12 124K/F inductor.
GND_VHCORE
PR34 PR14 124K/F

Change PR53 , PR54 to NC 11/23 47.5K/F
+CPU_PWR_SRC
Change to 124K for LL 10/22

+VCC_CORE
PR53 *100_0603_NC
+VCC_CORE_RTN
PR54 *100_0603_NC
NOTE: PC30
De-populate PR164 and PR165 1U/6.3V
A A
when CPU is present SJ6
1 1 2 2
GND_VHCORE
GND_VHCORE

PROJECT : UM8B DIS
1A
CPU_CORE
5 4 3 2 1
1 2 3 4 5
+5V_ALW +15V_ALW
www.bufanxiu.com
+5V_SUS PQ19 +5V_RUN
+5V_RUN
TDC : 5A +5V_ALW +15V_ALW +3.3V_ALW +3.3V_SUS
+3.3V_SUS
TDC : 0.26A
IRF8707TRPBF PQ17
9 SI2304BDS-T1-E3
8 3
7 2 PR98 PR123 3 1
PR111 6 1 100K 100K
PR97 100K 5
100K PC89
2
PC94 SUS_3.3V_ENABLE 0.1U
4
A A
RUN_ENABLE_5V 0.1U 603
3
603 25
3
25 SUS_ON_3.3V# 5
RUN_ON# 5 PQ15A
6
2N7002DW-7-F
4
6
25,34 SUS_ON 2
4
2 PQ16A PC101 PQ15B PC104
22,25,35,36,37 RUN_ON
2N7002DW-7-F 4700P 2N7002DW-7-F C417 4700P
1
1 C420 25 *100P_NC 25
PQ16B *100P_NC
2N7002DW-7-F
close to PR128
close to PR126
EE add this portion for power
sequence control +5V_ALW
+1.5V_RUN
PR144
*100K_NC TDC : 6.65A
+15V_ALW +1.5V_SUS PQ11 +1.5V_RUN
GFX_+1.8V_EN# FDMS7670
9
3
8 3
B R173 *10_4_NC 2 7 2 B
38 GFX_+1.8V_EN
PR67 6 1
PQ41 100K 5
1
*2N7002W-7-F_NC
PC77
4
RUN_ENABLE_1.5V 0.1U
603
3
25
RUN_ON# R174 10_4 RUN_ON_1 2
PQ12
1
2N7002W-7-F PC75
0.047U
25
+3.3V_RUN
TDC : 4.95A
+5V_RUN
+15V_ALW +3.3V_ALW PQ20 +3.3V_RUN
IRF8707TRPBF
9
2
8 3
7 2 PR341
6 1 *47_NC
PR112 5 0603
100K
3 1
PC97
4
C C
0.1U
RUN_ENABLE_3.3V 603 RUN_ON# 2
25
3
PQ40
1
RUN_ON# 2 *2N7002W-7-F_NC
PC103
PQ18 4700P
1
2N7002W-7-F 25
Discharge path 11/17
D D

PROJECT : UM8B DIS
1A
Run Power Switch
1 2 3 4 5
A B C D E
www.bufanxiu.com
+3.3V_ALW
2
PC121 1 2 2200P 50
1 1
PC122 1 2 1000P 50 +3.3V_ALW
PD3 PD2 PD1
3
PC120 *DA204U_NC *DA204U_NC *DA204U_NC
1 2 0.1U 25 +VCHGR
2
603
PR5
JBAT1 10K
BATT1+ 1 SMBUS Address 16
2 PR3 100
Adress : 16H
1
BATT2+
SMB_CLK 3 1 2 SMBCLK0 25,33
SMB_DAT 4 1 2 SMBDAT0 25,33
5 PR2 100 PR1 100
17 BATT_PRES#
SYSPRES# 6 1 2 PBAT_PRES# 25
BATT_VOLT 7
BATT1- 8
BATT2- 9
C144CU-109A8-L
+5V_ALW +3.3V_ALW
Chaneg the ESD voltage level to

+3.3V_ALW for EE demand 0902
2
PR138 PR137
*0_0805_NC short pad
2 2
+3.3V_ALW
1
1
1
PR142
PD9 2.2K
DA204U
PQ31
2
FDV301N_NL
PR140 33
DOCK_PSID 3 1 1 2 PS_ID 25
+5V_ALW
2
PR139
1
100K/F PR141 10K

PC137 1 2
100P/50V
2
1
PD8
3
*BAS316_NC
2
2
1
1
PQ30
PR136 MMST3904-7-F
15K/F
3 3
2
PC51
1 2 0.1U_25V_0603
PC48 1 2 1000P/50V
PC49 1 2 2200P/50V
NC 11/25 PQ5
+DC_IN FDS4435BZ +DC_IN_SS Chaneg PR1155 10K +- 1% to 10K + - 5%. 0902
CN1 FL1
BLM41PG600SN1L 1 8
5 +DCIN_JACK 2 7
Adapter1+
3 6
1
4 PC37 5
Adapter2+
1
1
0.1U/25V_0603 PC40 PC42 PR35
3 1U/25V_0805 240K PC21 PR8 PC19 PC17 PC13
2
Adapter1- *0.1U/25V_0603_NC 0.01U/25V 10K_0603 0.1U/25V_0603 10U/25V_1206

2
2
2
*0.1U/25V_0603_NC
2
Adapter2-
2
1 DOCK_PSID
PSID
BATTCON3_2 NC 11/25
2
PC50 PRV1
4 *100P/50V_NC *VZ0603M260APT_NC PR30 4
47K
1
need update the footprint for DC-IN at PT

PROJECT : UM8B DIS
1A
Batt & DC-IN
A B C D E
5 4 3 2 1
www.bufanxiu.com VER : 1A
Adapter
D D
PWR_SRC
Charger
ISL88731A
Battery
Richtek Richtek Richtek Richtek Richtek On
RT8206B RT8207A LDO RT8209A RT8204B RT8208A ADP3212MNR2G
IMVP_VR_ON
+5V_ALW SUS_ON SUS_ON RUN_ON
+1.5V_SUS
+15V_ALW +3.3V_ALW +5V_SUS +1.5V_SUS +VCC_CORE
+0.75V_DDR_VTT
C C
RUN_ON RUN_ON
GFX_ON
+1.05V_PCH +1.1V_VTT
+VCC_GFX_CORE
IR AOS AOS AOS Richtek

IR8707TRPBF AO3404 AO4468 AO3404 RT9018B
RUN_ON SUS_ON RUN_ON RUN_ON GFX_ON
+3.3V_RUN +3.3V_SUS +5V_RUN +1.5V_RUN +1.0V_GFX_PCIE
B B
Richtek Richtek
RT9024PE RT8204B
RUN_ON RUN_ON
+1.8V_RUN_GFX +1.8V_RUN
A A

PROJECT : UM8B DIS
1A
Schematic Block Diagram1
5 4 3 2 1
1 2 3 4 5 6 7 8
+3.3V_SUS
www.bufanxiu.com
+3.3V_RUN
2.2K 2.2K
2.2K 2.2K
+3.3V_RUN
H14 PCH_SMBCLK MEM_SCLK 30
7002 MINICARD-WLAN
C8 PCH_SMBDATA MEM_SDATA 32 /WWAN
7002
A A
+3.3V_RUN
SO-DIMM
+3.3V_SUS
PCH
2.2K 2.2K
G6 SMB_CLK_ME0
G8 SMB_DATA_ME0
+3.3V_SUS
+3.3V_ALW
B B
10K 10K
2.2K 2.2K
+3.3V_SUS
E10 SMB_CLK_ME1 SMBCLK1 115
7002
G12 SMB_DATA_ME1 SMBDAT1 116 EC
7002
+3.3V_ALW
+3.3V_SUS
2.2K 2.2K
110 SMBCLK0 9
111 SMBDAT0 10 CHARGER
100
4
+3.3V_ALW 3 BATTERY
C C
+3.3V_SUS 100
SIO 10K 10K 2.2K 2.2K
ITE8502 +3.3V_SUS
115 SMBCLK1 SMB_CLK_ME1 115
7002
116 SMBDAT1 SMB_DATA_ME1 116 PCH
7002
+3.3V_SUS
+3.3V_RUN
32
31 CLOCK
10K 10K
117 SMBCLK2 8
THERMAL
118 SMBDAT2 7 (EMC1422)
only for UM8B DIS

D D
8
GPU THERMAL
7

PROJECT : UM8B DIS
1A
SMBUS BLOCK
1 2 3 4 5 6 7 8
5 4 3 2 1
www.bufanxiu.com
UM8B_ X00 Power On Timing(BATTERY MODE BY SOFTWARE SETUP, W/O ADAPTOR)
D D
+PWR_SRC
+5V_ALW
>150ms
SYS_PWR_SW#
+3.3V_ALW_ON T6=544us
+3.3V_ALW T7=884ms
680ms(TBC)
ALW_ON T8=105.6ms
>1ms
SUS_ON
T9=126ms
+15V_ALW
T11=304us
+3.3V_SUS
T10=648us
+5V_SUS
T12=3.22ms
+1.5V_SUS
T14=15.4ms
1.5V_DDR_PWRGD
T13=20.2ms
>10ms 20ms T15=104.8ms
C RSMRST# DE-BOUNCE 16 ms (PCH) C
X 50ms(TBC)
5ms
PM_PWRBTN#_R
0ms
SIO_EXT_SMI#
0ms
SIO_EXT_SCI#
>100ms T16=97.6ms
SIO_SLP_S5#
T17=99.2ms
>60us
SIO_SLP_S3#
T18=6.76ms
12ms(UMA) 20ms(DIS)
RUN_ON
T25=18us
+0.75V_DDR_VTT T23=272us
+1.05V_VTT
T20=360us
+3.3V_RUN
T19=520us
+5V_RUN
T24=1.52ms
+1.05V_PCH
T22=1.688ms
+1.5V_RUN
B T21=1.832ms B
+1.8V_RUN
T26=5ms
0ms T27=1.196ms
GFX_ON(DIS)
T28=5.912ms
+VCC_GFX_CORE
T29=4.856ms
+1.0V_GFX_PCIE
+1.8V_RUN_GFX
T30=19.52ms
<20ms T31=24ns
GFX_CORE_PWRGD
5ms
HWPG T32=139ms
100ms
IMVP_VR_ON T33=1.324ms
<3ms
+VCC_CORE
5ms
IMVP_PWRGD
T34=413.6us
10us<T<100us T37=16.4ms
VR_PWRGD_CLKEN# 5ms (IMVP_PWRGO to ECPWROK)
3ms<T<20ms T36=8.396ms
ECPWROK
A A
USB_RIGHT_EN#
USB_RIGHT_EN# T38=40.04ms
>1ms
PM_DRAM_PWRGD
CLK_CPU_BCLK
T39=1.064ms Quanta Computer Inc.
1ms>T>100ms T40=72.44ms
H_PWRGOOD PROJECT : UM8 UMA
1ms> T41=1.746ms Size Document Number Rev
1A
PLTRST# POWER SEQUENCE
5 4 3 2 1
5 4 3 2 1
www.bufanxiu.com
(1) AC : DC_IN -> DC_IN_SS -> +PWR_SRC
Power Design Block Diagram (2)
Bat : +VCHGR -> +PWR_SRC,+5V_ALW
POWER_SW_INT#
+PWR_SRC (3) 3.3V_ALW_ON,
(1) (1) (1) (4) +3.3V_ALW, ALW_ON
+DC_IN +DC_IN_SS +PWR_SRC (5) SUS_ON, +5V_POK
Power Jack LDO
SYSTEM POWER (6) +5V_SUS, +3.3V_SUS, +1.5V_SUS,
+3.3V_ALW 1.5V_DDR_PWRGD, +15V_ALW
Adapter input +3.3V_ALW_ON(From (4)
AO4435L AO4435L 3VALW ON POWER LOGIC) +5V_ALW +5V_ALW +15V_ALW (7) RSMRST#
(3) (1) (4)
Diode & Cap (6)
RT8206 VR (8) PM_PWRBTN#
D D
SUS_ON +5V_SUS Page 34
Charger (5) (6) (5) SUS_ON (9) SIO_SLP_S5#, SIO_SLP_S4#, SIO_SLP_S3#
Page 34 (10) RUN_ON
ISL88731 (11) +0.75V_DDR_VTT
Page 33 (12) +5V_RUN, +3.3V_RUN,
+5V_ALW , +1.5V_RUN, +1.05V_VTT,
+1.05V_PCH and +1.05VPCH_PWRGD,+1.05VTT_PWRGD
+VCHGR (1) +1.5V_SUS (13) GFX_ON
(1) VRAM DDR3 POWER (6)
(14) +VCC_GFX_CORE, +1.0V_GFX_PCIE,
+PWR_SRC (5) +5V_POK VR 1.5V_DDR_PWRGD +1.8V_RUN_GFX and GFX_CORE_PWRGD
Battery (6)
RT8207 (15) HWPG
(10) RUN_ON (16) H_VTTPWRGD
SI4835 +0.75V_DDR_VTT
Page 35 LDO (11) (17) IMVP_VR_ON
(18) +VCC_CORE, IMVP_PWRGD,
(19) VR_PWRGD_CLKEN#
+5V_SUS (20) ECPWORK
(21) PM_DRAM_PWRGD
+1.05V_PCH
PCH CORE POWER (22) CLK_CPU_BCLK(PCH to CPU)
1.05VPCH_PWRGD (12) (23) H_PWRGOOD
(10) RUN_ON RT8204 VR
(24) PLTRST#(PCI_PLTRST#)
+3.3V_ALW +1.8V_RUN
Page 36
C C
(4) +3.3V_ALW AO3404 +3.3V_SUS

(6)
+5V_SUS
Page 40
(14)
+VCC_GFX_CORE
(5) SUS_ON GFX CORE POWER +5V_ALW (4)
VR
(13) GFX_ON +VCC_GFX_CORE_POK
GFX PCIE POWER +1.0V_GFX_PCIE
RT8208 +5V_ALW (4)
(6) +5V_SUS AO4468 +5V_RUN
(12) RT9018B VR
+1.5V_SUS +1.0V_GFX_PCIE_POK
Page 40 GFX POWER +1.8V_RUN_GFX
Page 38 Page 38
(10) RUN_ON (4) +3.3V_ALW VR GFX_CORE_PWRGD (11)
RT9024PE
Page 38
(4) +3.3V_ALW FDS8880 +3.3V_RUN (12)

Page 40
(10) RUN_ON
+5V_SUS +5V_SUS (4)
CPU CORE POWER CPU Memory Control +1.05V_VTT (12)

B
+VCC_CORE & I/O Power B
(16) IMVP_VR_ON ADP3212MNR2G VR (10) RUN_ON RT8209 VR 1.05V_VTT_PWRGD

(12)
IMVP_PWRGD
TWO PHASE (18) Page 49
SOLUTION VR_PWRGD_CLKEN#
Reset Circuit
(19) Page 42 (18)
Page 39
+1.5V_RUN (18) VR_PWRGD_CLKEN# CK_PWRGD_R
(6) +1.5V_SUS FDMS7670 (12) Inverter
Page 40
(18)
(10) RUN_ON CK_PWRGD_R
CLK GEN
Page 15
1.05V_VTT_PWRGD
(12)
(2) 1.05VPCH_PWRGD HWPG (15)
(12)
POWER_SW_INT#
(20) SIO_SLP_S4# (9)
ALW_ON To control DIMM VREF (16)
(4) ECPOWRK
SUS_ON (11) GFX_CORE_PWRGD H_VTTPWRGD
EC (5) PM_DRAM_PWRGD (21) Wire AND
PCH
IT8502 PM_PWRBTN# (8) 1.5V_DDR_PWRGD
CLK_CPU_BCLK (22) (6)
RSMRST# (7) CPU
H_PWRGOOD (23)
Page 7~11
A SIO_SLP_S5# (9) A
PLTRST#(PCI_PLTRST#) Page 3~6
(24)
SIO_SLP_S3# (9)
Page 25 RUN_ON (15) H_VTTPWRGD

(10)
(15) HWPG
IMVP_VR_ON
(17)
(17) IMVP_PWRGD GFX_ON PROJECT : UM8B DIS
(13) Size Document Number Rev
1A
POWER SEQUENCE BLOCK
5 4 3 2 1
1 2 3 4 5 6 7 8
H11
*H-C295D110P2_NC
1
H-C295D110P2
H1
*H-C295D110P2_NC
H-C295D110P2
H3
*H-C295D110P2_NC
H-C295D110P2
H4
*H-C295D110P2_NC
H-C295D110P2
H8
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*H-C295D110P2_NC
H-C295D110P2
H19
*H-C295D110P2_NC
H-C295D110P2
H22
*H-C295I110D110P2_NC
H-C295I110D110P2
1
A A
H2 H24
*h-um8b-2_NC *H-C315D126P2_NC
h-um8b-2 H-C315D126P2 H14 H13
H7 H6 *H-C165D165N_NC *H-C165D165N_NC
*H-C165D165N_NC *H-C165D165N_NC H-C165D165N H-C165D165N
1 H-C165D165N H-C165D165N
1
1
1
H12 H25
*H-TC315BC126D126P2_NC *H-C315D126P2_NC
H-TC315BC126D126P2 H-C315D126P2
CPU
1
H18 H10
*H-C165D165N_NC *H-C165D165N_NC
H-C165D165N H-C165D165N
B B
H17 H15
1
*H-TC236BE315X315D110P2_NC *H-TC236BE315X315D110P2_NC
H-TC236BE315X315D110P2 H-TC236BE315X315D110P2
1
VGA
H26 H27
*H-TC236BE315X295D110P2_NC *H-TC236BE315X295D110P2_NC
H-TC236BE315X295D110P2 H-TC236BE315X295D110P2
1
C C
H9 H23
H20 *H-C295D181P2_NC *h-tc122i122bc197d122p2_NC
*h-um8b-1_NC H-C295D181P2 h-tc122i122bc197d122p2
h-um8b-1
1
1
1
6, 7 19
H5
*H-C295D295N_NC H16 H28 H21 H29
H-C295D295N HDD NUTE HDD NUTE PCH NUTE BT NUTE
H-TE315X335BC236D161P2 H-TE315X335BC236D161P2 H-C236D126P2 H-C236D142P2
1
D NUTE need add footprint in this D

PROJECT : UM8B DIS
1A
PAD&SCREW
1 2 3 4 5 6 7 8
5 4 3 2 1
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UM8B_ X00 Power On Timing(BATTERY MODE BY SOFTWARE SETUP, W/O ADAPTOR)
D D
+PWR_SRC
+5V_ALW
>150ms
SYS_PWR_SW#
+3.3V_ALW_ON T6=560us
+3.3V_ALW T7=200ms
680ms(TBC)
ALW_ON T8=68.8ms
>1ms
SUS_ON
T9=124ms
+15V_ALW
T11=304us
+3.3V_SUS
T10=680us
+5V_SUS
T12=3.22ms
+1.5V_SUS
T14=15.2ms
1.5V_DDR_PWRGD
T13=20ms
>10ms 20ms T15=104.8ms
C RSMRST# DE-BOUNCE 16 ms (PCH) C
X 50ms(TBC)
5ms
PM_PWRBTN#_R
0ms
SIO_EXT_SMI#
0ms
SIO_EXT_SCI#
>100ms T16=97.6ms
SIO_SLP_S5#
T17=99.2ms
>60us
SIO_SLP_S3#
T18=7.04ms
12ms(UMA) 20ms(DIS)
RUN_ON
T25=18.2us
+0.75V_DDR_VTT T23=284us
+1.05V_VTT
T20=368us
+3.3V_RUN
T19=504us
+5V_RUN
T24=1.56ms
+1.05V_PCH
T22=1.696ms
+1.5V_RUN
B T21=1.88ms B
+1.8V_RUN
T26=5.072ms
0ms T27=1.196ms
GFX_ON(DIS)
T28=5.832ms
+VCC_GFX_CORE
T29=4.872ms
+1.0V_GFX_PCIE
+1.8V_RUN_GFX
T30=19.52ms
<20ms T31=24ns
GFX_CORE_PWRGD
5ms
HWPG T32=101.1ms
100ms
IMVP_VR_ON T33=1.338ms
<3ms
+VCC_CORE
5ms
IMVP_PWRGD
T34=403.6us
10us<T<100us T37=13.48ms
VR_PWRGD_CLKEN# 5ms (IMVP_PWRGO to ECPWROK)
3ms<T<20ms T36=5.456ms
ECPWROK
A A
USB_RIGHT_EN#
USB_RIGHT_EN# T38=40.08ms
>1ms
PM_DRAM_PWRGD
CLK_CPU_BCLK
T39=1.036ms Quanta Computer Inc.
1ms>T>100ms T40=74.64ms
H_PWRGOOD PROJECT : UM8 UMA
1ms> T41=1.746ms Size Document Number Rev
1A
PLTRST# POWER SEQUENCE
5 4 3 2 1

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1 2 3 4 5 6 7 8

LANE5 Card Reader BT Stackup

Quanta Computer Inc.

Place each 0.1uF cap close to pin

Check CLK P/N and footprint

+3.3V_RUN R196 10K 16 10 CLK_BUF_DREFSSCLKP_R RP7 2 1 0X2

CPU_SEL CPU0/1=133MHz CPU0/1=100MHz

SLG: SLG8SP590VTR Seligo QPN: AL8SP590000

E19 FDI_TX#[5] PEG_RX[8] F33 PEG_RXP7 14 PREQ# AP27

TDI AT29 XDP_TDI TP22 B

Discrete Only JTAG MAPPING

DG(V1.0),P79: should be tied to GND Q12

if these signals are left floating, R98

H_THERM 2 10 of 1.1K ± (to VDDQ)/3K ± (to GND)

FDI_FSYNC[0], FDI_FSYNC[1],FDI_LSYN[0],FDI_LSYN[1] *MMST3904-7-F_NC

Quanta Computer Inc.

U14C 13 M_B_DQ[0..63] U14D

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY B

12 M_A_BS#0 AC3 SA_BS[0] 13 M_B_BS#0 AB1 SB_BS[0]

12 M_A_CAS# AE1 SA_CAS# 13 M_B_CAS# AC5 SB_CAS#

Channel A DQ[15,32,48,54], DM[5]

Name different with power

1.1V RAIL POWER

AC34 VCC32 VTT0_32 A11 AJ18 VAXG31 VDDQ7 AB4

AC32 VCC34 AH21 VAXG33 VDDQ9 W7

B AC27 AB10 C84 22U/6.3V_8/X5R P1 B

AA31 VCC45 VTT0_42 J11 Clarksfield VTT=1.1V VTT1_47

PEG & DMI

VCC57 VID[4] VID4 39 VTT1_56 VTT1_68

VCC73 ISENSE I_MON 39

Quanta Computer Inc.

AUBURNDALE/CLARKSFIELD PROCESSOR (GND)

VSS76 VSS156 VSS_NCTF3 CFG4 R74 *3.01K/F_4_NC

Digital Display Interface

R245 1 2 *1K_NC PCH_GPIO33

R208 *1K_NC/ SPI_SI

IBEX PEAK-M (GND)

From CLK BUFFER

R273 *0_NC PCH_PWROK K5 PWROK SLP_M#

IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)

Clock and Miscellaneous

Quanta Computer Inc.

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

63 DM3 DQ42 157 13 VSS5

C80 0.1U/ 10V/X7R R5

C89 0.1U/ 10V/X7R

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

63 DM3 DQ42 157 13 VSS5

Place these Caps near So-Dimm1.

7343 2.5 R11 *0_NC R9 *0_NC

+3.3V_RUN C107 2.2U/ 6.3V/X5R 16

PEG_TXP1 Y35 W33 PEG_RXP1_C C237 0.1U/10V/X5R_4 PEG_RXP1

PEG_TXP2 W38 U33 PEG_RXP2_C C248 0.1U/10V/X5R_4 PEG_RXP2

PEG_TXP3 V35 U30 PEG_RXP3_C C215 0.1U/10V/X5R_4 PEG_RXP3

PEG_TXP4 U38 T33 PEG_RXP4_C C259 0.1U/10V/X5R_4 PEG_RXP4

PCI EXPRESS INTERFACE

PEG_TXP6 R38 P33 PEG_RXP6_C C264 0.1U/10V/X5R_4 PEG_RXP6

PEG_TXP7 P35 P30 PEG_RXP7_C C266 0.1U/10V/X5R_4 PEG_RXP7

PEG_TXP8 N38 N33 PEG_RXP8_C C270 0.1U/10V/X5R_4 PEG_RXP8

PEG_TXP9 M35 N30 PEG_RXP9_C C262 0.1U/10V/X5R_4 PEG_RXP9

PEG_TXP10 L38 L33 PEG_RXP10_C C277 0.1U/10V/X5R_4 PEG_RXP10

7343 2.5 R11 0_NC R9 0_NC

C3513, C3514, R3519 and R3515 51.1/F_4_NC 51.1/F_4_NC

0.1U/10V/X7R_4_Park 0.1U/10V/X7R_4_Park 0.1U/10V/X7R_4_Park 0.1U/10V/X7R_4_Park 0.1U/10V/X7R_4_Park 0.1U/10V/X7R_4_Park 0.1U/10V/X7R_4_Park 0.1U/10V/X7R_4_Park

R294 C433 FDC658AP_NC 0.1U/Y5V_NC LCD_A1- C440 1 2 *3.3P_NC/NPO

100K_NC 0.1U/Y5V_NC 603 LCD_A2- C442 1 2 *3.3P_NC/NPO