MiCOM P642,

P643 & P645

Transformer Protection Relay
Software version 02B
Hardware suffix J (P642)
Hardware suffix K (P643/5)

Technical Data Sheet

P64x/EN TDS/A21

This document should be read alongside the Technical Manual

Note: The technical manual for this device gives instructions for its installation, commissioning, and
operation. However, the manual cannot cover all conceivable circumstances or include detailed
information on all topics. In the event of questions or specific problems, do not take any action
without proper authorization. Contact the appropriate AREVA technical sales office and request
the necessary information.

Any agreements, commitments, and legal relationships and any obligations on the part of AREVA
including settlements of warranties, result solely from the applicable purchase contract, which is
not affected by the contents of the technical manual.

This device MUST NOT be modified. If any modification is made without the express permission of
AREVA, it will invalidate the warranty, and may render the product unsafe.

The AREVA logo and any alternative version thereof are trademarks and service marks of AREVA.

MiCOM is a registered trademark of AREVA. All trade names or trademarks mentioned herein whether registered
or not, are the property of their owners.

This manual is provided for informational use only and is subject to change without notice.

© 2009, AREVA. All rights reserved.


Figure 1:
Customer benefits
• Universal IED for all
transformer (or reactor)
configurations
• Protection, control,
monitoring, measurements
and recording in-one device
• Backup and logging of
through faults
• Simple to specify, set, and
commission
• Programmable function keys
AREVA T&D
P R OT E C T I O N
MiCOM P642, P643 and P645
Advanced Transformer Protection
and Control
Transformers are high capital cost assets in
electrical power systems. Elimination of all
electrical and mechanical stresses, although
desirable to preserve transformer life, is
impractical. Adaptive techniques to measure
and alarm (or trip) in such instances, and
advise on cumulative service duty, can help to
schedule preventive maintenance – before a
costly failure occurs.
Internal faults are a risk for all transformers,
Front view of P645 with short-circuits dissipating the highest
localized energy. Unless cleared quickly, the
possibility to rewind windings reduces, and
core damage may become irreparable.
The MiCOM P642, P643 and P645 address all these
issues - preserving service life, and offering fast protection
for transformer faults. Hosted on an advanced IED
platform, the P64x incorporates differential, REF, thermal,
and overfluxing protection, plus backup protection for
uncleared external faults. Model variants cover two and
three winding transformers (including autotransformers),
with up to 5 sets of three-phase CT inputs. Large CT
counts are common in ring bus/mesh corner applications,
where the P64x summates currents to create each total
winding current, easing application of backup protection.
Backup overcurrent can be directionalized, where the
user includes the optional 3-phase VT input in their
chosen model.
KEY FEATURES
> High-speed transformer differential protection
• Simple setting – wizard requires only nameplate data
> Restricted earth fault (REF) boosts trip sensitivity
> Voltage, frequency, thermal and overfluxing elements
> CT, VT, trip circuit and self-supervision:
• Patented CT supervision ensures no spurious trip for CT or wiring failures
> Integrated backup overcurrent per winding
> Readily interfaces to multiple automation protocols, including IEC 61850
 APPLICATION As well as transformer protection, the P64x range may
be applied to other unit applications, such as reactor
and motor.
The MiCOM P642 is intended for two-winding
transformer applications, with one set of three phase
The MiCOM P64x series is supplied with a full suite of
CTs per winding. The P643 covers up to 3 bias inputs
protection and control functions as standard. The
(three CT sets) - either a three winding application, or
configuration column of the menu is used to control
two-winding with dual CTs on one side. Where 4 or 5
which functions the user requires in the intended
feeding connections to the protected transformer exist,
application, and which may be disabled. Disabled
the P645 offers five bias input sets. All models have a
functions are completely removed from the menu, to
single-phase VT input, mainly for overfluxing
simplify setting. Differential elements have an inbuilt
application, and the P643 and P645 allow an additional
configuration wizard, to avoid settings errors.
3-phase VT input to be connected. This allows
overcurrent backup to be directionalised, and expands
the measurement and recording analog channels
available.

ANSI IEC61850 FEATURES P642 P643 P645

Number of bias inputs (3-phase CT sets) 2 3 5

Number of residual/star-point CTs 2 3 3
Single phase VT input 1 1 1
Additional 3-phase VT (•) (•)
87T LzdPDIF Transformer differential protection • • •
64 RefPDIF Restricted earth fault protection (windings) 2 3 3
49 ThmPTTR Thermal overload • • •
24 PVPH V/Hz overfluxing 1 1 (2) 1 (2)
LoL Loss of life • • •
Thru Through fault monitoring • • •
RTD RtfPTTR RTDs x 10 PT100 temperature probes (•) (•) (•)
CLIO PTUC Current loop transducer I/O (4 input / 4 output) (•) (•) (•)
50/51 OcpPTOC Overcurrent protection per winding • • •
50N/51N Ef_PTOC Derived or measured standby earth fault per winding • • •
46 NgcPTOC Negative phase sequence o/c per winding • • •
67/67N RDIR Directionalized o/c, SBEF, and NPS elements (•) (•)
(with optional 3Φ VT addition)
50BF RBRF Breaker fail protection (number of breakers) 2 3 5
27/59/59N PTUV/PTOV Undervoltage, overvoltage and residual VN> (•) (•)
(with optional 3Φ VT addition)
81U/81O PTUF/PTOF Under/overfrequency (•) (•)
(with optional 3Φ VT addition)
VTS VT Supervision (•) (•)
CTS Differential CTS (patented) • • •
TCS Trip circuit supervision • • •
IRIG-B IRIG-B time synchronizing input (•) (•) (•)
OptGGIO Optocoupled logic inputs 8…12 16…24 16…24
RlyGGIO Relay output contacts 8…12 16…24 16…24
FnkGGIO Function keys 10 10
LedGGIO Programmable LEDs (R-red, G-green, Y-yellow) 8R 18R/G/Y 18R/G/Y
PSL Graphical programmable scheme logic • • •
Alternative setting groups 4 4 4
SOE Sequence of event records • • •
Fault waveform disturbance records • • •
(Key: brackets (•) denote optional features)

2>3
 I

I
FUNCTIONAL OVERVIEW

for your valuable asset

Fast, Sensitive protection
I

Figure 2: System Overview of the P64x series – example 3 winding, 4 bias application
I

Transformer Differential
Protection P64x

1. The three-phase VT input is optional.

2. The 27, 59, 59N and VTS functions require the three-phase VT input.
3. The frequency required by the 81 function is obtained from any analog signal, but the voltage signals have priority over the current signals.
 MAIN PROTECTION
Idiff

> 87T Transformer Differential

Is-HS2
I diff = I 1 + I 2 + I 3 + I 4 + I 5 The algorithm has a triple slope percentage bias
restraint, as shown in Figure 3. An internal fault will
generate differential current. The bias current is that
which merely flows through the protected unit, as a
Is-HS1 load or through-fed external fault. The initial
characteristic is flat, for ease of commissioning, rising
RESTRAIN
K2
then to bias slope (k1). K1 is a low slope for sensitivity
TRIP to faults whilst allowing for mismatch when the power
transformer is at the limits of its tapchanger range, in
addition to any current transformer ratio errors. At
Is-CTS currents above rated, extra errors may be gradually
K1 K-cctfail
Is1 introduced as a result of CT saturation, hence the bias
Is-cctfail slope is increased to k2. The P64x incorporates
Is2 Ibias transient bias and this combined with the k2 bias
ensures that CT knee point voltage requirements are
I1 + I 2 + I 3 + I 4 + I 5 minimized.
I bias =
2
Energization of a transformer causes magnetising
Figure 3: Biased differential protection (87T) inrush current to flow in one winding only, and the
differential elements may need stabilizing whilst the
inrush persists. A proven second harmonic current
ratio scheme is used. The differential protection may
also be restrained when the transformer is overfluxed
so that an instantaneous trip is not issued for transient
overfluxing. Overfluxing restraint is conditioned by the
percentage of fifth harmonic current present. A high
set instantaneous differential element, not subject to
A
harmonic restraint, is provided to ensure rapid
clearance of high current faults.
B
The differential protection setting configuration utility
requires only known data – that which resides on the
C
transformer rating plate, the CT rating plate, and
information on any in-zone earthing transformer.

Figure 4: Typical magnetizing inrush waveform – > REF: Restricted Earth (Ground) Fault
showing harmonic distortion
Restricted earth fault protection is included to cover a
larger percentage of the transformer windings than
might be possible with the main differential elements. A
separate element per winding is provided (P642: HV
and LV. P643/P645: HV, LV, and if required, the TV
C C tertiary too).

B B
Figure 5 shows a typical restricted earth fault
A A application. Biased REF is used, to avoid the need for
0 ... x ... 1 any stabilizing resistor or varistor/Metrosil. REF
elements operate independently of inrush detection,
87T
potentially offering faster tripping for low or moderate
fault currents, in addition to enhanced sensitivity.

Σ{IA, IB, IC}

IY
REF

Figure 5:
Restricted earth fault application

4>5
> Thermal Overload
All models offer thermal overload protection, with the
extent of protection being the choice of the customer.
The most simple application employs I²t characteristic.
Time constants are set, such that the thermal model
can follow the correct exponential heating and cooling
profile, replicating the winding hotspot temperature.
Alarm and trip thresholds are available as outputs.
To enhance the thermal replica, ambient and/or top-oil
temperature compensation may be applied. This is
achieved by fitting the RTD board option, and
positioning the PT100 probes appropriately (outdoors,
or within the transformer tank). Additionally, alarm and
trip setpoints can be applied for any probe input,
should an absolute measured temperature at the
probe location be of interest. Ten independent probe
inputs are available, making radiator pump and fan
control an additional possibility using the relay’s
programmable scheme logic (PSL).
Thermal overload protection is a closely-related
companion function to the Loss of Life monitoring
feature described later.
> V/Hz Overfluxing Protection
The single phase voltage input may be connected ph-
ph or ph-neutral and is provided to enable overfluxing
detection. Alarm and tripping characteristics, which
are based on a measurement of the voltage/frequency
ratio, are provided. The alarm is definite time delayed
whilst the trip characteristic may be applied with up to
four definite time (DT) elements, or an IDMT curve
plus up to three DT elements. The optional additional
3-phase VT input available in P643 and P645 allows
overfluxing to be applied on both HV and LV sides of
the transformer, to ensure optimum protection,
irrespective of the loadflow direction.
Both thermal overload and overfluxing elements are
essentially thermal based, modelling winding and oil
heating, or heating of core bolts and laminations. Due
to time constants being in minutes (rather than
seconds), heating and cooling of both replicas can be
relatively slow. A pre-trip countdown is provided,
displaying the time remaining to trip if the present level
of load, or flux were to be maintained. A pre-trip alarm
can be applied, notifying the dispatcher that he/she
has a certain number of minutes for remedial action,
before a trip is likely. After any injection testing, all
replicas can be forced to reset via a user command.
Simple setting:
intuitive wizards need only nameplate data
> Circuit Breaker Failure
The breaker failure protection may be initiated from
internal protection within the P64x, and also from
external devices. In the case of Buchholz (sudden
pressure) relays, the CBF elements for all breakers
must be initated in parallel. Where external feeder or
busbar protection is applied to trip only one (or more)
breaker(s), the P64x has the ability to initiate the CBF
scheme on a per breaker basis. Retripping and
backtripping schemes are supported, all with a fast-
acting undercurrent check.
SUPERVISORY FUNCTIONS
Voltage transformer supervision is provided to detect
loss of one, two or three VT signals (P643 and P645
models fitted with a 3-phase VT). Current transformer
supervision is provided to detect loss of phase CT
input signals. Using the “differential CTS” feature
(patented), the relay performs an intelligent
comparison of the negative sequence current
imbalance at all CT terminals, to determine which, if
any, CTs have failed. This comparison detects all CT
shorts, open circuits, and wiring disconnections without
an inherent time delay. Operation of the differential
protection can be blocked during the failure, or
alternatively temporarily desensitised to avoid an
unwanted trip. The CTS thus assures real-time stability
of the differential elements, and any applicable REF
protection.
BACK-UP PROTECTION
The MiCOM P642, P643, and P645 are delivered with
comprehensive back-up protection. Typically this will
be used in time-delayed mode to improve fault
detection dependability for system (out-of-zone) faults.
System integrity can also be improved, utilizing internal
elements for load-shedding, interlocking, alarm, or
other purposes.
> Current-Based Protection
Each winding, whether the current is directly measured
from one CT input, or is a virtual summation from two
CTs, has the following elements available:
• Phase fault overcurrent
• Negative sequence overcurrent
• Earth (ground) fault.
 Up to four stages of each element, per winding, are
available – with a choice of standard IEC and
ANSI/IEEE IDMT curves, instantaneous, and definite-
time operation. Where a P643/P645 has the 3-phase
VT option fitted, any of the current protection applied
on the same winding as the VT location may be
directionalized. Overcurrent elements, directionalized if
necessary, can be useful to clear reverse-fed upstream
faults, or for protection of adjacent busbars. At
distribution and industrial voltage levels, low-cost bus
protection schemes can be configured using the
“reverse interlocking” principle. This is a logic-based
scheme, which will trip should a fault current flow onto
the busbar not be accompanied by an external fault
start on an outgoing circuit.
The earth fault protection is configurable to operate
either in measured, or derived mode. “Measured”
denotes that the winding (or external earthing
transformer) has a star-point single phase CT available
in the Y-ground connection, and the user wishes this
current to be used to implement standby earth fault
(SBEF). “Derived” is set for delta windings, or other
cases where the user prefers to use the calculated
residual current from the three phase CTs.
> Voltage Protection *
Two stages each are available for phase overvoltage,
phase undervoltage, and residual overvoltage (neutral
displacement). Such elements are particularly useful to
detect voltage regulation errors.
(* - Available when optional 3-phase VT input is
ordered in P643 or P645).
> Frequency Protection
Four stages of underfrequency and two stages of
overfrequency are provided, permitting load shedding
and restoration schemes to be implemented.
6>7
CONTROL
> User interface
Integrated user function keys and programmable LEDs
provide a cost-effective solution for full transformer
schemes. The P643 and P645 offer higher
functionality, with ten function keys operating in two
modes, normal and toggled, each with an associated
tricolour LED for clear indication of the logic status.
Typical control, maintenance, and commissioning
options are initiated directly from simple key presses,
rather than the need to navigate a menu.
> Programmable scheme logic
Powerful graphical logic allows the user to customize
the protection and control functions. The gate logic
includes OR, AND and majority gate functions, with
the ability to invert the inputs and outputs, and provide
feedback. The system is optimized to ensure that the
protection outputs are not delayed by the PSL
operation. The programmable scheme logic is
configured using the graphical MiCOM S1 Studio PC
software, as shown in Figure 6. The relay outputs may
be configured as latching (eg "Lockout") or self-reset.
Time delays and interlocking schemes are possible
within the PSL.
MEASUREMENTS AND
RECORDING
> Loss of life (LoL)
Frequent excesses of transformer rated current or
operation at elevated temperatures will shorten the life
expectancy of the transformer. The P64x provides a
transformer loss-of-life calculation, using a thermal
model that estimates the hot spot temperature.
The insulation deterioration is assumed to follow an
adaptation of the Arrhenius theory where insulation life
and absolute temperature are inversely proportional
(as per IEEE Std. C57.91-1995).
The LoL implementation includes:
• Daily writing into non-volatile memory
• Accumulated Loss of Life, Rate of Using Life,
Ageing Acceleration Factor, and Residual Life
Hours stored
• Alarm setpoints available on attaining
instantaneous or cumulative levels
• Statistics can be reset if a device is relocated to
monitor another transformer
Figure 6:
Programmable Scheme Logic editor
> Through fault monitoring
Through faults are a major cause of transformer
damage and failure, stressing the insulation and
mechanical integrity. An I²t calculation based on
recorded duration and maximum current is stored for
each phase. Calculation results are added to
cumulative values, and monitored so that users can
schedule transformer maintenance or identify a need
for system reinforcement. The last five triggers are
stored as special individual records.
> Power system measurements (MMXU)
Multiple measured analog quantities, with phase
angles, are provided. These include:
• Phase and neutral currents for all windings, plus
sequence components
• Measurements of all voltage inputs
• Frequency, power factor, Watts and VArs
• Maximum demand and rolling values
• Bias currents, differential currents
• All thermal states, temperatures, and loss-of-life
• Measurands can be assigned to CLIO
> Event records
Time-tagged event records are stored in battery
backed memory. An optional modulated or
demodulated IRIG-B port is available for accurate time
synchronization.
> Fault records
• Indication of the faulted phase
• Protection operation
• Active setting group
• Relay and CB operating time
• Pre-fault and fault currents
• Bias and differential currents
> Disturbance records
High performance waveform records contain all CT
and VT input channels, plus up to 32 digital states,
extracted in COMTRADE format.
Programmable logic
and control scheme flexibility
PLANT SUPERVISION
> Trip circuit supervision
Supervision of the trip circuit can be implemented
using optocoupled inputs and the programmable
scheme logic.
> Analog (Current Loop) Inputs and Outputs
(CLIO)*
Four inputs are provided for transducers with ranges of
0-1mA, 0-10mA, 0-20mA or 4-20mA. Associated with
each input there are two time delayed protection
stages, one for alarm and one for trip. Each stage can
be set for 'Over' or 'Under' operation.
Four outputs are provided with ranges of 0-1mA, 0-
10mA, 0-20mA or 4-20mA which can alleviate the
need for separate transducers. These may be used to
feed standard moving coil ammeters for analog
indication of certain measured quantities or for input to
SCADA using an existing analog RTU.
(* - Available when optional CLIO card is ordered).
COMMUNICATION TO REMOTE
OPERATORS AND SUBSTATION
AUTOMATION
Two auxiliary communication ports are available; a rear
port providing remote communications and a front port
providing local communications. An additional, second
rear port can be ordered as an option. Any of the
following rear port protocols can be chosen at the time
of ordering: Courier/K-Bus, MODBUS, IEC60870-5-
103, DNP3.0, or IEC 61850.
> Second rear Courier port
The optional second port is designed typically for dial-
up modem access by protection engineers / operators,
when the main port is reserved for SCADA traffic.
 Technical data Front download/monitor port
EIA(RS)-232, 25 pin D-type female connector
Socket SK2.
Mechanical specifications For firmware and menu text downloads.
Isolation to ELV level.
Design
Modular MiCOM Px40 platform relay, P642 in
40TE case, P643 in 60TE and P645 in 60TE or Rear communications port (RP1)
80TE case. EIA(RS)-485 signal levels, two wire
Mounting is front of panel flush mounting, or connections located on general purpose block,
19” rack mounted (ordering options). M4 screw.
For screened twisted pair cable, multidrop,
1000 m max.
Enclosure protection For Courier (K-Bus), IEC-60870-5-103,
Per IEC 60529: 1992: MODBUS or DNP3.0 protocol (ordering
TD IP 52 Protection (front panel) against dust and options).
dripping water. Isolation to SELV (Safety Extra Low Voltage)
IP 50 Protection for the rear and sides of the level.
case against dust.
IP 10 Product safety protection for the rear due
to live connections on the terminal block. Optional rear fiber connection for
SCADA/DCS
Weight BFOC 2.5 -(ST®)-interface for glass fiber, as
P642 (40TE): 7.9 kg for IEC 874-10.
P643 (60TE): 11.5 kg 850nm short-haul fibers, one Tx and one Rx.
P645 (60TE): 11.5 kg For Courier, IEC-60870-5-103, MODBUS or
P645 (80TE): 15.5 kg DNP3.0 (Ordering options).

Optional second rear communications port

Terminals
(RP2)
EIA(RS)-232, 9 pin D-type female connector,
AC current and voltage measuring inputs socket SK4.
Located on heavy duty (black) terminal block: Courier protocol: K-Bus, EIA(RS)-232, or
Threaded M4 terminals, for ring terminal EIA(RS)485 connection.
connection. Isolation to SELV level.
CT inputs have integral safety shorting, upon Maximum cable length 15 m.
removal of the terminal block.
Optional rear IRIG-B interface (modulated
General input/output terminals or unmodulated)
For power supply, opto inputs, output contacts BNC plug
and RP1 rear communications. Isolation to SELV level.
Located on general purpose (grey) blocks: 50 ohm coaxial cable.
Threaded M4 terminals, for ring terminal
connection.
Optional rear Ethernet connection for
IEC 61850 or DNP3.0
Case protective earth connection
Two rear stud connections, threaded M4. 10BaseT/100BaseTX communications
Must be earthed (grounded) for safety, Interface in accordance with IEEE802.3 and
minimum earth wire size 2.5 mm .
2 IEC 61850
Isolation: 1.5 kV
Connector type: RJ45
Front port serial PC interface Cable type: Screened Twisted Pair (STP)
EIA(RS)-232 DCE, 9 pin D-type female Max. cable length: 100 m
connector Socket SK1.
Courier protocol for interface to MiCOM S1
Studio software. 100Base FX interface
Isolation to ELV (extra low voltage) level. Interface in accordance with IEEE802.3 and
Maximum cable length 15 m. IEC 61850
Wavelength: 1300 nm
Fiber: multi-mode 50/125 µm or 62.5/125 µm
Connector type: BFOC 2.5 -(ST®)

P642, P643 & P645 Technical Data Sheet 8 P642 software version 02J and P643/5 software version 02K
Ratings Power supply interruption
As for IEC 60255-11: 1979:
The relay withstands a 20 ms interruption
AC measuring inputs in the DC auxiliary supply, without
Nominal frequency: 50 and 60 Hz (settable) de-energizing.
Operating range: 45 to 66 Hz As for IEC 61000-4-11: 2004:
Phase rotation ABC or ACB The relay withstands a 20 ms interruption
in an AC auxiliary supply, without
AC current de-energizing.
Nominal current (In): 1 and 5 A dual rated. A MiCOM E124 extends these limits. It is an
Nominal burden auxiliary device used to provide energy to the
Phase <0.2 VA at In trip coil of a circuit breaker.
Earth <0.2 VA at In
Thermal withstand:
continuous 4 In Battery backup
Front panel mounted
TD
for 10 s: 30 In
for 1 s; 100 In Type ½ AA, 3.6 V Lithium Thionyl Chloride
Standard: linear to 16 In (non-offset AC (SAFT advanced battery reference
current). LS14250)
Battery life (assuming relay energized for 90%
AC voltage time) >10 years
Nominal voltage (Vn): 100 to 120 V
Nominal burden per phase: < 0.06 VA at Field voltage output
110 V Regulated 48 Vdc
Thermal withstand: Current limited at 112 mA maximum output
continuous 2 Vn Operating range 40 to 60 V
for 10s: 2.6 Vn
Linear to 200V (100V/120V). Digital (“opto”) inputs
Universal opto inputs with programmable
voltage thresholds (24/27, 30/34, 48/54,
Power supply
110/125, 220/250 V). May be energized from
the 48 V field voltage, or the external battery
Auxiliary voltage (Vx) supply.
Three ordering options: Rated nominal voltage: 24 to 250 Vdc
(i) Vx: 24 to 48 Vdc Operating range: 19 to 265 Vdc
(ii) Vx: 48 to 110 Vdc, and 40 to 100Vac (rms) Withstand: 300 Vdc, 300 Vrms.
(iii) Vx: 110 to 250 Vdc, and 100 to Peak current of opto input when energized is
240Vac (rms) 3.5 mA (0-300 V)
Nominal pick-up and reset thresholds:
Operating range Pick-up approx 70% of battery nominal set
(i) 19 to 65V (dc only for this variant) Reset approx 66% of battery nominal set
(ii) 37 to 150V (dc), 32 to 110 V (ac) Nominal battery 24/27: 60 - 80% DO/PU
(iii) 87 to 300V (dc), 80 to 265 V (ac). (logic 0) <16.2 (logic 1) >19.2
With a tolerable ac ripple of up to 12% for a dc Nominal battery 24/27: 50 - 70% DO/PU
supply, as for IEC 60255-11: 1979. (logic 0) <12.0 (logic 1) >16.8
Nominal battery 30/34: 60 - 80% DO/PU
(logic 0) <20.4 (logic 1) >24.0
Nominal burden Nominal battery 30/34: 50 - 70% DO/PU
Quiescent burden: 11W or 24 VA. (Extra (logic 0) <15.0 (logic 1) >21.0
1.25 W when fitted with second rear Nominal battery 48/54: 60 - 80% DO/PU
communications board). (logic 0) <32.4 (logic 1) >38.4
Additions for energized binary inputs/outputs: Nominal battery 48/54: 50 - 70% DO/PU
For each opto input: (logic 0) <24.0 (logic 1) >33.6
0.09 W (24 to 54 V) Nominal battery 110/125: 60 - 80% DO/PU
0.12 W (110/125 V) (logic 0) <75.0 (logic 1) >88.0
0.19 W (220/250 V) Nominal battery 110/125: 50 - 70% DO/PU
For each energized output relay: 0.13W (logic 0) <55.0 (logic 1) >77.0
Nominal battery 220/250: 60 - 80% DO/PU
Power-up time (logic 0) <150.0 (logic 1) >176.0
Time to power up < 11 s. Nominal battery 220/250: 50 - 70% DO/PU
(logic 0) <110 (logic 1) >154

P642, P643 & P645 Technical Data Sheet 9 P642 software version 02J and P643/5 software version 02K
 Recognition time:
7 ms
<2 ms with long filter removed,
<12 ms with half cycle ac immunity filter on
Output contacts
Standard contacts
General purpose relay outputs for signaling,
tripping and alarming:
Rated voltage: 300 V
Continuous current: 10 A
Short-duration current: 30 A for 3 s
Making capacity: 250 A for 30 ms
TD Breaking capacity:
DC: 50 W resistive
DC: 62.5 W inductive (L/R = 50 ms)
AC: 2500 VA resistive (cos φ = unity)
AC: 2500 VA inductive (cos φ = 0.7)
AC: 1250 VA inductive (cos φ = 0.5)
Subject to maxima of 10 A and 300 V
Response to command: < 5 ms
Durability:
Loaded contact: 10 000 operations
minimum,
Unloaded contact: 100 000 operations
minimum.
High break contacts
Relay outputs for tripping:
Rated voltage: 300 V
Continuous current: 10 A dc
Short-duration current: 30 A dc for 3 s
Making capacity: 250 A dc for 30 ms
Breaking capacity:
DC: 7500 W resistive
DC: 2500 W inductive (L/R = 50 ms)
Subject to maxima of 10 A and 300 V
Response to command: < 0.2 ms
Durability:
Loaded contact: 10 000 operations
minimum,
Unloaded contact: 100 000 operations
minimum.
Watchdog contacts
Non-programmable contacts for relay healthy
or relay fail indication:
Breaking capacity:
DC: 30 W resistive
DC: 15 W inductive (L/R = 40 ms)
AC: 375 VA inductive (cos φ = 0.7)
IRIG-B 12X Interface (modulated)
External clock synchronization to IRIG
standard 200-98, format B12x
Input impedance 6 kΩ at 1000 Hz
Modulation ratio: 3:1 to 6:1
Input signal, peak-peak: 200 mV to 20 V
IRIG-B 00X interface (un-modulated)
External clock synchronization to IRIG
standard 200-98, format B00X.
P642, P643 & P645 Technical Data Sheet
Input signal TTL level
Input impedance at dc 10 kΩ
Environmental conditions
Ambient temperature range
As for EN 60088-2-1: 2007:
EN 60168-2-2: 2007
Operating temperature range:
-25°C to +55°C (or -13°F to +131°F)
Storage and transit:
-25°C to +70°C (or -13°F to +158°F)
Ambient humidity range
As for EN 60078-2-78: 2002:
56 days at 93% relative humidity and +40 °C
As for IEC 60068-2-14: 2000
5 cycles, -25°C to +55 °C
1°C / min rate of change
Corrosive environments
Industrial corrosive environment or poor
environmental control, mixed gas flow test.
As for IEC 60068-2-60: 1995, Part 2, Test Ke,
Method (class) 3 21 days at 75% relative
humidity and +30°C exposure to elevated
concentrations of H2S, NO2, Cl2 and SO2
Type tests
Insulation
As for IEC 60255-27: 2005
(incorporating corrigendum March 2007):
Insulation resistance > 100 MΩ at 500 Vdc
(Using only electronic/brushless insulation
tester).
Creepage distances and clearances
IEC 60255-27: 2005
(incorporating corrigendum March 2007)
Pollution degree 3,
Overvoltage category III,
Impulse test voltage 5 kV.
High voltage (dielectric) withstand
(EIA RS-232 ports excepted and normally-
open contacts of output relays excepted).
(i) As for IEC 60255-27: 2005 (incorporating
corrigendum March 2007), 2 kV rms AC,
1 minute:
Between terminals of all independent circuits.
Between all case terminals connected
together, and the case earth (ground).
1 kV rms AC for 1 minute, across open
watchdog contacts.
1 kV rms AC for 1 minute, across open
contacts of changeover output relays.
1 kV rms AC for 1 minute for all D-type
EIA(RS)-232 or EIA(RS)-485 ports
between the communications port
terminals and protective (earth) conductor
terminal.
10 P642 software version 02J and P643/5 software version 02K
(ii) As for ANSI/IEEE C37.90-1989 (reaffirmed
1994):
1.5 kV rms AC for 1 minute, across open
contacts of normally open output relays.
1k V rms AC for 1 minute, across open
watchdog contacts.
1k V rms AC for 1 minute, across open
contacts of changeover output relays.
Impulse voltage withstand test
As for IEC 60255-27: 2005
(incorporating corrigendum March 2007):
Front time: 1.2 µs, Time to half-value: 50 µs,
Peak value: 5 kV, 0.5 J
Between all independent circuits.
Between all independent circuits and case
earth ground).
EIA(RS)-232 & EIA(RS)-485 ports and
normally
open contacts of output relays excepted.
Electromagnetic compatibility (EMC)
1 MHz burst high frequency disturbance
test
As for EN 60255-22-1: 2008, Class III,
Common-mode test voltage: 2.5 kV,
Differential test voltage: 1.0 kV,
Test duration: 2 s, Source impedance: 200 Ω
(EIA(RS)-232 ports excepted).
100kHz damped oscillatory test
EN 61000-4-18: 2007: Levels
Common mode test voltage: 2.5 kV
Differential mode test voltage: 1 kV
Immunity to electrostatic discharge
As for IEC 60255-22-2: 1997, Class 4,
15 kV discharge in air to user interface,
display, communication ports and exposed
metalwork.
8 kV point contact discharge in air to all
communications ports.
6 kV point contact discharge to any part of the
front of the product.
Electrical fast transient or burst
requirements
As for IEC 60255-22-4: 2002 and
EN61000-4-4:2004. Test severity Class III and
IV:
Amplitude: 2 kV, burst frequency 5 kHz
(Class III),
Amplitude: 4 kV, burst frequency 2.5 kHz
(Class IV).
Applied directly to auxiliary supply, and
applied to all other inputs. (EIA(RS)-232
ports excepted).
Amplitude: 4 kV, burst frequency 5 kHz
(Class IV) applied directly to auxiliary.
P642, P643 & P645 Technical Data Sheet
Surge withstand capability
As for IEEE/ANSI C37.90.1: 2002:
4 kV fast transient and 2.5 kV oscillatory
applied directly across each output contact,
optically isolated input, and power supply
circuit.
Surge immunity test
(EIA(RS)-232 ports excepted).
As for IEC 61000-4-5: 2006 Level 4,
Time to half-value: 1.2 to 50 µs,
Amplitude: 4 kV between all groups and case
earth (ground),
Amplitude: 2 kV between terminals of each
group.
TD
Conducted/radiated immunity
For RTDs used for tripping applications the
conducted and radiated immunity performance
is guaranteed only when using totally shielded
RTD cables (twisted leads).
Immunity to radiated electromagnetic
energy
As for IEC 60255-22-3: 2001, Class III:
Test field strength, frequency band 80 to
1000 MHz:
10 V/m,
Test using AM: 1 kHz / 80%,
Spot tests at 80, 160, 450, 900 MHz
As for IEEE/ANSI C37.90.2: 2004:
25, 80 MHz to 1000 MHz, zero and 100%
square wave modulated, 1 kHz 80% am and
am pulse modulated.
Field strength 35 V/m.
Radiated immunity from digital
communications
As for EN61000-4-3: 2002, Level 4:
Test field strength, frequency band 800 to 960
MHz, and 1.4 to 2.0 GHz:
30 V/m,
Test using AM: 1 kHz/80%.
Radiated immunity from digital radio
telephones
As for EN 61000-4-3: 2002:
10 V/m, 900 MHz and 1.89 GHz.
Immunity to conducted disturbances
induced by radio frequency fields
As for EN 61000-4-6: 1996, Level 3,
Disturbing test voltage: 10 V.
Power frequency magnetic field immunity
As for EN 61000-4-8: 2001, Level 5,
100 A/m applied continuously,
1000 A/m applied for 3 s.
As for EN 61000-4-9: 2001, Level 5,
1000 A/m applied in all planes.
As for EN 61000-4-10: 2001, Level 5,
100 A/m applied in all planes at
100 kHz to 1 MHz with a burst duration of 2 s.
11 P642 software version 02J and P643/5 software version 02K
 Conducted emissions Mechanical robustness
As for EN 55022: 1998 Class A:
0.15 - 0.5 MHz, 79 dBμV (quasi peak)
Vibration test
66 dBμV (average)
As for IEC 60255-21-1: 1996:
0.5 - 30 MHz, 73 dBμV (quasi peak) Response Class 2
60 dBμV (average). Endurance Class 2
Radiated emissions Shock and bump
As for EN 55022: 1998 Class A: As for IEC 60255-21-2: 1996:
30 to 230 MHz, 40 dBμV/m at 10 m Shock response Class 2
measurement distance Shock withstand Class 1
230 to 1 GHz, 47 dBμV/m at 10 m Bump Class 1
measurement distance.
Seismic test
TD EU directives
As for IEC 60255-21-3: 1995:
Class 2

EMC compliance
As for 2004/108/EC:
Compliance to the European Commission
Directive on EMC is demonstrated using a
Technical File. Product Specific Standards
were used to establish conformity:
EN 50263: 2000

Product safety
As for 2006/95/EC:
Compliance to the European Commission
Low Voltage Directive. Compliance is
demonstrated by reference to generic safety
standards:
EN60255-27: 2005 (incorporating
corrigendum March 2007)

R&TTE compliance
Radio and Telecommunications Terminal
Equipment (R & TTE) directive 99/5/EC.
Compliance demonstrated by compliance to
both the EMC directive and the Low voltage
directive, down to zero volts.
Applicable to rear communications ports.

Compliance demonstrated by Notified Body

certificates of compliance.

II (2) G

P642, P643 & P645 Technical Data Sheet 12 P642 software version 02J and P643/5 software version 02K
Protection functions
Transformer differential protection
Accuracy
Pick-up: formula ±5%
Drop-off: 95% of formula ±5%
Pick-up and drop-off repeatability: <1%
Operating time: <33 ms for currents
applied at 3x pickup level or greater
DT operating time: ±5% or 33 ms whichever is
greater for currents applied at 3x pickup level
or greater
Operating time repeatability: < 1 ms
Disengagement time: <15 ms
Circuitry fault alarm
Accuracy
Pick-up: formula ±5%
Drop-off: 0.95 of formula ±5%
Pick-up and drop-off repeatability: <4%
Instantaneous operating time: <26 ms at 2.5x
pick-up value
Disengagement time: <26 ms
Operating time repeatability: <8 ms
Timer ±2% or 50 ms, whichever is greater
ID>1 Alarm Timer: ±2% or 50 ms whichever is
greater
Restricted earth fault
Accuracy
Pick-up: formula ±5%
Drop-off: 0.90 formula ±5%
Low impedance operating time: <45 ms for
currents applied at 2x pickup level or greater
DT operation: ±2% or 45 ms whichever is
greater for currents applied at 2x pickup level
or greater
Operating time repeatability: <5 ms
Disengagement time: <30 ms
Through fault monitoring
Accuracy
TF I> pick-up: setting ±5% or 50 mA whichever
is greater
TF I> drop-off: 0.95 of setting ±5% or 50 mA
whichever is greater
TF I2t> pick-up: setting ±2% or 5A2s whichever
is greater
P642, P643 & P645 Technical Data Sheet
System back-up
Transient overreach and overshoot
Accuracy
Additional tolerance X/R ratios: ±5% over X/R
1 to 120
Overshoot: <40 ms
Disengagement time <30 ms
Inverse time characteristic
Accuracy
TD
DT pick-up: Setting ±5% or 20 mA whichever
is greater
Minimum IDMT trip level: 1.05 x Setting ±5%
Drop-off: 0.95 x Setting ±5% or 20 mA
whichever is greater
Pick-up and drop-off repeatability: <1%
IDMT shape: ±5% or 40 ms, whichever is
greater
IEEE reset: ±5% or 50 ms, whichever is
greater
DT operation: ±2% or 50 ms, whichever is
greater
DT reset: ±5%
Timer repeatability: <6 ms
Directional boundary (RCA ±90%):
±2% hysteresis 3°
Directional boundary repeatability: <1%
Directional voltage pick up: ±5% or 50 mV,
whichever is greater
Directional voltage drop off: 95% x setting ±5%
or 50 mV, whichever is greater
Directional voltage repeatability: <3%
Characteristic: UK curves: IEC 60255-3 1998
US curves: IEEEC37.112 1996
4-stage negative phase sequence
overcurrent
Accuracy
I2>Pick-up: Setting ±5% or 20 mA, whichever
is greater
I2> Drop-off: 0.95 x Setting ±5% or 20 mA,
whichever is greater
Vpol Pick-up: Setting ±5% or 50 mV whichever
is greater
Vpol Drop-off: 0.95 x Setting ±5% or 50 mV,
whichever is greater
Pick-up and drop-off repeatability: <1%
Operating boundary pick-up: ±2° of RCA ±90°
Operating boundary hysteresis: < 2°
Operating boundary repeatability: <2%
DT operation: ±2% or 60 ms, whichever is
greater
Instantaneous operating time: <60 ms
Disengagement time: <35 ms
Operating times Repeatability: <5 ms
13 P642 software version 02J and P643/5 software version 02K
 Directional boundary (RCA ±90%): Volts/Hz
±2% hysteresis 2°
Characteristic:
Accuracy
UK curves: IEC 60255-3 …1998
Pick-up: V/Hz> ±5%
US curves: IEEEC37.112…1996
Drop-off: 98% of V/Hz> ±5%
Repeatability (operating threshold): <1%
Thermal overload IDMT operating time: ±5% or 50 ms whichever
is greater
Accuracy Definite time: ±2% or 50 ms whichever is
Hot Spot> Pick-up: Expected pick-up time ±5% greater
(expected pick-up time is the time required to Instantaneous Operation: <50 ms
reach the setting) Disengagement time: <50 ms
Hot Spot> DT: ±5%or 50 ms whichever is Repeatability (operating times): <10 ms
TD greater V/Hz measurement: ±1%
Top Oil> Pick-up: Expected Pick-up Time ±5% Reset time: ±2% or 50 ms whichever is greater
(expected pick-up time is the time required to
reach the setting)
2-stage undervoltage
Top Oil> DT: ±5%or 50 ms whichever is
greater
Repeatability: <2.5% Accuracy
Pick-up for DT and IDMT: Setting ±5%
Drop-off: 1.02 x Setting ±5%
4-stage non-directional earth fault
IDMT shape: ±2% or 50 ms whichever is
greater
Accuracy DT operation: ±2% or 50 ms whichever is
Pick-up: Setting ±5% or 20mA whichever is greater
greater Reset: <50 ms
Measured drop-off: 95% of setting ±5% or Repeatability: <1%
20mA whichever is greater
Derived drop-off: 90% of setting ±5% or 20mA
whichever is greater 2-stage overvoltage
Pick-up and drop-off repeatability: <2%
Minimum IDMT trip level: 1.05 x Setting ±5% Accuracy
IDMT shape: ±5% or 40 ms whichever is DT Pick-up: Setting ±5%
greater * IDMT Pick-up: Setting ±5%
IEEE reset: ±5% or 40 ms whichever is greater Drop-off: 0.98 x Setting ±5%
DT operation: ±2% or 50 ms whichever is IDMT characteristic shape: ±2% or 50 ms
greater whichever is greater
DT reset: ±5%
DT operation: ±2% or 50 ms whichever is
Timer repeatability: <6 ms
greater
* Reference conditions TMS = 1, TD = 1 and
Reset: <50 ms
IN> setting of 1 A operating range 2-16 In
Repeatability: <1%

2-stage neutral displacement or 4-stage underfrequency

residual overvoltage
Accuracy Accuracy
Pick-up VN> ±5% or 50 mV whichever is Pick-up: Setting ±0.01 Hz
greater Drop-off: (Setting +0.025 Hz) ±0.01 Hz
Drop-off: 0.95 x Setting ±5% DT operation: ±2% or 70 ms whichever is
Pick-up and Drop-off Repeatability: <1% greater.
IDMT shape: ±2% or 55 ms whichever is Repeatability: <1%
greater The operation also includes a time for
DT operation: ±2% or 70 ms whichever is the relay to frequency track (20 Hz/second)
greater
Reset: <50 ms
Timer repeatability: <10 ms
Disengagement time <35 ms

P642, P643 & P645 Technical Data Sheet 14 P642 software version 02J and P643/5 software version 02K
2-stage overfrequency
Accuracy
Pick-up: Setting ±0.01 Hz
Drop-off: (Setting -0.025 Hz) ±0.01 Hz
Repeatability: <1%
DT operation: ±2% or 70 ms whichever is
greater.
The operation also includes a time for
the relay to frequency track (20 Hz/second)
CB fail
Accuracy
I > Pick-up: Setting ±5% or 20 mA whichever is
greater
I > Drop-off: 100% of setting ±5% or 20 mA
whichever is greater
Timers: ±2% or 50 ms whichever is greater
Reset time: <20 ms
Pole dead
I > Pick-up: Fixed Threshold (50 mA) ±20 mA
I > Drop-off: Fixed Threshold (55 mA) ±20 mA
V< Pick-up: Fixed Threshold (10 V) ±5%
V< Drop-off: Fixed Threshold (30 V) ±5%
Instantaneous operation: < 50 ms
Supervisory functions
Voltage transformer supervision
Accuracy
VTS I> Pick-up: Setting ±5% or 50 mA
whichever is greater
VTS I> Drop-off: 90% of setting ±5% or 50 mA
whichever is greater
VTS I2> Pick-up: Setting ±5% or 50 mA
whichever is greater
VTS I2> Drop-off: 95% of setting ±5% or 50 mA
whichever is greater
VTS V< Pick-up: Fixed Threshold (10 V) ±5%
VTS V< Drop-off: Fixed Threshold (30 V) ±5%
VTS V2> Pick-up: Fixed Threshold (10 V) ±5%
VTS V2> Drop-off: Fixed Threshold
(9.5 V) ±5%
Fast block operation: <25 ms
Fast block reset: <30 ms
Time delay: Setting ±2% or 50 ms whichever is
greater
Differential CTS
Accuracy
CTS I1 Pick-up ratio: Setting ±5% or 20 mA
whichever is greater
CTS I2/I1>1 Pick-up ratio: 95% of setting ±5%
or 20 mA whichever is greater
P642, P643 & P645 Technical Data Sheet
CTS I2/I1>2 Pick-up ratio: 105% of setting
±5% or 20 mA whichever is greater
CTS I1 Drop-off ratio: 95% of setting ±5% or
20 mA whichever is greater
CTS I2/I1>1 Drop-off ratio: setting ±5% or
20 mA whichever is greater
CTS I2/I1>2 Drop-off ratio: setting ±5% or
20 mA whichever is greater
Pick-up and drop-off repeatability: <3%
Time delay operation: ±2% or 50 ms whichever
is greater
CTS terminal block operation: <25 ms
CTS differential block operation < 30 ms
CTS reset < 25 ms
CTS Disengagement time <30 ms TD
Programmable scheme logic
Accuracy
Output conditioner timer: Setting ±2% or 50 ms
whichever is greater
Dwell conditioner timer: Setting ±2% or 50 ms
whichever is greater
Pulse conditioner timer: Setting ±2% or 50 ms
whichever is greater
Measurements and recording
facilities
Measurements
Accuracy
Current: 0.05 to 3 In: ±1% or 3 mA of reading
Voltage: 0.05 to 2 Vn: ±1% of reading
Power (W): 0.2 to 2 Vn, 0.05 to 3 In: ±5% of
reading at unity power factor
Reactive Power (VArs): 0.2 to 2 Vn, 0.05 to
3 In: ±5% of reading at zero power factor
Apparent Power (VA): 0.2 to 2 Vn, 0.05 to 3 In:
±5% of reading
Energy (Wh): 0.2 to 2 Vn, 0.2 to 3 In: ±5% of
reading at zero power factor
Energy (Varh): 0.2 to 2 Vn, 0.2 to 3 In: ±5% of
reading at zero power factor
Phase accuracy: 0° to 360: ±5%
Frequency: 5 to 70 Hz: ±0.025 Hz
IRIG-B and real-time clock
Performance
Year 2000: Compliant
Real time accuracy: < ±1 second / day
External clock synchronisation: Conforms to
IRIG standard 200-98, format B
15 P642 software version 02J and P643/5 software version 02K
 Features
Real time 24 hour clock settable in hours,
minutes and seconds
Calendar settable from January 1994 to
December 2092
Clock and calendar maintained via battery
after loss of auxiliary supply
Internal clock synchronization using IRIG-B
Interface for IRIG-B signal is BNC
Event, fault and maintenance
records
Maximum 512 events in a cyclic memory
Maximum 5 fault records
Maximum 10 maintenance records
Accuracy
Event time stamp resolution: 1 ms

Current loop inputs and outputs IEC 61850 Ethernet data

Accuracy
100 Base FX Interface
Current loop input accuracy: ±1% of full scale
TD CLI drop-off threshold Under: setting ±1% of Transmitter optical characteristics
full scale (TA = 0°C to 70°C, VCC = 4.75 V to 5.25 V)
CLI drop-off threshold Over: setting ±1% of full
scale Parameter Sym Min. Typ. Max. Unit
CLI sampling interval: 50 ms Output Optical
CLI instantaneous operating time: < 200 ms for Power BOL -19 dBm
20 Hz to 70 Hz; < 300 ms for 5 Hz to 20 Hz 62.5/125 µm, PO -16.8 -14
-20 avg.
NA = 0.275 Fiber
CLI DT operating time: ±2% setting or 150 ms EOL
whichever is the greater for 20 Hz to 70 Hz; Output Optical
±2% setting or 200 ms whichever is the Power BOL -22.5 dBm
50/125 µm, PO -20.3 -14
greater for 5 Hz to 20 Hz NA = 0.20 Fiber -23.5 avg.
CLO conversion interval: 50 ms EOL
CLO latency: < 1.07 s or <70 ms depending on 10 %
Optical
CLO output parameter’s internal refresh rate Extinction Ratio -10 dB
- (1 s or 0.5 cycle)
Current loop output accuracy: ±0.5% of full Output Optical
Power at Logic
PO
-45
dBm
scale “0” State (“0”) avg.
Repeatability: <5%
CLI - Current Loop Input BOL - Beginning of life
CLO - Current Loop Output EOL - End of life

Other Specifications Receiver optical characteristics

CLI load resistance 0-1 mA: < 4 kΩ (TA = 0°C to 70°C, VCC = 4.75 V to 5.25 V)
CLI load resistance 0-1 mA/0-20 mA /4-20 mA:
<300 Ω Parameter Sym Min. Typ. Max. Unit

Isolation between common input channels: Input Optical

PIN
zero Power dBm
Min. -33.5 –31
Minimum at avg.
Isolation between input channels and case (W)
Window Edge
earth/other circuits: 2 kV rms for 1 minute
Input Optical
CLO compliance voltage 0-1 mA / 0 10 mA: Power
PIN
Bm
Min. -34.5 -31.8
10 V Minimum at
(C)
avg.
CLO compliance voltage 0-20 mA / 4-20 mA: Eye Center
8.8 V Input Optical
PIN dBm
Current Loop output open circuit voltage: < Power
Max.
-14 -11.8
avg.
Maximum
15 V

Disturbance records Note: The 10BaseFL connection will no

longer be supported as IEC 61850
does not specify this interface.
Accuracy
Magnitude and relative phases: ±5% of applied
quantities
Duration: ±2%
Trigger Position: ±2% (minimum 100 ms)
Record length: 50 records each 1.5 s duration
(75 s total memory) with 8 analog channels
and 32 digital channels (Courier, MODBUS,
DNP 3.0), 8 records each 3 s (50 Hz) or
2.5 s (60 Hz) duration (IEC60870-5-103).

P642, P643 & P645 Technical Data Sheet 16 P642 software version 02J and P643/5 software version 02K
Settings, measurements and CB Fail Disabled/Enabled
Supervision: Disabled/Enabled
records list Input Labels: Invisible/Visible
Output Labels: Invisible/Visible
Settings list RTD Labels: Invisible/Visible
CT & VT Ratios: Invisible/Visible
Record Control Invisible/Visible
Global settings (system data) Disturb Recorder: Invisible/Visible
Language: English/French/German/Spanish/ Measure’t Setup: Invisible/Visible
Russian/Chinese Comms Settings: Invisible/Visible
Frequency: 50/60 Hz Commission Tests: Invisible/Visible
Setting Values: Primary/Secondary
Date and time Control Inputs: Invisible/Visible
CLIO Inputs: Disabled/Enabled
IRIG-B Sync: Disabled/Enabled
Battery Alarm: Disabled/Enabled
CLIO Outputs: Disabled/Enabled TD
Ctrl I/P Config: Invisible/Visible
LocalTime Enable: Disabled/Fixed/Flexible Ctrl I/P Labels: Invisible/Visible
LocalTime Offset: -720 min…720 min Direct Access: Disabled/Enabled
DST Enable: Disabled/Enabled Function Keys: Invisible/Visible
DST Offset: 30 min…60 min LCD Contrast: 0…31
DST Start: First/Second/Third/Fourth/
Last CT and VT ratios
DST Start Day: Sun/Mon/Tues/Wed/ Vx VT Primary: 100...1 000 000 V
Thurs/Fri/Sat Vx VT Secondary: 80...140 V (100/120 V)
DST Start Month: Jan/Feb/Mar/Apr/May/Jun/ 320…560 V (380/480 V)
Jul/Aug/Sept/Oct/Nov/Dec HV CT Polarity Standard/Inverted
DST Start Mins: 0 min…1425 min HV CT Primary: 1 A…30 kA
DST End: First/Second/Third/Fourth/ HV CT Sec'y: 1A/5A
Last LV CT Polarity Standard/Inverted
DST End Day: Sun/Mon/Tues/Wed/ LV CT Primary: 1 A…30 KA
Thurs/Fri/Sat LV CT Sec’y: 1A/5A
DST End Month: Jan/Feb/Mar/Apr/May/Jun/ HV Iy CT Polarity Standard/Inverted
Jul/Aug/Sept/Oct/Nov/Dec HV Iy CT Primary: 1 A…30 kA
DST End Mins: 0 min…1425 min HV Iy CT Sec'y: 1A/5A
RP1 Time Zone: UTC/Local HV Iy CT Loc none/star point/residual
RP2 Time Zone: UTC/Local LV Iy CT Polarity Standard/Inverted
Tunnel Time Zone: UTC/Local LV Iy CT Primary: 1 A…30 KA
LV Iy CT Sec’y: 1A/5A
LV Iy CT Loc none/star point/residual
Configuration
Setting Group:
Select from Menu Sequence of event recorder (record
Select from Opto control)
Active Settings: Group 1/2/3/4 Alarm Event: Disabled/Enabled
Setting Group 1: Disabled/Enabled Relay O/P Event: Disabled/Enabled
Setting Group 2: Disabled/Enabled Opto Input Event: Disabled/Enabled
Setting Group 3: Disabled/Enabled General Event: Disabled/Enabled
Setting Group 4: Disabled/Enabled Fault Rec Event: Disabled/Enabled
System Config: Invisible/Visible Maint Rec Event: Disabled/Enabled
Diff Protection Disabled/Enabled Protection Event: Disabled/Enabled
REF Protection Disabled/Enabled DDB 31 - 0: (up to):
Overcurrent Disabled/Enabled DDB 2047 - 2016:
NPS OverCurrent Disabled/Enabled Binary function link strings selects which
Thermal Overload Disabled/Enabled DDB signals are stored as events and
Earth Fault Disabled/Enabled which are filtered out.
V/Hz Disabled/Enabled
Through Fault Disabled/Enabled
Freq Protection Disabled/Enabled
RTD Inputs Disabled/Enabled

P642, P643 & P645 Technical Data Sheet 17 P642 software version 02J and P643/5 software version 02K
 Oscillography Command Blocking
(disturbance recorder) RP1 Port Config: (Courier):
Duration: 0.10…10.50 s K Bus
Trigger Position: 0.0…100.0% EIA485 (RS485)
Trigger Mode: Single/Extended RP1 Comms Mode: (Courier):
Analog Channel 1: (up to): IEC60870 FT1.2
Analog Channel 15 (depending on model): IEC60870 10-bit, no parity
Disturbance channels selected from: Note: If RP1 Port Config is K Bus the baud
IA-1 / IB-1 / IC-1 / IN-1 / IA-2 / IB-2 / IC-2 / rate is fixed at 64 kbits/s
IN-2(depending on model) DNP Need Time: 1…30 mins
DNP App Fragment: 100…2048 bytes
Digital Input 1: (up to): DNP App Timeout: 1…120 s
Digital Input 32: DNP SBO Timeout: 1…10 s
Selected binary channel assignment from any DNP Link Timeout: 0…120 s
TD DDB status point in the relay such as opto
input, output contact, alarms, starts, trips, Optional Ethernet port
controls, logic. NIC Tunl Timeout: 1...30 mins
Input 1 Trigger: No Trigger / Trigger L/H (Low NIC Link Report: Alarm, Event, None
to High) / Trigger H/L (High to Low) NIC Link Timeout: 0.1...60 s
(up to):
Input 32 Trigger: No Trigger / Trigger L/H /
Trigger H/L Optional additional second rear
communication
Measured operating data (rear port2 (RP2))
RP2 Port Config:
(measure’t setup) EIA(RS)-232
Default Display: EIA(RS)-485
Date and Time K-Bus
Description RP2 Comms Mode:
Plant Reference IEC60870 FT1.2
Frequency IEC60870 10-bit, no parity
Access Level RP2 Address: 0…255
Local Values: Primary/Secondary RP2 InactivTimer: 1…30 mins
Remote Values: Primary/Secondary RP2 Baud Rate:
Measurement Ref: IA1 / IB1 / IC1 / IA2 / IB2 9600/19200/38400 bits/s
/ IC2 / Vx Note: If RP2 Port Config is K Bus the baud
Measurement Mode: 0 / 1 / 2 / 3 rate is fixed at 64 kbits/s
Communications
RP1 Address: (Courier or IEC870-5-103): Commission tests
0…255 Monitor bit 1:
RP1 Address: (DNP3.0): (up to):
0…65534 Monitor bit 8:
RP1 Address: (MODBUS): Binary function link strings, selecting which
1…247 DDB signals have their status visible in the
RP1 InactivTimer: 1…30 mins Commissioning menu, for test purposes
RP1 Baud Rate: (IEC870-5-103): Test Mode:
9600/19200 bits/s Disabled
RP1 Baud Rate: (MODBUS, Courier): Test Mode
9600/19200/38400 bits/s Blocked Contacts
RP1 Baud Rate: (DNP3.0): Test Pattern:
1200/2400/4800/9600/19200/38400 bits/s Configuration of which output contacts are to
RP1 Parity: Odd/Even/None be energized when the contact test is
(MODBUS, DNP3.0) applied
RP1 Meas Period: 1…60 s
(IEC870-5-103)
RP1 PhysicalLink:
Copper (EIA(RS)-485 or K bus) or Fiber
Optic
RP1 Time Sync: Disabled/Enabled
MODBUS IEC Timer: Standard/Reverse
RP1 CS103Blocking:
Disabled
Monitor Blocking
P642, P643 & P645 Technical Data Sheet 18 P642 software version 02J and P643/5 software version 02K
Opto coupled binary inputs IED configurator
(opto config) Switch Conf. Bank: No Action/Switch Banks
Global Nominal V:
24 – 27 V IEC 61850 GOOSE
30 – 34 V GoEna: Disabled/Enabled
48 – 54 V Test Mode: Disabled/Pass Through/Forced
110 – 125 V VOP Test Pattern: 0x00000000...
220 – 250 V 0xFFFFFFFF
Custom Ignore Test Flag: No/Yes
Opto Input 1:
(up to):
Opto Input #. (# = max. opto no. fitted): Control input user labels
Custom options allow independent (Ctrl. I/P labels)
thresholds to be set for each opto, from the Control Input 1:
same range as above. (up to): TD
Opto Filter Control: Control Input 32:
Binary function link string, selecting which User defined text string to describe the
optos have an extra 1/2 cycle noise filter, function of the particular control input
and which do not.
Characteristics:
Standard 60% - 80% Settings in multiple groups
50% - 70% Note: All settings here onwards apply for
setting groups # = 1 to 4.

Control inputs into PSL

(Ctrl. I/P Config.)
Hotkey Enabled:
Binary function link string, selecting which of
the control inputs are driven from Hotkeys.
Control Input 1: Latched/Pulsed
(up to):
Control Input 32: Latched/Pulsed
Ctrl Command 1:
(up to):
Ctrl Command 32:
ON/OFF
SET/RESET
IN/OUT
ENABLED/DISABLED

Function keys
Fn. Key Status 1:
(up to):
Fn. Key Status 10
Disable
Lock
Unlock/Enable
Fn. Key 1 Mode: Toggled/Normal
(up to):
Fn. Key 10 Mode: Toggled/Normal
Fn. Key 1 Label:
(up to):
Fn. Key 10 Label:
User defined text string to describe the
function of the particular function key

P642, P643 & P645 Technical Data Sheet 19 P642 software version 02J and P643/5 software version 02K
 Protection functions REF protection
REF HV status: Enabled/Disabled
HV IS1 Set: 6.00 to 300.00 A
System config HV IS2 Set: 30.00 to 3000.00 A
Winding Type: Conventional / Auto HV IREF K1: 0 to 150.0%
HV CT Terminals: 01 HV IREF K2: 15.00 to 150.0%
LV CT Terminals: 10 HV tREF: 0 to 10.00 s
HV Connection: D-Delta / Y-Wye / Z-Zigzag REF LV status: Enabled/Disabled
HV Grounding: Grounded / Ungrounded LV IS1 Set: 6.00 to 300.00 A
HV Nominal: 100 V to 100 MV LV IS2 Set: 30.00 to 3000.00 A
HV Rating: 100 KVA to 5 GVA LV IREF K1: 0 to 150.0%
Reactance: 1.00% to 100.00% LV IREF K2: 15.00 to 150.0%
LV Clock Vector: 0 to 11 LV tREF: 0 to 10.00 s
LV Connection: D-Delta / Y-Wye / Z-Zigzag REF TV status: Enabled/Disabled
TD LV Grounding: Grounded / Ungrounded
LV Nominal: 100 V to 100 MV
TV IS1 Set: 6.00 to 300.00 A
TV IS2 Set: 30.00 to 3000.00 A
LV Rating: 100 KVA to 5 GVA TV IREF K1: 0 to 150.0%
Phase Sequence: Standard ABC / Reverse TV IREF K2: 15.00 to 150.0%
ACB TV tREF: 0 to 10.00 s
VT Reversal: No Swap / A-B Swapped / B-C
Swapped / C-A Swapped
CT1 Reversal: No Swap / A-B Swapped / B-C NPS overcurrent
Swapped / C-A Swapped HV Ι2>1 to 4 Status: Disabled/Enabled
HV Ι2>1 to 4 Current Set: 24 to 1200 A
CT2 Reversal: No Swap / A-B Swapped / B-C
Swapped / C-A Swapped HV Ι2>1 to 4 Time Delay: 0.00…100.00 s
CT3 Reversal: No Swap / A-B Swapped / B-C LV Ι2>1 to 4 Status: Disabled/Enabled
Swapped / C-A Swapped LV Ι2>1 to 4 Current Set: 24 to 1200 A
LV Ι2>1 to 4 Time Delay: 0.00…100.00 s
CT4 Reversal: No Swap / A-B Swapped / B-C TV winding same as HV and LV winding
Swapped / C-A Swapped
CT5 Reversal: No Swap / A-B Swapped / B-C
Swapped / C-A Swapped Phase overcurrent
Phase O/C: Sub Heading
HV winding
Differential protection I>1 Function:
Trans Diff: Enabled/Disabled Disabled
Set Mode: Simple/Advance DT
Is1: 100.0e-3 to 2.500 PU IEC S Inverse
K1: 0 to 150.0% IEC V Inverse
Is2: 100.0e-3 to 10 PU IEC E Inverse
K2: 15 to 150.00% UK LT Inverse
tDIFF: 0 to 10.00 s UK Rectifier
Is-CTS: 100.0e-3 to 2.500 PU RI
Is-HS1: 2.500 to 32.00 PU IEEE M Inverse
Is-HS2: 2.500 to 32.00 PU IEEE V Inverse
Zero seq filt HV: Enabled/Disabled IEEE E Inverse
Zero seq filt LV: Enabled/Disabled US Inverse
Zero seq filt TV: Enabled/Disabled US ST Inverse
Ih(2)%>: 5.000 to 50.000% I>1 Current Set: 0.08 to 4.00 In
Cross blocking: Enabled/Disabled I>1 Time Delay: 0.00 to 100.00 s
5th harm blocked: Enabled/Disabled I>1 TMS: 0.025 to 1.200
Ih(5)%>: 0 to 100.00% I>1 Time Dial: 0.01 to 100.00
Circuitry Fail: Enabled/Disabled I>1 K (RI): 0.10 to10.00
Is-cctfail>: 30.00e-3 to 1.000 PU I>1 Reset Char: DT/Inverse
K-cctfail: 0 to 50.00% I>1 tRESET: 0.00 to 100.00 s
tls-cctfail>: 0 to 10.00 s I>2 as I>1
I>3 Status: Disabled/Enabled
II>3 Current Set: 0.08 to 10.00 In
I>3 Time Delay: 0.00 to 100.00 s
I>4 as I>3
LV and TV windings same as HV winding

P642, P643 & P645 Technical Data Sheet 20 P642 software version 02J and P643/5 software version 02K
Thermal overload IN>2 same as IN>1
Mon't Winding: HV/LV/TV/Biased Current IN>3 Status: Disabled, DT
Ambient T: CLIO1 / CLIO2 / CLIO3 / CLIO4 / IN>3 Current: 0.08 to 32.00 In
AVERAGE IN>3 Time Delay: 0.00 to 200.00 s
Amb CLIO Type: 0-1 / 0-10 / 0-20 / 4-20 mA IN>4 same as IN>3
Amb CLIO Min: -9999 to +9999 LV and TV windings same as HV winding
Amb CLIO Max: -9999 to +9999
Average Amb T: -25.00 to +75.00 Cel The IDG curve is commonly used for time
Top Oil T: CLIO1 / CLIO2 / CLIO3 / CLIO4 delayed earth fault protection in the Swedish
/CALUCATED market. This curve is available in stage 1 of
Top Oil CLIO Typ: 0-1 / 0-10 / 0-20 / 4-20 mA the Earth Fault protection.
Top Oil CLIO Min: -9999 to +9999
The IDG curve is represented by the following
Top Oil CLIO Max: -9999 to +9999
equation:
IB: 0.1 to 4.0 PU
Rated NoLoadLoss: 0.1 to 100
⎛ Ι ⎞
TD
Hot Spot overtop: 0.1 to 200.0 Cel t = 5.8 - 1.35 loge ⎜ ⎟ in seconds
Top Oil overamb: 0.1 to 200.0 Cel ⎝ ΙN > Setting ⎠
Winding exp m: 0.01 to 2.0
Oil exp n: 0.01 to 2.0 Where:
Hot spot rise co: 0.01 to 2.0 min
Ι = Measured current
Top oil rise co: 1.0 to 1000.0 min
ΙN>Setting = An adjustable setting which
TOL Status: Enabled/Disabled
defines the start point of the
Hot Spot>1 to 3 Set: 1.0 to 300.0 Cel
characteristic
tHot Spot>1 to 3 Set: 0 to 60 k min
Top Oil>1 to 3 Set: 1.0 to 300.0 Cel Although the start point of the characteristic is
tTop Oil>1 to 3 Set: 0 to 60k min defined by the “ΙN>” setting, the actual relay
tPre-trip Set: 0 to 60 k min current threshold is a different setting called
LOL Status: Enabled/Disabled “IDG Ιs”. The “IDG Ιs” setting is set as a
Life Hours at HS: 1 to 300 000 hr multiple of “ΙN>”.
Designed HS temp: 1 to 200.0 Cel
Constant B Set: 1 to 100 000 An additional setting “IDG Time” is also used
FAA> Set: 0.1 to 300 min to set the minimum operating time at high
tFAA> Set: 0 to 60 k min levels of fault current.
LOL>1 Set: 0.1 to 300 hr
tLOL> Set: 0 to 60 k min 10

Rst Life Hours: 1 to 300 000 hr 9

IDG Is Setting Range

8
Operating time (seconds)

4-stage directional earth fault 6

HV winding 5

IN> Input: Measured / Derived 4

IN>1 Function: 3
IDG Time Setting Range
2
Disabled 1
DT 0
IEC S Inverse 1 10 100

IEC V Inverse I/IN>

P2242ENa

IEC E Inverse IDG Characteristic

UK LT Inverse
RI Through fault
IEEE M Inverse
Through Fault: Disabled/Enabled
IEEE V Inverse
Monitored Input: HV / LV / TV
IEEE E Inverse
TF I> Trigger: 0.08 to 20.00PU
US Inverse
TF I2t> Alarm: 0 to 500 000 A2s
US ST Inverse
IDG
IN>1 Current: 0.08 to 4 In
IN>1 IDG Is: 1 to 4 In
IN>1 Time Delay: 0.00 to 200.0 s
IN>1 TMS: 0.025 to 1.200
IN>1 Time Dial: 0.01 to 100.00
IN>1 K(RI): 0.1 to 10.00
IN>1 IDG Time: 1 to 2.00
IN>1 Reset Char: DT, Inverse
IN>1 tRESET: 0.00 to 100.00 s
P642, P643 & P645 Technical Data Sheet 21 P642 software version 02J and P643/5 software version 02K
 Overfluxing
Volts/Hz W2
V/Hz Alm Status: Disabled/Enabled
V/Hz Alarm Set: 1.5 to 3.5 V/Hz
V/Hz Alarm Delay: 0 to 6000 s
V/Hz>1 Status: Disabled/Enabled
V/Hz>1 Trip Func DT / IDMT
V/Hz>1 Trip Set: 1.5 to 3.5 V/Hz
V/Hz>1 Trip TMS: 0.01 to 12
V/Hz>1 Delay: 0 to 6000 s
V/Hz>1 tReset: 0 to 6000 s
V/Hz>2 Status: Disabled/Enabled
V/Hz>2 Trip Set: 1.5 to 3.5 V/Hz
V/Hz>2 Delay: 0 to 6000 s
TD V/Hz>3 and 4 same as V/Hz>2
TPre-trip Alarm: 1 to 6000.0 s
Frequency protection
Underfrequency
F<1 Status: Disabled/Enabled
F<1 Setting: 45.00 to 65.00 Hz
F<1 Time Delay: 0.1 to 100.0 s
F<2/3/4 as F<1
Overfrequency
F>1 Status: Disabled/Enabled
F>1 Setting: 45.00 to 68.00 Hz
F>1 Time Delay: 0.1 to 100.0 s
F>2 as F>1
RTD protection
Select RTD:
Bit 0 - Select RTD 1
Bit 1 - Select RTD 2
Bit 2 - Select RTD 3
Bit 3 - Select RTD 4
Bit 4 - Select RTD 5
Bit 5 - Select RTD 6
Bit 6 - Select RTD 7
Bit 7 - Select RTD 8
Bit 8 - Select RTD 9
Bit 9 - Select RTD 10
Binary function link string, selecting which
RTDs (1 - 10) are enabled.
RTD 1 Alarm Set: 0°C to 200°C
RTD 1 Alarm Dly: 0 s to 100 s
RTD 1 Trip Set: 0°C to 200°C
RTD 1 Trip Dly: 0 s to 100 s
RTD2/3/4/5/6/7/8/9/10 as RTD1
Input labels
Opto Input 1 to 32: Input L1 to Input L32
User-defined text string to describe the
function of the particular opto input.
Output labels
Relay 1 to 32: Output R1 to Output R32
User-defined text string to describe the
function of the particular relay output contact.
RTD labels
RTD 1-10: RTD1 to RTD10
User-defined text string to describe the
function of the particular RTD.
Current loop input
CLIO1 Input 1: Disabled/Enabled
CLI1 Input Type:
0 – 1 mA
0 – 10 mA
0 – 20 mA
4 – 20 mA
CLI1 Input Label: 16 characters (CLIO input 1)
CLI1 Minimum: -9999…+9999
CLI1 Maximum: -9999…+9999
CLI1 Alarm: Disabled/Enabled
CLI1 Alarm Fn: Over/Under
CLI1 Alarm Set: CLI1 min…CLI1 max
CLI1 Alarm Delay: 0.0…100.0 s
CLI1 Trip: Disabled/Enabled
CLI1 Trip Fn: Over/Under
CLI1 Trip Set: CLI1 min…CLI1 max
CLI1 Trip Delay: 0.0…100.0 s
CLI1 I< Alarm (4…20 mA input only):
Disabled/Enabled
CLI1 I< Alm Set (4…20 mA input only):
0.0…4.0 mA
CLI2/3/4 as CLI1

CB Fail & I<

I< Current Set: 0.02 to 3.200 In
CB Fail 1 Status: Disabled/Enabled
CB Fail 1 Timer: 0.00 to 10.00 s
CB Fail 2 Status: Disabled/Enabled
CB Fail 2 Timer: 0.00 to 10.00 s
CBF Non I Reset: I< Only, CB Open & I<, Prot
Reset & I<
CBF Ext Reset: I< Only, CB Open & I <, Prot
Reset & I<
P642, P643 & P645 Technical Data Sheet 22 P642 software version 02J and P643/5 software version 02K
Current loop output Single Phase Active Power:
CLO1 Output 1: Disabled/Enabled A Phase Watts*:
CLO1 Output Type: B Phase Watts*:
0 – 1 mA C Phase Watts*:
0 – 10 mA -2000 W…2000 W
0 – 20 mA Single Phase Reactive Power:
4 – 20 mA A Phase Vars*:
CLO1 Set Values: Primary/Secondary B Phase Vars*:
CLO1 Parameter: As shown below* C Phase Vars*
CLO1 Min: Range, step size and unit -2000 Var…2000 Var
corresponds to the selected parameter Single Phase Apparent Power:
CLO1 Max: Same as CLO1 Min A Phase VA*:
CLO2/3/4 as CLO1 B Phase VA*:
Current Loop Output Parameters C Phase VA*
Current Magnitude: 0…2000 VA TD
IA Magnitude Single Phase Power Factor:
IB Magnitude A Phase Power Factor*
IC Magnitude B Phase Power Factor*
IN Measured Mag (P642) C Phase Power Factor*
IN-1 Measured Mag (P643/5) -1…1
IN-2 Measured Mag (P643/5) 3 Phase Current Demands:
0.00…16.0 A… IA Fixed/Roll/Peak Demand*
I Sen Mag: 0.00… 2.0 A IB Fixed/Roll/Peak Demand*
Phase Sequence Components: IC Fixed/Roll/Peak Demand*
I1 Magnitude 0.00…16.0 A
I2 Magnitude 3ph Active Power Demands:
I0 Magnitude: 3Ph W Fix/Roll/Peak Demand*
0.00…16.0 A -6000 W…6000 W
Phase Currents: 3ph Reactive Power Demands:
IA RMS* 3Ph Vars Fix/Roll/Peak Dem*
IB RMS* -6000 Var…6000 Var
IC RMS* NPS Thermal: 0.00…200.0%
0.00…16.0 A Thermal Overload: 0.00…200.0%
P-P Voltage Magnitude: RTD 1-10*: -40°C…300.0°C
VAB Magnitude CL Input 1-4: -9999…9999.0
VBC Magnitude Volts/Hz: 0…20 V/Hz
VCA Magnitude
0.0…200.0 V Note 1: For measurements marked with an
P-N Voltage Magnitude: asterisk, the internal refresh rate is
VAN Magnitude nominally 1 s, others are 0.5 power
VBN Magnitude system cycles or less.
VCN Magnitude
0.0…200.0 V Note 2: The polarity of Watts, Var and power
Neutral Voltage Magnitude: factor is affected by the measurements
VN1 Measured Mag Mode setting.
VN Derived Mag
VN2 Measured Mag (P645) Note 3: These settings are for nominal 1 A and
0.0…200.0 V 100/120 V versions only. For other
VN 3rd Harmonic: 0.0…200.0 V (P643/5) versions they need to be multiplied
Phase Sequence Voltage Components: accordingly.
V1 Magnitude
V2 Magnitude Residual O/V NVD
V0 Magnitude VN>1 Status: Disabled/Enabled
0.0…200.0 V VN>1 Input: Derived
RMS Phase Voltages: VN> 1 Function:
VAN RMS* Disabled
VBN RMS* DT
VCN RMS* IDMT
0.0…200.0 V VN> 1 Voltage Set:
Frequency: 0.00…70.0 Hz 1…80 V (100/120 V)
3 Phase Watts*: -6000 W…6000 W 4…320 V (380/480 V)
3 Phase Vars*: -6000 Var…6000 Var VN> 1 Time Delay: 0.00…100.00 s
3 Phase VA*: 0…6000 VA VN>1 TMS: 0.5…100.0
3Ph Power Factor*: -1…1 VN> 1 tRESET: 0.00…100.00
P642, P643 & P645 Technical Data Sheet 23 P642 software version 02J and P643/5 software version 02K
 VN>2 as VN>1 Voltage protection
VN>3/4 as VN>1 except
VN>3/4 Input: VN1
VN>5/6 as VN>1 except Undervoltage
VN>5/6 Input: VN2 (P645) V< Measur’t Mode:
Phase-Phase
Phase-Neutral
Volts/Hz V< Operate Mode:
V/Hz Alarm Status: Disabled/Enabled Any Phase
V/Hz Alarm Set: Three Phase
1.50…3.500 V/Hz (100/120 V) V< 1 Function:
6…14.00 V/Hz (380/480 V) Disabled
V/Hz Alarm Delay: 0.00…100.0 s DT
V/Hz>1 Status: Disabled/Enabled IDMT
V/Hz Trip Func: V<1 Voltage Set:
TD DT 10…120 V (100/120 V)
IDMT 40…480 V (380/480 V)
V/Hz> 1 Trip Set: V<1 Time Delay: 0.00…100.00 s
1.500…3.500 V/Hz (100/120 V) V<1 TMS: 0.05…100.0
6…14.00 V/Hz (380/480 V) V<1 Poledead Inh: Disabled/Enabled
V/Hz> 1Trip TMS: 0.01…12.00 V<2 Function:
V/Hz> 1 Trip Delay: .0.00…600.0 s Disabled
V/Hz>2 Status: Disabled/Enabled DT
V/Hz>2 Trip Set: V<2 Status: Disabled/Enabled
1.500…3.500 V/Hz (100/120 V) V<2 Voltage Set:
6…14.00 V/Hz (380/480 V) 10…120 V (100/120 V)
V/Hz>2 Trip Delay: .0.00…600.0 s 40…480 V (380/480 V)
V/Hz>3/4 as V/Hz>2 V<2 Time Delay: 0.00…100.00 s
V<2 Poledead Inh: Disabled/Enabled
The inverse time characteristic has the
following formula: The inverse characteristic is given by the
TMS following formula:
t = K
(M - 1)2 t =
(1 - M)
Where:
V/f Where:
M =
( V/f Trip Setting ) K = Time multiplier setting
t = Operating time in seconds
V = Measured voltage M = Applied input voltage or relay setting
F = Measured frequency voltage
Note: The IDMT characteristic has been
changed in the 31 version software. The Overvoltage
new characteristic is compatible with the V> Measur’t Mode:
old one and allows the option of future Phase-Phase
expansion of the number of Phase-Neutral
characteristics with different exponents V> Operate Mode:
of (M-1). Any Phase
Three Phase
Inverse time characteristic in software version
30 and lower is as shown below: V> 1 Function:
0.18 * TMS Disabled
t = 0.8 + DT
(M - 1)2 IDMT
V>1 Voltage Set:
60…185 V (100/120 V)
240…740 V (380/480 V)
V>1 Time Delay: 0.00…100.00 s
V>1 TMS: 0.05…100.0
V>2 Status: Disabled/Enabled
V>2 Voltage Set:
60…185 V (100/120 V)
240…740 V (380/480 V)

P642, P643 & P645 Technical Data Sheet 24 P642 software version 02J and P643/5 software version 02K
V>2 Time Delay: 0.00…100.00 s I2-3 Magnitude (643, 5)
The inverse characteristic is given by the IN-TV Mea Mag (643, 5)
following formula: IN-TV Mea Ang (643, 5)
IN-TV Deriv Mag (643, 5)
K IN-TV Deriv Ang (643, 5)
t = I0-4 Magnitude (645)
(M - 1)
I1-4 Magnitude (645)
Where: I2-4 Magnitude (645)
I0-5 Magnitude
K = Time multiplier setting I1-5 Magnitude
t = Operating time in seconds I2-5 Magnitude
M = Applied input voltage/relay setting voltage IA-HV RMS
Iω-θV Phase Angle
Supervisory functions For each phase (ω = A, B, C and θ = H, L, T)
VAN Magnitude (643, 5) TD
VAN Phase Angle (643, 5)
Voltage transformer supervision VBN Magnitude (643, 5)
VTS Status: Blocking/Indication VBN Phase Angle (643, 5)
VTS Reset Mode: Manual/Auto VCN Magnitude (643, 5)
VTS Time Delay: 1.0…10.0 s VCN Phase Angle (643, 5)
VTS I> Inhibit: 0.08 In…32.0 In Vx Magnitude
VTS I2> Inhibit: 0.05 In…0.50 In Vx Phase Angle
Negative phase sequence voltage (V2): V1 Magnitude (643, 5)
10 V (100/120 V) V2 Magnitude (643, 5)
40 V (380/480 V) V0 Magnitude (643, 5)
Phase overvoltage: VN Derived Mag (643, 5)
Pick-up 30 V, VN Derived Angle (643, 5)
Drop-off 10 V (100/120 V) VAB Magnitude (643, 5)
Pick-up 120 V, VAB Phase Angle (643, 5)
Drop-off 40 V (380/480 V) VBC Magnitude (643, 5)
Superimposed Current: 0.1 In VBC Phase Angle (643, 5)
VCA Magnitude (643, 5)
Current transformer supervision VCA Phase Angle (643, 5)
Diff CTS: Enabled/Disabled VAN RMS (643, 5)
CTS Status: Restrain/Indication VBN RMS (643, 5)
CTS Time Delay: 0 to 10 s in 0.1 s steps VCN RMS
CTS I1: 5 to 100% in 1% steps Frequency
CTS I2/I1>1: 5 to 100% in 1% steps
CTS I2/I1>2: 5 to 100% in 1% steps Measurements 2
ϕ Phase Watts (643, 5)
Measurements list
ϕ Phase VArs (643, 5)
Measurements 1 ϕ Phase VA (643, 5)
Iϕ Magnitude All phase segregated power measurements,
Iϕ Phase Angle real, reactive and apparent (ϕ = A, B, C).
3 Phase Watts (643, 5)
For each phase (ϕ = A/A-1, B/B-1, C/C-1)
current measurements 3 Phase VArs (643, 5)
Iω-θV Magnitude 3 Phase VA (643, 5)
Iω-θV Phase Angle NPS Power S2 (643, 5)
For each phase (ω = A, B, C and θ = H, L, T) 3Ph Power Factor (643, 5)
IN-HV Mea Mag ϕPh Power Factor (643, 5)
IN-HV Mea Ang Independent power factor measurements for
IN-HV Deriv Mag all three phases (ϕ = A, B, C).
IN-HV Deriv Ang 3Ph WHours Fwd (643, 5)
I0-2 Magnitude 3Ph WHours Rev (643, 5)
I1-2 Magnitude 3Ph VArHours Fwd (643, 5)
I2-2 Magnitude 3Ph VArHours Rev (643, 5)
IN-LV Mea Mag 3Ph W Fix Demand (643, 5)
IN-LV Mea Ang 3Ph VArs Fix Dem (643, 5)
IN-LV Deriv Mag 3Ph W Roll Dem (643, 5)
IN-2 Derived Mag 3Ph VArs Roll Dem (643, 5)
IN-LV Deriv Ang 3Ph W Peak Dem (643, 5)
I0-3 Magnitude (643, 5) 3Ph VAr Peak Dem (643, 5)
I1-3 Magnitude (643, 5) Reset Demand: No/Yes (643, 5)

P642, P643 & P645 Technical Data Sheet 25 P642 software version 02J and P643/5 software version 02K
 Measurements 3
IA Differential
IB Differential
IC Differential
IA Bias
IB Bias
IC Bias
IA Diff 2H
IB Diff 2H
IC Diff 2H
IA Diff 5H
IB Diff 5H
IC Diff 5H
IREF HV LoZ Diff
TD IREF HV LoZ Bias
IREF LV LoZ Diff
IREF LV LoZ Bias
IREF TV LoZ Diff (643, 5)
IREF TV LoZ Bias (643, 5)
Hot Spot T
Top Oil T
Reset Thermal
Ambient T
TOL Pretrip left
LOL status
Reset LOL
Rate of LOL
LOL Aging Factor
Lres at designed
FAA,m
Lres at FAA,m
Volts/Hz W1 (643,5)
V/Hz W1 tPretrip (643,5)
V/Hz W1 Thermal (643,5)
Reset V/Hz W1 (643,5)
Volts/Hz W2
V/Hz W2 tPretrip
V/Hz W2 Thermal
Reset V/Hz W2
RTD1-10
RTD Open Cct
RTD Short Cct
RTD Data Error
Reset RTD Flags
CLIO Input 1-4

P642, P643 & P645 Technical Data Sheet 26 P642 software version 02J and P643/5 software version 02K
Case dimensions

Sealing
23.30 155.40 8 off holes Dia. 3.4 strip
AB BA

177.0

168.00
159.00 (4U)

AB BA

10.35 181.30 483 (19” rack)

202.00

Flush mounting panel

A = Clearance holes Panel cut-out detail
B = Mounting holes

200.00 Note: If mounting plate is required

use flush mounting cut out
dimensions

All dimensions in mm

Secondary cover (when fitted)

240.00
Front view Incl. wiring
In A 50/60 Hz E202519
Vx V UL
SER No. C US LISTED
V
IBD2
DIAG No. Vn V IND. CONT. EQ.

TRIP

ALARM
177.00

157.5
OUT OF
SERVICE

HEALTHY

max.
C = CLEAR
= READ
= ENTER

SK1 SK2 SK3

Side view
206.00 30.00

P1647ENb

P642 case dimensions (40TE case)

P642, P643 & P645 Technical Data Sheet 27 P642 software version 02J and P643/5 software version 02K
 Sealing
23.25 116.55 142.45 12 off holes Dia. 3.4 strip
AB A B BA

168.00
177.0
159.00 (4U)

AB B A BA

10.30 155.40 129.50 483 (19” rack)

305.50
A = Clearance holes
B = Mounting holes
303.50

All dimensions in mm

Secondary cover (when fitted)

240.00
Front view Incl. wiring

In A 50/60 Hz E202519
Vx V UL
SER No. C US LISTED
V
IBD2
DIAG No. Vn V IND. CONT. EQ.

TRIP
1 6
ALARM
177.00

157.5
OUT OF 2 7
SERVICE

HEALTHY

max.
3 8
C = CLEAR
= READ
= ENTER
4 9

5 10

SK1 SK2 SK3

309.60
Side view
30.00 P1616ENh

P643 case dimensions (60TE case)

74.9 116.55 142.45 12 off holes Dia. 3.4

AB A B BA
168.00

159.00 177.0
(4U)

AB B A BA
4.50
62.00 155.40 129.50 483 (19” rack)

408.90
A = Clearance holes
B = Mounting holes
406.90

All dimensions in mm

Front view Secondary cover (when fitted)

240.00
Incl. wiring
I n A 50/60 Hz E202519
Vx V UL
SER No. C US LISTED
V
IBD2
DIAG No. Vn V IND. CONT. EQ.

TRIP
1 6
ALARM
177.00

OUT OF
SERVICE 2 7

HEALTHY

C = CLEAR 3 8
= READ
= ENTER

157.5
4 9

max.
5 10

SK1 SK2 SK3

413.20
Side view
30.00
P1616ENg

P645 case dimensions (80TE case)

P642, P643 & P645 Technical Data Sheet 28 P642 software version 02J and P643/5 software version 02K
P64x external connection diagrams

P1727ENb

Comms. options MiCOM Px40 platform

P642, P643 & P645 Technical Data Sheet 29 P642 software version 02J and P643/5 software version 02K
 P4363ENa

Two bias input transformer differential (8 I/P & 8 O/P) with 1 pole VT input (40TE)

P642, P643 & P645 Technical Data Sheet 30 P642 software version 02J and P643/5 software version 02K
 P4363ENa

Two bias input transformer differential (8 I/P & 8 O/P + RTD) with 1 pole VT input (40TE)

P642, P643 & P645 Technical Data Sheet 31 P642 software version 02J and P643/5 software version 02K
 P4365ENa

Two bias input transformer differential (8 I/P & 8 O/P + CLIO) with 1 pole VT input (40TE)

P642, P643 & P645 Technical Data Sheet 32 P642 software version 02J and P643/5 software version 02K
 P4366ENa

Two bias input transformer differential (12 I/P & 12 O/P) with 1 pole VT input (40TE)

P642, P643 & P645 Technical Data Sheet 33 P642 software version 02J and P643/5 software version 02K
 P4354ENa

Two bias input transformer differential (8 I/P & 12 O/P) with 1 pole input (40TE)

P642, P643 & P645 Technical Data Sheet 34 P642 software version 02J and P643/5 software version 02K
 P4226ENa

Three bias input transformer differential (16 I/P & 16 O/P) with 4 pole VT inputs (60TE)

P642, P643 & P645 Technical Data Sheet 35 P642 software version 02J and P643/5 software version 02K
 P4227ENa

Three bias input transformer differential (16 I/P & 16 O/P) with 4 pole VT inputs (60TE)

P642, P643 & P645 Technical Data Sheet 36 P642 software version 02J and P643/5 software version 02K
 P4228ENa

Three bias input transformer differential (16 I/P & 16 O/P + RTD) with 4 pole VT inputs (60TE)

P642, P643 & P645 Technical Data Sheet 37 P642 software version 02J and P643/5 software version 02K
 P4229ENa

Three bias input transformer differential (16 I/P & 16 O/P + RTD) with 4 pole VT inputs (60TE)

P642, P643 & P645 Technical Data Sheet 38 P642 software version 02J and P643/5 software version 02K
 P4230ENa

Three bias input transformer differential (16 I/P & 16 O/P + CLIO) with 4 pole VT inputs (60TE)

P642, P643 & P645 Technical Data Sheet 39 P642 software version 02J and P643/5 software version 02K
 P4231ENa

Three bias input transformer differential (16 I/P & 16 O/P + CLIO) with 4 pole VT inputs (60TE)

P642, P643 & P645 Technical Data Sheet 40 P642 software version 02J and P643/5 software version 02K
 P4232ENa

Three bias input transformer differential (24 I/P & 16 O/P) with 4 pole VT inputs (60TE)

P642, P643 & P645 Technical Data Sheet 41 P642 software version 02J and P643/5 software version 02K
 P4233ENa

Three bias input transformer differential (24 I/P & 16 O/P) with 4 pole VT inputs (60TE)

P642, P643 & P645 Technical Data Sheet 42 P642 software version 02J and P643/5 software version 02K
 P4234ENa

Three bias input transformer differential (16 I/P & 24 O/P) with 4 pole VT inputs (60TE)

P642, P643 & P645 Technical Data Sheet 43 P642 software version 02J and P643/5 software version 02K
 P4235ENa

Three bias input transformer differential (16 I/P & 24 O/P) with 4 pole VT inputs (60TE)

P642, P643 & P645 Technical Data Sheet 44 P642 software version 02J and P643/5 software version 02K
 P4355ENa

Three bias input transformer differential (16 I/P & 20 O/P) with 4 pole VT input (60TE)

P642, P643 & P645 Technical Data Sheet 45 P642 software version 02J and P643/5 software version 02K
 P4356ENa

Three bias input transformer differential (16 I/P & 20 O/P) with 4 pole VT input (60TE)

P642, P643 & P645 Technical Data Sheet 46 P642 software version 02J and P643/5 software version 02K
 P4367ENa

Five bias input transformer differential (16 I/P & 16 O/P) with 4 pole VT inputs (60TE)

P642, P643 & P645 Technical Data Sheet 47 P642 software version 02J and P643/5 software version 02K
 P4368ENa

Five bias input transformer differential (16 I/P & 16 O/P) with 4 pole VT inputs (60TE)

P642, P643 & P645 Technical Data Sheet 48 P642 software version 02J and P643/5 software version 02K
 P4369ENa

Five bias input transformer differential (16 I/P & 16 O/P + RTD) with 4 pole VT inputs (60TE)

P642, P643 & P645 Technical Data Sheet 49 P642 software version 02J and P643/5 software version 02K
 P4370ENa

Five bias input transformer differential (16 I/P & 16 O/P + RTD) with 4 pole VT inputs (60TE)

P642, P643 & P645 Technical Data Sheet 50 P642 software version 02J and P643/5 software version 02K
 P4371ENa

Five bias input transformer differential (16 I/P & 16 O/P + CLIO) with 4 pole VT inputs (60TE)

P642, P643 & P645 Technical Data Sheet 51 P642 software version 02J and P643/5 software version 02K
 P4372ENa

Five bias input transformer differential (16 I/P & 16 O/P + CLIO) with 4 pole VT inputs (60TE)

P642, P643 & P645 Technical Data Sheet 52 P642 software version 02J and P643/5 software version 02K
 P4373ENa

Five bias input transformer differential (24 I/P & 16 O/P) with 4 pole VT inputs (60TE)

P642, P643 & P645 Technical Data Sheet 53 P642 software version 02J and P643/5 software version 02K
 P4374ENa

Five bias input transformer differential (24 I/P & 16 O/P) with 4 pole VT inputs (60TE)

P642, P643 & P645 Technical Data Sheet 54 P642 software version 02J and P643/5 software version 02K
 P4375ENa

Five bias input transformer differential (16 I/O & 24 O/P) with 4 pole VT inputs (60TE)

P642, P643 & P645 Technical Data Sheet 55 P642 software version 02J and P643/5 software version 02K
 P4376ENa

Five bias input transformer differential (16 I/P & 24 O/P) with 4 pole VT inputs (60TE)

P642, P643 & P645 Technical Data Sheet 56 P642 software version 02J and P643/5 software version 02K
 P4377ENa

Five bias input transformer differential (24 I/P & 24 O/P + CLIO & RTD ) with 4 pole VT inputs (80TE)

P642, P643 & P645 Technical Data Sheet 57 P642 software version 02J and P643/5 software version 02K
 P4378ENa

Five bias input transformer differential (24 I/O & 24 O/P + CLIO & RTD ) with 4 pole VT inputs (80TE)

P642, P643 & P645 Technical Data Sheet 58 P642 software version 02J and P643/5 software version 02K
 P4357ENa

Five bias input transformer differential (24 I/P & 20 O/P) with 4 pole VT input (60TE)

P642, P643 & P645 Technical Data Sheet 59 P642 software version 02J and P643/5 software version 02K
 P4358ENa

Five bias input transformer differential (24 I/P & 20 O/P) with 4 pole VT input (60TE)

P642, P643 & P645 Technical Data Sheet 60 P642 software version 02J and P643/5 software version 02K
 P4359ENa

Five bias input transformer differential (24 I/P & 20 O/P + CLIO & RTD) with 4 pole VT input (60TE)

P642, P643 & P645 Technical Data Sheet 61 P642 software version 02J and P643/5 software version 02K
 P4360ENa

Five bias input transformer differential (24 I/P & 20 O/P + CLIO & RTD) with 4 pole VT input (80TE)

P642, P643 & P645 Technical Data Sheet 62 P642 software version 02J and P643/5 software version 02K
 P4361ENa

Five bias input transformer differential (16 I/P & 24 O/P + CLIO & RTD) with 4 pole VT input (80TE)

P642, P643 & P645 Technical Data Sheet 63 P642 software version 02J and P643/5 software version 02K
 P4362ENa

Five bias input transformer differential (16 I/P & 24 O/P + CLIO & RTD) with 4 pole VT input (80TE)

P642, P643 & P645 Technical Data Sheet 64 P642 software version 02J and P643/5 software version 02K
 P4379ENa

P642 assembly relay (40TE)

P642, P643 & P645 Technical Data Sheet 65 P642 software version 02J and P643/5 software version 02K
 P4380ENa

P643 and P645 assembly relay (60TE)

P642, P643 & P645 Technical Data Sheet 66 P642 software version 02J and P643/5 software version 02K
 P4381ENa

P643 and P645 assembly relay (60TE)

P642, P643 & P645 Technical Data Sheet 67 P642 software version 02J and P643/5 software version 02K
 P4382ENa

P643 and P645 assembly relay (60TE)

P642, P643 & P645 Technical Data Sheet 68 P642 software version 02J and P643/5 software version 02K
 P4383ENa

P645 assembly relay (80TE)

P642, P643 & P645 Technical Data Sheet 69 P642 software version 02J and P643/5 software version 02K
 P4384ENa

P645 assembly relay (80TE)

P642, P643 & P645 Technical Data Sheet 70 P642 software version 02J and P643/5 software version 02K
 P4386ENa

P645 assembly relay (80TE)

P642, P643 & P645 Technical Data Sheet 71 P642 software version 02J and P643/5 software version 02K
Ordering information
1234 5 6 7 8 9 10 11 12 13 14 15
MiCOM P642 transformer protection P642 0

Auxiliary voltage rating

24 – 48 V dc only 1
48 – 110 V dc (40 – 100 V ac) 2
110 – 250 V dc (100 – 240 V ac) 3
In/Vn rating
HV-LV In=1A/5A, Vn=(100/120 V)(8CT/1VT) 1
Hardware options
Nothing 1
IRIG-B only (modulated) 2
Fiber optic converter only 3
IRIG-B (modulated)& fiber optic converter 4
Ethernet with 100Mbit/s fiber-optic port 6
Second Rear Comms Port (Courier EIA232/EIA485/k-bus) 7
Second Rear Comms Port + IRIG-B (Courier EIA232/EIA485/k-bus) 8
Ethernet (100Mbit/s) + IRIG-B (modulated) A
Ethernet (100Mbit/s) + IRIG-B (de-modulated) B
IRIG-B (de-modulated) C
Product specific
Size 8 (40TE) case, 8 optos + 8 relays A
Size 8 (40TE) case, 8 optos + 8 relays + RTD B
Size 8 (40TE) case, 8 optos + 8 relays + CLIO C
Size 8 (40TE) case, 12 optos + 12 relays D
Protocol options
K-Bus/Courier 1
Modbus 2
IEC60870-5-103 3
DNP3.0 4
IEC 61850-8-1 6
Mounting

Panel mounting M
Language
Multilingual – English, French, German, Spanish 0
English, French, German, Russian 5
Chinese, English or French via HMI, with English or French only via Communications port C
Software version
Unless specified the latest version will be delivered * *
Settings file
Default 0
Hardware suffix
Phase 2 CPU J

Note design suffix

J = Phase 2 CPU and front panel with 2 hotkeys and dual characteristic optos
Note mounting
For rack mounting assembled single rack frames and blanking plates are available

P642, P643 & P645 Technical Data Sheet 72 P642 software version 02J and P643/5 software version 02K
 1234 5 6 7 8 9 10 11 12 13 14 15
MiCOM P643 Transformer Protection P643 0

Auxiliary voltage rating

24 – 48 V dc only 1
48 – 110 V dc (40 – 100 V ac) 2
110 – 250 V dc (100 – 240 V ac) 3
In/Vn rating
HV-LV In=1A/5A, Vn=(100/120 V)(12CT/1VT) 1
HV-LV In=1A/5A, Vn=(100/120 V)(12CT/4VT) 2
Hardware options
Nothing 1
IRIG-B only (modulated) 2
Fiber optic converter only 3
IRIG-B (modulated)& fiber optic converter 4
Ethernet with 100Mbit/s fiber-optic port 6
Second Rear Comms Port (Courier EIA232/EIA485/k-bus) 7
Second Rear Comms Port + IRIG-B (Courier EIA232/EIA485/k-bus) 8
Ethernet (100Mbit/s) + IRIG-B (modulated) A
Ethernet (100Mbit/s) + IRIG-B (de-modulated) B
IRIG-B (de-modulated) C
Product specific
Size 12 (60TE) case, 16 optos + 16 relays A
Size 12 (60TE) case, 16 optos + 16 relays + RTD B
Size 12 (60TE) case, 16 optos + 16 relays + CLIO C
Size 12 (60TE) case, 24 optos + 16 relays D
Size 12 (60TE) case, 16 optos + 24 relays E
Protocol options
K-Bus/Courier 1
Modbus 2
IEC60870-5-103 3
DNP3.0 4
IEC 61850-8-1 6
Mounting

Panel mounting M
Language
Multilingual – English, French, German, Spanish 0
English, French, German, Russian 5
Chinese, English or French via HMI, with English or French only via Communications port C
Software version
Unless specified the latest version will be delivered * *
Settings file
Default 0
Hardware suffix
Extended Phase 2 CPU K

Note design suffix

K = Extended phase 2 CPU (phase 2 CPU and front panel with 10 function keys and tri-color LEDs and dual characteristic
optos)
Note mounting
For rack mounting in the 60TE case size assembled single rack frames and blanking plates are available

P642, P643 & P645 Technical Data Sheet 73 P642 software version 02J and P643/5 software version 02K
 1234 5 6 7 8 9 10 11 12 13 14 15
MiCOM P645 Transformer Protection P645 0

Auxiliary voltage rating

24 – 48 V dc only 1
48 – 110 V dc (40 – 100 V ac) 2
110 – 250 V dc (100 – 240 V ac) 3
In/Vn rating
HV-LV In=1A/5A, Vn=(100/120 V)(18CT/1VT) 1
HV-LV In=1A/5A, Vn=(100/120 V)(18CT/4VT) 2
Hardware options
Nothing 1
IRIG-B only (modulated) 2
Fiber optic converter only 3
IRIG-B (modulated)& fiber optic converter 4
Ethernet with 100Mbit/s fiber-optic port 6
Second Rear Comms Port (Courier EIA232/EIA485/k-bus) 7
Second Rear Comms Port + IRIG-B (Courier EIA232/EIA485/k-bus) 8
Ethernet (100Mbit/s) + IRIG-B (modulated) A
Ethernet (100Mbit/s) + IRIG-B (de-modulated) B
IRIG-B (de-modulated) C
Product specific
Size 12 (60TE) case, 16 optos + 16 relays A
Size 12 (60TE) case, 16 optos + 16 relays + RTD B
Size 12 (60TE) case, 16 optos + 16 relays + CLIO C
Size 12 (60TE) case, 24 optos + 16 relays D
Size 12 (60TE) case, 16 optos + 24 relays E
Size 16 (80TE) case, 24 optos + 24 relays F
Size 16 (80TE) case, 24 optos + 24 relays + RTD G
Size 16 (80TE) case, 24 optos + 24 relays + CLIO H
Size 16 (80TE) case, 24 optos + 24 relays + RTD + CLIO J
Protocol options
K-Bus/Courier 1
Modbus 2
IEC60870-5-103 3
DNP3.0 4
IEC 61850-8-1 6
Mounting
Panel mounting M
Rack mounting N
Language
Multilingual – English, French, German, Spanish 0
English, French, German, Russian 5
Chinese, English or French via HMI, with English or French only via Communications port C
Software version
Unless specified the latest version will be delivered * *
Settings file
Default 0
Hardware suffix
Extended Phase 2 CPU K

* Note design suffix

K = Extended phase 2 CPU (phase 2 CPU and front panel with 10 function keys and tri-color LEDs and dual characteristic
optos)

P642, P643 & P645 Technical Data Sheet 74 P642 software version 02J and P643/5 software version 02K
 1234 5 6 7 8 9 10 11 12 13 14 15
MiCOM P642 Transformer Protection P642

Auxiliary voltage rating

24 – 48 V dc only 1
48 – 110 V dc (40 – 100 V ac) 2
110 – 250 V dc (100 – 240 V ac) 3
In/Vn rating
HV-LV In=1A/5A, Vn=(100/120 V)(8CT/1VT) 1
Hardware options
Nothing 1
IRIG-B only (modulated) 2
Fiber optic converter only 3
IRIG-B (modulated)& fiber optic converter 4
Ethernet with 100Mbit/s fiber-optic port 6
Second Rear Comms Port (Courier EIA232/EIA485/k-bus) 7
Second Rear Comms Port + IRIG-B (Courier EIA232/EIA485/k-bus) 8
Ethernet (100Mbit/s) + IRIG-B (modulated) A
Ethernet (100Mbit/s) + IRIG-B (de-modulated) B
IRIG-B (de-modulated) C
Product specific
Size 8 (40TE) case, 8 optos + 8 relays A
Size 8 (40TE) case, 8 optos + 8 relays + RTD B
Size 8 (40TE) case, 8 optos + 8 relays + CLIO C
Size 8 (40TE) case, 12 optos + 12 relays D
Size 8 (40TE) Case, 8 Optos + 12 Relays (including 4 High Break) E
Protocol options
K-Bus/Courier 1
Modbus 2
IEC60870-5-103 3
DNP3.0 4
IEC 61850-8-1 6
Mounting

Panel mounting M
Language
Multilingual – English, French, German, Spanish
0
English, French, German, Russian
5
Chinese, English or French via HMI, with English or French only via
C
Communications port
Software version
Unless specified the latest version will be delivered * *
Settings file
Default 0
Hardware suffix
Phase 2 CPU J

Note design suffix

J = Phase 2 CPU and front panel with 2 hotkeys and dual characteristic optos
Note mounting
For rack mounting assembled single rack frames and blanking plates are available

P642, P643 & P645 Technical Data Sheet 75 P642 software version 02J and P643/5 software version 02K
 1234 5 6 7 8 9 10 11 12 13 14 15
MiCOM P643 Transformer Protection P643 0

Auxiliary voltage rating

24 – 48 V dc only 1
48 – 110 V dc (40 – 100 V ac) 2
110 – 250 V dc (100 – 240 V ac) 3
In/Vn rating
HV-LV In=1A/5A, Vn=(100/120 V)(12CT/1VT) 1
HV-LV In=1A/5A, Vn=(100/120 V)(12CT/4VT) 2
Hardware options
Nothing 1
IRIG-B only (modulated) 2
Fiber optic converter only 3
IRIG-B (modulated)& fiber optic converter 4
Ethernet with 100Mbit/s fiber-optic port 6
Second Rear Comms Port (Courier EIA232/EIA485/k-bus) 7
Second Rear Comms Port + IRIG-B (Courier EIA232/EIA485/k-bus) 8
Ethernet (100Mbit/s) + IRIG-B (modulated) A
Ethernet (100Mbit/s) + IRIG-B (de-modulated) B
IRIG-B (de-modulated) C
Product specific
Size 12 (60TE) case, 16 optos + 16 relays A
Size 12 (60TE) case, 16 optos + 16 relays + RTD B
Size 12 (60TE) case, 16 optos + 16 relays + CLIO C
Size 12 (60TE) case, 24 optos + 16 relays D
Size 12 (60TE) case, 16 optos + 24 relays E
Size 12 (60TE) case, 16 optos + 20 relays (including 4 High Break) F
Protocol options
K-Bus/Courier 1
Modbus 2
IEC60870-5-103 3
DNP3.0 4
IEC 61850-8-1 6
Mounting

Panel mounting M
Language
Multilingual – English, French, German, Spanish
0
English, French, German, Russian
5
Chinese, English or French via HMI, with English or French only via
C
Communications port
Software version
Unless specified the latest version will be delivered * *
Settings file
Default 0
Hardware suffix
Extended Phase 2 CPU K

Note design suffix

K = Extended phase 2 CPU (phase 2 CPU and front panel with 10 function keys and tri-color LEDs and dual characteristic
optos)
Note mounting
For rack mounting in the 60TE case size assembled single rack frames and blanking plates are available

P642, P643 & P645 Technical Data Sheet 76 P642 software version 02J and P643/5 software version 02K
 1234 5 6 7 8 9 10 11 12 13 14 15

MiCOM P645 Transformer Protection P645 0

Auxiliary voltage rating

24 – 48 V dc only 1
48 – 110 V dc (40 – 100 V ac) 2
110 – 250 V dc (100 – 240 V ac) 3
In/Vn rating
HV-LV In=1A/5A, Vn=(100/120 V)(18CT/1VT) 1
HV-LV In=1A/5A, Vn=(100/120 V)(18CT/4VT) 2
Hardware options
Nothing 1
IRIG-B only (modulated) 2
Fiber optic converter only 3
IRIG-B (modulated)& fiber optic converter 4
Ethernet with 100Mbit/s fiber-optic port 6
Second Rear Comms Port (Courier EIA232/EIA485/k-bus) 7
Second Rear Comms Port + IRIG-B (Courier EIA232/EIA485/k-bus) 8
Ethernet (100Mbit/s) + IRIG-B (modulated) A
Ethernet (100Mbit/s) + IRIG-B (de-modulated) B
IRIG-B (de-modulated) C
Product specific
Size 12 (60TE) case, 16 optos + 16 relays A
Size 12 (60TE) case, 16 optos + 16 relays + RTD B
Size 12 (60TE) case, 16 optos + 16 relays + CLIO C
Size 12 (60TE) case, 24 optos + 16 relays D
Size 12 (60TE) case, 16 optos + 24 relays E
Size 16 (80TE) case, 24 optos + 24 relays F
Size 16 (80TE) case, 24 optos + 24 relays + RTD G
Size 16 (80TE) case, 24 optos + 24 relays + CLIO H
Size 16 (80TE) case, 24 optos + 24 relays + RTD + CLIO J
Size 12 (60TE) case, 16 optos + 20 relays (including 4 high break) K
Size 16 (80TE) case, 24 optos + 20 relays (including 4 high break) L
Size 16 (80TE) case, 24 optos + 20 relays (including 4 high break) + RTD M
Size 16 (80TE) case, 24 optos + 20 relays (including 4 high break) + CLIO (mA I/O) N
Size 16 (80TE) case, 24 optos + 20 relays (including 4 high break) + RTD + CLIO (mA I/O) P
Size 16 (80TE) case, 16 optos + 24 relays (including 8 high break) Q
Size 16 (80TE) case, 16 optos + 24 relays (including 8 high break) + RTD R
Size 16 (80TE) case, 16 optos + 24 relays (including 8 high break) + CLIO (mA I/O) S
Size 16 (80TE) case, 16 optos + 24 relays (including 8 high break) + RTD + CLIO (mA I/O) T
Protocol options
K-Bus/Courier 1
Modbus 2
IEC60870-5-103 3
DNP3.0 4
IEC61850-8-1 6
Mounting
Panel mounting M
Rack mounting N
Language
Multilingual – English, French, German, Spanish 0
English, French, German, Russian 5
Chinese, English or French via HMI, with English or French only via Communications port C
Software version

Unless specified the latest version will be delivered * *

Settings file

Default 0

Hardware suffix

Extended Phase 2 CPU K

* Note design suffix

K = Extended phase 2 CPU (phase 2 CPU and front panel with 10 function keys and tri-color LEDs and dual characteristic optos)

P642, P643 & P645 Technical Data Sheet 77 P642 software version 02J and P643/5 software version 02K

AREVA T&D Worldwide Contact Centre:
http://www.areva-td.com/contactcentre/
Tel.: +44 (0) 1785 250 070
www.areva-td.com
www.areva-td.com/protectionrelays
AREVA TRACK RECORD -
TRANSFORMER PROTECTION
>> Over 15 000 MiCOM transformer differential relays supplied since 2001.
>> MiCOM P642, P643, P645 range advances on this technology.
>> Large installed base and pedigree of transformer differential relay
supply, with models including DTH, MBCH, MX3DPT, KBCH, PQ
and MiCOM.
>> Over 80 000 units of such relay types are in-service, worldwide.
>> Couple P64x with MiCOM P12x/P14x feeder solutions and KVGC
voltage regulation for a full transformer protection and control
solution.
AUTOMATION-L3-P642-3-5-BR-07.08-1887-GB - © - AREVA - 2008. AREVA, the AREVA logo and any alternative version thereof are trademarks and service marks of AREVA. MiCOM is a registered trademark of AREVA.
All trade names or trademarks mentioned herein whether registered or not, are the property of their owners. - 389191982 RCS PARIS - Printed in France - SONOVISION-ITEP
Our policy is one of continuous development. Accordingly
the design of our products may change at any time. Whilst
every effort is made to produce up to date literature, this
brochure should only be regarded as a guide and is
intended for information purposes only. Its contents do not
constitute an offer for sale or advise on the application of
any product referred to in it. We cannot be held responsible
for any reliance on any decisions taken on its contents
without specific advice.