HOW A COMPUTER PROCESSOR WORK

How a Computer Processor Work

Agus. Ramadona

University of the People

Note

Agus Ramadona, Departement of Computer Science, University of The People

Correspondence concerning this article should be addressed to Agus Ramadona, Departement of

computer Science, University of The People, 225 S Lake Ave Suite 300, Pasadena, CA 91101,

USA

Contact: agusramadona@gmail.com
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Abstract

This paper is made to explain how a computer architecture is built and how the data manipulation

process occurs in a computing cycle on a processor. The way the computer works in this paper is

a Stored Program Concept computer architecture formulated by several mathematicians in 1930

which was later implemented in the Universal Turing Machine (1936) and Von Neumann Machine

in 1945 (Nisan & Schocken, 2005).

Keywords: stored program concept computer architecture, how computer processor work
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How a Computer Processor Work

Computer based on von Neumann's concept is a device that receives input, processes data,

stores data, and provides output ("George Mason University", nd). Basically the computer consists

of several main components, namely Input/Output, Central Processing Unit, Memory and

connected using buses as in the following figure ("Southern Cross University", 1999):

Figure 1 – Basic Computer Architecture

The processor on a modern computer known as the Central Processor Unit (CPU), a major

component of a computer device to do computations. In the processor there are components that

have certain functions and are interrelated when running programs in each work cycle known as

the Fetch Decode Execute Cycle. To be able to understand how the processor works, we need to

know what components are included in it, the functions and how it works.

Inside a CPU there are components like the following:

a. Arithmetic Logical Unit

b. Program Counter and Clock

c. Control Unit

d. Instruction Decoder

e. Control Codes
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I. Arithmetic Logical Unit

On the processor there is a component called Arithmetic Logical Unit which functions to

perform mathematical and logical calculations. ALU has basic functions such as: Addition,

Subtraction, logic AND, logic OR, etc. To describe an ALU we can use abstractions like the

following picture:

Figure 2 – ALU

In ALU there are several functions, namely:

a. Inputs that will be processed by ALU are called Operands.

b. Control called Operation Code (OpCode) or Control Code.

c. Flags or Status are needed such as: Zero, Sign (positive or negative), Carry, etc.

II. Program Counter and Clock

The Clock component provides pulses with a certain speed where every 1 pulse the

computer performs one process called Fetch Decode Execute Cycle. Clock speed rate is in Hz

units.

The program counter works along with the clock pulse, where each clock pulse Program

Counter will retrieve memory location information for further instructions, after obtaining the
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memory address then program counter will send the information to the memory address register

(MAR).

III. Control Unit

The Control Unit component has the responsibility of decoding instructions received and

regulating how to mobilize data throughout the computer system.

IV. Instruction Decoder

As mentioned earlier, on a CPU there is a component called Control Unit, in this control

unit there is one function called Instruction Decoder, which is a function that translates

instructions word into binary format understood by the ALU.

V. Work Cycle inside the Processor

After getting to know the components in a processor and their functions, the linkages

between these components occur sequentially in each cycle called the Fetch Decode Execute

Cycle. To understand how the sequences and work processes of these components we can give

examples of what happened to these components in a operating cycle of addition below.

Example:

We want the computer to perform addition of 5 + 2, the program that serves the addition then

translates the instruction into assembly language as follows:

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The two input (Operands) that we enter are placed in the memory address:

LOAD 5 [3] // Enter 5 to memory address 3

LOAD 2 [4] // Enter 2 to memory address 4

The addition instructions (OpCode) are then placed on the memory address:

LOAD [3] [99] // Instruction "retrieve data from memory address 3" |placed at: memory address 99

ADD [4] [100] // Instruction "do addition with value on memory address 4" |placed at: memory address 100

STORE [5] [101] // Instruction "write the result to memory address 5" |placed at: the memory address 101

The process that occurs in the addition of 5 + 2 above is as follows:

Note: In this example the language is used to make it easy to understand, in fact all memory

addresses, instructions and data in memory are in binary form.

Let assume now the computer has reached a number of operating cycles according to the clock

pulse, and currently the "Program Counter" gives a value of "99", which means the processor

must execute instructions on the memory address “99”, before the instructions on the memory

address "99" can be retrieved, the Program Counter will place the value "99" to the Memory

Address Register (MAR), after the value "99" is placed on MAR, we found the instruction is to

retrieve data in "memory address 3" or "LOAD [3]", instruction "LOAD [3]" is then placed on

the Memory Data Register (MDR), this is the stage called "Fetch".

After the instruction on memory address 99 which is "LOAD [3]" is on MDR, to give a sign of

the stage of the current process, the Counter Program will also place the instructions "LOAD [3]"

into the Current Instruction Register. When the instruction "LOAD [3]" is already in the Current
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Instruction Register, the Counter Program automatically add 1 from the previous value (99+1) so

it become 100, which means the next instruction is at the memory address 100.

Continuing the previous process, the instruction "LOAD [3]" is then placed in the Control Unit,

here is where "Decoding" the instruction "LOAD [3]" so it can be understood by the ALU, when

Control Unit reads the instruction "LOAD [3]", Control Unit will place the memory address "3"

on the MAR and retrieve the data on the memory address that is "5" and place it on the MDR.

This "5" also then placed in the "accumulator".

As we know before, the Counter Program currently contains a value of 100, which means the

next instruction is at memory address 100, the Program Counter then put "100" to MAR and read

the instruction like "do addition with data in memory address 4" or "ADD [ 4] ", the "ADD [4]"

instruction is then placed on MDR, again a " Fetch " process occurs.

After the instructions on memory address 100, namely "ADD [4]" are in MDR, the Counter

Program again places the "ADD [4]" instruction into the Current Instruction Register, after that

the Counter Program add 1 from the previous value (100+1) to become 101, which means the

next instruction is at memory address 101.

The "ADD [4]" instruction is then placed in the Control Unit, and "Decoding" the instruction so

it can be understood by the ALU, the Control Unit then sends the "ADD" instruction and puts the

value "5" in the accumulator, then the Control Unit places memory address "4" on MAR and

takes the existing data which is "2" and put it on the MDR, the value "2" is then placed in the
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"Accumulator", then the ALU do the addition of " 5 " and " 2 " and holding the result " 7 "and

write it to the accumulator with the value" 7 ".

Again we know that the Counter Program currently contains a value of 101, which means the

next instruction is at memory address 101, the Program Counter then put the value "101" on the

MAR and read the instruction "put the result to the memory address 5" or "STORE [5 ] ", this

instruction is then placed on MDR.

After the instruction in memory address 101 that is "STORE [5]" is in the MDR, the Counter

Program again put the "STORE [5]" instruction into the Current Instruction Register, and again

add 1 from the previous value (101+1) to 102, which means the next instruction is at memory

address 102.

The "STORE [5]" instruction is then placed in the Control Unit, then "Decoding" the "STORE

[5]" instruction, the Control Unit then put the value in the accumulator which is "7" to the MDR

then writes the value "7" at the memory address "5".

Until here the addition of 5 + 2 is finally complete, from the explanation above it feels very long

and time consuming but in reality this process cycle occurs so fast in the CPU according to the

clock speed it has.

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References:

Nisan & Schocken, (2005). The Element of Computing Systems: Building a Modern Computer

from First Principles. Cambridge, MA: The MIT Press.

George Mason University, (n.d). History of Computing. Retrieved from:

http://mason.gmu.edu/~montecin/computer-hist-web.htm.

Southern Cross University, (1999). Basic Computer Design. Retrieved from:

http://spike.scu.edu.au/~barry/dp234/dp234-t1.html