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Development Computer Software Requirement for

Speedgoat real-time simulation and testing

Supported Platforms

MathWorks Toolbox Requirements(R2018b)

Prior to setting up your target machine please ensure you have at least the following MathWorks
software installed on your development computer:
MATLAB (32-bit or 64-bit)
Simulink Coder
Simulink Real-Time
HDL Coder + Fixed-Point Designer is required for HDL Coder Workflow*.

C Compiler
Simulink Real-Time lets you automatically create real-time applications from Simulink models. This
automated C code generation process requires a valid Visual Studio compiler installation on your
development PC.
The following table shows which versions of Visual Studio compilers are supported by Simulink® Real-
Time™ in which MATLAB releases:

R2016a R2016b R2017b R2018b

MATLAB release R2017a R2018a

VS2010 and SDK 7.1 VS2012 VS2013 VS2015

Supported VS2012 VS2013 VS2015 VS2017
compilers VS2013 VS2015 VS2017

Xilinx HDL software

If you use Simulink-Programmable FPGA I/O modules together with HDL Coder from MathWorks, the
following Xilinx software must be installed:

I/O Module Software Comments

IO323 If a current Xilinx ISE license is
not available, Xilinx Vivado
Design Suite (including Xilinx
Xilinx ISE Design Suite 14.7 ISE Design Suite 14.7) must
be purchased. The same
license file can be used for
IO331 Xilinx ISE Design Suite 14.7 both products.

IO332-200k Xilinx Vivado Design Suite:

R2017b: Version 2017.2
R2018a: Version 2017.2
R2018b: Version 2017.4
IO333-325k Xilinx Vivado Design Suite:
IO333-325k-SFP R2017b: Version 2017.2
IO333-410k R2018a: Version 2017.2
IO333-410k-SFP R2018b: Version 2017.4
IO334-325k Xilinx Vivado Design Suite:
R2018a: Version 2017.2
R2018b: Version 2017.4
IO335-325k Xilinx Vivado Design Suite:
R2017b: Version 2017.2
R2018a: Version 2017.2
R2018b: Version 2017.4
IO342-1080k Xilinx Vivado Design Suite:
IO342-1450k R2017b: Version 2016.4
R2018a: Version 2017.2
R2018b: Version 2017.4
IO397-50k Xilinx Vivado Design Suite:
R2017b: Version 2017.2
R2018a: Version 2017.2
R2018b: Version 2017.4
Further details on how to use Simulink-Programmable FPGA I/O modules can be found within the
extensive HDL Coder documentation on the Speedgoat webpage.
Additional information is available in the MathWorks HDL Coder documentation: HDL Coder (web)

*You can equip a Speedgoat target computer system with FPGA plug-in modules via its available PCI
expansion bus slots. With Simulink Real-Time, you can leverage the FPGA’s capability to run HDL code
as hardware and the capability of HDL Coder to generate HDL code from Simulink models(Automatic
HDL Code generation) . This combination enables you to use FPGA plug-in modules in target computer
systems as an additional resource for concurrent execution.

Using the Simulink Coder or HDL Coder, you can decide in your Simulink model, whether you want to
execute your application or parts of it on the CPU, or on one of the FPGAs.

Speedgoat Software: (Will be provided by Speedgoat based on I/O Configuration)

Install the Speedgoat library on all development computers connecting to the Speedgoat real-time target
machine. The Speedgoat library provides functions and driver blocks for all Speedgoat products including
I/O, communication protocols, code modules and real-time target machines. Additional optional software
depending on purchased Speedgoat products include custom implementations for Speedgoat
configurable FPGA I/O modules, and Speedgoat HDL Coder integration packages for Simulink-
Programmable FPGA I/O modules.