Beruflich Dokumente
Kultur Dokumente
4th SEMESTER
Architecture of 8051
The 8051 group of microcontroller includes a family of microcontrollers having numbers
ranging from 8031 to 8751 and are available in NMOS or CMOS construction.
Arithmetic and
Logic unit PSW SFR’s and I/O
LAT POR
CH T0 A0-A7
RAM D0-D1
A B 8 bit data/
address bus LAT PO
CH RT1 I/O
DPTR
ROM
LAT PO I/O
DPL CH RT2 A8-A15
PC
DPH
16 bit address bus
I/O
Interrupt
LAT PO
CH RT3 Serial Data
EA RD-WR
System Byte/Bit
ALE timing addresses
PSEN
SFR’S
Register
XTAL1 bank 3 IE Port 3
System IP
XTAL2
interrupts Register memory
RESET bank 2 PCON control
timers
SBUF
Register
VCC Data buffers bank 1 SCON
GND Memory Register TCON
Control bank 0 TMOD
TL0
TL0
TL1
TL1
The 8051 oscillator and clock: All the internal operations of 8051 are synchronized by
connecting an external resonant network (an oscillator). Pins XTAL1 and XTAL2 are used to
connect an external clock to 8051, which forms basic internal clock frequency. The time
required for one cycle of instruction is 1/12th the clock frequency. Typically quartz crystal and
capacitors are used as external clocks.
Program counter and Data pointer: Program counter (PC) and data pointer are two 16-bit
registers. PC points to the program instruction byte in ROM and is incremented after every
instruction. It does not have an internal address. Data pointer is used to provide address for
internal and external code access and data access. It is internally made of two 8-bit registers
DPH and DPL.
A and B registers: A (the accumulator) is the most frequently used register for many
arithmetic, Boolean and bit manipulation operations. B register is used along with A for
multiplication and division operations.
Program status word: The PSW register is again an 8-bit register containing math flag, user
defined flag, and register select bits that identifies which of 4-bit register is used.
Internal RAM: The 8051 microcontroller has a 128B internal RAM which is distinguished to
three areas:
First 32 bytes from 00h to 1Fh, which form 32 8-bit registers, organized as four banks
of eight registers each.
Next 16 bytes of bit addressable RAM, from locations 20h to2Fh, providing a total of
128 addressable bits.
A general purpose RAM above, from locations 30h to 7Fh
Internal ROM: The program memory is stored in 4KB of on-chip ROM. PC is normally used to
address bytes from 0000h to FFFFh. Once code exceeds the on chip ROM the 8051
automatically fetches code from external memory.
The stack and stack pointer: The stack is an area of internal Ram which is used to store and
retrieve data quickly. The 8051 provides an 8-bit SP to hold an internal RAM address which
points to top of the stack. SP increments before data is placed stack and always holds the
address of last byte of data stored on stack.
I/O pins and ports: Commercially available 8051 occurs in a 40 pin DIP package. Of the 40
pins, 24 pins may be used for two alternate functions, giving a total pin count of 64. The
function for which these pins are used is determined by what it is connected to and program
demands from it. 8051 has four ports each made of eight pins. Each port-pin has a D-latch
attached to it. Each port has a SFR attached to it made of these eight latches, which can be
addressed at SFR address for the port. Apart from port 1, all the other ports have alternate
functions and can be programmed.
External memory: The 8051 circuitry provides option for connection of external RAM and
ROM, with the help of two 16-bit registers, PC and DPTR. The machine circuitry uses correct
memory depending on machine cycle and opcode being executed. During entire state of
external memory access, port 0 is multiplexed. It provides lower byte of 16-bit memory
address and acts as bidirectional data bus for data transfer. Port 2 provides higher byte of the
memory address during entire cycle.
Counters and Timers: 8051 has two 16-bit up counters, named T0 and T1. Each counter may
be programmed to count internal clock pulses, acting as timer or external counter to count
external pulses. The counters are divided to two 8-bit registers called timer low(TL0 and TL1)
and timer high(TH0 and TH1). All counter action is controlled by bit states in two registers,
timer mode control register (TMOD) and timer/counter control TCON).
Interrupts: An interrupt is a hardware signal that forces the program to call a subroutine.
8051 provides five interrupts. Three of these are internal- Timer flag 0, Timer flag 1 and serial
port interrupt. Two of them are external, triggered by circuitry connected to pins INT0 and
INT1 (port pins P3.2 and P3.3).
1 I/O
5. P2.0-P2.7 21-28 I/O Port 2: Port 2 is an 8-bit bidirectional I/O port with internal
pull-ups and Schmitt trigger inputs. Port 2 pins that have 1s
written to them are pulled high by the internal pull-ups and
can be used as inputs. As inputs, port 2 pins that are externally
being pulled low will source current because of the internal
pull-ups. Port 2 emits the high-order address byte during
fetches from external program memory and during accesses to
external data memory that use 16-bit addresses. Some Port 2
pins receive the high order address bits during EPROM
programming and verification.
6. P3.0-P3.7 10-17 I/O Port 3: Port 3 is an 8-bit bidirectional I/O port with internal
pull-ups and Schmitt trigger inputs.
17 O
Sl. Mnemonic Pin No. Type Description
No
7. RST 9 I Reset: A high on this pin for two machine cycles while the
oscillator is running, resets the device. An internal diffused
resistor to VSS permits A power-on reset using only an external
capacitor to VCC
8. ALE/PROG 30 O Address Latch Enable/Program Pulse: Output pulse for
latching the low byte of the address during an access to
external memory. In normal operation, ALE is emitted at a
constant rate of 1/6 the oscillator frequency, and can be used
for external timing or clocking. Note that one ALE pulse is
skipped during each access to external data memory. This pin
is also the program pulse input (PROG) during EPROM
programming. ALE can be disabled by setting SFR auxiliary.0.
With this bit set, ALE will be active only during a MOVX
instruction.
9. PSEN 29 O Program Store Enable: The read strobe to external program
memory. When the device is executing code from the external
program memory, PSEN is activated twice each machine cycle,
except that two PSEN activations are skipped during each
access to external data memory. PSEN is not activated during
fetches from internal program memory.
10. EA/Vpp 31 I External Access Enable/Programming Supply Voltage: EA
must be externally held low to enable the device to fetch code
from external program memory locations 0000H to 0FFFH. If
EA is held high, the device executes from internal program
memory unless the program counter contains an address
greater than the on-chip ROM/OTP. This pin also receives the
12.75 V programming supply voltage (VPP) during EPROM
programming. If security bit 1 is programmed, EA will be
internally latched on Reset.
11. XTAL1 19 I Crystal 1: Input to the inverting oscillator amplifier and input
to the internal clock generator circuits
12. XTAL2 18 O Crystal 2: Output from the inverting oscillator amplifier
No. of
Sl No. Mnemonics Opcode Bytes machine Description
cycles
Arithmetic operations
1 ADD A, Rn 28-2F 1 1 Add register to the accumulator
2 ADD A, direct 25 2 1 Add direct byte to the accumulator
3 ADD A, @Ri 26-27 1 1 Add indirect RAM to accumulator
4 ADD A, #data 24 2 1 Add immediate data to the accumulator
5 ADDC A, Rn 38-3F 1 1 Add register to Accumulator with carry
6 ADDC A, direct 35 2 1 Add direct byte to Accumulator with carry
7 ADDC A,@Ri 36-37 1 1 Add indirect RAM to Accumulator with carry
8 ADDC A, #data 34 2 1 Add immediate data to ACC with carry
9 SUBB A, Rn 98-9F 1 1 Subtract Register from ACC with borrow
10 SUBB A, direct 95 2 1 Subtract direct byte from ACC with borrow
11 SUBB A, @Ri 96-97 1 1 Subtract indirect RAM from ACC with borrow
Subtract immediate data from ACC with
12 SUBB A, #data 94 2 1
borrow
13 INC A 04 1 1 Increment Accumulator
14 INC Rn 08-0F 1 1 Increment register
15 INC direct 05 2 1 Increment direct byte
16 INC @Ri 06-07 1 1 Increment indirect RAM
17 DEC A 14 1 1 Decrement Accumulator
18 DEC Rn 18-1F 1 1 Decrement Register
19 DEC direct 15 2 1 Decrement direct byte
20 DEC @Ri 16-17 1 1 Decrement indirect RAM
21 INC DPTR A3 1 2 Increment Data Pointer
22 MUL AB A4 1 3 Multiply A and B
23 DIV AB 84 1 3 Divide A by B
24 DA A D4 1 1 Decimal Adjust Accumulator
Logical operations
25 ANL A, Rn 58-5F 1 1 AND Register to Accumulator
26 ANL A, direct 55 2 1 AND direct byte to Accumulator
27 ANL A, @Ri 56-57 1 1 AND indirect RAM to Accumulator
28 ANL A, #data 54 2 1 AND immediate data to Accumulator
29 ANL direct, A 52 2 1 AND Accumulator to direct byte
30 ANL direct, #data 53 3 2 AND immediate data to direct byte
31 ORL A, Rn 48-4F 1 1 OR register to Accumulator
32 ORL A, direct 45 2 1 OR direct byte to Accumulator
33 ORL A, @Ri 46-47 1 1 OR indirect RAM to Accumulator
34 ORL A, #data 44 2 1 OR immediate data to Accumulator
35 ORL direct, A 42 2 1 OR Accumulator to direct byte
36 ORL direct, #data 43 3 2 OR immediate data to direct byte
37 XRL A, Rn 68-6F 1 1 Exclusive-OR register to Accumulator
38 XRL A, direct 65 2 1 Exclusive-OR direct byte to Accumulator
39 XRL A, @Ri 66-67 1 1 Exclusive-OR indirect RAM to Accumulator
40 XRL A, #data 64 2 1 Exclusive-OR immediate data to Accumulator
41 XRL direct, A 62 2 1 Exclusive-OR Accumulator to direct byte
42 XRL direct, #data 63 3 2 Exclusive-OR immediate data to direct byte
NOTE:
8 B8 8 A8 8 89 8 88
* * *
8 E0* IP IE TMOD TCON
Register Register Register
A Register
Register
8 F0 8 8C 8 8A 8 8D 8 8B
*
B TH0 TL0 TH1 TH1
Register Counter Counter Counter Counter
8 98 8 99 8 87 8 D0
* *
SCON SBUF PCON PSW
7 General
F
Register Register Register Register
purpose
3 RAM
0
2 Bit address
area
2
8 81
0
1 Register
bank SP
1 3 Register
8
Register
1
bank 2
1
0 Register
1
bank 1
0 8 8 8 82 1 No address
8 3 6
07 R7 DPTR Program Counter
06 R6 DPL
05 R5 DPH
04 R4
03 R3
02 R2 Register
01 R1 bank 0
00 R0
Internal ROM
Internal
Byte
Addresse RAM
s 8 80 8 90 8 A0 8 B0
* * * *
Port 0 Port 1 Port 2 Port 3
latch latch latch latch
11. CJNE
LIST OF EXPERIMENTS
Arithmetic group
Branching group
Code Conversions
PART – B (Interfacing)
Interfacing experiments To be done using hardware kits -write C program, cross compile
2. 7 segment display
3. Elevator interface
4. DAC interface
5. Keyboard interface
Note:
P1.1 PROGRAM TO ADD TWO 8 BIT NUMBERS STORED IN MEMORY 30H AND 31H
ORG 00H
MOV R0, #30H
MOV R1, #31H
MOV A, @R0
ADD A, @R1 //Add two 8 bit data stored in register A and R0
MOV R1, A //Store the sum in register R1
H: SJMP H // Infinite loop
END
ADD instruction in the above program can be replaced by SUBB, MUL, and DIV with
proper syntax shown in above table to get the Subtraction, Multiplication and
Division operations respectively.
It’s is suggested to clear the carry before using SUBB instruction
For Multiplication operation the result is 16 bit and higher byte is stored in A and
lower byte is stored in B register
For Division operation reminder is stored in B and quotient is stored in A
Flowchart:
Start
Move value by R0 to A
Copy result in A to R1
Stop
P1.2 Program to add two 16-bit numbers at 0X30-0X31 and 0x32-0x33 and store result in R6
& R7
ORG 00H
CLR C // CLEAR THE CARRY FLAG
MOV A, 30H // Copy LSB of first number to register A
ADDC A, 32H // Add to A LSB of second number and store in A
MOV R6, A // Move result to Register R6,
MOV A, 31H // Repeat same with MSB
ADDC A, 33H
MOV R7, A
H: SJMP H
END
Flowchart:
Start
Stop
0x30 and 0x31 hold lower and higher bytes of first number, 0x32 and 33 hold lower
and higher bytes of second number
R6 holds LSB of result and R7 holds MSB
Carry flag is set to 1 if result exceeds FFFFh
Replacing ADD with SUBB, subtraction of 16 bit numbers can be performed. The
result obtained is 2’s complement of actual result, if carry flag is 1.
Flowchart: Start
Move number to A
Copy number to B
Multiply A and B
Stop
P1.4 Cube of a number (No in 30h, result in 31h-33h, 31h holds lower byte)
ORG 00H
MOV R0, #30h
MOV A, @R0 // Move value at address pointed by R0 to A
MOV R1, A // Copy the value to R1
MOV B, A // Copy value to B
MUL AB
MOV R2, B // R2 holds higher byte of square
MOV B, R1 // Copy number again to B
MUL AB // Multiply lower byte of square and number
INC R0 // R0 = 31h
MOV @R0, A // 31H holds lower byte of result
MOV R3, B // R3 holds higher byte of intermediate result
MOV A, R1 // Copy number to A
MOV B, R2 // Copy higher byte of square to R2
MUL AB // Intermediate result, lower byte to be added to R3
ADD A, R3
INC R0 // R0 = 32h
MOV @R0, A // 32h holds middle byte
INC R0 // R0 = 33h
MOV A, B
MOV @R0, A // 33h holds higher byte
H: SJMP H
END
Flowchart:
Start
Stop
Experiment 3: Counters
P3.1 HEX up and down counter
ORG 00H
MOV A, #00H
LOOP1: INC R0
H: SJMP H
END
Flowchart:
Start
No Value at Yes
0x30 =
0x00h
Initialize R0 to 0x99 Initialize R0 to 0x00
Decrement R0 Increment R0
No
No
R0=0 R0=0
x00 x99
Yes
Yes
Flowchart: Start
No Value at Yes
0x30 =
0x00h
Initialize R0 to 0d99 Initialize R0 to 0d00
Decrement R0 Increment
R0
No
No
R0=0 R0=
d00 0d9
9
ORG 00H
MOV R4, A
H: SJMP H
END
Flowchart:
Start
Complement A
Add 0x01 to A
Move result to R4
Stop
Flowchart:
Start
Move result to R1
Move result to R2
Stop
Flowchart:
START
Logically OR A with0x30
Swap A
Move A to R3
Stop
Flowchart:
Start
Swap A
Move A to R3
Stop
P4.5 Program to count number of positive and negative values in 10 bytes of data from
0X30 – 0X3A
ORG 00h
MOV R3, #00h
MOV R4, #00h // Counter is initialized to 0 for positive and negative numbers
MOV R2, #0Ah //Counter is initialized 10
MOV R0, #30h // Memory pointer is initialized to 30H
L1: MOV A,@R0 //The number entered by the user is moved to A
RLC A //Rotate left with carry is performed on the number
INC R0
JC L2 //If carry is 1, goto L1
INC R3 //If carry is 0, positive number count is incremented
AJMP L3 //Goto L3
L2: INC R4 // L2: Negative number count is incremented
L3: DJNZ R2, L1
H: SJMP H
END
Flowchart: Start
Yes Is No
carry
=1?
Increase negative count Increase positive count
by 1 by 1
Decrement iteration
counter
Is
iteration
No counter
Yes
Stop
BMS COLLEGE OF ENGINEERING, BANGALORE
Dept. of E&C Engineering IV-Sem MICROCONTROLLER -Lab
P4.6. PROGRAM TO COUNT THE NUMBER OF 1’S AND 0’S IN A BYTE (PARTITY
DETECTOR):
ORG 00h
MOV R0, #num
MOV R2, #00h // Counter is initializes to zero for zero’s count
MOV R3, #00h // Counter is initialized to zero for one’s count
MOV R1, #08h // Iteration counter is initialized to 0x08
MOV A, R0 // The number is moved to A
L1: RRC A // Rotate right with carry is performed on number
JC L2 // If carry is 1, goto L2
INC R3
AJMP L3
L2: INC R2 // If carry count is 0, zero’s count is incremented
L3: DJNZ R1, L1
H: SJMP H
END
Yes Is carry No
=1?
Is iteration
counter =0?
No
Yes
Stop
0RG 00H
INC R0
INC R1
H: SJMP H
END
Flowchart:
Start
Initialize R2 to 0x0A
R2=0x
00
Yes
NO
Stop
ORG 00H
DEC R0
DEC R1
H: SJMP H
END
Flowchart:
Start
Initialize R2 to 0x0A
R2=0x
00
Yes
No
Stop
Flowchart:
Start
Initialize R2 to 0x0A
R2=0x
00
No
Stop
Yes
P5.4 Block move of data from internal memory to external memory from 0X30-0X3A to
0X1000-0X100A
ORG 00H
INC R0
INC DPTR
H: SJMP H
END
Flowchart:
Start
Initialize R2 to 0x0A
R2=0x
00
Yes
No
Stop
P5.5Block transfer of data from external memory to internal memory from 0x1000h-0x100A
to 0x30h-0x3A
ORG 00H
MOV R1, #0AH // Set a loop for block transfer using R1
MOV R0, #30H // Copy value 30h to R0
MOV DPTR, #1000H // Copy value 1000h to DPTR
L1: MOVX A, @DPTR // Copy data pointed by DPTR to A
MOV @R0, A // Copy data in A to internal memory
INC R0
INC DPTR
DJNZ R1, L1 // Set a loop for block transfer using R1
H: SJMP H
END
Flowchart: Start
Initialize R2 to 0x0A
R2=0x
00
Yes
No
Stop
Increment R0
Carry=1 Yes
Copy data pointed by R0 to A
No
No
R2=0x00
Stop
ORG 00H
MOV A,#15
MOV R0,A
ANL A,#0FH
MOV R1,A
MOV A,R0
SWAP A
ANL A,#0FH
MOV B,#10
MUL AB
ADD A,R1
MOV R4,A
OVER: SJMP OVER
END
ORG 00H
MOV A,#29H // Register A contains BCD value
MOV R2,A
ANL A,#0FH
ORL A,#30H
MOV R6,A
MOV A,R2
ANL A,#0f0H
RR A
RR A
RR A
RR A
ORL A,#30H
MOV R2,A
END
ORG 00H
MOV TMOD,#01H
HERE: MOV TL0,#0F2H
MOV TH0,#0FFH
CPL P3.0
ACALL DELAY
SJMP HERE
DELAY: SETB TR0
CLR TR0
CLR TF0
RET
END
Note: Students should be asked to generate delays for mode 1,2 - different time
delays
P8.2 Receive
org 00h
MOV TMOD, #20H
MOV TH1,#-3
MOV SCON, #50H
SETB TR1
MOV R0, #2FH
HERE1: JNB RI, HERE1
MOV A, SBUF
MOV @R0,A
INC R0
CLR RI
SJMP HERE1
END
#include<stdio.h>
#include <REG51.H>
void delay(int g);
int port[20] = {0xff,0xff,0xff,0xff,
0xc6,0x86,0xc7,0x86,
0xbf,0xc0,0xde,0x87,
0xbf,0x92,0x91,0x92,
0x92,0xc8,0x86,0x87},i;
void main(){
int d,b,j,k,s;
while(1){
i=0;
for(d=0;d<5;d++){
for(b=0;b<4;b++){
k=port[i++];
for(j=0;j<8;j++){
s=k;
s=s&0x80;
if(s==0x00)
P1= 0x00;
else
P1=0x1;
P2 = 0x1;
P2=0x00;
s=k;
s=s<<1;
k=s;
}
}
delay(10000);
delay(10000);
}
}
}
void delay(int g)
{ int h;
for(h=0;h<=g;g++)
{
;}}
Try: Display :DEPT OF ECE
#include <REG51.H>
void delay(unsigned int);
main()
{
unsigned char Flr[9] = {0xff,0x00,0x03,0xff,0x06,0xff,0xff,0xff,0x09};
unsigned char FClr[9] = {0xff,0x0E0,0x0D3,0xff,0x0B6,0xff,0xff,0xff,0x79};
unsigned char ReqFlr,CurFlr = 0x01,i,j;
P0 = 0x00;
P0 = 0x0f0;
while(1)
{
P1 = 0x0f;
ReqFlr = P1 | 0x0f0;
while(ReqFlr == 0x0ff)
ReqFlr = P1 | 0x0f0; /* Read Request Floor from P1 */
ReqFlr = ~ReqFlr;
if(CurFlr == ReqFlr) /* If Request floor is equal to Current Floor */
{
P0 = FClr[CurFlr]; /* Clear Floor Indicator */
continue; /* Go up to read again */
}
else if(CurFlr > ReqFlr) /* If Current floor is > request floor */
{
i = Flr[CurFlr] - Flr[ReqFlr]; /* Get the no of floors to travel */
j = Flr[CurFlr];
for(;i>0;i--) /*Move the indicator down */
{
P0 = 0x0f0|j;
j--;
delay(25000);
}
}
else /* If Current floor is < request floor */
{
i = Flr[ReqFlr] - Flr[CurFlr]; /* Get the no of floors to travel */
j = Flr[CurFlr];
for(;i>0;i--) /*Move the indicator Up */
{
P0 = 0x0f0 | j;
j++;
delay(25000);
}
}
CurFlr = ReqFlr; /* Update Current floor */
P0 = FClr[CurFlr]; /* Clear the indicator */
}
}
If you want to change the direction press the interrupt button ( P3.2/INTO*). when
you press the button, INT0 interrupts the main program and changes the direction of
the motor .
#include <REG51xD2.H>
static bit Dir=0;
Output : Display the pressed key's key code on the On-board LCD
USE : LCD library to write on the LCD. Include lcd.h in your project file which has
all LCD routines.
#include <REG51xD2.H>
#include "lcd.h"
unsigned char getkey();
void delay(unsigned int);
main()
{
unsigned char key;
InitLcd(); /* Initialise LCD */
WriteString("Key Pressed="); /* Display msg on LCD */
while(1)
{
GotoXY(12,0); /* Set Cursor Position */
key = getkey(); /* Call Getkey method */
}
}
{
unsigned char i,j,k,indx,t;
P0=0x0ff;
P1=0x0ff;
P2 = 0x00; /* P2 as Output port */
indx = 0x00; /* Index for storing the first value scanline */
for(i=0x00E;i>=0x00B;i<<=1) /* for 4 scanlines */
{
P2 = i; /* write data to scanline */
t = P0; /* Read readlines connected to P0*/
t = ~t;
if(t>0) /* If key press is true */
{
delay(6000); /* Delay for bouncing */
for(j=0;j<=7;j++) /* Check for 8 lines */
{
t >>=1;
if(t==0) /* if get pressed key*/
{
k = indx+j; /* Display that by converting to Ascii */
t = k>>4;
t +=0x30;
WriteChar(t); /* Write upper nibble */
t = k & 0x0f;
if(t > 9)
t+=0x37;
else
t+=0x30;
WriteChar(t); /* write lower nibble */
return(indx+j); /* Return index of the key pressed */
}
}
}
indx += 8; /* If no key pressed increment index */
}
}
P1=on;
delay(fre);
P0 = off; /* clear port */
P1 = off;
delay(fre);
}
}
#include <REG51xD2.H>
#include "lcd.h"
main()
{
unsigned char i=0;
InitLcd(); /* Initialise LCD */
WriteString("Triangular Wave"); /* Display on LCD */
P0 = 0x00; /* P0 as Output port */
while(1)
{
for(i=0;i<0xff;i++){ /* Generate ON pulse */
P1 = i;
P0 = i; }
for(i=0xfe;i>0x00;i--) /* Generate OFF pulse */
{P0 = i;
P1 = i;}
}
}
#include<reg51.h>
void main()
{
unsigned char value[72];
unsigned int i=0,q=0;
unsigned char x;
for(x=0;x<36;x++)
{
value[x]=(128*sin(i*3.14/180))+128;
i+=5;
}
for(x=36;x<72;x++)
{
value[x]=128*sin(i*3.14/180)-128;
i+=5;
}
while(1)
{
for(x=0;x<72;x++)
{
P0=value[x];
P1=value[x];
delay(5);
}
}
}