cq40 Unlocked PDF

A B C D E
1 1
Compal confidential 2
Schematics Document
Mobile Arrandale rPGA989 with
3 Intel PCH(Ibex Peak-M) core logic 3
2009-10-23 Rev 1.0
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/28 Deciphered Date 2006/03/10 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
A
http://laptop-motherboard-schematic.blogspot.com/
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C D
Custom Calpella DIS LA-4107P
Date: Monday, November 09, 2009

E
Sheet 1 of 55
1.0
A B C D E
Compal confidential Fan conn Page 6 Calpella Consumer 14" UMA +Switchable
CK505 32QFN
Clock Generator
1
Mobile Arrandale ICS9LRS3197AKLFT 1
P19
ATI M93 PCIE-Express 16X 2C CPU + GMCH
page 24,25,26,27,28
Socket-rPGA989 DDR3 1066/1333 MHz 1.5V DDR3 SO-DIMM X2
BANK 0, 1, 2, 3 P17, 18
VRAM DDR3 Dis
LCD Conn.
page 21 Page 6,7,8,9,10
512MB Dual Channel
Dis UMA
page 29 MUX
Mini-Card x 2
P31
Dis
CRT FDI BUS DMI X4 USB conn x3
page 20
P37
Dis UMA
MUX
2
BT Conn P37 2
USB2.0 X11
USB Camera
Dis
HDMI Conn. Intel PCH P21
page 23
Azalia
Ibex Peak-M Finger print
SATA Master-1 P37
PCI-E BUS*4 FCBGA 951
SATA Slave
Cardreader
P33
Page 11,12,13,14,15,16
8111DL VB Mini-Card Mini-Card New Card SPI

MDC Conn P34
8103EL WLAN WWAN USB2.0 X1
(10/100 /Giga LAN)P32 P31 P31 P31 LPC BUS Audio CKT
3 Codec_IDT92HD80 Audio Jack 3
P38 P34 P35

SPI ROM 16M
RJ45/11 CONN MX25L1605DM2I-12G
P32
4M Bytes SATA HDD Connector
ENE P30
KB926
Version D2 P38
SATA ODD Connector
P30
Touch Pad CONN. Int.KBD

RTC CKT. LED Dock Multi-Bay
P40 P39 P30
P11 P40 USB2.0*1
RGB
RJ45 SPI ROM e-SATA Connector USB Board Conn
ACCELEROMETER WIESON G6179 P37
USB conn x2 P37
SPDIF
ST P30
MIC*1
P38
4 4
LINE-OUT*1 256K bits

K/B backlight Conn Capsense switch Conn
P40
P40

2006/02/13 2006/03/10 Title
DC/DC Interface CKT. Issued Date Deciphered Date
Block Diagram
P41 P36 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
A
B
C D
Custom
Date:
Calpella DIS LA-4107P
Monday, November 09, 2009
E
Sheet 2 of 55
1.0
A
Symbol Note :
Voltage Rails O MEANS ON X MEANS OFF USB assignment:
: means Digital Ground USB-0 Right side
USB-1 Right side
USB-2 Left side(with ESATA)
: means Analog Ground USB-3 Docking
power USB-4 Camera
plane @ : means just reserve , no build USB-5 WLAN
+B +5VALW +1.5V +5VS 45@ : means need be mounted when 45 level assy or rework stage. USB-6 X
+3VS USB-7 X
+3VALW +1.5VS
BATT @ : means need be mounted when 45 level assy or rework stage. USB-8 MiniCard(WWAN/TV)
+0.75VS CONN@ : means ME part USB-9 New card
State +VCCP USB-10 Cardreader
+CPU_CORE
SG@ : means stuff when Switchable graphic USB-11 Finger Printer
+1.05VS PA@ : Only For PA USB-12 BT
+1.8VS
OPP@ : Only For OPP PCIe assignment:
DIS@ : means stuff when DIS only PCIe-1 WWAN
S0 O O O O PCIe-2 WLAN
DEBUG@ : means stuff when need Mini Card LPC debud card PCIe-3 LAN
S1 O O O O 8111DL@ : means stuff for 8111DL PCIe-4 New card
PCIe-5 X
S3
8103EL@ : means stuff for 8103EL PCIe-6 X
O O O X
S5 S4/AC O O X X
SATA assignment:
S5 S4/ Battery only O X X X SATA0 HDD
SATA1 ODD
S5 S4/AC & Battery
don't exist X X X X SATA2 X
1
SATA3 X 1
SATA4 ESATA
SATA5 Mulit-Bay
SMBUS Control Table PCH I2C / SMBUS ADDRESSING

M93 NEW
Thermal WLAN Thermal NB10M-GE Cap sensor CARD G sensor
SOURCE XDP BATT Sensor SODIMM CLK CHIP WWAN board
Sensor DEVICE HEX ADDRESS
SMB_EC_CK1
SMB_EC_DA1
KB926 X V X X X X X X V X X DDR SO-DIMM 0 A0 10100000
DDR SO-DIMM 1 A4 10100100
SMB_EC_CK2
SMB_EC_DA2
KB926 X X X X X X X X X X X CLOCK GENERATOR (EXT.) D2 11010010
G sensor 1D 00011101
SMBCLK
SMBDATA
PCH V X X V V V X X X V V
NAL70 SKUs
SML0CLK
SML0DATA
PCH X X X X X X X X X X X
SML1CLK
SML1DATA
PCH X X X X X X X X X X X
+3VS +5VL +3VS +3VS +3VALW +5VL +3VALW +3VS
PA@ OPP@
PCB part number ZZZ1 ZZZ2
M93 SMBUS Control Table Stencil Memo: PCBǂDA80000GL00

PAǂ DAZ0BI00200
SOURCE LVDS CRT HDMI PJ1, PJP903, PJP301, PJP302, PJP303, PJP304, PJP401, OPPǂDAZ0BI00300 PCB-MB PCB-MB
PA: PJP601, PJP602, PJP603, PJP501, PJP901, PJP902
D_EDID_DATA PCH version
D_EDID_CLK
M93 V X X A1 QV73 SA00002KV10
PJ1, PJP301, PJP302, PJP303, PJP304, PJP401,
D_CRT_DDC_DATA OPP: PJP601, PJP602, PJP603, PJP501, PJP901, PJP902, JP303 B0 QLLT SA00002KV30
D_CRT_DDC_DATA
M93 X V X B1 QMGS SA00002KV60
HDMIDAT_VGA Stand-off Location: H12, H14 B3 QMNT SA00003N730
HDMICLK_VGA
M93 X X V
Notes List
http://laptop-motherboard-schematic.blogspot.com/AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
A
Date: Monday, November 09, 2009 Sheet 3 of 55

1.0
5 4 3 2 1
1A 60mA 60mA
+V_BATTERY Dock con +3VAUX_BT BLUE TOOTH
1.3A 1.3A
Dock con 0.3A +3VS_PEC New card
INVPWR_B+ LVDS CON
EC_ROM 10mA
SPI ROM(PCH) 25mA
20mA CODEC 92HD81
DOCK_VIN VL +5VL +3VL_EC EC 25mA
+3VS_DVDD
CIR INT_MIC
50mA
D
Finger printer D
541mA
PCH
1.5A 1.5A
7302mA +3VS +LCDVDD LVDS CON
201mA 201mA 250mA
7.9A 7947mA +3V_LAN LAN +3VS_CK505
AC VIN +3VALW
275A 275mA 1A 1A
+3V_PEC NEW CARD +3VS_WWAN Mini card-WWAN
7.05A
B++ 169mA 1A 1A
PCH +3VS_WLAN Mini card-WLAN
500mA 500mA 250mA

+USB_VCC USB-L(ESATA) PCH
530mA 850mA
1A +1.8VS 600mA
USBX2-R CPU
7.7A
+5VALW 0.1A 20mAx4 300mA
+5VALW_LED LED +1.8VSDGPU M93 GPU
6.1A DDR3
+5VS
35mA
C MDC C
B+ 3A
CPU
20A +3VS_HDA CODEC I/O
8 A
2.13A DDR3 800Mhz 4G x2 1mA 1mA
+1.5V_B+ +1.5V +3VS_ACL G-SENSOR
380mA 650mA
+0.75V DDR3 150mA
+3VS_VGA M93 GPU
0.5A
3.7 X 3=11.1V Mini card-WWAN
1A
DC BATT +1.5VS_WLAN 0.5A 60mA
1650mA Mini card-WLAN CODEC 92HD81
+1.5VS 60mA
650mA 650mA +AVDD_CODEC
+1.5VS_PEC New card INT_MIC
500mA
CODEC PVDD
2.5A 3A
+1.1VSDGPU M93 GPU 1.8A
ODD
3A
DDR3 VRAM 1300mA
HDD
5.2A
+1.5VSDGPU 1300mA
B
M93 GPU Multi Bay B
2.2A
162mA 1A 1A
PCH +CRT_VCC CRT CONN
18.24A
+VCCP 18A 50mA/4.75V
CPU +USB_CAM PC Camera
2.89A 25.24A
VCCP_B+ +1.05V_VCCP 80mA 120mA 20mAx6
+1.05VS_CK505 +5VS_LED LED
7A 7A 100mA 100mA
+1.05VS PCH +5VSDGPU M93 GPU
5.49A
48A/1.05V
CPU_B+ +VCC_CORE CPU
1.72A 15A/1.05V
GFX_B+ +GFX_CORE CPU
1.3A 10A/1.1V
VGA_B+ +VGA_CORE M93 GPU
A A
Security Classification Compal Secret Data

Title
Compal Electronics, Inc.
Issued Date 2007/08/28 Deciphered Date 2006/03/10
Power delevry
Custom Calpella DIS LA-4107P 1.0
5 4 3 2 1
A
1 1

Notes List
A

1.0
Layout rule 10mil
width trace length <
ǂ 5 4 3 2 1
0.5", spacing 20mil JCPU1B

R1 1 2 20_0402_1% COMP3 AT23 COMP3
2009.08.12 Remove the XDP connector
A16 CLK_CPU_BCLK +VCCP
BCLK CLK_CPU_BCLK <14>
MISC
R3 1 2 20_0402_1% COMP2 AT24 B16 CLK_CPU_BCLK#
COMP2 BCLK# CLK_CPU_BCLK# <14>
XDP_TDI @ R2 1 2 51_0402_1%
R5 1 2 49.9_0402_1% COMP1 CLK_CPU_XDP
CLOCKS
G16 COMP1 BCLK_ITP AR30
AT30 CLK_CPU_XDP# XDP_TMS @ R4 1 2 51_0402_1%
R7 1 BCLK_ITP#
2 49.9_0402_1% COMP0 AT26 COMP0
E16 CLK_EXP XDP_PREQ# @ R6 1 2 51_0402_1%
PEG_CLK CLK_EXP <12>
D16 CLK_EXP# OK
PEG_CLK# CLK_EXP# <12>
PAD T1 TP_SKTOCC# AH24 XDP_TDO R8 1 2 51_0402_1%
SKTOCC#
DPLL_REF_SSCLK A18
D DPLL_REF_SSCLK# A17 eDP This shall place near CPU D
H_CATERR# AK14 CATERR#
THERMAL
XDP_TCK @ R9 1 2 51_0402_1%
F6 SM_DRAMRST#
R10 H_PECI_ISO SM_DRAMRST#
<14> H_PECI 1 2 AT15 PECI
0_0402_5% AL1 SM_RCOMP0
SM_RCOMP[0] SM_RCOMP1
SM_RCOMP[1] AM1
AN1 SM_RCOMP2
H_PROCHOT# SM_RCOMP[2]
<49> H_PROCHOT# AN26 PROCHOT#
AN15 PM_EXTTS#0 T63 PAD
PM_EXT_TS#[0]
DDR3
MISC
AP15 PM_EXTTS#1 R14 1 2 0_0402_5%
PM_EXT_TS#[1] PM_EXTTS#1_R <17,18>
H_THERMTRIP# AK15 from DDR
<14,26> H_THERMTRIP# THERMTRIP#
AT28 XDP_PRDY#
PRDY# XDP_PREQ#
PREQ# AP27
AN28 XDP_TCK
H_CPURST# R19 H_CPURST#_R TCK XDP_TMS
1 2 AP26 RESET_OBS# TMS AP28
PWR MANAGEMENT
0_0402_5% AT27 XDP_TRST#
TRST#
JTAG & BPM

R20 1 2 H_PM_SYNC_R AL15 AT29 XDP_TDI_R +3VS
<13> H_PM_SYNC PM_SYNC TDI
0_0402_5% AR27 XDP_TDO_R
TDO XDP_TDI_M
TDI_M AR29
H_CPUPWRGD R21 1 2SYS_AGENT_PWROK AN14 AP29 XDP_TDO_M XDP_DBRESET# R603 1 2 1K_0402_5%
0_0402_5% VCCPWRGOOD_1 TDO_M
AN25 XDP_DBRESET#
DBR# XDP_DBRESET# <13>
<14> H_CPUPWRGD R23 1 2 VCCPWRGOOD_0 AN27 1 @
0_0402_5% VCCPWRGOOD_0 +VCCP C1388
AJ22 XDP_BPM#0 0.1U_0402_16V4Z
R1250 VDDPWRGOOD_R BPM#[0] XDP_BPM#1 PM_EXTTS#0 R27
AK13 SM_DRAMPWROK BPM#[1] AK22 1 2 10K_0402_5%
C 2K_0402_5% XDP_BPM#2 2 C
BPM#[2] AK24
<46> VTTPWRGOOD 1 2 AJ24 XDP_BPM#3 PM_EXTTS#1 R29 1 2 10K_0402_5%
BPM#[3] XDP_BPM#4
AM15 VTTPWRGOOD BPM#[4] AJ25
2 1 AH22 XDP_BPM#5
R1249 1.5K_0402_1% BPM#[5] XDP_BPM#6
BPM#[6] AK23
H_PWRGD_XDP R25 1 2 H_PWRGD_XDP_R AM26 AH23 XDP_BPM#7
0_0402_5% TAPPWRGOOD BPM#[7]
<14> BUF_PLT_RST# R26 1 2 PLT_RST#_R AL14 RSTIN#

1.5K_0402_1%
1
IC,AUB_CFD_rPGA,R1P0
Design guide R28 CONN@
1.11update,PLTRST series 750_0402_1%
2
resittor 1.5K, PL
resistor 750 ohm JTAG MAPPING
XDP_TDI_R R30 1 2 0_0402_5% XDP_TDI

PWM Fan Control circuit
+1.5V +5VS
XDP_TDO_M @ R32 XDP_TDO
11/01 update
1 2 0_0402_5%
JP2
1
+VCCP @ R1205 0_0402_5%
Processor Pullups 1 1
2
1 2 R1206 2 2
1
R34 1K_0402_1% 1 1
H_CATERR# R35 1 2 49.9_0402_1% 0_0402_5% D56 C1386 C1387 3
4.7U_0805_10V4Z 0.1U_0402_16V4Z GND
4
2
GND
D
H_CPURST#_R @ R36 1 2 68_0402_5% SM_DRAMRST# 3 1 RB751V_SOD323
DRAMRST# <17,18>
1
B 2 2 ACES_88231-02001 B
2
H_PROCHOT# R11 2 1 68_0402_5% XDP_TDI_M @ R37 1 2 0_0402_5% Q104 CONN@
BSS138_NL_SOT23-3
G
2
1
+FAN
R1207
PCH_DDR_RST <14>
XDP_TDO_R R38 1 2 0_0402_5% 100K_0402_5% 1 Change PCB Footprint from
1
2
5
6
1
C1430 D Q102 @ D57 ACES_85204-02001_2P to
2
DDR3 Compensation Signals 470P_0402_50V7K G

XDP_TRST# R39 2 ACES_88231-02001_2P
1 2 51_0402_1% <39> FAN_PWM 3 RLZ5.1B_LL34
S SI3456BDV-T1-E3_TSOP6
2
4
SM_RCOMP0 R40 1 2 100_0402_1%
2009.08.17 change the Q104 to BSS138 to
SM_RCOMP1 R41 1 2 24.9_0402_1% follow Intel's design guid.
SM_RCOMP2 R42 1 2 130_0402_1%
1.5VSCPU_DRAM_PWRGD <47>
Layout Note:Please these
R1208 1.5K_0402_1%
resistors near Processor 1.5VSCPU_DRAM_PWRGD 2 1
+3VALW +1.5V @ R31 1.1K_0402_1%
2 1
R1209
<13> PM_DRAM_PWRGD PM_DRAM_PWRGD 1 2 VDDPWRGOOD_R
5
U57 0_0402_5%
VTTPWRGOOD 2
P
B
1
Y 4
1 @ R33 R1248
A
G
A 750_0402_1% A
3K_0402_1%
NC7SZ08P5X_NL_SC70-5
3

Auburndale(1/5)-Thermal/XDP
5 4 3 2 1
5 4 3
Layout rule trace
length < 0.5"
ǂ 2 1
JCPU1E
JCPU1A AJ13
EXP_ICOMPI R44 RSVD32
PEG_ICOMPI B26 1 2 49.9_0402_1% RSVD33 AJ12
PEG_ICOMPO A26
<13> DMI_CRX_PTX_N0 A24 DMI_RX#[0] PEG_RCOMPO B27 AP25 RSVD1
<13> DMI_CRX_PTX_N1 C23 A25 EXP_RBIAS R45 1 2 750_0402_1% AL25 AH25
DMI_RX#[1] PEG_RBIAS RSVD2 RSVD34
<13> DMI_CRX_PTX_N2 B22 DMI_RX#[2] PCIE_CRX_GTX_N[0..15] <24> AL24 RSVD3 RSVD35 AK26
A21 K35 PCIE_CRX_GTX_N0 AL22
<13> DMI_CRX_PTX_N3 DMI_RX#[3] PEG_RX#[0] RSVD4
J34 PCIE_CRX_GTX_N1 AJ33 AL26
PEG_RX#[1] PCIE_CRX_GTX_N2 RSVD5 RSVD36
<13> DMI_CRX_PTX_P0 B24 J33 AG9 AR2
DMI_RX[0] PEG_RX#[2] PCIE_CRX_GTX_N3 +V_DDR_CPU_REF0 RSVD6 RSVD_NCTF_37
<13> DMI_CRX_PTX_P1 D23 G35 M27
DMI_RX[1] PEG_RX#[3] +V_DDR_CPU_REF1 RSVD7
DMI
D PCIE_CRX_GTX_N4 D
<13> DMI_CRX_PTX_P2 B23 G32 L28 AJ26
DMI_RX[2] PEG_RX#[4] PCIE_CRX_GTX_N5 RSVD8 RSVD38
<13> DMI_CRX_PTX_P3 A22 F34 J17 AJ27
DMI_RX[3] PEG_RX#[5] PCIE_CRX_GTX_N6 SA_DIMM_VREF RSVD39
F31 H17
PEG_RX#[6] PCIE_CRX_GTX_N7 SB_DIMM_VREF
<13> DMI_CTX_PRX_N0 D24 D35 G25
DMI_TX#[0] PEG_RX#[7] PCIE_CRX_GTX_N8 RSVD11
<13> DMI_CTX_PRX_N1 G24 E33 G17
DMI_TX#[1] PEG_RX#[8] PCIE_CRX_GTX_N9 RSVD12
<13> DMI_CTX_PRX_N2 F23 C33 E31 AP1
DMI_TX#[2] PEG_RX#[9] PCIE_CRX_GTX_N10 RSVD13 RSVD_NCTF_40
<13> DMI_CTX_PRX_N3 H23 D32 E30 AT2
DMI_TX#[3] PEG_RX#[10] PCIE_CRX_GTX_N11 RSVD14 RSVD_NCTF_41
B32
PEG_RX#[11] PCIE_CRX_GTX_N12
<13> DMI_CTX_PRX_P0 D25 C31 AT3
DMI_TX[0] PEG_RX#[12] PCIE_CRX_GTX_N13 RSVD_NCTF_42
<13> DMI_CTX_PRX_P1 F24 B28 AR1
DMI_TX[1] PEG_RX#[13] PCIE_CRX_GTX_N14 RSVD_NCTF_43
<13> DMI_CTX_PRX_P2 E23 B30
DMI_TX[2] PEG_RX#[14] PCIE_CRX_GTX_N15
<13> DMI_CTX_PRX_P3 G23 DMI_TX[3] PEG_RX#[15] A31
PCIE_CRX_GTX_P0 PCIE_CRX_GTX_P[0..15] <24>

PEG_RX[0] J35 RSVD45 AL28
H34 PCIE_CRX_GTX_P1 CFG0 AM30 AL29
PEG_RX[1] PCIE_CRX_GTX_P2 CFG1 CFG[0] RSVD46
PEG_RX[2] H33 AM28 CFG[1] RSVD47 AP30
E22 F35 PCIE_CRX_GTX_P3 CFG2 AP31 AP32
<13> FDI_CTX_PRX_N0 FDI_TX#[0] PEG_RX[3] PCIE_CRX_GTX_P4 CFG3 CFG[2] RSVD48
<13> FDI_CTX_PRX_N1 D21 FDI_TX#[1] PEG_RX[4] G33 AL32 CFG[3] RSVD49 AL27
D19 E34 PCIE_CRX_GTX_P5 CFG4 AL30 AT31
<13> FDI_CTX_PRX_N3 D18 FDI_TX#[3] PEG_RX[6] F32 AM31 CFG[5] RSVD51 AT32
G21 D34 PCIE_CRX_GTX_P7 CFG6 AN29 AP33
E19 F33 AM32 AR33
PCI EXPRESS -- GRAPHICS

<13> FDI_CTX_PRX_N6 F21 FDI_TX#[6] PEG_RX[9] B33 AK32 CFG[8] RSVD_NCTF_54 AT33
Intel(R) FDI
G18 D31 PCIE_CRX_GTX_P10 CFG9 AK31 AT34
RESERVED
<13> FDI_CTX_PRX_N7 FDI_TX#[7] PEG_RX[10] PCIE_CRX_GTX_P11 CFG10 CFG[9] RSVD_NCTF_55
PEG_RX[11] A32 AK28 CFG[10] RSVD_NCTF_56 AP35
C30 PCIE_CRX_GTX_P12 CFG11 AJ28 AR35
PEG_RX[12] PCIE_CRX_GTX_P13 CFG12 CFG[11] RSVD_NCTF_57
<13> FDI_CTX_PRX_P0 D22 FDI_TX[0] PEG_RX[13] A28 AN30 CFG[12] RSVD58 AR32
C21 B29 PCIE_CRX_GTX_P14 CFG13 AN32
<13> FDI_CTX_PRX_P1 FDI_TX[1] PEG_RX[14] CFG[13]
D20 A30 PCIE_CRX_GTX_P15 CFG14 AJ32
<13> FDI_CTX_PRX_P2 FDI_TX[2] PEG_RX[15] CFG15 CFG[14]
<13> FDI_CTX_PRX_P3 C18 FDI_TX[3] PCIE_CTX_GRX_N[0..15] <24> AJ29 CFG[15] RSVD_TP_59 E15
G22 L33 PCIE_CTX_GRX_C_N0 C4 1 2 0.1U_0402_16V4Z PCIE_CTX_GRX_N0 CFG16 AJ30 F15
<13> FDI_CTX_PRX_P4 FDI_TX[4] PEG_TX#[0] PCIE_CTX_GRX_C_N1 PCIE_CTX_GRX_N1 CFG17 CFG[16] RSVD_TP_60
E20 M35 C5 1 2 0.1U_0402_16V4Z AK30 A2
C <13> FDI_CTX_PRX_P5 FDI_TX[5] PEG_TX#[1] PCIE_CTX_GRX_C_N2 PCIE_CTX_GRX_N2 CFG18 CFG[17] KEY C
F20 M33 C6 1 2 0.1U_0402_16V4Z H16 D15
<13> FDI_CTX_PRX_P6 FDI_TX[6] PEG_TX#[2] PCIE_CTX_GRX_C_N3 PCIE_CTX_GRX_N3 RSVD_TP_86 RSVD62
G19 M30 C7 1 2 0.1U_0402_16V4Z C15
<13> FDI_CTX_PRX_P7 FDI_TX[7] PEG_TX#[3] PCIE_CTX_GRX_C_N4 PCIE_CTX_GRX_N4 RSVD63
L31 C8 1 2 0.1U_0402_16V4Z AJ15 @ R48 1 2 0_0402_5%
PEG_TX#[4] PCIE_CTX_GRX_C_N5 C9 0.1U_0402_16V4Z PCIE_CTX_GRX_N5 RSVD64 @ R49
<13> FDI_FSYNC0 F17 FDI_FSYNC[0] PEG_TX#[5] K32 1 2 RSVD65 AH15 1 2 0_0402_5%
E17 M29 PCIE_CTX_GRX_C_N6 C10 1 2 0.1U_0402_16V4Z PCIE_CTX_GRX_N6
<13> FDI_FSYNC1 FDI_FSYNC[1] PEG_TX#[6] PCIE_CTX_GRX_C_N7 PCIE_CTX_GRX_N7
J31 C11 1 2 0.1U_0402_16V4Z B19
PEG_TX#[7] PCIE_CTX_GRX_C_N8 C12 0.1U_0402_16V4Z PCIE_CTX_GRX_N8 RSVD15
<13> FDI_INT C17 FDI_INT PEG_TX#[8] K29 1 2 A19 RSVD16
H30 PCIE_CTX_GRX_C_N9 C13 1 2 0.1U_0402_16V4Z PCIE_CTX_GRX_N9
PEG_TX#[9] PCIE_CTX_GRX_C_N10 C14 0.1U_0402_16V4Z PCIE_CTX_GRX_N10 @ R50
<13> FDI_LSYNC0 F18
FDI_LSYNC[0] PEG_TX#[10]
H29 1 2 1 2 0_0402_5% A20
RSVD17
D17 F29 PCIE_CTX_GRX_C_N11 C15 1 2 0.1U_0402_16V4Z PCIE_CTX_GRX_N11 @ R51 1 2 0_0402_5% B20
<13> FDI_LSYNC1 FDI_LSYNC[1] PEG_TX#[11] PCIE_CTX_GRX_C_N12 PCIE_CTX_GRX_N12 RSVD18
E28 C16 1 2 0.1U_0402_16V4Z AA5
PEG_TX#[12] PCIE_CTX_GRX_C_N13 C17 0.1U_0402_16V4Z PCIE_CTX_GRX_N13 RSVD_TP_66
D29 1 2 U9 AA4
PEG_TX#[13] PCIE_CTX_GRX_C_N14 C18 0.1U_0402_16V4Z PCIE_CTX_GRX_N14 RSVD19 RSVD_TP_67
D27 1 2 T9 R8
PEG_TX#[14] PCIE_CTX_GRX_C_N15 C19 0.1U_0402_16V4Z PCIE_CTX_GRX_N15 RSVD20 RSVD_TP_68
C26 1 2 AD3
PEG_TX#[15] RSVD_TP_69
PCIE_CTX_GRX_P[0..15] <24> AC9 AD2
PCIE_CTX_GRX_C_P0 C20 0.1U_0402_16V4Z PCIE_CTX_GRX_P0 RSVD21 RSVD_TP_70
L34 1 2 AB9 AA2
PEG_TX[0] PCIE_CTX_GRX_C_P1 C21 0.1U_0402_16V4Z PCIE_CTX_GRX_P1 RSVD22 RSVD_TP_71
M34 1 2 AA1
PEG_TX[1] PCIE_CTX_GRX_C_P2 C22 0.1U_0402_16V4Z PCIE_CTX_GRX_P2 RSVD_TP_72
M32 1 2 R9
L30 1 2 AG7
M31 1 2 C1 AE3
PEG_TX[4] PCIE_CTX_GRX_C_P5 C25 0.1U_0402_16V4Z PCIE_CTX_GRX_P5 RSVD_NCTF_23 RSVD_TP_75
K31 1 2 A3
PEG_TX[5] PCIE_CTX_GRX_C_P6 C26 0.1U_0402_16V4Z PCIE_CTX_GRX_P6 RSVD_NCTF_24
M28 1 2
PEG_TX[6] PCIE_CTX_GRX_C_P7 C27 0.1U_0402_16V4Z PCIE_CTX_GRX_P7
H31 1 2 V4
K28 1 2 V5
G30 1 2 N2
G29 1 2 J29 AD5
F28 1 2 J28 AD7
E27 1 2 W3
D28 1 2 A34 W2
C27 1 2 A33 N3
C25 1 2 AE5
PEG_TX[15] RSVD_TP_84
C35 AD9
B RSVD_NCTF_30 RSVD_TP_85 B
B35
RSVD_NCTF_31
IC,AUB_CFD_rPGA,R1P0 AP34
CONN@ VSS
CONN@
CRB 0.9 change to GND
CFG Straps for PROCESSOR

CFG0 @ R52 1 2 3.01K_0402_1% CFG4 @ R53 1 2 3.01K_0402_1%
PCI-Express Configuration Select CFG4-Display Port Presence

1: Single PEG 1: Disabled; No Physical
CFG0 *
0: Bifurcation enabled Display Port *
Not applicable for Clarksfield Processor attached to Embedded Display Port
A A
ǂǂPD
CFG4 0: Enabled; An external
CFG3 R54 1 2 3.01K_0402_1% Display Port CFG7
WW33 3.01K on CFG7 for PCIE Jitter
device is connected to the WW41 don't staff
Embedded Display Port
CFG3-PCI Express Static Lane Reversal
1: Normal Operation CFG7 @ R55 1 2 3.01K_0402_1%
CFG3 0: Lane Numbers Reversed
15 -> 0, 14 ->1, .....
Only temporary for early 2008/03/13 2009/05/11 Title
* Issued Date Deciphered Date
CFD samples (rPGA/BGA)
Auburndale(2/5)-DMI/PEG/FDI
Only for pre ES1 sample AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
5
4
3 2

1
Sheet 7 of 55
1.0
5 4 3 2 1
JCPU1D
JCPU1C
<18> DDR_B_D[0..63] W8 M_CLK_DDR2 <18>

D SB_CK[0] D
AA6 M_CLK_DDR0 <17> W9 M_CLK_DDR#2 <18>
SA_CK[0] DDR_B_D0 SB_CK#[0]
<17> DDR_A_D[0..63] AA7 M_CLK_DDR#0 <17> B5 M3 DDR_CKE2_DIMMB <18>
SA_CK#[0] DDR_B_D1 SB_DQ[0] SB_CKE[0]
P7 DDR_CKE0_DIMMA <17> A5
DDR_A_D0 SA_CKE[0] DDR_B_D2 SB_DQ[1]
A10 C3
DDR_A_D1 SA_DQ[0] DDR_B_D3 SB_DQ[2]
C10 B3 V7 M_CLK_DDR3 <18>
DDR_A_D2 SA_DQ[1] DDR_B_D4 SB_DQ[3] SB_CK[1]
C7 E4 V6 M_CLK_DDR#3 <18>
DDR_A_D3 SA_DQ[2] DDR_B_D5 SB_DQ[4] SB_CK#[1]
A7 Y6 M_CLK_DDR1 <17> A6 M2 DDR_CKE3_DIMMB <18>
DDR_A_D4 SA_DQ[3] SA_CK[1] DDR_B_D6 SB_DQ[5] SB_CKE[1]
B10 Y5 M_CLK_DDR#1 <17> A4
DDR_A_D5 SA_DQ[4] SA_CK#[1] DDR_B_D7 SB_DQ[6]
D10 P6 DDR_CKE1_DIMMA <17> C4
DDR_A_D6 SA_DQ[5] SA_CKE[1] DDR_B_D8 SB_DQ[7]
E10 D1
A8 D2
D8 SA_DQ[8] F2 SB_DQ[10] SB_CS#[0] AB8 DDR_CS2_DIMMB# <18>
DDR_A_D9 F10 AE2 DDR_B_D11 F1 AD6
DDR_A_D10 SA_DQ[9] SA_CS#[0] DDR_CS0_DIMMA# <17> DDR_B_D12 SB_DQ[11] SB_CS#[1] DDR_CS3_DIMMB# <18>
E6 SA_DQ[10] SA_CS#[1] AE8 DDR_CS1_DIMMA# <17> C2 SB_DQ[12]
DDR_A_D11 F7 DDR_B_D13 F5
E9 SA_DQ[12] F3 SB_DQ[14]
DDR_A_D13 B7 DDR_B_D15 G4 AC7
DDR_A_D14 SA_DQ[13] DDR_B_D16 SB_DQ[15] SB_ODT[0] M_ODT2 <18>
E7 SA_DQ[14] SA_ODT[0] AD8 M_ODT0 <17> H6 SB_DQ[16] SB_ODT[1] AD1 M_ODT3 <18>
DDR_A_D15 C6 AF9 DDR_B_D17 G2
DDR_A_D16 SA_DQ[15] SA_ODT[1] M_ODT1 <17> DDR_B_D18 SB_DQ[17]
H10 SA_DQ[16] J6 SB_DQ[18]
DDR_A_D17 G8 DDR_B_D19 J3
K7 SA_DQ[18] G1 SB_DQ[20] DDR_B_DM[0..7] <18>
DDR_A_D19 J8 DDR_B_D21 G5 D4 DDR_B_DM0
DDR_A_D20 SA_DQ[19] DDR_B_D22 SB_DQ[21] SB_DM[0] DDR_B_DM1
G7 SA_DQ[20] J2 SB_DQ[22] SB_DM[1] E1
DDR_A_D21 G10 DDR_B_D23 J1 H3 DDR_B_DM2
DDR_A_D22 SA_DQ[21] DDR_A_DM0 DDR_A_DM[0..7] <17> DDR_B_D24 SB_DQ[23] SB_DM[2] DDR_B_DM3
J7 SA_DQ[22] SA_DM[0] B9 J5 SB_DQ[24] SB_DM[3] K1
DDR_A_D23 J10 D7 DDR_A_DM1 DDR_B_D25 K2 AH1 DDR_B_DM4
DDR_A_D24 SA_DQ[23] SA_DM[1] DDR_A_DM2 DDR_B_D26 SB_DQ[25] SB_DM[4] DDR_B_DM5
L7 SA_DQ[24] SA_DM[2] H7 L3 SB_DQ[26] SB_DM[5] AL2
DDR_A_D25 M6 M7 DDR_A_DM3 DDR_B_D27 M1 AR4 DDR_B_DM6
DDR_A_D26 SA_DQ[25] SA_DM[3] DDR_A_DM4 DDR_B_D28 SB_DQ[27] SB_DM[6] DDR_B_DM7
M8 SA_DQ[26] SA_DM[4] AG6 K5 SB_DQ[28] SB_DM[7] AT8
DDR_A_D27 L9 AM7 DDR_A_DM5 DDR_B_D29 K4
DDR_A_D28 SA_DQ[27] SA_DM[5] DDR_A_DM6 DDR_B_D30 SB_DQ[29]
L6 SA_DQ[28] SA_DM[6] AN10 M4 SB_DQ[30]
C DDR_A_D29 DDR_A_DM7 DDR_B_D31 C
K8 SA_DQ[29] SA_DM[7] AN13 N5 SB_DQ[31]
DDR_A_D30 N8 DDR_B_D32 AF3
P9 SA_DQ[31] AG1 SB_DQ[33] DDR_B_DQS#[0..7] <18>
DDR_A_D32 AH5 DDR_B_D34 AJ3 D5 DDR_B_DQS#0
DDR_A_D33 SA_DQ[32] DDR_B_D35 SB_DQ[34] SB_DQS#[0] DDR_B_DQS#1
AF5 SA_DQ[33] DDR_A_DQS#[0..7] <17> AK1 SB_DQ[35] SB_DQS#[1] F4
DDR_A_D34 AK6 C9 DDR_A_DQS#0 DDR_B_D36 AG4 J4 DDR_B_DQS#2
SA_DQ[34] SA_DQS#[0] SB_DQ[36] SB_DQS#[2]
DDR SYSTEM MEMORY A
DDR_A_D35 AK7 F8 DDR_A_DQS#1 DDR_B_D37 AG3 L4 DDR_B_DQS#3

DDR_A_D36 SA_DQ[35] SA_DQS#[1] DDR_A_DQS#2 DDR_B_D38 SB_DQ[37] SB_DQS#[3] DDR_B_DQS#4
AF6 J9 AJ4 AH2
SA_DQ[36] SA_DQS#[2] SB_DQ[38] SB_DQS#[4]
DDR SYSTEM MEMORY - B

DDR_A_D37 AG5 N9 DDR_A_DQS#3 DDR_B_D39 AH4 AL4 DDR_B_DQS#5
AJ7 AH7 AK3 AR5
AJ6 AK9 AK4 AR8
DDR_A_D40 SA_DQ[39] SA_DQS#[5] DDR_A_DQS#6 DDR_B_D42 SB_DQ[41] SB_DQS#[7]
AJ10 AP11 AM6
DDR_A_D41 SA_DQ[40] SA_DQS#[6] DDR_A_DQS#7 DDR_B_D43 SB_DQ[42]
AJ9 AT13 AN2
DDR_A_D42 SA_DQ[41] SA_DQS#[7] DDR_B_D44 SB_DQ[43]
AL10 AK5
AK12 AK2
AK8 AM4
AL7 DDR_A_DQS[0..7] <17> AM3 DDR_B_DQS[0..7] <18>
DDR_A_D46 SA_DQ[45] DDR_A_DQS0 DDR_B_D48 SB_DQ[47] DDR_B_DQS0
AK11 C8 AP3 C5
DDR_A_D47 SA_DQ[46] SA_DQS[0] DDR_A_DQS1 DDR_B_D49 SB_DQ[48] SB_DQS[0] DDR_B_DQS1
AL8 F9 AN5 E3
AN8 H9 AT4 H4
AM10 M9 AN6 M5
AR11 AH8 AN4 AG2
AL11 AK10 AN3 AL5
AM9 AN11 AT5 AP5
AN9 AR13 AT6 AR7
DDR_A_D54 SA_DQ[53] SA_DQS[7] DDR_B_D56 SB_DQ[55] SB_DQS[7]
AT11 AN7
AP12 AP6
AM12 AP8
AN12 DDR_A_MA[0..15] <17> AT9
DDR_A_D58 SA_DQ[57] DDR_A_MA0 DDR_B_D60 SB_DQ[59]
AM13 Y3 AT7
DDR_A_D59 SA_DQ[58] SA_MA[0] DDR_A_MA1 DDR_B_D61 SB_DQ[60]
AT14 W1 AP9
DDR_A_D60 SA_DQ[59] SA_MA[1] DDR_A_MA2 DDR_B_D62 SB_DQ[61]
AT12 AA8 AR10 DDR_B_MA[0..15] <18>
B DDR_A_D61 SA_DQ[60] SA_MA[2] DDR_A_MA3 DDR_B_D63 SB_DQ[62] DDR_B_MA0 B
AL13 AA3 AT10 U5
DDR_A_D62 SA_DQ[61] SA_MA[3] DDR_A_MA4 SB_DQ[63] SB_MA[0] DDR_B_MA1
AR14 V1 V2
DDR_A_D63 SA_DQ[62] SA_MA[4] DDR_A_MA5 SB_MA[1] DDR_B_MA2
AP14 AA9 T5
SA_DQ[63] SA_MA[5] DDR_A_MA6 SB_MA[2] DDR_B_MA3
V8 V3
SA_MA[6] DDR_A_MA7 SB_MA[3] DDR_B_MA4
T1 R1
Y9 <18> DDR_B_BS0 AB1 T8
SA_MA[8] DDR_A_MA9 SB_BS[0] SB_MA[5] DDR_B_MA6
<17> DDR_A_BS0 AC3 U6 <18> DDR_B_BS1 W5 R2
SA_BS[0] SA_MA[9] DDR_A_MA10 SB_BS[1] SB_MA[6] DDR_B_MA7
<17> DDR_A_BS1 AB2 AD4 <18> DDR_B_BS2 R7 R6
SA_BS[1] SA_MA[10] DDR_A_MA11 SB_BS[2] SB_MA[7] DDR_B_MA8
<17> DDR_A_BS2 U7 T2 R4
SA_BS[2] SA_MA[11] DDR_A_MA12 SB_MA[8] DDR_B_MA9
U3 R5
AG8 <18> DDR_B_CAS# AC5 AB5
SA_MA[13] DDR_A_MA14 SB_CAS# SB_MA[10] DDR_B_MA11
T3 <18> DDR_B_RAS# Y7 P3
SA_MA[14] DDR_A_MA15 SB_RAS# SB_MA[11] DDR_B_MA12
<17> DDR_A_CAS# AE1 V9 <18> DDR_B_WE# AC6 R3
SA_CAS# SA_MA[15] SB_WE# SB_MA[12] DDR_B_MA13
<17> DDR_A_RAS# AB3 AF7
SA_RAS# SB_MA[13] DDR_B_MA14
<17> DDR_A_WE# AE9 P5
SA_WE# SB_MA[14] DDR_B_MA15
N1
SB_MA[15]
CONN@
CONN@
A A

Cantiga(2/6)-DDR3 A/B CH
5
4
3 2

1
Sheet 8 of 55
1.0
5 4 3 2 1
DIS@
C987
+VCC_CORE 0_0805_5%
JCPU1F
Add for RF +GFX_CORE JCPU1G
AT21 VAXG1
22U_0805_6.3V6M
22U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
AT19 AR22 VCC_AXG_SENSE
VAXG2 VAXG_SENSE VCC_AXG_SENSE <50>
47P_0402_50V8J
47P_0402_50V8J
47P_0402_50V8J
47P_0402_50V8J
VSS_AXG_SENSE
SENSE
LINES
AT18 AT22 VSS_AXG_SENSE <50>
VAXG3 VSSAXG_SENSE
C987
C988
C989
C990
+VCCP
48A 18A 1 1 1 1 1 1 1 1 AT16
VAXG4 15A
C1389
C1390
C1391
C1392
SG@ SG@ SG@ SG@ AR21 2009. 11.05 change R43
D VAXG5 GFXVR_DPRSLPVR D
AG35 AH14 AR19
VCC1 VTT0_1 VAXG6
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
AG34
VCC2 VTT0_2
AH12
SG@ 2 SG@2 SG@2 SG@2 2 2 2 2
AR18
VAXG7 from 4.7K to 249 ohm
GFXVR_VID_0
@
R1186
AG33 AH11 AR16 AM22 GFXVR_VID_0 <50>
VCC3 VTT0_3 VAXG8 GFX_VID[0]
1
AG32 AH10 1 1 1 1 AP21 AP22 GFXVR_VID_1
VCC4 VTT0_4 VAXG9 GFX_VID[1] GFXVR_VID_1 <50>
10K_0402_5%
C40
C41
C42
C43
GRAPHICS VIDs
AG31 J14 AP19 AN22 GFXVR_VID_2
VCC5 VTT0_5 VAXG10 GFX_VID[2] GFXVR_VID_3 GFXVR_VID_2 <50>
AG30 J13 AP18 AP23 GFXVR_VID_3 <50>
VCC6 VTT0_6 VAXG11 GFX_VID[3] GFXVR_VID_4
AG29 H14 AP16 AM23 GFXVR_VID_4 <50>
VCC7 VTT0_7 2 2 2 2 VAXG12 GFX_VID[4]
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
AG28 H12 AN21 AP24 GFXVR_VID_5
2
GRAPHICS
AG27 G14 AN19 AN24 GFXVR_VID_6
C991
C993
C994
AG26 G13 1 1 1 AN18
VCC10 VTT0_10 @ @ @ VAXG15 SG@ R43 1
AF35
VCC11 VTT0_11
G12 AN16
VAXG16 2 249_0402_1%
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
AF34 G11 AM21 AR25 GFXVR_EN
VCC12 VTT0_12 VAXG17 GFX_VR_EN GFXVR_DPRSLPVR GFXVR_EN <50>
AF33 VCC13 VTT0_13 F14 1 1 1 1 1 AM19 VAXG18 GFX_DPRSLPVR AT25 GFXVR_DPRSLPVR <50>
AF32 F13 2 2 2 AM18 AM24 GFXVR_IMON
VCC14 VTT0_14 VAXG19 GFX_IMON GFXVR_IMON <50>
C48
C49
C50
C51
C52
AF31 VCC15 VTT0_15 F12 AM16 VAXG20
AF30 VCC16 VTT0_16 F11 AL21 VAXG21
AF29 E14 2 2 @ 2 @ 2 2 AL19 DIS@ R128 2 1 1K_0402_5%
VCC17 VTT0_17 VAXG22 +1.5VS
AF28 VCC18 VTT0_18 E12 AL18 VAXG23
330U_D2_2V_Y
330U_D2_2VY_R7M
AF27 D14 +VCCP AL16
VCC19 VTT0_19 SG@ 1 SG@ VAXG24
AF26 VCC20 VTT0_20 D13 1 AK21 VAXG25 VDDQ1 AJ1
C995
C996
1U_0603_10V4Z
1U_0603_10V4Z
1U_0603_10V4Z
1U_0603_10V4Z
1U_0603_10V4Z
1.1V RAIL POWER
AD35 VCC21 VTT0_21 D12 AK19 VAXG26 VDDQ2 AF1

AD34 D11 + + AK18 AE7
- 1.5V RAILS
VCC22 VTT0_22 VAXG27 VDDQ3 1 1 1 1 1
10U_0805_6.3V6M
10U_0805_6.3V6M
22U_0805_6.3V6M
47P_0402_50V8J
47P_0402_50V8J
47P_0402_50V8J
47P_0402_50V8J
C56
C57
C58
C59
C60
AD33 VCC23 VTT0_23 C14 AK16 VAXG28 VDDQ4 AE4
AD32 VCC24 VTT0_24 C13 1 1 1 1 1 1 1 AJ21 VAXG29 VDDQ5 AC1
2 2
C1397
C1398
C1399
C1400
AD31 VCC25 VTT0_25 C12 AJ19 VAXG30 VDDQ6 AB7
2 2 2 2 2
C61
C62
C63
AD30 VCC26 VTT0_26 C11 AJ18 VAXG31 VDDQ7 AB4
AD29 VCC27 VTT0_27 B14 AJ16 VAXG32 VDDQ8 Y1
AD28 B12 2 2 2 2 2 2 2 AH21 W7
VCC28 VTT0_28 VAXG33 VDDQ9
POWER
AD27 VCC29 VTT0_29 A14 AH19 VAXG34 3A VDDQ10 W4
AD26 VCC30 VTT0_30 A13 2009. 11.05 change C996 AH18 VAXG35 VDDQ11 U1
22U_0805_6.3V6M
22U_0805_6.3V6M
220U_D2_2VY_R15M
AC35 VCC31 VTT0_31 A12 AH16 VAXG36 VDDQ12 T7
C
AC34 VCC32 VTT0_32 A11 Add for RF to ESR 7m ohm VDDQ13 T4 1 C
AC33 VCC33 VDDQ14 P1 1 1
+VCCP
C64
C65
C66
AC32 N7 +
VCC34 +VCCP VDDQ15
AC31 VCC35 VDDQ16 N4
DDR3
AC30 VCC36 VTT0_33 AF10 VDDQ17 L1
2 2 2
10U_0805_6.3V6M
10U_0805_6.3V6M
AC29 VCC37 VTT0_34 AE10 J24 VTT1_45 VDDQ18 H1
FDI
10U_0805_6.3V6M
22U_0805_6.3V6M
AC28 VCC38 VTT0_35 AC10 J23 VTT1_46
CPU CORE SUPPLY
AC27
AC26
VCC39 VTT0_36 AB10
Y10
1 1 2009. 08.17 Change C61,C62, H25 VTT1_47
VCC40 VTT0_37 1 1
C67
C68
C69
C70
AA35
VCC41 VTT0_38
W10 C67,C68,C69,C76 to 10u
AA34 U10 P10 +VCCP
VCC42 VTT0_39 2 2 VTT0_59
10U_0805_6.3V6M
10U_0805_6.3V6M
AA33 T10 N10
VCC43 VTT0_40 2 2 VTT0_60
AA32 J12 L10
VCC44 VTT0_41 VTT0_61
AA31 J11 K10 1 1
C71
C72
AA30 J16 +VTT_43
VCC46 VTT0_43 +VTT_44 +VCCP
AA29 J15
VCC47 VTT0_44
AA28
VCC48 +VTT_44 R56 +VCCP 2 2
AA27
VCC49 1 2 0_0603_5%
1.1V
AA26 J22
VCC50 +VTT_43 R57 VTT1_63
Y35 1 2 0_0603_5% K26 J20
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
10U_0805_6.3V6M
Y34 J27 J18
PEG & DMI

Y33 1 1 1 1 J26 H21 +VCCP
22U_0805_6.3V6M
22U_0805_6.3V6M
C73
C74
C75
C76
Y32 J25 H20
Y31 H27 H19
Y30 G28 1 1
VCC56 2 2 2 2 VTT1_53
C77
C78
Y29 G27
VCC57 VTT1_54
Y28 G26
VCC58 VTT1_55
Y27 F26
VCC59 to power VTT1_56 2 2
Y26 E26 L26
VCC60 VTT1_57 VCCPLL1
1.8V
V35 AN33 H_PSI# <49> E25 L27
VCC61 PSI# VTT1_58 VCCPLL2
V34 0.6A M26
POWER
VCC62 VCCPLL3
V33 H_VID[0..6] <49>
VCC63
10U_0805_6.3V6M
V32 AK35 H_VID0
VCC64 VID[0] +1.8VS
1U_0603_10V4Z
1U_0603_10V4Z
B B
4.7U_0603_6.3V6K
H_VID1
2.2U_0603_6.3V4Z
V31 AK33 to power
VCC65 VID[1] H_VID2
V30 AK34 1 1 1 1 1
VCC66 VID[2]
C79
C80
C81
C82
C83
V29 AL35 H_VID3
VCC67 VID[3]
CPU VIDS
V28 AL33 H_VID4

VCC68 VID[4] H_VID5
V27 AM33
VCC69 VID[5] 2 2 2 2 2
CPU
V26 AM35 H_VID6 IC,AUB_CFD_rPGA,R1P0

VCC70 VID[6] PM_DPRSLPVR_R R58
U35 AM34 1 2 0_0402_5% H_DPRSLPVR <49>
CONN@
VCC71 PROC_DPRSLPVR
U34
VCC72 to power
U33
VCC73
U32
VCC74
U31 G15 VTT_SELECT <46>
VCC75 VTT_SELECT
U30
VCC76
U29
VCC77
U28
VCC78
H_VTTVID1 = Low, 1.1V(Clarksfield)
U27
VCC79
U26
VCC80
H_VTTVID1 = High, 1.05V(Auburndale)
R35
VCC81
R34
VCC82
R33
VCC83
R32 AN35 IMVP_IMON <49>
VCC84 ISENSE
R31
VCC85 to power
R30
VCC86
R29
VCC87
AJ34 VCCSENSE_R R59 0_0402_5% VCCSENSE
SENSE LINES
R28 1 2 VCCSENSE <49>

VCC88 VCC_SENSE
R27 AJ35 VSSSENSE_R R60 1 2 0_0402_5% VSSSENSE
VSSSENSE <49>
VCC89 VSS_SENSE
R26
VCC90
P35
VCC91
P34 B15 VTT_SENSE <46>
VCC92 VTT_SENSE VSS_SENSE_VTT R203 1
P33
VCC93 VSS_SENSE_VTT
A15 2 0_0402_5%
P32
VCC94
P31
VCC95
P30 VCC96
A A
P29 VCC97
P28 VCC98
P27 VCC99
P26 VCC100
Near Processor
+VCC_CORE
VCCSENSE R61 1 2 100_0402_1%

VSSSENSE R62 1 2 100_0402_1%
Auburndale(4/5)-PWR
IC,AUB_CFD_rPGA,R1P0 Size Document Number Rev
CONN@
5
http://laptop-motherboard-schematic.blogspot.com/ 4
3 2

1
Sheet 9 of 55
1.0
5 4 3 2 1
JCPU1H JCPU1I
+VCC_CORE
CPU CORE
Inside cavity Reserve for RF
AT20 VSS1 VSS81 AE34
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
22U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
AT17 VSS2 VSS82 AE33
47P_0402_50V8J
47P_0402_50V8J
47P_0402_50V8J
47P_0402_50V8J
AR31 VSS3 VSS83 AE32 K27 VSS161
AR28 VSS4 VSS84 AE31 K9 VSS162 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
C84
C85
C86
C87
C88
C89
C90
C91
C92
C93
C94
C95
C1401
C1402
C1403
C1404
AR26 VSS5 VSS85 AE30 K6 VSS163
AR24 AE29 K3
VSS6 VSS86 VSS164
AR23 AE28 J32
VSS7 VSS87 VSS165 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
AR20 AE27 J30
D VSS8 VSS88 VSS166 D
AR17 AE26 J21
VSS9 VSS89 VSS167
AR15 AE6 J19
VSS10 VSS90 VSS168
AR12 AD10 H35
VSS11 VSS91 VSS169
AR9 AC8 H32
VSS12 VSS92 VSS170
AR6 AC4 H28
VSS13 VSS93 VSS171
10U_0805_6.3V6M
10U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
AR3 AC2 H26
VSS14 VSS94 VSS172
AP20 AB35 H24
VSS15 VSS95 VSS173
C100
AP17 AB34 H22
VSS16 VSS96 VSS174 1 1 1 1 1 1 1 1 1 1 1 1
between
C96
C97
C119
C120
C101
C102
C103
C121
C118
C106
C107
AP13 AB33 H18
VSS17 VSS97 VSS175
AP10 AB32 H15
AP7
VSS18
VSS19
VSS98
VSS99
AB31 H13
VSS176
VSS177 2 2 2 2 2
@
2 2 2 @ 2 2 2 2
Inductor and
AP4 AB30 H11
AP2
AN34
VSS20
VSS21
VSS100
VSS101 AB29
AB28
H8
H5
VSS178
VSS179 socket
VSS22 VSS102 VSS180
AN31 VSS23 VSS103 AB27 H2 VSS181
AN23 VSS24 VSS104 AB26 G34 VSS182
AN20 VSS25 VSS105 AB6 G31 VSS183
330U_D2_2VM_R9M
330U_D2_2VM_R9M
330U_D2_2VM_R9M
330U_D2_2VM_R9M
10U_0805_6.3V6M
10U_0805_6.3V6M
22U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
AN17 VSS26 VSS106 AA10 G20 VSS184
47P_0402_50V8J
AM29 VSS27 VSS107 Y8 G9 VSS185 1 1 1 1
AM27 VSS28 VSS108 Y4 G6 VSS186 1 1 1 1 1 1 1 1 1
C982
C114
C115
C116
C117
C105
C98
C99
C104
C108
C109
C110
C111
AM25 Y2 G3 + + + +
VSS29 VSS109 VSS187
AM20 VSS30 VSS110 W35 F30 VSS188
AM17 W34 F27 @ @
VSS31 VSS111 VSS189 2 2 2 2 2 2 @ 2 2 2 2 2 2 2
AM2 VSS36 VSS116 W29 E35 VSS194
AL34
AL31
VSS37
VSS38 VSS VSS117
VSS118
W28
W27
E32
E29
VSS195
VSS196 VSS 330uF 9mohm
AL23 VSS39 VSS119 W26 E24 VSS197
AL20 VSS40 VSS120 W6 E21 VSS198
C C
AL17 VSS41 VSS121 V10 E18 VSS199
AL12 VSS42 VSS122 U8 E13 VSS200
AL3 VSS45 VSS125 T35 E5 VSS203
AK29 T34 E2 AT35 VSS_NCTF1_R
VSS46 VSS126 VSS204 VSS_NCTF1 VSS_NCTF2_R
AK27 VSS47 VSS127 T33 D33 VSS205 VSS_NCTF2 AT1
AK25 T32 D30 AR34 VSS_NCTF3_R
AK20 T31 D26 B34
AK17 T30 D9 B2
NCTF
AJ31 T29 D6 B1
AJ23 T28 D3 A35
VSS52 VSS132 VSS210 VSS_NCTF7
AJ20 T27 C34
VSS53 VSS133 VSS211
AJ17 T26 C32
VSS54 VSS134 VSS212
AJ14 T6 C29
VSS55 VSS135 VSS213
AJ11 R10 C28
VSS56 VSS136 VSS214
AJ8 P8 C24
VSS57 VSS137 VSS215
AJ5 P4 C22
VSS58 VSS138 VSS216
AJ2 P2 C20
VSS59 VSS139 VSS217
AH35 N35 C19
VSS60 VSS140 VSS218
AH34 N34 C16
VSS61 VSS141 VSS219
AH33 N33 B31
VSS62 VSS142 VSS220
AH32 N32 B25
VSS63 VSS143 VSS221
AH31 N31 B21
VSS64 VSS144 VSS222
AH30 N30 B18
VSS65 VSS145 VSS223
AH29 N29 B17
VSS66 VSS146 VSS224
AH28 N28 B13
VSS67 VSS147 VSS225
AH27 N27 B11
VSS68 VSS148 VSS226
AH26 N26 B8
VSS69 VSS149 VSS227
AH20 N6 B6
VSS70 VSS150 VSS228
AH17 M10 B4
VSS71 VSS151 VSS229
AH13 L35 A29
B VSS72 VSS152 VSS230 B
AH9 L32 A27
VSS73 VSS153 VSS231
AH6 L29 A23
VSS74 VSS154 VSS232
AH3 L8 A9
VSS75 VSS155 VSS233
AG10 L5
VSS76 VSS156
AF8 L2
VSS77 VSS157
AF4 K34
VSS78 VSS158
AF2 K33
VSS79 VSS159
AE35 K30
VSS80 VSS160
IC,AUB_CFD_rPGA,R1P0 IC,AUB_CFD_rPGA,R1P0
CONN@ CONN@
A A

Auburndale(5/5)-GND/Bypass
5
4
3 2

1
Sheet 10 of 55
1.0
5 4 3 2 1
ICH_RTCX1 +RTCVCC +3VS
R63 1 2 10M_0402_5% ICH_RTCX2

R65 1 2 1M_0402_5% SM_INTRUDER# R64 1 2 10K_0402_5% SIRQ
R66 1 2 330K_0402_5% PCH_INTVRMEN

@ R67 1 2 1K_0402_5% SB_SPKR
ǂ
INTVRMEN
ǂ
32.768KHZ_12.5PF_Q13MC14610002
H Integrated VRM enable LOW=Default
*
1
4
L Integrated VRM disable HIGH=No Reboot *
18P_0402_50V8J
18P_0402_50V8J
1 1
OSC
OSC
C122
C123
D D
U1A
2 2
Y1
NC
NC
1
+RTCVCC ICH_RTCX1 B13 D33
RTCX1 FWH0 / LAD0 LPC_AD0 <31,39>
C124 CLRP1 ICH_RTCX2 D13 B33 LPC_AD1 <31,39>
2
1U_0603_10V4Z SHORT PADS RTCX2 FWH1 / LAD1

C32 LPC_AD2 <31,39>
2
2 FWH2 / LAD2
FWH3 / LAD3 A32 LPC_AD3 <31,39>
R69 1 2 20K_0402_1% ICH_RTCRST# C14 RTCRST#
FWH4 / LFRAME# C34 LPC_FRAME# <31,39>
R70 1 2 20K_0402_1% ICH_SRTCRST# D17 SRTCRST# LDRQ0#
1 A34 T13 PAD
RTC
LPC
LDRQ0#
1
SM_INTRUDER# A16 F34 LDRQ1# T14 PAD
C125 CLRP2 INTRUDER# LDRQ1# / GPIO23
1U_0603_10V4Z SHORT PADS PCH_INTVRMEN A14 AB9 SIRQ
SIRQ <39>
2
2 INTVRMEN SERIRQ
R1159 1 2 33_0402_5% HDA_BIT_CLK A30

<34> HDA_BITCLK_MDC HDA_BCLK
R73 1 2 33_0402_5% AK7 SATA_RXN0_C
<34> HDA_BITCLK_CODEC SATA0RXN SATA_RXN0_C <30>
R1160 33_0402_5% HDA_SYNC SATA_RXP0_C
<34> HDA_SYNC_MDC
R75
1
1
2
2 33_0402_5%
D29 HDA_SYNC SATA0RXP AK6
AK11 SATA_TXN0_C C126 1 2 0.01U_0402_50V7K SATA_TXN0
SATA_RXP0_C <30> HDD
<34> HDA_SYNC_CODEC SATA0TXN SATA_TXN0 <30>
SB_SPKR P1 AK9 SATA_TXP0_C C127 1 2 0.01U_0402_50V7K SATA_TXP0
<34> SB_SPKR SPKR SATA0TXP SATA_TXP0 <30>
1 2 HDA_RST# C30
<34> HDA_RST#_MDC HDA_RST#
R1161 1 2 33_0402_5% AH6 SATA_RXN1_C
<34,39> HDA_RST#_CODEC SATA1RXN SATA_RXN1_C <30>
R78 33_0402_5% AH5 SATA_RXP1_C
SATA1RXP SATA_RXP1_C <30>
HDA_SDIN0 G30 AH9 SATA_TXN1_C C130 1 2 0.01U_0402_50V7K SATA_TXN1
<34> HDA_SDIN0 HDA_SDIN0 SATA1TXN
AH8 SATA_TXP1_C C131 1 2 0.01U_0402_50V7K SATA_TXP1
SATA_TXN1 <30> ODD
SATA1TXP SATA_TXP1 <30>
<34> HDA_SDIN1 HDA_SDIN1 F30 HDA_SDIN1
SATA2RXN AF11
@ C53 1 2 22P_0402_50V8J HDA_BITCLK_CODEC E32 AF9
IHDA
HDA_SDIN2 SATA2RXP
ǂ
SATA2TXN AF7
C @ C54 1 2 22P_0402_50V8J HDA_SDOUT_CODEC F32 AF6 C
HDA_SDIN3 SATA2TXP
SATA2 SATA3 don't
SATA3RXN AH3 support on HM55
<34> HDA_SDOUT_MDC R81 1 2 33_0402_5% HDA_SDOUT B29 AH1
R82 HDA_SDO SATA3RXP
<34> HDA_SDOUT_CODEC 1 2 33_0402_5% SATA3TXN AF3
SATA3TXP AF1
ME_EN# H32
SATA
HDA_DOCK_EN# / GPIO33 SATA_RXN4_C
SATA4RXN AD9 SATA_RXN4_C <37>
PAD T16 J30 AD8 SATA_RXP4_C
HDA_DOCK_RST# / GPIO13 SATA4RXP SATA_RXP4_C <37>
AD6 SATA_TXN4_C PA@
PA@C128
C128 1 2 0.01U_0402_50V7K SATA_TXN4
SATA4TXN
AD5 SATA_TXP4_C PA@C129
PA@C129 1 2 0.01U_0402_50V7K SATA_TXP4
SATA_TXN4 <37> E SATA
PCH_JTAG_TCK M3 AD3 SATA_RXN5_C
JTAG_TCK SATA5RXN SATA_RXN5_C <30>
AD1 SATA_RXP5_C
SATA5RXP SATA_RXP5_C <30>
PCH_JTAG_TMS K3 AB3 SATA_TXN5_C PA@
PA@C1276
C1276 1 2 0.01U_0402_50V7K SATA_TXN5
JTAG_TMS SATA5TXN
AB1 SATA_TXP5_C PA@C1277
PA@C1277 1 2 0.01U_0402_50V7K SATA_TXP5
SATA_TXN5 <30> Multi Bay
PCH_JTAG_TDI K1 JTAG_TDI
JTAG
PCH_JTAG_TDO J2 AF16
JTAG_TDO SATAICOMPO
PCH_JTAG_RST# J4 AF15 R89 1 2 37.4_0402_1% +3VALW
TRST# SATAICOMPI +1.05VS +3VALW +3VALW +3VALW
2
+3VS @
2
<38> SPI_CLK_PCH SPI_CLK_PCH R654 1 2 15_0402_5% BA2 R85
SPI_CLK R87
R86 R84 20K_0402_5%
R656 1 2 10K_0402_5% SPI_SB_CS# SPI_SB_CS# AV3 R91 1 2 10K_0402_1% +3VS @ 200_0402_5% @ 200_0402_5% @ 20K_0402_5%
<38> SPI_SB_CS# SPI_CS0#
1
AY3 T3 PCH_JTAG_TDI
SATA_LED# <40>
1
R657 SPI_SO_R SPI_CS1# SATALED# PCH_JTAG_TDO PCH_JTAG_TMS PCH_JTAG_RST#
1 2 10K_0402_5%
2
@
1
<38> SPI_SI SPI_SI R655 1 2 15_0402_5% AY1 Y9 GPIO21 R685
B SPI_MOSI SATA0GP / GPIO21 R88 B
R684 R683 10K_0402_1%
SPI
SPI_SO_R AV1 V1 GPIO19 @ 100_0402_1% @ 100_0402_1% @ 10K_0402_5%

<38> SPI_SO_R SPI_MISO SATA1GP / GPIO19
1
2
2
IBEXPEAK-M_FCBGA1071
+3VS
PCH_JTAG_TCK
HDA_SDO 1
R90
2
51_0402_5%
HDA_SYNC This signal has a weak internal pull down.
This signal can't PU
1
This signal has a weak internal pull down. PCH JTAG Enable PCH JTAG Disable
R1255 H=>On Die PLL is supplied by 1.5V Disable iTPM=No Stuff PCH Pin RefDes
L=>On Die PLL is supplied by 1.8V * Enable iTPM=Stuff ES1 ES2 ES1 ES2
100K_0402_5% * @ BATT1
R86 No Install 200ohm No Install No Install
2
PCH_JTAG_TDO
ME_EN# R684 No Install 100ohm No Install No Install
HDA_DOCK_EN# +RTCVCC +3VL BATT1.1
1
D
ME debug mode , this signal has a weak internal PU R84 200ohm 200ohm No Install No Install
<39> ME_EN 2 Q113 CR2032 RTC BATTERY PCH_JTAG_TMS
G 2N7002_SOT23-3 H=>security measures defined in the Flash D3 R683 100ohm 100ohm No Install No Install
S * Descriptor will be in effect (default) 2
3
1
1 JBATT1 R85 200ohm 200ohm 20Kohm No Install

W=20mils W=20mils 3 R94 1 2 1K_0402_5% 1 PCH_JTAG_TDI
R1256 1
L=>Flash Descriptor Security will be overridden W=20mils 2 2
R685 100ohm 100ohm 10Kohm No Install
100K_0402_5% 1 DAN202U_SC70 3
C132 GND
4 PCH_JTAG_TCK R90 51ohm 51ohm 51ohm 51ohm
2
2.2U_0603_6.3V4Z GND
ACES_85205-02001 R87 20Kohm 20Kohm No Install No Install
A SPI_MOSI 2 Place near IBEX-M CONN@ PCH_JTAG_RST# A
This signal has a weak internal pull down. R88 10Kohm 10Kohm No Install No Install
9/11 Add for ME_EN
Disable iTPM=No Stuff
* Enable iTPM=Stuff
+3VS
iTPM ENABLE/DISABLE
+3VS
GPIO21 R92 2 1 10K_0402_5%
GPIO19 R93 2 1 10K_0402_5%
IBEX-M(1/6)-HDA/JTAG/SATA
ǂReserve GPIO19ǂ21 PD for LPM enable power saving
@ R68 1 2 1K_0402_5% SPI_SI Size Document Number Rev
SI DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5 4 3 2 1
5 4 3 2 1
EC_LID_OUT# R95 1 2 10K_0402_5% +3VALW

SMBCLK R96 1 2 2.2K_0402_5% +3VS
SMBDATA R97 1 2 2.2K_0402_5% +3VS
SML0CLK R98 1 2 2.2K_0402_5%

+3VS
SML0DATA R99 1 2 2.2K_0402_5%
R105 R106
SML0ALERT# R100 1 2 10K_0402_5% 2.2K_0402_5% 2.2K_0402_5%
2
SML1ALERT# R101 1 2 10K_0402_5% Q1A
D D
SML1CLK R103 1 2 2.2K_0402_5% SMBDATA 6 1 SMB_DATA_S3
SMB_DATA_S3 <17,18,19,30>
ǂSODIMMǂClock genǂG sensor
5
SML1DATA R104 1 2 2.2K_0402_5% Q1B 2N7002DW-7-F_SOT363-6 XDP
SMBCLK 3 4 SMB_CLK_S3
SMB_CLK_S3 <17,18,19,30>
U1B 2N7002DW-7-F_SOT363-6
SMBCLK
<31> PCIE_RXN1 PCIE_RXN1 BG30 B9 EC_LID_OUT# EC_LID_OUT# <39> Add for RF
PCIE_RXP1 PERN1 SMBALERT# / GPIO11 1
<31> PCIE_RXP1 BJ30
ǂWWANǂNew card
C133 1 PCIE_C_TXN1 PERP1 SMBCLK
WWAN <31> PCIE_TXN1 2 0.1U_0402_16V4Z BF29 PETN1 SMBCLK H14 SMBCLK <31> @
C134 1 2 0.1U_0402_16V4Z PCIE_C_TXP1 BH29 WLAN PCH R1194
<31> PCIE_TXP1 PETP1
C8 SMBDATA SMBDATA <31> 2.2_0402_5%
PCIE_RXN2 SMBDATA 2
<31> PCIE_RXN2 AW30 PERN2 9/11 Change from +3VS to +3VS_VGA
<31> PCIE_RXP2 PCIE_RXP2 BA30 1 @
C135 1 PCIE_C_TXN2 PERP2 SML0ALERT#
WLAN <31> PCIE_TXN2 2 0.1U_0402_16V4Z BC30 PETN2 SML0ALERT# / GPIO60 J14 C1406
C136 1 2 0.1U_0402_16V4Z PCIE_C_TXP2 BD30 12P_0402_50V
<31> PCIE_TXP2 PETP2 +3VS_VGA +3VS_VGA
C6 SML0CLK
PCIE_RXN3 SML0CLK 2
<32> PCIE_RXN3 AU30 For Intel LAN only
SMBus
PCIE_RXP3 PERN3 SML0DATA
<32> PCIE_RXP3 AT30 PERP3 SML0DATA G8
LAN C137 1 2 0.1U_0402_16V4Z GLAN_C_TXN AU32
<32> PCIE_TXN3 PETN3
C138 1 2 0.1U_0402_16V4Z GLAN_C_TXP AV32
<32> PCIE_TXP3 PETP3
2
M14 SML1ALERT# Q4A
PCIE_RXN4 SML1ALERT# / GPIO74
<31> PCIE_RXN4 BA32 PERN4
<31> PCIE_RXP4 PCIE_RXP4 BB32 E10 SML1CLK R215 0_0402_5% SMB_EC_CK2 <39> SMB_EC_DA2 6 1 THERM_DAT_GPU
PERP4 SML1CLK / GPIO58 THERM_DAT_GPU <26>
New Card PA@ C139 1 2 0.1U_0402_16V4Z PCIE_C_TXN4 BD32
<31> PCIE_TXN4 PETN4
5
PA@ C140 1 2 0.1U_0402_16V4Z PCIE_C_TXP4 BE32 G12 SML1DATA R231 0_0402_5% SMB_EC_DA2 <39> Q4B 2N7002DW-7-F_SOT363-6
<31> PCIE_TXP4 PETP4 SML1DATA / GPIO75
PCI-E*
BF33 DTS , read from EC SMB_EC_CK2 3 4 THERM_CLK_GPU
PERN5 THERM_CLK_GPU <26>
BH33 PERP5 CL_CLK1 T13
Controller
BG32 2N7002DW-7-F_SOT363-6
C PETN5 C
BJ32 PETP5 CL_DATA1 T11
Link
BA34 PERN6 CL_RST1# T9
+3VALW R405 1 2 10K_0402_5% CLKREQ_WWAN#_R AW34 PERP6
BC34 PETN6
BD34 PETP6
+3VS R411 1 2 10K_0402_5% CLKREQ_WLAN# H1 PEG_CLKREQ# R102 1 2 10K_0402_5%
PEG_A_CLKRQ# / GPIO47
AT34 PERN7
AU34 PERP7
ǂ
+3VS R677 1 2 10K_0402_5% CLKREQ_LAN# AU36 AD43 L_CLK_PCIE_VGA# R604 1 2 0_0402_5%
PETN7 CLKOUT_PEG_A_N CLK_PCIE_VGA# <24>
AV36 AD45 L_CLK_PCIE_VGA R605 1 2 0_0402_5% OK
PETP7 CLKOUT_PEG_A_P CLK_PCIE_VGA <24>
PCIE7 PCIE8 don't
R415 1 2 10K_0402_5% CLKREQ_EXP#_R BG34 AN4
+3VALW support on HM55 PERN8 CLKOUT_DMI_N CLK_EXP# <6>
PEG
BJ34 PERP8 CLKOUT_DMI_P AN2 CLK_EXP <6> OK
BG36 PETN8
+3VALW R503 1 2 10K_0402_5% PCIECLKREQ4# BJ36 PETP8 CLK_DP#
CLKOUT_DP_N / CLKOUT_BCLK1_N AT1 T71 PAD
AT3 CLK_DP T72 PAD
R107 1 CLKOUT_DP_P / CLKOUT_BCLK1_P
<31> CLK_PCIE_WWAN# 2 0_0402_5% CLK_PCIE_WWAN#_R AK48 CLKOUT_PCIE0N
OK WWAN R108 1 2 0_0402_5% CLK_PCIE_WWAN_R AK47
<31> CLK_PCIE_WWAN CLKOUT_PCIE0P
From CLK BUFFER

CLKIN_DMI_N AW24 CLK_DMI# <19> Nvidisa thermall sensor
<31> CLKREQ_WWAN# R80 1 2 100_0402_5% CLKREQ_WWAN#_R P9 BA24 OK
PCIECLKRQ0# / GPIO73 CLKIN_DMI_P CLK_DMI <19>
R109 1 2 0_0402_5% CLK_PCIE_WLAN#_R AM43 AP3 10/23 Reserve the Y2 for Intel PCH jitter issue.
<31> CLK_PCIE_WLAN# CLKOUT_PCIE1N CLKIN_BCLK_N CLK_BUF_BCLK# <19>
OK WLAN R110 1 2 0_0402_5% CLK_PCIE_WLAN_R AM45 AP1 OK
<31> CLK_PCIE_WLAN CLKOUT_PCIE1P CLKIN_BCLK_P CLK_BUF_BCLK <19>
<31> CLKREQ_WLAN# U4 XTAL25_IN

PCIECLKRQ1# / GPIO18
CLKIN_DOT_96N F18 CLK_BUF_DOT96# <19>
OK CLKIN_DOT_96P E18 CLK_BUF_DOT96 <19> OK
R111 1 2 0_0402_5% CLK_PCIE_LAN#_R AM47 XTAL25_OUT @ R113 1 2 1M_0402_5%
<32> CLK_PCIE_LAN# CLKOUT_PCIE2N
LAN+Card reader R112 1 2 0_0402_5% CLK_PCIE_LAN_R AM48
B <32> CLK_PCIE_LAN CLKOUT_PCIE2P B
CLKIN_SATA_N / CKSSCD_N AH13 CLK_BUF_CKSSCD# <19>
<32> CLKREQ_LAN# N4 AH12 OK @ Y2
PCIECLKRQ2# / GPIO20 CLKIN_SATA_P / CKSSCD_P CLK_BUF_CKSSCD <19>
1 2
PA@ R114 1 2 0_0402_5% CLK_PCIE_EXP#_R AH42 P41 OK
<31> CLK_PCIE_EXP# CLKOUT_PCIE3N REFCLK14IN CLK_14M_PCH <19>
OK PA@ R115 1 2 0_0402_5% CLK_PCIE_EXP_R AH41
<31> CLK_PCIE_EXP CLKOUT_PCIE3P
New Card 25MHZ_20P_1BG25000CK1A
1
<31> CLKREQ_EXP# PA@ R83 1 2 100_0402_5% CLKREQ_EXP#_R A8 PCIECLKRQ3# / GPIO25 CLKIN_PCILOOPBACK J42 CLK_PCI_FB <14> OK
1 R1225
18P_0402_50V8J
C141
0_0402_5%
AM51 AH51 XTAL25_IN
CLKOUT_PCIE4N XTAL25_IN XTAL25_OUT
AM53 AH53
2
CLKOUT_PCIE4P XTAL25_OUT 2 @
+3VALW R756 1 2 100_0402_5% PCIECLKREQ4# M9 AF38 R116 1 2 90.9_0402_1% +1.05VS
PCIECLKRQ4# / GPIO26 XCLK_RCOMP
PAD T59 AJ50 CLKOUT_PCIE5N CLKOUTFLEX0 / GPIO64 T45

PAD T60 AJ52 CLKOUT_PCIE5P
+3VALW R757 1 2 10K_0402_5% PCIECLKREQ5# H6 P43

Clock Flex
PCIECLKRQ5# / GPIO44 CLKOUTFLEX1 / GPIO65
PAD T61 AK53 CLKOUT_PEG_B_N CLKOUTFLEX2 / GPIO66 T42

PAD T62 AK51 CLKOUT_PEG_B_P
+3VALW R606 1 2 10K_0402_5% PEG_B_CLKRQ# P13 N50 R1021 1 2 22_0402_5%

PEG_B_CLKRQ# / GPIO56 CLKOUTFLEX3 / GPIO67 CLK_48M_CR <33>
Add for RF
IBEXPEAK-M_FCBGA1071 1 12P_0402_50V J
C1407
A 2 A

IBEX-M(2/6)-PCI-E/SMBUS/CLK
5 4 3 2 1
5 4 3 2 1
R770 EDID_CLK and EDID_DATA single

end and keep 30 mil with other
1 2 IGPU_BKLT_EN LVDS signal avoid noise
U1C 100K_0402_5% U1D
BA18 FDI_CTX_PRX_N0 <22> IGPU_BKLT_EN IGPU_BKLT_EN T48 BJ46
FDI_RXN0 FDI_CTX_PRX_N0 <7> L_BKLTEN SDVO_TVCLKINN
<7> DMI_CTX_PRX_N0 DMI_CTX_PRX_N0 BC24 BH17 FDI_CTX_PRX_N1 I_ENAVDD T47 BG46
DMI0RXN FDI_RXN1 FDI_CTX_PRX_N1 <7> <21> I_ENAVDD L_VDD_EN SDVO_TVCLKINP
<7> DMI_CTX_PRX_N1 DMI_CTX_PRX_N1 BJ22 BD16 FDI_CTX_PRX_N2
DMI1RXN FDI_RXN2 FDI_CTX_PRX_N2 <7>
<7> DMI_CTX_PRX_N2 DMI_CTX_PRX_N2 AW20 BJ16 FDI_CTX_PRX_N3 <22> DPST_PWM DPST_PWM Y48 BJ48
DMI2RXN FDI_RXN3 FDI_CTX_PRX_N3 <7> L_BKLTCTL SDVO_STALLN
<7> DMI_CTX_PRX_N3 DMI_CTX_PRX_N3 BJ20 BA16 FDI_CTX_PRX_N4 BG48
DMI3RXN FDI_RXN4 FDI_CTX_PRX_N4 <7> SDVO_STALLP
BE14 FDI_CTX_PRX_N5 AB48
FDI_RXN5 FDI_CTX_PRX_N5 <7> <22> I_EDID_CLK L_DDC_CLK
<7> DMI_CTX_PRX_P0 DMI_CTX_PRX_P0 BD24 BA14 FDI_CTX_PRX_N6 Y45 BF45
DMI0RXP FDI_RXN6 FDI_CTX_PRX_N6 <7> <22> I_EDID_DATA L_DDC_DATA SDVO_INTN
<7> DMI_CTX_PRX_P1 DMI_CTX_PRX_P1 BG22 BC12 FDI_CTX_PRX_N7 BH45
DMI1RXP FDI_RXN7 FDI_CTX_PRX_N7 <7> SDVO_INTP
<7> DMI_CTX_PRX_P2 DMI_CTX_PRX_P2 BA20 +3VS SG@1 2 AB46
DMI2RXP L_CTRL_CLK
SDVO
<7> DMI_CTX_PRX_P3 DMI_CTX_PRX_P3 BG20 BB18 FDI_CTX_PRX_P0 1 R771 2 10K_0402_5% V48
DMI3RXP FDI_RXP0 FDI_CTX_PRX_P0 <7> L_CTRL_DATA
BF17 FDI_CTX_PRX_P1 SG@ R772 10K_0402_5%
FDI_RXP1 FDI_CTX_PRX_P1 <7>
D DMI_CRX_PTX_N0 BE22 BC16 FDI_CTX_PRX_P2 SG@ R7731 2 2.37K_0402_1% AP39 T51 D
<7> DMI_CRX_PTX_N0 DMI0TXN FDI_RXP2 FDI_CTX_PRX_P2 <7> LVD_IBG SDVO_CTRLCLK
DMI_CRX_PTX_N1 BF21 BG16 FDI_CTX_PRX_P3 AP41 T53
<7> DMI_CRX_PTX_N1 DMI1TXN FDI_RXP3 FDI_CTX_PRX_P3 <7> LVD_VBG SDVO_CTRLDATA
DMI_CRX_PTX_N2 BD20 AW16 FDI_CTX_PRX_P4 PAD T69
<7> DMI_CRX_PTX_N2 DMI2TXN FDI_RXP4 FDI_CTX_PRX_P4 <7>
Display Port B
DMI_CRX_PTX_N3 BE18 BD14 FDI_CTX_PRX_P5 AT43
<7> DMI_CRX_PTX_N3 DMI3TXN FDI_RXP5 FDI_CTX_PRX_P5 <7> LVD_VREFH
BB14 FDI_CTX_PRX_P6 AT42 BG44
FDI_RXP6 FDI_CTX_PRX_P6 <7> LVD_VREFL DDPB_AUXN
DMI_CRX_PTX_P0 BD22 BD12 FDI_CTX_PRX_P7 Close PCH and mini space 20mil BJ44
<7> DMI_CRX_PTX_P0 DMI0TXP FDI_RXP7 FDI_CTX_PRX_P7 <7> DDPB_AUXP
DMI_CRX_PTX_P1 BH21 AU38
<7> DMI_CRX_PTX_P1 DMI1TXP DDPB_HPD
LVDS
DMI_CRX_PTX_P2 BC20 AV53
<7> DMI_CRX_PTX_P2 DMI2TXP <22> I_LVDS_ACLK- LVDSA_CLK#
DMI_CRX_PTX_P3 BD18 BJ14 AV51 BD42
<7> DMI_CRX_PTX_P3 DMI3TXP FDI_INT FDI_INT <7> <22> I_LVDS_ACLK+ LVDSA_CLK DDPB_0N
BC42
DMI
FDI
DDPB_0P
FDI_FSYNC0 BF13 FDI_FSYNC0 <7> <22> I_LVDS_A0- BB47 LVDSA_DATA#0 DDPB_1N BJ42
+1.05VS BH25 BA52 BG42
Digital Display Interface

DMI_ZCOMP <22> I_LVDS_A1- LVDSA_DATA#1 DDPB_1P
FDI_FSYNC1 BH13 FDI_FSYNC1 <7> <22> I_LVDS_A2- AY48 LVDSA_DATA#2 DDPB_2N BB40
R118 1 2 49.9_0402_1% DMI_IRCOMP BF25 AV47 BA40
DMI_IRCOMP LVDSA_DATA#3 DDPB_2P
FDI_LSYNC0 BJ12 FDI_LSYNC0 <7> DDPB_3N AW38
4mil width and place <22> I_LVDS_A0+ BB48 LVDSA_DATA0 DDPB_3P BA38
within 500mil of the PCH FDI_LSYNC1 BG14 FDI_LSYNC1 <7> <22> I_LVDS_A1+ BA50 LVDSA_DATA1
AY49
ǂ
<22> I_LVDS_A2+ LVDSA_DATA2
AV48 LVDSA_DATA3 DDPC_CTRLCLK Y49
Checklist0.8 MEPWROK AB49
DDPC_CTRLDATA
can be connect to
Display Port C
PWROK if iAMT disable AP48 LVDSB_CLK#
AP47 LVDSB_CLK DDPC_AUXN BE44
0_0402_5% BD44
XDP_DBRESET# DDPC_AUXP
<6> XDP_DBRESET# 1 2SYS_RST# T6 SYS_RESET# WAKE# J12 ICH_PCIE_WAKE#
ICH_PCIE_WAKE# <31,32> AY53 LVDSB_DATA#0 DDPC_HPD AV40
R119 AT49 LVDSB_DATA#1
AU52 LVDSB_DATA#2 DDPC_0N BE40
<19,49> VGATE R365 1 2 0_0402_5% M6 Y1 PM_CLKRUN# AT53 BD40
SYS_PWROK CLKRUN# / GPIO32 LVDSB_DATA#3 DDPC_0P
DDPC_1N BF41
<39> PM_PWROK @ R373 1 2 0_0402_5% AY51 BH41
System Power Management LVDSB_DATA0 DDPC_1P
B17 PWROK AT48 LVDSB_DATA1 DDPC_2N BD38
R120 2 1 10K_0402_5% AU50 BC38
LVDSB_DATA2 DDPC_2P
AT51 LVDSB_DATA3 DDPC_3N BB36
R121 1 2 0_0402_5% K5 P8 PM_SUS_STAT# BA36
MEPWROK SUS_STAT# / GPIO61 T17 DDPC_3P
<39> M_PWROK @ R379 1 2 0_0402_5%
C C
R122 1 2 10K_0402_5% A10 F3 SUS_CLK I_BLUE AA52 U50
LAN_RST# SUSCLK / GPIO62 T18 <22> I_BLUE CRT_BLUE DDPD_CTRLCLK
I_GREEN AB53 U52
<22> I_GREEN CRT_GREEN DDPD_CTRLDATA
I_RED AD53
<22> I_RED CRT_RED
PM_DRAM_PWRGD D9 E4
<6> PM_DRAM_PWRGD DRAMPWROK SLP_S5# / GPIO63 SLP_S5# <39>
Display Port D
DDPD_AUXN BC46
R_EC_RSMRST# V51 BD46
<20> I_CRT_DDC_CLK CRT_DDC_CLK DDPD_AUXP
<39> EC_RSMRST# R123 1 2 C16 H7 V53 AT38
RSMRST# SLP_S4# SLP_S4# <39> <20> I_CRT_DDC_DATA CRT_DDC_DATA DDPD_HPD
100_0402_5%
R124 2 1 10K_0402_5% SG@ 0_0402_5% BJ40
SUS_PWR_DN_ACK HSYNC DDPD_0N
<39> SUS_PWR_DN_ACK M1 SUS_PWR_DN_ACK / GPIO30 SLP_S3# P12 SLP_S3# <39> <22> I_CRT_HSYNC 1 R774 2 Y53 CRT_HSYNC DDPD_0P BG40
1 2 VSYNC Y51 BJ38
<22> I_CRT_VSYNC CRT_VSYNC DDPD_1N
+3VALW R151 1 2 10K_0402_5% SG@ R775 0_0402_5% BG38
DDPD_1P
CRT
PM_PWRBTN#_R P5 K8 Can be left NC when IAMT is BF37
PWRBTN# SLP_M# DDPD_2N
not support on the platfrom CRB0.9 change to 0 ohm AD48 DAC_IREF DDPD_2P BH37
R125 1 2 0_0402_5% AB51 BE36
<39> PWRBTN_OUT# CRT_IRTN DDPD_3N
1
EC_ACIN P7 N2 BD36
1K_0402_0.5%
<26,39> EC_ACIN ACPRESENT / GPIO31 TP23 DDPD_3P
R126
9/11 GPIO30 change to LOW_BAT# A6 BJ10 06/19 HDMI data 0 and data 2 reverse
BATLOW# / GPIO72 PMSYNCH H_PM_SYNC <6>
2
SUS_PWR_DN_ACK
PM_RI# F14 F6 If not using integrated
RI# SLP_LAN# / GPIO29
LAN,signal may be left as NC.
D37 IBEXPEAK-M_FCBGA1071 CRB0.9 change to 1K_0402_0.5%
PM_PWROK 2 1 R_EC_RSMRST#
RB751V_SOD323
I_BLUE 1 2
+3VS SG@R776 150_0402_1%
I_GREEN 1 2
SYS_RST# @ R133 1 2 10K_0402_5% SG@R777 150_0402_1%
B I_RED 1 2 B
PM_CLKRUN# R129 1 2 8.2K_0402_5% SG@R778 150_0402_1%
Place the 3 resistors close to IBEX
+3VALW R1221 1 2 0_0402_5%
LOW_BAT# R134 1 2 8.2K_0402_5%

Check PM_SLP_LAN# +RTCVCC
PM_RI# R136 1 2 10K_0402_5%
ICH_PCIE_WAKE# R137 1 2 10K_0402_5%
EC_ACIN R138 2 1 8.2K_0402_5%

8
+3_5V PWR_OK 3
P
<44> +3_5V PWR_OK +

1 R_EC_RSMRST#
@ R1217 1 0
+RTCVCC 2 1K_0402_5% 2 -
G
4
1
@ U59A
LM358ADT_SO8
R1218
2.2K_0402_5%
@
2
change to 2.2K
A A

IBEX-M(3/6)-DMI/GPIO/LVDS
5 http://laptop-motherboard-schematic.blogspot.com/
4 3
2
1
Sheet 13 of 55
5 4 3 2 1
+3VS U1E U1F

GPIO8
RP3 H40 AY9 This signal has a weak internal
PCI_DEVSEL# AD0 NV_CE#0 R140 1
1 8 N34 AD1 NV_CE#1 BD1 pull up ,can't Pull low +3VS 2 1K_0402_1% PCH_GPIO0 Y3 BMBUSY# / GPIO0 CLKOUT_PCIE6N AH45 T19 PAD
PCI_SERR# 2 7 C44 AP15 AH46 T20 PAD
PCI_REQ0# AD2 NV_CE#2 DGPU_EDIDSEL# CLKOUT_PCIE6P
3 6 A38 AD3 NV_CE#3 BD8 <20,22> DGPU_EDIDSEL# C38 TACH1 / GPIO1
PCI_PIRQB#
ǂ
4 5 C36 AD4
J34 AV9 GPIO15 DGPU_HPD_INT# D37
AD5 NV_DQS0 <23> DGPU_HPD_INT# TACH2 / GPIO6
8.2K_0804_8P4R_5% A40 BG8 L Intel ME Crypto Transport AF48
AD6 NV_DQS1 * CLKOUT_PCIE7N T21 PAD
MISC
D45 Layer Security(TLS) chiper suite <39> EC_SCI# EC_SCI# J32 AF47 T22 PAD
RP4 AD7 TACH3 / GPIO7 CLKOUT_PCIE7P
E36 AP7
ǂ
AD8 NV_DQ0 / NV_IO0 with no confidentiality
PCI_PIRQH# 1 8 H48 AP6 <39> EC_SMI# EC_SMI# F10
PCI_TRDY# AD9 NV_DQ1 / NV_IO1 GPIO8
2 7 E40 AD10 NV_DQ2 / NV_IO2 AT6 H Intel ME Crypto Transport
PCI_FRAME# 3 6 C40 AT9 Layer Security(TLS) chiper suite PCH_GPIO12 K9 U2 GATEA20
AD11 NV_DQ3 / NV_IO3 LAN_PHY_PWR_CTRL / GPIO12 A20GATE GATEA20 <39>
PCI_REQ1# 4 5 M48 BB1 with confidentiality
AD12 NV_DQ4 / NV_IO4 PCH_GPIO15
M45 AD13 NV_DQ5 / NV_IO5 AV6 T7 GPIO15
D 8.2K_0804_8P4R_5% F53 BB3 D
AD14 NV_DQ6 / NV_IO6 DGPU_HOLD_RST#
M40 AD15 NV_DQ7 / NV_IO7 BA4 it have weak internal PU 20K <24> DGPU_HOLD_RST# AA2 SATA4GP / GPIO16 CLKOUT_BCLK0_N / CLKOUT_PCIE8N AM3 CLK_CPU_BCLK# <6>
RP5 OK
NVRAM
M43 AD16 NV_DQ8 / NV_IO8 BE4
PCI_REQ3# 1 8 J36 BB6 <51> DGPU_PWROK DGPU_PWROK F38 AM1
AD17 NV_DQ9 / NV_IO9 TACH0 / GPIO17 CLKOUT_BCLK0_P / CLKOUT_PCIE8P CLK_CPU_BCLK <6>
PCI_PIRQF# 2 7 K48 BD6 Check list Rev0.8 section1.23.2 If not
PCI_PERR# AD18 NV_DQ10 / NV_IO10 GPIO22 PCH_PECI_R R144
3 6 F40 AD19 NV_DQ11 / NV_IO11 BB7 implemented, the Braidwood interface Y7 SCLOCK / GPIO22 PECI BG10 1 2 0_0402_5% H_PECI <6>
GPIO
PCI_LOCK# 4 5 C42 BC8
AD20 NV_DQ12 / NV_IO12 signals can be left as No Connect (NC). XMIT_OFF KB_RST#
K46 AD21 NV_DQ13 / NV_IO13 BJ8 <31> XMIT_OFF H10 GPIO24 RCIN# T1 KB_RST# <39>
8.2K_0804_8P4R_5% M51 BJ6
AD22 NV_DQ14 / NV_IO14
J52 AD23 NV_DQ15 / NV_IO15 BG6 Internal VccVRM Option AB12 GPIO27 PROCPWRGD BE10 H_CPUPWRGD <6>
+3VS
CPU
K51 AD24
RP6 L34 BD3 NV_ALE PCH_GPIO28 V13 BD10 H_THERMTRIP#_L 1 2 54.9_0402_1%
AD25 NV_ALE GPIO28 THRMTRIP# H_THERMTRIP# <6,26>
PCI_PIRQA# 1 8 F42 AY6 NV_CLE R146
AD26 NV_CLE
1
PCI_PIRQD# 2 7 J40 +3VS R145 1 2 10K_0402_5% H_STP_PCI# M11
PCI_PIRQG# AD27 STP_PCI# / GPIO34 R147
3 6 G46 AD28
PCI_PIRQC# 4 5 F44 AU2 GPIO35 V6 56_0402_5%
AD29 NV_RCOMP SATACLKREQ# / GPIO35
M47 AD30
8.2K_0804_8P4R_5% DGPU_PWR_EN
PCI
H36 AV7 <23,40,41,47,51> DGPU_PWR_EN AB7 BA22
2
AD31 NV_RB# SATA2GP / GPIO36 TP1
+VCCP
RP7 J50 AY8 GPIO27 VGA_PRSNT_L# AB13 AW22
PCI_PIRQE# C/BE0# NV_WR#0_RE# SATA3GP / GPIO37 TP2
1 8 G42 C/BE1# NV_WR#1_RE# AY5 On-Die PLL Voltage Regulator
PCI_STOP# 2 7 H47 This signal has a weak internal pull up WWAN_DETECT# V3 BB22
ǂ
C/BE2# <31> WWAN_DETECT# SLOAD / GPIO38 TP3
PCI_IRDY# 3 6 G34 AV11
ǂOn-Die
DGPU_SELECT# C/BE3# NV_WE#_CK0 HDDHALT_LED#
4 5 BF5 H On-Die voltage regulator enable P3 AY45
PCI_PIRQA# G38 PIRQA#
NV_WE#_CK1 * L PLL Voltage Regulator disable
<40> HDDHALT_LED# SDATAOUT0 / GPIO39 TP4 +3VS
8.2K_0804_8P4R_5% PCI_PIRQB# H51 PCIECLKREQ6# H3 AY46
PCI_PIRQC# PIRQB# USB20_N0 PCIECLKRQ6# / GPIO45 TP5
B37 PIRQC# USBP0N H18 USB20_N0 <37>
PCI_PIRQD# A44 J18 USB20_P0 ESATA PCH_DDR_RST F1 AV43 EC_SCI# R166 1 2 10K_0402_5%
PIRQD# USBP0P USB20_P0 <37> <6> PCH_DDR_RST PCIECLKRQ7# / GPIO46 TP6
A18 USB20_N1
USBP1N USB20_N1 <37>
PCI_REQ0# F51 C18 USB20_P1 MB GPIO48 AB6 AV45 DGPU_EDIDSEL# R167 1 2 10K_0402_5%
REQ0# USBP1P USB20_P1 <37> SDATAOUT1 / GPIO48 TP7
PCI_REQ1# A46 N20 USB20_N2
REQ1# / GPIO50 USBP2N USB20_N2 <37>
DGPU_SELECT# B45 P20 USB20_P2 MB USB PCH_TEMP_ALERT# AA4 AF13 KB_RST# R171 1 2 10K_0402_5%
C <22> DGPU_SELECT# REQ2# / GPIO52 USBP2P USB20_P2 <37> <39> PCH_TEMP_ALERT# SATA5GP / GPIO49 TP8 C
PCI_REQ3# M53 J20 USB20_N3 OPP@
REQ3# / GPIO54 USBP3N USB20_N3 <36>
L20 USB20_P3 Dock GPIO57 F8 M18 DGPU_PWR_EN R172 1 2 10K_0402_5%
USBP3P USB20_P3 <36> GPIO57 TP9
PCI_GNT0# F48 F20 USB20_N4
GNT0# USBP4N USB20_N4 <21>
PCI_GNT1# K45 G20 USB20_P4 USB Camera EHCI 1 9/11 GPIO57 for VGA Board ID N18 DGPU_HPD_INT# R173 1 2 10K_0402_5%
GNT1# / GPIO51 USBP4P USB20_P4 <21> TP10
T70 PAD DGPU_PWM_SELECT# F36 A20 USB20_N5 OPP@
GNT2# / GPIO53 USBP5N USB20_N5 <31>
PCI_GNT3# H53 C20 USB20_P5 WLAN A4 AJ24 VGA_PRSNT_L# R175 1 2 10K_0402_5%
GNT3# / GPIO55 USBP5P USB20_P5 <31> VSS_NCTF_1 TP11
M22 A49
NCTF
USBP6N VSS_NCTF_2
RSVD
PCI_PIRQE# B41 N22 A5 AK41 DGPU_HOLD_RST# R176 1 2 10K_0402_5%
PCI_PIRQF# PIRQE# / GPIO2 USBP6P VSS_NCTF_3 TP12
K53 PIRQF# / GPIO3 USBP7N B21 A50 VSS_NCTF_4
R150 PCI_PIRQG# A36 D21 A52 AK42 WWAN_DETECT# R178 1 2 10K_0402_5%
ACCEL_INT PCI_PIRQH# PIRQG# / GPIO4 USBP7P USB20_N8 VSS_NCTF_5 TP13
<30> ACCEL_INT 2 1 A48 PIRQH# / GPIO5 USBP8N H22 USB20_N8 <31> A53 VSS_NCTF_6
0_0402_5% J22 USB20_P8 WWAN B2 M32 GATEA20 R180 1 2 10K_0402_5%
USBP8P USB20_P8 <31> VSS_NCTF_7 TP14
USB
K6 E22 USB20_N9 B4
<39> PCI_RST# PCIRST# USBP9N USB20_N9 <31> VSS_NCTF_8
F22 USB20_P9 New Card B52 N32 PCH_TEMP_ALERT# R181 1 2 10K_0402_5%
PCI_SERR# E44 A22 USB20_N10 B53
<39> PCI_SERR# SERR# USBP10N USB20_N10 <33> VSS_NCTF_10
PCI_PERR# E50 C22 USB20_P10 Cardreader BE1 M30 HDDHALT_LED# R169 1 2 10K_0402_5%
PERR# USBP10P USB20_P10 <33> VSS_NCTF_11 TP16
G24 USB20_N11 EHCI2 BE53
USBP11N USB20_N11 <37> VSS_NCTF_12
GNT2 H24 USB20_P11 Finger print BF1 N30 GPIO48 R170 1 2 10K_0402_5%
PCI_IRDY# A42 L24 USB20_N12 BF53
IRDY# USBP12N USB20_N12 <37> VSS_NCTF_14
Default-Internal pull up H44 M24 USB20_P12 BT BH1 H12 GPIO22 R168 1 2 10K_0402_5%
* PCI_DEVSEL# F46
PAR
DEVSEL#
USBP12P
USBP13N A24
USB20_P12 <37>
BH2
VSS_NCTF_15
VSS_NCTF_16
TP18
Low=Configures DMI for ESI PCI_FRAME# C46 C24 BH52 AA23 DGPU_PWROK R874 1 2 10K_0402_5%
FRAME# USBP13P VSS_NCTF_17 TP19
compatible operation(for BH53 VSS_NCTF_18
servers only.Not for PCI_LOCK# D49 BJ1 AB45
PLOCK# USBRBIAS R155 1 VSS_NCTF_19 NC_1
mobile/desktops) USBRBIAS# B25 2 22.6_0402_1% BJ2 VSS_NCTF_20
PCI_STOP# D41 BJ4 AB38
PCI_TRDY# STOP# VSS_NCTF_21 NC_2
C48 TRDY# USBRBIAS D25 Within 500 BJ49 VSS_NCTF_22
BJ5 VSS_NCTF_23 NC_3 AB42 INIT3_3V
<39> PCI_PME# M7 mils BJ50
PME# USB_OC#0 VSS_NCTF_24
OC0# / GPIO59 N16 BJ52 VSS_NCTF_25 NC_4 AB41 This signal has weak internal
PLT_RST# D5 J16 BT_OFF BJ53 PU, can't pull low
<24,31,32> PLT_RST# PLTRST# OC1# / GPIO40 BT_OFF <37> VSS_NCTF_26
F16 USB_OC#2 D1 T39
B OC2# / GPIO41 WXMIT_OFF# VSS_NCTF_27 NC_5 B
N52 CLKOUT_PCI0 OC3# / GPIO42 L16 WXMIT_OFF# <31> D2 VSS_NCTF_28
R_CLK_PCI_FB P53 E14 USB_OC#4 D53
R_CLK_PCI_EC CLKOUT_PCI1 OC4# / GPIO43 USB_OC#5 VSS_NCTF_29
P46 CLKOUT_PCI2 OC5# / GPIO9 G16 E1 VSS_NCTF_30 INIT3_3V# P6 T48 PAD
P51 F12 USB_OC#6 E53
R_CLK_DEBUG_PORT_1 CLKOUT_PCI3 OC6# / GPIO10 EXP_CPPE# VSS_NCTF_31
P48 CLKOUT_PCI4 OC7# / GPIO14 T15 EXP_CPPE# <31> TP24 C10
IBEXPEAK-M_FCBGA1071 +3VALW
IBEXPEAK-M_FCBGA1071 10/06 Add M93 and Park VGA ID pin (GPIO28, 57)
R158 1 2 22_0402_5% R_CLK_PCI_FB
<12> CLK_PCI_FB
R160 1 2 22_0402_5% R_CLK_PCI_EC PCI_GNT0# @ R163 1 2 1K_0402_5% Intel Anti-Theft Techonlogy EC_SMI# R157 1 2 10K_0402_5%
<39> CLK_PCI_EC
R162 1 2 22_0402_5% R_CLK_DEBUG_PORT_1 PCI_GNT1# @ R164 1 2 1K_0402_5% High=Endabled PCH_GPIO15 R159 1 2 1K_0402_5%
<31> CLK_DEBUG_PORT_1
NV_ALE GPIO57 GPIO28
Low=Disable(floating) PCH_GPIO12 R811 1 2 10K_0402_5%
Boot BIOS Strap *
NV_ALE M93 High High PCIECLKREQ6# R812 1 2 10K_0402_5%
ǂ
+3VALW PCI_GNT0# PCI_GNT1# Boot BIOS +1.8VS Enable Intel Anti-Theft
Technology 8.2K PU to +3VS PCH_DDR_RST R813 1 2 10K_0402_5%
USB_OC#0 1 R1170 2 10K_0402_5% Location NV_ALE @ R174 1 2 1K_0402_5%
Technologyǂfloating(internal PD)
WXMIT_OFF# 1 R1171 2 10K_0402_5% 0 0 LPC Disable Intel Anti-Theft M93-LP High Low PCH_GPIO28 PA@ R814 1 2 10K_0402_5%
BT_OFF 1 R1172 2 10K_0402_5%
USB_OC#2 1 R1173 2 10K_0402_5% 0 1 Reserved(NAND) DMI Termination Voltage GPIO57 R182 1 2 10K_0402_5%
NV_CLE
1 0 PCI Set to Vcc when HIGH Park Low High GPIO35 R165 2 1 10K_0402_5%
NV_CLE DMI termination voltage.
1 1 SPI Set to Vss when LOW weak internal PU, don't PD VGA_PRSNT_L# SG@
SG@R911
R911 1 2 10K_0402_5%
USB_OC#6 1 R1174 2 10K_0402_5% *
USB_OC#5 1 R1175 2 10K_0402_5% Weak internal Park-LP Low Low GPIO57 @ R1257 1 2 10K_0402_5%
USB_OC#4 1 R1176 2 10K_0402_5% PU,Do not pull low +3VS
EXP_CPPE# 1 R1177 2 10K_0402_5% R179 1 2 0_0402_5% PCH_GPIO28 OPP@ R1263 1 2 10K_0402_5%
NV_CLE @ R184 1 2 1K_0402_5%
+3VS
A A
PCI_GNT3# @ R183 1 2 1K_0402_5%

5
@U2
@U2
1 PLT_RST#
P
IN1
<6> BUF_PLT_RST# 4 O
A16 swap overide Strap/Top-Block IN2 2
1
Swap Override jumper

SN74AHC1G08DCKR_SC70-5 Security Classification Compal Secret Data Compal Electronics, Inc.
3
Low=A16 swap @ R185 2008/03/13 2009/05/11 Title

100K_0402_5%
Issued Date Deciphered Date
override/Top-Block
PCI_GNT3# Swap Override enabled IBEX-M(4/6)-PCI/USB/RSVD
2
High=Default * Size Document Number Rev
2009. 09.20 un-stuff R185 PD for PLT_RST# MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2 1
5 4 3 2 1
10/1 L45 can use 0 ohm when DIS only
+1.05VS +VCCP_VCCA_CLK +3VS

+1.05VS PA@ L45
@ R186 1 2
U1G POWER 2 1
AB24 AE50 MURATA_BLM18AG601SN1D_0603
1U_0402_6.3V6K
10U_0805_6.3V6M
10U_0805_6.3V6M
0.01U_0402_25V7K
0.1U_0402_16V4Z
0_0402_5% VCCCORE[1] VCCADAC[1]
AB26
POWER
1U_0402_6.3V6K
10U_0603_6.3V6M
U1J +1.05VS VCCCORE[2]
Delete L1 1 1 1 1 AB28 VCCCORE[3] 0.069A VCCADAC[2] AE52 1 1 1
C143
C144
AD26 VCCCORE[4] 1.524A L45
CRT
DIS@
C145
C146
C147
C148
C149
AP51 V24 AD28 AF53
1U_0402_6.3V6K
@ @ VCCACLK[1] VCCIO[5] VCCCORE[5] VSSA_DAC[1]
2 2 0.052A VCCIO[6] V26 1 2 2
AF26 VCCCORE[6] 2 2 2
VCC CORE
AP53 VCCACLK[2] VCCIO[7] Y24 AF28 VCCCORE[7] VSSA_DAC[2] AF51 0_0603_5%
C150
VCCIO[8] Y26 AF30 VCCCORE[8]
D
DG1.1 no M3 2
AF31 VCCCORE[9] D
support and not AF23 VCCLAN[1] VCCSUS3_3[1] V28 AH26 VCCCORE[10] +3VS
Intel LAN, VCCLAN 0.344A VCCSUS3_3[2] U28 AH28 VCCCORE[11] SG@
AF24 VCCLAN[2] VCCSUS3_3[3] U26 AH30 VCCCORE[12]
Source=>GND U24 AH31 0.030A AH38 R1230 1 2 0_0402_5%
VCCSUS3_3[4] VCCCORE[13] VCCALVDS DIS@
VCCSUS3_3[5] P28 AJ30 VCCCORE[14]
1 2 C152 Y20 DCPSUSBYP VCCSUS3_3[6] P26 AJ31 VCCCORE[15] VSSA_LVDS AH39 R1231 1 2 0_0402_5%
0.1U_0402_16V4Z N28
VCCSUS3_3[7] R779 1
VCCSUS3_3[8] N26 2 0_0603_5% +1.8VS
+1.05VS +1.05VS
0.01U_0603_16V7K
0.01U_0603_16V7K
10U_0805_6.3V6M
AD38 VCCME[1] VCCSUS3_3[9] M28 VCCTX_LVDS[1] AP43
+3VALW
VCCSUS3_3[10] M26 0.059A VCCTX_LVDS[2] AP45 SG@
C998
C999
C1000
AD39 L28 AT46 1 1 1
USB
LVDS
VCCME[2] VCCSUS3_3[11] VCCTX_LVDS[3] DIS@
1 L26 AK24 AT45
1U_0402_6.3V6K
VCCSUS3_3[12] +1.05VS_APLL VCCIO[24] VCCTX_LVDS[4] C999
AD41 J28
0.1U_0402_16V4Z
0.1U_0402_16V4Z
VCCME[3] VCCSUS3_3[13] SG@ SG@ SG@ 0_0805_5%
C153 VCCSUS3_3[14] J26 1 1
@ R188 1 2 2 2
C157
C158
2
AF43 VCCME[4] VCCSUS3_3[15] H28 2 BJ24 VCCAPLLEXP0.042A
H26 AB34
10U_0805_6.3V6M
VCCSUS3_3[16] 0_0402_5% VCC3_3[2] +3VS
AF41 VCCME[5] 0.163AVCCSUS3_3[17] G28
2 2
VCCSUS3_3[18] G26 Delete L3 1 AN20 VCCIO[25] VCC3_3[3] AB35
C159
AF42 F28 AN22
HVCMOS
0.1U_0402_16V4Z
VCCME[6] VCCSUS3_3[19] VCCIO[26]
1.998A VCCSUS3_3[20] F26
@
AN23 VCCIO[27] VCC3_3[4] AD35
V39 VCCME[7] VCCSUS3_3[21] E28 AN24 VCCIO[28] 1
2
C160
E26 AN26
Clock and Miscellaneous

VCCSUS3_3[22] VCCIO[29]
V41 VCCME[8] VCCSUS3_3[23] C28 AN28 VCCIO[30]
C26 BJ26
1U_0402_6.3V6K
10U_0805_6.3V6M
10U_0805_6.3V6M
VCCSUS3_3[24] VCCIO[31] 2
1 1 1 V42 VCCME[9] VCCSUS3_3[25] B27 BJ28 VCCIO[32]
VCCSUS3_3[26] A28 AT26 VCCIO[33]
+1.05VS
C162
C163
C161
Y39 VCCME[10] VCCSUS3_3[27] A26 AT28 VCCIO[34]

AU26 +1.8VS
2 2 2 VCCIO[35]
Y41 VCCME[11] VCCSUS3_3[28] U23 AU28 VCCIO[36]
AV26
1U_0402_6.3V6K
1U_0402_6.3V6K
VCCIO[37]
Y42 VCCME[12] VCCIO[56] V23 +1.05VS 1 1 AV28 VCCIO[38] VCCVRM[2] AT24
AW26 VCCIO[39]
C ICH_V5REF_SUS C
C164
C165
>1mA V5REF_SUS F24 AW28 VCCIO[40] +VCCP
DMI
BA26 VCCIO[41] VCCDMI[1] AT16
C166 1 +VCCRTCEXT 2 2
2
0.1U_0402_16V4Z
V9 DCPRTC BA28 VCCIO[42] 0.061A
BB26 AU16
1U_0402_6.3V6K
VCCIO[43] VCCDMI[2]
BB28 VCCIO[44] 1
ICH_V5REF_RUN
C167
0.035A >1mA V5REF K49 BC26 VCCIO[45]
PCI E*
+1.8VS AU24 VCCVRM[3] BC28 VCCIO[46]
PCI/GPIO/LPC
BD26 VCCIO[47]
+3VS 2
0.072A J38 BD28
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
VCC3_3[8] VCCIO[48]
BB51 1 1 1 BE26 AM16
0.1U_0402_16V4Z
+V1.05S_VCCA_A_DPL VCCADPLLA[1] VCCIO[49] VCCPNAND[1]
BB53 VCCADPLLA[2] VCC3_3[9] L38 BE28 VCCIO[50] VCCPNAND[2] AK16
C168
C169
C170
1 BG26 VCCIO[51] VCCPNAND[3] AK20
+V1.05S_VCCA_B_DPL R671 2 0_0402_5%
C171
0.073A VCC3_3[10] M36
2 2 2
BG28 VCCIO[52] VCCPNAND[4] AK19 1 +1.8VS
BD51 0.357A BH27 0.156A AK15
0.1U_0402_16V4Z
+1.05VS VCCADPLLB[1] VCCIO[53] VCCPNAND[5]
BD53 VCCADPLLB[2] VCC3_3[11] N36 VCCPNAND[6] AK13 1
2 @ R672 2 0_0402_5%
C172
AN30 VCCIO[54] VCCPNAND[7] AM12 1 +3VS
NAND / SPI
AH23 VCCIO[21] VCC3_3[12] P36 AN31 VCCIO[55] VCCPNAND[8] AM13
AJ35 AM15
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
VCCIO[22] +3VS VCCPNAND[9] 2

1 1 1 AH35 VCCIO[23] VCC3_3[13] U35
+3VS AN35 VCC3_3[1]
C173
C174
C175
AF34 VCCIO[2] 3.208A C176 1

VCC3_3[14] AD13 2 0.1U_0402_16V4Z C682 1 2 0.1U_0402_16V4Z
2 2 2 +3VS
AH34 VCCIO[3] +1.8VS AT22 VCCVRM[1] 0.035A
+1.05VS_VCCAPLL +1.05VS +1.05VS_VCCFDIPLL
AF32 VCCIO[4]
1/2BA2/2W
BJ18 VCCFDIPLL 6mA VCCME3_3[1] AM8
AK3 AM9
0.1U_0402_16V4Z
VCCSATAPLL[1] VCCME3_3[2]
FDI
1 2 +VCCSST V12 0.032A AK1 @ R189 1 2 +1.05VS AM23 0.085A AP11 1
0.1U_0402_16V4Z DCPSST VCCSATAPLL[2] VCCIO[1] VCCME3_3[3]
C178
AP9
C177 1U_0402_6.3V6K 1 Delete L4 0_0402_5% VCCME3_3[4]
10U_0805_6.3V6M
1 2
+V1.1A_INT_VCCSUS
C180
C181
1 2 Y22 DCPSUS
0.1U_0402_16V4Z AH22 IBEXPEAK-M_FCBGA1071
B C179 VCCIO[9] @ 2 @ B
+3VALW 2
1/3BA4/4W P18 VCCSUS3_3[29] VCCVRM[4] AT20 +1.8VS
U19 +1.05VS @ R190 1 2 +1.05VS_VCCFDIPLL
SATA
VCCSUS3_3[30] +1.05VS
PCI/GPIO/LPC
1 2 AH19
10U_0805_6.3V6M
0.1U_0402_16V4Z VCCIO[10] 0_0402_5%
U20 VCCSUS3_3[31]
C182 AD20 Delete L5 1
VCCIO[11]
C183
U22
1U_0402_6.3V6K
VCCSUS3_3[32]
VCCIO[12] AF22 1
+3VS @
1/5BA4/4W 2
C184
VCCIO[13] AD19
V15 AF20 +1.05VS +1.05VS_L +V1.05S_VCCA_A_DPL_L
VCC3_3[5] VCCIO[14] 2 R191 R192 L6
VCCIO[15] AF19
1 2 V16 AH20 1 2 1 2 1 2 +V1.05S_VCCA_A_DPL
VCC3_3[6] VCCIO[16]
220U_D2_2VY_R15M
0.1U_0402_16V4Z 0_0603_5% 0_0603_5% 10UH_LB2012T100MR_20%_0805 1
1U_0402_6.3V6K
C185 Y16 AB19 2
VCC3_3[7] VCCIO[17] + +5VALW +3VALW +5VS +3VS
C186
VCCIO[18] AB20
+VCCP
C187
VCCIO[19] AB22
1/2BA2/2W VCCIO[20] AD22 +1.05VS
2
1 @ 2
AT18 V_CPU_IO[1] Delete R193
AA34 +PCH_VCC1_1_20 R194 1 2 0_0402_5% D4 R197 D5
CPU
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
VCCME[13] +PCH_VCC1_1_21 R195 0_0402_5% R196

1 1 1 VCCME[14] Y34 1 2 RB751V_SOD323 RB751V_SOD323
AU18 Y35 +PCH_VCC1_1_22 R198 1 2 0_0402_5% +V1.05S_VCCA_B_DPL_L 100_0402_5% 100_0402_5%
V_CPU_IO[2] VCCME[15] +PCH_VCC1_1_23 R200 0_0402_5% R201 L7
C188
C189
C190
AA35 1 2
1
VCCME[16] +V1.05S_VCCA_B_DPL ICH_V5REF_RUN
1 2 1 2
2 2 2 0_0603_5% 10UH_LB2012T100MR_20%_0805 ICH_V5REF_SUS
1U_0402_6.3V6K
+RTCVCC
RTC
A12 2mA 6mA L30 +3.3A_1.5A_VCCPAZSUS +3VALW 1 20 mils 20 mils
220U_B_2.5VM_R15M
VCCRTC VCCSUSHDA
HDA
1 1 1
+ C194 C195
C192
C191
1
1U_0402_6.3V6K
3nBA4/4W IBEXPEAK-M_FCBGA1071 1U_0402_6.3V4K_X5R 1U_0402_6.3V4K_X5R

@
C193
0.1U_0402_16V4Z
0.1U_0402_16V4Z
A 2 2 2 2 A
1 1 2
C196
C197
2 2
9/20 Un-stuff C187,C192 to follow Intel check list

IBEX-M(5/6)-PWR
5 4 3 2 1
5 4 3 2 1
U1I U1H
AY7 VSS[159] VSS[259] H49 AB16 VSS[0]
B11 VSS[160] VSS[260] H5
B15 VSS[161] VSS[261] J24 AA19 VSS[1] VSS[80] AK30
B19 VSS[162] VSS[262] K11 AA20 VSS[2] VSS[81] AK31
B31 VSS[164] VSS[264] K47 AM19 VSS[4] VSS[83] AK34
B39 VSS[166] VSS[266] L14 AA26 VSS[6] VSS[85] AK38
D B7 L22 AA31 AK49 D
VSS[169] VSS[269] VSS[9] VSS[88]
BG12 VSS[170] VSS[270] L32 AA32 VSS[10] VSS[89] AK5
BB12 VSS[171] VSS[271] L36 AB11 VSS[11] VSS[90] AK8
BB16 VSS[172] VSS[272] L40 AB15 VSS[12] VSS[91] AL2
BB20 VSS[173] VSS[273] L52 AB23 VSS[13] VSS[92] AL52
BB24 VSS[174] VSS[274] M12 AB30 VSS[14] VSS[93] AM11
BB30 VSS[175] VSS[275] M16 AB31 VSS[15] VSS[94] BB44
BB34 VSS[176] VSS[276] M20 AB32 VSS[16] VSS[95] AD24
BB38 VSS[177] VSS[277] N38 AB39 VSS[17] VSS[96] AM20
BC10 VSS[181] VSS[281] M46 AB8 VSS[21] VSS[100] AM28
BC14 VSS[182] VSS[282] M49 AC2 VSS[22] VSS[101] BA42
BC18 VSS[183] VSS[283] M5 AC52 VSS[23] VSS[102] AM30
BC2 VSS[184] VSS[284] M8 AD11 VSS[24] VSS[103] AM31
BC22 VSS[185] VSS[285] N24 AD12 VSS[25] VSS[104] AM32
BC32 VSS[186] VSS[286] P11 AD16 VSS[26] VSS[105] AM34
BC36 VSS[187] VSS[287] AD15 AD23 VSS[27] VSS[106] AM35
BH9 VSS[191] VSS[291] P34 AD34 VSS[31] VSS[110] AU20
BD48 VSS[192] VSS[292] P42 AU22 VSS[32] VSS[111] AM46
BD49 VSS[193] VSS[293] P45 AD42 VSS[33] VSS[112] AV22
BD5 VSS[194] VSS[294] P47 AD46 VSS[34] VSS[113] AM49
BE12 VSS[195] VSS[295] R2 AD49 VSS[35] VSS[114] AM7
BE16 VSS[196] VSS[296] R52 AD7 VSS[36] VSS[115] AA50
BE20 VSS[197] VSS[297] T12 AE2 VSS[37] VSS[116] BB10
BE24 VSS[198] VSS[298] T41 AE4 VSS[38] VSS[117] AN32
BE30 VSS[199] VSS[299] T46 AF12 VSS[39] VSS[118] AN50
BE34 VSS[200] VSS[300] T49 Y13 VSS[40] VSS[119] AN52
C BE38 T5 AH49 AP12 C
VSS[201] VSS[301] VSS[41] VSS[120]
BE42 VSS[202] VSS[302] T8 AU4 VSS[42] VSS[121] AP42
BE46 VSS[203] VSS[303] U30 AF35 VSS[43] VSS[122] AP46
BE48 VSS[204] VSS[304] U31 AP13 VSS[44] VSS[123] AP49
BE50 VSS[205] VSS[305] U32 AN34 VSS[45] VSS[124] AP5
BE6 VSS[206] VSS[306] U34 AF45 VSS[46] VSS[125] AP8
BE8 VSS[207] VSS[307] P38 AF46 VSS[47] VSS[126] AR2
BF3 VSS[208] VSS[308] V11 AF49 VSS[48] VSS[127] AR52
BF49 VSS[209] VSS[309] P16 AF5 VSS[49] VSS[128] AT11
BF51 VSS[210] VSS[310] V19 AF8 VSS[50] VSS[129] BA12
BG18 VSS[211] VSS[311] V20 AG2 VSS[51] VSS[130] AH48
BG24 VSS[212] VSS[312] V22 AG52 VSS[52] VSS[131] AT32
BG4 VSS[213] VSS[313] V30 AH11 VSS[53] VSS[132] AT36
BG50 VSS[214] VSS[314] V31 AH15 VSS[54] VSS[133] AT41
BH11 VSS[215] VSS[315] V32 AH16 VSS[55] VSS[134] AT47
BH15 VSS[216] VSS[316] V34 AH24 VSS[56] VSS[135] AT7
BH19 VSS[217] VSS[317] V35 AH32 VSS[57] VSS[136] AV12
BH23 VSS[218] VSS[318] V38 AV18 VSS[58] VSS[137] AV16
BH43 VSS[222] VSS[322] V47 AJ19 VSS[62] VSS[141] AV34
C12 VSS[225] VSS[325] V7 AJ22 VSS[65] VSS[144] AV46
C50 VSS[226] VSS[326] V8 AJ23 VSS[66] VSS[145] AV49
D51 VSS[227] VSS[327] W2 AJ26 VSS[67] VSS[146] AV5
E12 VSS[228] VSS[328] W52 AJ28 VSS[68] VSS[147] AV8
E16 VSS[229] VSS[329] Y11 AJ32 VSS[69] VSS[148] AW14
E20 VSS[230] VSS[330] Y12 AJ34 VSS[70] VSS[149] AW18
E24 VSS[231] VSS[331] Y15 AT5 VSS[71] VSS[150] AW2
E30 VSS[232] VSS[332] Y19 AJ4 VSS[72] VSS[151] BF9
B E34 Y23 AK12 AW32 B
VSS[233] VSS[333] VSS[73] VSS[152]
E38 VSS[234] VSS[334] Y28 AM41 VSS[74] VSS[153] AW36
E42 VSS[235] VSS[335] Y30 AN19 VSS[75] VSS[154] AW40
E46 VSS[236] VSS[336] Y31 AK26 VSS[76] VSS[155] AW52
E48 VSS[237] VSS[337] Y32 AK22 VSS[77] VSS[156] AY11
F49 VSS[240] VSS[340] Y46
F5 P49 IBEXPEAK-M_FCBGA1071
VSS[241] VSS[341]
G10 VSS[242] VSS[342] Y5
G14 VSS[243] VSS[343] Y6
G18 VSS[244] VSS[344] Y8
G2 VSS[245] VSS[345] P24
G22 VSS[246] VSS[346] T43
G32 VSS[247] VSS[347] AD51
G36 VSS[248] VSS[348] AT8
G40 VSS[249] VSS[349] AD47
G44 VSS[250] VSS[350] Y47
G52 VSS[251] VSS[351] AT12
AF39 VSS[252] VSS[352] AM6
H16 VSS[253] VSS[353] AT13
H20 VSS[254] VSS[354] AM5
H30 VSS[255] VSS[355] AK45
H34 VSS[256] VSS[356] AK39
H38 VSS[257] VSS[366] AV14
H42 VSS[258]
A A

IBEX-M(6/6)-GND
5 4 3 2 1
5 4 3 2 1
+VREF_DQ_DIMMA +1.5V +1.5V

4BA2/6W
47P_0402_50V8J
47P_0402_50V8J
47P_0402_50V8J
47P_0402_50V8J
<8> DDR_A_D[0..63] +1.5V
1 1 1 1 +V_DDR_CPU_REF
C1393
C1394
C1395
C1396
<8> DDR_A_DM[0..7] +VREF_DQ_DIMMA
1
JDIMM1 CONN@
2 2 2 2 <8> DDR_A_DQS[0..7]
+VREF_DQ_DIMMA 1 2 R884 1 2 R205
VREF_DQ VSS1 DDR_A_D4 0_0402_5% +V_DDR_CPU_REF0 1K_0402_1%
3 VSS2 DQ4 4 <8> DDR_A_DQS#[0..7] +V_DDR_CPU_REF
0.1U_0402_10V6K
2.2U_0603_6.3V4Z
DDR_A_D0 5 6 DDR_A_D5
DQ0 DQ5
C1057
C1058
1 1 DDR_A_D1 7 8 <8> DDR_A_MA[0..15]
2
DQ1 VSS3 DDR_A_DQS#0 @ R898 1
9 VSS4 DQS#0 10 2 0_0402_5%
DDR_A_DM0 11 12 DDR_A_DQS0
DM0 DQS0
13 VSS5 VSS6 14
1
2 2 DDR_A_D2 DDR_A_D6
D
15 DQ2 DQ6 16 Add for RF D
DQ3 DQ7 R206
19 VSS7 VSS8 20
DDR_A_D8 21 22 DDR_A_D12 1K_0402_1%
DDR_A_D9 DQ8 DQ12 DDR_A_D13
23 24
2
DQ9 DQ13
25 VSS9 VSS10 26
DDR_A_DQS#1 27 28 DDR_A_DM1
DDR_A_DQS1 DQS#1 DM1 DRAMRST#
29 DQS1 RESET# 30 DRAMRST# <6,18>
31 VSS11 VSS12 32
35 DQ11 DQ15 36
37 VSS13 VSS14 38
41 DQ17 DQ21 42
43 VSS15 VSS16 44
DDR_A_DQS2 DQS#2 DM2
47 DQS2 VSS17 48
49 50 DDR_A_D22
DDR_A_D18 VSS18 DQ22 DDR_A_D23
51 DQ18 DQ23 52
DDR_A_D19 53 54
DQ19 VSS19 DDR_A_D28
55 VSS20 DQ28 56
DDR_A_D25 DQ24 DQ29
59 DQ25 VSS21 60
DDR_A_DQS#3
Layout Note:
61 VSS22 DQS#3 62
DDR_A_DM3 63 DM3 DQS3 64 DDR_A_DQS3 Place near JDIMM1
65 VSS23 VSS24 66
69 DQ27 DQ31 70
71 VSS25 VSS26 72
+1.5V
DDR_CKE0_DIMMA 73 74 DDR_CKE1_DIMMA
2009. 08.17 no stuff C204
C
<8> DDR_CKE0_DIMMA CKE0 CKE1 DDR_CKE1_DIMMA <8> C
75 VDD1 VDD2 76
77 78 DDR_A_MA15
DDR_A_BS2 NC1 A15 DDR_A_MA14
<8> DDR_A_BS2 79 80 1
47P_0402_50V8J
47P_0402_50V8J
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
BA2 A14
330U_D2_2VY_R9M
81 VDD3 VDD4 82 1 1 1 1 1 1 1 1 1 1 1
1
DDR_A_MA12 DDR_A_MA11 +
C44
C45
C212
C200
83 A12/BC# A11 84
DDR_A_MA9 DDR_A_MA7
C201
C203
C204
C205
C206
C207
C208
C209
C210
C211
85 A9 A7 86
87 88 @ @
2
DDR_A_MA8 VDD5 VDD6 DDR_A_MA6 2 2 2 @ 2 2 2 2 2 2 2 2 2
89 A8 A6 90
DDR_A_MA5 91 92 DDR_A_MA4
A5 A4
93 VDD7 VDD8 94
DDR_A_MA3 95 96 DDR_A_MA2
DDR_A_MA1 A3 A2 DDR_A_MA0
97 A1 A0 98
99 VDD9 VDD10 100
<8> M_CLK_DDR0 M_CLK_DDR0 101 102 M_CLK_DDR1
CK0 CK1 M_CLK_DDR1 <8>
<8> M_CLK_DDR#0 M_CLK_DDR#0 103 104 M_CLK_DDR#1
CK0# CK1# M_CLK_DDR#1 <8>
DDR_A_MA10
105
107
VDD11 VDD12 106
108 DDR_A_BS1
2009.08.17 change the
A10/AP BA1 DDR_A_BS1 <8>
<8> DDR_A_BS0 DDR_A_BS0 109 BA0 RAS# 110 DDR_A_RAS#
DDR_A_RAS# <8> Layout Note: C200 to ESR 12m ohm
111 VDD13 VDD14 112
<8> DDR_A_WE# DDR_A_WE# 113 WE# S0# 114 DDR_CS0_DIMMA#
DDR_CS0_DIMMA# <8>
Place near JDIMM1.203 & JDIMM1.204
<8> DDR_A_CAS# DDR_A_CAS# 115 116 M_ODT0
CAS# ODT0 M_ODT0 <8>
117 VDD15 VDD16 118
DDR_A_MA13 119 120 M_ODT1
A13 ODT1 M_ODT1 <8> +VREF_CA +V_DDR_CPU_REF
<8> DDR_CS1_DIMMA# DDR_CS1_DIMMA# 121 122
S1# NC2 +0.75VS
123 VDD17 VDD18 124
125 NCTEST VREF_CA 126 1 2
127 128 R877 0_0402_5%
DDR_A_D32 VSS27 VSS28 DDR_A_D36
129 130 1 1
2.2U_0402_6.3V6M
0.1U_0402_16V4Z
131 132
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0805_6.3V6M
DQ33 DQ37
C213
C214
133 VSS29 VSS30 134 1 1 1 1 1
DDR_A_DQS4 DQS#4 DM4 2 2
C215
C216
C217
C218
C202
137 DQS4 VSS31 138
B 139 140 DDR_A_D38 B
DDR_A_D34 VSS32 DQ38 DDR_A_D39 2 2 2 2 2
141 DQ34 DQ39 142
DDR_A_D35 143 144
145 VSS34 DQ44 146
DDR_A_D40 147 148 DDR_A_D45
DDR_A_D41 DQ40 DQ45
149 DQ41 VSS35 150
151 152 DDR_A_DQS#5
DDR_A_DM5 VSS36 DQS#5 DDR_A_DQS5
153 DM5 DQS5 154
155 VSS37 VSS38 156
DDR_A_D42 157 158 DDR_A_D46
159 DQ43 DQ47 160
161 VSS39 VSS40 162
DDR_A_D48 163 164 DDR_A_D52
165 DQ49 DQ53 166
167 VSS41 VSS42 168
DDR_A_DQS6 DQS#6 DM6
171 DQS6 VSS43 172
173 174 DDR_A_D54
DDR_A_D50 VSS44 DQ54 DDR_A_D55
175 DQ50 DQ55 176
DDR_A_D51 177 178
179 VSS46 DQ60 180
DDR_A_D56 181 182 DDR_A_D61
DDR_A_D57 DQ56 DQ61
183 DQ57 VSS47 184
185 186 DDR_A_DQS#7
DDR_A_DM7 VSS48 DQS#7 DDR_A_DQS7
187 DM7 DQS7 188
189 VSS49 VSS50 190
DDR_A_D58 191 192 DDR_A_D62
193 DQ59 DQ63 194
1 R207 2 195 VSS51 VSS52 196
10K_0402_5% 197 198 PM_EXTTS#1_R
SA0 EVENT# PM_EXTTS#1_R <6,18>
199 200 SMB_DATA_S3
+3VS VDDSPD SDA SMB_DATA_S3 <12,18,19,30>
201 202 SMB_CLK_S3
SMB_CLK_S3 <12,18,19,30>
2.2U_0402_6.3V6M
0.1U_0402_16V4Z
A SA1 SCL A
1 1 203 VTT1 VTT2 204 +0.75VS
1
10K_0402_5%
1/76BA1/86W
C219
C220
R208
205 206
2 2
G1
+0.75VS
G2
DDR3 SO-DIMM A
REVERSE
2

DDRIII-SODIMM SLOT1
5 4 3 2 1
5 4 3 2 1
+1.5V +1.5V
<8> DDR_B_DQS#[0..7]
4BA2/6W
<8> DDR_B_D[0..63]
+VREF_DQ_DIMMB +VREF_DQ_DIMMB +V_DDR_CPU_REF
<8> DDR_B_DM[0..7]
JDIMM2
+VREF_DQ_DIMMB 1 2
VREF_DQ VSS1 <8> DDR_B_DQS[0..7] +V_DDR_CPU_REF1
3 4 DDR_B_D4 R885 1 2 0_0402_5%
2.2U_0402_6.3V6M
DDR_B_D0 VSS2 DQ4 DDR_B_D5

5 6 <8> DDR_B_MA[0..15]
0.1U_0402_10V6K
DDR_B_D1 DQ0 DQ5
1 1 7 DQ1 VSS3 8
9 10 DDR_B_DQS#0 @ R899 1 2 0_0402_5%
DDR_B_DM0 VSS4 DQS#0 DDR_B_DQS0
C221
C1059
11 DM0 DQS0 12
13 VSS5 VSS6 14
2 2 DDR_B_D2 DDR_B_D6
15 DQ2 DQ6 16
D DDR_B_D3 17 18 DDR_B_D7 D
DQ3 DQ7
19 VSS7 VSS8 20
DDR_B_D8 21 22 DDR_B_D12
DDR_B_D9 DQ8 DQ12 DDR_B_D13
23 DQ9 DQ13 24
25 VSS9 VSS10 26
DDR_B_DQS#1 27 28 DDR_B_DM1
DDR_B_DQS1 DQS#1 DM1 DRAMRST#
29 DQS1 RESET# 30 DRAMRST# <6,17>
31 VSS11 VSS12 32
35 DQ11 DQ15 36
37 VSS13 VSS14 38
41 DQ17 DQ21 42
43 VSS15 VSS16 44
DDR_B_DQS2 DQS#2 DM2
47 DQS2 VSS17 48
49 50 DDR_B_D22
51 DQ18 DQ23 52
DDR_B_D19 53 54
DQ19 VSS19 DDR_B_D28
55 VSS20 DQ28 56
DDR_B_D25 DQ24 DQ29
59 DQ25 VSS21 60
61 62 DDR_B_DQS#3
63 DM3 DQS3 64
65 VSS23 VSS24 66
69 DQ27 DQ31 70
71 VSS25 VSS26 72
<8> DDR_CKE2_DIMMB DDR_CKE2_DIMMB 73 74 DDR_CKE3_DIMMB Layout Note:

C CKE0 CKE1 DDR_CKE3_DIMMB <8> C
75 VDD1 VDD2 76
77 NC1 A15 78 DDR_B_MA15 Place near JDIMM2
<8> DDR_B_BS2 DDR_B_BS2 79 80 DDR_B_MA14
BA2 A14
81 VDD3 VDD4 82
DDR_B_MA12 83 84 DDR_B_MA11
DDR_B_MA9 A12/BC# A11 DDR_B_MA7
85 A9 A7 86
DDR_B_MA8
87
89
VDD5 VDD6 88
90 DDR_B_MA6
2009. 08.17 no stuff C228,C229
DDR_B_MA5 A8 A6 DDR_B_MA4 +1.5V
91 A5 A4 92
93 VDD7 VDD8 94
DDR_B_MA3 95 96 DDR_B_MA2
DDR_B_MA1 A3 A2 DDR_B_MA0
97 A1 A0 98
99 100
47P_0402_50V8J
47P_0402_50V8J
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
M_CLK_DDR2 VDD9 VDD10 M_CLK_DDR3
<8> M_CLK_DDR2 101 CK0 CK1 102 M_CLK_DDR3 <8> 1 1 1 1 1 1 1 1 1 1 1 1
1
M_CLK_DDR#2 M_CLK_DDR#3
C46
C47
<8> M_CLK_DDR#2 103 CK0# CK1# 104 M_CLK_DDR#3 <8>
C223
C224
C225
C226
C227
C228
C229
C230
C231
C232
C233
C234
105 VDD11 VDD12 106
DDR_B_MA10 107 108 DDR_B_BS1 @ @
DDR_B_BS1 <8>
2
DDR_B_BS0 A10/AP BA1 DDR_B_RAS# 2 2 2 2 2 2 @ 2 @ 2 2 2 2 2
<8> DDR_B_BS0 109 BA0 RAS# 110 DDR_B_RAS# <8>
111 VDD13 VDD14 112
<8> DDR_B_WE# DDR_B_WE# 113 114 DDR_CS2_DIMMB#
WE# S0# DDR_CS2_DIMMB# <8>
<8> DDR_B_CAS# DDR_B_CAS# 115 116 M_ODT2
CAS# ODT0 M_ODT2 <8>
117 VDD15 VDD16 118
DDR_B_MA13 119 120 M_ODT3
A13 ODT1 M_ODT3 <8> +VREF_CA
<8> DDR_CS3_DIMMB# DDR_CS3_DIMMB# 121 122
S1# NC2
123 VDD17 VDD18 124
125 NCTEST VREF_CA 126
127 VSS27 VSS28 128
DDR_B_D32 129 130 DDR_B_D36 Layout Note:
0.1U_0402_16V4Z
DQ32 DQ36
2.2U_0603_6.3V4Z
DDR_B_D33 131 132 DDR_B_D37 1 1
DQ33 DQ37 Place near JDIMM2.203 & JDIMM2.204
C235
C1060
133 VSS29 VSS30 134
137 DQS4 VSS31 138
B DDR_B_D38 2 2 B
139 VSS32 DQ38 140
DDR_B_D34 141 142 DDR_B_D39
DDR_B_D35 DQ34 DQ39 +0.75VS
143 DQ35 VSS33 144
145 146 DDR_B_D44
147 DQ40 DQ45 148
DDR_B_D41 149 150
DQ41 VSS35 DDR_B_DQS#5
151 152
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
153 DM5 DQS5 154 1 1 1 1
155 VSS37 VSS38 156
DDR_B_D42 DDR_B_D46
C237
C238
C239
C240
157 DQ42 DQ46 158
DDR_B_D43 159 160 DDR_B_D47
DQ43 DQ47 2 2 2 2
161 VSS39 VSS40 162
DDR_B_D48 163 164 DDR_B_D52
165 DQ49 DQ53 166
167 VSS41 VSS42 168
171 DQS6 VSS43 172
173 174 DDR_B_D54
175 DQ50 DQ55 176
DDR_B_D51 177 178
DQ51 VSS45 DDR_B_D60
179 VSS46 DQ60 180
DDR_B_D56 181 182 DDR_B_D61
DDR_B_D57 DQ56 DQ61
183 DQ57 VSS47 184
185 186 DDR_B_DQS#7
187 DM7 DQS7 188
189 VSS49 VSS50 190
DDR_B_D58 191 192 DDR_B_D62
193 DQ59 DQ63 194
1 R210 2 195 VSS51 VSS52 196
10K_0402_5% 197 198 PM_EXTTS#1_R
SA0 EVENT# PM_EXTTS#1_R <6,17>
199 200 SMB_DATA_S3
+3VS VDDSPD SDA SMB_DATA_S3 <12,17,19,30>
R211 201 202 SMB_CLK_S3
SMB_CLK_S3 <12,17,19,30>
2.2U_0402_6.3V6M
0.1U_0402_16V4Z
A SA1 SCL A
1 2 203 204
1 1
10K_0402_5%
VTT1 VTT2
1/76BA1/86W
+0.75VS
DDR3 SO-DIMM B
C241
C242
205 206
2 2
G1
+0.75VS
G2
REVERSE
CONN@

DDRIII-SODIMM SLOT2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Calpella DIS LA-4107P 1.0
5 4 3 2 1
5 4 3 2 1
+1.5VS_CK505
+1.05VS_CK505
+1.05VS_CK505 +3VS_CK505
80mA CLK_14M_PCH @ C808 1 2 10P_0402_50V8J

+3VS_CK505 +1.5VS_CK505
U3
250mA SMB_CLK_S3
1 VDD_DOT SCL 32 SMB_CLK_S3 <12,17,18,30>
2 31 SMB_DATA_S3
VSS_DOT SDA SMB_DATA_S3 <12,17,18,30>
CLK_BUF_DOT96 R213 2 1 33_0402_5%L_CLK_BUF_DOT96 3 30 REF_0/CPU_SEL R222 2 1 33_0402_5% CLK_14M_PCH
<12> CLK_BUF_DOT96 DOT_96 REF_0/CPU_SEL CLK_14M_PCH <12>
OK CLK_BUF_DOT96# R214 2 1 33_0402_5%L_CLK_BUF_DOT96# 14M OK
DOT96 <12> CLK_BUF_DOT96# DOT_96# 96MHz
4 29
VDD_REF CLK_XTAL_IN
5 28
D 27M_CLK @ R216 2 L_27M_CLK VDD_27 XTAL_IN CLK_XTAL_OUT D
<26> 27M_CLK 133_0402_5% 6 27
27M_SSC L_27M_SSC 27MHZ XTAL_OUT
OK 27M <26> 27M_SSC
@ R217 2 133_0402_5% 7
27MHZ_SS VSS_REF
26 @ R226 1 2 0_0402_5%
VGATE <13,49>
8 25 R_CKPWRGD R237 1 2 0_0402_5% CKPWRGD
VSS_27 CKPWRGD/PD#
9/11 non-stuff R216
9 24
CLK_DMI R221 1 L_CLK_DMI VSS_SATA VDD_CPU L_CLK_BUF_BCLK
<12> CLK_DMI 2 33_0402_5% 10 23 R224 1 2 33_0402_5% CLK_BUF_BCLK <12>
CLK_DMI# L_CLK_DMI# SRC_1/SATA CPU_0 L_CLK_BUF_BCLK#
OK DMI<12> CLK_DMI#
R223 1 2 33_0402_5% 11
SRC_1#/SATA#100MHz 133MHz CPU_0# 22 R225 1 2 33_0402_5% CLK_BUF_BCLK# <12> BCLK OK
12 21
CLK_BUF_CKSSCD R219 1 L_CLK_BUF_CKSSCD VSS_SRC VSS_CPU
<12> CLK_BUF_CKSSCD 2 33_0402_5% 13 20
CLK_BUF_CKSSCD# L_CLK_BUF_CKSSCD# SRC_2 CPU_1
OK CKSSCD <12> CLK_BUF_CKSSCD# R220 1 2 33_0402_5% 14
SRC_2# 100MHz CPU_1#
19
15 18
CPU_STOP# VDD_SRC_IO VDD_CPU_IO
16 CPU_STOP# VDD_SRC 17
TGND
ICS9LRS3197AKLFT MLF 32P +3VS +3VS_CK505
33
R212
1 2
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Number of Clock Outputs
0_0805_5%
ǂ is GND (for DELLǂHP)

1 1 1
C245
C246
C247
Output Number
ǂ pin8
SLG8SP585
SLG8SP587 pin8 is 48MHz (For ABO or 030)
RealtekǂSA00002Y010
133MHz 2 2 2 2
2009.10.21 change the C259, C260 to 22P
* IDTǂSA00002Y500
SRC(100MHz_SS) 1
IDTǂSA00002WX00
SRC/SATA(100MHz) 1 CLK_XTAL_OUT
CLK_XTAL_IN +3VS_CK505
Place close to U3
REF(14.318MHz) 1 Y3
1 2
+1.05VS_CK505
1
DOT_CLK(96MHz) 1 +VCCP
C
2 2 14.318MHZ_16PF_7A14300083 C
C259 C260 R607 R218
27MHz 1 22P_0402_50V8J 22P_0402_50V8J 10K_0402_5% 1 2
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Vendor suggests 22pF 0_0805_5% Routing the trace at least 10mil
27MHz_SS 1 1 1
1 1 1
C252
C253
C254
CKPWRGD
1
D 2 2 2
PIN 30 CPU_0 CPU_1 CLK_EN# 2 Q30
<49> CLK_EN# G 2N7002_SOT23-3
+3VS_CK505 S
3
0(default) 133MHz 133MHz
CPU_STOP# R234 1 2 10K_0402_5%
1 100MHz 100MHz
+1.5VS_CK505
CPU_SEL During CK_PEWGD Latch Pin1
R228
+3VS 0_0603_5%
@ +3VS 1 2
R244 1 2 10K_0402_5% REF_0/CPU_SEL
R247 1 2 10K_0402_5% +1.5VS 1 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
@ R229
@R229
0_0603_5% 1 1 1
C248
C249
C250
2 2 2
B B
Near pin1 Near pin17 Near pin24
SI ǂReserve low power clock generator solution
A A

Clock Generator CK505
5
4
3 2
1
Sheet 19 of 55
A B C D E
BLUE
GREEN
RED
Place close to
D6 D7 D8 JCRT1
1
1 +5VS +RCRT_VCC +CRTVDD 1
DAN217T146_SC59-3
DAN217T146_SC59-3
DAN217T146_SC59-3
D9 F1
2 1 1 2 W=40mils
CRT Connector RB491D_SC59-3 1.1A_6VDC_FUSE
1
3
+3VS
0.1U_0402_16V4Z
C266 2
JCRT1
6
11
RED 1
<36> RED
7
12
GREEN 2
<36> GREEN
8
13
<36> D_HSYNC BLUE 3
<36> BLUE
9
<36> D_VSYNC 14
+5VS +5VS 4 16
10 17
C267 C268 15
0.1U_0402_16V4Z 0.1U_0402_16V4Z 5
1 2 1 2
SUYIN_070546FR015S263ZR DGPU_EDIDSEL#
R815 2 1 10K_0402_5% CONN@
+3VS
5
1
U5 +CRTVDD +CRTVDD
SN74AHCT1G125GW_SOT353-5
OE#
P
1
2 CRT_HSYNC HSYNC_G_A R269 1 D_HSYNC 2
2 2 0_0402_5%
<22> CRT_HSYNC A Y 4
1
SG@ R272 R273 SG@
G
5
1
R270 R271 2.2K_0402_5% 2.2K_0402_5%

4.7K_0402_5% 4.7K_0402_5%
OE#
P
3
2
CRT_VSYNC 2 4 VSYNC_G_A R274 1 2 0_0402_5% D_VSYNC SG@
2
<22> CRT_VSYNC A Y
2
G
U6 1 1 D_DDCDATA 6 1 I_CRT_DDC_DATA
I_CRT_DDC_DATA <13>
SN74AHCT1G125GW_SOT353-5 @ C269 @ C270
3
5P_0402_50V8C 5P_0402_50V8C
Q2A
5
SG@ IGPU
2 2 2N7002DW-7-F_SOT363-6
D_DDCCLK 3 4 I_CRT_DDC_CLK
I_CRT_DDC_CLK <13>
D_DDCDATA <36> Q2B

D_DDCCLK <36> 2N7002DW-7-F_SOT363-6
+3VS_VGA
DGPU_EDIDSEL R900 1 2 0_0402_5%
1
R878 R879
4.7K_0402_5% 4.7K_0402_5%
2
D_DDCDATA 6 1 D_CRT_DDC_DATA <26>
Q11A
5
3 2N7002DW-7-F_SOT363-6
DGPU 3
D_DDCCLK 3 4 D_CRT_DDC_CLK <26>
Q11B
2N7002DW-7-F_SOT363-6
CRT Termination/EMI Filter

M_RED L8 1 2 HLC0603CSCCR11JT_0603 RED
<22> M_RED
M_GRN L9 1 2 HLC0603CSCCR11JT_0603 GREEN

<22> M_GREEN
+3VS
M_BLU L10 1 2 HLC0603CSCCR11JT_0603 BLUE
<22> M_BLUE
2
22P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
1
1
150_0402_1%
150_0402_1%
150_0402_1%
1 1 1 1 1 1 R902
C271
C272
C273
C274
C275
C276
10K_0402_5%
R275
R276
R277
@ @ @
1
2 2 2 2 2 2 DGPU_EDIDSEL
2
DGPU_EDIDSEL <22,40>
1
D SG@
DGPU_EDIDSEL# 2 Q12
<14,22> DGPU_EDIDSEL#
G 2N7002_SOT23-3
4 4
S
3
CRT Connector
A
B
C D
E
Sheet 20 of 55
1.0
5 4 3 2 1
LVDS CONN & USB Camera + Dig Mic

Add for RF
+3VS +LCDVDD INVPWR_B+ LVDS_ACLK- LVDS_ACLK+
5P_0402_50V
5P_0402_50V
C1408
C1409
1 1
D D
Reserve for RF
680P_0402_50V7K
680P_0402_50V7K
680P_0402_50V7K
47P_0402_50V8J
47P_0402_50V8J
1 1 1 @ @
1
1
2 2
C277
C1410
C278
C279
C1411
+LCDVDD +3VS
+LCDVDD +LCDVDD +5VALW Q13
SI2301BDS-T1-E3_SOT23-3
2
2
2 2 2
1
JLVDS1 1 3
S
D
1 2 LVDS_A2- 1
1 2 LVDS_A2+ LVDS_A2- <22>
3 4 1 1 R278 R279
3 4 LVDS_A2+ <22>
5 6 LVDS_A1- C281 C282 22_0805_5% 1M_0402_5% C280 1
G
2
5 6 LVDS_A1+ LVDS_A1- <22>
7 8 4.7U_0805_10V4Z
6 2
2
7 8 LVDS_A0- LVDS_A1+ <22> 2
9 10 0.1U_0402_16V4Z 0.1U_0402_16V4Z C283
9 10 LVDS_A0+ LVDS_A0- <22> 2 2
11 12 4.7U_0805_10V4Z
11 12 LVDS_A0+ <22> 2
USB20_P4 13 14 LVDS_ACLK-
<14> USB20_P4 USB20_N4 13 14 LVDS_ACLK+ LVDS_ACLK- <22>
15 16 R280
<14> USB20_N4 15 16 LVDS_ACLK+ <22>
22P_0402_50V8J
22P_0402_50V8J
17 17 18 18 2 2 1
1 1 19 19 20 20
C1412
C1413
21 22 LVDS_INV_PWM 2N7002DW-7-F_SOT363-6 100K_0402_5%
1
21 22 DMIC_DAT C284
23 23 24 24 DMIC_DAT <34> Add for RF Q3A
1
25 26 DMIC_CLK
2 2 25 26 +5V_LOGO DMIC_CLK <34> 0.047U_0402_16V7K
Add for RF @ @ +3VS 27 28 R281 1 2 +5VS
27 28 LVDS_INV_PWM 100_0402_1% @ R1196
29 29 30 30 LVDS_INV_PWM <22>
31 32 BKOFF# BKOFF# <39> 2.2_0402_5% 01/03 Change to 0.047u to meet T1 timing
31 32 DAC_BRIG
33 34
2
33 34 DAC_BRIG <39>
35 35 36 36 +USB_CAM
37 38 LVDS_EDID_CLK 1
37 38 LVDS_EDID_DATA LVDS_EDID_CLK <22>
39 39 40 40
LVDS_EDID_DATA <22>
Limited Current < 1A
41 42 @ C1414
GND GND
1
12P_0402_50V J D SG@
ACES_88242-4001 2 I_ENAVDD Q33
CONN@ BKOFF#
IGPU <13> I_ENAVDD 2
G 2N7002_SOT23-3
1
C D59 C
S
3
4 2 USB20_P4 1 1 SG@ R283
+5VALW VIN IO1
2
100K_0402_5%
USB20_N4 3 1 C1369 C286 @ R282
IO2 GND 680P_0402_50V7K 680P_0402_50V7K 10K_0402_5%
2
2 2
2N7002DW-7-F_SOT363-6
PJLCR05
3
1
Q3B
EMI request. D_ENAVDD 5
<24> D_ENAVDD
DGPU
4
R880
ǂ26
2.2K_0402_5%
+3VS Must close JLVDS1pin 24
1
DMIC_CLK
DMIC_DAT
2
R284 R285 1 1
2.2K_0402_5% 2.2K_0402_5% @ C287 @ C288
220P_0402_25V8J 220P_0402_25V8J
1
LVDS_EDID_CLK 2 2
LVDS_EDID_DATA B+ INVPWR_B+
L12 1 2
B FBMA-L11-201209-221LMA30T_0805 B
USB Camera +USB_CAM
+5VS
Add for RF
U7
1
1 5
IN OUT
47P_0402_50V8J
47P_0402_50V8J
R286
10U_0805_6.3V6M
1 2 215K_0402_1%
GND
C1415
R288 1 1
C289
C981
0_0402_5% 3 4
SHDN BYP
1
1
C290 2 G916T1UF SOT23 5P @
1
10U_0805_6.3V6M R287 2 2
100K_0402_1%
2
2
+USB_CAM is +3.9VS, R286:215K; R287:100Kohm
A
+USB_CAM=1.25(1+R1091/R1093) A

LCD CONN.
5
4
3 2
Date:
1
Sheet 21 of 55
1.0
5 4 3 2 1
LVDS Switch LVDS I2C switch

+3VS
DGPU_EDIDSEL <20,40> Backlight Enable
U35
2
DGPU 4
0.1U_0402_16V4Z
4.7U_0805_10V4Z
VCC
VCC 10 1
<24> D_LVDS_A0+ D_LVDS_A0+ 48 18 <26> D_EDID_DATA 1 6 LVDS_EDID_DATA <21>
D_LVDS_A0- 0B1 VCC
SG@ C1004
SG@ C1005
<24> D_LVDS_A0- 47 1B1 VCC 27
<24> D_LVDS_A1+ D_LVDS_A1+ 43 38 SG@ Q34A
D_LVDS_A1- 2B1 VCC 2 2N7002DW-7-F_SOT363-6
<24> D_LVDS_A1- 42 3B1 VCC 50 LOW: B1 to A DGPU
5
<24> D_LVDS_A2+ D_LVDS_A2+ 37 56
D_LVDS_A2- 36
4B1 VCC High: B2 to A
<24> D_LVDS_A2- 5B1
<24> D_LVDS_ACLK+ D_LVDS_ACLK+ 32 2 LVDS_A0+ <26> D_EDID_CLK 4 3
D 6B1 A0 LVDS_A0+ <21> LVDS_EDID_CLK <21> +3VS D
<24> D_LVDS_ACLK- D_LVDS_ACLK- 31 3 LVDS_A0-
7B1 A1 LVDS_A0- <21>
22 7 LVDS_A1+ SG@ Q34B
8B1 A2 LVDS_A1+ <21> +3VS
23 8 LVDS_A1- 2N7002DW-7-F_SOT363-6
9B1 A3 LVDS_A1- <21>
11 LVDS_A2+
A4 LVDS_A2+ <21>
12 LVDS_A2- DGPU_SELECT#
A5 LVDS_A2- <21>
2
LVDS_ACLK+ SG@
IGPU A6 14 LVDS_ACLK+ <21>
2
15 LVDS_ACLK- R883
A7 LVDS_ACLK- <21> DGPU_EDIDSEL# <14,20>
5
<13> I_LVDS_A0+ I_LVDS_A0+ 46 19 SG@ R1261 4.7K_0402_5%
I_LVDS_A0- 0B2 A8 4.7K_0402_5%
<13> I_LVDS_A0- 45 1B2 A9 20
2
I_LVDS_A1+ R790
<13> I_LVDS_A1+ 41 IGPU <13> IGPU_BKLT_EN 6 1 4 3 ENBKL <39>
1
I_LVDS_A1- 2B2 DGPU_SELECT# SG@
<13> I_LVDS_A1- 40 17 1 2 DGPU_SELECT# <14>
1
I_LVDS_A2+ 3B2 SEL 0_0402_5%
<13> I_LVDS_A2+ 35 4B2 <13> I_EDID_DATA 1 6
<13> I_LVDS_A2- I_LVDS_A2- 34 1 SG@ SG@ Q111A SG@Q111B
5B2 GND
2
I_LVDS_ACLK+ 30 6 Q21A 2N7002DW-7-F_SOT363-6 2N7002DW-7-F_SOT363-6
<13> I_LVDS_ACLK+ 6B2 GND
I_LVDS_ACLK- 2N7002DW-7-F_SOT363-6
<13> I_LVDS_ACLK- 29
25
7B2 GND 9
13
IGPU @ R1262
8B2 GND
5
26 16 4.7K_0402_5%
9B2 GND SG@ DGPU_SELECT
21
1
GND
GND 24 <13> I_EDID_CLK 4 3
5
GND 28
52 33 Q21B
NC GND 2N7002DW-7-F_SOT363-6
5
54
NC GND 39
44 9/20 Follow Intel check list to add PU resistors for EDID signals
DGPU <26> DGPU_BKL_EN 6 1 4 3
NC GND
51 NC GND 49
SG@ Q35A SG@Q35B
2
GND 53
57 55 R886 2N7002DW-7-F_SOT363-6 2N7002DW-7-F_SOT363-6
Thermal_GND GND 10K_0402_5%
TS3DV520ERHUR_QFN56_11X5~D
SG@
DIS ONLY (LVDS)
1
DIS@
D_EDID_CLK 0_0402_5% 1 2 R1228 LVDS_EDID_CLK
DIS@
C D_LVDS_A0- RP36 4 1 LVDS_A0- D_EDID_DATA 0_0402_5% 1 2 R1229 LVDS_EDID_DATA C
D_LVDS_A0+ 3 2 LVDS_A0+
DIS@ 0_0404_4P2R_5%
D_LVDS_A1- RP37 4 1 LVDS_A1-
D_LVDS_A1+ 3 2 LVDS_A1+ DGPU_BKL_EN 1 2 DIS@ ENBKL
DIS@ 0_0404_4P2R_5% R799 0_0402_5%
D_LVDS_A2+
D_LVDS_A2-
RP38 3
4
2
1
LVDS_A2+
LVDS_A2-
LVDS PWM switch
DIS@ 0_0404_4P2R_5% +3VS IGPU_BKLT_EN 1 2 @
D_LVDS_ACLK- RP39 4 1 LVDS_ACLK- R1226 0_0402_5%
D_LVDS_ACLK+ 3 2 LVDS_ACLK+
DIS@ 0_0404_4P2R_5%
2
@ @ R890 2 1 0_0402_5% INV_PWM <39>
2
@ R889
R891 4.7K_0402_5%
4.7K_0402_5%
1
LVDS_INV_PWM <21>
1
6
1
@ D @ DIS@ R892 1 2 0_0402_5% D_INV_PWM
Q36A 2 Q114
2N7002DW-7-F_SOT363-6 G 2N7002_SOT23-3
R1227
CRT Switch IGPU <13> DPST_PWM 2 S
3
SG@ 2 1 0_0402_5% DPST_PWM
3
@
1
Q36B
+3VS
DGPU <24> D_INV_PWM 5

0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2N7002DW-7-F_SOT363-6
4
B B
1 SG@ 1 SG@ 1 SG@ 1 SG@
C1011 C1012 C1013 C1014
2 2 2 2
+3VS
U43
+3VS 1 SG@ R1237 0_0402_5%
VDD
DIS ONLY (CRT)
2
4 VDD SEL 12 1 2DGPU_SELECT#
9 SG@ R882
VDD M_RED 10K_0402_5%
19 VDD YA 2 M_RED <20>
5 M_GREEN D_RED R893 2 DIS@ 1 0_0402_5% M_RED
YB M_GREEN <20>
24 6 M_BLUE D_GREEN R894 2 DIS@ 1 0_0402_5% M_GREEN DGPU_SELECT
<26> D_RED M_BLUE <20>
1
A0 YC D_BLUE R895 DIS@ 0_0402_5% M_BLUE
<26> D_GREEN 22 B0 2 1
18 8 CRT_HSYNC D_CRT_HSYNC R896 2 DIS@ 1 0_0402_5% CRT_HSYNC
<26> D_BLUE C0 YD CRT_HSYNC <20>
CRT_VSYNC D_CRT_VSYNC R897 DIS@ 0_0402_5% CRT_VSYNC
DGPU <26> D_CRT_HSYNC 17 D0 YE 11 CRT_VSYNC <20> 2 1
1
D SG@
<26> D_CRT_VSYNC 14 E0 DGPU_SELECT# 2 Q37
23 3 G 2N7002_SOT23-3
<13> I_RED A1 GND
<13> I_GREEN 21 7 S
3
B1 GND
IGPU <13> I_BLUE 16
15
C1 GND 10
20
<13> I_CRT_HSYNC D1 GND
<13> I_CRT_VSYNC 13 E1 9/11 Q37 change to single package
PI3V512QE_QSOP24
SG@
A A

LVDS Switch
5 4 3 2 1
5 4 3 2 1
D D
+3VS_VGA
@R859
@ R859 1 2 0_0402_5%
+3VS_VGA
2
L28
<26> HDMI_C_CLK-
C375 2 1 0.1U_0402_16V4Z HDMICLK- 1 1 2 2 HDMI_R_CLK- R571 R572
2.2K_0402_5% 2.2K_0402_5%
WCM-2012-900T_0805 Q5A
2
C376 2 1 0.1U_0402_16V4Z HDMICLK+ 4 3 HDMI_R_CLK+ 2N7002DW-7-F_SOT363-6
1
<26> HDMI_C_CLK+ 4 3
1 6 HDMIDAT
@R866
@ R866 <26> HDMIDAT_VGA
1 2
0_0402_5%
5
C Q5B @ R575 1 C
2 0_0402_5%
@R868
@ R868 1 2 0_0402_5% 2N7002DW-7-F_SOT363-6
4 3 HDMICLK
L29 <26> HDMICLK_VGA
<26> HDMI_C_TX0- C377 2 1 0.1U_0402_16V4Z HDMI_TX_0- 1 2 HDMI_R_TX0-
1 2 @R576
@ R576 1 2 0_0402_5%
WCM-2012-900T_0805
<26> HDMI_C_TX0+ C378 2 1 0.1U_0402_16V4Z HDMI_TX_0+ 4 3 HDMI_R_TX0+
4 3
@R869
@ R869 1 2
0_0402_5%
@R870
@ R870 1 2 0_0402_5%
L30
<26> HDMI_C_TX1- C379 2 1 0.1U_0402_16V4Z HDMI_TX_1- 1
1 2
2 HDMI_R_TX1-
WCM-2012-900T_0805
<26> HDMI_C_TX1+ C380 2 1 0.1U_0402_16V4Z HDMI_TX_1+ 4
4 3
3 HDMI_R_TX1+
@R871
@ R871 1 2
0_0402_5%
@R872
@ R872 1 2 0_0402_5%
+5VS_HDMI
L31
C382 2 1 0.1U_0402_16V4Z HDMI_TX_2- 1 2 HDMI_R_TX2- HDMI_HPD +5VS +5VS_HDMI
<26> HDMI_C_TX2- 1 2
2
HDMI Connector
22N_0402_16V7K
WCM-2012-900T_0805 2 1 +3VS
2
<26> HDMI_C_TX2+ C381 2 1 0.1U_0402_16V4Z HDMI_TX_2+ 4 3 HDMI_R_TX2+ C1245 R1022 2
4 3
5
B 0.1U_0402_16V4Z 1 2.2K_0402_5% 1
B
1 OE# R1023 C1246
P
C665
@R873
@ R873 1 2 2 4 HPD 100K_0402_5% 0.1U_0402_16V4Z
0_0402_5% A Y 1
1
G
U52 D34 @ 2
SN74AHCT1G125GW_SOT353-5 RB411DT146_SOT23-3
3
1
3 4 +5VS_HDMI
<14> DGPU_HPD_INT#
22N_0402_16V7K
0.1U_0402_16V4Z
HDMICLK-
HDMICLK+ 2N7002DW-7-F_SOT363-6 Q19B 1 1
HDMI_TX_0- SG@
1.5K_0402_5%
1.5K_0402_5%
C666
C667
HDMI_TX_0+
2
HDMI_TX_1-
HDMI_TX_1+ +3VS @ 2 2
R577
R578
HDMI_TX_2-
HDMI_TX_2+
5
1
2 HPD
P
B JHDMI1
<26> HDMI_DET 4
Y
1
1 DGPU_PWR_EN <14,40,41,47,51> 18
A +5V
G
1
HDMIDAT 16 13
R733 R734 R735 R736 R737 R738 R739 R740 R924 U51 HDMICLK SDA CEC
15 14
3
499_0402_1% 10K_0402_5% NC7SZ08P5X_NL_SC70-5 HDMI_HPD SCL Reserved

19
HP_DET
2
2
HDMI_R_CLK- GND
12 5
2
499_0402_1% 499_0402_1% 499_0402_1% 499_0402_1% HDMI_R_CLK+ CK- GND

10 8
499_0402_1% 499_0402_1% 499_0402_1% HDMI_R_TX0- CK+ GND
9 11
HDMI_R_TX0+ D0- GND
7 20
D0+ GND
6
HDMI_R_TX1- 6 21
D1- GND
1
D DIS@ HDMI_R_TX1+ 4 22
SG@ Q108 HDMI_R_TX2- D1+ GND
+5VS 2 3 23
A Q19A G 2N7002_SOT23-3 HDMI_R_TX2+ D2- GND A
+5VS 2 1 D2+ DDC/CEC_GND 17
S
3
2N7002DW-7-F_SOT363-6
1
SUYIN_100042MR019S153ZL
CONN@

HDMI LS & Conn.
5
4
3 2

1
Sheet 23 of 55
1.0
A B C D E
1 1
OPP@
U8
M93-S3-LP
PEG Interface
U8A
AF30 AH30 PCIE_CRX_GTX_G_P15 0.1U_0402_10V6K 2 1 C776 PCIE_CRX_GTX_P15 <7>

<7> PCIE_CTX_GRX_P15 PCIE_RX0P PCIE_TX0P
AE31 AG31 PCIE_CRX_GTX_G_N15 0.1U_0402_10V6K 2 1 C777 PCIE_CRX_GTX_N15 <7>
<7> PCIE_CTX_GRX_N15 PCIE_RX0N PCIE_TX0N
AE29 AG29 PCIE_CRX_GTX_G_P14 0.1U_0402_10V6K 2 1 C778 PCIE_CRX_GTX_P14 <7>

AD28 AF28 PCIE_CRX_GTX_G_N14 0.1U_0402_10V6K 2 1 C779 PCIE_CRX_GTX_N14 <7>
LVDS Interface <7> PCIE_CTX_GRX_P13

<7> PCIE_CTX_GRX_N13
AD30
AC31
PCIE_RX2P
PCIE_RX2N
PCIE_TX2P
PCIE_TX2N
AF27
AF26
PCIE_CRX_GTX_G_P13
PCIE_CRX_GTX_G_N13
0.1U_0402_10V6K
0.1U_0402_10V6K
2
2
1
1
C780
C781
PCIE_CRX_GTX_P13
PCIE_CRX_GTX_N13
<7>
<7>
AC29 AD27 PCIE_CRX_GTX_G_P12 0.1U_0402_10V6K 2 1 C782 PCIE_CRX_GTX_P12 <7>

AB28 AD26 PCIE_CRX_GTX_G_N12 0.1U_0402_10V6K 2 1 C783 PCIE_CRX_GTX_N12 <7>
U8F
AB30 AC25 PCIE_CRX_GTX_G_P11 0.1U_0402_10V6K 2 1 C784 PCIE_CRX_GTX_P11 <7>

PCI EXPRESS INTERFACE

R928 1 2 10K_0402_5% AA31 AB25 PCIE_CRX_GTX_G_N11 0.1U_0402_10V6K 2 1 C785 PCIE_CRX_GTX_N11 <7>
LVDS CONTROL AB11 OPP@ R929 1 2 0_0402_5% D_INV_PWM <22>
VARY_BL R930 1 0_0402_5%
DIGON AB12 2 D_ENAVDD <21>
AA29 Y23 PCIE_CRX_GTX_G_P10 0.1U_0402_10V6K 2 1 C786 PCIE_CRX_GTX_P10 <7>
Y28 Y24 PCIE_CRX_GTX_G_N10 0.1U_0402_10V6K 2 1 C787 PCIE_CRX_GTX_N10 <7>
2 2
AH20 Y30 AB27 PCIE_CRX_GTX_G_P9 0.1U_0402_10V6K 2 1 C788 PCIE_CRX_GTX_P9 <7>

TXCLK_UP_DPF3P <7> PCIE_CTX_GRX_P9 PCIE_RX6P PCIE_TX6P
AJ19 W31 AB26 PCIE_CRX_GTX_G_N9 0.1U_0402_10V6K 2 1 C789 PCIE_CRX_GTX_N9 <7>
TXCLK_UN_DPF3N <7> PCIE_CTX_GRX_N9 PCIE_RX6N PCIE_TX6N
TXOUT_U0P_DPF2P AL21
AK20 W29 Y27 PCIE_CRX_GTX_G_P8 0.1U_0402_10V6K 2 1 C790 PCIE_CRX_GTX_P8 <7>
TXOUT_U0N_DPF2N <7> PCIE_CTX_GRX_P8 PCIE_RX7P PCIE_TX7P
V28 Y26 PCIE_CRX_GTX_G_N8 0.1U_0402_10V6K 2 1 C791 PCIE_CRX_GTX_N8 <7>
TXOUT_U1P_DPF1P AH22
TXOUT_U1N_DPF1N AJ21
V30 W24 PCIE_CRX_GTX_G_P7 0.1U_0402_10V6K 2 1 C792 PCIE_CRX_GTX_P7 <7>
AL23 U31 W23 PCIE_CRX_GTX_G_N7 0.1U_0402_10V6K 2 1 C793 PCIE_CRX_GTX_N7 <7>
TXOUT_U2P_DPF0P <7> PCIE_CTX_GRX_N7 PCIE_RX8N PCIE_TX8N
TXOUT_U2N_DPF0N AK22
AK24 U29 V27 PCIE_CRX_GTX_G_P6 0.1U_0402_10V6K 2 1 C794 PCIE_CRX_GTX_P6 <7>

TXOUT_U3P <7> PCIE_CTX_GRX_P6 PCIE_RX9P PCIE_TX9P
AJ23 T28 U26 PCIE_CRX_GTX_G_N6 0.1U_0402_10V6K 2 1 C795 PCIE_CRX_GTX_N6 <7>
TXOUT_U3N <7> PCIE_CTX_GRX_N6 PCIE_RX9N PCIE_TX9N
LVTMDP T30 U24 PCIE_CRX_GTX_G_P5 0.1U_0402_10V6K 2 1 C796 PCIE_CRX_GTX_P5 <7>

R31 U23 PCIE_CRX_GTX_G_N5 0.1U_0402_10V6K 2 1 C797 PCIE_CRX_GTX_N5 <7>
TXCLK_LP_DPE3P AL15 D_LVDS_ACLK+ <22>
TXCLK_LN_DPE3N AK14 D_LVDS_ACLK- <22>
R29 T26 PCIE_CRX_GTX_G_P4 0.1U_0402_10V6K 2 1 C798 PCIE_CRX_GTX_P4 <7>
AH16 D_LVDS_A0+ <22> P28 T27 PCIE_CRX_GTX_G_N4 0.1U_0402_10V6K 2 1 C799 PCIE_CRX_GTX_N4 <7>
TXOUT_L0P_DPE2P <7> PCIE_CTX_GRX_N4 PCIE_RX11N PCIE_TX11N
TXOUT_L0N_DPE2N AJ15 D_LVDS_A0- <22>
AL17 D_LVDS_A1+ <22> P30 T24 PCIE_CRX_GTX_G_P3 0.1U_0402_10V6K 2 1 C800 PCIE_CRX_GTX_P3 <7>
TXOUT_L1P_DPE1P <7> PCIE_CTX_GRX_P3 PCIE_RX12P PCIE_TX12P
AK16 D_LVDS_A1- <22> N31 T23 PCIE_CRX_GTX_G_N3 0.1U_0402_10V6K 2 1 C801 PCIE_CRX_GTX_N3 <7>
TXOUT_L1N_DPE1N <7> PCIE_CTX_GRX_N3 PCIE_RX12N PCIE_TX12N
TXOUT_L2P_DPE0P AH18 D_LVDS_A2+ <22>

AJ17 D_LVDS_A2- <22> N29 P27 PCIE_CRX_GTX_G_P2 0.1U_0402_10V6K 2 1 C802 PCIE_CRX_GTX_P2 <7>
TXOUT_L2N_DPE0N <7> PCIE_CTX_GRX_P2 PCIE_RX13P PCIE_TX13P
M28 P26 PCIE_CRX_GTX_G_N2 0.1U_0402_10V6K 2 1 C803 PCIE_CRX_GTX_N2 <7>
TXOUT_L3P AL19
TXOUT_L3N AK18
M30 P24 PCIE_CRX_GTX_G_P1 0.1U_0402_10V6K 2 1 C804 PCIE_CRX_GTX_P1 <7>
L31 P23 PCIE_CRX_GTX_G_N1 0.1U_0402_10V6K 2 1 C805 PCIE_CRX_GTX_N1 <7>
216-0749001 A11 M93-S3 FCBGA631 L29 M27 PCIE_CRX_GTX_G_P0 0.1U_0402_10V6K 2 1 C806 PCIE_CRX_GTX_P0 <7>
K30 N26 PCIE_CRX_GTX_G_N0 0.1U_0402_10V6K 2 1 C807 PCIE_CRX_GTX_N0 <7>
3 <7> PCIE_CTX_GRX_N0 PCIE_RX15N PCIE_TX15N 3
PA@
CLOCK
10/30 <12> CLK_PCIE_VGA AK30
AK32
PCIE_REFCLKP
<12> CLK_PCIE_VGA# PCIE_REFCLKN
CALIBRATION
Y22 R931 1 2 1.27K_0402_1%
02/03 AMD PCIE_CALRP
R932 1 2 N10 AA22 R933 1 2 2K_0402_1% +1.1VSDGPU
@ 10K_0402_5% NC_PWRGOOD PCIE_CALRN
<14,31,32> PLT_RST# DIS@ R934 1 2 0_0402_5% VGA_PERST# AL27 PERSTB

SG@ R935 1 2 0_0402_5%
<14> DGPU_HOLD_RST#
216-0749001 A11 M93-S3 FCBGA631
PA@
4 4

PEG & LVDS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom Calpella DIS LA-4107P 1.0
A B C D E
5 4 3 2 1
U8C
+1.8VSDGPU
D MDA0 K27 K17 MAA0 R1053 1 2 @ 10K_0402_5% VRAM_ID0 D

MDA[0..63] DQA_0 MAA_0 VRAM_ID0 <26>
MDA1 J29 J20 MAA1 R1054 1 2 10K_0402_5%
<29> MDA[0..63] MDA2 DQA_1 MAA_1 MAA2 R1055 1 VRAM_ID1
H30 DQA_2 MAA_2 H23 2 @ 10K_0402_5%
VRAM_ID1 <26>
MDA3 H32 G23 MAA3 R1056 1 2 10K_0402_5%
MDA4 DQA_3 MAA_3 MAA4 R1057 1 10K_0402_5% VRAM_ID2
G29 G24 2
MEMORY INTERFACE
DQA_4 MAA_4 VRAM_ID2 <26>
MDA5 F28 H24 MAA5 R1058 1 2 @ 10K_0402_5%
MDA6 DQA_5 MAA_5 MAA6 MAA[12..0]
F32 DQA_6 MAA_6 J19 MAA[12..0] <29>
+1.5VSDGPU MDA7 F30 K19 MAA7
MDA8 DQA_7 MAA_7 MAA8 A_BA[2..0]
C30 DQA_8 MAA_8 J14 A_BA[2..0] <29>
MDA9 F27 K14 MAA9
DQA_9 MAA_9
1
MDA10 A28 J11 MAA10
R936 MDA11 DQA_10 MAA_10 MAA11
C28 DQA_11 MAA_11 J13
100_0402_1% 11/07 MDA12 E27 H11 MAA12
MDA13 DQA_12 MAA_12 A_BA2
G26 DQA_13 MAA_13/BA2 G11
MDA14 D26 J16 A_BA0
2
MDA15 DQA_14 MAA_14/BA0 A_BA1

F25 DQA_15 MAA_15/BA1 L15
+VDD_MEM15_REFD MDA16 A25 VRAM_ID0 VRAM_ID1 VRAM_ID2
DQA_16 DQMA#[7..0] <29>
MDA17 C25 E32 DQMA#0
MDA18 DQA_17 DQMA_0 DQMA#1
1 E25 DQA_18 DQMA_1 E30 Hynix Orion die H5TQ1G63BFR-12C
1
C1087 MDA19 DQMA#2 SA000032400 800MHz

R937 0.1U_0402_10V6K MDA20
D24
E23
DQA_19 DQMA_2 A21
C21 DQMA#3
0 0 0
100_0402_1% MDA21 DQA_20 DQMA_3 DQMA#4
F23 E13 Samsung E die K4W1G1646E-HC12
2 MDA22 D22
DQA_21
DQA_22
DQMA_4
DQMA_5 D12 DQMA#5 * SA000035700 800MHz 0 0 1
MDA23 F21 E3 DQMA#6
2
MDA24 DQA_23 DQMA_6 DQMA#7

E21 DQA_24 DQMA_7 F4 Qimonda IDGH1G-04A1F1C-16X
MDA25 D20 SA000030800
MDA26 F19
DQA_25
H28 QSA0 QSA[7..0] <29> 0 1 0
MDA27 DQA_26 RDQSA_0 QSA1
A19 DQA_27 RDQSA_1 C27
MDA28 D18 A23 QSA2 TBD
C MDA29 F17
DQA_28 RDQSA_2
E19 QSA3
0 1 1 C
+1.5VSDGPU MDA30 DQA_29 RDQSA_3 QSA4
A17 DQA_30 RDQSA_4 E15
MDA31 C17 D10 QSA5 TBD
MDA32 E17
DQA_31 RDQSA_5
D6 QSA6
1 0 0
DQA_32 RDQSA_6
1
MDA33 D16 G5 QSA7

DQA_33 RDQSA_7 QSA#[7..0] <29>
R938 MDA34 TBD
100_0402_1% 11/07 MDA35
F15
A15
DQA_34
H27 QSA#0
1 0 1
MDA36 DQA_35 W DQSA_0 QSA#1
D14 DQA_36 W DQSA_1 A27
MDA37 QSA#2 TBD
F13 C23 1 1 0
2

A13 DQA_38 W DQSA_3 C19
+VDD_MEM15_REF1 MDA39 C13 C15 QSA#4
E11 DQA_40 W DQSA_5 E9 TBD 1 1 1
1 MDA41 A11 C5 QSA#6
DQA_41 W DQSA_6
1
C1088 MDA42 C11 H4 QSA#7

R939 0.1U_0402_10V6K MDA43 DQA_42 W DQSA_7
F11 DQA_43
100_0402_1% MDA44 A9 L18 ODTA0
2 DQA_44 ODTA0 ODTA0 <29>
MDA45 C9 K16 ODTA1
DQA_45 ODTA1 ODTA1 <29>
MDA46 F9
2
MDA47 DQA_46 CLKA0

D8 DQA_47 CLKA0 H26 CLKA0 <29>
MDA48 E7 H25 CLKA0#
DQA_48 CLKA0B CLKA0# <29>
MDA49 A7
MDA50 DQA_49 CLKA1
C7 DQA_50 CLKA1 G9 CLKA1 <29>
MDA51 F7 H9 CLKA1#
DQA_51 CLKA1B CLKA1# <29>
MDA52 A5
MDA53 DQA_52 RASA0#
E5 DQA_53 RASA0B G22 RASA0# <29>
MDA54 C3 G17 RASA1#
DQA_54 RASA1B RASA1# <29>
MDA55 E1
MDA56 DQA_55 CASA0#
G7 DQA_56 CASA0B G19 CASA0# <29>
MDA57 G6 G16 CASA1#
B DQA_57 CASA1B CASA1# <29> B
MDA58 G1
MDA59 DQA_58 CSA0#_0
G3 DQA_59 CSA0B_0 H22 CSA0#_0 <29>
MDA60 J6 J22
MDA61 DQA_60 CSA0B_1
J1 DQA_61
MDA62 J3 G13 CSA1#_0
+1.5VSDGPU +1.5VSDGPU DQA_62 CSA1B_0 CSA1#_0 <29>
MDA63 J5 K13
DQA_63 CSA1B_1
+VDD_MEM15_REFD K26 K20 CKEA0
+VDD_MEM15_REF1 J26 MVREFDA CKEA0 CKEA1 CKEA0 <29>
MVREFSA CKEA1 J17 CKEA1 <29>
1
@ R940 1 2 243_0402_1% J25 G25 WEA0#

NC_MEM_CALRN0 W EA0B WEA0# <29>
R941 @ R942 1 2 243_0402_1% K7 H10 WEA1#
NC_MEM_CALRN1 W EA1B WEA1# <29>
4.7K_0402_5%
R943 1 2 243_0402_1% J8 AB16
@ R944 1 MEM_CALRP1 RSVD#1 11/11 HP
2 243_0402_1% K25 G14
2
NC_MEM_CALRP0 RSVD#2
RSVD#3 G20
L10 DRAM_RST
<29> DRAM_RST#
K8 CLKTESTA
L7 CLKTESTB
2
1
1
@ R945 R946 R947 216-0749001 A11 M93-S3 FCBGA631

4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5%
2
PA@
1
C1089
2
2200P_0402_25V7K
A A

Memory Interface
5 4 3 2 1
5 4 3 2 1
U8B
CONFIGURATION STRAPS RECOMMENDED SETTINGS
0= DO NOT INSTALL RESISTOR
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, 1 = INSTALL 10K RESISTOR
M93-S3/M92-S2 AF2 HDMI_C_CLK+ X = DESIGN DEPENDANT
TXCAP_DPA3P HDMI_C_CLK+ <23>
AE9 AF4 HDMI_C_CLK-
HDMI_C_CLK- <23>
THEY MUST NOT CONFLICT DURING RESET NA = NOT APPLICABLE
DVCNTL_0/ DVPDATA_18 TXCAM_DPA3N
L9
DVCNTL_1 / NC HDMI_C_TX0+
N9 DVCNTL_2 / NC TX0P_DPA2P AG3 HDMI_C_TX0+ <23>
AE8 DPA AG5 HDMI_C_TX0- STRAPS PIN DESCRIPTION OF DEFAULT SETTINGS RECOMMENDED SETTINGS
DVDATA_12 / DVPDATA_16 TX0M_DPA2N HDMI_C_TX0- <23>
VRAM_ID0 AD9 HDMI
<25>
<25>
VRAM_ID0
VRAM_ID2
VRAM_ID2 AC10
DVDATA_11 / DVPDATA_20
DVDATA_10 / DVPDATA_22 TX1P_DPA1P AH3 HDMI_C_TX1+
HDMI_C_TX1+ <23>
STRAPS +3VS_VGA
AD7 AH1 HDMI_C_TX1- TX_PWRS_ENB GPIO0 PCIE FULL TX OUTPUT SWING 0
AC8 DVDATA_8 / DVPDATA_14 Add via
AC7 AK3 HDMI_C_TX2+
DVDATA_7 / DVPCNTL_0 TX2P_DPA0P HDMI_C_TX2+ <23>
AB9 AK1 HDMI_C_TX2- TX_DEEMPH_EN GPIO1 PCIE TRANSMITTER DE-EMPHASIS ENABLED 0
AB8 GPU_GPIO0 @ R1187 2 1 10K_0402_5%
DVDATA_5 / DVPDATA_6 @ R1188
AB7 DVDATA_4 DVPDATA_4 TXCBP_DPB3P AK5 GPU_GPIO1 2 1 10K_0402_5%
AB4 AM3 BIF_GEN2_EN_A GPIO2 PCIE GNE2 ENABLED 0
VRAM_ID1 DVDATA_3 / DVPDATA_19 TXCBM_DPB3N
D <25> VRAM_ID1 AB2 DVDATA_2 / DVPDATA_21 D
Y8 DVDATA_1 / DVPDATA_2 TX3P_DPB2P AK6
L46 Y7 AM5 GPIO8 0
+DPC_PVDD DVDATA_0 / DVPDATA_0 TX3M_DPB2N
+1.8VSDGPU 2 1 DPB
BLM15BD121SN1D_0402 AJ7
TX4P_DPB1P R954
GPU_GPIO11 1 10K_0402_5% BIF_VGA DIS GPIO9 VGA ENABLED 0
C1090
C1091
C1092
DVO AH6 2
10U_0603_6.3V6M
0.1U_0402_10V6K
1U_0402_6.3V4Z
TX4M_DPB1N
1 1 1
TX5P_DPB0P AK8
AL7 GPIO21 0
TX5M_DPB0N
2 2 2 R957
M93-S3/M92-S2 D_CRT_HSYNC 2 1 10K_0402_5%
+DPC_PVDD W6 D_CRT_VSYNC R958 2 1 10K_0402_5% BIOS_ROM_EN GPIO_22_ROMCSB ENABLE EXTERNAL BIOS ROM 0
DPC_PVDD / DVPDATA_11
V6 DPC_PVSS / GND M92-S2/M93-S3
V4 D_BLUE 1 2
DVPDATA_3/TXCCP_DPC3P R71 150_0402_1% ROMIDCFG(2:0) GPIO[13:11] SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT 001
AC6 DPC_VDD18#1/DVPDAT10 DVPCNTL_2/TXCCM_DPC3N U5
L47 AC5 D_GREEN 1 2
+DPC_VDD10 DPC_VDD18#2/DVPDAT23 R72 150_0402_1%
+1.1VSDGPU 2 1 W3
BLM15BD121SN1D_0402 +DPC_VDD10 DVPDATA_7 / TX0P_DPC2P D_RED VIP_DEVICE_STRAP_ENA V2SYNC IGNORE VIP DEVICE STRAPS 0
AA5 V2 1 2
10U_0603_6.3V6M
DPC_VDD10#1/DVPDAT15 DVPDATA_1 / TX0M_DPC2N R74 150_0402_1%

C1093
C1094
C1095
AA6
0.1U_0402_10V6K
1U_0402_6.3V4Z
DPC_VDD10#2/DVPDAT17
1 1 1 DVPCNTL_MV1 / TX1P_DPC1P Y4
W5 Place the 3 resistors close to U8 H2SYNC 0
DVPDATA_9 / TX1M_DPC1N @ R961
U1 AA3 0_0402_5%
2 2 2 DPC_VSSR#1 / DVPCLK DVPDATA_13 / TX2P_DPC0P GENERICC 0
W1 DPC_VSSR#2 / DVPDAT5 DVPCNTL_1 / TX2M_DPC0N Y2 1 2 H_THERMTRIP# <6,14>
U3 DPC_VSSR#3 / GND
Y6 AA12 R1059 1 2 150_0402_1% AUD[1] AUD[0]
DPC_VSSR#4 / GND VDDR4 / DPCD_CALR AUD[1] HSYNC 0 0 No audio function
AA1 DPC_VSSR#5/ DVPCNTL_MV0
0 1 Audio for DisplayPort and HDMI if dongle is detected 11
06/05 AMD AUD[0] VSYNC 1 0 Audio for DisplayPort only
DPC 1 1 Audio for both DisplayPort and HDMI
1
D
Add via
GPU_CTF 2 Q83
G 2N7002_SOT23-3
D_EDID_CLK R1 S
<22> D_EDID_CLK
AMD RESERVED CONFIGURATION STRAPS
3
+3VS_VGA D_EDID_DATA SCL
<22> D_EDID_DATA R3 SDA I2C
@ R1189 1 2 10K_0402_5% AC_PRE_VGA AM26 ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
GENERAL PURPOSE I/O R D_RED <22>
RB AK26
01/15 HP GPU_GPIO0 U6 THEY MUST NOT CONFLICT DURING RESET
R964 GPIO_0
1 2 4.7K_0402_5% D_EDID_CLK GPU_GPIO1 U10 GPIO_1 G AL25 D_GREEN <22>
C R965 1 2 4.7K_0402_5% D_EDID_DATA GPU_GPIO2 T10 AJ25 C
@ R1190 T77 GPIO_2 GB
1 2 10K_0402_5% GPU_VID1
<12> THERM_DAT_GPU
THERM_DAT_GPU U8 GPIO_3_SMBDATA
H2SYNC GENERICC
@ R1191 1 2 10K_0402_5% GPU_VID0 THERM_CLK_GPU U7 AH24
<12> THERM_CLK_GPU GPIO_4_SMBCLK B D_BLUE <22>
SG@ D42 1 2 AC_PRE_VGA T9 AG25
<13,39> EC_ACIN GPIO_5_AC_BATT BB
RB751V_SOD323 T8 DAC1 PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED,
T75 GPIO_6
<22> DGPU_BKL_EN T7@ GPIO_7_BLON HSYNC AH26 D_CRT_HSYNC D_CRT_HSYNC <22>
GPU_GPIO8 P10 AJ27 D_CRT_VSYNC
D_CRT_VSYNC <22>
THEY MUST NOT CONFLICT DURING RESET
GPU_GPIO9 GPIO_8_ROMSO VSYNC
P4 GPIO_9_ROMSI
1K_0402_5% T79
2 1 R331 TESTEN P2 GPIO_10_ROMSCK
T76
GPU_GPIO11 N6@ GPIO_11 RSET AD22 R974 1 2 499_0402_1% GPIO21_BB_EN
GPU_GPIO12 N5 (1.8V@70mA AVDD) L48
T80 GPU_GPIO13 GPIO_12 +AVDD
N3 GPIO_13 AVDD AG24 1 2 +1.8VSDGPU
T81 BLM15BD121SN1D_0402
Y9 GPIO_14_HPD2 AVSSQ AE22
1 2 GPU_CTF GPU_VID0 N1 L49
0.1U_0402_10V6K
<51> GPU_VID0 GPIO_15_PWRCNTL_0
R976 @ 10K_0402_5% 27M_SSC +VDD1DI
C1096
C1097
C1098
M4 AE23 (1.8V@45mA VDD1DI) 1 2
10U_0603_6.3V6M
1U_0402_6.3V4Z
<19> 27M_SSC GPIO_16_SSIN VDD1DI +1.8VSDGPU
R6 AD23 BLM15BD121SN1D_0402 1 1 1
02/01 HP GPIO_17_THERMAL_INT VSS1DI
W10
10U_0603_6.3V6M
0.1U_0402_10V6K
GPU_CTF GPIO_18_HPD3
C1099
C1100
C1101
M2 M92-S2/M93-S3
1U_0402_6.3V4Z
GPU_VID1 GPIO_19_CTF
<51> GPU_VID1 P8 GPIO_20_PWRCNTL_1 R2 / NC AM12 1 1 1 2 2 2
<28> GPIO21_BBEN P7 GPIO_21_BB_EN R2B / NC AK12
N8 GPIO_22_ROMCSB
GPIO23_CLKREQB N7 AL11
T82 GPIO_23_CLKREQB G2 / NC 2 2 2
T11 GPIO_29 G2B / NC AJ11
10/24 ATI change R11/T11 to VSS R11 GPIO_30
B2 / NC AK10
GPIO24_TRSTB L6 AL9
T83 GPIO25_TDI JTAG_TRSTB B2B / NC
L5 JTAG_TDI
T84 GPIO26_TCK L3 JTAG_TCK
L50 T85 GPIO27_TMS L1 AH12
+1.8VSDGPU 2 1
300mA +DPLL_PVDD T86 GPIO28_TDO K4
JTAG_TMS
DAC2
C / NC
AM10
BLM15BD121SN1D_0402 T87 TESTEN JTAG_TDO Y / NC
AF24 AJ9
10U_0603_6.3V6M
TESTEN COMP / NC
C1102
C1103
C1104
0.1U_0402_10V6K
1U_0402_6.3V4Z
1 1 1 AB13 GENERICA
W8 AL13 HSYNC_DAC2 T88
+1.8VSDGPU GENERICB H2SYNC VSYNC_DAC2
W9 GENERICC V2SYNC AJ13
W7 T89
2 2 2 GENERICD
AD10 GENERICE_HPD4
VDD2DI / NC AD19
1
<23> HDMI_DET AC14 HPD1 VSS2DI / NC AC19

R977
B B
499_0402_1%
L51 A2VDD / NC AE20 09/22 HP

300mA
2
+1.1VSDGPU 2 1 +DPLL_VDDC AE17

BLM15BD121SN1D_0402 +VREFG_GPU A2VDDQ / NC
AC16
10U_0603_6.3V6M
VREFG
C1105
C1106
C1107
AE19
0.1U_0402_10V6K
1U_0402_6.3V4Z
A2VSSQ
C1108
1 1 1
0.1U_0402_10V6K
1
1
R978
249_0402_1% R2SET / NC AG13 SG@ R979 1 2 715_0402_1% VGA Thermal Sensor ADM1032ARMZ
2 2 2 Closed to U8 +3VS_VGA
2 DDC/AUX
CRT
2
DDC1CLK AE6 D_CRT_DDC_CLK <20>

PLL/CLOCK AE5 2
DDC1DATA D_CRT_DDC_DATA <20>
+DPLL_PVDD AF14 @ C36
DPLL_PVDD
2
AE14 DPLL_PVSS AUX1P AD2
AD4 0.1U_0402_16V4Z @ R47
AUX1N 1
9/11 Use Y7 for VGA 27MHz 10K_0402_5%
+DPLL_VDDC AD14 AC11 HDMICLK_VGA @ U16
DPLL_VDDC DDC2CLK HDMIDAT_VGA HDMICLK_VGA <23> THERM_CLK_GPU
AC13 1 8
1
DDC2DATA HDMIDAT_VGA <23> VDD SCLK
R12 1 2 1M_0402_5% @ R980 2 1 82.5_0402_1% XTALIN AM28 AD13 VGA_THERMDA 2 7 THERM_DAT_GPU
<19> 27M_CLK XTALIN AUX2P D+ SDATA
XTALOUT AK28 AD11 @ C37
XTALOUT AUX2N
1
Y7 1 2 VGA_THERMDC 3 6 THERM_SCI#
27MHZ_18PF_X3S027000FI1H-X @ R981 D- ALERT#
DDCCLK_AUX5P AE16
100_0402_1% AD16 2200P_0402_50V7K THERM#_VGA 4 5
XTALIN XTALOUT DDCDATA_AUX5N THERM# GND
1 3
2 4 AC1 @ R46
2
VGA_THERMDA DDC6CLK ADM1032ARMZ REEL_MSOP8

1 1 T4 DPLUS DDC6DATA AC3 +3VS_VGA 1 2
VGA_THERMDC T2 THERMAL
C1109 C1275 DMINUS 10K_0402_5%
DDCCLK_AUX3P AD20
18P_0402_50V8J 18P_0402_50V8J AC20
2 2 L52 DDCDATA_AUX3N
R5 TS_FDO
+1.8VSDGPU 2 1+TSVDD AD17 TSVDD NC#1 AB22
BLM15BD121SN1D_0402 AC17 AC22
10U_0603_6.3V6M
0.1U_0402_10V6K
TSVSS NC#2
C1111
C1112
C1113
1U_0402_6.3V4Z
1 1 1
A A
2 2 2
216-0749001 A11 M93-S3 FCBGA631
PA@

HDMI, MSIC & Thermal
5 4 3 2 1
5 4 3 2 1
D D
U8G
+1.8VSDGPU
+DPE_VDD18 DP E/F POWER DP A/B POWER
L53
2 1
0.2A AG15 AE11
BLM15BD121SN1D_0402 DPE_VDD18#1 NC_DPA_VDD18#1 12/2 AMD
AG16 DPE_VDD18#2 NC_DPA_VDD18#2 AF11
C1114
C1115
C1116
+1.1VSDGPU
10U_0603_6.3V6M
0.1U_0402_10V6K
1U_0402_6.3V4Z
1 1 1 +DPF_VDD10
L54
AG20 AF6 +DPA_VDD10
0.2A 2 1
0.17A DPE_VDD10#1 DPA_VDD10#1
C1117
C1118
C1119
AG21 AF7 BLM15BD121SN1D_0402
10U_0603_6.3V6M
0.1U_0402_10V6K
1U_0402_6.3V4Z
2 2 2 DPE_VDD10#2 DPA_VDD10#2
1 1 1
AG14 DPE_VSSR#1 DPA_VSSR#1 AE1

AH14 DPE_VSSR#2 DPA_VSSR#2 AE3
AM14 AG1 2 2 2
DPE_VSSR#3 DPA_VSSR#3
AM16 DPE_VSSR#4 DPA_VSSR#4 AG6
AM18 DPE_VSSR#5 DPA_VSSR#5 AH5
+1.1VSDGPU
+DPE_VDD18
L55 12/2 AMD
2 1 +DPF_VDD10
0.11A AF16
AG17
DPF_VDD18#1 NC_DPB_VDD18#1 AE13
AF13
BLM15BD121SN1D_0402 DPF_VDD18#2 NC_DPB_VDD18#2 +1.1VSDGPU
C1120
C1121
C1122
10U_0603_6.3V6M
0.1U_0402_10V6K
1U_0402_6.3V4Z
+DPF_VDD10 L56
1 1 1
+VPB_VDD10
0.2A
C
0.17A AF22
AG22
DPF_VDD10#1 DPB_VDD10#1 AF8
AF9
2 1
BLM15BD121SN1D_0402 C
0.2A
10U_0603_6.3V6M
0.1U_0402_10V6K
1U_0402_6.3V4Z
DPF_VDD10#2 DPB_VDD10#2
C1123
C1124
C1125
2 2 2
1 1 1
AF23 DPF_VSSR#1 DPB_VSSR#1 AF10
AG23 DPF_VSSR#2 DPB_VSSR#2 AG9
AM20 DPF_VSSR#3 DPB_VSSR#3 AH8
AM22 AM6 2 2 2
DPF_VSSR#4 DPB_VSSR#4
AM24 AM8
DPF_VSSR#5 DPB_VSSR#5
+DPE_PVDD 1 2 AF17 AE10 R983 1 2 150_0402_1%

+1.8VSDGPU R982 150_0402_1% DPEF_CALR DPAB_CALR +1.8VSDGPU
L57 L58
2 1
0.02A AG18 DP PLL POWER AG8 +DPA_PVDD
0.02A 2 1
BLM15BD121SN1D_0402 DPE_PVDD DPA_PVDD BLM15BD121SN1D_0402
AF19 AG7
10U_0603_6.3V6M
10U_0603_6.3V6M
0.1U_0402_10V6K
0.1U_0402_10V6K
1U_0402_6.3V4Z
1U_0402_6.3V4Z
DPE_PVSS DPA_PVSS
C1126
C1127
C1128
C1129
C1130
C1131
1 1 1 1 1 1
AG19 AG10
NC_DPF_PVDD DPB_PVDD
AF20 AG11
2 2 2 NC_DPF_PVSS DPB_PVSS 2 2 2
216-0749001 A11 M93-S3 FCBGA631

+1.8VSDGPU
PA@
L59
B +DPB_PVDD
0.02A 2 1
B
BLM15BD121SN1D_0402
10U_0603_6.3V6M
0.1U_0402_10V6K
1U_0402_6.3V4Z
C1132
C1133
C1134
1 1 1
2 2 2
A A

DPX POWER
5
4
3 2
Date: Monday, November 09, 2009 Sheet

1
27 of 55
1.0
5 4 3 2 1
+1.5VSDGPU
2.2A
C1140
C1141
C1142
C1143
C1144
C1145
C1146
C1147
C1148
U8E
10U_0603_6.3V6M
10U_0603_6.3V6M
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1 1 1 1 1 1 1 1 1
AA27 A3
2 2 2 2 2 2 2 2 2 PCIE_VSS#1 GND#1
AB24 A30
+1.8VSDGPU PCIE_VSS#2 GND#2
AB32 AA13
PCIE_VSS#3 GND#3
0.5A AC24
AC26
PCIE_VSS#4 GND#4
AA16
AB10
U8D +PCIE_GDDR PCIE_VSS#5 GND#5
D AC27 AB15 D
+1.5VSDGPU PCIE_VSS#6 GND#6
10U_0603_6.3V6M
AD25 AB6
PCIE_VSS#7 GND#7
C1149
C1150
C1151
C1152
C1153
MEM I/O
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
AD32 AC9
PCIE PCIE_VSS#8 GND#8
1 1 1 1 1 AE27 AD6
PCIE_VSS#9 GND#9
H13 AB23 AF32 AD8
VDDR1#1 PCIE_VDDR#1 PCIE_VSS#10 GND#10
C1154
C1155
C1156
C1157
H16 AC23 AG27 AE7
+VDDC_CT VDDR1#2 PCIE_VDDR#2 PCIE_VSS#11 GND#11
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1 1 1 1 H19 AD24 AH32 AG12
VDDR1#3 PCIE_VDDR#3 2 2 2 2 2 PCIE_VSS#12 GND#12
J10 AE24 K28 AH10
0.136A J23
J24
VDDR1#5 PCIE_VDDR#5
AE25
AE26
K32
L27
PCIE_VSS#14 GND#14
AH28
B10
+1.8VSDGPU 2 2 2 2 VDDR1#6 PCIE_VDDR#6 PCIE_VSS#15 GND#15
C1158
C1159
C1160
C1161
J9 AF25 M32 B12
VDDR1#7 PCIE_VDDR#7 +1.1VSDGPU PCIE_VSS#16 GND#16
10U_0603_6.3V6M
0.1U_0402_10V6K
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1 1 1 1 K10 AG26 N25 B14
K23 2A N27 B16
VDDR1#9 PCIE_VSS#18 GND#18
K24 P25 B18
VDDR1#10 +PCIE_VDDC PCIE_VSS#19 GND#19
K9 L23 P32 B20
2 2 2 2 VDDR1#11 PCIE_VDDC#1 PCIE_VSS#20 GND#20
L11 L24 R27 B22
VDDR1#12 PCIE_VDDC#2 PCIE_VSS#21 GND#21
C1162
C1163
C1164
C1165
C1166
10U_0603_6.3V6M
1U_0402_6.3V4Z
L12 L25 T25 B24
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
L13 L26 1 1 1 1 1 T32 B26
L20 M22 U25 B6
L21 N22 U27 B8
L22 N23 V32 C1
+3VS_VGA VDDR1#17 PCIE_VDDC#7 2 2 2 2 2 PCIE_VSS#26 GND#26
N24 W25 C32
PCIE_VDDC#8 PCIE_VSS#27 GND#27
0.06A R22 W26 E28
T22 W27 F10
+VDDC_CT LEVEL PCIE_VDDC#10 PCIE_VSS#29 GND#29
U22 Y25 F12
PCIE_VDDC#11 +VGA_CORE PCIE_VSS#30 GND#30
C1167
C1168
C1169
C1170 TRANSLATION V22 Y32 F14

10U_0603_6.3V6M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1 1 1 1 AA20 F16
VDD_CT#1 GND#32
AA21 F18
VDD_CT#2 GND#33
AB20 AA15 F2
VDD_CT#3 CORE VDDC#1 GND#34
AB21 N15 F20
2 2 2 2 VDD_CT#4 VDDC#2 GND#35
C1171
C1172
C1174
C1175
C1176
C1177
C1178
C1179
C1180
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
N17 M6 F22
VDDC#3 GND#56 GND#36
M93-S3/M92-S2 VDDC#4
R13 1 1 1 1 1 1 1 1 1 N11
GND#57 GND#37
F24
POWER
R16 N12 F26
AA17 R18 N13 F6
C VDDR3#1 VDDC#6 GND#59 GND#39 C
AA18 I/O R21 N16 F8
AB17
AB18
VDDR3#2
VDDR3#3
VDDR3#4
VDDC#7
VDDC#8
VDDC#9
T12
T15
2 2 2 2 2 2 2 2 2 N18
N21
GND#60
GND#61
GND#62
GND GND#40
GND#41
GND#42
G10
G27
T17 P6 G31
V12 T20 P9 G8
+VDDR4 VDDR4#1 / VDDR5 VDDC#11 +VGA_CORE GND#64 GND#44
Y12 U13 R12 H14
+VDDR4 VDDR4#2 VDDC#12 GND#65 GND#45
+1.8VSDGPU U12 U16 R15 H17
VDDR4#3 / VDDR5 VDDC#13 GND#66 GND#46
U18 R17 H2
C1181
C1182
C1183
10U_0603_6.3V6M
0.1U_0402_10V6K
1U_0402_6.3V4Z
AA11 U21 R20 H20

NC#1 / VDDR4 VDDC#15 GND#68 GND#48
C1184
C1185
C1186
C1187
C1188
C1189
C1191
C1192
C1193
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1 1 1 Y11 V15 T13 H6
01/12 AMD DVCLK / VDDR4 VDDC#16 GND#69 GND#49
V17 1 1 1 1 1 1 1 1 1 T16 J27
V11 V20 T18 J31
NC#3 / VDDR5 VDDC#18 GND#71 GND#51
U11 V21 T21 K11
2 2 2 12/02 AMD NC#4 / VDDR5 VDDC#19 GND#72 GND#52
Y13 T6 K2
VDDC#20 2 2 2 2 2 2 2 2 2 GND#73 GND#53
Y16 U15 K22
Y18 U17 K6
+1.5VSDGPU VDDC#22 GND#75 GND#55
0.04A Y21 U20
L60 MEM CLK VDDC#23 GND#76
U9
+VDDRHA GND#77
1 2 L17 V13
BLM15BD121SN1D_0402 VDDRHA GND#78
V16
ISOLATED GND#79
2 1 L16 V18
VSSRHA CORE I/O GND#80
2A Y10
+1.8VSDGPU C1194 GND#81
M13 +VGA_CORE Y15
L61 1U_0402_6.3V4Z PLL VDDCI#1 GND#82
M15 Y17 A32
VDDCI#2 GND#83 VSS_MECH#1
C1195
C1197
C1198
+PCIE_PVDD
10U_0603_6.3V6M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1 2 AM30 M16 Y20 AM1
PCIE_PVDD VDDCI#3 GND#84 VSS_MECH#2
C1196
BLM15BD121SN1D_0402
1U_0402_6.3V4Z
M17 1 1 1 AM32
VDDCI#4 VSS_MECH#3
C1199
C1200
C1201
10U_0603_6.3V6M
0.1U_0402_10V6K
1U_0402_6.3V4Z
M18 1
VDDCI#5
1 1 1 L8 M20
NC_MPV18 VDDCI#6
M21
11/07 VDDCI#7 2 2 2
N20
VDDCI#8 2
H7
2 2 2 NC_SPV18 216-0749001 A11 M93-S3 FCBGA631
+SPV10 H8
B +VGA_CORE SPV10 B
PA@
L62
0.035A J7
SPVSS
1 2
MCK1608471YZF 0603
C1202
C1203
C1204
BACK BIAS
10U_0603_6.3V6M
0.1U_0402_10V6K
1U_0402_6.3V4Z
M11 Q84 +3VS

1 1 1 BBP#1
M12 +3VS_VGA SI2301BDS_SOT23
+BBP BBP#2
C1205
C1206
0.1U_0402_10V6K
S
1U_0402_6.3V4Z
1 3
D
1
2 2 2
1 1
216-0749001 A11 M93-S3 FCBGA631 09/22 HP
2
R1252 09/17 soft start by HP
G
2
470_0402_5% +3VS R984
2 2 PA@
100K_0402_5%
2N7002DW-7-F_SOT363-6
2
R985
@ C1207 47K_0402_5%
1
3
2 1 1 2
+BBP 01/16 HP Q62B
@ R986 0.1U_0402_10V6K
1 2 5
0_0402_5% Q85
4
+VGA_CORE SI2301BDS_SOT23 +1.8VSDGPU
Q82A
S
1 6 1 3
D
2N7002DW-7-F_SOT363-6
2N7002DW-7-F_SOT363-6
G
D64
2
6
R990 @
1 2 +5VSDGPU 1 2 Q62A
<41> DGPU_PWR_EN#
3
100K_0402_5% R987 2 1 330K_0402_5% 2

<47> 1.1VS_POK
A Q82B A
2N7002DW-7-F_SOT363-6 RB751V_SOD323
1
<26> GPIO21_BBEN 5
1
1 2
4
R991
10K_0402_5% C1208
0.01U_0402_16V7K
2
Main Power
5 4 3 2 1
5 4 3 2 1
U10 U11 U12 U13
VREFC_A1 M9 E4 MDA20 VREFC_A2 M9 E4 MDA26 VREFC_A3 M9 E4 MDA38 VREFC_A4 M9 E4 MDA52

VREFD_Q1 VREFCA DQL0 MDA19 VREFD_Q2 VREFCA DQL0 MDA27 VREFD_Q3 VREFCA DQL0 MDA34 VREFD_Q4 VREFCA DQL0 MDA50
H2 VREFDQ DQL1 F8 H2 VREFDQ DQL1 F8 H2 VREFDQ DQL1 F8 H2 VREFDQ DQL1 F8
F3 MDA23 F3 MDA25 F3 MDA32 F3 MDA54
MAA0 DQL2 MDA18 MAA0 DQL2 MDA24 MAA0 DQL2 MDA39 MAA0 DQL2 MDA49
N4 A0 DQL3 F9 N4 A0 DQL3 F9 N4 A0 DQL3 F9 N4 A0 DQL3 F9
MAA1 P8 H4 MDA17 MAA1 P8 H4 MDA29 MAA1 P8 H4 MDA33 MAA1 P8 H4 MDA53
MAA2 A1 DQL4 MDA21 MAA2 A1 DQL4 MDA30 MAA2 A1 DQL4 MDA37 MAA2 A1 DQL4 MDA51
P4 A2 DQL5 H9 P4 A2 DQL5 H9 P4 A2 DQL5 H9 P4 A2 DQL5 H9
MAA3 N3 G3 MDA22 MAA3 N3 G3 MDA28 MAA3 N3 G3 MDA35 MAA3 N3 G3 MDA55
MAA4 A3 DQL6 MDA16 MAA4 A3 DQL6 MDA31 MAA4 A3 DQL6 MDA36 MAA4 A3 DQL6 MDA48
P9 A4 DQL7 H8 P9 A4 DQL7 H8 P9 A4 DQL7 H8 P9 A4 DQL7 H8
MAA5 P3 MAA5 P3 MAA5 P3 MAA5 P3
MAA6 A5 MAA6 A5 MAA6 A5 MAA6 A5
R9 A6 R9 A6 R9 A6 R9 A6
MAA7 R3 D8 MDA0 MAA7 R3 D8 MDA12 MAA7 R3 D8 MDA44 MAA7 R3 D8 MDA56
MAA8 A7 DQU0 MDA4 MAA8 A7 DQU0 MDA10 MAA8 A7 DQU0 MDA42 MAA8 A7 DQU0 MDA58
T9 C4 T9 C4 T9 C4 T9 C4
R4 C9 R4 C9 R4 C9 R4 C9
D MAA10 A9 DQU2 MDA6 MAA10 A9 DQU2 MDA11 MAA10 A9 DQU2 MDA40 MAA10 A9 DQU2 MDA61 D
L8 C3 L8 C3 L8 C3 L8 C3
MAA11 A10/AP DQU3 MDA3 MAA11 A10/AP DQU3 MDA13 MAA11 A10/AP DQU3 MDA45 MAA11 A10/AP DQU3 MDA63
R8 A8 R8 A8 R8 A8 R8 A8
N8 A3 N8 A3 N8 A3 N8 A3
MDA[0..63] A12 DQU5 MDA2 A12 DQU5 MDA14 A12 DQU5 MDA46 A12 DQU5 MDA57
T4 B9 T4 B9 T4 B9 T4 B9
<25> MDA[0..63] A13 DQU6 MDA5 A13 DQU6 MDA9 A13 DQU6 MDA41 A13 DQU6 MDA59
T8 A4 T8 A4 T8 A4 T8 A4
A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
M8 M8 M8 M8
A15/BA3 +1.5VSDGPU A15/BA3 +1.5VSDGPU A15/BA3 +1.5VSDGPU A15/BA3 +1.5VSDGPU
M3 B3 A_BA0 M3 B3 A_BA0 M3 B3 A_BA0 M3 B3

MAA[12..0] <25> A_BA0 BA0 VDD A_BA1 BA0 VDD A_BA1 BA0 VDD A_BA1 BA0 VDD
<25> MAA[12..0] <25> A_BA1 N9 D10 N9 D10 N9 D10 N9 D10
BA1 VDD A_BA2 BA1 VDD A_BA2 BA1 VDD A_BA2 BA1 VDD
<25> A_BA2 M4 G8 M4 G8 M4 G8 M4 G8
BA2 VDD BA2 VDD BA2 VDD BA2 VDD
VDD K3 VDD K3 VDD K3 VDD K3
VDD K9 VDD K9 VDD K9 VDD K9
VDD N2 VDD N2 VDD N2 VDD N2
J8 N10 CLKA0 J8 N10 J8 N10 CLKA1 J8 N10
<25> CLKA0 CK VDD CLKA0# CK VDD <25> CLKA1 CK VDD CLKA1# CK VDD
<25> CLKA0# K8 CK VDD R2 K8 CK VDD R2 <25> CLKA1# K8 CK VDD R2 K8 CK VDD R2
DQMA#[7..0] K10 R10 CKEA0 K10 R10 K10 R10 CKEA1 K10 R10
<25> DQMA#[7..0] <25> CKEA0 CKE/CKE0 VDD +1.5VSDGPU CKE/CKE0 VDD <25>
+1.5VSDGPU CKEA1 CKE/CKE0 VDD +1.5VSDGPU CKE/CKE0 VDD +1.5VSDGPU
K2 A2 ODTA0 K2 A2 K2 A2 ODTA1 K2 A2
<25> ODTA0 ODT/ODT0 VDDQ CSA0#_0 ODT/ODT0 VDDQ <25> ODTA1 ODT/ODT0 VDDQ CSA1#_0 ODT/ODT0 VDDQ
<25> CSA0#_0 L3 CS VDDQ A9 L3 CS VDDQ A9 <25> CSA1#_0 L3 CS VDDQ A9 L3 CS VDDQ A9
J4 C2 RASA0# J4 C2 J4 C2 RASA1# J4 C2
QSA[7..0] <25> RASA0# RAS VDDQ CASA0# RAS VDDQ <25> RASA1# RAS VDDQ CASA1# RAS VDDQ
<25> QSA[7..0] <25> CASA0# K4 CAS VDDQ C10 K4 CAS VDDQ C10 <25> CASA1# K4 CAS VDDQ C10 K4 CAS VDDQ C10
L4 D3 WEA0# L4 D3 L4 D3 WEA1# L4 D3
<25> WEA0# WE VDDQ WE VDDQ <25> WEA1# WE VDDQ WE VDDQ
VDDQ E10 VDDQ E10 VDDQ E10 VDDQ E10
VDDQ F2 VDDQ F2 VDDQ F2 VDDQ F2
QSA2 F4 H3 QSA3 F4 H3 QSA4 F4 H3 QSA6 F4 H3
QSA0 DQSL VDDQ QSA1 DQSL VDDQ QSA5 DQSL VDDQ QSA7 DQSL VDDQ
C8 DQSU VDDQ H10 C8 DQSU VDDQ H10 C8 DQSU VDDQ H10 C8 DQSU VDDQ H10
QSA#[7..0]
<25> QSA#[7..0]
DQMA#2 E8 A10 DQMA#3 E8 A10 DQMA#4 E8 A10 DQMA#6 E8 A10
DQMA#0 DML VSS DQMA#1 DML VSS DQMA#5 DML VSS DQMA#7 DML VSS
D4 DMU VSS B4 D4 DMU VSS B4 D4 DMU VSS B4 D4 DMU VSS B4
C C
VSS E2 VSS E2 VSS E2 VSS E2
VSS G9 VSS G9 VSS G9 VSS G9
QSA#2 G4 J3 QSA#3 G4 J3 QSA#4 G4 J3 QSA#6 G4 J3
QSA#0 DQSL VSS QSA#1 DQSL VSS QSA#5 DQSL VSS QSA#7 DQSL VSS
B8 DQSU VSS J9 B8 DQSU VSS J9 B8 DQSU VSS J9 B8 DQSU VSS J9
VSS M2 VSS M2 VSS M2 VSS M2
VSS M10 VSS M10 VSS M10 VSS M10
VSS P2 VSS P2 VSS P2 VSS P2
T3 P10 DRAM_RST# T3 P10 DRAM_RST# T3 P10 DRAM_RST# T3 P10
<25> DRAM_RST# RESET VSS RESET VSS RESET VSS RESET VSS
T2 T2 T2 T2
VSS VSS VSS VSS
L9 T10 L9 T10 L9 T10 L9 T10
ZQ/ZQ0 VSS ZQ/ZQ0 VSS ZQ/ZQ0 VSS ZQ/ZQ0 VSS
1
1
J2 B2 J2 B2 J2 B2 J2 B2
R992 NC/ODT1 VSSQ R993 NC/ODT1 VSSQ R994 NC/ODT1 VSSQ R995 NC/ODT1 VSSQ
L2 B10 L2 B10 L2 B10 L2 B10
NC/CS1 VSSQ NC/CS1 VSSQ NC/CS1 VSSQ NC/CS1 VSSQ
240_0402_1% J10 D2 240_0402_1% J10 D2 240_0402_1% J10 D2 240_0402_1% J10 D2
NC/CE1 VSSQ NC/CE1 VSSQ NC/CE1 VSSQ NC/CE1 VSSQ
L10 D9 L10 D9 L10 D9 L10 D9
NCZQ1 VSSQ NCZQ1 VSSQ NCZQ1 VSSQ NCZQ1 VSSQ
E3 E3 E3 E3
2
2
VSSQ VSSQ VSSQ VSSQ
A1 E9 A1 E9 A1 E9 A1 E9
NC VSSQ NC VSSQ NC VSSQ NC VSSQ
A11 F10 A11 F10 A11 F10 A11 F10
T1 G2 T1 G2 T1 G2 T1 G2
T11 G10 T11 G10 T11 G10 T11 G10
100-BALL 100-BALL 100-BALL 100-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
64MX16 H5TQ1G63BFR-12C FBGA 64MX16 H5TQ1G63BFR-12C FBGA 64MX16 H5TQ1G63BFR-12C FBGA 64MX16 H5TQ1G63BFR-12C FBGA
B +1.5VSDGPU +1.5VSDGPU +1.5VSDGPU +1.5VSDGPU +1.5VSDGPU +1.5VSDGPU +1.5VSDGPU +1.5VSDGPU B

1
1
R996 R997 R998 R999 R1000
4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% R1001 R1002 R1003
4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1%
2
2
VREFD_Q1 VREFC_A1 VREFC_A2 VREFD_Q2 VREFC_A3 VREFD_Q3 VREFC_A4 VREFD_Q4
1
1
1 1 1 1 1 1 1 1
R1004 R1005 R1006 R1007 R1008
4.99K_0402_1% C1209 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% C1212 4.99K_0402_1% R1009 R1010 R1011 C1216
0.1U_0402_10V6K C1210 C1211 0.1U_0402_10V6K C1213 4.99K_0402_1% C1214 4.99K_0402_1% C1215 4.99K_0402_1% 0.1U_0402_10V6K
2 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K 2 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K 2
2
2
CLKA0 1 2
R1012 56_0402_1%
CLKA0# 1 2 +1.5VSDGPU +1.5VSDGPU +1.5VSDGPU

R1013 56_0402_1% 1
C1217
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.01U_0402_16V7K
C1218
C1219
C1220
C1221
C1222
C1223
C1224
C1225
C1226
C1227
C1228
C1229
C1230
C1231
C1232
C1233
2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
C1234
C1235
C1236
C1237
C1238
C1239
C1240
C1241
C1242
C1243
A A
CLKA1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
R1014 56_0402_1%
CLKA1# 1 2
R1015 56_0402_1% 1
C1244
0.01U_0402_16V7K
2 Issued Date 2009/03/31 Deciphered Date 2010/03/31 Title
M92-S VRAM
5
http://laptop-motherboard-schematic.blogspot.com/ 4
3 2
1
Sheet 29 of 55
1.0
5 4 3 2 1
D D
HDD Connector
JP3
1 +3VS_ACL
GND
A+
A-
2
3
SATA_TXP0
SATA_TXN0
SATA_TXP0 <11>
SATA_TXN0 <11>
ACCELEROMETER (ST)
10U_0805_6.3V6M
4
0.1U_0402_16V4Z
GND SATA_RXN0 C466 2 SATA_RXN0_C
5 1 0.01U_0402_16V7K SATA_RXN0_C <11>
B- SATA_RXP0 C467 2 SATA_RXP0_C
6 1 0.01U_0402_16V7K SATA_RXP0_C <11> 1 1
B+ +3VS +3VS_ACL +3VS_ACL_IO
C468
C469
7
GND PA@ PA@
Near CONN side. PA@
D10 2 2
8 PA@ R364
V33 +3VS
V33
9 2 1 1 2 0_0603_5%
10
V33
11
GND RB751V_SOD323
GND
12 Pleace near HDD CONN (JHDD)
13 +5VS
GND
14
V5 +5VS
15
V5
10U_0805_10V4Z
16
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
V5
17 1 1 1 1
GND
C462
C463
C464
C465
18
Reserved SMB_CLK_S3
19 SMB_CLK_S3 <12,17,18,19>
GND
20
V12 2 2 2 2
21 0011101b
14
V12 U15 PA@
22 VDDIO absolute man
V12
SCL / SPC
SUYIN_127072FR022G523_RV
rating is VDD+0.1
C C
CONN@
+3VS_ACL_IO 1 13 SMB_DATA_S3
Vdd_IO SDA / SDI / SDO SMB_DATA_S3 <12,17,18,19>
PA@ R366 2 12 R367 PA@
0_0402_5% GND SDO 0_0402_5%
1 2 3
Reserved Reserved
11 1 2
4 10
GND GND
CD-ROM Connector 5
GND INT 2
9
+3VS_ACL 6 8 ACCEL_INT <14>

Vdd INT 1
JP5
CS
13 HP302DLTR8_ LGA_14P
7
GND SATA_TXP1
12 SATA_TXP1 <11>
A+ SATA_TXN1
11 SATA_TXN1 <11>
A- OPP@ PA@ R368 2
10 1
GND SATA_RXN1 C473 2 SATA_RXN1_C
9 1 0.01U_0402_16V7K SATA_RXN1_C <11>
10K_0402_5%
B- SATA_RXP1 C474 2 SATA_RXP1_C
8 1 0.01U_0402_16V7K SATA_RXP1_C <11> Must be placed in the center of the system.
B+ OPP@
GND
7
+5VS Placea caps. near ODD CONN.
Near CONN side.
6
DP
5
V5
1U_0603_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
4
0.1U_0402_16V4Z
V5 +5VS
3 1 1 1 1
MD
OPP@ C475
OPP@ C476
OPP@ C477
OPP@ C478
2
GND
1
GND
2 2 2 2
SUYIN_127382FR013GX09ZR
B CONN@ B
Multi Bay
+5VS
+5VS
Placea caps. near Multi Bay
JP12 CONN.
2 1
VCC5 GND SATA_TXP5
4 3 SATA_TXP5 <11>
VCC5 TX+ SATA_TXN5
150U_B_6.3VM_R40M
6 5 SATA_TXN5 <11>
VCC5 TX-
220U_D2_4VM_R15
1U_0603_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
8 7
0.1U_0402_16V4Z
VCC3 GND 1 1
10 9 SATA_RXN5 C1278 2 1 SATA_RXN5_C PA@ 1 PA@ 1 PA@ 1 PA@ 1 PA@ @
VCC3 RX- SATA_RXN5_C <11>
12 11 SATA_RXP5 C1279 2 1 SATA_RXP5_C C1281 C1282 C1283 C1284 C1280 + C1441 +
VCC3 RX+ SATA_RXP5_C <11>
14 13 PA@
GND GND PA@
16 15
GND GND 0.01U_0402_16V7K 2 2 2 2 2 2
18 17 0.01U_0402_16V7K
GND GND
20 19
G2 G1
CONN@
TYCO_2023087-3
A A

HDD & CDROM
5
4
3 2
Size Document Number

1
Sheet 30 of 55
Rev
1.0
A B C D E
Mini Card 0--TV Mini Card 2---WLAN

tuner/WWAN/Robson SIM card Connector
RW26 1 2 0_0805_5% +3VS_WLAN +3VALW +1.5VS_WLAN
+3VALW +3VS_WWAN +1.5VS +1.5VS_WWAN
0.1U_0402_16V4Z 0.01U_0402_16V7K 4.7U_0805_10V4Z
0.1U_0402_16V4Z
0.01U_0402_16V7K 4.7U_0805_10V4Z JP4 1 @ +1.5VS RW1 1 2 0_0805_5% +1.5VS_WLAN
+1.5VS_WWAN 1 CW1
1 1 1 1 1 1
UIM_PWR 2 CW2 CW3 CW4 CW5 CW6
2
0.1U_0402_16V4Z
1 @ 1 1 1 0.01U_0402_16V7K UIM_DATA 3
CW7 CW8 CW9 CW10 UIM_CLK 3 2
4
UIM_RST 4 2 2 2 2 2 RW2 1 0_0805_5%
1 1 5 +3VS 2 +3VS_WLAN
1 CW12 CW13 UIM_VPP 5 4.7U_0805_10V4Z 1
6 8
2 2 2 2 6 G1 0.1U_0402_16V4Z
7 9
7 G2
0.1U_0402_16V4Z 2 2 ACES_88266-07001
+3VS_WWAN 0.1U_0402_16V4Z CONN@
JP6
ICH_PCIE_WAKE# 1 2 JP7
1 2 ICH_PCIE_WAKE#
3 4 1 2 +3VS_WLAN
3 4 1 2
5 6 +1.5VS_WWAN 3 4
CLKREQ_WWAN# 5 6 UIM_PWR 3 4
<12> CLKREQ_WWAN# 7 8 5 6 +1.5VS_WLAN
7 8 UIM_DATA CLKREQ_WLAN# 5 6 RW3 0_0402_5% DEBUG@
9 9 10 10 <12> CLKREQ_WLAN# 7 7 8 8 1 2 LPC_FRAME# <11,39>
CLK_PCIE_WWAN# 11 12 UIM_CLK 9 10 RW4 1 2 0_0402_5% DEBUG@
<12> CLK_PCIE_WWAN# CLK_PCIE_WWAN 11 12 UIM_RST CLK_PCIE_WLAN# 9 10 LPC_AD3 <11,39>
13 14 11 12 RW5 1 2 0_0402_5% DEBUG@
<12> CLK_PCIE_WWAN 13 14 <12> CLK_PCIE_WLAN# 11 12 LPC_AD2 <11,39>
15 16 UIM_VPP CLK_PCIE_WLAN 13 14 RW6 1 2 0_0402_5% DEBUG@
15 16 <12> CLK_PCIE_WLAN 13 14 LPC_AD1 <11,39>
17 18 15 16 RW7 1 2 0_0402_5% DEBUG@
17 18 M_WXMIT_OFF# PLT_RST# 15 16 LPC_AD0 <11,39>
19 19 20 20 17 17 18 18
0_0402_5% 21 22 PLT_RST# 19 20 XMIT_OFF#
21 22 <14> CLK_DEBUG_PORT_1 19 20
<12> PCIE_RXN1 RW8 1 2 PCIE_C_RXN1 23 24 @RW9
@ RW9 1 2 0_0805_5% +3VALW 21 22 PLT_RST#
23 24 21 22
<12> PCIE_RXP1 1 2 PCIE_C_RXP1 25 25 26 26 RW11 1 2 0_0805_5% +3VS_WWAN <12> PCIE_RXN2 RW12 1 2 0_0402_5% PCIE_C_RXN2 23 23 24 24 @RW13
@ RW13 1 2 0_0805_5% +3VALW
RW10 0_0402_5% 27 28 +1.5VS_WWAN <12> PCIE_RXP2 RW14 1 2 0_0402_5% PCIE_C_RXP2 25 26 RW15 1 2 0_0805_5% +3VS_WLAN
27 28 SMBCLK 25 26
29 29 30 30 27 27 28 28 +1.5VS_WLAN
PCIE_TXN1 31 32 SMBDATA 29 30 SMBCLK
<12> PCIE_TXN1 31 32 29 30
PCIE_TXP1 33 34 PCIE_TXN2 31 32 SMBDATA
<12> PCIE_TXP1 33 34 <12> PCIE_TXN2 PCIE_TXP2 31 32
35 35 36 36 USB20_N8 <14> 33 33 34 34
WWAN_DETECT# <12> PCIE_TXP2
<14> WWAN_DETECT# 37 37 38 38 USB20_P8 <14> 35 35 36 36 USB20_N5 <14>
+3VS_WWAN RW16 1 2 0_0603_5% 39 40 37 38
39 40 37 38 USB20_P5 <14>
1 2 41 42 WW_LED# <40> 39 40
RW17 0_0603_5% 41 42 39 40
43 43 44 44 Reserve for RF +3VS_WLAN 41 41 42 42
45 45 46 46 43 43 44 44 WL_LED# <40> Reserve for RF
47 47 48 48 +1.5VS_WWAN 45 45 46 46
49 49 50 50 47 47 48 48 +1.5VS_WLAN
2 RW25 1 2
51 52 +3VS_WWAN 2 33_0402_5% 49 50
51 52 <39> EC_UTX 49 50
47P_0402_50V8J
39P_0402_50V8J
39P_0402_50V8J
39P_0402_50V8J
47P_0402_50V8J
EC_URX 51 52
<39> EC_URX 51 52 +3VS_WLAN
53 GND1 GND2 54 1 1 1 1 1
47P_0402_50V8J
39P_0402_50V8J
39P_0402_50V8J
39P_0402_50V8J
47P_0402_50V8J
C1416
C1417
C1418
C1419
C1420
53 GND1 GND2 54
1 1 1 1 1
C1421
C1422
C1423
C1424
C1425
FOX_AS0B226-S40N-7F @ @ @
CONN@ 2 2 2 2 2 FOX_AS0B226-S40N-7F
CONN@ @ @ @
2 2 2 2 2
+3VS_WWAN @ RW19
UIM_PWR 1 2 UIM_DATA
@ RW22 47K_0402_5% DW2 RB751V_SOD323
1 2 1 2 XMIT_OFF#
<14> XMIT_OFF
0_0603_5%
DW1 RB751V_SOD323 +3VS
1 2 M_WXMIT_OFF# @ RW23 UIM_CLK
<14> WXMIT_OFF#
S
+3VALW 3 1 1 2 1
0_1206_5% CW11 @
QW1 18P_0402_50V8J
SI2305ADS-T1-GE3_SOT23-3
G
2
2
<39> WWAN_POWER_OFF
Near to Express Card slot.

Close to
3 New Card JEXP +3VS_PEC 3
JEXP1
Express Card Power PA@ 1
+1.5VS R1060 USB9- GND
Switch <14> USB20_N9 1 2 0_0402_5% 2 1 1
PA@ C1285 R1061 USB9+ USB_D-
<14> USB20_P9 1 2 0_0402_5% 3
USB_D+
PA@ PA@
1 2 0.1U_0402_16V4Z U53 PA@ PA@ EXP_CPPE# 4 C1286 C1287
CPUSB# 0.1U_0402_16V4Z 4.7U_0805_10V4Z
12 11 +1.5VS_PEC 5
+3VS 1.5Vin 1.5Vout RSV 2 2
14 13 6
1.5Vin 1.5Vout SMBCLK RSV
<12> SMBCLK 7
PA@ SMBDATA SMB_CLK
<12> SMBDATA 8
C1288 1 SMB_DATA
2 0.1U_0402_16V4Z 2 3 +3VS_PEC +1.5VS_PEC 9
3.3Vin 3.3Vout PA@ R1062 +1.5V +1.5VS_PEC
4 5 +1.5VS_PEC 10
C1289 1 3.3Vin 3.3Vout PCIE_PME#_R +1.5V
2 0.1U_0402_16V4Z <13,32> ICH_PCIE_WAKE# 1 2 11
PA@ 0_0402_5% WAKE#
+3VALW 17 15 +3V_PEC 12
AUX_IN AUX_OUT +3V_PEC PERST# +3.3VAUX
13 1 1
PLT_RST# PERST# PA@ PA@
<14,24,32> PLT_RST# 6 19 +3VS_PEC 14
SYSRST# OC# +3.3V C1290 C1291
15
SYSON PERST# CLKREQ_EXP# +3.3V 0.1U_0402_16V4Z 4.7U_0805_10V4Z
<39,40,41,45> SYSON 20 8 <12> CLKREQ_EXP# 16
SHDN# PERST# EXP_CPPE# CLKREQ# 2 2
17
SUSP# CLK_PCIE_EXP# CPPE#
<34,39,41,43,46,47,48,51> SUSP# 1 16 <12> CLK_PCIE_EXP# 18
STBY# NC CLK_PCIE_EXP REFCLK-
<12> CLK_PCIE_EXP 19
@ R1063 1 REFCLK+
+3VALW 2 100K_0402_5% 10 7 20
CPPE# GND PCIE_RXN4 GND
<12> PCIE_RXN4 21
PA@ EXP_CPPE#_R PCIE_RXP4 PERn0
<14> EXP_CPPE# 1 2 9 <12> PCIE_RXP4 22
R1242 CPUSB# PERp0
23
0_0402_5% PCIE_TXN4 GND +3V_PEC
18 <12> PCIE_TXN4 24
RCLKEN PCIE_TXP4 PETn0
<12> PCIE_TXP4 25
PETp0
G577NSR91U 26
GND
27 29 PA@ 1 PA@
internal pull high to 3.3Vaux-in 28
GND GND
30 C1292
1
C1293
4 GND GND 0.1U_0402_16V4Z 4.7U_0805_10V4Z 4
EC need setting at Hi-Z & output Low SANTA_130801-5_LT
CONN@ 2 2

WLAN, WWAN, New Card
A
B
C D
E
Sheet 31 of 55
1.0
5 4 3 2 1
LAN_DI R1065 1 2 3.6K_0402_5%

LAN Conn.
+3V_LAN
JRJ45
+3VLAN 9 Yellow LED+
OPP@ LAN_CS R1066 2 1 1K_0402_5% 06/19 Update RJ45 connector library
U14 8103EL@ LAN_ACTIVITY# 2 1 LANLED_ACT# 10
RTL8103EL-VB Yellow LED-
1 SHLD1 16
C1294 R1067 RJ45_MIDI3- 8
0.1U_0402_16V4Z 300_0402_5% PR4-
Place Close to Chip U14 RJ45_MIDI3+ 7
DETEC PIN1 13
2 PR4+
<12> PCIE_RXP3 C1295 2 1 0.1U_0402_16V7K PCIE_PTX_IRX_P3 20 33 RJ45_MIDI1- 6
HSOP LED3/EEDO LAN_DI PR2-
LED2/EEDI/AUX 34
<12> PCIE_RXN3 C1296 2 1 0.1U_0402_16V7K PCIE_PTX_IRX_N3 21 35 LAN_SK_LAN_LINK# RJ45_MIDI2- 5
D HSON LED1/EESK LAN_CS PR3- D
EECS 32
<12> PCIE_TXP3 15 RJ45_MIDI2+ 4
HSIP LAN_ACTIVITY# PR3+
LED0 38
<12> PCIE_TXN3 16 RJ45_MIDI1+ 3
HSIN LAN_MDI0+ PR2+
RTL8102EL MDIP0 2
<12> CLK_PCIE_LAN 17 3 LAN_MDI0- RJ45_MIDI0- 2
REFCLK_P MDIN0 LAN_MDI1+ PR1-
<12> CLK_PCIE_LAN# 18 REFCLK_M RTL8111DL-VB MDIP1 5 DETEC PIN2 14
6 LAN_MDI1- 2 RJ45_MIDI0+ 1
MDIN1 LAN_MDI2+ C1297 PR1+
<12> CLKREQ_LAN# 25 CLKREQB NC 8 SHLD1 15
9 LAN_MDI2- 0.1U_0402_16V4Z +3VLAN 11
NC LAN_MDI3+ Green LED+
<14,24,31> PLT_RST# 27 PERSTB NC 11
LAN_MDI3- LAN_SK_LAN_LINK# 1 LANLED_LINK#
NC 12 2 1 12 Green LED-
R1069 1 2 2.49K_0402_1% 46 4 +LAN_VDD12 R1068 TYCO_2041671-1
RSET NC 300_0402_5% CONN@
<13,31> ICH_PCIE_WAKE# 26 48 VCTRL12
ISOLATEB LANWAKEB VCTRL12A LANGND
28 ISOLATEB
VDDTX 19 +EVDD12 1 1
LAN_X1 41 30 +LAN_VDD12 C1298 C1299
LAN_X2 CKXTAL1 DVDD12 LANLED_ACT#
42 CKXTAL2 DVDD12 36
13 0.1U_0402_16V4Z 4.7U_0805_10V4Z
DVDD12 LANLED_LINK# 2 2
DVDD12 10
NC 39
2
23 44 +LAN_CTRL12VDD
NC NC @ D43
24 NC VCTRL12D 45
+3VS PACDN042_SOT23~D
+3V_LAN
Close to Pin45,44
7 GND VDD33 29 +3V_LAN
14 37
1
GND VDD33
1
31 GND
R1070 R1071 47 1
C 1K_0402_1% 0_0402_5% GND AVDD33 C
NC 40
22 43 CTRL15/VDD33
GNDTX NC
2
ISOLATEB CTRL15/VDD33
RTL8111DL-VB-GR LQFP 48P
1
PA@
R1072 @ R1073
Y4
15K_0402_5% 0_0402_5% U56 8103EL@
LAN_X1 2 1 LAN_X2
LAN_MDI0+ 1 16 RJ45_MIDI0+
2
LAN_MDI0- RD+ RX+ RJ45_MIDI0-

25MHz_20pF_6X25000017 2 RD- RX- 15
1 1 LAN_CT0 3 14 RJ45_CT0
C1306 CT CT
4 NC NC 13
C1305 27P_0402_50V8J 5 12
27P_0402_50V8J LAN_CT1 NC NC RJ45_CT1
6 CT CT 11
2 2 LAN_MDI1+ RJ45_MIDI1+
7 TD+ TX+ 10
LAN_MDI1- 8 9 RJ45_MIDI1-
TD- TX-
Close to Pin40 for 8111DL NS681680 LAN
Close to Pin39 for 8111DL

U17 8111DL@
C1302 1 2 0.01U_0402_50V7K LAN_CT0 1 24 RJ45_CT0 2 1 1000P_0402_50V7K R1074 1 2 75_0402_1%
+3V_LAN LAN_MDI0+ TCT1 MCT1 C1303 RJ45_MIDI0+
Close to Pin10,13,30,36 +LAN_VDD12
Close to Pin1,37,29,40 Close to Pin 44,45 2 TD1+ MX1+ 23 RJ45_MIDI0+ <36>
LAN_MDI0- 3 22 RJ45_MIDI0- RJ45_MIDI0- <36>
+LAN_VDD12 C1426 TD1- MX1-
1 2 0.01U_0402_50V7K LAN_CT1 4 TCT2 MCT2 21 RJ45_CT1 2 1 1000P_0402_50V7K R1075 1 2 75_0402_1%
1 2 LAN_MDI1+ 5 20 C1304 RJ45_MIDI1+ RJ45_MIDI1+ <36>
R1198 0_0603_5% +3V_LAN LAN_MDI1- TD2+ MX2+ RJ45_MIDI1-
C1310
C1311
C1312
C1313
6 19 RJ45_MIDI1- <36>
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
8103EL@ C1427 TD2- MX2-

2 0.01U_0402_50V7K 1 1000P_0402_50V7K R1076 1 75_0402_1%
C1314
C1315
C1316
C1317
C1318
2 2 2 2 1 7 18 2 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
B +LAN_CTRL12VDD 8111DL@ LAN_MDI2+ TCT3 MCT3 C1307 RJ45_MIDI2+ 8111DL@ B

2 2 2 2 2 1 2 8 TD3+ MX3+ 17 RJ45_MIDI2+ <36>
1 1 LL1 0_0603_5% LAN_MDI2- 9 16 8111DL@ RJ45_MIDI2- RJ45_MIDI2- <36>
8111DL@ C1428 TD3- MX3-
1 2 0.01U_0402_50V7K 10 TCT4 MCT4 15 2 1 1000P_0402_50V7K R1077 1 2 75_0402_1%
1 1 1 1 C1300 C1301 8111DL@ LAN_MDI3+ C1308 RJ45_MIDI3+ 8111DL@
11 14
RJ45_GND
1 1 1 1 1 TD4+ MX4+ RJ45_MIDI3+ <36>
0.1U_0402_16V4Z 22U_0805_6.3V6M LAN_MDI3- 12 13 8111DL@ RJ45_MIDI3- RJ45_MIDI3- <36>
2 2 8111DL@ TD4- MX4-
NS692405
2
0303 change to 0805 size by vender's recommand C1309

Close to Pin48 8103EL@ 1000P_1808_3KV7K
1
Close to Pin19 1 2 1.For Giga LAN (RTL8111DL):
R1199 0_0603_5%
+EVDD12 R1080 Mail source: LANKom: LG-2446S-1 (P/N: SP050005L00)
VCTRL12 L63 1 2 1 2 +EVDD12 2nd Source: MHPC: NS892406 (P/N: SP050005900)
4.7UH_1008HC-472EJFS-A_5%_1008 0_0603_5%
8111DL@
C1320
C1321
22U_0805_6.3V6M
0.1U_0402_16V4Z
C1322
C1323
1 2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2 2 @ R1078 1 2 0_0805_5%
R1082 +3VALW
Note 1: The Trace length 8111DL@ 0_0603_5% 80 mils
2 1 8111DL@
1 1 between L1 and 8111DL's Pin
2
1 must be within 0.5 cm. C262
S
+3VLAN R1079 2 0_0805_5% For DIS 8111DL used
D
3 1 1 +3V_LAN
and C263 to L1 must be within
100K_0402_5%
1U_0402_6.3V4Z
2
1
+LAN_VDD12 2
0.5cm. Refer to Layout guide R1197
R1081
PA@ C1319
G
2
for more detail. 9/11 Add R1259 for OPP SKU Q87 100K_0402_5%
PA@ R1083 @ 1
2
47K_0402_5%
<39> LAN_POWER_OFF 1 2 1
A A
1 2 C1429
OPP@ R1259 0.1U_0402_16V4Z
0_0402_5% 2
2009. 08.06 Add R1083 and C1319 to solve the 8111 VB power on issue

USB CardReader&CONN
5 4 3 2 1
5 4 3 2 1
XD_CD#
SP1 XD_RDY SD_WP MS_CLK
RTS5138 ==>For DIS SP2
SP3
XD_RE#
XD_CE# SD_D1
MS_INS#
SP4 XD_CLE SD_D0 MS_D7

SP5 XD_ALE SD_D7 MS_D3
SP6 XD_WE# SD_CD#
D SP7 XD_WP SD_D6 MS_D6 D
SP8 XD_D0 SD_CLK MS_D2
+3VS +3VS_CR SP9 XD_D1 SD_D5 MS_D0
SP10 XD_D2 SD_CMD
SP11 XD_D3 SD_D4 MS_D4
R1084 1 2 0_0805_5% SP12 XD_D4 SD_D3 MS_D1
SP13 XD_D5 SD_D2 MS_D5
SP14 XD_D6 MS_BS
XD_D7
C1324 2 1 100P_0402_50V8J
U54
R1085 1 2 6.2K_0603_1% RREF 1 REFE CR_LED#
GPIO0 17
<14> USB20_N10 2 DM
<14> USB20_P10 3 DP CLK_IN 24 CLK_48M_CR <12>
+3VS_CR 4 23 XD_D7
+VCC_4IN1 3V3_IN XD_D7
5
4.7U_0805_10V4Z
0.1U_0402_16V4Z
VREG CARD_3V3 XDD6_MSBS
1 2 6 V18 SP14 22
XDD5_SDD2_MS_D5
C1325
C1326
1 21
1U_0402_6.3V6K
XD_CD# SP13 XDD4_SDD3_MSD1
C1327
7 XD_CD# SP12 20
19 XDD3_SDD4_MSD4
2 1 XDDRY_SDWP_MSCLK 8 SP11 XDD2_SDCMD
SP1 SP10 18
2 XDRE#_MSINS# XDD1_SDD5_MSD0
9 SP2 SP9 16
XDCE#_SDD1 10 15 XDD0_SDCLK_MSD2
SP3 SP8
EPAD
XDCLE_SDD0 11 14 XDWP#_SDD6
C XDALE_SDD7_MSD3 SP4 SP7 XDWE#_SDCD# C
12 SP5 SP6 13
RTS5138-GR_QFN24_4X4
25
Card Reader Connector
JREAD1
+VCC_4IN1 3 XD-VCC SD-VCC 21 +VCC_4IN1
MS-VCC 28
XDD0_SDCLK_MSD2 32
10U_0805_6.3V6M
XDD1_SDD5_MSD0 XD-D0 XDD0_SDCLK_MSD2
10 XD-D1 7 IN 1 CONN SD_CLK 20 1
XDD2_SDCMD XDCLE_SDD0
C1328
9 XD-D2 SD-DAT0 14
XDD3_SDD4_MSD4 8 12 XDCE#_SDD1
XDD4_SDD3_MSD1 XD-D3 SD-DAT1 XDD5_SDD2_MS_D5
7 XD-D4 SD-DAT2 30
XDD5_SDD2_MS_D5 XDD4_SDD3_MSD1 2
6 XD-D5 SD-DAT3 29
XDD6_MSBS 5 27 XDD3_SDD4_MSD4
XD_D7 XD-D6 SD-DAT4 XDD1_SDD5_MSD0
4 XD-D7 SD-DAT5 23
18 XDWP#_SDD6
XDWE#_SDCD# SD-DAT6 XDALE_SDD7_MSD3
34 XD-WE SD-DAT7 16
XDWP#_SDD6 33 25 XDD2_SDCMD
XDALE_SDD7_MSD3 35 XD-WP SD-CMD XDWE#_SDCD#
XD-ALE SD-CD-SW 1
XD_CD# 40
XDDRY_SDWP_MSCLK39 XD-CD XDDRY_SDWP_MSCLK
XD-R/B SD-WP-SW 2
XDRE#_MSINS# 38
XDCE#_SDD1 XD-RE
37 XD-CE
B XDCLE_SDD0 36 26 XDDRY_SDWP_MSCLK B
XD-CLE MS-SCLK XDD1_SDD5_MSD0
MS-DATA0 17
11 15 XDD4_SDD3_MSD1
7IN1 GND MS-DATA1 XDD0_SDCLK_MSD2
31 7IN1 GND MS-DATA2 19
24 XDALE_SDD7_MSD3
MS-DATA3 XDRE#_MSINS#
MS-INS 22
13 XDD6_MSBS
MS-BS
41 7IN1 GND
42 7IN1 GND
TAITW_R015-B10-LM
CONN@
White
D44
+5VS R1086 1 2 1.2K_0402_5% 2 1 CR_LED#
HT-F196BP5_WHITE
A A

USB CardReader&CONN
5 4 3 2 1
A B C D E
OPP@ R1102 @ R431 1K_0402_5%

+VREFOUT_INTMIC 2 1 OPP@ C1339 1 2 +VREFOUT_INTMIC 2 1 C546 1 2
0_0402_5%
1
1U_0603_10V4Z +AVDD_CODEC 2 1 1U_0603_10V4Z
+VDDA_CODEC R1260 1K_0402_5%
OPP@ R1104 R1105 OPP@ R434 R435
@ R1267 2 1 0_0805_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5%
+3VS R437 +3VS_DVDD MIC_IN_R MIC_EXT_R
2
1
BLM18BD601SN1D_0603 +5VS
2 1 +AVDD_CODEC OPP@ R1200
0.1U_0402_16V4Z
R1268 2 1 R904 2 1 0_0402_5%
1U_0402_6.3V6K
1 1 0_0805_5% 0_0805_5%
+3VS +3VS_HDA MIC_IN_L MIC_EXT_L
2
C976
C553
1U_0402_6.3V6K
4.7U_0603_6.3V6M
0.1U_0402_16V4Z
R907 1 2 0_0603_5% 1 1 1 PVDD
2 2
C1063
C1064
C1450
1 1
0.1U_0402_16V4Z
U22 9/11 Use +AVDD_CODEC for EXT. MIC reference voltage

1
10U_0805_10V4Z
1U_0402_6.3V6K
0.1U_0402_16V4Z
R1087 1 2 2.49K_0402_1% +AVDD_CODEC
2 2 2
C551
C1065 2 1 10U_0805_10V4Z
1
DVDD_CORE AVDD
27 1 1 1 PA@R1092
PA@R1092 1 2 39.2K_0402_1% JACK_DET# JACK_DET# <36>
C1066
C1067
C1068
38 R1089 1 2 20K_0402_1% HP_DET# HP_DET# <35>
2 AVDD
9 R1090 1 2 10K_0402_1% INTMIC_DET# INTMIC_DET# <35>
DVDD SENSE_A C1329
PVDD
39 1 2 1000P_0402_50V7K
@ C554 @R441
@ R441 3 45 2 2 2 SENSE_B R1091 1 2 2.49K_0402_1%
DVDD_IO PVDD +AVDD_CODEC
2 1 2 1 R1088 1 2 20K_0402_1% EXTMIC_DET# EXTMIC_DET# <35>
33P_0402_50V8K 47_0402_5% 13 SENSE_A PA@R1093
PA@R1093 1 2 39.2K_0402_1% SENSE_B#
SENSE_A SENSE_B# <36>
HDA_BITCLK_CODEC 6 14 SENSE_B C1330 1 2 1000P_0402_50V7K
<11> HDA_BITCLK_CODEC HDA_BITCLK SENSE_B
R444
<11> HDA_SDIN0 1 2 HDA_SDIN0_CODEC 8 HDA_SDI
150U_Y_6.3VM
33_0402_5% DOCK_LOUT_L PA@ C1331
+ +
HDA_SDOUT_CODEC HP0_PORT_A_L 28
DOCK_LOUT_R
1 2 DOCK_LOUT_C_L <36> 92HD80 port define
5 29 PA@ C1332 1 2 DOCK_LOUT_C_R <36> Dock HP Jack
<11> HDA_SDOUT_CODEC HDA_SDO HP0_PORT_A_R
VREFOUT_A_or_F 23 Port A DOCK HP
HDA_SYNC_CODEC 10 150U_Y_6.3VM
<11> HDA_SYNC_CODEC HDA_SYNC HP_OUT_L
HP1_PORT_B_L 31 HP_OUT_L <35> Port B HP
HDA_RST#_CODEC 11 32 HP_OUT_R HP Jack
<11,39> HDA_RST#_CODEC HDA_RST# HP1_PORT_B_R HP_OUT_R <35>
Port C INT. MIC
19 MIC_INL OPP@ C559 1 2 2.2U_0603_6.3V4Z MIC_IN_L
PORT_C_L MIC_INR MIC_IN_R MIC_IN_L <35>
PORT_C_R 20 OPP@ C560 1 2 2.2U_0603_6.3V4Z MIC_IN_R <35> Int MIC Port D SPKR
24 +VREFOUT_INTMIC
VREFOUT_C
<21> DMIC_CLK
PA@ R679 1 2 100_0402_1% 2 DMIC_CLK/GPIO1 Port E DOCK MIC
PA@ R446 1 2 0_0603_5% 4 40 SPKL+
<21> DMIC_DAT DMIC0/GPIO2 SPKR_PORT_D_L+ SPKL- SPKL+ <35>
SPKR_PORT_D_L- 41 SPKL- <35> Port F EXT. MIC
R910 1 2 0_0402_5% 46 Internal SPKR
<39> EAPD_CODEC DMIC1/GPIO0/SPDIF_OUT_1 SPKR-
SPKR_PORT_D_R- 43 SPKR- <35> DM0 Digital MIC
SPDIF_OUT 48 44 SPKR+
<36> SPDIF_OUT SPDIF_OUT_0 SPKR_PORT_D_R+ SPKR+ <35>
PA@1U_0603_10V6K
+3VS R908 1 2 10K_0402_5% 47 15 DOCK_MICL C1333 1 2 DOCK_MICL_C PA@ R1094 1 2 10K_0402_5%
EAPD PORT_E_L DOCK_MICR DOCK_MICR_C DOCK_MIC_L <36>
16 C1334 1 2 PA@ R1095 1 2 10K_0402_5%
2 EC_MUTE# PORT_E_R DOCK_MIC_R <36> 2
PA@1U_0603_10V6K
<35,39> EC_MUTE# MIC_EXTL MIC_EXT_L
17 C557 1 2 2.2U_0603_6.3V4Z
PORT_F_L MIC_EXTR MIC_EXT_R MIC_EXT_L <35>
2 35 18 C558 1 2 2.2U_0603_6.3V4Z Ext MIC
CAP- PORT_F_R MIC_EXT_R <35>
C1069 12 MONO_INR 2 1 MONO_IN
4.7U_0603_6.3V6M PC_BEEP C561 0.1U_0402_16V4Z DOCK_MICL_C
36 CAP+
1 25
MONO_OUT DOCK_MICR_C
+3VS 7
DVSS
33 22
AVSS CAP2
1
30 PA@ PA@
AVSS R1096 R1097 +AVDD_CODEC
26 21
AVSS VREFFILT
1
1.21K_0402_1%
R1247 +3VS 42 34 1.21K_0402_1% 1/10*Vin
PVSS V-
2
4.7K_0402_5%
2
need close to
1U_0603_10V6K
10U_0805_10V4Z
10U_0805_10V4Z
49 37 R909
DAP VREG
4.7U_0603_6.3V6M
2 1 2 Codec 10K_0402_5%
2
2
C563
C564
1 92HD80B1X5NLGXYD38 QFN48P
1
C1071
C1072
ǂSA00003G700
1
HDA_RST#_CODEC C1442 1 2 1 MONO_IN R447 2 1 47K_0402_5% C1070 1 2 0.1U_0402_16V4Z
2
100P_0402_50V8J 92HD80
1
+VDDA_CODEC D
0.1U_0402_16V4Z
1 9/11 Delete EC_BEEP 2 SB_SPKR
SB_SPKR <11>
10K_0402_5%
+5VALW Q38
W=40Mil U60 2 G
1
2
C1443 2N7002_SOT23-3 S
3
C562
R449
0.01U_0402_16V7K C1451 1 2 1 @ R1269
2 IN
2.2U_0805_16V4Z
0.1U_0402_16V4Z 5 0_0402_5%
OUT 1
2 1
GND
2
1
C1452
3 3
<31,39,41,43,46,47,48,51> SUSP# 3 4
SHDN BYP
2009.08.18 Add R1247,C1442,C1443 for ESD 2
G9191-475T1U_SOT23-5 1 2009.08.18 Add 0.1u for ESD
C1453
C983 1 2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
2009.11.03 Reserve LDO for AVDD power C984 1 2 0.1U_0402_16V4Z
C985 1 2 0.1U_0402_16V4Z
C986 1 2 0.1U_0402_16V4Z
MDC 1.5 Conn. C1444 1
C1445 1
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
+3VS
JP8 @ 1 2 +1.5VS C1446 1 2 0.1U_0402_16V4Z
R1098 0_0603_5%
1 2 1 2 +3VS @ C1447 1 2 0.1U_0402_16V4Z
GND1 RES0 GNDA <35,36>
1000P_0402_50V7K
C1335
C1336
C1337
0.1U_0402_16V4Z
4.7U_0805_10V4Z
<11> HDA_SDOUT_MDC HDA_SDOUT_MDC 3 4 R1099 0_0603_5%

IAC_SDATA_OUT RES1 @ C1448 1
5 6 +3VS 1 1 1 2 0.1U_0402_16V4Z
GND2 3.3V
@
HDA_SYNC_MDC 7 8
<11> HDA_SYNC_MDC IAC_SYNC GND3
<11> HDA_SDIN1 1 2 HDA_SDIN1_MDC 9 10 R139 1 2 0_0603_5%
R1100 33_0402_5% IAC_SDATA_IN GND4
<11> HDA_RST#_MDC 11 12 HDA_BITCLK_MDC <11>
IAC_RESET# IAC_BITCLK 2 2 2
2 1 1 2
@ R1101 @ C1338
GND
GND
GND
GND
GND
GND
10_0402_5% 10P_0402_25V8K
H12 H14 GND GNDA
HOLEA HOLEA ACES_88018-124G
13
14
15
16
17
18
4 4
Connector for MDC Rev1.5
1
MDC Standoff CONN@

Codec_IDT92HD80
A
B
C D
Custom
Date:
E
Sheet 34 of 55
1.0
A B C D E
SPEAKER
+AVDD_CODEC
JP60
6 INTMIC IN
GND2
5 GND1
2
@
SPKR- R454 1 2 0_0603_5% SPK_R- 4 R1103
<34> SPKR- 4
SPKR+ R455 1 2 0_0603_5% SPK_R+ 3 10K_0402_5%
<34> SPKR+ 3
<34> SPKL- SPKL- R456 1 2 0_0603_5% SPK_L- 2
SPKL+ R457 0_0603_5% SPK_L+ 2
<34> SPKL+ 1 2 1
1
1
330P_0402_50V7K
330P_0402_50V7K
330P_0402_50V7K
1 JP51 1
330P_0402_50V7K
1 1 1 E&T_3806-F04N-02R 1
1
1 <34> MIC_IN_L 2
2
C570
C571
C572
CONN@ <34> MIC_IN_R 3
3
C569
4
2 2 2 4
+3VS 2 1
2 OPP@ R1106 10K_0402_5%
9/11 Delete ANA_MIC_DET 5
GND1
6
GND2
2N7002DW-7-F_SOT363-6
<34> INTMIC_DET# @ ACES_88231-04001
3
2N7002DW-7-F_SOT363-6
@ Q88B CONN@
6
D15 D16 Q88A
PSOT24C_SOT23-3 PSOT24C_SOT23-3
2
MIC_IN_L 5
2 OPP@
1
MIC_IN_R D62
4
1
3
2
PACDN042_SOT23-3~D
1
OPP@ D58
PACDN042_SOT23-3~D
1
HP de pop circuit HP_OUT_L HP_OUT_R Audio/B & CIR
2N7002DW-7-F_SOT363-6
2N7002DW-7-F_SOT363-6
JP49
MIC_EXT_R 1
2 <34> MIC_EXT_R 1 2
MIC_EXT_L 2
+5VALW <34> MIC_EXT_L 2
3 3
6
<34> HP_OUT_R HP_OUT_R 4
HP_OUT_L 4
<34> HP_OUT_L 5 5
Q28A
Q32A
6 6
2 2 EXTMIC_DET# 7
<34> EXTMIC_DET# 7
1
<34> HP_DET# HP_DET# 8 15

R76 @ @ 8 G1
9 16
1
1
10K_0402_5% 9 G2
10
CIR_IN 10
@ <36,39> CIR_IN 11
11
2N7002DW-7-F_SOT363-6
2N7002DW-7-F_SOT363-6
+5VL 12
2
12
13
13
4
4
14
14
6
2N7002DW-7-F_SOT363-6
5 5 MIC_EXT_R
Q32B
Q28B
ACES_87213-1400G
Q39A
MIC_EXT_L CONN@
<34,39> EC_MUTE# 2
2
@ @
3
3
@
1
@ D63
PACDN042_SOT23-3~D
1
3 3
4 4

AMP & Audio Jack
A
B
C D
Custom
Date:
E
Sheet 35 of 55
1.0
Atlas/ Saturn Dock
JDOCK1
RED 38 39
<20> RED GREEN CRT_Red Digital gnd
<20> GREEN BLUE
40
CRT_Green TV Luma
37 11/07 Delete TVout function from
DOCK_PWR_ON Spec <20> BLUE
D_DDCDATA
34
36
CRT_Blue TV chroma
35
33 Docking
<20> D_DDCDATA DDC_DATA TV composite
0V = Notebook S4/S5, Dock <20> D_DDCCLK
D_DDCCLK
D_HSYNC
30
DDC_Clock TV ground
31 VGA_GND
CIR_IN
<20> D_HSYNC 32 29 CIR_IN <35,39>
Hsync CIR input
off <20> D_VSYNC
D_VSYNC 26
Vsync PWR_ON
27 DOCK_PWRON
USB20_N3 28 25 D_MUTE_LED PA@R1107
PA@ R1107 1 2 33_0402_5%
2.5V = Notebook S3, Dock on <14> USB20_N3 USB- Mute_LED MUTE_LED <39>
USB20_P3 22 23 D_DOCK_SLP_BTN# PA@R1108
PA@ R1108 1 2 33_0402_5%
<14> USB20_P3 USB+ Sleep Botton DOCK_SLP_BTN# <39>
24 21 JACK_DET#
4V = Notebook S0, Dock on PA@ RJ45_MIDI3- 18
Digital gnd Jack Detect
19 R_VOL_UP# R1109 1 2 200_0402_5%
JACK_DET# <34>
<32> RJ45_MIDI3- MDI3- VOL_up DOCK_VOL_UP# <39>
PA@ D45 RJ45_MIDI3+ 20 17 R_VOL_DWN# R1110 1 2 200_0402_5%
<32> RJ45_MIDI3+ MDI3+ VOL_down DOCK_VOL_DWN# <39>
R1111 1 2 1K_0402_5% 2 RJ45_MIDI2- 14 15 SPDIFO_L PA@
+5VS <32> RJ45_MIDI2- MD2I- SPDIF
1 DOCK_PWRON RJ45_MIDI2+ 16 13 AUDIO_OGND GNDA PA@
<32> RJ45_MIDI2+ RJ45_MIDI1- MDI2+ Audio Output gnd DOCK_LOUT_C_R
+3VALW R1112 1 2 1K_0402_5% 3 10 11 DOCK_LOUT_C_R <34>
<32> RJ45_MIDI1- MDI1- Right headphone
RJ45_MIDI1+ 12 9 DOCK_LOUT_C_L DOCK_LOUT_C_L <34>
<32> RJ45_MIDI1+ RJ45_MIDI0- MDI1+ Left headphone DOCK_MIC_R_C
PA@ DAN202U_SC70 6 7
<32> RJ45_MIDI0- RJ45_MIDI0+ MDI0- Mic_Right DOCK_MIC_L_C
<32> RJ45_MIDI0+ 8 MDI0+ Mic_Left 5
1
2 3 AUDIO_IGND GNDA
Battery out Mic gnd
1
D PA@ +V_BATTERY DOCK_PRESENT @@R1114

R1114 1
4 1 2 2K_0402_5%
R1113 Battery out Dock_present
<41,47> SYSON# 2 PJP903
G 10K_0402_5% 41 +DOCKVIN
PA@ Q89 GND
S B+ 1 2 42
3
2N7002_SOT23-3 GND
45 GND GND 43
46 44 +DOCKVIN
PAD-OPEN 2x2m GND GND
C1340 1 2
CONN@ FOX_QL1122L-H212AR-7F @ 1000P_0402_50V7K
1 PA@
C1341 1 2
@ 1000P_0402_50V7K C1342
1000P_0402_50V7K
2
GNDA
Dock +3VL
11/17 Reserve
PRESENT
2
R1115
10K_0402_5%
MIC_Dock R_VOL_UP# DOCK_LOUT_C_R
1
R_VOL_DWN# DOCK_LOUT_C_L
<39> CONA#
Need 600 Ohm 500 mA 1 1
1000P_0402_50V7K
1000P_0402_50V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
1
R1116 D
1 1
DOCK_PRESENT 1 2 2 PA@ L64 C1343 C1344
G Q90 FBM-11-160808-601-T_0603 PA@ 2 2 PA@
22_0402_5% S 2N7002_SOT23-3 <34> DOCK_MIC_R PA@ 1 2 DOCK_MIC_R_C C1345 C1346
3
1
PA@ 2 2 PA@
PA@ R1117 PA@ 1 2 DOCK_MIC_L_C
<34> DOCK_MIC_L
2K_0402_5% L65
PA@ FBM-11-160808-601-T_0603 1 1 GNDA GNDA
2
C1347 C1348
220P_0402_50V7K 220P_0402_50V7K 11/17 Recommend
PA@ 2 2 PA@
GNDA GNDA
+3VS
SENSE_B# <34>
2
PA@
2
PA@ R1118
R1119 10K_0402_5%
10K_0402_5%
1
D
2009 7/1 Delete Q93, R1120
1
2 Q91 PA@
1
1 G 2N7002_SOT23-3
C S
3
PA@ Q94 2 C1349 R1121
PA@ MMBT3904_NL_SOT23-3 B PA@
1
R1122 C E 1 2 1 2 SPDIF_OUT <34>

3
DOCK_MIC_L_C 1 2 2 Q92 PA@ 220_0402_5%

10K_0402_5% B MMBT3904_NL_SOT23-3 0.1U_0402_16V7K PA@
2
2 E R1124
3
1
1
C1350 SPDIFO_L 1 2
PA@ R1123 0_0603_5% C1351 R1125
47K_0402_5% 1 PA@ 220P_0402_25V8J 110_0402_5%
1
PA@ 2 PA@
2
1U_0603_10V6K
PA@

DOCK CONN.
http://laptop-motherboard-schematic.blogspot.com/ MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2 1
Left\ side ESATA/USB combination Connector

+5VALW Left side USB Power Switch
+USB_VCCC
U55 +USB_VCCC
1
GND OUT
8 W=100mils JP53
2 7 1 USB
IN OUT VBUS
1000P_0402_50V7K
150U_B_6.3VM_R40M
D D
4.7U_0805_10V4Z
0.1U_0402_16V4Z
3 6 R479 1 2 0_0402_5% USB20_N0_R 2
USB_EN# IN OUT <14> USB20_N0 R480 1 USB20_P0_R D-
1 4
EN# OC#
5 1 1 1 2 0_0402_5% 3
D+
<14> USB20_P0
C1353
C1354
C1355
4
C1352 G547F2P81U MSOP 8P + GND
5
2 2 2 SATA_TXP4 GND
<11> SATA_TXP4 6
2 SATA_TXN4 A+ ESATA
<11> SATA_TXN4 7
PA@ A-
8
GND
<11> SATA_RXN4_C
C602 2 1 0.01U_0402_16V7K SATA_RXN4 9
B-
<11> SATA_RXP4_C
C603 2 1 0.01U_0402_16V7K SATA_RXP4 10
B+
11
R1126 GND
1 2 10K_0402_5% +5VALW PA@
WCM-2012-900T_0805 12
USB20_P0 USB20_P0_R GND
1 1 2 2 13 GND
14 GND
15 GND
USB20_N0 4 3 USB20_N0_R
4 3 TYCO_1759576-1
@ L66 CONN@
D20 D21
+5VALW 4 2 USB20_P0_R +5VALW 4 2 SATA_TXP4
VIN IO1 VIN IO1
Finger printer USB20_N0_R 3 IO2 GND

PJLCR05
1 SATA_TXN4 3 IO2 GND
PJLCR05
1
Change Finger printer from USB port7 to USB port 11 ESD request
PA@
C C
+3VS
PA@R1127
PA@R1127
1 2
PA@
1
C1356
0.1U_0402_16V4Z
0_0603_5%
BT Connector (SoftBreeze)Need change to New version
2 JP24
Change Bluetooth from USB port 6 to USB port 12
PA@ R1128 1 JP57
USB20_N11_R 1
<14> USB20_N11 1 2 0_0402_5% 2 10 8
USB20_P11_R 2 GND 8
<14> USB20_P11 1 2 0_0402_5% 3 7
PA@ R1129 3 7
4 6
4 6
3
@ R1130 5 5
5 5 USB20_N12_R BT_LED <40>
1 2 6 4 R488 2 1 0_0402_5%
6 4 USB20_N12 <14>
0_0402_5% 7 3 USB20_P12_R R487 2 1 0_0402_5%
GND 3 USB20_P12 <14>
@D46
@ D46 8 2
PACDN042_SOT23-3~D GND 2
9 1 +3VAUX_BT
ACES_85201-06051 GND 1
1
CONN@ ACES_87213-0800G
D23
CONN@
4 2 USB20_P12_R
+5VALW VIN IO1
USB20_N12_R 3 1
IO2 GND
PRTR5V0U2X_SOT143-4
ESD request
B
USB cable connector for Right side Q20 +3VAUX_BT B
JP55 SI2301BDS-T1-E3_SOT23-3
+5VALW 1 R491
1
S
0.1U_0402_16V4Z
D
2 +3VS 1 2 3 1
2
1U_0603_10V4Z
3 1
USB_EN# 3 0_0603_5%
<39> USB_EN# 4
4
1
C605
G
5 1 1 1
2
<14> USB20_N2 5 @ C606 C607 C608
6
<14> USB20_P2 6 2 R493
7
7 100K_0402_5%
8
<14> USB20_N1 8 2 2 2
9
2
<14> USB20_P1 9
10
10 0.01U_0402_16V7K 4.7U_0805_10V4Z
11 R494 1 2 10K_0402_5% C609 1 2 0.1U_0402_16V4Z

GND1 <14> BT_OFF
12
GND2
ACES_87213-1000G
CONN@
A A

USB, BT, eSATA
5
4
3 2
Date:
1
Sheet 37 of 55
1.0
5 4 3 2 1
D D
SPI ROM => 256K (EC code)

+3VL U25
U25 CONN@
20mils 8 4
VCC VSS
1
C610 3
0.1U_0402_16V4Z W
2
7 HOLD MX25L2005CMI-12G SOP 8P
1 2 SPI_FSEL# 1
<39> FSEL# S
R495 0_0402_5%
1 2 SPI_CLK_R 6
<39> SPI_CLK C
R496 0_0402_5%
<39> FWR# 1 2 SPI_FWR# 5 2 SPI_SO 1 2 FRD# FRD# <39>
R497 0_0402_5% D Q R498 33_0402_5%
WIESON G6179 8P SPI
SP07000F500 S SOCKET WIESON G6179-100000 8P SPIFLASH

WIESO_G6179-100000_8P
* SA00003GK00 ǂ S IC FL 2M MX25L2005CMI-12G SOP 8P (MXIC)

ǂS IC FL 2M W25X20AVSNIG SOIC 8P (WINBOND)
@ R233 @ C391
SA00003GM00 SPI_CLK_R 1 2 1 2
C 33_0402_5% 22P_0402_50V8J C
SPI ROM on PCH => 4M (ME code + System BIOS)

+3VS
+3VS
1
R658 1 2 SPI_WP# +3VS C773
3.3K_0402_5% 0.1U_0402_16V4Z U31
2
R659 1 2 SPI_HOLD# U31 CONN@
2
3.3K_0402_5% 8 4
@ R660 VCC VSS
1K_0402_5% SPI_WP# 3
W
32M AT25DF321-SU SOIC 8P
SPI_HOLD# 7
1
R661 HOLD
SPI_SB_CS# 1 2 1
<11> SPI_SB_CS# S
SPI_CLK_PCH 15_0402_5% 6
<11> SPI_CLK_PCH C R662
B SPI_SI SPI_SO_L 1 SPI_SO_R B
<11> SPI_SI 5 2 2 SPI_SO_R <11>
D Q
WIESON G6179 8P SPI 15_0402_5%
PA/OPP SA000031Q00 ǂS IC FL 32M AT25DF321-SU SOIC 8P
A A

BIOS ROM
5
4
3 2
Date:
1
Sheet 38 of 55
1.0
+3VL_EC
+3VS C612
VCC 3.3V+/-5% 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1000P_0402_50V7K
1 1 1 1 1 BATT_OVP 2 1
Ra 100K+/-5%
C613 C614 C615 C616 C617 100P_0402_50V8J
Board ID Rb V AD_BID min V AD_BID typ V AD_BID max DOCK_VOL_UP# R1223 1 2 10K_0402_5%
2 2 2 2 2 +3VL +3VL_EC +EC_AVCC
Blade UMA 0 0V 0V 0V 0.1U_0402_16V4Z 1000P_0402_50V7K DOCK_VOL_DWN# R1224 1 2 10K_0402_5%
R511
Blade SG 8.2K+/-5% 0.216V 0.250V 0.289V 1 2 +3VL 10/26 Add R1265 for ATE test jig
0_0805_5% For EMI
Bee UMA 18K+/-5% 0.436V 0.503V 0.538V +3VL_EC
1
KSO15 @C618
@ C618 1 2 100P_0402_50V8J
111
125
Bee DIS 33K+/-5% 0.712V 0.819V 0.875V SMB_EC_DA1 R512 1 2 2.2K_0402_5% R1265
22
33
96
67
9
SMB_EC_CK1 R513 1 2 2.2K_0402_5% U27 100K_0402_5% KSO10 @C619
@ C619 1 2 100P_0402_50V8J
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
KSO11 @C620
@ C620 1 2 100P_0402_50V8J
2
ATE_TEST <41> 9/11 Pin26 change to ME_EN
KSO14 @C621
@ C621 1 2 100P_0402_50V8J
GATEA20 1 21 @ R1204 1 2 22_0402_5%
<14> GATEA20 KB_RST# GA20/GPIO00 INVT_PWM/PWM1/GPIO0F FAN_PWM INV_PWM <22> KSO13
2 23 @C622
@ C622 1 2 100P_0402_50V8J
<14> KB_RST# SIRQ KBRST#/GPIO01 BEEP#/PWM2/GPIO10 ME_EN FAN_PWM <6>
<11> SIRQ 3 26 ME_EN <11>
LPC_FRAME# SERIRQ# FANPWM1/GPIO12 ACOFF KSO12 @C625
@ C625 1
<11,31> LPC_FRAME# 4 27 ACOFF <43> 2 100P_0402_50V8J
@ C623 @ R516 LPC_AD3 LFRAME# ACOFF/FANPWM2/GPIO13 0.01U_0402_16V7K
<11,31> LPC_AD3 5
LPC_AD2 LAD3 ECAGND KSO3
1 2 1 2 <11,31> LPC_AD2 7
LAD2 PWM Output C624 1 2 @C626
@ C626 1 2 100P_0402_50V8J
33_0402_5% <11,31> LPC_AD1 LPC_AD1 8 63 BATT_TEMP
LPC_AD0 LAD1 BATT_TEMP/AD0/GPIO38 BATT_OVP BATT_TEMP <42> +3VL_EC KSO6
15P_0402_50V8J @C627
@ C627 1 2 100P_0402_50V8J
<11,31> LPC_AD0 10 LAD0 LPC & MISC BATT_OVP/AD1/GPIO39 64
ADP_I BATT_OVP <42>
ADP_I/AD2/GPIO3A 65 ADP_I <43>
CLK_PCI_EC 12 AD Input 66 ADP_ID KSO8 @C628
@ C628 1 2 100P_0402_50V8J
<14> CLK_PCI_EC PCICLK AD3/GPIO3B ADP_ID <42>
1
PCI_RST# 13 75 Board_ID
<14> PCI_RST# ECRST# PCIRST#/GPIO05 AD4/GPIO42 SUS_PWR_DN_ACK R1169 KSO7 @C629
@ C629 1
+3VL_EC 1 2 37 ECRST# SELIO2#/AD5/GPIO43 76 SUS_PWR_DN_ACK <13> 2 100P_0402_50V8J
R517 47K_0402_5% 20 10K_0402_5%
<14> EC_SCI# SCI#/GPIO0E KSO4 @C631
@ C631 1
<11,34> HDA_RST#_CODEC 1 2 38 CLKRUN#/GPIO1D 9/11 Pin 76 change to SUS_PWR_DN_ACK 2 100P_0402_50V8J
R518 68 DAC_BRIG
2
DAC_BRIG/DA0/GPIO3C DAC_BRIG <21>
1
2 1 J4 0_0402_5% 70 VCTRL I2C_INT# KSO2 @C632
@ C632 1 2 100P_0402_50V8J
EN_DFAN1/DA1/GPIO3D IREF VCTRL <43>
C630 0.1U_0402_16V4Z DA Output 71 PV check BOM structure
JOPEN KSI0 IREF/DA2/GPIO3E AC_SET IREF <43> KSI0 @C633
@ C633 1
55 72 2 100P_0402_50V8J
2
SYSON SUSP# KSI1 KSI0/GPIO30 DA3/GPIO3F AC_SET <43>
56 KSI1/GPIO31
2009.08.17 R526 PU change the KSI2 57 +5V_TP KSO1 @C634
@ C634 1 2 100P_0402_50V8J
KSI3 KSI2/GPIO32 EC_MUTE#
58 83
connection from +3VL to +3VALW KSI3/GPIO33 PSCLK1/GPIO4A EC_MUTE# <34,35>
2
KSI4 59 84 USB_EN# R519 1 2 4.7K_0402_5% KSO5 @C635

@ C635 1 2 100P_0402_50V8J
PCI_RST# +3VALW KSI5 KSI4/GPIO34 PSDAT1/GPIO4B I2C_INT# USB_EN# <37>
R521 R522 +3VS 60 85 R520 1 2 4.7K_0402_5%
8.2K_0402_5% KSI6 KSI5/GPIO35 PSCLK2/GPIO4C MUTE_LED I2C_INT# <40> KSI3
8.2K_0402_5% 61 KSI6/GPIO36 PS2 Interface PSDAT2/GPIO4D 86
MUTE_LED <36>
@C636
@ C636 1 2 100P_0402_50V8J
KSI7 62 87 TP_CLK
KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E TP_CLK <40>
1
KSO0 39 88 TP_DATA KSI2 @C637

@ C637 1 2 100P_0402_50V8J
1
KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F TP_DATA <40>

1
R523 KSO1 40 KSO1/GPIO21
1
100K_0402_5% KSO2 41 KSO0 @C638

@ C638 1 2 100P_0402_50V8J
R526 R525 KSO3 KSO2/GPIO22 R524
42 97 1 2 0_0402_5%
10K_0402_5% 10K_0402_5% KSO4 KSO3/GPIO23 SDICS#/GPXOA00 DOCK_VOL_UP# AC_LED# <42> KSI5 @C639
@ C639 1
43 98 2 100P_0402_50V8J
2
+3VL_EC KSO5 KSO4/GPIO24 SDICLK/GPXOA01 DOCK_VOL_DWN# DOCK_VOL_UP# <36>

44 KSO5/GPIO25 Int. K/B 99 11/09 don't stuff when use C0
2
KSO6 SDIDO/GPXOA02 DOCK_VOL_DWN# <36> KSI4 @C640

@ C640 1
45 KSO6/GPIO26 Matrix 109 2 100P_0402_50V8J
2
SDIDI/GPXID0
8.2K_0402_5% 100K_0402_5%
KSO7 46 SPI Device Interface

KSO7/GPIO27
1
KSO8 47 KSO9 @C641

@ C641 1 2 100P_0402_50V8J
LID_SW# TP_BTN# KSO9 KSO8/GPIO28 FRD#
Ra KSO10
48
49
KSO9/GPIO29 SPIDI/RD# 119
120 R527 1 2 33_0402_5% FWR#
FRD# <38>
KSI6 @C642
@ C642 1 2 100P_0402_50V8J
KSO10/GPIO2A SPIDO/WR# FWR# <38>
R1239
Board ID pin change to Pin75 KSO11 50 SPI Flash ROM 126 R528 1 2 33_0402_5% SPI_CLK
KSO12 KSO11/GPIO2B SPICLK/GPIO58 FSEL# SPI_CLK <38> KSI7
51 128 R529 1 2 33_0402_5% @C643
@ C643 1 2 100P_0402_50V8J
2
KSO12/GPIO2C SPICS# FSEL# <38>

Board_ID KSO13 52
KSO13/GPIO2D
33K_0402_5%
KSO14 53 R530 1 2 10K_0402_5% +5VL KSI1 @C644

@ C644 1 2 100P_0402_50V8J
KSO14/GPIO2E
1
+3VL_EC +3VALW KSO15 54 73 CIR_IN

KSO15/GPIO2F CIR_RX/GPIO40 CIR_IN <35,36>
R1240
TP_BTN# 81 74 PCH_TEMP_ALERT#
<40> TP_BTN# KSO16/GPIO48 CIR_RLC_TX/GPIO41 PCH_TEMP_ALERT# <14>
OPP@ R1264
CONA# 82 89 FSTCHG
<36> CONA# KSO17/GPIO49 FSTCHG/SELIO#/GPIO50 STD_ADP FSTCHG <43>
90 STD_ADP <43>
BATT_CHGI_LED#/GPIO52
2
CAPS_LED# +3VL_EC
Rb 91
2
CAPS_LED#/GPIO53 CAPS_LED# <40>

PA@
@ R531 R532 SMB_EC_CK1 77 GPIO 92 BAT_LED#

10K_0402_5% 10K_0402_5%<40,42> SMB_EC_CK1 SMB_EC_DA1 78
SCL1/GPIO44 BATT_LOW_LED#/GPIO54
93 ON/OFFBTN_LED# BAT_LED# <40> KSO2 R1219 1 2 47K_0402_5%
<40,42> SMB_EC_DA1 SMB_EC_CK2 SDA1/GPIO45 SUSP_LED#/GPIO55 SYSON ON/OFFBTN_LED# <40>
<12> SMB_EC_CK2 79
SCL2/GPIO46 SM Bus SYSON/GPIO56
95
SYSON <31,40,41,45>
SMB_EC_DA2 80 121 VR_ON KSO1 R1220 1 2 47K_0402_5%
1
<12> SMB_EC_DA2 SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 AC_IN VR_ON <49>

127
@ R533 1 EC_PME# AC_IN/GPIO59
2 2 1
<14> PCI_PME# 0_0402_5% R534 10K_0402_5%
SLP_S3# 6 100 EC_RSMRST# ENBKL 2 1
<13> SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 EC_RSMRST# <13>
R1132 1 2 EC_PME# SLP_S5# 14 101 R535 1 2 @ R741
<40> WL_BLUE_BTN <13> SLP_S5# EC_SMI# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 EC_ON 0_0402_5% EC_LID_OUT# <12>
OPP@ 0_0402_5% 15 102 10K_0402_5%
<14> EC_SMI# EC_SMI#/GPIO08 EC_ON/GPXO05 EC_ON <44>
LID_SW# 16 103 WL_BLUE_LED# R536 100_0402_5%
<40> LID_SW# ESB_CLK_R LID_SW#/GPIO0A EC_SWI#/GPXO06 PM_PWROK_R WL_BLUE_LED# <40>
17 104 1 2
EC_PME# PCI_RST# ESB_DAT_R 18
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C GPO
ICH_PWROK/GPXO06
BKOFF#/GPXO08
105 BKOFF#_R R1222 1 2 22_0402_5%BKOFF#
BKOFF# <21>
PM_PWROK <13> 14" INT_KBD
EC_PME# 19 GPIO 106 M_PWROK
1 1 <13,26> EC_ACIN
EC_ACIN 25
EC_PME#/GPIO0D
EC_THERM#/GPIO11
WL_OFF#/GPXO09
GPXO10
107 TP_LED# M_PWROK <13>
TP_LED# <40> PV PWROK sequence issue CONN.( TYPE "D"
28 108
C645
0.1U_0402_16V4Z
C646
0.1U_0402_16V4Z
<31> WWAN_POWER_OFF
WWAN_POWER_OFF
EC_UTX
29
30
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
GPXO11
KB) JP19 CONN@
2 2 <31> EC_UTX EC_URX EC_TX/GPIO16 SLP_S4# KSO15
<31> EC_URX 31 110 SLP_S4# <13>
ON/OFFBTN# EC_RX/GPIO17 PM_SLP_S4#/GPXID1 ENBKL KSO10 1
<40> ON/OFFBTN# 32 112 ENBKL <22>
DIM_LED ON_OFF/GPIO18 ENBKL/GPXID2 EAPD_CODEC KSO11 2
<41> DIM_LED 34 114 EAPD_CODEC <34>
R538 1 NUM_LED# PWR_LED#/GPIO19 GPXID3 LAN_POWER_OFF_R KSO14 3
+3VL_EC 2 4.7K_0402_5%<40> NUM_LED# 36 GPI 115
NUMLED#/GPIO1A GPXID4 SUSP# KSO13 4
116
C647 GPXID5 PWRBTN_OUT# SUSP# <31,34,41,43,46,47,48,51> KSO12 5
117 PWRBTN_OUT# <13>
15P_0402_50V8J GPXID6 NMI_DBG# +3VL_EC KSO3 6
EMI solution CRY2 GPXID7
118 D24
KSO6 7
1 2 122
XCLK1 8
PA@ 123 124 +3VL_EC ADP_ID 2 1 KSO8
R595 1 ON/OFFBTN# XCLK0 V18R KSO7 9
<36> DOCK_SLP_BTN# 2 Y6 1 10
1
AGND
0_0402_5% KSO4
GND
GND
GND
GND
GND
RB751V_SOD323 11
1
3 4 @ C648 R540 KSO2
NC OSC R539 4.7U_0603_6.3V6K 10K_0402_5% KSI0 12
20M_0402_5% KB926QFD3_LQFP128_14X14 2 KSO1 13
2 1
11
24
35
94
113
69
NC OSC KSO5 14
2
D25 15
For C KSI3
2
32.768KHZ_12.5PF_Q13MC14610002 NMI_DBG# 16
1 2 PCI_SERR# PCI_SERR# <14>
KSI2
17
1 2 CRY1 Revision KSO0
+3VL_EC +3VL_EC KSI5 18
C649 RB751V_SOD323 KSI4 19
ECAGND
15P_0402_50V8J KSO9 20
21
1
1
R541 KSI6
EC DEBUG port +EC_AVCC L26 150K_0402_5% KSI7 22
23
0_0603_5% KSI1
24
9/11 Cap. sensor board change to +3VL L27 D26
G1
G2
2
2
R543 1 2 1 2 AC_IN 2 1 ACIN ACES_85201-2405
LAN_POWER_OFF_R ACIN <43>
1 2 C650 0.1U_0402_16V4Z 0_0603_5%
25
26
<32> LAN_POWER_OFF
0_0402_5%
RB751V_SOD323
1 2
+3VL_EC +3VL_EC +3VS +3VS C651 100P_0402_50V8J
4.7K_0402_5%
4.7K_0402_5%
1
2
4.7K_0402_5%
4.7K_0402_5%
PA@ PA@ 1
R1253 R1254 @ @
R544 R545 C652 @
PA@ 2
10P_0402_50V8J
2
R546 1 2 0_0402_5% ESB_CLK_R

<40> ESB_CLK
<40> ESB_DAT
R547 1 2 0_0402_5% ESB_DAT_R
EC KB926/KB Conn.
PA@ AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
http://laptop-motherboard-schematic.blogspot.com/ MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A B C D E
System & Caps-Lock LED Switch function LED(test) +5VS T/P Board (Inculde T/P_ON/OFF) TP ON/OFF
D47
White R1133 +5V_TP
<39> CAPS_LED#
1 2 1 2 +5VS_LED
Cap lock TouchPAD ON/OFF LED
1
HT-F196BP5_WHITE 470_0402_5% +5VS_LED
@ R1243 @ R1246 R1134 @
200_0402_5% 470_0402_5% 10K_0402_5%
SW1
White
1
1 D48 R1135 TJG-533-V-T/R_6P 1
Battery
2 1
2 1
2
1 2 1 2 +5VALW_LED R1136 R1137 3 1 TP_BTN# <39>
<39> BAT_LED#
200_0402_5% 200_0402_5%
HT-F196BP5_WHITE 200_0402_5% @ D60 @ D61
Charge LED HT-F196BP5_WHITE LTST-C191TBKT-5A_BLUE_0603~D
4 2
2
D49
PA PR
5
6
2N7002DW-7-F_SOT363-6
2N7002DW-7-F_SOT363-6
QSMF-C16E_AMBER-WHITE
White R1138
200_0402_5%
White
6 1
3 1
2
+5VS_LED D50
<11> SATA_LED#
1 2 1 2 +5VS_LED
PA@
AMBER White
Amber
White
Amber
White
@ Q110A @ Q110B
HDD LED AMBER White D51
1
3 4 1 2 +3VS OPP@
<14> HDDHALT_LED# R1139 DGPU_EDIDSEL <20,22> R1140
AMBER <14,23,41,47,51> DGPU_PWR_EN 2 5
200_0402_5%
1
Amber 10K_0402_5%
4
2
TP_LED#
TP_LED# <39>
White
1
D52 R1141 D
ON/OFFBTN_LED# 1 2 1 2 +5VALW_LED System 2
G
HT-F196BP5_WHITE 200_0402_5% Q95 On (TP_LED#=L)-> White
Power LED S
3
D60, D61 will light when switch to DIS mode 2N7002_SOT23-3
Off (TP_LED#=H)-> Amber
Change the Cap sensor board power plan to +3VL

9/11 reserve +3VL power for cypress Cap. board TP_DATA
TP_CLK
+5VS_LED +3VS +3VL +5VALW_LED
T/P Board Conn
2
2 D53 2
Capacitor Sensor Conn PSOT24C_SOT23-3
1
1
1
R1143 +5VALW +5V_TP
2009.10.23 Change R1151 to 300 ohm bead and
0_0805_5%
0_0805_5%
@ R1142
PA@ R1258
0_0805_5% R1144 1 2 0_0603_5%
1
add C1449 for EMI OPP@ @ R1145 @ C1358 +5V_TP
ESB_DAT 2 1 2 1
S
OPP@ R1146 2 0_0402_5%
D
1 3 1
2
2
<39> WL_BLUE_BTN
WL_BLUE_LED# OPP@ R1147 1 2 0_0402_5% JP59 33_0402_5% 15P_0402_50V8J 1
1 Q96 @ C1359
1
1
OPP@ R1148 0_0402_5% SI2301BDS-T1-E3_SOT23-3 0.1U_0402_16V4Z
G
1 2 2
2
<39> ON/OFFBTN_LED# 2
SMB_EC_CK1 PA@ R1149 1 2 0_0402_5% 3 @ R1150
<39,42> SMB_EC_CK1 ESB_CLK 3 2
PA@ R1151 1 2 0_0402_5% 4 10K_0402_5% JP23
<39> ESB_CLK ESB_DAT 4
ENE PA@ R1152 1 2 0_0402_5% 5 1
<39> ESB_DAT 5 1 TP_CLK
6 2 TP_CLK <39>
2
<39> I2C_INT# 6 2 TP_DATA
7 5 3 TP_DATA <39>
PA@ 7 NUM_LED# I2C_INT# G1 3
<39> NUM_LED# 8 6 4
SMB_EC_DA1 R1153 8 G2 4
<39,42> SMB_EC_DA1 1 2 0_0402_5% 9
9
33P_0402_50V8K
15P_0402_50V8J
0.1U_0402_16V4Z
OPP@ R1154 1 2 0_0402_5% 10 1 1 ACES_85201-04051
<39> ON/OFFBTN# 10
1
D
1 1 11 CONN@ 1 1
GND
C1449
C1360
C1361
Cypress 12 SYSON 2 @ Q97
GND <31,39,41,45> SYSON
@
C1362 1 G 2N7002_SOT23-3 @ C1363 @ C1364

2 2
@
@
@ R1155 C1365 15P_0402_50V8J 4.7U_0603_6.3V6K ACES_85201-1005N S 100P_0402_50V8J 100P_0402_50V8J
3
ESB_CLK 2 1 2 1 2 2 CONN@ 2 2
C1366
33_0402_5% 15P_0402_50V8J 2
3 3
Mini card LED +3VS
ON/OFF Button Connector Keyboard backlight
1
R1156
Conn 10K_0402_5%
2
+5VALW_LED
@ R1157 JP9 WL_BLUE_LED# <39>
JP10 +5VS_LED 1 2 1 Q98
1 2N7002_SOT23-3
1 2
1 2
1
ON/OFFBTN# 0_0805_5% D
2 3 5
ON/OFFBTN_LED# 2 3 G1
3 5 4 6 <37> BT_LED 2
3 G1 4 G2 G
4 6
4 G2
1
ACES_85201-04051 S
3
ACES_85201-04051 CONN@ R1158
CONN@ 100K_0402_5%
2
D54 RB751V_SOD323
<31> WL_LED# 1 2
1 2 WL_BLUE_LED#
Lid Switch Change the Lid switch power plan to +3VALW
<31> WW_LED#
D55 RB751V_SOD323
4
Connector +3VALW
1
JP11
4
1
<39> LID_SW# 2 2
3 3 G1 5
10P_0402_25V8K
0.1U_0402_16V4Z
1 1 4 4 G2 6
C1368
ACES_85201-04051
C1367
CONN@
2 2
KBD, ON/OFF, SW, CIR
A
B
C D
Date:
E
Sheet 40 of 55
1.0
5 4 3 2 1
+5VALW to +5VS Transfer +3VALW to +3VS Transfer +1.5V to +1.5VS Transfer

+5VALW SI7326DN-T1-E3_PAK1212-8 +5VS +3VALW +3VS +1.5V +1.5VS
U28 B+ SI7326DN-T1-E3_PAK1212-8
1 U29
B+ 2 1 FDMC8296_POWER33-8-5
5 3 2 B+ U58
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
5 3 1
10U_0805_10V4Z
10U_0805_10V4Z
R581 1 2
1
C1435
C1436
10U_0805_10V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
1 1 C669 1 1 1 5 3
1
C671
C672
C673
C674
C1433
D R583 330K_0402_5% D
1 1 1
4
C675 10U_0805_10V4Z R1251
2
330K_0402_5% 2
4
2 2 2 2 150K_0402_5% 2
2
2 RUNON_3VS 2 2
2
1
RUNON_1.5VS
2N7002DW-7-F_SOT363-6
RUNON
3
R584
6
1
470_0402_5% Q8B
1
R585 SUSP 5 R1216
+1.5V to +1.5VS Transfer
0.022U_0402_25V7K
470_0402_5% 1 SUSP 5 R1270
SUSP 2 01/03 Sparate+5VS Q10B C676 0_0402_5%
4
2N7002DW-7-F_SOT363-6 0.022U_0402_25V7K C1432 1 2 0.1U_0402_10V6K 750K_0402_5%
2
Q10A 1 and +3VS power +1.5V +1.5VS
1
1
2
2N7002DW-7-F_SOT363-6 C677 2 C1434 1 2 0.1U_0402_10V6K C770
4700P_0402_25V7K
timing
C1437 1 2 0.1U_0402_10V6K
2 2
9/20 change the C676 from 0.1u to 0.022u for power sequence. C1438 1 2 0.1U_0402_10V6K
9/20 change the C770 from 0.1u to 0.022u for power sequence.
+5VS to +5VSDGPU Transfer +1.8VS to +1.8VSDGPU Transfer +1.5V to +1.5VS_NV Transfer

+1.8VS SG@ +1.5V +1.5VSDGPU
Q109 +1.8VSDGPU B+ FDMC8296_POWER33-8-5
5A
300 mA
SI2301BDS-T1-E3_SOT23-3 SG@ U50
1
D
3 1 2
1
150K_0402_5%
470_0402_5%
10U_0805_10V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
5 3
470_0402_5%
R917
C C
1 1 1
C1074
R918
1U_0402_6.3V4Z
SG@ SG@ SG@ SG@
G
1 1
2
C1076
R594
C1081
C1079
SG@ @
C1078
4
SG@
2
+5VS +5VSDGPU 2 2 2
2
2 2
2N7002DW-7-F_SOT363-6
R1201 1 2 0_0603_5%
DGPUPWREN
R916
6
1U_0402_6.3V6K
DGPU_PWR_EN# 1 2 SG@ R1272 0_0402_5% SG@R1273 0_0402_5% SG@
DGPU_PWR_EN# 1 2 DGPU_PWR_EN# 1 2 Q17A
1K_0402_5%
1
D SG@ SUSP SUSP
1 1 2 5 1 2 2
C1454 DGPU_PWR_EN# 2 Q18
750K_0402_5%
0.1U_0402_25V4K
G @ R1274 0_0402_5% Q17B @ R1275 0_0402_5%
1
S SG@ SG@ 1
3
2
SG@ R1271
2N7002_SOT23-3 2N7002DW-7-F_SOT363-6 C1440
2
+1.8VS +1.8VSDGPU +1.5VS JP303 +1.5VSDGPU 2
R1202 1 2 0_0603_5% 1 2
DIS@
PAD-OPEN 4x4m
9/20 change R593 to 22ohm for Intel check list update. +5VALW
Discharge circuit DIM LED +5VALW_LED
+5VS +3VS +1.5VS +VCCP +1.5V +0.75VS +1.05VS R1244 +3VALW

1 2
0_0603_5%
1
1
JP304
S
R588 R589 R590 R591 R592 R593
D
3 1 1 2
B R1203 B
470_0402_5% 470_0402_5% 220_0402_5% 470_0402_5% 470_0402_5% 22_0402_5% @ Q99 1 PAD-OPEN 2x2m
470_0402_5% C1370
G
2
2
2N7002DW-7-F_SOT363-6
2N7002DW-7-F_SOT363-6
2N7002DW-7-F_SOT363-6
2N7002DW-7-F_SOT363-6
2N7002DW-7-F_SOT363-6
@ R1162 0.1U_0402_16V4Z
2
10K_0402_5%
2
6
2
1
Q9A Q9B Q8A Q112 Q7A Q7B D
1
D SUSP Q103 DIM_LED#

2
SUSP 2 SUSP 5 SUSP 2 SUSP 2 SYSON# 2 SUSP 5 G 2N7002_SOT23-3
G S
3
S 2N7002_SOT23-3
1
1
D @
DIM_LED 2 Q100
<39> DIM_LED
9/20 change R590 to 220ohm for Intel check list update. G 2N7002_SOT23-3
S
3
+3VL +3VL +3VS +5VALW 10/28 Add for ATE test jig. +5VS +5VS_LED
1
S
R1245 +3VS
G
R586 R587 2 1 2
<39> ATE_TEST
1
0_0603_5%
100K_0402_5% 100K_0402_5% R926 JP305
S
2N7002DW-7-F_SOT363-6
2N7002DW-7-F_SOT363-6
SI2301BDS-T1-E3_SOT23-3 10K_0402_5%
D
3 1 1 2
2
D
Q115
1 1
<36,47> SYSON# SUSP <47>

@ Q101 1 PAD-OPEN 2x2m
2
C1371
G
2
6
R1266 0.1U_0402_16V4Z
Q6A Q6B 1K_0402_5% DGPU_PWR_EN#
DGPU_PWR_EN# <28> 2
1
A D SG@ A
2 5
2
<31,39,40,45> SYSON SUSP# <31,34,39,43,46,47,48,51>

2 Q86
<14,23,40,47,51> DGPU_PWR_EN DIM_LED#
G 2N7002_SOT23-3
1
R925 SG@ S
3
100K_0402_5%

2
H1 H3 H13 H4 H5 H6 H7 H8 H9 H10 H15 H16 H17 H18 H19 H20 H11 FM1 FM2 Issued Date 2007/08/28 2006/07/26 Title
HOLEA HOLEA HOLEC HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEC HOLEC HOLEA 1
Deciphered Date
1
DC/DC Interface
http://laptop-motherboard-schematic.blogspot.com/ FM3 FM4 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Calpella DIS LA-4107P 1.0
1
1 1 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2 1
A B C D
+3VALW
PQ3
3
TP0610K-T1-E3_SOT23-3
+3VL
1 PR9 2 connect to KBC pin97
BATT
1 2 100K_0402_5% AC_LED# <39> 1
340K_0402_1%
PR1 1
+5VALW
ADP_ID <39>
0.01U_0402_25V7K
2 1
PC12
2
1
1
PC1
PR8 PD4 @1000P_0402_50V7K
499K_0402_1%
PR4 1
2K_0402_5% PR2
10K_0402_5%
VIN +DOCKVIN
2
1
2
ACES_88334-057N RLZ3.6B_LL34
ADP_SIGNAL 1 2
8
5 PR3 PR5
5 10K_0402_5% 10K_0402_5%
4 3
P
4 PL1 PL2 +
3 3 0 1 2 1 BATT_OVP <39>
2 SMB3025500YA_2P SMB3025500YA_2P 2
2 -
G
ADPIN
105K_0402_1%
1 1 1 2 2 1
PR6 1
0.01U_0402_25V7K
4
1
PJP1 PU1A
PC6
LM358ADT_SO8
100P_0402_50V8J
1000P_0402_50V7K
2
2
100P_0402_50V8J
2
1
1
PC5
PC4
PD1 PC3
2
2
PC2
1000P_0402_50V7K
PJSOT24CW _SOT323
1
2 2
VMB
PL3 BATT
PJP2 HCB2012KF-121T50_0805
8 8 1 2
7 PL4
7
6 EC_SMD PJSOT24CW _SOT323 HCB2012KF-121T50_0805
PH1 under CPU botten side :
6 PD2
EC_SMC
5 5
4 3
1 2 CPU thermal protection at 90 +-3 degree C
4
1
3 3 1
2 2 2
1 PC8 PC9
2
1 1000P_0402_50V7K 0.01U_0402_50V4Z PR7

GND 9 PD3
10 +5VS 604K_0402_1%
GND
3 SUYIN_200275MR008GXOLZR
3
1 CPU 1 2
3
2
1
PJSOT24CW _SOT323
1
1
PR14 PH1
PR13 100_0402_5% 10K_TH11-3H103FT_0603_1%
100_0402_5%
2
EN0_TRIP <44>
2
2
SMB_EC_DA1 SMB_EC_DA1 <39,40> PR10
8
200K_0402_1%
1
D
1 2 5
P
SMB_EC_CK1 + PQ1
SMB_EC_CK1 <39,40> 0 7 2
+5VALW 1 2 6 G SSM3K7002FU_SC70-3
-
G
BAT_ID <43> PR11 PU1B S
3
1 150K_0402_1%
4
1
1
LM358ADT_SO8
1
PC10 PR12
PR16 2.37K_0402_1%
6.49K_0402_1% +3VL 0.22U_0603_10V7K PR15
2
1 2 150K_0402_1% PC11
2
2
1000P_0402_50V7K
2
1
PR17
1K_0402_5%
BATT_TEMP <39>
2
4 4

DC Connector/CPU_OTP
A
http://laptop-motherboard-schematic.blogspot.com/ B
C
Date:
D
Sheet 42 of 55
1.0
A B C D
P4 B+
BATT
VIN P2
PQ102
FDS6675BZ_SO8
PR102 1 8
PQ101 PQ103 PL101 2 7
@1000P_0402_50V7K
1 1
SI4835BDY-T1-E3_SO8 SI4459ADY_SO8 0.012_2512_1% HCB2012KF-121T50_0805 3 6
1
8 1 1 8 1 4 1 2 5
470P_0402_50V7K
CHG_B+
1000P_0402_50V7K
PR103
PC132
7 2 2 7
1
47K_0402_5%
PC129
6 3 3 6 2 3
2
5 5 PC133 1 2
270P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PR101 @470P_0402_50V7K VIN
1 2
1
47K_0402_5% PR104 ACDET
47P_0402_50V8J
1
0_0402_5%
PC103
PC104
PC105
PC134
PC130
1 2 PC102
0.1U_0603_25V7K
<39> AC_SET 1 2 ACSET 1U_0603_6.3V6M
2
1
3
PR105
PC101
2
1
1
10K_0402_5%
0.1U_0603_16V7K
PC108
1
1
2
2
1
2 PC107 PR140 PC109 ACOFF#
200K_0402_5%
2
1
@0.01U_0402_16V7K 100K_0402_5% @0.1U_0603_25V7K
PC106
PR106
1
2
2
PR107 CHGEN# CHG_B+
2
47K_0402_1% PQ104 PR108
1 2 2 DTA144EUA_SC70-3 10_1206_5%
1
1
1 2 2 ACOFF <39>
LPMD
ACN
CHGEN
LPREF
ACSET
ACDET
ACP
PQ105 <31,34,39,41,46,47,48,51> SUSP# 29
6
5
6
7
8
DTC115EUA_SC70-3 PR110 TP PC110
3
PC128 0_0402_5% 1U_0805_25V6K
3
PQ109A PR109 1 2 1 2 8 28 1 2 PQ106
150K_0402_5% IADSLP PVCC PC111 DTC115EUA_SC70-3
2
2N7002KDW-2N_SOT363-6 @180P_0402_50V8J 0.1U_0402_10V7K PQ108
2
9 27 BST_CHG 1 2 4 AO4466L_SO8
1
AGND BTST
PC112 BQ24740VREF PU101
PACIN_1 1 2 10 BQ24740RHDR_QFN28_5X5 26 DH_CHG BATT
VREF HIDRV PL102
PR112
3
2
1
3
1U_0603_6.3V6M +3VL 10U_LF919AS-100M-P3_5.3A_20%

PR111 11 25 LX_CHG 1 2 1 4
3K_0402_1% PQ109B VDAC PH
1
PACIN 1 2 5 PD102 2 3
5
6
7
8
2N7002KDW-2N_SOT363-6 PR113 VADJ 12 24 REGN 2 1 PR141
PD101 140K_0402_1% VADJ REGN PQ110 4.7_1206_5%
4
ACOFF# PR114 RLS4148_LL34-2 AO4468L_SO8 0.015_1206_1%

1 2
@1000P_0402_50V7K
2 2
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
43.2K_0402_1% 13 23 DL_CHG
2
2 2
EXTPWR LODRV
1
1SS355_SOD323-2<39> VCTRL 1 2
PC113
PC114
PC115
PC116
PC131
PC136
4
1
14 22 PC135
2
ISYNSET PGND
1
470P_0603_50V8J
DPMDET
1
1
IADAPT
PC117 PR115 1 2
SRSET
CELLS
1
0.1U_0603_16V7K 100K_0402_1% PC119
SRN
SRP
2
3
2
1
BAT
PR116
2
15K_0402_1% 1U_0603_10V6K PC118
2
0.1U_0402_10V7K
15
16
17
18
19
20
21
PR117
100K_0402_5% BQ24740VREF
IADAPT
PR118
Charge Detector 1 2
1
10K_0402_5%
1 2
<39> ADP_I 47K_0402_5%
1
D PR119
100P_0402_50V8J
0.22U_0603_10V7K
1
1
PQ111 2 BAT_ID <42>
2
SSM3K7002FU_SC70-3
PC120
PC121
G
S
BATT
2
3
SRP
SRN
0.1U_0603_25V7K
@0.1U_0603_25V7K
VIN
PR120
2 1 IREF <39>
PC122
133K_0402_1%
PC124
2
1
PC123
1
PD104 0.1U_0402_10V7K PR122
2
1SS355_SOD323-2 PR121 681K_0402_1%
200K_0402_1% 1 2
2
PR123
1
1M_0402_5%
3
1 2 3
VIN_1
PR124
+3VL VIN 1K_0402_5%
VIN 1 2
1
+3VL ACIN <39>
1
PR125
47_1206_5% PR126
1
100K_0402_1% PR127
10K_0402_5%
VIN PR130 10K_0402_1%

2
8
+3VL 2.15K_0402_1% PU102B
PR128
10K_0402_1%
2
1 2 5
P
+
1
PACIN
PR129
7
2
1
O
PR131 6
100K_0402_5%
G
PC125 CHGEN# -
133K_0402_1%
2
1
0.1U_0603_25V7K PC126 LM393DG_SO8
PR132
2
4
PR133
6
1
0.047U_0402_16V7K 10K_0603_0.1%
2
PR134
2
2
3 PQ112A PD103 10K_0402_5%
P
2
+ RLZ4.3B_LL34
1 2
O
1
2 2N7002KDW-2N_SOT363-6
2
G
- PU102A
PR135
1
LM393DG_SO8 FSTCHG#
4
10K_0603_0.1% PR136
3
60.4K_0402_1%
2
1 2 VIN_1
1.24VREF PQ112B
<39> FSTCHG 5
2N7002KDW-2N_SOT363-6
STD_ADP <39>
4
PU104
4 3 1.24VREF
ACDET REF CATHODE
1 2
1
PC127 2
PR137 NC
22P_0402_50V8J
1
4 4
20K_0402_1% 5 1
100K_0402_1%
2
ANODE NC
PR138
LMV431ACM5X_SOT23-5
2

Charger
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
A B C D
A B C D E
2VREF_51125
1U_0603_16V7
1
1 1
PC302
2
PR301 PR302
13.7K_0402_1% 30.9K_0402_1%
1 2 1 2
PR303 PR304
B+ B++
20K_0402_1% 20K_0402_1%
B++
PL301 1 2 1 2
HCB2012KF-121T50_0805
1 2 +3VLP
ENTRIP2
ENTRIP1
PR305 PR306
2200P_0402_50V7K
0.1U_0402_25V6
4.7U_0805_25V6-K
100K_0402_1% 113K_0402_1%
0.1U_0402_25V6
4.7U_0805_25V6-K
4.7U_0805_25V6-K
1
1
PC316
PC301
PC303
1 2 1 2
2200P_0402_50V7K
10U_0805_6.3V6M
1
PC304
PC305
PC318
PC317
2
2
6
5
6
7
8
PU301
PC306
TONSEL
ENTRIP2
VFB2
VFB1
ENTRIP1
VREF
25 PQ302
PQ301 P PAD
2 S TR AO4932 2N SO8 AO4466L_SO8 2
2
1 D1 1G 8
2 D1 1S/2D 7 7 VO2 VO1 24 4
3 G2 1S/2D 6
4 PR308 PC308
S2 1S/2D 5 PR307
8 VREG3 PGOOD 23
2.2_0402_5% 0.1U_0402_10V7K
1 2 1 2 BST_3V 9 22 BST_5V 1 2 1 2
3
2
1
0_0402_5% VBST2 VBST1
PL302 PC307 UG_3V 10 RT8205AGQW 21 UG_5V PL303
3.3UH_SIQB74B-4R7PF_5.9A_20% 0.1U_0402_10V7K DRVH2 DRVH1 4.7UH_PCMC063T-4R7MN_5.5A_20%
2 1 LX_3V 11 20 LX_5V 1 2
+3VALWP LL2 LL1
5
6
7
8
LG_3V 12 19 LG_5V +5VALWP
DRVL2 DRVL1
SKIPSEL
4.7_1206_5%
@4.7_1206_5%
VREG5
150U_D_6.3VM
1
1
1
VCLK
1
GND
B++
EN0
VIN
+ PR309
PC309
220U_6.3VM_R15
1
+
PR315
PR316
PC310
1 2 4
1M_0402_1% PC313
13
14
15
16
17
18
2 @22U_0805_6.3V6M
2
2
2
1
<42> EN0_TRIP
@680P_0603_50V7K
680P_0603_50V7K
3
2
1
VL PQ304
191K_0402_1%
1
1
AO4712L_SO8
PC314
PC315
PR311
2
2
1
PR318
PC311
10U_0805_10V6K
1 2
0_0805_5%
2
3 3
+3_5V PWR_OK <13>
1
B++
ENTRIP2
0.1U_0603_25V7K
6ENTRIP1
2
PC312
2VREF_51125
3
PQ305A PQ305B
2 5
2N7002KDW -2N_SOT363-6 2N7002KDW -2N_SOT363-6
VL +5VL
1
PJP304
2 1
PJP302 PAD-OPEN 2x2m
1 2 VL +5VALW P 1 2 +5VALW (4.5A,180mils ,Via NO.= 9)
PR313 +3VLP +3VL
PAD-OPEN 4x4m
100K_0402_5% PJP301
1
D PQ307 PJP303
2 1
2 +3VALW P 1 2 +3VALW (3A,120mils ,Via NO.= 6)
G PAD-OPEN 2x2m
S SSM3K7002FU_SC70-3
PAD-OPEN 4x4m
3
EC_ON <39>
1
4 4
100K_0402_5%
PR314
2

3.3VALWP/5VALWP
Calpella DIS LA-4107P 1.0
A
B
C D
E
Sheet 44 of 55
5 4 3 2 1
D D
1.5V_B+ PL402 B+
HCB1608KF-121T30_0603
2 1
PR404
2 1
<31,39,40,41> SYSON
0_0402_5% PC406
1
@0.1U_0402_10V7K
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
0.1U_0402_25V6
2
PC408
PC402
PC403
PC407
PR405 PC409
2
2.2_0402_5% 0.1U_0402_10V7K
BST_1.5V 1 2 1 2
UG1_1.5V 4
15
14
1
PU401 PQ401
PR406 PR407 AON7408L_DFN8-5
EN_PSV
TP
VBST
3
2
1
255K_0402_1% 0_0402_5% +1.5VP
1 2 2 13 UG_1.5V 1 2 PL401
C TON DRVH 2.2UH_PCMC063T-2R2MN_8A_20% C
+1.5VP 1 2 3 12 LX_1.5V 1 2
PR408 0_0402_5% VOUT LL
+5VALW 1 PR403 15.4K_0402_1%
+5VALW 2 4 V5FILT TRIP 11 1 2
PR409 PR401
5
6
7
8
1
+1.5VP 1 2 FB_1.5V 5 10 +5VALW +5VALW 1
316_0402_1% VFB V5DRV PR410
330U_D2_2.5VY_R15M
1
1
10.2K_0603_0.1% LG_1.5V PQ402 @4.7_1206_5% +
PC401
6 PGOOD DRVL 9
2
PGND
PC411 PC410 S TR FDS6690AS_NL 1N SO8
GND
1
1U_0603_10V6K 4.7U_0805_10V6K PC405
2
1 2
PR402 4.7U_0805_6.3V6K 2
4
1
10K_0603_0.1%
8
TPS51117RGYR_QFN14_3.5x3.5
PC412
2
@680P_0603_50V7K
3
2
1
B B
PJP401
+1.5VP 1 2 +1.5V (8A,320mils ,Via NO.= 16)

PAD-OPEN 4x4m
A A

+1.5VP
Calpella DIS LA-4107P 1.0
5
4
3 2
1
45 of 55
A B C D
1 1
B+ PL702
HCB2012KF-121T50_0805
1 2 VCCP_B+
2200P_0402_50V7K
0.1U_0402_25V6
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
+3VS +VCCP
1
1
PC707
PC708 1 2
PR705 PR706 PR707
PC704
PC705
PC706
2
2
1K_0402_5% @1K_0402_5% 1 2 1 2 0_0603_5%
PR708
2.2_0603_5% PC709
BST_VCCP
2
DH_VCCP
LX_VCCP
0.22U_0603_16V7K
+5VALW
<6> VTTPW RGOOD
DH_VCCP1
5
6
7
8
PR709
0_0402_5% PR710 PQ701
17
16
15
14
13
PU701 2.2_0603_5% AO4474L_SO8
1 2
UG
GND
PGOOD
PHASE
BOOT
+6269_VCC
2
4
1 VIN PVCC 12 1 2 PC710
+6269_VCC 2.2U_0603_6.3V6K
3
2
1
2 11 DL_VCCP PL701
VCC LG 0.47UH_FDV0630-R47M-P3_18A_20%
1
PC711 PR711 ISL6269ACRZ-T_QFN16_4X4 1 2

2
2.2U_0603_6.3V6K 0_0402_5%
+VCCP 2
1 2 3 10 +VCCP
2
FCCM PGND
1
1
PR712 + PC701
1 2 4 9 SE_VCCP 1 2 4.7_1206_5% 330U_D2_2V_Y
<31,34,39,41,43,47,48,51> SUSP# EN ISEN PR704 PC702 1 1
PR713
COMP
2
FSET
6.98K_0402_1%
0_0402_5%
2
+ +
VO
330U_D2_2V_Y PC703
FB
4
1
2
5
8
2 2 330U_D2_2V_Y
PC712 PQ702 PC713
2
3
2
1
1
@0.1U_0402_10V7K +VCCP AON6718L_PSO8 680P_0603_50V7K
FB_VCCP
27.4K_0402_1%
0.01U_0402_16V7K
1
1
PR714
49.9K_0402_1%
PR715
PC714
2
1
2
6800P_0603_50V7K
PC715
22P_0402_50V8J
2
1
PC716
2
3 3
1 2 1 2 1 2+VCCP
<9> VTT_SELECT PR701 PR702 PR716
35.7K_0402_1% 1.58K_0402_1% 10_0402_5%
1
VTT_SELECT= Low, 1.1V PR703 PC717 1 2

1.96K_0402_1% PR717 VTT_SENSE <9>
VTT_SELECT= High, 1.05V
2
0_0402_5%
2
@0.1U_0402_10V7K
4 4

1.05V_VCCP
A
C
Date:
D
Sheet 46 of 55
1.0
5 4 3 2 1
+1.5V
PU601
1 VIN VCNTL 6 +5VALW
@10U_0805_10V6K
2 GND NC 5 +5VALW
PC602
1
D PC601 3 7 +3VS D
VREF NC
1
10U_0805_10V6K PC607
1
PR601 PC603 1U_0603_10V6K
4 VOUT NC 8
1K_0402_1% 1U_0603_10V6K
2
+3VALW 9
2
TP
1
G2992F1U_SO8 PC608
6
PR614 PU602 10U_0805_10V6K
2
1
10K_0402_1% 5
VCNTL
VIN
7
+0.75VSP
0.1U_0402_16V7K
POK
1
PQ601 4
SSM3K7002FU_SC70-3 VOUT
+1.8VSP
1
D
PR602 3
2
VOUT
1
2 1K_0402_1%
2
PQ602 G PC605 SUSP# 1 2 8 2
<31,34,39,41,43,46,48,51> SUSP#
2
EN FB
2
SSM3K7002FU_SC70-3 10U_0805_6.3V6M PR605
PC604
S
GND
3
2
1
1
D 0_0402_5%
PR603
PR604
TP 9
1
1 2 2 PC610
<6> 1.5VSCPU_DRAM_PWRGD G PC609 22U_0805_6.3V6M
PR613
2
1
0_0402_5% S PC606 @0.1U_0402_10V7K
2
1
1
@0.1U_0402_10V7K
@0_0402_5%
@0_0402_5%
PR606
PC617 APL5930KAI-TRG_SO8 15K_0402_1% PC611
2
@0.1U_0402_10V7K 150P_0402_50V8J
2
1
<36,41><41>
SYSON# SUSP
PR607
12K_0402_1%
2
C C
+3VS
1
PR608
10K_0402_5%
2
1.1VS_POK <28>
PJP601
+0.75VSP 1 2 +0.75VS (2A,80mils ,Via NO.= 4) +5VALW
PAD-OPEN 3x3m +1.5VS
1
PC612
PJP602 1U_0603_10V6K
2
+1.8VSP 1 2 +1.8VS (1.5A,60mils ,Via NO.= 3) <BOM Structure>
1
6
PU603 PC613
PAD-OPEN 3x3m
5 10U_0805_10V6K
VCNTL
2
SUSP# VIN
1 2 7 POK <BOM Structure>
B PR612 4 B
PJP603 @0_0402_5% VOUT
+1.1V_PCIE 1 2 +1.1VSDGPU (3A,120mils ,Via NO.= 6) <14,23,40,41,51> DGPU_PWR_EN VOUT 3 +1.1V_PCIE
1
PAD-OPEN 3x3m 1 2 8 EN FB 2
PR609 PC615
GND
1
0_0402_5% 9 22U_0805_6.3V6M
2
TP
1
PC614
1
@0.1U_0402_10V7K PR610
15K_0402_1% PC616
2
@47P_0402_50V8J
2
APL5930KAI-TRG_SO8
1
PR611
39.2K_0402_1%
2
A A

0.75VP/1.8VSP/1.1V_PCIE
5 4 3 2 1
A B C D
1 1
PR504 PL502
2 1 1.05V_B+
<31,34,39,41,43,46,47,51> SUSP# HCB1608KF-121T30_0603
0_0402_5% PC505 1 2 B+
1
@0.1U_0402_10V7K
2200P_0402_50V7K
0.1U_0402_25V6
4.7U_0805_25V6-K
4.7U_0805_25V6-K
2
1
PC506
PC507
PC502
PC503
PR505 PC508
2
5
2.2_0402_5% 0.1U_0402_10V7K
BST_1.05V 1 2 1 2
15
14
1
PU501 4
PR506 PR507 PQ501
EN_PSV
TP
VBST
2 255K_0402_1% 0_0402_5% AON7408L_DFN8-5 2
1 2 2 13 UG_1.05V 1 2 UG1_1.05V PL501 +1.05VSP

TON DRVH 2.2UH_PCMC063T-2R2MN_6A_20%
3
2
1
+1.05VSP 1 2 3 12 LX_1.05V 1 2
PR508 0_0402_5% VOUT LL
+5VALW 1 PR503 13K_0402_1%
+5VALW 2 4 V5FILT TRIP 11 1 2
1
PR509 PR501
316_0402_1% +1.05VSP1 1 2 FB_1.05V 5 VFB V5DRV 10 +5VALW +5VALW PQ502
PR510
4.12K_0402_1% 1
1
1
6 9 LG_1.05V FDMC8296_POW ER33-8-5 @4.7_1206_5%
PGOOD DRVL
2
PGND
PC509 PC510 +
GND
220U_B2_2.5VM_R25M
2
1U_0603_10V6K 4.7U_0805_10V6K 4 PC504
2
2
1
4.7U_0805_6.3V6K
1
1
PR502 TPS51117RGYR_QFN14_3.5x3.5 2
7
8
10.2K_0402_1% PC511
PC501
@680P_0603_50V7K
3
2
1
2
2
1
PR512
10_0402_5% PR511
0_0402_5%
2
PJP501
+1.05VSP
1 2 (6A,320mils ,Via NO.= 16)

+1.05VS
+1.05VSP +1.05VS
3
Close PCH PAD-OPEN 4x4m
3
4 4

1.05VSP
A
C
Date:
D
Sheet 48 of 55
1.0
8 7 6 5 4 3 2 1
+VCCP CPU_B+ PL203

HCB2012KF-121T50_0805
2 1 GFX_B+
1 PR201 2
1 PR204 2
2
PL204
1K_0402_1%
@1K_0402_1%
@1K_0402_1%
@1K_0402_1%
@1K_0402_1%
@1K_0402_1%
HCB2012KF-121T50_0805
1K_0402_1%
1PR202
1PR203
1PR205
1PR206
1PR207
2 1
0.1U_0402_25V6
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
B+
1
H_VID0
PC205
PC206
PC207
PC208
PC212
H <9> H_VID0 H
PC211
<9> H_VID1 H_VID1
2
5
6
7
8
H_VID2
100U_25V_M
@100U_25V_M
<9> H_VID2
PQ202 1 1
H_VID3 AO4406AL 1N SO8
PC209
PC210
<9> H_VID3 + +
1 PR210 2
H_VID4
1K_0402_1%
<9> H_VID4
1 PR208
1 PR209
4
1K_0402_1%
@1K_0402_1%
H_VID5 2 2
<9> H_VID5
<9> H_VID6 H_VID6
3
2
1
2
2
PR211 0_0402_5% PR215 PC213
2.2_0603_5% 0.22U_0603_10V7K
1 PR212
1 PR213
1 PR214
1 2
1K_0402_1%
1K_0402_1%
1K_0402_1%
@1K_0402_1%
<39> VR_ON
BOOST_CPU2 PR218
1PR216
2 1 1 2
PR217 0_0603_5% 0.36UH +-20% MPO104F-R36H1 30A
+VCCP 2 1 UGATE_CPU2 2 1 PL202
G 1K_0402_1% PR219 0_0402_5% G
<9> H_DPRSLPVR 1 2 PHASE_CPU2 4 1 +VCC_CORE

2 PR220 1 LF2 3 2
5
@1K_0402_1% V2N
1
PQ204
10K_0402_1%
3.65K_0603_1%
1
1
+3VS <19> CLK_EN# PR222 TPCA8036-H_SOP-ADV8-5 PR221
1.91K_0402_1% 4.7_1206_5% PR225
CLK_EN# 1_0402_5%
PR224
1 2
1
LGATE_CPU2
PR223
4
2
PR227 PR226 VSUM-
680P_0603_50V7K
1
0_0402_5% 1.91K_0402_1%
2
3
2
1
PC214
1 2
2
<13,19> VGATE PR228 @1K_0402_5% ISEN2
+VCCP 1 2
VSUM+
F PR229 0_0402_5% F
<9> H_PSI# 1 2
PR230
2 1
1K_0402_1%
1 2
PR231 147K_0402_1%
PC215
PR232 1U_0603_10V6K
40
39
38
37
36
35
34
33
32
31
+VCCP 1 2
68_0402_5% PU201 1 2
CLK_EN#
VID6
VID5
VID4
VID3
VID2
VID1
VID0
DPRSLPVR
VR_ON
1 2
<6> H_PROCHOT# 30
PR233 0_0402_5% BOOT2
29
UGATE2
1 28
PGOOD PHASE2
2 27
PSI# VSSP2
3 26
RBIAS LGATE2
4 25 +5VALW
VR_TT# VCCP
E 5 24 E
NTC PWM3
6 23
VW LGATE1
7 22
COMP VSSP1
8 21
FB PHASE1
1 2 9
ISEN3
UGATE1
10 ISL62883HRZ-T_QFN40_5X5
BOOT1
ISUM+
ISEN2
ISEN1
ISUM-
VSEN
IMON
PC216 1 2
8.06K_0402_1%
1U_0603_10V6K
VDD
1000P_0402_50V7K
RTN
VIN
22P_0402_50V8J 41
AGND
1
0_0402_5%
PC217
PC218
PR234
PR235
11
12
13
14
15
16
17
18
19
20
2
390P_0402_50V7K
1 PR236 2 1 2
2
562_0402_1%
PC219
PR238 0_0402_5%
1 2 1 2 1 2
PC220
10P_0402_50V8J PR237 PR239 0_0402_5% IMVP_IMON <9>
D 3.01K_0402_1% 1 2 CPU_B+ D
1 2 1 2
0.22U_0603_25V7K
PC221
150P_0402_50V8J PR240 PR241 1_0402_5%
412K_0402_1% 1 2 CPU_B+
+5VALW
1
1
PC222
PC223
PC224
1U_0603_10V6K
0.22U_0603_25V7K
ISEN2
PR242
0.22U_0603_10V7K
0.22U_0603_10V7K
ISEN1 10.5K_0402_1%
0.1U_0402_25V6
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
5
6
7
8
2
PQ201
1
BOOST_CPU1
VSSSENSE AO4406AL 1N SO8
PC201
PC202
PC203
PC204
PC228
PR243
PC227
1
0_0603_5%
PC225
PC226
2
UGATE_CPU1 2 1 4
2
VSUM-
PR244 PC229
C 2.2_0603_5% 0.22U_0603_10V7K C
3
2
1
VSUM+ 2 1 1 2 0.36UH +-20% MPO104F-R36H1 30A
PL201
1
PHASE_CPU1 4 1 +VCC_CORE
1
PR245
2.61K_0402_1%
0.047U_0603_16V7K
1
82.5_0402_1% LF1
PR246
3 2
0.22U_0603_10V7K
5
PR247 V1N
0.022U_0402_16V7K
1
1
1 2 PQ203 4.7_1206_5%
0.01U_0402_25V7K
2
1
TPCA8036-H_SOP-ADV8-5 PR251
PC230
10K_0402_1%
2
PR249 0_0402_5% 1_0402_5%
3.65K_0603_1%
<9> VCCSENSE
2
2
1
PR248
PR250
1
PC233 LGATE_CPU1
PC231
PC232
2
330P_0402_50V7K
PC234
2
2
330P_0402_50V7K
680P_0603_50V7K
2
1
VSUM-
PC237
PC235
3
2
1
2
1
B PR253 B
11K_0402_1%
1
PC236 1.3K_0402_1% PH201

PR255
1000P_0402_50V7K 1 2
PR252 0_0402_5% 10KB_0603_5%_ERTJ1VR103J ISEN1
2
<9> VSSSENSE 1 2
2
VSUM+
PC238 PR256
1 21 2 VSUM-
@1200P_0402_50V7K @100_0402_1%
0.1U_0402_16V7K
1
PC239
2
A A
+CPU_CORE
http://laptop-motherboard-schematic.blogspot.com/ AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
8 7 6 5 4 3 2 1
5 4 3 2 1
D PL802 D
B+ HCB2012KF-121T50_0805 GFX_B+
1 2 GFX_B+
PL803
2200P_0402_50V7K
0.1U_0402_25V6
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
2
HCB2012KF-121T50_0805 PR833
1 2 PR802 0_0402_5%
1
0_0603_5% 2 1
PC805
PC806
0.22U_0603_25V7K
0.22U_0402_6.3V6K
PR801 GFXVR_IMON <9>
PC801
PC802
PC803
PC804
+5VALW 2 1
22.6K_0402_1%
2
1 1
1
1_0603_5%
1
PC808
PR803
PC809
PC807
2
1U_0603_6.3V6M
2
PR804
10_0402_5% VSS_AXG_SENSE
1 2 ISUM+
5
6
7
8
ISUM- PQ801
1 2 BST_GFX 1 2 1 2 AO4474L_SO8
<9> VSS_AXG_SENSE PC810
1
1000P_0402_50V7K PR805 PC811

PC813 2.2_0603_5% 0.22U_0603_16V7K 4
<9> VCC_AXG_SENSE 330P_0402_50V7K
29
10
11
12
13
14
1 2
2
9
PR806
+GFX_CORE 10_0402_5% PC812
ISUM
AGND
RTN
VDD
VIN
IMON
BOOT
ISUM+
1 2 330P_0402_50V7K
3
2
1
PR807
0_0603_5%
C 7 15 DH_GFX 1 2 DH_GFX1 +GFX_CORE C
VSEN UGATE PL801
6 PU801 16 LX_GFX 1 4
FB ISL62881HRZ-T_QFN28_4X4 PHASE
5
5 COMP VSSP 17 2 3
1
4 VW LGATE 18 DL_GFX .56UH +-20% ETQP4LR56 W FC 21A
PR810
PR809
1
PR813 PR814 PC815 PR808 2 1 3 19 1 2 +5VALW 2.2_1206_5%
10.2K +-1% 0402 825K_0402_1% 1000P_0402_50V7K 47K_0402_1% RBIAS VCCP PR811 PR812
0_0603_5% 4
1
2 20 3.65K_0805_1% 0_0402_5%
2
PGOOD VID0
2 1 1 2 1 2 2 1
1 21 PC816 PH801
DPRSLPVR
2
CLK_EN# VID1
2
PC814 2.2U_0603_6.3V6K 1 2 1 2
3
2
1
100P_0402_50V8J +GFX_CORE PQ802
VR_ON
PR815
PC817 2.61K_0402_1% 10KB_0603_5%_ERTJ1VR103J
VID6
VID5
VID4
VID3
VID2
1
PC819 AON6718L 1N DFN 680P_0603_50V7K
22P_0402_50V8J
2 1 2 1 1 2 2 1
28
27
26
25
24
23
22
@10K_0402_1% PR818
1 2
@1.91K_0402_1%
11K_0402_1%
1
PC818 PR816 PR817

150P_0402_50V8J 17.8K_0402_1% 8.06K_0402_1% PC820
PR819
PR820
.1U_0402_16V7K
1 2
2
B B
GFXVR_PW RGD
1 2
PC821
GFXVR_CLKEN#
2
0_0402_5% 2 1 PR821 0.1U_0603_16V7K
0_0402_5% PR822 GFXVR_VID_0 <9> PR825 PR823
2 1 GFXVR_VID_1 <9>
0_0402_5% 2 1 PR824 3.01K_0402_1% @100_0402_1%
0_0402_5% PR826 GFXVR_VID_2 <9> PR829
2 1 GFXVR_VID_3 <9>
0_0402_5% 2 1 PR827 82.5_0402_1%
1
0_0402_5% PR828 GFXVR_VID_4 <9>
2 1 GFXVR_VID_5 <9> 1 2 1 2
0_0402_5% 2 1 PR830
GFXVR_VID_6 <9>
2
0_0402_5% 2 1 PR831 PC822
0_0402_5% PR832 GFXVR_EN <9> 0.01U_0402_16V7K PC823
2 1 GFXVR_DPRSLPVR <9>
@180P 50V J NPO 0402
1
ISUM+
ISUM-
A A

VCCGFX
5
4
3 2
1
50 of 55
A B C D
PR922
@0_0402_5%
SUSP# 1 2
<31,34,39,41,43,46,47,48> SUSP#
PR906
0_0402_5%
1 1 2 PL902 1
<14,23,40,41,47> DGPU_PWR_EN
HCB1608KF-121T30_0603
VGA_B+ 1 2 B+
0.1U_0402_25V6
4.7U_0805_25V6-K
4.7U_0805_25V6-K
2200P_0402_50V7K
1
1
PC906
PC903
PC904
PC907
PC905
@0.1U_0402_10V7K
2
5
+5VALW
1+5VALW
BST_VGA 1 2 1 2
PR907 PC909
2.2_0402_5% 0.1U_0402_10V7K 4
PR908 PQ901
15
14
1
316_0402_1% PU901 AON7408L_DFN8-5
PR909
EN_PSV
TP
VBST
255K_0402_1%
2
3
2
1
1 2 2 13 DH_VGA 1 2 DH_VGA_1 PL901
TON DRVH PR910 1UH_PCMC063T-1R0MN_11A_20%
PR911
+NVVDDP 2 1 3 12 LX_VGA 0_0402_5% 1 2 +NVVDDP
VOUT LL
0_0402_5%
4 V5FILT TRIP 11 1 2
330U_D2_2V_Y
4.7U_0805_6.3V6K
PR905 1
+VGA_COREP1 1 2 5 10 +5VALW 14.3K_0402_1%
VFB V5DRV
5
6
7
8
1
PC901
PC902
2 PR912 + 2
1
1
PR901 6 9 PC911 PQ902 @4.7_1206_5%
PGOOD DRVL
PGND
PC910 15.4K_0402_1% 4.7U_0805_10V6K FDS6690AS_G_SO8
GND
2
1
1U_0603_10V6K 2
2
2
1 2 PR913
1
PC912 0_0402_5% DL_VGA 4
8
PC913
@10P_0402_50V8J TPS51117RGYR_QFN14_3.5x3.5 @680P_0603_50V7K
2
2
1
DGPU_PW ROK <14>
3
2
1
PR914 PR915
0_0402_5% 10_0402_5%
2
1
+NVVDDP
PR902
+VGA_CORE
75K_0402_1%
Close VGA
2
+3VS
PR916 PR917
10K_0402_5% 15K_0402_1%
1 2 2 1
3
GPU_VID0 GPU_VID1 +VGA_CORE 3
6
PQ903A PC914 PQ903B

0.022U_0402_16V7K 2N7002KDW -2N_SOT363-6
2N7002KDW -2N_SOT363-6 1 1 0.9V
2
2
<26> GPU_VID1
5
PR903
1
210K_0402_1%
0 1 1.05V
1
1
1 2 3 4
PR918 PR919
10K_0402_5% PR920
10K_0402_5% 15K_0402_1%
0 0 1.1V
2
2 1
2
PC915 PQ904B
5
PQ904A 0.022U_0402_16V7K PR904 2N7002KDW -2N_SOT363-6

2N7002KDW -2N_SOT363-6 76.8K_0402_1%
2
2 1 2 3 4
<26> GPU_VID0
1
PR921
10K_0402_5%
2
4 4
PJP901
+NVVDDP 1 2 +VGA_CORE(11A,489mils ,Via NO.= 22)

PAD-OPEN 4x4m
PJP902 Issued Date 2007/05/29 Deciphered Date 200810/11 Title
1 2 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
VGA_CORE
PAD-OPEN 4x4m
A
http://laptop-motherboard-schematic.blogspot.com/B
C
D
Sheet 51 of 55
1.0
5 4 3 2 1
Item Fixed Issue (Reason for change) PAGE Modify List Date Phase
1 PLT_RST# need a PD resistor 14 Add R185 PD for PLT_RST# 08/6 PV
2 Remove MUX in CRT DDC circuit of SG design 20 Change to MOS design 08/6 PV
3 Remove MUX in LVDS ENAVDD circuit of SG design 21 Change to MOS design 08/6 PV
D D
4 LCD panel will fail in OPP SKU 21 Add one 0 ohm resistor (R1238) for OPP SKU 08/6 PV
5 Remove MUX in LVDS I2C circuit of SG design 22 Change to MOS design 08/6 PV
6 OPP SKU: M93 and VRAM may have leakage in S3 mode 41 Change the power plan to +1.5VS of JP303 08/6 PV
7 8111VB power on timing issue 32 Add R1083 and C1319 to fine tune the power on timing 08/10 PV
8 Blade 2.0 need Board ID 39 Use EC GPIO48 for ID pin(Add R1239, R1240) 08/12 PV
9 EC GPIO17 will be used for debug card 39 LAN_POWER_OFF signal change to EC GPXID4(Pin 115) 08/12 PV
10 Cap. sensor board need to change the power source. 40 Change the power source of Cap. sensor baord to +3VS 08/13 PV
11 Lid switch need to change the power source. 40 Change the power source of Lid switch to +3VALW and R526 PU to +3VALW. 08/13 PV
C C
Change +1.8VS to +1.8VSDGPU Transfer design

12 for cost down 41 Change the power MOS(U49) to 2301 PMOS(Q109). 08/13 PV
13 BIOS team doesn't need XDP connector 6 Remove the XDP connector 08/13 PV
Change +5VS to +5VSDGPU Transfer design
14 for cost down 41 Use 0 ohm to contact +5VS and +5VSDGPU 08/13 PV
PCH_DDR_RST MOS gate control signal change
15 PCH_DDR_RST need use PCH GPIO46 to control 6 08/13 PV
from EC to PCH GPIO46
16 Remove the 27MHz crystal of VGA 26 Use clock gen 27MHz source and stuff R216 08/14 PV
17 Q104 need change to low Vgs type 6 Change the Q104 to BSS138 P/N:SB501380020 08/18 PV
18 Cost down plan 9 Change the C995,C996 330u to ESR=9m ohm 08/14 PV
19 Cost down plan 9 Change the C64 from 330u to 220u 08/14 PV
B B
20 Cost down plan 9 Change the C61,C62,C67,C68,C69,C76,C82 from 22u to 10u 08/14 PV
21 Cost down plan 9 Change the C200 330u to ESR=9m ohm 08/14 PV
22 Cost down plan 9 Un-stuff C204,C228 and C229 08/14 PV
23 Docking no sound when play music 34 Need to stuff R910 08/14 PV
24 Audio new Mapping 34 Exchange the port A and port F 08/14 PV
25 We won't have DIM_LED function 41 Un-stuff Q99,Q101 and add two 0 ohm(R1244,R1245) resistors for LED power source. 08/14 PV
26 ESD issue 34 Add R1247,C1442,C1443 and change the C983~C986, C1444~C1446 to 0.1u 08/18 PV
27 Black light issue(will see the garbage when boot) 22 Change the black light enable schematic design. 08/18 PV
A A
28 CPU leakage issue 6 Change the design for Intel's power leakage issue when go into S3 mode 08/19 PV

PIR-HW
5
4
3 2
Date:
1
Sheet 52 of 55
1.0
A B C D E
29 INT.MIC ESD issue 35 Add D58 and D62 for ESD issue 08/18 PV
30 EXT.MIC ESD issue 35 Reserve D63 for Ext. MIC 08/18 PV
31 Reserve PU resistors to +3VL for ESB BUS 39 Reserve R1253,R1254 for ESB bus 08/21 PV
1 1
32 Make sure power sequence is correct 6,47 Use 1.5VSCPU_DRAM_PWRGD to enable 0.75VS power 09/11 PV2
33 Add ME_EN# for PCH GPIO33 11 Add inverter circuit for ME_EN signal 09/11 PV2
+3VS_VGA will have leakage when switch to
34 IGPU mode 12 Change Q4 pin2 and pin5 to +3VS_VGA 09/11 PV2
35 Need contact SUS_PWR_DN_ACK between EC and PCH 13 Use PCH GPIO30 and EC pin76 for SUS_PWR_DN_ACK 09/11 PV2
36 Need add VGA ID pin for M93 and M93 LP 14 Use PCH GPIO57 for VGA ID pin 09/11 PV2
37 Change 27MHz clock source of VGA to Y7 19,26 non-stuff R216 09/11 PV2
38 Q37 dual package will have floating isse 22 Change Q37 to single package 09/11 PV2
39 Fix 8103 BOM isse 32 Add R1259 for 8103EL LAN chip 09/11 PV2
2 2
40 Fix EXT. MIC reference voltage issue 34 Change the reference voltage to +AVDD_CODEC 09/11 PV2
41 Remove EC_BEEP function 34 Delete EC_BEEP function 09/11 PV2
42 Remove Analog MIC detect function 35,39 Delete ANA_MIC_DET signal from EC and codec 09/11 PV2
43 EMI need to add chock for ESATA/USB port 37 Add L66 for ESATA/USB port 09/11 PV2
44 HM55 PCH will disable USB port6 and port7 37 Change Finger printer from USB port7 to USB port 11 09/11 PV2
45 HM55 PCH will disable USB port6 and port7 37 Change Bluetooth from USB port 6 to USB port 12 09/11 PV2
45 Remove EC_BEEP function 39 Change Pin 26 from EC_BEEP to ME_EN 09/11 PV2
46 Fix PV phase Board ID issue 39 Exchange TP_BTN# and Board_ID pin 09/11 PV2
3 3
47 Cypress Cap. sensor board need use +3VL power 40 Change Cap. sensor board power to +3VL 09/11 PV2
48 Adjust +3VS / +1.5VS power sequence 41 Change C676,C770 from 0.1u to 0.022u 09/12 PV2
49 PLT_RST# don't need PD resistor 14 Un-stuff R185 09/20 MV
50 Follow Intel to adjust +0.75VS discharge timing 41 Change R593 from 470ohm to 22ohm 09/20 MV
51 Follow Intel to adjust +1.5VS discharge timing 41 Change R590 from 470ohm to 220ohm 09/20 MV
52 Follow Intel Check list 2.0 15 Un-stuff C187 and C192 09/20 MV
53 EDID signal need to add PU resistor 22 Add R1261 for EDID DATA 09/20 MV
54 VCCADAC dosen't need LC filter when DIS only 15 Change L45 to 0 ohm resistor for OPP SKU 10/01 MV
4 4
55 GFX core power transient fail 9 Change C996 to 330u 7m ohm 10/21 MV

PIR-HW
A
B
C D
Date:
E
Sheet 53 of 55
1.0
5 4 3 2 1
56 Add M93 / M93LP / Park / Park LP ID pin 14 Use PCH GPIO28 and GPIO57 for VGA ID pin 10/21 MV
57 RTC timing fast / slow issue 19 Change C259, C260 to 22P 10/21 MV
D 58 ESB CLK can't pass EMI test. 40 Change R1151 to 300 ohm bead and add C1449 10/21 MV D
59 Intel PCH CLK jitter issue 12 Reserve Y2 for this issue. 10/23 MV
60 ATE test jig issue(M/B will shutdown when no CPU) 39 Add R1265 for ATE jig test 10/23 MV
ATE test jig issue
61 (need to turn on +VGA_CORE when no CPU) 41 Add R1266 and reserve Q115 for ATE jig test 10/29 MV
62 Ext. MIC record noise issue 34 Reserve LDO circuit for this issue. 11/03 MV
63 Intel CPU GFX overshoot issue 09 Follow Intel suggestion to change the R43 to 249 ohm 11/05 MV
64 +1.8VSDGPU power up/down timing issue 41 Change R916 to 1K and R926 to 10K then add C1454 to fine tune timing 11/05 MV
65 +1.5VSDGPU / +1.5VS power quality issue 41 Change U50 and U58 to low RDSON NMOS 11/05 MV
C C
B B
A A

PIR-HW
5
4
3 2
Date:
1
Sheet 54 of 55
1.0
A B C D E
9HUVLRQ&KDQJH/LVW3,5/LVWIRU3RZHU&LUFXLW

,WHP 3DJH 7LWOH 'DWH 5HTXHVW ,VVXH'HVFULSWLRQ 6ROXWLRQ'HVFULSWLRQ 1RWH
2ZQHU
1 1 44 PWR-3.3VALWP/5VALWP 8/12 PWR all cap no more than 0805 Add PC318,PC305 from 1206 to 0805 and parallel with PC318 DB to PV1 1
OCP & IMON ajustment and Change PR253 from 1.1K to 1.3K,Change PR242 from 8.25K to 10.5K
2 49 PWR-CPU_CORE 8/13 PWR Fixed LL to match INTEL Spec Change PR237 from 2.43K to 3.01K DB to PV1
ǂ
Change PQ201 PQ202 from AO4474L to
3 49 PWR-CPU_CORE 8/17 PWR RF Solution ǂ
AO4406AL,PR215 PR244 from 0 to 2.2 DB to PV1
4 47 PWR-0.75VP/1.8VSP 8/20 PWR Cost Down plan Change PU602 from APL5915 to APL5930 DB to PV1
5 43 PWR-Charger 8/20 PWR Smart Charger Change PR113 from 143K to 140K, Change PC117 from 1u to 0.1u, Add PR114 DB to PV1
6 49 PWR-CPU_CORE 8/20 PWR Avoide DFX interfere Delete PC209 and add PC210 DB to PV1
Follow HW Suggestion Pull-up
7
46 PWR-1.05V_VCCP 8/24 PWR resistor connect to 3VS Add PR705 connect to 3VS, remove PR706 DB to PV1
8
45 PWR-1.5VP 8/24 PWR PU401 second source solution PR403 from 13.7K to 15.4K DB to PV1
9 46 PWR-1.05V_VCCP 8/24 PWR PU701 second source solution PR703 from 8.06K to 6.98K DB to PV1
2 10 49 PWR-CPU-CORE 8/28 PWR Improve transient response Add PC230 DB to PV1 2
ǂ ǂ
Change PC701 PC702 PC703 from 330u 6m ohm
11 46 PWR-1.05V_VCCP 9/2 PWR Cost down plan to 330u 9m ohm DB to PV1
12 46 PWR-1.05V_VCCP 9/3 PWR Improve VCCP Ripple Del PC717 DB to PV1
13 50 GFX_CORE 9/11 PWR Let GFX IMON measure easily Add PR833 connect to GFRXVR_IMON and PU801 pin 13 PV1 to PV2
For HW requirement add
14 47 PWR-0.75VP/1.8VSP 9/11 PWR 1.5VSCPU_DRAM_PWRGD ǂ
Add 1.5VSCPU_DRAM_PWRGD add PR613 connect to PQ601 pin 2 and Delet PR604 PV1 to PV2
3 3
4 4

PIR-PWR
A
B
C D
Custom
Date:
Calpella_UMA_LA4106P
E
Sheet 55 of 55
1.0

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A B C D E

2009-10-23 Rev 1.0

Security Classification Compal Secret Data Compal Electronics, Inc.

Date: Monday, November 09, 2009

8111DL VB Mini-Card Mini-Card New Card SPI

P38 P34 P35

Touch Pad CONN. Int.KBD

LINE-OUT*1 256K bits

Security Classification Compal Secret Data Compal Electronics, Inc.

SMBUS Control Table PCH I2C / SMBUS ADDRESSING

M93 SMBUS Control Table Stencil Memo: PCBǂDA80000GL00

Date: Monday, November 09, 2009 Sheet 3 of 55

500mA 500mA 250mA

Security Classification Compal Secret Data

Security Classification Compal Secret Data Compal Electronics, Inc.

Date: Monday, November 09, 2009 Sheet 5 of 55

0.5", spacing 20mil JCPU1B

JTAG & BPM

<14> BUF_PLT_RST# R26 1 2 PLT_RST#_R AL14 RSTIN#

XDP_TDI_R R30 1 2 0_0402_5% XDP_TDI

DDR3 Compensation Signals 470P_0402_50V7K G

Security Classification Compal Secret Data Compal Electronics, Inc.

PCIE_CRX_GTX_P0 PCIE_CRX_GTX_P[0..15] <24>

PCI EXPRESS -- GRAPHICS

CFG Straps for PROCESSOR

PCI-Express Configuration Select CFG4-Display Port Presence

Date: Monday, November 09, 2009

<18> DDR_B_D[0..63] W8 M_CLK_DDR2 <18>

DDR_A_D35 AK7 F8 DDR_A_DQS#1 DDR_B_D37 AG3 L4 DDR_B_DQS#3

DDR SYSTEM MEMORY - B

Security Classification Compal Secret Data Compal Electronics, Inc.

Date: Monday, November 09, 2009

AD35 VCC21 VTT0_21 D12 AK19 VAXG26 VDDQ2 AF1

AC29 VCC37 VTT0_34 AE10 J24 VTT1_45 VDDQ18 H1

PEG & DMI

V28 AL33 H_VID4

V26 AM35 H_VID6 IC,AUB_CFD_rPGA,R1P0

R28 1 2 VCCSENSE <49>

VCCSENSE R61 1 2 100_0402_1%

Date: Monday, November 09, 2009

Security Classification Compal Secret Data Compal Electronics, Inc.

Date: Monday, November 09, 2009

ICH_RTCX1 +RTCVCC +3VS

R63 1 2 10M_0402_5% ICH_RTCX2

R66 1 2 330K_0402_5% PCH_INTVRMEN

1U_0603_10V4Z SHORT PADS RTCX2 FWH1 / LAD1

R1159 1 2 33_0402_5% HDA_BIT_CLK A30

SPI_SO_R AV1 V1 GPIO19 @ 100_0402_1% @ 100_0402_1% @ 10K_0402_5%

1 JBATT1 R85 200ohm 200ohm 20Kohm No Install

EC_LID_OUT# R95 1 2 10K_0402_5% +3VALW

SMBDATA R97 1 2 2.2K_0402_5% +3VS

SML0CLK R98 1 2 2.2K_0402_5%

From CLK BUFFER

<31> CLKREQ_WLAN# U4 XTAL25_IN

PAD T59 AJ50 CLKOUT_PCIE5N CLKOUTFLEX0 / GPIO64 T45

+3VALW R757 1 2 10K_0402_5% PCIECLKREQ5# H6 P43

PCIECLKRQ5# / GPIO44 CLKOUTFLEX1 / GPIO65

PAD T61 AK53 CLKOUT_PEG_B_N CLKOUTFLEX2 / GPIO66 T42

+3VALW R606 1 2 10K_0402_5% PEG_B_CLKRQ# P13 N50 R1021 1 2 22_0402_5%

Security Classification Compal Secret Data Compal Electronics, Inc.

R770 EDID_CLK and EDID_DATA single

Digital Display Interface

Place the 3 resistors close to IBEX