IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 66, NO.
4, APRIL 2019 2735
Current-Fed Isolated LCC-T Resonant Converter
With ZCS and Improved Transformer Utilization
Venkata R. Vakacharla , Student Member, IEEE, and Akshay Kumar Rathore , Senior Member, IEEE
Abstract—Resonant converters with capacitive output fil-
ters are quite popular for their higher voltage gain and com-
pact designs. But the majority of the converters underutilize
the transformer as they are subjected to discontinuous
currents. This discontinuous current possesses huge cur-
rent ripples that produce huge core losses and aggravate
the temperature rise of the transformer. This often leads to
saturation of the transformer. This paper presents an LCC-T
resonant dc–dc converter with a capacitive output filter
operating all switches in the zero current switching (ZCS)
switching mode and whose transformer current is a con-
tinuous sinusoidal with minimum stress on resonant tank
components. This is achieved by bringing the transformer
in series to a resonant inductor. The proposed converter
is simulated in power simulation (PSIM) 11.0.1. A proof-of-
concept model rated 288 W is designed and developed, and
hardware results are presented as verification to theory.
Index Terms—High efficiency, resonant converter, soft
switching, ZCS switching.
I. INTRODUCTION
EING a zero-emission energy source, photovoltaic (PV)/
B fuel cells can offer a significant contribution to controlling
the unbridled rise in pollution in the environment [1]. DC–DC
converters play an important role in harnessing power from
these sources. Such converters need exceptionally high gain,
high power densities, very small input current ripples, higher
efficiencies, and higher reliability. Conventional boost convert-
ers are not preferred for this purpose in general. Voltage boost-
ing techniques, such as voltage multiplier cells [2], voltage lift
techniques [3], and multistage converters [4], may seem to be a
suitable alternative. But their need of a high component count in
generating exceptional gains as demanded by these applications
forces them to compromise on reliability. Converters [2]–[4]
are hard switched, so they operate at a low switching frequency,
which leads to bulkier magnetics.
On the other hand, dc–dc resonant converters with an inter-
mediate ac link can promise higher gains with soft switching
abilities. Various stages of this kind of converters are as follows:
Manuscript received January 31, 2018; revised April 30, 2018; ac-
cepted May 21, 2018. Date of publication June 13, 2018; date of cur-
rent version November 30, 2018. (Corresponding author: Venkata R.
Vakacharla.)
The authors are with the Department of Electrical and Computer Engi-
neering, Concordia University, Montreal, QC H3G 1M8, Canada (e-mail:
v_enkat@encs.concordia.ca; akshay.k.rathore@ieee.org).
Color versions of one or more of the figures in this paper are available
online at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TIE.2018.2844855
0278-0046 © 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications standards/publications/rights/index.html for more information.
1) front-end inverter;
2) soft switching elements;
3) transformer;
4) rectifier;
5) output filter.
This soft-switching feature is interesting because it uses the
leakage inductance of the transformer to eliminate switching
losses, thus enabling converters to pushing their switching fre-
quency to higher limits. A higher frequency helps magnetics to
assume a much smaller size [5].
In general, front-end inverters generate an ac waveform to
feed upcoming stages. In PV/fuel cell-related applications, a
current-fed front-end inverter is more preferable because of its
continuous, ripple-free input current and inherent step-up char-
acteristic. A basic current source inverter, a copy of the class-D
voltage source inverter, is reported in [6], which operates with
parallel resonant tanks. The main advantages of this topology
are that it needs only one inductor and two switches to gen-
erate the required ac waveform. However, the requirement of
the bidirectional voltage blocking switches (realized by an an-
tiseries diode) complicates the design of the converter. Also,
the converter should operate only at d = 0.5 and with a certain
crossover conduction period to generate a balanced ac voltage.
This leads the converter to adopt a frequency modulation tech-
nique for output voltage regulation.
The current fed half bridge (CFHB) proposed in [7] elimi-
nates the need of bidirectional blocking switches for a current
source inverter operation. Both legs operate in an interleaved
fashion, with a mandatory overlap time. This overlap time en-
sures a closed path for input boost inductor currents and pro-
tects switches from over voltages. However, the consequences
of overlap time are as follows. It imposes a minimum duty cycle
for which each switch should operate with a duty ratio of more
than 0.5. The inability of the converter to operate in a lower duty
cycle limits the converter to exhibit gains lower than 2 N. Also
during startup, the jumping of duty ratio to 0.5 favors high inrush
currents at startup, which increases the switch current ratings.
To eliminate the requirement of overlap time, an active clamp-
ing circuit is proposed for each leg, called the active clamped
interleaved boost converter [8], [9]. The auxiliary switch and the
main switch of each leg are operated in a complementary fash-
ion to ensure continuous conduction for the input boost inductor.
This helps the converter to operate in a full duty cycle ranging
from 0 to 1, and the startup problem is also eliminated. However,
this solution makes the converter bulky with four switches, two
inductors, and one capacitor.
2736 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 66, NO. 4, APRIL 2019
TABLE I
COMPARISON OF FRONT-END INVERTERS
Salehi et al. [10] use an active clamped boost inverter, which
uses only one leg of inverter proposed in [8] and [9], and two
capacitors to produce the ac waveform. The main advantage
of the front-end inverter is a less number of components, as
presented in Table I. In contrast to current-fed inverters pro-
posed in [8] and [9], this inverter feeds a voltage waveform into
the transformer. This is explained as the input voltage source
vin is converted into a current source through the inductor and
again converted into a voltage source by charging C1 and C2 .
Later, a quasi-square voltage is generated using C1 and C2 to
feed the transformer. This intermediate conversion looks unnec-
essary if a half-bridge voltage source inverter is directly used
to feed the transformer [11]. However, this particular inverter
topology, with this intermediate conversion, provides two major
advantages over a half-bridge voltage source inverter. A half-
bridge voltage source inverter should operate at d = 0.5 only
to generate a transformer-friendly ac waveform. So, ultimately
this converter needs a frequency modulation for output voltage
regulation. But, the proposed current source inverter can oper-
ate through a complete range 0 to 1. So, this converter can use
a simple pulsewidth modulation (PWM) to regulate the output
voltage. A voltage source inverter is basically a buck-type con-
verter, while this current source inverter is a buck–boost type
converter. This inherent boost character is very much needed
for high-gain converter realization. The common drawback of a
half-bridge voltage source inverter and a current source inverter
is that split capacitors should carry circulating currents.
From Table I, it can be observed that the active clamped boost
inverter has minimum possible switches, minimum possible in-
ductors, can operate in a full duty cycle ratio range with no
requirement of an antiseries diode with soft turn-ON capabil-
ity. Due to these reasons, an active clamped boost inverter is
selected as a front-end inverter in the proposed converter.
At the output side, a rectifier is needed. A simple class E rec-
tifier is proposed in the literature for the rectification purpose,
which provides soft switching in diodes [13]. It uses a capacitor
in parallel to a diode for shaping its voltage so that it enjoys
soft switching. Marium [14] mentions various types of rectifiers
such as half-bridge, full-bridge, and center tapped. The voltage
rating of the center tapped rectifier diode is twice the output
voltage, and also it needs a dissipative snubber for operation. To
eliminate these drawbacks in the center tapped model, a Taiwan
tech rectifier is proposed [15]. However, it comes with complex
transformer design. But, the work in [10] uses a voltage doublar
(VDR), which offers the rectification of ac voltage with soft
switching of diodes along with the voltage-doubling character-
istics. Since this is a step-up converter, a 2 × voltage gain is
advantageous for the current application. Also, the soft switch-
ing of diodes eliminates the need of snubbers on diodes, ringing
of diodes at turn-OFF, and the need of fast recovery diodes.
In the case of unidirectional converters, soft switching in a
front-end inverter is obtained through resonance created by Lr
and Cr . This resonance is segregated into two types.
A. Quasi-Resonance
In this method, for achieving a soft transition in switches,
during turn-ON or turn-OFF, resonance is invoked. This invoked
resonance helps in smooth transition of switches. Resonance
ceases at the end of transition [7]–[10], [16]. In general, the leak-
age inductance and magnetizing inductance of the transformer,
and switch capacitances act as resonance components in quasi-
resonant converters. Advantage of this method is that switch,
transformer parasitic is used for resonance. But, this method in-
troduces nonsinusoidal currents through the transformer though
it is connected in series with a resonating inductor. Also, ele-
ments Lr and Cr create only series resonance, which does not
contribute any voltage gain in the converter.
B. Complete Resonance
A dedicated resonant tank is employed in converters for en-
abling soft switching in converters. This resonant tank draws
sinusoidal currents from the inverters. These tanks also con-
tribute in the overall voltage gain of the converter. Converters
in [11] with an LC filter and in [17] and [18] with a C filter em-
ploy a resonant tank, between the inverter and transformer, for
resonance, which not only enables soft switching in the front-
end inverter switches, but also contributes in the overall voltage
gain of the converter, consequently reducing the transformer
turns ratio. As analyzed in [19], for a given power rating, over-
all an LC filter is bulkier than a C filter, although C in the C filter
alone is bulkier than C in the LC filter. Also, the type of filter
used is also independent of the type of input. Although resonant
tanks of converters proposed in [11] and [17], [18] draw sinu-
soidal currents form inverter, [11] able to maintain sinusoidal
currents through transformer, while [17], [18] doesn’t, because
of absence of L in output filter. i.e., [17], [18], shows merits of
compact C filter in output and sinusoidal current in transformer
cannot be maintained simultaneously. A higher current stress
in the transformer owing to a nonsinusoidal current indicates
poor transformer utilization. Under a prolonged operation with
a high-harmonic content in the transformer, the temperature of
the core is aggravated, often leading to saturation.
Rathore et al. [16] use an active clamped interleaved boost
type inverter as a front-end inverter and quasi-resonance for soft
switching. This converter can maintain soft switching against
wide load and input voltage variations as required by the appli-
cation. However, a large component count and poor utilization
of the transformer are drawbacks for this converter. Shang et al.
[12] use an active clamped interleaved cuk as a front-end current
source inverter. Although this converter has better transformer
VAKACHARLA AND RATHORE: CURRENT-FED ISOLATED LCC-T RESONANT CONVERTER WITH ZCS AND IMPROVED TRANSFORMER UTILIZATION
Fig. 1. Schematic of the proposed current-fed isolated LCC-T resonant
dc–dc converter.
utilization, it is limited to one operating point, i.e., at d = 0.5.
In other words, in the course of regulating the output voltage
using d, the harmonic current content in the current through the
transformer is highly compromised. Also, the switch that carries
the large portion of currents is completely hard switched during
turn-ON and turn-OFF. Dobakshari et al. [10] also propose the use
of an active clamped boost-type front-end inverter and quasi-
resonance for soft switching. However, capacitors C1 and C2 are
difficult to design in this converter because C1 and C2 are res-
onating with Llk of the transformer to bring S1 and S2 into soft
switching. So, resonating capacitors C1 , C2 cannot maintain a
constant voltage across them. Since a combination of C1 and C2
voltages appears across switches, the voltage peaks across the
switches will increase and so the voltage ratings of the switch.
Even though soft switching is maintained for 20% of the load,
the transformer is poorly utilized. Soft switching against the
input voltage variation is also not reported.
In this paper, a current-fed isolated LCC-T resonant dc–dc
converter is proposed, as shown in Fig. 1. This converter uses
an active clamped boost-type front-end inverter and complete
resonance for soft switching. A resonant tank LCC-T, which
completely integrates nonidealities of the transformer, is used
in this converter for bringing the front-end inverter switches into
the ZCS mode. This is maintained for 10% of a full load and
70% of the input voltage. Unlike in LCC, in this tank, a series
resonance capacitor is not in series with the resonance inductor.
So, a series resonance capacitor is not supposed to carry com-
plete circulating currents. In the proposed converter, to maintain
merits of compact C filter and sinusoidal current through the
transformer simultaneously, the transformer is brought in series
with the resonating inductor or both resonating capacitors are
located on the secondary of the transformer. Since the resonant
inductor maintains a sinusoidal current, the same is injected
into the transformer, and thus better transformer utilization is
assured against wide load and input variations. Since LCC and
LLC are complementary each other, in the proposed converter,
LLC also can bring soft switching, as shown in [20].
VDR employed at the output stage eliminates reverse recov-
ery problems in VDR diodes by operating them in the ZCS
mode. This also enhances the gain of the converter by two. Un-
like [10], the proposed converter is able to ease the design of
the capacitors C1 , C2 by decoupling them from resonance. This
2737
decoupling is made possible by selecting higher C1 , C2 values
relative to Cp in the LCC-T tank. This makes the series equiv-
alent to C1 or C2 with Cp equal to Cp itself so that they do
not influence the resonance condition. Since C1 , C2 are not in-
volved in resonance, the voltage across them is constant and thus
switch voltage ratings are reduced. Also, a proper ratio among
resonant tank capacitors (λ) minimizes circulating currents. The
main advantages of the proposed converter are as follows.
1) It is the current source feature that helps to draw the
PV/fuel cell-friendly current.
2) With ZCS in all active and passive switches, high trans-
former utilization, and a constant frequency of operation
are maintained against wide load and input voltage vari-
ations.
3) Simple PWM is adopted to control the converter for load
regulation.
II. OPERATION OF THE PROPOSED CONVERTER
This section is dedicated for delineating the various operation
modes of the converter for one complete cycle. The operation of
the converter is presented with reference to the resonant inductor
(leakage inductor of the transformer) current, iLr . The following
assumptions are made during the analysis of the converter.
1) During the operation, iLr is assumed to be a sinusoidal
current.
2) Input inductor (Lin ) is high enough to maintain a constant
low-ripple current.
3) Output capacitors (C3 , C4 ) are large enough to maintain
a constant low ripple voltage at output.
4) The transformer has an infinite magnetizing inductance.
5) Lr is the leakage inductance of the transformer or an
external series inductor that can integrate the leakage
inductance of the transformer into it.
6) G1 , G2 are gate signals for S1 , S2 , respectively.
7) D1 , D2 are body diodes of S1 , S2 , respectively.
At the output stage, diodes D3 , D4 are connected between vcd
and vo . For this reason, D3 , D4 come under a forward bias when
vcd is Vo /2 and −Vo /2, respectively; else, they cannot come into
conduction. The operation of the converter at a high frequency
is explained with the help of waveforms, as shown in Fig. 2, and
the series of equivalent circuits shown in Figs. 3 and 4. Either
capacitors C1 or C2 are always in series with resonant tank. But
C1 and C2 are far greater than resonant tank capacitors, so their
effect on resonance is neglected, because C1 , C2 are assumed
to be far larger than Cp ; thus, their series equivalent is equal to
Cp only.
A. Mode 1 [Fig. 3(a)—ωto < ωt < ωt1 ]
This mode begins with the iLr turning to positive, and this time
instant is taken as reference for the operation and analysis of the
converter. From KCL, it is obvious that switch S2 carries a com-
bination of iLin and iLr . Since iLr turns positive, this helps in di-
verting a portion of iLin , which is being carried by switch S2 , di-
rectly into Lr . This is evident from the falling current in S2 and is
given by iin − iLr . Since Vdc < Vo /2, it turns D3 OFF. During this
2738
Fig. 2. Operating waveforms for the proposed converter under a steady
state.
mode, as no current is flowing through Cs , it maintains a con-
stant voltage. This mode ends as the current in S2 reaches zero.
B. Mode 2 [Fig. 3(b)—ωt1 < ωt < ωt2 ]
This mode begins as soon as the body diode of S2 starts
conducting. From KCL, iS 2 = iin − iLr . Cp keeps charging and
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 66, NO. 4, APRIL 2019
C3 , C4 feed the load. This mode ends by withdrawal of G2 . At
this turn-OFF instant, the negative switch current in S2 , according
to [14] and [21], indicates zero current turn-OFF (ZCS).
C. Mode 3 [Fig. 3(c)—ωt2 < ωt < ωt3 ]
This mode begins with S1 turning ON. The turn-OFF current
in the body diode of S2 is transferred to S1 and so S1 starts
conducting. In this mode, iLin is fed to C2 to charge it. Since
D3 , D4 are still OFF, itfs feeds Cp completely alone. C3 and C4
are feed the load.
D. Mode 4 [Fig. 3(d)—ωt3 < ωt < ωt4 ]
This mode begins when vcd reaches Vo /2 and so D3 comes to
a forward bias. itfs starts sharing between Cp and Cs . A portion
of the current that is entering Cs , i.e., iCs , will be charging C3 ,
while C4 and iCs will feed the load. This mode ends with S1
current reaching zero.
E. Mode 5 [Fig. 3(e)—ωt4 < ωt < ωt5 ]
This mode begins when the body diode of S1 starts
conducting. This mode ends by withdrawal of gate pulse
for S1 . At this turn-OFF instant, since the current in S1
is negative, according to [14] and [21], it is consid-
ered that S1 is turned OFF with ZCS. The status of the
rest of the circuit is maintained similar to the previous
mode.
F. Mode 6 [Fig. 3(f). ωt5 < ωt < ωt6 ]
This mode begins when S2 is turned ON. Only the current car-
ried by the body diode of S1 in the previous mode is transferred
to S2 . The status of the rest of the circuit is maintained similar
to the previous mode.
G. Mode 7 [Fig. 4(a). ωt6 < ωt < ωt7 ]
This mode begins when iLr enters into negative direction. D3
ceases to conduct and itfs only feeds Cp . C3 and C4 are feeding
loads.
H. Mode 8 [Fig. 4(b)—ωt7 < ωt < ωt0 ]
This mode begins when D4 starts conducting. S2 keeps car-
rying both iin and iLr . itfs is shared among Cp and Cs .
III. ANALYSIS AND DESIGN OF CONVERTER
The transformer in the proposed converter, which is shown
in Fig. 1, is drawing a sinusoidal current. So, the first harmonic
impedance Zo1eq can be used in developing an equivalent circuit,
as shown in Fig. 5. Since the transformer in [17] neither draws
sinusoidal current, nor sees sinusoidal voltage, the first harmonic
RC model alone cannot represent the equivalent circuit.
λ = Cp /Cs , ωo is the operating frequency, and θ is the VDR
conduction angle. In this section, a design is illustrated through
an example of the following specifications: minimum and
maximum input voltage Vin of 30 and 42 V, respectively. Out-
put voltage Vo = 380 V, rated output power Po = 288 W, and
VAKACHARLA AND RATHORE: CURRENT-FED ISOLATED LCC-T RESONANT CONVERTER WITH ZCS AND IMPROVED TRANSFORMER UTILIZATION 2739

Fig. 3. Equivalent circuits for various operating modes of the proposed converter. (a) Mode 1. (b) Mode 2. (c) Mode 3. (d) Mode 4. (e) Mode 5.
(f) Mode 6.

switching frequency is equal to 128 kHz. The design ob- A. Design of Resonant Tank Components
jective is to select all components in such a way that the
1) Voltage Gain: The maximum voltage gain of the con-
stress on the tank components is minimum so that circulating
verter is given as V̂o = 380
30 = 12.66. Also, the per unit voltage
currents are minimized, at a minimum input voltage. For design,
gain is given as
the first harmonic approximation is adopted and is normalized
with respect to the parallel resonant frequency of resonant tank. 2 sin (πd) 1 V̂o2
Base values for normalization are given in (1). By rearranging, V̂o = 2 (3)
π (1 − d) |Zab | ω̂o V̂o2 + P̂o 2π (1 + λ) n2
Lr , Cp , and Cs are expressed in terms of base values as
 V̂o = Gb Grt Gtf Gvd . (4)
1 Lr Vb2
Vb = Vin ωb =  , Zb = Pb = (1) The gain represented by (3) can be perceived as a contribution
Lr Cp Cp Zb of four stages, as shown in (4), where Gb is the boost stage gain,
Zb 1 1 Grt is the resonant tank gain, Gtf is the transformer gain, and
Lr = , Cp = , Cs = . (2) Gvd is the VDR gain. It is observed that V̂o = f (n, λ, P̂o , ω̂o , d).
ωb ωb .Zb λ. ωb .Zb
2) Resonant Tank Current Stress (I Lm ): Resonant tank
Per unit normalization is very helpful in reducing the number inductor current (iLr ) is sinusoidal whose per unit peak value is
of parameters that need to be designed. The designing of the given by
converter can be divided into two parts: resonant tank compo-
(ω̂o V̂o2 + 2πn2 P̂o (1 + λ))
nents design and nonresonant tank components design. IˆL m = . (5)
2nV̂o2
2740 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 66, NO. 4, APRIL 2019

Fig. 6. Showing the effect of (a) λ and (b) P̂ o on IL m versus n.

KCL at input node “a” as follows:

Is1(off ) = −Iin + iLr |ω t =ω t 5 (9)

Is2(off ) = Iin − iLr |ω t = ω t1 . (10)

A switch undergoes ZCS only if its turn-OFF currents are

negative. Thus, the design should be appropriate to bring the
switch currents to a negative before a switch is turned OFF along
with a minimum stress on the resonant components at a given
output voltage.
According to (3), gain depends on various parameters, such as
Fig. 4. Equivalent circuits for various operating modes of the proposed n, λ, P̂o , ω̂o , and d. At the same time, these parameters also in-
converter. (a) Mode 7. (b) Mode 8.
fluence the stress on the resonant tank components, as shown in
(6)–(8). Care must be taken in selecting appropriate values for
these parameters so that ZCS is reached with a minimum stress
on resonant tank components. Among these parameters (ω̂o , d)
is called the operating point because once the converter is de-
signed the gain of the converter and ZCS condition depend on
this point. Po is the rated output power and P̂o is the per unit
maximum output power that the converter can provide. It is
given by P̂o = V̂P o2 Zb . Since Zb is an unknown parameter, P̂o
b
Fig. 5. Equivalent circuit of the proposed converter for analysis and
design. is also unknown. So selecting a proper value of P̂o can give in-
formation about tank components, such as Lr , Cp . λ is Cp /Cs
and so selecting a proper value of λ can give information about
Even though (5) gives the normalized current stress, its base Cp , Cs .
current (Ib = Vb /Zb ) is not a constant and depends on an un- 5) Selecting Transformer Turns Ratio (n): Fig. 6(a)
known parameter Zb . So, (5) is converted into an absolute and (b) shows the variation of resonant tank current stress against
current stress given by the variation of n for various λ, P̂o . From Fig. 6(a) and (b),
  it is evident that for any given λ, the P̂o minimum stress on
Po ω̂o V̂o πn(1 + λ) resonant components can be seen in the region 1 < n < 2. Se-
IL m = + . (6) lecting n = 2 would be a wise decision since a higher turns ratio
Vin 2nP̂o V̂o
always contributes to a higher gain in the circuit.
Equation (6) is a combination of known absolute values, i.e., 6) Selecting λ, P̂o and Operating Point (ω̂ o , d): Fig. 6(b)
Po , Vin , and unknown per unit parameters that are to be designed. concludes that the current stress increases as P̂o decreases.
Also, it is observed that IL m = f (n, λ, P̂o , ω̂o ). Fig. 6(a) concludes that the current stress decreases as λ de-
3) Resonant Tank Capacitor Stress: The following equa- creases. Since the parameters λ, P̂o , and operating point (ω̂o , d)
tions show that the per unit voltage stress of Cp depends on Cs are always interdependent, a proper algorithm, as shown in
Fig. 7, is devised for an optimum selection of λ, P̂o and then
and the Cs voltage stress, in turn, depends on IˆL m :
(ω̂o , d). V̂o is taken as 12.66, and n = 2 is selected. For a
minimum resonant current stress, a minimum value of λ and a
V̂o maximum value of P̂o are conducive. So, the iteration is started
V̂Cpm = V̂csm + (7)
2 from λ = 0.01, and P̂o = 6.
IˆL m λ (1 − cos θ) Full load and light (10% of the full) load operating point
V̂csm = . (8) loci are plotted using (3). Also, the ZCS switching boundary
2ω̂o (1 + λ)
using (9) and (10) is plotted, as shown in Fig. 8. Below the
4) Soft Switching Conditions: These are developed by locus of Z1 , Z2 , the region is attributed to the ZCS turn-OFF
turn-OFF currents in switches that are determined by applying of the switches, while the ZCS switching is not retained above
VAKACHARLA AND RATHORE: CURRENT-FED ISOLATED LCC-T RESONANT CONVERTER WITH ZCS AND IMPROVED TRANSFORMER UTILIZATION
Fig. 7. Flow chart to design tank components with a minimum stress.
Fig. 8. Operating curves for the converter for an optimized resonant
tank stress.
the locus Z1 , Z2 . The normalized frequency range is split into
three regions, as shown in Fig. 8. It is obvious that the gain
of the converter is distributed among four stages, as given by
(3) and (4). Out of the required gain of 12.66, 4 is generated by
Gtf .Gvd . The resonant tank gain (Grt ) and the front-end current
source inverter (Gb ) are supposed to contribute in achieving
the remaining gain. d decides Gb while ω̂o decides Grt . In
region 1, ω̂o is too small to contribute to significant Grt ; thus,
the gain contribution expected by Gb is too high and thus d is
clamped to 1. In region 2, though ω̂o is large enough to contribute
to significant Grtg , Gb requires d in the range 1 < d < 0.75, in
which the inverter is not safe to operate. In region 3, ω̂o enables
Grt with a high gain and lets the front-end inverter operate
with d < 0.75. In region 3, the locus of O3 , O4 is called the
operating point locus for the given wide load range. This locus
can be anywhere inside region 3. But, this locus is chosen near
to the Z1 , Z2 locus so that the resonant tank current is closer
to sinusoidal. On properly executing the algorithm, λ = 0.5 and
P̂o = 3 are selected and the operating curves obtained, as shown
in Fig. 6.
2741
B. Resonant Tank Components Selection
Resonant tank components are selected as Lr =
9.26 μH, Cp = 22 nF, Cs = 44 nF, using (11) with O3 , O4 be-
ing the operating locus. For these components, base resonance
frequency achieved is ωb = 2π ∗ 176.308 Krad/s
   
ω̂o P̂o . Vb 2 ω̂o Por Cp
Lr = ; Cp = Cs = .
ωo Por 2
ωo P̂o . Vb n2 λ
(11)
C. Nonresonant Components Design
1) Input Inductor Design: The value of the input boost
inductors is selected as 100 μH using Lin = f sV.Δ i n .d
I i n for 5% of
the input current ripple.
2) C1 , C2 Capacitors Design: The function of C1 , C2 is to
provide a constant voltage Vc1 , Vc2 for proper formation of vab ,
as shown in Fig. 2. However, C1 and C2 also participate in res-
onance with Lr and Cp , as shown in Figs. 3 and 4. An improper
design of C1 , C2 leads to distortion of capacitor voltages, which
leads to higher ripples in vab and switch blocking voltages. To
nullify their influence on the parallel resonance, C1 and C2 are
chosen relatively larger than Cp , so that when C1 , C2 come in
series with Cp , as shown in Figs. 3 and 4, their series equivalent
remains to be Cp as expressed below:
C1 = C2 = 300 ∗ n2 ∗ Cp . (12)
IV. EXPERIMENTAL RESULTS
After simulating the proposed converter in PSIM 11.0.1, an
experimental prototype of rated power 288 W, with input volt-
age ranging from 30 to 42 V, output voltage 380 V, switching
frequency 128 kHz, is developed in laboratory for real-time
verification of the proposed converter.
A. Component Selection
1) Input Inductor: N87, an E-type powder ferrite core,
manufactured by EPCOS (TDK) is selected as the core. Num-
ber of turns = 24 and Lin = 100 μH. A Litz wire is used for
windings.
2) High-Frequency Transformer: It has a ferrite core, pri-
mary turns = 12, secondary turns = 24, a Litz wire for wind-
ings, magnetizing inductance = 2.5 mH, and leakage induc-
tance for primary = 1.5 μH. Lr of the converter is obtained
as a combination of the leakage inductor of the transformer and
external connected inductor. The required Lr for this converter
is designed to be 9.26 μH. Since the transformer leakage is able
to provide only 1.5 μH, the remaining 7.76 μH is achieved by
connecting an external resonant inductor.
3) External Resonant Inductor: N87, an E-type powder
ferrite core, manufactured by EPCOS (TDK), is selected as
the core. Number of turns = 4 and Lin = 7.76 μH. A Litz wire
is used for windings. The airgap is adjusted for achieving the
required inductance.
4) Resonant Capacitors: They have Cp = 22 nF, Cs =
44 nF, 400 V each, and film capacitors manufactured by KMET
(Cp part no: R75PF21804030J, Cs part no: R75IN41804040J).
2742 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 66, NO. 4, APRIL 2019

TABLE II
OPERATING POINTS DEMANDED FOR THE FOUR CASES OF OPERATION

5) C1 , C2 Capacitors: 22 μF, 80 V electrolytic capacitors,

manufactured by the United Chemi-Con, are selected with part
no: EKYB800ELL-220MF11D.
6) C3 , C4 Capacitors: 1 μF, 450-V electrolytic capaci-
tors, manufactured by Rubycon, are selected with part no:
450PK1MEFC6.3X11.
7) D3 , D4 Diodes: They are rated 600 V, 10A with manu-
facturer part no: RFU10TF6S.
8) S1 , S2 Switches: CoolMOS, 200 V, 64 A, RDSon =
17.5 mW, part no IPP200N25N3GXKSA1.
Gate driver is IR2110 and gating signals are generated by
DSP F28335.

B. Experimental Results
In the case of the PV/fuel cell, the voltage provided by them is
not constant and the converter should be able to maintain its soft-
switching ability and rated output voltage at all load conditions
against input variations. For this reason, to demonstrate the con-
verter’s ability, it is subjected to extreme wide load variations—
100 to 10% load conditions—and input variations—42 to 30 V.
All these extreme conditions are grouped into Cases 1–4 whose
operating points are O1 , O2 , O3 , O4 , as presented in Table II.
It is worth noting that the converter operates at a constant
frequency in all cases, which is highly desirable for simple
converter control. Fig. 9 shows the switching waveforms for
switches S1 , S2 supported with their gate voltages for all the
four cases of operation. For all the four cases shown in Fig. 9,
it is clearly observed that as soon as the gate to source voltage
is withdrawn, the switch does not go into the blocking mode
immediately. This can be noticed by the zero voltage of the
switch even after withdrawal of the gate pulse. This zero volt-
age of the switch in the absence of gate pulse, just before going
into the blocking mode, is the indication that its body diode is
conducting. This also shows that switch currents are naturally
reaching zero before the withdrawal of gate pulse, and thus the
body diode comes into conduction, making the switch to turn
OFF in the ZCS mode [21]. This clearly demonstrates the soft
switching of the converter, which is maintained against all harsh
load conditions and input voltage variations. This also verifies
that the proposed theory, mathematical analysis, and design of
the converter are accurate and reliable.
For all cases, blocking voltages for switches are given in
Fig. 9. For a given load, if the input voltage decreases, the
duty ratio of the front-end inverter should be raised to maintain
constant 380 V at output. Fig. 9(a) and (b) shows switching
waveforms for cases 1 and 3, i.e., at a full load condition input
voltage dropping from 42 to 30 V. As input voltage drops from Fig. 9. Experimental results: gate to source and drain to source voltage
of switches S 1 , S 2 . (a) Case 1. (b) Case 3. (c) Case 2. (d) Case 4. Scales:
42 to 30 V, the output voltage is regulated by increasing d from v D S 1 , v D S 2 [100 V/div] , v G S 1 , v G S 2 [10 V/div].
0.5 to 0.71, and the switch blocking voltage rises from 84 to
107 V. Similarly, Fig. 9(c) and (d) shows switching waveforms
VAKACHARLA AND RATHORE: CURRENT-FED ISOLATED LCC-T RESONANT CONVERTER WITH ZCS AND IMPROVED TRANSFORMER UTILIZATION 2743

Fig. 11. Experimental results: VDR input voltage v cd [200 V/div], series
Fig. 10. Experimental results: resonant tank current iLr , [10 A/div],
resonant capacitor voltage v CS [(a) 100 V/div, (b) 10 V/div], parallel
front-end inverter output voltage v ab [50 V/div], and front-end inverter
resonant capacitor voltage v cp [200 V/div], and front-end inverter output
capacitors v C 1 , v C 2 [50 V/div], (a) Case 3. (b) Case 4.
voltage v ab [50 V/div]. (a) Case 3. (b) Case 4.

for cases 2 and 4, i.e., at a light load condition input voltage

dropping from 42 to 30 V. This is regulated by increasing d from
0.25 to 0.51, and the switch blocking voltage is increased from
56 to 61.22 V. In all conditions, soft switching is maintained.
Figs. 10–13 correspond to the minimum input voltage opera-
tion of converter at full and light loads. Similar waveforms can
also be obtained at an input voltage of 42 V. It is worth noting
from Fig. 9 that switch blocking voltages are clamped, which is
due to proper design of the front-end inverter capacitors. This
proper design of capacitors C1 , C2 decouples C1 , C2 from reso- Fig. 12. Experimental results: input current Iin [(a) 5 A/div, (b) 1 A/div],
nance and maintains constant Vc1 , Vc2 . Fig. 10(a) and (b) shows output voltage v o [(a) 200 V/div, (b) 100 V/div], and VDR capacitors
constant voltages across Vc1 and Vc2 at full and light loads. voltage, v C 3 , v C 4 [200 V/div]. (a) Case 3. (b) Case 4.
Fig. 10(a) and (b) shows the transformer current is maintained
sinusoidal against wide load variations. This feature helps in
minimizing the harmonic losses in the transformer. Also, iLr
leading vab shows the fact that switches enjoy the ZCS mode
of operation. vcp , vcs , vcd waveforms in Fig. 11(a) and (b) are
similar to and coinciding with the theoretically predicted wave-
forms, as shown in Fig. 2. It is worth mentioning that the time
period for which vcd is clamped to 190 V is dependent on VDR
conduction angle, which, in turn, depends on the load applied.
Since θ decreases as load decreases, vcd , vcp turns more close
to sinusoidal while vcs turns into a square wave, as shown in
Fig. 11(a) and (b).
Fig. 13. Experimental results: transformer secondary current itfs
Fig. 12(a) and (b) shows output voltage is shared between [5 A/div], VDR diode anode to cathode voltage v D 3 [200 V/div], and
two capacitors C3 , C4 equally. Fig. 12(a) and (b) shows that series resonant capacitor voltage, v Cs [(a) 50 V/div, (b) 10 V/div]. (a)
the input current ripple is minimum, which is conducive for Case 3. (b) Case 4.
2744 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 66, NO. 4, APRIL 2019

TABLE III
COMPARISON OF COMPONENTS’ RATINGS

Fig. 14. Efficiency of the proposed converter against load variation.

ference in pattern of variation of switching losses with vari-

ation of load for both the converters. The converter proposed
in [10], which is operated in zero voltage switching (ZVS),
has turn-OFF current equal to load current. So, turn-OFF losses
increase with load; thus, at higher loads a lower efficiency
is observed. But, in the proposed converter, ZCS operated,
Fig. 15. Efficiency of the proposed converter and [10] at V in = the converter is designed to have minimum turn-ON losses at
30 V, V o = 380V, P o = 150 W.
higher loads. So at higher loads, the proposed converter ex-
hibits a higher efficiency than that proposed in [10]. Also, from
PV/fuel cell applications. Though the load is dropped from 100
Table III, it can be concluded that with the employment of an
to 10%, output voltage is maintained at 380 V by regulating it
LCC-T resonant tank in the proposed converter, the transformer
at a constant operating frequency.
size has been reduced from 7 in [10] to 2. Also, a decrease of
Fig. 13(a) and (b) shows VDR diode D3 voltage in reference
5.7 A in peak circulating currents and a reduction in harmonic
to transformer secondary current itfs . For a positive half cycle,
content through the transformer at all load conditions verifies
for period θ, D3 conducts itfs and for the remaining period it is
better transformer utilization. Also, a decrease of 6 A in top
in the OFF condition. Observe that the conduction period of D3
switch peak current, and an increase of 1.6 A in bottom switch
ends when itfs passes through zero, which indicates D3 turns
peak current, and a decrease of 17.6 and 12.6 V in peak switch
OFF at the ZCS mode. Similarly D4 also operates in the ZCS
voltage is observed in top and bottom switches, respectively.
mode. Since Cs is connected in series to VDR, for positive a
Split capacitors C1 , C2 in the dc link and are selected as 300
half cycle of itfs , when D3 conducts, Cs charges to a positive
times larger than Cp in the proposed converter. Due to this,
peak, i.e., 40 V in the case of full load and 8 V in the case of
though C1 , C2 appear to be bulky, from Table III it can be seen
light load. While in a negative half cycle when D4 conducts Cs
that C1 + C2 = 48 μF for [10], while in the proposed converter
discharges to a negative peak, i.e., −40 V in the case of full load
it is only 44 μF. All these advantages of the proposed converter
and −8 V in the case of light load.
are at the cost of a bulkier resonating inductance (2 μH in [10],
Fig. 14 shows the proposed converter’s efficiency at various
14.8 μH in the proposed converter), and an extra resonating
operating points for minimum and maximum input voltages.
capacitance for the LCC-T tank circuit. (Cp = 27.9 nF, Cs =
The maximum global efficiency of the proposed converter is
2.79 μF). At the same time, remember that the LCC-T resonant
observed as 95.3% at a maximum input voltage and full load
tank also contributes in the overall converter gain.
conditions. It is observed that at full-load conditions, the effi-
Table III also compares the proposed converter with an LLC
ciency of the converter is high. This is due to the fact that at
resonant converter. With respect to component count, the pro-
full-load conditions turn-ON currents in switches are at min-
posed converter uses two extra capacitors than [20]. Table III
imum (zero for switch S1 ), which are reflected as minimum
shows that the proposed converter can operate at a lower trans-
switching losses. As indicated in [10], the switching losses are
former turns ratio than [20]. But, the converter proposed in [20]
analyzed for various loading conditions and calculated as 6.3
has lower switch peak voltages because it uses a class-D voltage
and 1.56 W at full- and light-load conditions, while total losses
source front-end inverter. Also, for this reason, it resorts to fre-
of the converter are calculated as 15.53 and 2.47 W for minimum
quency modulation. On the other hand, since Gui et al. [20] em-
input voltage and full-load conditions, respectively.
ploys a buck-type voltage source inverter, to attain the same gain
Fig. 15 compares the efficiency of the proposed converter
as proposed and [20], it needs a higher transformer turns ratio.
with the latest converter topology in the literature [10]. For
this purpose, the proposed converter is redesigned with the
V. CONCLUSION
same specifications as in [10]. The new converter components
are listed in Table III. The variation in efficiency is diametri- To achieve soft switching, good transformer utilization and
cally opposite in both converters. This is because of the dif- a compact dc–dc converter by eliminating the bulky LC filter
VAKACHARLA AND RATHORE: CURRENT-FED ISOLATED LCC-T RESONANT CONVERTER WITH ZCS AND IMPROVED TRANSFORMER UTILIZATION
in output was a challenge. Conventional LCC resonant dc–dc
converters provide better transformer utilization, but also need
a bulky LC filter. This bulky LC filter was eliminated in later
designs for cutting down the size of the converter. This ad-
vantage comes at the price of high ripple currents through the
transformer, which leads to its poor utilization, high rise in tem-
perature, and saturation in core.
This paper presented a current-fed isolated dc–dc LCC-T
resonant converter. All switches and diodes in this converter
operated in the ZCS mode. This converter not only eliminated
the bulky LC filter, but also handled the challenges put forward
by the absence of the LC filter. This converter was successful
in maintaining a sinusoidal current through the transformer
against harsh load and input variations, which was confirmed
through experimental results.
Also, front-end inverter capacitors were decoupled from res-
onance with the leakage inductance of transformer. This mini-
mized the voltages stress on inverter switches, and reduces the
switching loss. The essential requirement for applications in-
volving PV/fuel cells is that the converter should retain its soft
switching against harsh load and input variations. Experimental
results showed that the proposed converter was able to meet
this requirement without any compromise. Also, this converter
operated with simple duty ratio control at a constant switching
frequency.
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Venkata R. Vakacharla (S’17) received the
M.Tech degree in power electronics from the In-
dian Institute of Technology (BHU), Varanasi, In-
dia, in 2015. He is currently working toward the
Ph.D. degree in power electronics at Concordia
University, Montreal, QC, USA.
During 2015–2016, he was an Assistant Pro-
fessor with the VIEW College, Visakhapatnam,
India.
Akshay Kumar Rathore (M’05–SM’12) re-
ceived the M.Tech. degree in electrical machines
and drives from the Indian Institute of Technol-
ogy (BHU), Varanasi, India, in 2003, and the
Ph.D. degree in power electronics from the Uni-
versity of Victoria, Victoria, BC, Canada, in 2008.
He had two subsequent Postdoctoral Re-
search Appointments with the University of Wup-
pertal, Germany, and University of Illinois at
Chicago, IL, USA. From November 2010 to
February 2016, he was an Assistant Professor
with the Department of Electrical and Computer Engineering, National
University of Singapore, Singapore. He is currently an Associate Pro-
fessor with the Department of Electrical and Computer Engineering,
Concordia University, Montreal, QC, Canada. He has authored or coau-
thored more than 200 research papers in international journals and con-
ferences, including 70 IEEE Transactions. His research interests include
current-fed converters and multilevel inverters. He is leading the area
of current-fed power electronics and contributed to the analysis, design,
and development of new classes of such converters.
Dr. Rathore is currently an Associate Editor for the IEEE TRANSAC-
TIONS ON INDUSTRY APPLICATIONS, IEEE TRANSACTIONS ON INDUSTRIAL
ELECTRONICS, IEEE TRANSACTIONS ON TRANSPORTATION ELECTRIFICA-
TION, IEEE TRANSACTIONS ON SUSTAINABLE ENERGY, and IEEE JOURNAL
OF EMERGING SELECTED TOPICS IN POWER ELECTRONICS. He is Paper
Review Chair of the IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS FOR
INDUSTRIAL AUTOMATION AND CONTROL. He is a Distinguished Lecturer
and Executive Board Member-at-Large of the IEEE Industry Applica-
tions Society. He received the Gold Medal during his M.Tech. degree
for securing highest academic standing among all electrical engineering
specializations. He was a recipient of the University Ph.D. Fellowship
and Thouvenelle Graduate Scholarship during the Ph.D. program and
also the recipient of the 2013 IEEE IAS Andrew W. Smith Outstanding
Young Member Achievement Award, 2014 Isao Takahashi Power Elec-
tronics Award, and 2017 IEEE IES Early Career Award.