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FDP18N50 / FDPF18N50 500V N-Channel MOSFET

April 2007

UniFET TM

FDP18N50 / FDPF18N50
500V N-Channel MOSFET

Features Description
• 18A, 500V, RDS(on) = 0.265Ω @VGS = 10 V These N-Channel enhancement mode power field effect
• Low gate charge ( typical 45 nC) transistors are produced using Fairchild’s proprietary, planar
stripe, DMOS technology.
• Low Crss ( typical 25 pF)
• Fast switching This advanced technology has been especially tailored to
• 100% avalanche tested minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the avalanche
• Improved dv/dt capability
and commutation mode. These devices are well suited for high
efficient switched mode power supplies and active power factor
correction.

G
TO-220 TO-220F
G DS FDP Series
GD S FDPF Series
S

Absolute Maximum Ratings


Symbol Parameter FDP18N50 FDPF18N50 Unit
VDSS Drain-Source Voltage 500 V
ID Drain Current - Continuous (TC = 25°C) 18 18 * A
- Continuous (TC = 100°C) 10.8 10.8 ∗ A
IDM Drain Current - Pulsed (Note 1) 72 72 ∗ A
VGSS Gate-Source voltage ±30 V
EAS Single Pulsed Avalanche Energy (Note 2) 945 mJ
IAR Avalanche Current (Note 1) 18 A
EAR Repetitive Avalanche Energy (Note 1) 23.5 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns
PD Power Dissipation (TC = 25°C) 235 38.5 W
- Derate above 25°C 1.88 0.3 W/°C
TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C
TL Maximum Lead Temperature for Soldering Purpose,
300 °C
1/8” from Case for 5 Seconds
* Drain current limited by maximum junction temperature

Thermal Characteristics
Symbol Parameter FDP18N50 FDPF18N50 Unit
RθJC Thermal Resistance, Junction-to-Case 0.53 3.3 °C/W
RθCS Thermal Resistance, Case-to-Sink Typ. 0.5 -- °C/W
RθJA Thermal Resistance, Junction-to-Ambient 62.5 62.5 °C/W

©2007 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com


FDP18N50 / FDPF18N50 Rev. B
FDP18N50 / FDPF18N50 500V N-Channel MOSFET
Package Marking and Ordering Information
Device Marking Device Package Reel Size Tape Width Quantity
FDP18N50 FDP18N50 TO-220 - - 50
FDPF18N50 FDPF18N50 TO-220F - - 50

Electrical Characteristics TC = 25°C unless otherwise noted

Symbol Parameter Conditions Min. Typ. Max Units


Off Characteristics
BVDSS Drain-Source Breakdown Voltage VGS = 0V, ID = 250μA 500 -- -- V
ΔBVDSS Breakdown Voltage Temperature
ID = 250μA, Referenced to 25°C -- 0.5 -- V/°C
/ ΔTJ Coefficient
IDSS Zero Gate Voltage Drain Current VDS = 500V, VGS = 0V -- -- 1 μA
VDS = 400V, TC = 125°C -- -- 10 μA
IGSSF Gate-Body Leakage Current, Forward VGS = 30V, VDS = 0V -- -- 100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = -30V, VDS = 0V -- -- -100 nA
On Characteristics
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250μA 3.0 -- 5.0 V
RDS(on) Static Drain-Source
VGS = 10V, ID = 9A -- 0.220 0.265 Ω
On-Resistance
gFS Forward Transconductance VDS = 40V, ID = 9A (Note 4) -- 25 -- S
Dynamic Characteristics
Ciss Input Capacitance VDS = 25V, VGS = 0V, -- 2200 2860 pF
Coss Output Capacitance f = 1.0MHz -- 330 430 pF
Crss Reverse Transfer Capacitance -- 25 40 pF
Switching Characteristics
td(on) Turn-On Delay Time VDD = 250V, ID = 18A -- 55 120 ns
RG = 25Ω
tr Turn-On Rise Time -- 165 340 ns
td(off) Turn-Off Delay Time -- 95 200 ns
(Note 4, 5)
tf Turn-Off Fall Time -- 90 190 ns
Qg Total Gate Charge VDS = 400V, ID = 18A -- 45 60 nC
VGS = 10V
Qgs Gate-Source Charge -- 12.5 -- nC
Qgd Gate-Drain Charge (Note 4, 5) -- 19 -- nC

Drain-Source Diode Characteristics and Maximum Ratings


IS Maximum Continuous Drain-Source Diode Forward Current -- -- 18 A
ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 72 A
VSD Drain-Source Diode Forward Voltage VGS = 0V, IS = 18A -- -- 1.4 V
trr Reverse Recovery Time VGS = 0V, IS = 18A -- 500 -- ns
dIF/dt =100A/μs (Note 4)
Qrr Reverse Recovery Charge -- 5.4 -- μC

NOTES:
1. Repetitive Rating: Pulse width limited by maximum junction temperature
2. L = 5.2mH, IAS = 18A, VDD = 50V, RG = 25Ω, Starting TJ = 25°C
3. ISD ≤ 18A, di/dt ≤ 200A/μs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Pulse Test: Pulse width ≤ 300μs, Duty Cycle ≤ 2%
5. Essentially Independent of Operating Temperature Typical Characteristics

2 www.fairchildsemi.com
FDP18N50 / FDPF18N50 Rev. B
FDP18N50 / FDPF18N50 500V N-Channel MOSFET
Typical Performance Characteristics

Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics

2
10
VGS
2
10 Top : 15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
ID, Drain Current [A]

ID, Drain Current [A]


1 6.0 V
10 Bottom : 5.5 V

o
10
1
150 C

0 o
10 25 C
o
-55 C
* Notes :
* Notes :
1. 250μs Pulse Test
-1 1. VDS = 40V
10 o
2. TC = 25 C 2. 250μs Pulse Test
0
-1 0 1
10
10 10 10 2 4 6 8 10 12

VDS, Drain-Source Voltage [V] VGS, Gate-Source Voltage [V]

Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage


Drain Current and Gate Voltage Variation vs. Source Current
and Temperatue

2
RDS(ON) [Ω], Drain-Source On-Resistance

0.6 10
IDR, Reverse Drain Current [A]

0.5
VGS = 10V

0.4
1
10

0.3
VGS = 20V
150oC
0.2 o * Notes :
25 C
1. VGS = 0V
o
* Note : TJ = 25 C 2. 250μs Pulse Test
0
0.1 10
0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4

ID, Drain Current [A] VSD, Source-Drain voltage [V]

Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics


5000
12
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
4000 10 VDS = 100V
Coss
VGS, Gate-Source Voltage [V]

VDS = 250V
Capacitances [pF]

8 VDS = 400V
3000 Ciss

6
2000

4
* Note :
1. VGS = 0 V
1000 Crss 2. f = 1 MHz
2

* Note : ID = 18A
0 0
-1 0 1
10 10 10 0 10 20 30 40 50

VDS, Drain-Source Voltage [V] QG, Total Gate Charge [nC]

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FDP18N50 / FDPF18N50 Rev. B
FDP18N50 / FDPF18N50 500V N-Channel MOSFET
Typical Performance Characteristics (Continued)

Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation


vs. Temperature vs. Temperature

1.2 3.0
Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
1.1
BVDSS, (Normalized)

RDS(ON), (Normalized)
2.0

1.0 1.5

1.0
0.9 * Notes :
1. VGS = 0 V
2. ID = 250μA * Notes :
0.5
1. VGS = 10 V
2. ID = 9 A
0.8
-100 -50 0 50 100 150 200 0.0
-100 -50 0 50 100 150 200
o
TJ, Junction Temperature [ C] o
TJ, Junction Temperature [ C]

Figure 9-1. Maximum Safe Operating Area Figure 9-2. Maximum Safe Operating Area
- FDP18N50 - FDPF18N50

2 2
10 10
10 μs
10 μs
100 μs
100 μs
ID, Drain Current [A]

ID, Drain Current [A]

1 1 ms 1
10 10 1 ms
10 ms
100 ms 10 ms
Operation in This Area DC Operation in This Area 100 ms
0 is Limited by R DS(on) 0 is Limited by R DS(on)
10 10 DC

-1 -1
10 * Notes : 10 * Notes :
o o
1. TC = 25 C 1. TC = 25 C
o o
2. TJ = 150 C 2. TJ = 150 C
3. Single Pulse 3. Single Pulse
-2 -2
10 10
0 1 2 0 1 2
10 10 10 10 10 10

VDS, Drain-Source Voltage [V] VDS, Drain-Source Voltage [V]

Figure 10. Maximum Drain Currentvs. Case Temperature

20

15
ID, Drain Current [A]

10

0
25 50 75 100 125 150
o
TC, Case Temperature [ C]

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FDP18N50 / FDPF18N50 Rev. B
FDP18N50 / FDPF18N50 500V N-Channel MOSFET
Typical Performance Characteristics (Continued)

Figure 11-1. Transient Thermal Response Curve - FDP18N50

0
10

D = 0 .5
(t), Thermal Response

-1 0 .2
10

0 .1 PDM
0 .0 5 t1
t2
0 .0 2 * N o te s :
o
0 .0 1 1 . Z θ J C ( t) = 0 .5 3 C /W M a x .
θJC

-2
10 2 . D u ty F a c to r , D = t 1 /t 2
Z

s in g le p u ls e 3 . T J M - T C = P D M * Z θ J C ( t)

-5 -4 -3 -2 -1 0 1
10 10 10 10 10 10 10

t 1 , S q u a r e W a v e P u ls e D u r a tio n [s e c ]

Figure 11-2. Transient Thermal Response Curve - FDPF18N50

D = 0 .5
(t), Thermal Response

0
10
0 .2
0 .1

0 .0 5 PDM
-1
10 0 .0 2 t1
0 .0 1 t2
* N o te s :
o
1 . Z θ J C ( t) = 3 .3 C /W M a x .
θJC

2 . D u ty F a c to r , D = t 1 /t 2
Z

-2 s in g le p u ls e 3 . T J M - T C = P D M * Z θ J C ( t)
10

-5 -4 -3 -2 -1 0 1
10 10 10 10 10 10 10

t 1 , S q u a r e W a v e P u ls e D u r a tio n [s e c ]

5 www.fairchildsemi.com
FDP18N50 / FDPF18N50 Rev. B
FDP18N50 / FDPF18N50 500V N-Channel MOSFET
Gate Charge Test Circuit & Waveform

Resistive Switching Test Circuit & Waveforms

Unclamped Inductive Switching Test Circuit & Waveforms

6 www.fairchildsemi.com
FDP18N50 / FDPF18N50 Rev. B
FDP18N50 / FDPF18N50 500V N-Channel MOSFET
Peak Diode Recovery dv/dt Test Circuit & Waveforms

7 www.fairchildsemi.com
FDP18N50 / FDPF18N50 Rev. B
FDP18N50 / FDPF18N50 500V N-Channel MOSFET
Mechanical Dimensions

TO-220
9.90 ±0.20 4.50 ±0.20

(8.70)
1.30 ±0.10

2.80 ±0.10
(1.70)

+0.10
ø3.60 ±0.10 1.30 –0.05

18.95MAX.
(3.70)

15.90 ±0.20
9.20 ±0.20

(1.46)

(3.00)
(45°
)
(1.00)
13.08 ±0.20

10.08 ±0.30

1.27 ±0.10 1.52 ±0.10

0.80 ±0.10 +0.10


0.50 –0.05 2.40 ±0.20
2.54TYP 2.54TYP
[2.54 ±0.20] [2.54 ±0.20]

10.00 ±0.20

8 www.fairchildsemi.com
FDP18N50 / FDPF18N50 Rev. B
FDP18N50 / FDPF18N50 500V N-Channel MOSFET
Mechanical Dimensions

TO-220F
10.16 ±0.20 ø3.18 ±0.10 2.54 ±0.20
3.30 ±0.10

(7.00) (0.70)

6.68 ±0.20

15.87 ±0.20
15.80 ±0.20

(1.00x45°)

MAX1.47
9.75 ±0.30

0.80 ±0.10
(3

)

#1
0.35 ±0.10 +0.10
0.50 –0.05 2.76 ±0.20
2.54TYP 2.54TYP
[2.54 ±0.20] [2.54 ±0.20]
4.70 ±0.20

9.40 ±0.20

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FDP18N50 / FDPF18N50 Rev. B
FDP18N50 / FDPF18N50 500V N-Channel MOSFET
tm

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not
intended to be an exhaustive list of all such trademarks.
ACEx® i-Lo™ Power-SPM™ TinyBoost™
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HiSeC™
tm

DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO
IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE
OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE
RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS,
SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.

LIFE SUPPORT POLICY


FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT
THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems which, 2. A critical component in any component of a life support,
(a) are intended for surgical implant into the body or (b) support device, or system whose failure to perform can be reasonably
or sustain life, and (c) whose failure to perform when properly expected to cause the failure of the life support device or system,
used in accordance with instructions for use provided in the or to affect its safety or effectiveness.
labeling, can be reasonably expected to result in a significant
injury of the user.

PRODUCT STATUS DEFINITIONS


Definition of Terms
Datasheet Identification Product Status Definition
Advance Information Formative or In Design This datasheet contains the design specifications for product
development. Specifications may change in any manner without notice.

Preliminary First Production This datasheet contains preliminary data; supplementary data will be
published at a later date. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor
reserves the right to make changes at any time without notice to
improve design.

Obsolete Not In Production This datasheet contains specifications on a product that has been dis-
continued by Fairchild Semiconductor.The datasheet is printed for refer-
ence information only.
Rev. I26

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FDP18N50 / FDPF18N50 Rev. B

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