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Lecture 14

EC381
Digital Systems I
University of Tripoli

Digital Systems 1
Binary Adder-Subtractor

 Half adder
 0 + 0 = 0 ; 0 + 1 = 1 ; 1 + 0 = 1 ; 1 + 1 = 10
 Two input variables: x, y
 Two output variables: C (carry), S (sum)
 Truth table

Digital Systems 2
Full-Adder

 Full-Adder
 The arithmetic sum of three input
bits.
 Three input bits
» x, y : two significant bits.
» z : the carry bit from the previous
lower significant bit.
 Two output bits: C, S

Digital Systems 3
Binary Adder (Ripple Adder)Hierarchical
Design

Full-bit adder Digital Systems 4


3-bit Ripple Adder

Digital Systems 5
 Carry propagation
 When the correct outputs are available
 The critical path counts (the worst case)
 (A1, B1, C1) → C2 → C3 → C4 → (C5, S4)
 When 4-bits full-adder → 8 gate levels (n-bits: 2n gate levels)
 The total delay is 2n+1 (When S and Cout are ready).

Full Adder with P and G Shown


Digital Systems 6
Binary Adder–Subtractor

Digital Systems 7
Overflow

 Overflow
 The storage is limited
 Add two positive numbers and obtain a negative number
 Add two negative numbers and obtain a positive number
 V = 0, no overflow; V = 1, overflow
 Example:

Digital Systems 8
Binary Subtractor

 A-B = A+(2’s complement of B)


 4-bit Adder-subtractor
 M=0, A+B Addition ; M=1, A+(B’+1) Subtraction

4-Bit Adder Subtractor Digital Systems 9


Decimal Adder

 Add two BCD's


 9 inputs: two BCD's and one carry-in
 5 outputs: one BCD and one carry-out
 Design approaches
 A truth table with 29 entries
 Use binary full Adders
» The maximum sum ← 9 + 9 + 1 = 19
» Binary to BCD

Digital Systems 10
BCD Adder (1/3)

 BCD Adder: The truth table

Digital Systems 11
BCD Adder (2/3)

 Modifications are needed if the sum > 9


 If C = 1, then sum > 9
» K = 1, or
» Z8Z4 = 1 (11××), or
» Z8Z2 = 1 (1×1×).
 Modification: (10)d or + 6

C = K +Z8Z4 + Z8Z2

Digital Systems 12
BCD Adder (3/3)

 Block diagram

Fig. Block Diagram of a BCD Adder Digital Systems 13


Magnitude Comparator

 The comparison of two numbers


 Outputs: A>B, A=B, A<B

 Design Approaches
 The truth table of 2n-bit comparator
2n
» 2 entries - too cumbersome for large n
 Use inherent regularity of the problem
» Reduce design efforts
» Reduce human errors

Digital Systems 14

Digital Systems 15
Four-bit magnitude comparator

Digital Systems 16

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