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Abstract— This paper develops a dynamic model of a converter fed is- load while the frequency is determined by the reactive power
landed microgrid and proposes a control scheme to regulate its voltage and balance. Such steady state relations have been identified in the
frequency. The model, which is formulated in an instantaneously synchro-
nized reference frame, shows that the microgrid voltage depends on the real literature on islanding detection [12], [13], [14], [15], [16], [17]
power balance between the converter and the load while reactive power bal- although none of these publications offers a dynamic model of
ance determines the frequency. These results are used to synthesize a mi- an islanded microgrid. Based on the developed dynamic model,
crogrid voltage and frequency control scheme that allow converters with
standard inductor interface and dq frame current control to operate in in-
a microgrid voltage and frequency control scheme is synthe-
tentional islanding mode without using a frequency generator in the con- sized to allow converters with standard inductor interface and dq
troller. frame current control to operate in intentional islanding mode.
Keywords— Instantaneous Synchronization, Instantaneous Frequency, Section II of the paper presents the system structure while
Voltage Source Converter, Microgrid, Intentional Islanding section III develops the dynamic equations of an islanded mi-
crogrid based on instantaneous synchronization. Section IV pro-
I. INTRODUCTION poses a supervisory control scheme to regulate the voltage and
frequency of the microgrid. It also includes the control design
Many new distributed power sources, such as wind turbine
procedure and circuit simulation results.
generators and fuel cells, do not generate 60 Hz ac voltage.
Thus, they require voltage source converters (VSCs) as part of II. SYSTEM STRUCTURE AND CONVERTER MODEL
the circuitry to interface them with the power grid. A section of
the power grid with such power sources may be called a micro- This section describes the configuration of a simplified mi-
grid if it is capable of operating as an electrical island. crogrid, shown in Fig. 1. It consists of a collector bus, a con-
In grid connected operation, interface converters operate as verter, a bus capacitor, CB , and a load. The capacitor ensures
controlled current sources. Regulation of the point of common that the voltage pulsations at the terminals of the converter do
coupling (PCC) voltage magnitude and frequency is left to the not appear across the load. For simplicity, the load is assumed
grid. These converters operate at 60 Hz only because they are to be balanced, and it is represented as a parallel combination
synchronized to the PCC voltage vector, which rotates at 60 Hz of resistance R and inductance L, as is the norm in islanding
as dictated by the grid. In an islanded microgrid, there is no ex- detection literature [12], [14], [16], [17]. The line impedance
ternal grid to set the voltage and frequency, and these quantities between the collector bus and the load is much smaller than the
must be regulated by the converters. load impedance and is neglected. The converter is connected
Available literature on operation of converter fed power net- to the collector bus through an interface inductor, which is not
works is mainly in the context of uninterruptible power supplies shown here.
(UPSs). In islanded operation, a UPS employs a voltage control It is assumed in this paper that:
scheme that regulates the magnitude of its output voltage. Some 1. The converter employs pulse width modulation.
UPSs have inner current loops to protect the switches [1], [2], 2. The converter switches well above the fundamental fre-
[3] while others directly control the bridge terminal voltage to quency of the ac supply and the resonant frequency of the mi-
regulate the output voltage [4], [5], [6], [7]. All the above UPS crogrid.
control schemes employ a frequency generator in the controller, 3. The dc side of the converter is connected to a strong dc bus
such as a crystal oscillator, that assign an output frequency of 60 with sufficiently high voltage.
Hz. 4. The converter is regulated by a high bandwidth current con-
Most existing papers on intentional islanding operation of troller.
converter fed microgrids propose to operate the converters as 5. The system is balanced.
voltage sources. Like in a typical UPS, the converters regu- Given these assumptions, a fundamental frequency model of
late their output voltage magnitude while a frequency generator the converter is justified, where the converter is modeled as an
sets the frequency at 60 Hz [8], [9], [10]. A more sophisticated averaged current source. Note that the high frequency converter
converter control scheme is presented in [11], where the angle current dynamics have been neglected in order to focus exclu-
between the converter and network fluxes is set to regulate the sively on the dynamics and control of the islanded microgrid.
frequency of an islanded microgrid. However, the paper does
not relate the microgrid frequency to the angle between the two III. ISLANDING BEHAVIOR OF THE POWER
fluxes. Moreover, no control mechanism exists to limit overcur- NETWORK
rent in the converter. The section derives a linearized model of the islanded net-
This paper uses a reference frame, which is instantaneously work in Fig. 1. Modelling the converter as a current source, the
synchronized to the microgrid bus voltage, to develop a dynamic large signal dynamics of the network are given by:
model of an islanded microgrid. Contrary to a conventional
power system, the model shows that the microgrid voltage de- dvBabc vBabc iLabc i1abc
pends on the real power balance between the converter and the = − − + (1)
dt RCB CB CB
TABLE I
R
i1d Σ1 v Bd C ONVERTER R ATING AND THE L INEARIZATION P OINT
+- 1 + sRCB
i Ld Parameters and Variables Values P.U.
RMS of Base Voltage VBase = 115 VLL
2 RMS of Base Current IBase = 25 A
L v Bd
Load Resistance R = 3.98 Ω 1.5 p.u.
+ 1 i Ld Load Inductance L = 17 mH 2.41 p.u.
i1q K3 Σ2 Collector Bus Capacitance CB = 300 µF 0.3 p.u.
+ s
v Bd
+ Collector Bus Voltage vBd0 = 115 VLL 1 p.u.
i Lq K 2 d axis Component of iL iLd0 = 0 A 0 p.u.
K1 K4
s q axis Component of iL iLq0 = -14.62 A -0.58 p.u.
i1q - - System Bus Frequency ωB = 60 Hz 1 p.u.
Σ3 K5 Σ4 ωB d axis Component of i1 i1d0 = 23.6 A 0.94 p.u.
+ + q axis Component of i1 i1q0 = -4 A -0.16 p.u.
Fig. 2. Small signal block diagram representation of the linearized system
model.
Fig. 4 shows the responses of vBd and ωB to a 1 A step
change in i1q as predicted by the linearized system model and
The matrices A, B, C and D are found to be:
time domain circuit simulation. There is a close match between
⎡ ⎤ ⎡ 1 ⎤
− RC1 B − C1B 0 CB 0 the two sets of plots, indicating that the linearized system model
A = ⎣ − L2 0 K1 ⎦ B = ⎣ 0 K3 ⎦ and its underlying nonlinear equations are accurate.
0 K2 0 0 0
IV. THE PROPOSED CONTROL SCHEME
1 0 0 0 0
C = D= (25)
−K4 0 −K5 0 K5 It is stated in section III.A. that the system voltage is primarily
influenced by the active current i1d whereas the reactive current
where i1q influences the system frequency. The graphs of Fig. 3 and
i1q0 − 2iLq0 iLq0 − i1q0 4 confirm these points. This section proposes a control scheme
K1 = K2 = that employs i1d and i1q as control inputs to regulate the vBd
CvBd0 CvBd0
and ωB respectively.
iLq0 i1q0 − iLq0
K3 = K4 = 2 Fig. 2 shows that the dynamics of the system voltage and
CvBd0 CvBd0
frequency are coupled. Thus, the following systematic approach
1 is used in developing the control scheme to ensure closed loop
K5 = .
CvBd0 stability in the presence of both voltage and frequency control
Fig. 2 shows the linearized system in block diagram form. loop compensators:
1. Derive the transfer function that relates i1d to vBd as per Fig.
C. Model Validation 5.
The linearized system model of (23) is validated by compar- 2. Choose the parameters of a PI compensator for the voltage
ing its step response to that of the power system of Fig. 1, which control loop.
is simulated in PSCAD/EMTDC, a time domain circuit simula- 3. Augment the system model of (23) with the compensator
tion tool for power systems. equation.
A fundamental frequency current source model is used to rep- 4. Use the augmented system model shown in Fig. 8 to derive
resent the converter in simulation. It consists of three control- the transfer function that relates i1q to ωB .
lable ideal current sources that generate the current i1abc . These 5. Choose the parameters of a second PI compensator for the
currents are assigned as per the Appendix. The PWM pattern frequency control loop, along with a virtual damping resistor,
generator, converter switches and interface inductors are not in- Rv .
cluded in the simulation.
Table I lists the system parameters and the initial values of the A. Voltage Control
system variables that define the linearization point. The initial The linearized system model of Fig. 2 may be used as the
values of i1d and i1q are also given in the table. starting point for the derivation of the plant transfer function re-
To obtain the step response of the circuit, it is first operated lating i1d to vBd . Setting i1q = 0 and rearranging the blocks
at the linearization point given in Table I. A step change of results in the plant model shown in Fig. 5, which may be sim-
1 A is then applied to input i1d . The responses of vBd and ωB plified to derive the following transfer function:
to the i1d step is plotted against time in Fig. 3. Also plotted
on the same graph are the corresponding step responses of the
linearized system. The close match between the two sets of plots vBd (s) s2 /CB − K1 K2 /CB
= 3 2
indicates that the linearized system model is accurate, as are the i1d (s) s + s /RCB + (2/LCB − K1 K2 )s − K1 K2 /RCB
underlying nonlinear equations in reference frame B. (26)
4
Step Response of the System Bus Voltage Magnitude Response of the Voltage Control Loop Plant
121 30
120 20
Bus Voltage (V)
10
Magnitude (dB)
119
Circuit Simulation
118 0
Linearized System Model
-10 Plant With Rv
117
Plant Before Adding Rv
116
-20
-30
115
0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1
Time (sec) -40
1 2 3 4
10 10 10 10
Step Response of the System Bus Frequency Frequency (rad/s)
62
Circuit Simulation Phase Response of the Voltage Control Loop Plant
61.5 Linearized System Model 100
61
Frequency (Hz)
Plant With Rv
59.5 0
59
-50
0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1
Time (sec)
-100
1 2 3 4
10 10 10 10
Fig. 3. Response of bus voltage and frequency to a step change in i1d , demon- Frequency (rad/s)
116
64
62
where
1 Kpv 3 2 Kiv 2
Fig. 5. Block diagrams to facilitate the derivation of i1d to vBd transfer func- D(s) = s4 + ( + )s + ( − K1 K2 + )s
tion. Re CB CB LCB CB
K1 K2 K1 K2 Kpv K1 K2 Kiv
It can be shown using Routh-Hurwitz criterion that the open −( + )s −
Re CB CB CB
loop transfer function would be unstable if the coefficient K1 K2
were positive. While K1 K2 may be proven to be negative re- As an example, a voltage control loop is designed for the
gardless of the values of i1q and ilq , the damping of the open power system in Fig.1. The plant parameters and the lineariza-
loop system depends upon the load. As the load decreases, co- tion point are listed in Table I. Rv is 7.94Ω(3pu). The bode
(s) (s)
efficients 1/RCB and K1 K2 /RCB approach zero, moving the plots of viBd
1d (s)
and vuBd
v (s)
, which are shown in Fig. 6, may be
system poles towards the imaginary axis. To keep the open loop used for designing the PI compensator.
system sufficiently damped regardless of the load resistance, a The proportional and integral gains of the compensator are
virtual resistance Rv is added in parallel with CB . This is real- chosen as 0.068 and 85 respectively and the step response of the
ized by making i1d a function of vBd as well as the compensator voltage control loop for three load configurations as generated
output uv as shown in Fig. 5. The modified transfer function as by PSCAD/EMTDC is shown in Fig. 7. It can be seen that:
5
Unit Step Response of the System Bus Voltage Unit Step Response of the System Bus Frequency
118 61.2
117.5 61
117 60.8
Frequency Reference
System Bus Voltage (V)
Frequency (Hz)
116.5 60.6 Response with R Load
Bus Voltage Reference
Response with L Load
Response with Nominal RL Load
116 Response with R Load 60.4
Response with L Load
115.5 60.2
115 60
114.5 59.8
0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1
Time (sec) Time (sec)
Fig. 7. Unit step Response of the voltage control loop. Fig. 9. Unit step response of the frequency control loop.