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Outline
MSP430 Family
MSP430 CPU
Memory
MSP430 Peripherals
Ultra Low-Power (ULP)
Community / Resources
Launchpads
Lab Exercise
Chapter 1: Introduction
TI’s Embedded
Microcontrollers (MCU)Processor Portfolio
Application (MPU)
MSP430 C2000 Tiva C Hercules Sitara DSP Keystone
16-bit 32-bit 32-bit 32-bit 32-bit 16/32-bit 32-bit
Ultra Low Real-time All-around Safety Linux All-around Massive
Power & Cost MCU Android DSP Performance
• Real-time ARM ARM • C66 + C66
MSP430 DSP
C28x MCU ARM • A15 + C66
ULP RISC Cortex-M3 Cortex-A8 C5000
• A8 + C64
MCU • ARM M3+C28 Cortex-M4F Cortex-R4 Cortex-A9 C6000
• ARM9 + C674
• Low Pwr Mode • Motor Control • 32-bit Float • Lock step • $5 Linux CPU • C5000 Low • Fix or Float
250nA (RTC)
770nA (LCD)
• Digital Power • Nested Vector Dual-core R4
IntCtrl (NVIC) • ECC Memory • 3D Graphics
Power DSP • Up to 12 cores
4 A15 + 8 C66x
• Analog I/F • Precision • PRU-ICSS • 32-bit fix/float
Timers/PWM • Ethernet industrial subsys C6000 DSP • DSP MMAC’s:
• USB and RF (MAC+PHY) • SIL3 Certified 352,000
3rd Party Linux, Android, C5x: DSP/BIOS Linux
TI-RTOS TI-RTOS (k) TI-RTOS
(only) TI-RTOS Kernel C6x: TI-RTOS (k) TI-RTOS (k)
Flash: 512K 512K 1MB 256K to 3M L1: 32K x 2 L1: 32K x 2 L1: 32K x 2
FRAM: 128K Flash Flash Flash L2: 256K L2: 256K L2: 1M + 4M
25 MHz 300 MHz 120 MHz 220 MHz 1.35 GHz 800 MHz 1.4 GHz
Increased Performance Computation Timing and Control Signal Chain Communication I/O & Display
Innovative Features
Operational
Multi-channel DMA supports data Amplifiers
Accelerators Timers
• 32x32 Multiplier • Watch Dog Timer (WDT_A)
• DMA (3 Ch) • Real Time Clock (RTC_B)
• CRC16 • Two 16-bit w/3 CCR (TA0, TA1)
• AES256 Encryption (FR59xx) • Two 16-bit w/2 CCR (TA2, TA3)
• One 16-bit w/7 CCR (TB0)
Serial Interfaces
• 3 Serial Interfaces (eUSCI) Connectivity
• 2 UART + IrDA or SPI • Up to 40 GPIO (Interrupt/Wake)
• 2 I2C or SPI • Cap touch IO
Peripherals Peripherals 4K
0x0000 Bytes Let's look closer at FRAM...
‘F5529 ‘FR6989
0x243FF
Memory Maps
Main Main 81K ‘FR5969
Flash FRAM
0xFFFF Main FRAM 17K ‘FR4133
0xFF80 INT Vectors INT Vectors INT Vectors 80 INT Vectors 80
Main 15.5K
Main Main Main FRAM
47K
Flash FRAM FRAM
0x4400 Vacant
RAM Vacant Vacant 8K
0x2400
0x1C00 USB RAM RAM RAM 2K RAM 2K
0x1A00 TLV TLV TLV TLV
Info A Info A Info A 128
Info B Info B Info B 128
Info A 512
Info C Info C Info C 128
0x1800 Info D Info D Info D 128
Vacant
Boot Loader Boot Loader Boot Loader 2K Boot Loader 1K
Peripherals Backup RAM 20B
Peripherals Peripherals 4K
0x0000 Tiny RAM (26B) Let's
Byteslook closer at FRAM...4K
Peripherals
Outline
TI Products
TI's Embedded Processors
MSP430 Family
MSP430 CPU
Memory
Memory Map
FRAM
MSP430 Peripherals
Ultra Low-Power (ULP)
Community / Resources
Launchpads
Lab Exercise
Chapter 1: Introduction
FRAM: The Future of MCU Memory
Universal Memory
Photo: Ramtron Corporation
Memory Comparison
FRAM MCU Delivers Max Benefits
FRAM SRAM EEPROM Flash
Non-volatile
Retains data without power
Yes No Yes Yes
Dynamic
Bit-wise programmable
Yes Yes No No
Unified memory
Flexible code/data Yes No No No
partitioning
Outline
TI Products
TI's Embedded Processors
MSP430 Family
MSP430 CPU
Memory
MSP430 Peripherals
UltraLow-Power (ULP)
Community / Resources
Launchpads
Lab Exercise
Chapter 1: Introduction
MSP430 GPIO (Chapter 3)
GPIO
CH 3
GPIO (Chapter 3)
Independently programmable
Any combination of input, output,
interrupt and peripheral is possible
Each I/O has an individually
programmable pull-up/pull-down
resistor
Many devices can lock pin values
‘F5529 block diagram during low-power modes
Some devices support touch-sense
capability built into the pins
MSP430 Timers (Chapters 3, 5, 6, 8)
Watchdog GPIO
CH 3 & 5 CH 3
Timers (Chapters 3, 5, 6, 8)
Timer_A: 16-bit timer/counter
Multiple capture/compare registers
Generates PWM and other complex
waveforms & interrupts
Directly trigger GPIO, DMA, ADC, etc.
Timer_B: Same as A; improved PWM
Timer_D: Same as B; with hi-res timing
‘F5529 block diagram RTC: Real-time clock with calendar &
CH 6 CH 8 alarms – runs in LPM3 low power mode
Timer A & B RTC Watch: Watchdog or interval functions
MSP430 Clocking & Power Mgmt (Ch 4)
Clocks Power
CH 4 CH 4
Clocking (Chapter 4)
Three Internal Clocks provide for
CPU, fast and slow peripherals
Many clock sources (internal and
external) provide cheap and accurate
clks with quick wake-up
Clock defaults and failsafe’s improve
system robustness
Power Mgmt
Brown-out reset on all devices
Many provide LDO’s and power
‘F5529 block diagram supervisors
On-chip power gating drives ULP
MSP430 Analog
Clocks Power Watchdog GPIO
CH 4 CH 4 CH 3 & 5 CH 3
Analog
Families ADC converter options:
10 or 12-bit SAR (ADC10, ADC12)
16 or 24-bit Sigma-Delta (SD16, SD24)
Slope converters
DAC converters: 12-bit DAC12
Comparators
Voltage REFerences
Features in common:
Analog mux supporting multiple input chan’s
DMA can read/write samples without CPU
‘F5529 block diagram
Precise timing when using timer to trigger
CH 6
Generate interrupts to CPU
Timers
Low power dissipation
Sampling of MSP430 Analog
MSP430i2040
4 Sigma-Delta AFE
1% accuracy for precise measurements
with a 2000:1 dynamic range ΣΔ
convertors
Low Cost SoC – Targets low-end meters
with minimal communications (memory)
requirements
Internal DCO – eliminates need for
external crystal
Small packages minimize pin count and
cost
Temperature - -40C to 105C
MSP430F67791
7 Independent Sigma-Delta ADC’s
with Differential Inputs and Variable Gain
7 Channel 10-bit SAR ADC (200-ksps)
Six Channels Plus Supply and
Temperature Sensor Measurement
LCD Driver With Contrast Control for up
to 320 segments
Six Enhanced Communications Ports
512 KB of Flash
32 KB of SRAM
MPY and CRC Accelerators
MSP430 Communication
Clocks Power Watchdog GPIO USB
CH 4 CH 4 CH 3 & 5 CH 3 CH 10
Communications
USB (Chapter 10)
USB 2.0 at Full speed (12Mbps)
Includes PHY, LDO, PLL, PUR
Serial ports
USI: SPI, I2C
USCI: SPI, I2C, IrDA, UART
eUSCI: enhanced USCI
Radio Frequency
CC430 and RF430 devices include
‘F5529 block diagram
Sub-1GHz or NFC radios CH 6
WiFi, BLE, ANT, BluetoothTimers
& Sub1GHz
communications via TI SimpleLink
MSP430 Accelerators
Clocks Power Watchdog GPIO USB
CH 4 CH 4 Accelerators
CH 3 & 5 CH 3 CH 10
Community / Resources
Launchpads
Lab Exercise
Chapter 1: Introduction
Why does Ultra Low Power Matter?
2.9 Billion
$50 Billion
Thrown Away
Spent Every Year
Each Year in
On Batteries
the U.S.
50 Billion
Additional
Connected
Devices Expected
by 2020
Distributed
Sensor Networks
Mean More
Batteries in
Remote Locations
Why does Ultra Low Power Matter?
How does this impact you?
2.9 Billion
$50 Billion
Thrown Away
Spent Every Year
Each Year in
On Batteries
the U.S.
50 Billion
Additional
Connected
Devices Expected
by 2020
Distributed
Sensor Networks
Mean More
Batteries in
Remote Locations
Standby (LPM3)
0.4 A
Self Wakeup
CPU (MCLK)
Retention
SMCLK
Operating
ACLK
RAM
BOR
Mode Interrupt Sources
Active
LPM0
Timers, ADC, DMA, WDT, I/0,
LPM1 External Interrupt, COMP,
Serial, RTC, other
LPM2
LPM3
LPM3.5 External Interrupt, RTC
LPM4 External Interrupt
LPM4.5 External Interrupt
Chapter 1: Introduction
TTO Workshops: processors.wiki.ti.com
This Workshop
Engineer-2-Engineer Forums
http://e2e.ti.com
Outline
TI Products
TI's Embedded Processors
MSP430 Family
MSP430 CPU
Memory
MSP430 Peripherals
Ultra Low-Power (ULP)
Community / Resources
References
Launchpads
Lab Exercise
Chapter 1: Introduction
Further Reading…
MSP430 Microcontroller Basics by John H. Davies,
(ISBN-10 0750682760) Link
Lab Exercise
Chapter 1: Introduction
MSP-EXP430F5529LP Launchpad
MSP-EXP430F5529LP Overview
Outline
TI Products
TI's Embedded Processors
MSP430 Family
MSP430 CPU
Memory
MSP430 Peripherals
Ultra Low-Power (ULP)
Community / Resources
Launchpads
Lab Exercise
Chapter 1: Introduction
Lab 1 – Run Out-of-Box Demo
Agenda …
http://www.ti.com/training