432 IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 5, NO.

1, MARCH 2017

Topologies and Control Strategies of Cascaded

Bridgeless Multilevel Rectifiers
Cong Wang, Yuan Zhuang, Jian Jiao, Heng Zhang, Chang Wang, and Hong Cheng

Abstract— This paper presents a new unidirectional cascaded

bridgeless multilevel rectifier (CBR) well suited for serving as the
rectifier stage of a transformerless cascaded multilevel converter.
Compared to a traditional cascaded H-bridge rectifier, the
proposed CBR utilizes fewer fully controlled switching devices by
replacing the fully controlled H-bridge modules with bridgeless
PFC modules, thus simplifying the control circuits, increasing the
system reliability, and cutting down the implementation expenses.
However, when a single-phase CBR is operating under a unity
power factor, the input current will be severely distorted because
of the unidirectional power flow property of the bridgeless
PFC modules. Therefore, aiming at achieving a satisfactory
current quality and power factor simultaneously, an improved
control strategy and a revised topology for the single-phase
CBR are provided as two effective solutions. Specifically, for
the single-phase CBR under the improved control, the limitation
of the maximum value of the boost inductance considering
an acceptable power factor is derived. Besides, the method of
determining the configuration of the modified single-phase CBR
is given based on the steady-state analysis. In addition, for the
three-phase CBR, the reason that the traditional control strategy Fig. 1. Topology of cascaded H-bridge converter.
is capable of realizing unity power factor rectification while
mitigating input current zero-crossing distortion is analyzed.
Finally, simulations in the MATLAB/Simulink environment and
experimental results from scaled-down laboratory prototypes are TCMC is able to realize direct connection to the medium/high
provided to verify the proposed theories. voltage power grid without involving a bulky and expen-
Index Terms— Bridgeless PFC rectifier, cascaded H-bridge sive line-frequency transformer, thus increasing the efficiency
converter, current distortion, power factor correction, topology and power density of the system. Besides, the utilization of
configuration. CHR also endows the TCMC with many additional advan-
tageous features such as improved power quality and flexi-
I. I NTRODUCTION ble regulation of output voltage, which justify the potential
of the TCMC as a renewable energy interface or a solid-
W ITH the advancement of power semiconductor devices
and other power electronics-related technologies, the
emerging concept of the transformerless cascaded multilevel
state transformer [10], [11]. Related design guidance and
control strategies of the TCMC have been provided in the
converter (TCMC) has rapidly developed and caught increas- literature.
ing attention from both the academia and industry in the Despite all the aforementioned merits, the CHR still pos-
past decades [1]–[9]. As shown in Fig. 1, by employing a sesses some undesirable properties when it is used as the
cascaded H-bridge rectifier (CHR) as the front stage, the rectifier stage of a TCMC. The major drawbacks include
high switching losses, complicated hardware system, and
Manuscript received July 24, 2016; revised September 24, 2016; accepted high implementation expenses as all the switching devices
October 24, 2016. Date of publication November 8, 2016; date of current
version January 31, 2017. This work was supported by the National Natural adopted in the CHR are fully controlled ones (IGBT or
Science Foundation of China under Grant 51500187. Recommended for power MOSFET) with antiparallel diodes. In addition, consid-
publication by Associate Editor Xinbo Ruan. ering a TCMC intended for a higher voltage-rated application,
C. Wang, Y. Zhuang, J. Jiao, H. Zhang, and H. Cheng are with the
School of Mechanical, Electronics and Information Engineering, China more H-bridge modules need to be cascaded to compose
University of Mining and Technology, Beijing 100083, China (e-mail: the CHR, which further increases the number of fully con-
wangc@cumtb.edu.cn; yuanzhuang@student.cumtb.edu.cn; 29021246@ trolled switches and inevitably leads to more complicated
qq.com; 870987598@qq.com; chengh@cumtb.edu.cn).
C. Wang is with Beijing Huadian Tianren Electric Power Control control, gate driving, and protection circuits. This eventually
Technology Corporation, Beijing 100039, China (e-mail: wangch@student. reduces the system reliability and increases the implementation
cumtb.edu.cn). costs [12]–[14].
Color versions of one or more of the figures in this paper are available
online at http://ieeexplore.ieee.org. However, in nearly 70% of practical applications, includ-
Digital Object Identifier 10.1109/JESTPE.2016.2626788 ing speed regulation for pumps, wind power integration,
2168-6777 © 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
WANG et al.: TOPOLOGIES AND CONTROL STRATEGIES OF CBR
Fig. 2. Topology of single-phase cascaded diode H-bridge rectifier.
and plug-in electrical vehicle applications, only a unidirec-
tional power flow is required [15]–[17]. For such practices,
some fully controlled switches can be eliminated or replaced
to simplify the system [18]. Ronan et al. [19], [20] proposed
a cascaded boost PFC rectifier. As can be seen from Fig. 2,
several power modules are cascaded for direct connection to
the medium voltage grid. Each of these power modules is
composed of a traditional boost PFC circuit. In this way,
the number of fully controlled switches is greatly reduced.
However, the boost inductor of each power module is located
at the dc side. Under certain conditions, the energy stored
in the boost inductor can generate a circulating current that
circulates through the fully controlled switch and the diodes.
Consequently, the large circulating current may damage the
devices or even break down the whole system. Additionally,
the power module shorted by the circulating current is actually
bypassed from the power grid, thus the grid voltage has to
be shared among the other cascaded modules. As a result,
the voltage stresses of the switches in those modules increase
greatly [21]. Another problem is that the current is always car-
ried through three semiconductor devices within each module,
causing relatively high conduction losses [22]. Reference [23]
presented a diode H-bridge cascaded boost rectifier. The power
grid is directly connected with a high voltage-rated diode
H-bridge rectifier, which is in series-connection with several
cascaded boost dc/dc modules. This topology also employs
much fewer fully controlled switches and can effectively
prevent the circulating current. The diode H-bridge rectifier,
however, still has a limited input voltage rating, which makes
it unable to be directly connected to the medium/high voltage
power grid.
It is worth pointing out that a three-phase multilevel rectifier
uses three times as many cascaded modules as a same rated
single-phase rectifier does. Therefore, developing a new topol-
ogy for the three-phase cascaded multilevel rectifier brings
even more attractive benefits. However, no related research
has been reported yet.
This paper presents a cascaded bridgeless multilevel recti-
fier (CBR) aiming at using fewer fully controlled switches
to reduce hardware complexity, increase system reliability,
433
Fig. 3. Topology of single-phase CBR.
and cut down the implementation expenses. Based on ana-
lyzing the physical cause of the input current zero-crossing
distortion when the single-phase CBR is operating under a
unity power factor, an improved control strategy is proposed
to achieve a satisfactory power factor and eliminate the input
current zero-crossing distortion. Besides, a revised topology
of the single-phase CBR is presented as another solution for
avoiding the input current distortion under the unity power
factor condition. In addition, different from the single-phase
case, the three-phase CBR can achieve a unity power factor
with greatly attenuated input current zero-crossing distortion
by employing the traditional control method.
The rest of this paper is organized as follows. Section II
presents the basic principles of the proposed CBR, includ-
ing the topology configuration, the steady-state mathemati-
cal model, and the analysis of input power factor. On this
basis, two solutions for achieving a satisfactory power factor
and eliminating the input current distortion are proposed in
Sections III and IV. To be specific, Section III provides an
improved control strategy for the single-phase CBR and gives
the boost inductance selection method to keep the power factor
within an acceptable range. As the second option, a revised
single-phase CBR topology is proposed in Section IV and the
method of determining the numbers for the bridgeless modules
and the H-bridge modules used in this revised topology is
also analyzed in detail. Section V explains the ability of the
three-phase CBR to mitigate the input current distortion under
the unity power factor condition. Simulation and experimental
results are provided in Section VI to verify the validity of the
theoretical findings. Finally, the conclusions are summarized
in Section VII.
II. BASIC P RINCIPLES OF THE CBR
A. Topology Configuration of the CBR
Fig. 3 shows the main topology of the proposed
single-phase CBR. As can be seen, n bridgeless modules are
cascaded so that the rectifier can be directly connected to the
medium/high voltage grid. Compared to a traditional H-bridge
module, each bridgeless module reduces 50% fully controlled
switches. Therefore, the control circuits, gate drivers, as
well as protection units are greatly reduced, thus decreasing
the system complexity and switching losses drastically [24].
434 IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 5, NO. 1, MARCH 2017

For a nonideal power converter, the ac side power loss

induced by the line impedance, boost inductor ESR, and other
device parasitic parameters is approximately proportional to
the square value of the input current. Hence, an equivalent
series resistor Req is used to represent the ac side power loss
as well as the voltage drop at the input side of the cascaded
modules [10].
Fig. 4. AC side phasor diagram of the single-phase CBR.
B. Steady-State Mathematical Model of the CBR
Define u aci and u i as the ac voltage and the output dc
voltage of Module i , respectively, where i = 1, 2, . . . , n.
In each bridgeless module, the two fully controlled switches
are controlled by two identical gate signals [25]. Define
Si as the switching function of Module i. When Si = 1,
the switching devices of Module i are turned on, while
Si = 0 means the switching devices are turned off. Due to
the unidirectional conduction property of the diodes, the ac
voltage of Module i depends on the direction of the input
current and can be derived as
 Fig. 5. Theoretical relationship between i S and u con .
(1 − Si )u i iS > 0
u aci = (1)
−(1 − Si )u i i S < 0.
Applying KVL and KCL to the topology shown in Fig. 3, controlled equal to the reference value. Actually, from the
the steady-state mathematic model can be yielded as circuit point of view, di controls the charging and discharging
⎧ time of the dc capacitor, thus directly influencing u i . This is
⎪
⎪ di S n
a straightforward physical explanation of using di to balance
⎪
⎨L = u S − Req · i S − Si∗ · u i
dt the output dc voltages.
i=1 (2)
⎪
⎪ du i ui
⎪
⎩C ∗
= Si · i S −
dt Ri C. Power Factor Analysis of the Single-Phase CBR
where Fig. 4 gives the ac side phasor diagram of the single-phase
us , is the input voltage and input current; CBR. Since the ac side equivalent series resistance Req is
L the boost inductance at the ac side; very small, the voltage drop across it is reasonably neglected
C the dc capacitance of each module; here [28]. Under the condition that the unity power factor
Req the ac side equivalent series resistance; is achieved, the input voltage U S is in phase with the input
Ri , u i , Si the equivalent load resistance, output voltage, current I S . The voltage across the boost inductor U L is
and switching function of Module i. S i = 0, 1; orthogonal to I S . Ucon is the total ac voltage of the rec-
Si∗ = 1 − Si ; i = 1, 2, . . . , n. tifier and it equals the sum of the ac voltages of all the
Applying the volt-second balance and ampere-second cascaded modules. According to the triangle law of vector
balance principles to (1) and (2) yields addition, Ucon lags I S by θ . As shown in Fig. 5, this lagging
⎧ uS angle θ indicates that during a period of θ after the current
⎪
⎨ i s = Req + n Ri (1 − di )2
⎪ crosses zero, the input current i S and the total ac voltage of
i=1
(3) the rectifier u con have to be opposite in polarities. By contrast,
⎪
⎪ u S · Ri (1 − di )
⎩ ui = n due to the unidirectional conduction property of the diodes, the
Req + i=1 Ri (1 − di )2
ac voltage and the input current of a single-phase CBR must
where di is the duty cycle of Module i . always remain in the same direction. Hence, during this period
Equation (3) indicates the input–output characteristics of of θ , the CBR can only generate a 0 V ac voltage, causing
the CBR. By modifying the duty cyclesd1 , d 2 …d n , the output the input current i S to be
voltages of the cascaded modules and the input current of
di S
the rectifier can be adjusted. For instance, the dc voltage U S cos ωt = L (4)
unbalance could appear due to the device loss mismatching dt
US
and the real power differences among the cascaded modules. iS = sin ωt (5)
The unbalanced voltage will cause the capacitor and/or switch ωL
overvoltage and then trigger the system overvoltage protection. where U S is the magnitude of the input voltage.
Therefore, the output dc voltages of the cascaded modules Equation (5) indicates that at the zero-crossings, i S sud-
must be balanced to ensure safe and stable operation [26], [27]. denly changes to be lagging behind u con by 90, rather
As is implied by the mathematical relationship between than keeping in phase with u con . Therefore, as can be
u i and di , through appropriately modifying di , u i can be seen in Fig. 6, if a single-phase CBR is forced to operate
WANG et al.: TOPOLOGIES AND CONTROL STRATEGIES OF CBR 435

Fig. 8. AC side waveforms of the single-phase CBR under the improved

control strategy.
Fig. 6. Input current zero-crossing distortion of the single-phase cascaded
diode H-bridge rectifier.

Fig. 7. AC side phasor diagram of the single-phase CBR under the improved
control strategy.

under the unity power factor, serious input current distor-

tion appears at the zero-crossings. This property is defined
as the input current zero-crossing distortion. Actually, the
heavier the loads are, the more serious the input current
zero-crossing distortion is. To address this problem, two pos-
sible solutions are provided in the following. The first solution
is to employ an improved control strategy. The second option
is to replace some (but not all) of the bridgeless module(s) of
Fig. 9. Block diagram of the improved control strategy for the
single-phase CBR.
Substituting (6) into (7) and considering that the output
dc voltages are well balanced in the steady state, the desired
lagging angle can be yielded as

the CBR with H-bridge module(s).
III. I MPROVED C ONTROL S TRATEGY FOR
THE S INGLE -P HASE CBR
A. Improved Control Strategy
The conventional CHR adopts the classical double-loop
control method to make the input current in phase with the
input voltage so that the unity power factor is achieved.
However, this control scheme needs to be modified before
it can be applied to the single-phase CBR, otherwise, the
input current will be seriously distorted at the zero-crossings.
The core idea of the improved control strategy is to make
I S in phase with Ucon , rather than in phase with U S .
As can be seen from Fig. 7, applying this new control strategy
results in a lagging power factor and the lagging angle ϕ
increases to ϕ ∗ when the loads become heavier. By realizing
the desired lagging angle, I S and Ucon can be kept in phase,
thus eliminating the current distortion. The corresponding ac
waveforms are shown in Fig. 8.
According to the geometric relationship indicated in Fig. 7,
the voltage across the boost inductor U L satisfies
U L = ωLI S = U S sin ϕ.
Considering the input–output power balance, (7) can be
yielded as

n
u 2i
= U S I S cos ϕ.
Ri
i=1
2ωLUd2  1
n
1
ϕ = arcsin · (8)
2 U S2 Ri
i=1
where Ud is the reference output dc voltage of each cascaded
module.
After obtaining the desired lagging angle, the improved
control strategy can be applied to the single-phase CBR.
As can be seen in Fig. 9, the overall voltage loop is imple-
mented to regulate the total output voltage. The current loop
generating the total duty ratio d is responsible for realizing a
sinusoidal current without zero-crossing distortion by forcing
the input current to lag the input voltage by the desired
angle ϕ. For Module 2 to Module n, a PI controller is applied
to each module as an individual voltage regulator to make
the output dc voltage equal to the reference value u ∗ , thus
balancing the dc voltages. Through these individual voltage
regulators, the duty cycles d2 . . . dn are generated. Then the
duty cycle of Module 1 is obtained by d1 = d − d2 − · · · − dn .
It should be noticed that although the input current lags the
input voltage by a certain angle, a satisfactory power factor for
most practical applications (above 0.95) can still be ensured by
limiting the maximum value of the boost inductance according
to (8).
(6)
B. Maximum Boost Inductance Limitation
Usually, the minimum inductance L min is determined
according to the allowed current ripple magnitude i S .
References [19] and [21] proposed a method that uses the
(7) minimum duty cycle of all the cascaded modules to estimate
436 IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 5, NO. 1, MARCH 2017

Fig. 11. AC side phasor diagram of the revised single-phase CBR.

Fig. 11 shows the ac side phasor diagram (with U L exag-

gerated) of the revised topology. Since the unity power factor
is strictly demanded, I S is in phase with U S . Hence, U L is
Fig. 10. Topology of the revised single-phase CBR. orthogonal to U S . In order to avoid input current distortion,
UAB has to be controlled in phase with U S . Therefore, UBC
the current ripple for calculating the minimum inductance. must contain reactive component to provide the required reac-
This method is also suitable for choosing the minimum boost tive power for the inductor and active component to support
inductance for the CBR under the improved control. Due to the the dc voltages. As a result, UBC lags I S by γ and Ucon lags
limited space, details of this minimum inductance calculating I S by θ . Define Uaci as the ac voltage of Modulei . Then the
procedure are not discussed in this paper. Instead, this paper following relationships exist:
⎧
focuses on how to ensure an acceptable power factor by ⎪ n
⎪
⎪ =
limiting the maximum value of the boost inductance. ⎪ U
⎨ AB Uaci
As stated above, the improved control strategy leads to i=1
(11)
a lagging power factor that is closely related to the boost ⎪
⎪ m
⎪ UBC =
⎪ Uaci .
inductance. Therefore, by properly limiting the maximum ⎩
i=n+1
boost inductance, the power factor can be controlled above the
minimum acceptable value. Define k as the minimum power UPi is defined as the active component of the ac voltage of
factor allowed. Substituting cos ϕ = k into (8) yields the Module i and can be expressed as
limitation of the maximum boost inductance 
UPi = Uaci , i = 1, 2, . . . , n
(12)
U S2 sin(2 cos−1 k) UPi = Uaci cos γ , i = n + 1, . . . , n + m.
L max =  . (9)
2ωUd2 ni=1 R1i Applying the geometrical relationship yields

n+m
IV. R EVISED T OPOLOGY OF THE S INGLE -P HASE CBR UPi = U S . (13)
i=1
A. Revised Topology
As analyzed before, the single-phase CBR is not able to Considering the output dc voltages are well balanced in the
achieve unity power factor rectification without a distorted steady state, the active power transferred through each module
input current. This is because the input current I S can only can be expressed as
be in phase with the ac voltage of the CBR Ucon . In other Ud2
words, the cascaded bridgeless modules are not able to provide UPi I S = , i = 1, 2, . . . , n + m. (14)
Ri
the reactive power consumed by the boost inductor L when
no reactive power is injected from the power grid. It should According to [9], for each cascaded module, the maximum
be noted that the voltage drop across the boost inductor U L ac voltage that can be obtained through modulation is
is typically very small compared to Ucon and U S . Therefore, 4
Uac max = √ Ud . (15)
one or a few more bridgeless module(s) can be replaced 2π
by conventional H-bridge module(s) to provide the needed
It is clear that the active component of the ac voltage of
reactive power for the boost inductor. In this way, the revised
ModuleiUPi must satisfy
CBR can be used in the applications where the unity power
factor is required. UPi ≤ Uac ≤ Uac max , i = 1, 2, . . . , n + m. (16)
The topology of this revised single-phase CBR is shown
in Fig. 10 where Module 1 to Module n are bridgeless modules
B. Determination Method of the Topology Configuration
and Module (n + 1) to Module (n + m) are H-bridge modules,
and n +m = N. u AB and u BC are the sum of the ac voltages of The values of n and m have to be carefully determined
the bridgeless modules and the H-bridge modules, respectively. such that the revised CBR is able to achieve: 1) unity power
Additionally, the following equation is satisfied: factor and sinusoidal input current; 2) output dc voltage
balancing; and 3) minimized value of m to reduce the fully
u con = u AB + u BC . (10) controlled switches [29]. For the purpose of simplification,
WANG et al.: TOPOLOGIES AND CONTROL STRATEGIES OF CBR 437

that when the loads are heavier, the reactive power consumed
by the boost inductor L is larger, requiring more H-bridge
modules to realize unity power factor operation.
For the unbalanced load condition, the main idea of deter-
mining the values of n and m is the same. However, the active
power transferred through Module i is inversely proportional
to its equivalent load resistance Ri . As a result, (17) has to be
replaced by
UPi = n i U S (24)
Fig. 12. AC side phasor diagram for determining the topology configuration where n i is defined as the load unbalance ratio and is
of the revised CBR. expressed as
1
Ri
the configuration determination method is derived under the ni = N 1 . (25)
balanced load condition. j =1 R j
Substituting R1 = R2 = · · · = Rn+m = R and (14) into (13) Then the values of n and m can be determined following
yields the relationship among the active ac voltage components the same procedures as in the balanced load case:
of the modules

√  2 2   N 1 2 m
2
U P = UPi =
US
=
US
, i = 1, 2, . . . , n + m. (17) 2π 
 ω L i=1 Ri N4 
n+m N m> + 2 nl . (26)
4 U S2 K
l=1
Fig. 12 gives the steady-state ac side phasor diagram for
determining the topology configuration. It can be seen that Similarly, the minimum integer value of m that satisfies (26)
the total ac voltage of the m H-bridge modules UBC must be is selected to be the number of the H-bridge modules and
able to compose a phasor triangle with its active component n = N − m is the number of the bridgeless modules.
and the inductor voltage U L . Hence, (18) should be met as Calculating n and m using (23) and (26) can be compli-
cated. However, the voltage drop across the boost inductor is
(mU P )2 + U L2 = UBC
2
. (18) typically very small. As a consequence, for most cases, one
Substituting (11) and (16) into (18) yields the constraint for H-bridge module should have enough capability to provide
the value of m the required reactive power. Therefore, for a revised CBR
composed of N modules, usually only one of them needs to
(mU P )2 + U L2 ≤ (mUac max )2 . (19) be an H-bridge module.
Substituting (17) into (19) gives

C. Control Strategy of the Revised Single-Phase CBR
U S2
Uac max − 2 m 2 − U L2 ≥ 0.
2
(20) A novel control strategy based on the single-phase dq trans-
N
formation [30]–[32] is proposed for the revised CBR. Fig. 13
Define the step-up ratio K as depicts the control block diagram. The error between the
dc voltage reference u ∗d and the mean value of the dc voltages
NUd
K = . (21) of all the cascaded modules is regulated by a PI controller
US to generate the active current referencei d∗. Meanwhile, the
Neglecting the power loss leads to the input–output power reactive current reference i q∗ is set to be zero in order to achieve
balance the unity power factor. Through dq decoupling control, the
Ud2 active and reactive references for the total ac voltage of the
US IS = N . (22) revised CBR, i.e., u ∗cond and u ∗conq , are obtained. According
R
to (10), the ac voltage references u ∗AB and u ∗BC should meet
Substituting (15), (21), and (22) into (20) and plugging in
 ∗
U L = ωL I S yield u cond = u ∗ABd + u ∗BCd
(27)
u ∗conq = u ∗ABq + u ∗BCq .
ωK 2 L
m>  .
8
K 2−1 R
π 2
Then the minimum integer value of m that satisfies (23) is
chosen to be the number of the H-bridge modules. Therefore,
n = N − m is the number of the bridgeless modules.
It should be noted that Uac max > U P = U S /N, therefore, the
larger m is, the easier it is for (20) to be satisfied. Besides,
it can be seen from (23) that m will increase if the loads
become heavier. This mathematical finding agrees with the fact
(23)
In order to avoid input current zero-crossing distortion, u AB
needs to be always in phase with u S . Therefore, as shown
in (28), the reactive voltage reference u ∗ABq is set to be zero.
As a consequence, u ∗BCq has to be u ∗conq . The output dc volt-
ages should be balanced. Otherwise, the unbalanced voltage
may result in capacitor overvoltage. Hence, the active power
should be equally distributed among all the cascaded mod-
ules. Since all the modules are cascaded, the active power
transferred through each module is proportional to the active
438 IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 5, NO. 1, MARCH 2017

Fig. 13. Control strategy based on the single-phase dq transformation.

Fig. 14. Diagram of output dc voltage balancing.

component of its ac voltage. Therefore, the active voltage

references u ∗ABd and u ∗BCd should be determined as

u ∗ABq = 0
(28)
u ∗BCq = u ∗conq
⎧ n
⎪ ∗
⎨ u ABd = u∗
n + m cond
(29)
⎪
⎩ u∗ m
BCd = u∗ . Fig. 15. Topology of the three-phase CBR.
n + m cond

By employing two single-phase inverse dq transformations,

the ac voltage references, u ∗AB and u ∗BC , are both obtained.
On this basis, the final ac voltage reference of each module u ∗aci
can be generated by
⎧
⎪
⎪ u∗
⎨ u ∗aci = AB + u Bi , i = 1, 2, . . . , n
n
⎪ u ∗
⎪
⎩ u ∗aci = BC + u Bi , i = (n + 1), (n + 2), . . . , (n + m)
Fig. 16. Equivalent ac side circuit of the three-phase CBR.
m

where u Bi is the dc voltage balancing signal. V. D ISCUSSION ON I NPUT C URRENT Z ERO -C ROSSING
Fig. 14 describes the dc voltage balancing control D ISTORTION OF THE T HREE -P HASE CBR
diagram [33], [34]. The error between the reference dc volt- As shown in Fig. 15, the proposed single-phase CBR can
age u ∗d and the dc voltage of each module u i is regulated by a be expanded to a three-phase structure. The equivalent ac side
PI controller. The output of the PI controller is then multiplied circuit is depicted in Fig. 16 and the mathematical model can
by “sin ωt” to produce the balancing signal u Bi . As indicated be expressed as
in (30), the final ac voltage reference u ∗aci is able to balance ⎧
⎪ di sa
the dc voltages due to the inclusion of u Bi . ⎪
⎪ L = u sa − u aca − u NO
⎪
⎪ dt
Through the proposed control strategy, the phasor rela- ⎪
⎨
tionship shown in Fig. 11 can be guaranteed, thus enabling di sb
L = u sb − u acb − u NO (30)
the revised single-phase CBR to realize unity power factor ⎪
⎪ dt
⎪
⎪
rectification without suffering the input current zero-crossing ⎪
⎪ di
⎩ L sc = u sc − u acc − u NO
distortion. dt
WANG et al.: TOPOLOGIES AND CONTROL STRATEGIES OF CBR
Fig. 17. AC side phasor diagram of the three-phase CBR under the unity
power factor operation.
Fig. 18. Phase a ac side waveforms of the three-phase CBR under the unity
power factor.
where u ack is the sum of ac voltages of the bridgeless modules
in Phase k, k = a, b, c; u NO is the neutral point voltage.
Define u conk as the total ac voltage of Phase k with
respect to the power source neutral point (Node O). Then the
relationship between u NO , u ack , and u conk is given as
u conk = u ack + u NO .
By regulating u conk at their references u conk ∗, the power
factor and the input currents can be controlled. Due to the
unidirectional conduction property of the diodes, i sk and u ack
are always in phase. However, as depicted in Fig. 17, Uconk
lags Isk by θ when the CBR is operating under the unity
power factor. As a result, during a short period after the current
zero-crossing, i sk and u conk need to have opposite polarities.
Equation (32) indicates that u conk is the sum of u ack and u NO .
Therefore, even though u ack has to be in the same direction
as i sk , u NO can be in the opposite direction so that u conk can
still follow its reference. In this way, the current zero-crossing
distortion can be mitigated.
Assuming that i sa is turning from positive to negative.
At this instant, the ac voltage reference u ∗cona is positive. Due to
the unidirectional conduction property, u aca can only be zero.
However, a positive u NO can be generated to synthesize the
desired u ∗cona . For the other two phases, u conb andu conc can
still follow their references. Consequently, as shown in Fig. 18,
the unity power factor can be achieved with attenuated input
current zero-crossing distortion.
VI. S IMULATION AND E XPERIMENTAL R ESULTS
To verify the proposed theories, simulations are carried out
in the MATLAB/Simulink environment. A single-phase CBR
model composed of two modules is built according to Table I.
439
TABLE I
S IMULATION PARAMETERS FOR THE S INGLE -P HASE CBR
Fig. 19. Input current and input voltage of the single-phase CBR under the
traditional control.
(31)
Fig. 20. Input current and input voltage of the single-phase CBR under the
improved control.
Fig. 19 shows the input voltage and input current of the
single-phase CBR under the traditional control, which requires
the unity power factor to be achieved. The input current is in
phase with the input voltage. However, severe current distor-
tion appears at the zero-crossings. To eliminate the undesirable
distortion, the improved control strategy is then employed.
As can be seen from Fig. 20, by making the input current
lag the input voltage by ϕ, the input current distortion are
avoided. Fig. 21 further indicates that under the improved
control, dc voltages of the two cascaded modules are well
balanced, which guarantees the safe and stable operation of
the rectifier system. If a unity power factor is strictly required,
the improved control strategy cannot be used. Under this
circumstance, the revised single-phase CBR topology is an
alternative.
To test the performance of the revised CBR, Module 1 of
the original CBR model is replaced by an H-bridge module
440 IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 5, NO. 1, MARCH 2017

Fig. 21. Output dc voltages of the single-phase CBR under the improved
control.

Fig. 22. Input current and input voltage of the revised single-phase CBR.

Fig. 24. Input voltage and the ac voltages of the revised single-phase CHB.

Fig. 23. Output dc voltages of the revised single-phase CBR.

and the proposed control strategy based on the single-phase

dq transformation is adopted. It is shown in Fig. 22 that the Fig. 25. Zoomed-in view of waveforms of input voltage and the ac voltages
unity power factor is achieved without causing input current after filtering.
distortion. Besides, Fig. 23 shows that the dc voltages of the
two cascaded modules are regulated equal to each other.
The waveforms of the input voltage u S as well as the ac
voltages u AB and u BC of the revised CBR are shown in Fig. 24.
u AB is of a three-level form due to the unidirectional conduc-
tion property of the bridgeless modules. Since bipolar PWM
is adopted for the H-bridge modules, u BC has a two-level
waveform. The high-level and low-level voltages of both the ac
waveforms are +300 and −300 V, respectively, demonstrating
that the output dc voltages are regulated at the reference
value. To get an insight of the phasor relationship, second- Fig. 26. Input currents of the three-phase CBR.
order low-pass filters are used to remove the high frequency
harmonics of the ac voltages. The waveforms after filtering are Fig. 29 gives the Phase a input current and the neutral-
shown in Fig. 25. As can be seen, u AB is in phase with u S , point voltage with respect to Node O. It can be seen that
however, they both lead u BC by an angle of γ . This observation u NO and i sa are opposite in polarities during a certain period
coincides with the theoretical analysis. after every current zero-crossing. This coincides with the
A three-phase CBR model is built using Table I to select theoretical analysis of why the current distortion is attenuated
the parameters for each phase. Fig. 26 shows the three-phase when the three-phase CBR is operating under the unity power
currents and Fig. 27 shows Phase a input waveforms. The factor.
unity power factor is achieved. As presented in Fig. 28, To further verify the performance of the proposed
a THD of 3.47% indicates an acceptable current quality. CBR, a scaled-down experiment prototype composed of
WANG et al.: TOPOLOGIES AND CONTROL STRATEGIES OF CBR
Fig. 27. Phase a input voltage and current.
Fig. 28. THD analysis of Phase a input current.
Fig. 29. Phase a input current and the neutral-point voltage.
Fig. 30. Scaled-down experiment prototype.
two bridgeless modules is built. The prototype is shown
in Fig. 30 and the parameters are provided in Table II.
A TMS320F28335 DSP serves as the core controller.
First, the traditional control strategy is applied to the
single-phase CBR to achieve a unity power factor. As can
be seen from Fig. 31, serious current zero-crossing distortion
appears. To achieve a more satisfactory input current quality,
the improved control strategy is employed. Fig. 32 gives the
441
TABLE II
PARAMETERS FOR THE S INGLE -P HASE CBR P ROTOTYPE
Fig. 31. Input current and input voltage of the single-phase CBR under the
traditional control.
waveforms of the input current and voltage. As is expected,
a small lagging angle ϕexists between the input current and
voltage. However, a desirable sinusoidal input current is real-
ized. To demonstrate the output dc voltage balancing capabil-
ity, the input voltage is suddenly changed from 100 to 120 V.
As indicated in Fig. 33, the input current magnitude decreases
as a response to the input voltage change, but the dc voltages
are maintained at the reference value.
Like what is done in the simulation, one of the two
bridgeless modules is replaced by an H-bridge module to
make up a revised single-phase CBR. Fig. 34 shows the input
voltage, input current, and the output dc voltages. A sinusoidal
input current is obtained and is in phase with the input
voltage, indicating a unity power factor. At the same time, the
dc voltages are well balanced. Fig. 35 gives the waveforms of
the input voltage u S as well as the ac voltages u AB and u BC
of the revised CBR. u AB has a three-level form due to the
unidirectional conduction property of the bridgeless modules.
However, u BC is a two-level waveform since bipolar PWM is
adopted for the H-bridge modules.
Figs. 36 and 37 give comparisons among the three models
in terms of their input current THD and power factor, respec-
tively. It can be concluded that with heavier loads, the current
442 IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 5, NO. 1, MARCH 2017
Fig. 32. Input current and input voltage of the single-phase CBR under the
improved control.
Fig. 33. Input current and output dc voltages of the single-phase CBR under
the improved control.
Fig. 34. Input current, input voltage, and output dc voltages of the revised
single-phase CBR.
THD of the traditionally controlled CBR increases greatly,
but the current THDs of the CBR under improved control
and the revised CBR do not change much and are always
kept at low values. The traditional control strategy also leads
to a major decrease in the power factor when the loads are
heavier. Meanwhile, the power factor of the CBR under the
improved control also decreases slightly but is still within an
acceptable range. However, the revised CBR can always real-
ize a unity power factor because of the H-bridge module. It is
worth pointing out that compared to the conventional CHR,
Fig. 35. Input current, input voltage, and ac voltages of the two modules in
the revised single-phase CBR.
Fig. 36. Comparison of the input current THDs.
Fig. 37. Comparison of the input power factors.
both the CBR and the revised CBR greatly reduce the
number of fully controlled switches, presenting significant
advantages.
A three-phase CBR prototype is developed using lower rated
devices. Two modules are cascaded in each phase and the load
of each module is 20 . The grid voltage and output dc voltage
of each module is 20 and 25 V, respectively. Fig. 38 gives
the waveforms of Phase a input voltage and current. It shows
that i sa is in phase with u sa . Compared with the single-phase
case, the input current zero-crossing distortion has been greatly
mitigated. Fig. 39 shows the three-phase input currents and the
neutral-point voltage with respect to Node O. It can be seen
that u NO and each phase current have the opposite polarities
during a certain period after every current zero-crossing.
WANG et al.: TOPOLOGIES AND CONTROL STRATEGIES OF CBR
Fig. 38. Phase a input voltage and input current of the three-phase CBR.
Fig. 39. Input currents and the neutral-point voltage of the three-phase CBR.
This observation confirms the aforementioned explanation of
why the current distortion is mitigated when the three-phase
CBR is operating under the unity power factor.
VII. C ONCLUSION
A CBR is presented to reduce the number of fully con-
trolled switches and simplify the system complexity. The
basic principles of the proposed topology are analyzed.
To achieve a satisfactory power factor and eliminate the input
current zero-crossing distortion, an improved control strategy
and a revised topology are presented. For the CBR under
the improved control, the method of selecting the maximum
boost inductance considering an acceptable power factor is
derived. For the revised single-phase CBR, the determination
method of the topology configuration is also given. In addition,
this paper explains the ability of the three-phase CBR to
attenuate the current distortion while realizing unity power
factor rectification. Finally, the simulation and experimental
results validated the proposed theories.
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Cong Wang was born in Beijing, China, in 1955.
He received the B.S. degree in electrical engineering
from the Taiyuan University of Technology, Taiyuan,
China, in 1982, and the M.S. and Ph.D. degrees in
electrical engineering from the China University of
Mining and Technology, Beijing, in 1984 and 2005,
respectively.
From 1990 to 1991, he was a Visiting Scholar
with the University of Bristol, Bristol, U.K. From
2002 to 2003, he was a Senior Visiting Scholar and
a Guest Professor with the University of Tennessee,
Knoxville, TN, USA. He is currently a Professor of Power Electronics with
the School of Mechanical Electronic and Information Engineering, China
University of Mining and Technology. His current research interests include
high power multilevel converters, high-frequency soft-switching converters,
and power electronics in smart grid.
Yuan Zhuang was born in Huainan, China, in 1990.
He received the B.S. degree in electrical engineering
from the Anhui University of Science and Tech-
nology, Huainan, in 2012. He is currently pursuing
the Ph.D. degree with the School of Mechanical
Electronic and Information Engineering, China Uni-
versity of Mining and Technology, Beijing, China.
From 2015 to 2016, he was a Visiting Ph.D.
student with the Center for Ultra-wide-area Resilient
Electric Energy Transmission Networks, University
of Tennessee, Knoxville, TN, USA. His current
research interests include multilevel converters, high-frequency soft-switching
converters, and HVDC transmission systems.
Jian Jiao was born in Chengde, China, in 1987.
He received the B.S. degree in electrical engineering
from Shijiazhuang Tiedao University, Shijiazhuang,
China, in 2012, and the M.S. degree in electrical
engineering from the China University of Mining
and Technology, Beijing, China, in 2015.
His current research interests include high power
multilevel rectifiers, high voltage converters, and
power electronics in smart grid.
Heng Zhang was born in Maanshan, China, in 1992.
He received the B.S. degree in electrical engineering
from the Anhui University of Science and Technol-
ogy, Huainan, China, in 2014. He is currently pursu-
ing the M.S. degree with the School of Mechanical
Electronic and Information Engineering, China Uni-
versity of Mining and Technology, Beijing, China.
His current research interests include multilevel
rectifiers, high voltage converters, and electric drive.
Chang Wang was born in Zhoukou, China, in 1985.
He received the B.S., M.S., and Ph.D. degrees in
electrical engineering from the China University of
Mining and Technology, Beijing, China, in 2009,
2012, and 2015, respectively.
He is currently a Research Engineer with Beijing
Huadian Tianren Electric Power Control Technology
Corporation, Beijing. His current research interests
include high power multilevel rectifiers, high voltage
converters, and smart grid.
Hong Cheng was born in Jinhua, China, in 1966.
She received the B.S. degree in electrical engi-
neering from Beihang University, Beijing, China,
in 1988, and the Ph.D. degree in electrical engi-
neering from the China University of Mining and
Technology, Beijing, in 1993.
She is currently a Professor of Power Electron-
ics with the School of Mechanical Electronic and
Information Engineering, China University of Min-
ing and Technology. Her current research interests
include high power multilevel converters, modeling
and control of switching converters, and fault diagnosis of power electronics
equipment.