Feedback Model for Asynchronous

Sequential Networks

Input Variables, X Output Variables, Z

n xi zi m
Combinational
Reduce States
y1 Logic
Circuit y1
State Assignment
Next State
Present State ys ys Variables, yi
s
Variables, yi
Flip-Flop or Latch Selection
1
 Asynchronous State Tables
States are either Stable or Unstable. Stable states
encircled with symbol.
Present Next state, output
state
x=0 x=1

Q0 Q0,0 Q1,0
Q1 Q2,0 Q1,0
Q2 Q2,0 Q3,1
Q3 Q0, 0 Q3,1

Oscillations occur if all states are unstable for an input value.

Total State is a pair (x, Qi)
 Constraints on Asynchronous
Networks

If the next input change occurs before the previous ones

effect are fed back to the input, the machine may not
function correctly. Thus, constraints are needed to insure
proper operation.
Fundamental Mode – Input changes only when the
machine is in a stable state.
Normal Fundamental Mode – A single input change
occurring when the machine is in a stable state produces
a single output change.
 Example 8.4
Find state table for network

Let Q0 be state when y1 = 0 and Q1 be state when y1 = 1.

Present Input x1,x2
state 00 01 11 10
z1z2

Q0 Q0,01 Q0,01 Q0,00 Q1,00

Q1 Q1,10 Q0,10 Q0,10 Q1,10
 Example 8.5
Analyze circuit with fundamental mode

State Code Present Input x1,x2

state
y1,y2 00 01 11 10
Q0 00 Q0 Q2 Q3 Q0 Q1
Q1 01 Q1 Q1 Q0 Q0 Q1
Q2 11 Q2 Q0 Q0 Q0 Q0
Q3 10 Q3 Q3 Q3 Q0 Q0
 Example 8.5
Analyze circuit without fundamental mode

State Code Present Input x1,x2

state
y1,y2 00 01 11 10
Q0 00 Q0 Q2 Q3 Q0 Q1
Q1 01 Q1 Q1 Q0 Q0 Q1
Q2 11 Q2 Q0 Q0 Q0 Q0
Q3 10 Q3 Q3 Q3 Q0 Q0
 Example 8.6
Design the network for the given state table using SR-latches
Use state assignment
Present Next state, output
state State Code
x=0 x=1
y1,y2
Q0 Q0,0 Q1,0
Q0 00
Q1 Q2,0 Q1,0
Q1 01
Q2 Q2,0 Q3,1
Q2 11
Q3 Q0, 0 Q3,1
Q3 10
Example 8.6 (Continued)
Use S when state variable must change from 0 to 1
Use R when state variable must change from 1 to 0
Use s when state variable remains 1
Use r when state variable remains 0
 Example 8.7 – D Flip-Flop
Design the circuit from the state table using SR-latches
Present Input x1,x2
state
00 01 11 10
Q0 Q0 Q1 Q0 Q0
Q1 Q0 Q1 Q2 Q2
Q2 Q3 Q2 Q2 Q2
Q3 Q3 Q2 Q0 Q0
 Example 8.8
Derive the state table from the circuit

1’s where Set and (present state is 1 and not R)

Example 8.8 (Continued)

y1,y2 Present Input x1,x2

state 00 01 11 10
00 Q0 Q0 Q1 Q0 Q0
01 Q1 Q0 Q1 Q1 Q2
11 Q2 Q0 Q2 Q3 Q2
10 Q3 Q0 Q0 Q3 Q3
 Race Conditions - Example 8.9
Race Condition – when two or more variable change at a time
Critical Race – final state dependent on order in which the state variables change
Present Input x1,x2
state State Code
00 01 11 10
y1,y2
Q0 Q1 Q0 Q0 Q3
Q0 00
Q1 Q1 Q1 Q1 Q3 Q1 01
Q2 Q2 Q1 Q2 Q3 Q2 11
Q3 Q1 Q1 Q0 Q3 Q3 10

Present y1,y2 Input x1,x2

state 00 01 11 10
Q0 00 01 00 00 10
Input x1,x2 10 00
Q1 01 01 01 01 10
10, 00, 01 ok
Q2 11 11 01 11 10
Q3 10 01 01 00 10
10, 11, 01 not ok.
 Avoiding Race
State Adjacency Diagram
Present Input x1,x2
state
00 01 11 10 Q0 Q1

Q0 Q1 Q0 Q0 Q3
Q1 Q1 Q1 Q1 Q3
Q2 Q2 Q1 Q2 Q3 Q2 Q3
Q3 Q1 Q1 Q0 Q3

Impossible to have hamming distance of 1

between all adjacent states. Must add states.
 Asynchronous Machine
Hazards
Steady-State Hazards – Occurs when a sequential network goes to
an erroneous state due to gate delay.
Static-1 Hazard

In (01, Q1) consider input change (00)  (01)

Present y1,y2 Input x1,x2

state
00 01 11 10

Q0 00 01 00 00 10
Q1 01 01 01 01 10
Q2 11 11 01 11 10
y1= x1x2 + x1 y1y2+ x2 y1y2
Q3 10 01 01 00 10
y2 = x1x2 + x2 y2+ x1y1
Steady-State Hazards
Elimination of Static-1 Hazard

y1= x1x2 + x1 y1y2+ x2 y1y2

y2 = x1x2 + x2 y2+ x1y1 + x1 y2

 Hazard Example
Feedback Sequential Implementation

Maps resulting from State Table 8.5, Example

8.7
 Essential Hazard
Essential Hazard – Erroneous sequential operation that cannot be
eliminated without controlling delays in the circuit. Not affected by
elimination of combinational logic hazards.
 Essential Hazard Example
Caused by multiple paths for x
Starting in stable state Q2
with input 0  1

Present Input x
state
0 1

Q0 = 00 Q0 Q3
Q1 = 01 Q0 Q1
Q2= 11 Q2 Q1 Slow
Q3 = 10 Q2 Q3