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CPU CORE
MAXIM
VCC_CORE ZR3 X'TAL
MAX8774 Page:28 14.31818MHz
AMD S1
+1.2V Turion 64 Rev.F Dual-Core/
DDR-II SODIMM1 DDR-II 533/667MHz CPU THERMAL
A +1.2V +1.8VSUS Page: 7 Sempron Rev.F Single-Core A

Dual-Core 35W / Single-Core 25W SENSOR Clock generator


+1.8VSUS/+1.8V Page:5
+1.8V (638 S1g1 socket)
+0.9V_VTER DDR-II SODIMM2 Page:3, 4, 5, 6
ICS951462
TI +0.9V_VTER Page: 7
Page:12
TPS51116/51117
Page:29 HT_LINK

+3VPCU

+3VPCU/+5VPCU +3V_S5
+3VSUS
TV-OUT NB
+3V_S5 S-Video RGB CRT
+3V Page: 21 Page: 21
+3V/+5V ATi RS485
+5VPCU
+3VSUS/+5VSUS +5VSUS PCIE 465-Pins FCBGA Package LVDS
TI mini CARD LVDS
+5V Page: 21
TPS51120 Page: 20 Page: 8, 9 ,10, 11
Page:30
B B

+1.5V
+1.5V/+2.5V Manufacturing Option
+2.5V
2X PCIE
GMT REALTEK 8100SBL/CL
SATA HDD
G966/913-C Page:31
Page: 22
10/100 LAN
SATA RTC TRANSFORMER
SB AD18
Page: 17
BATTERY CHARGER Page: 14 REQ0# / GNT0#
MAXIM PATA HDD ATA 66/100 INTE# Page: 17
ATi SB460
ISL6251 Page: 22
Page:27 BATTERY RJ45
549-Pins BGA Package Page: 17
IDE-ODD PCI BUS 33MHZ ENE CB714/1410
Page: 22 Cardbus controller
Page: 13, 14, 15, 16
Azalia USB 2.0 PCMCIA
AD17
SLOT
Power State Table REQ3# / GNT3#
Page: 19
C Power Control Power INTH#,INTG# C

Name Signal State


MIC-IN X'TAL LPC 33MHZ Page: 18
CARD
+VCC_CORE VRON S0 Page: 24 AUDIO CODEC 32.768KHz READER
REALTEK- ALC883 Page: 19
+2.5V MAINON S0 48-pins Package KBC BIOS MINI-PCI
LINE-IN Page: 23
MODEM SST39VF080
+3VPCU N/A ALWAYS FOXCONN MDC NS PC97541V Wireless LAN
+3VS5 S5_ON S0-S5 Page: 24 176-Pins Package Page: 25 AD20
+3VSUS SUSD S0-S3 Page: 23 REQ2# / GNT2#
Audio AMP Audio AMP Page: 25 Bluetooth
+3V MAIND S0 INTG#,
MAX4411 MAX9710 USB
+5VPCU N/A ALWAYS INTE#
interface Page: 20
+5VSUS SUSD S0-S3 Page: 23 Page: 24 Page:20
+5V MAIND S0 USB6
SYSTEM

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+1.2V MAINON S0 USB PORT*3
LINEOUT SPEAKER RJ11 Touchpad Keyboard FAN

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+0.9V_VTER MAINON S0 Page: 20
(External)

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D D
Page: 24 Page: 24 Page: 26 Page: 26 Page: 26
+1.8VS5 S5_ON S0-S5 USB0,1,4

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+1.8VSUS SUSON S0-S3

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+1.8V MAIND S0 USB CAMERA PROJECT : ZR3

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+1.5V MAINON S0 Page: 20 Quanta Computer Inc.

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USB2

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Size Document Number Rev
BLOCK DIAGRAM 1A

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Date: Wednesday, October 18, 2006 Sheet 1 of 31
1 2 3 4 5 6 7 8
5 4 3 2 1

POWER VOLTAGE ACTIVE SCOPE PAGE


TABLE OF CONTENTS POWER UP SEQUENCE
+12V +12V S0
+5VPCU
Page 01 : BLOCK DIAGRAM +5V +5V S0
Page 02 : TABLE OF CONTENTS +3V +3.3V S0 RSMRST#
Page 03 : ATHLON64 HT I/F +5VPCU +5V ALWAYS

SYSTEM
SUSB#, SUSC#
D Page 04 : ATHLON64 DDRII MEMORY I/F +3VPCU +3.3V ALWAYS
D

Page 05 : ATHLON64 CTRL & DEBUG +5VSUS +5V S0-S3 +12V,5V,3.3V


Page 06 : ATHLON64 PWR & GND +3VSUS +3.3V S0-S3
HWPG_1.2V
Page 07 : DDRII SODIMMX2 +3V_S5 +3.3V S0
Page 08 : RS485-HT LINK0 I/F HWPG_1.8V
Page 09 : RS485-PCIE LINK I/F VCCCORE VID[0..5] S0
VDDA_RUN +2.5V S0 CPU_COREPG
Page 10 : RS485-SYSTEM I/F & DVO
+1.2V S0

CPU
VLDT_RUN
Page 11 : RS485-POWER NB_PWRGD
Page 12 : External CLOCK GENERATOR +0.9V_VTER +0.9V S0
+1.8V +1.8V S0 EC_PWRGD
Page 13 : SB460M PCIE/PCI/CPU/LPC I/F
Page 14 : SB460M ACPI/GPIO/USB/AC97 +1.8VSUS +1.8V S0-S3
CPU_PWRGD
Page 15 : SB460M HDD/POWER/DECOUPLING +1.8V +1.8V S0

DDR2
PCI_RST#
Page 16 : SB460M STRAPS +1.8VSUS +1.8V S0-S3
Page 17 : LAN RTL8110SBL/CL +0.9V_VTER +0.9V S0 CPU_RST#
Page 18 : ENE CB714/1410
C Page 19 : CARD READ & CARDBUS SLOT +1.8V +1.8V S0 T1 T2 T3 C

Page 20 : MINI PCI & PCI-E,USB PORT,BLUETOOTH +1.8VSUS +1.8V S0-S3

Page 21 : CRT & LVDS & S-Video +3V +3.3V S0 T1>= 70 ms 1ms < T2 < 10ms
1ms < T3 < 5ms

Page 22 : HDD & CDROM & HOLES VDDC +1.2V S0

Page 23 : ALC883 & MDC & HP AMP VDD_HT +1.2V S0

RC485 NB
Page 24 : SPEAKER AMP / JACK VDDA12 +1.2V S0

Page 25 : 97551 & FLASH VDD18 +1.8V S0


Page 26 : T/P,FAN,SWITCH,LED,K/B VDDA18 +1.8V S0

Page 27 : BATTERY CHARGER VDD_DVO +1.8V S0

Page 28 : VCORE MAX8774 VDDR3 +3.3V S0

Page 29 : TPS51116/51117 1.8V/1.2V AVDD_NB +3.3V S0

Page 30 : TPS51120 3/5V AVDDQ +1.8V S0

Page 31 : +1.5V / 2.5V PLLVDD +1.8V S0


LPVDD +1.8V S0
LPVDD18A +1.8V S0

+3.3V S0
B B
+3V
+1.8V +1.8V S0
+3V_S5 +3.3V S0
+1.8V_S5 +1.8V S0
VDD +1.8V S0
AVDD_CK +1.8V S0
AVDD_SATA +1.8V S0
+1.8V S0
SB460 SB

XTLVDD_ATA
PLLVDD_ATA +1.8V S0
PCIE_PVDD +1.8V S0
PCIE_VDDR +1.8V S0

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CPU-PWR +1.2V S0
VDDQ +3.3V S0

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V5_VREF +5V S0

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+1.8V S0

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+1.8V_SUB_PHY
+3.3V S0-S3
A A
+3VSUS

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+SB_S5_3V +3.3V S0

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+SB_S5_1.8V +1.8V S0

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PROJECT : ZR3

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Quanta Computer Inc.

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Size Document Number Rev
TABLE OF CONTENTS 1A

Date: Wednesday, October 18, 2006 Sheet 2 of 31


5 4 3 2 1
5 4 3 2 1

D PROCESSOR HYPERTRANSPORT INTERFACE D

VLDT_Ax AND VLDT_Bx ARE CONNECTED TO THE LDT_RUN POWER


SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE

VLDT_RUN U16A

D4 VLDT_A3 VLDT_B3 AE5


D3 AE4 C21 4.7U/6.3V_6
VLDT_A2 VLDT_B2
D2 VLDT_A1 VLDT_B1 AE3
D1 VLDT_A0 VLDT_B0 AE2

(8) HT_CADIN15_P N5 L0_CADIN_H15 L0_CADOUT_H15 T4 HT_CADOUT15_P (8)


P5 L0_CADIN_L15 L0_CADOUT_L15 T3 HT_CADOUT15_N (8)
(8) HT_CADIN15_N
(8) HT_CADIN14_P M3 L0_CADIN_H14 L0_CADOUT_H14 V5 HT_CADOUT14_P (8)
M4 U5 +1.2V VLDT_RUN
(8) HT_CADIN14_N L0_CADIN_L14 L0_CADOUT_L14 HT_CADOUT14_N (8)
L5 V4 HT_CADOUT13_P (8) L45
(8) HT_CADIN13_P L0_CADIN_H13 L0_CADOUT_H13
(8) HT_CADIN13_N M5 L0_CADIN_L13 L0_CADOUT_L13 V3 HT_CADOUT13_N (8)
K3 Y5 FBJ3216HS800
C (8) HT_CADIN12_P L0_CADIN_H12 L0_CADOUT_H12 HT_CADOUT12_P (8) C
(8) HT_CADIN12_N K4 L0_CADIN_L12 L0_CADOUT_L12 W5 HT_CADOUT12_N (8)
H3 AB5 L47 8/17 Change 180pF to placed on the VLDT power fill.
(8) HT_CADIN11_P L0_CADIN_H11 L0_CADOUT_H11 HT_CADOUT11_P (8)
(8) HT_CADIN11_N H4 L0_CADIN_L11 L0_CADOUT_L11 AA5 HT_CADOUT11_N (8)
G5 AB4 FBJ3216HS800
(8) HT_CADIN10_P
H5
L0_CADIN_H10 L0_CADOUT_H10
AB3
HT_CADOUT10_P (8) 80 ohm(4A)
(8) HT_CADIN10_N L0_CADIN_L10 L0_CADOUT_L10 HT_CADOUT10_N (8)
(8) HT_CADIN9_P F3 L0_CADIN_H9 L0_CADOUT_H9 AD5 HT_CADOUT9_P (8)
F4 L0_CADIN_L9 L0_CADOUT_L9 AC5 HT_CADOUT9_N (8)

1
(8) HT_CADIN9_N
(8) HT_CADIN8_P E5 L0_CADIN_H8 L0_CADOUT_H8 AD4 HT_CADOUT8_P (8)
F5 AD3 C123 C116 C129 C128 C135 C134
(8) HT_CADIN8_N L0_CADIN_L8 L0_CADOUT_L8 HT_CADOUT8_N (8)
N3 T1 4.7U/6.3V_6 4.7U/6.3V_6 .22U/6V_4 .22U/6V_4 180P_4 180P_4

2
(8) HT_CADIN7_P L0_CADIN_H7 L0_CADOUT_H7 HT_CADOUT7_P (8)
(8) HT_CADIN7_N N2 L0_CADIN_L7 L0_CADOUT_L7 R1 HT_CADOUT7_N (8)
L1 L0_CADIN_H6 L0_CADOUT_H6 U2 HT_CADOUT6_P (8)
(8) HT_CADIN6_P
(8) HT_CADIN6_N M1 L0_CADIN_L6 L0_CADOUT_L6 U3 HT_CADOUT6_N (8)
(8) HT_CADIN5_P L3 L0_CADIN_H5 L0_CADOUT_H5 V1 HT_CADOUT5_P (8)
L2 L0_CADIN_L5 L0_CADOUT_L5 U1 HT_CADOUT5_N (8)
(8) HT_CADIN5_N
J1 W2
(8) HT_CADIN4_P
K1
L0_CADIN_H4 L0_CADOUT_H4
W3
HT_CADOUT4_P (8) LAYOUT: Place bypass cap on topside of board
(8) HT_CADIN4_N L0_CADIN_L4 L0_CADOUT_L4 HT_CADOUT4_N (8)
(8) HT_CADIN3_P G1 L0_CADIN_H3 L0_CADOUT_H3 AA2 HT_CADOUT3_P (8) NEAR HT POWER PINS THAT ARE NOT CONNECTED DIRECTLY
(8) HT_CADIN3_N H1 L0_CADIN_L3 L0_CADOUT_L3 AA3 HT_CADOUT3_N (8) TO DOWNSTREAM HT DEVICE, BUT CONNECTED INTERNALLY
(8) HT_CADIN2_P
G3 L0_CADIN_H2 L0_CADOUT_H2 AB1 HT_CADOUT2_P (8) TO OTHER HT POWER PINS
(8) HT_CADIN2_N G2 L0_CADIN_L2 L0_CADOUT_L2 AA1 HT_CADOUT2_N (8) PLACE CLOSE TO VLDT0 POWER PINS
E1 L0_CADIN_H1 L0_CADOUT_H1 AC2 HT_CADOUT1_P (8)
(8) HT_CADIN1_P
(8) HT_CADIN1_N F1 L0_CADIN_L1 L0_CADOUT_L1 AC3 HT_CADOUT1_N (8)
B
(8) HT_CADIN0_P E3 L0_CADIN_H0 L0_CADOUT_H0 AD1 HT_CADOUT0_P (8) B
E2 L0_CADIN_L0 L0_CADOUT_L0 AC1 HT_CADOUT0_N (8)
(8) HT_CADIN0_N
J5 L0_CLKIN_H1 L0_CLKOUT_H1 Y4 HT_CLKOUT1_P (8)
(8) HT_CLKIN1_P
(8) HT_CLKIN1_N K5 L0_CLKIN_L1 L0_CLKOUT_L1 Y3 HT_CLKOUT1_N (8)
(8) HT_CLKIN0_P J3 L0_CLKIN_H0 L0_CLKOUT_H0 Y1 HT_CLKOUT0_P (8)
VLDT_RUN J2 W1
(8) HT_CLKIN0_N L0_CLKIN_L0 L0_CLKOUT_L0 HT_CLKOUT0_N (8)

R22 49.9/F_4 HT_CTLIN1_P P3 T5 HT_CPU_CTLOUT1_P


L0_CTLIN_H1 L0_CTLOUT_H1 T7
HT_CTLIN1_N P4 R5 HT_CPU_CTLOUT1_N
49.9/F_4 L0_CTLIN_L1 L0_CTLOUT_L1 T11
R23
(8) HT_CTLIN0_P N1 L0_CTLIN_H0 L0_CTLOUT_H0 R2 HT_CTLOUT0_P (8)
P1 L0_CTLIN_L0 L0_CTLOUT_L0 R3 HT_CTLOUT0_N (8)
(8) HT_CTLIN0_N
Athlon 64 S1
Processor Socket

A A

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PROJECT : ZR3

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Quanta Computer Inc.

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Size Document Number Rev

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ATHLON64 HT I/F 1A

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Date: Wednesday, October 18, 2006 Sheet 3 of 31
5 4 3 2 1

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A B C D E

VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWER


+1.8VSUS
Processor DDR2 Memory Interface
SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE
R268 M_B_DQ[0..63] U16C M_A_DQ[0..63]
(7) M_B_DQ[0..63] M_A_DQ[0..63] (7)
M_B_DQ63 AD11 AA12 M_A_DQ63
1K/F_4 M_B_DQ62 MB_DATA63 MA_DATA63 M_A_DQ62
AF11 MB_DATA62 MA_DATA62 AB12
M_B_DQ61 AF14 AA14 M_A_DQ61
M_B_DQ60 MB_DATA61 MA_DATA61 M_A_DQ60
AE14 MB_DATA60 MA_DATA60 AB14
CPU_M_VREF M_B_DQ59 Y11 W11 M_A_DQ59
M_B_DQ58 MB_DATA59 MA_DATA59 M_A_DQ58
4 AB11 MB_DATA58 MA_DATA58 Y12 4
M_B_DQ57 AC12 AD13 M_A_DQ57
M_B_DQ56 MB_DATA57 MA_DATA57 M_A_DQ56
AF13 MB_DATA56 MA_DATA56 AB13
C448 C447 R269 M_B_DQ55 AF15 AD15 M_A_DQ55
.1U_4 1000p/50V_4 M_B_DQ54 MB_DATA55 MA_DATA55 M_A_DQ54
1K/F_4 AF16 MB_DATA54 MA_DATA54 AB15
M_B_DQ53 AC18 AB17 M_A_DQ53
M_B_DQ52 MB_DATA53 MA_DATA53 M_A_DQ52
AF19 MB_DATA52 MA_DATA52 Y17
M_B_DQ51 AD14 Y14 M_A_DQ51
+1.8VSUS M_B_DQ50 MB_DATA51 MA_DATA51 M_A_DQ50
AC14 MB_DATA50 MA_DATA50 W14
+0.9V_VTER M_B_DQ49 AE18 W16 M_A_DQ49
M_B_DQ48 MB_DATA49 MA_DATA49 M_A_DQ48
AD18 AD17
1

U16B M_B_DQ47 MB_DATA48 MA_DATA48 M_A_DQ47


AD20 MB_DATA47 MA_DATA47 Y18
R274 M_B_DQ46 AC20 AD19 M_A_DQ46
M_B_DQ45 MB_DATA46 MA_DATA46 M_A_DQ45
W17 MEMVREF VTT1 D10 AF23 MB_DATA45 MA_DATA45 AD21
39.2F_4 C10 M_B_DQ44 AF24 AB21 M_A_DQ44
VTT_SENSE VTT2 M_B_DQ43 MB_DATA44 MA_DATA44 M_A_DQ43
T3 Y10 B10 AF20 AB18
2

VTT_SENSE VTT3 M_B_DQ42 MB_DATA43 MA_DATA43 M_A_DQ42


VTT4 AD10 AE20 MB_DATA42 MA_DATA42 AA18
W10 M_B_DQ41 AD22 AA20 M_A_DQ41
M_ZN VTT5 M_B_DQ40 MB_DATA41 MA_DATA41 M_A_DQ40
AE10 MEMZN VTT6 AC10 AC22 MB_DATA40 MA_DATA40 Y20
M_ZP AF10 AB10 M_B_DQ39 AE25 AA22 M_A_DQ39
MEMZP VTT7 M_B_DQ38 MB_DATA39 MA_DATA39 M_A_DQ38
VTT8 AA10 AD26 MB_DATA38 MA_DATA38 Y22
A10 M_B_DQ37 AA25 W21 M_A_DQ37
VTT9 MB_DATA37 MA_DATA37
1

M_B_DQ36 AA26 W22 M_A_DQ36


R273 M_B_DQ35 MB_DATA36 MA_DATA36 M_A_DQ35
(7) M_A_CS#3 V19 MA0_CS_L3 MA0_CLK_H2 Y16 M_CLKOUT1 (7) AE24 MB_DATA35 MA_DATA35 AA21
J22 AA16 M_B_DQ34 AD24 AB22 M_A_DQ34
(7) M_A_CS#2 MA0_CS_L2 MA0_CLK_L2 M_CLKOUT1# (7) MB_DATA34 MA_DATA34
39.2F_4 V22 E16 M_B_DQ33 AA23 AB24 M_A_DQ33
(7) M_A_CS#1 MA0_CS_L1 MA0_CLK_H1 M_CLKOUT0 (7) MB_DATA33 MA_DATA33
T19 F16 M_B_DQ32 AA24 Y24 M_A_DQ32
2

(7) M_A_CS#0 MA0_CS_L0 MA0_CLK_L1 M_CLKOUT0# (7) MB_DATA32 MA_DATA32


M_B_DQ31 G24 H22 M_A_DQ31
M_B_DQ30 MB_DATA31 MA_DATA31 M_A_DQ30
(7) M_B_CS#3 Y26 MB0_CS_L3 MB0_CLK_H2 AF18 M_CLKOUT4 (7) G23 MB_DATA30 MA_DATA30 H20
J24 AF17 M_B_DQ29 D26 E22 M_A_DQ29
(7) M_B_CS#2 MB0_CS_L2 MB0_CLK_L2 M_CLKOUT4# (7) MB_DATA29 MA_DATA29
W24 A17 M_B_DQ28 C26 E21 M_A_DQ28

To SODIMM socket A (near)


(7) M_B_CS#1 MB0_CS_L1 MB0_CLK_H1 M_CLKOUT3 (7) MB_DATA28 MA_DATA28
U23 A18 M_B_DQ27 G26 J19 M_A_DQ27

To SODIMM socket B (Far)


(7) M_B_CS#0 MB0_CS_L0 MB0_CLK_L1 M_CLKOUT3# (7) M_B_DQ26 MB_DATA27 MA_DATA27 M_A_DQ26
G25 MB_DATA26 MA_DATA26 H24
H26 W23 M_B_DQ25 E24 F22 M_A_DQ25
(7) M_CKE3 MB_CKE1 MB0_ODT1 M_ODT3 (7) M_B_DQ24 MB_DATA25 MA_DATA25 M_A_DQ24
(7) M_CKE2 J23 MB_CKE0 MB0_ODT0 W26 M_ODT2 (7) E23 MB_DATA24 MA_DATA24 F20
3 PLACE THEM CLOSE TO J20 V20 M_B_DQ23 C24 C23 M_A_DQ23 3
(7) M_CKE1 MA_CKE1 MA0_ODT1 M_ODT1 (7) MB_DATA23 MA_DATA23
J21 U19 M_B_DQ22 B24 B22 M_A_DQ22
CPU WITHIN 1" (7) M_CKE0 MA_CKE0 MA0_ODT0 M_ODT0 (7)
M_B_DQ21 MB_DATA22 MA_DATA22 M_A_DQ21
(7) M_A_A[0..15] M_B_A[0..15] (7) C20 MB_DATA21 MA_DATA21 F18
M_A_A15 K19 J25 M_B_A15 M_B_DQ20 B20 E18 M_A_DQ20
M_A_A14 MA_ADD15 MB_ADD15 M_B_A14 M_B_DQ19 MB_DATA20 MA_DATA20 M_A_DQ19
K20 MA_ADD14 MB_ADD14 J26 C25 MB_DATA19 MA_DATA19 E20
M_A_A13 V24 W25 M_B_A13 M_B_DQ18 D24 D22 M_A_DQ18
M_A_A12 MA_ADD13 MB_ADD13 M_B_A12 M_B_DQ17 MB_DATA18 MA_DATA18 M_A_DQ17
K24 MA_ADD12 MB_ADD12 L23 A21 MB_DATA17 MA_DATA17 C19
M_A_A11 L20 L25 M_B_A11 M_B_DQ16 D20 G18 M_A_DQ16
M_A_A10 MA_ADD11 MB_ADD11 M_B_A10 M_B_DQ15 MB_DATA16 MA_DATA16 M_A_DQ15
R19 MA_ADD10 MB_ADD10 U25 D18 MB_DATA15 MA_DATA15 G17
M_A_A9 L19 L24 M_B_A9 M_B_DQ14 C18 C17 M_A_DQ14
M_A_A8 MA_ADD9 MB_ADD9 M_B_A8 M_B_DQ13 MB_DATA14 MA_DATA14 M_A_DQ13
L22 MA_ADD8 MB_ADD8 M26 D14 MB_DATA13 MA_DATA13 F14
M_A_A7 L21 L26 M_B_A7 M_B_DQ12 C14 E14 M_A_DQ12
M_A_A6 MA_ADD7 MB_ADD7 M_B_A6 M_B_DQ11 MB_DATA12 MA_DATA12 M_A_DQ11
M19 MA_ADD6 MB_ADD6 N23 A20 MB_DATA11 MA_DATA11 H17
M_A_A5 M20 N24 M_B_A5 M_B_DQ10 A19 E17 M_A_DQ10
M_A_A4 MA_ADD5 MB_ADD5 M_B_A4 M_B_DQ9 MB_DATA10 MA_DATA10 M_A_DQ9
M24 MA_ADD4 MB_ADD4 N25 A16 MB_DATA9 MA_DATA9 E15
M_A_A3 M22 N26 M_B_A3 M_B_DQ8 A15 H15 M_A_DQ8
M_A_A2 MA_ADD3 MB_ADD3 M_B_A2 M_B_DQ7 MB_DATA8 MA_DATA8 M_A_DQ7
N22 MA_ADD2 MB_ADD2 P24 A13 MB_DATA7 MA_DATA7 E13
M_A_A1 N21 P26 M_B_A1 M_B_DQ6 D12 C13 M_A_DQ6
M_A_A0 MA_ADD1 MB_ADD1 M_B_A0 M_B_DQ5 MB_DATA6 MA_DATA6 M_A_DQ5
R21 MA_ADD0 MB_ADD0 T24 E11 MB_DATA5 MA_DATA5 H12
M_B_DQ4 G11 H11 M_A_DQ4
M_B_DQ3 MB_DATA4 MA_DATA4 M_A_DQ3
(7) M_A_BS#2 K22 MA_BANK2 MB_BANK2 K26 M_B_BS#2 (7) B14 MB_DATA3 MA_DATA3 G14
R20 T26 M_B_BS#1 (7) M_B_DQ2 A14 H14 M_A_DQ2
(7) M_A_BS#1 MA_BANK1 MB_BANK1 MB_DATA2 MA_DATA2
T22 U26 M_B_BS#0 (7) M_B_DQ1 A11 F12 M_A_DQ1
(7) M_A_BS#0 MA_BANK0 MB_BANK0 MB_DATA1 MA_DATA1
M_B_DQ0 C11 G12 M_A_DQ0
M_B_DM[0..7] MB_DATA0 MA_DATA0 M_A_DM[0..7]
(7) M_A_RAS# T20 MA_RAS_L MB_RAS_L U24 M_B_RAS# (7) (7) M_B_DM[0..7] M_A_DM[0..7] (7)
U20 V26 M_B_DM7 AD12 Y13 M_A_DM7
(7) M_A_CAS# MA_CAS_L MB_CAS_L M_B_CAS# (7) MB_DM7 MA_DM7
U21 U22 M_B_DM6 AC16 AB16 M_A_DM6
(7) M_A_WE# MA_WE_L MB_WE_L M_B_WE# (7) MB_DM6 MA_DM6
M_B_DM5 AE22 Y19 M_A_DM5
M_B_DM4 MB_DM5 MA_DM5 M_A_DM4
AB26 MB_DM4 MA_DM4 AC24
DDR II: CMD/CTRL/CLK M_B_DM3 E25 F24 M_A_DM3
M_B_DM2 MB_DM3 MA_DM3 M_A_DM2
A22 E19
M_B_DM1 MB_DM2 MA_DM2 M_A_DM1
Athlon 64 S1 B16 MB_DM1 MA_DM1 C15
M_B_DM0 A12 E12 M_A_DM0
Processor Socket MB_DM0 MA_DM0
M_B_DQS7 AF12 W12 M_A_DQS7
M_B_DQS#7 MB_DQS_H7 MA_DQS_H7 M_A_DQS#7
2 AE12 W13 2
M_B_DQS6 MB_DQS_L7 MA_DQS_L7 M_A_DQS6
AE16 Y15
M_B_DQS#6 MB_DQS_H6 MA_DQS_H6 M_A_DQS#6
AD16 W15
M_B_DQS5 MB_DQS_L6 MA_DQS_L6 M_A_DQS5
AF21 AB19
M_B_DQS#5 MB_DQS_H5 MA_DQS_H5 M_A_DQS#5
AF22 MB_DQS_L5 MA_DQS_L5 AB20
M_B_DQS4 AC25 AD23 M_A_DQS4
M_B_DQS#4 MB_DQS_H4 MA_DQS_H4 M_A_DQS#4
AC26 AC23
M_B_DQS3 MB_DQS_L4 MA_DQS_L4 M_A_DQS3
F26 G22
M_B_DQS#3 MB_DQS_H3 MA_DQS_H3 M_A_DQS#3
E26 G21
M_B_DQS2 MB_DQS_L3 MA_DQS_L3 M_A_DQS2
A24 C22
M_B_DQS#2 MB_DQS_H2 MA_DQS_H2 M_A_DQS#2
A23 MB_DQS_L2 MA_DQS_L2 C21
M_B_DQS1 D16 G16 M_A_DQS1
M_B_DQS#1 MB_DQS_H1 MA_DQS_H1 M_A_DQS#1
C16 G15
+0.9V_VTER M_B_DQS0 MB_DQS_L1 MA_DQS_L1 M_A_DQS0
C12 MB_DQS_H0 MA_DQS_H0 G13
M_B_DQS#0 B12 H13 M_A_DQS#0
MB_DQS_L0 MA_DQS_L0

om
C5 C151 C7 C6 C136 C18 C16 C143 DDR: DATA
4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 .22U/6V_4 .22U/6V_4 .22U/6V_4 .22U/6V_4 Athlon 64 S1
(7) M_B_DQS[0..7] M_A_DQS[0..7] (7)

l.c
M_B_DQS0 Processor Socket M_A_DQS0
M_B_DQS1 M_A_DQS1

ai
M_B_DQS2 M_A_DQS2
M_B_DQS3 M_A_DQS3

tm
M_B_DQS4 M_A_DQS4
M_B_DQS5 M_A_DQS5

ho
M_B_DQS6 M_A_DQS6
M_B_DQS7 M_A_DQS7
+0.9V_VTER

f@
(7) M_B_DQS#[0..7] M_A_DQS#[0..7] (7)
M_B_DQS#0 M_A_DQS#0

in
M_B_DQS#1 M_A_DQS#1
C13 C150 C145 C142 C9 C146 C12 C42 M_B_DQS#2 M_A_DQS#2

xa
M_B_DQS#3 M_A_DQS#3
1000p/50V_4 1000p/50V_4 1000p/50V_4 1000p/50V_4 180P_4 180P_4 180P_4 180P_4 M_B_DQS#4 M_A_DQS#4

he
1 M_B_DQS#5 M_A_DQS#5 1
M_B_DQS#6 M_A_DQS#6
M_B_DQS#7 M_A_DQS#7

PROJECT : ZR3
Quanta Computer Inc.
Size Document Number Rev
ATHLON64 DDRII MEMORY I/F 1A

Date: Wednesday, October 18, 2006 Sheet 4 of 31


A B C D E
5 4 3 2 1

LAYOUT: ROUTE VDDA TRACE APPROX.


50 mils WIDE (USE 2x25 mil TRACES TO
EXIT BALL FIELD) AND 500 mils LONG.
ATHLON Control and Debug
CPU_VDDA_RUN CPU_VDDA_RUN

CPU_VDDA_RUN
U16D
H_THERMTRIP#
+1.8VSUS

F8 VDDA2 THERMTRIP_L AF6


CPU_VDDA_RUN +2.5V If AMD SI is not used, the SID pin can be left unconnected and SIC F9 AC7 H_PROCHOT#
L49 VDDA1 PROCHOT_L R41
should have a 300- (∮5%) pulldown to VSS.
CPU_HT_RESET# B7
BLM18PG330SN1D R278 *300_4 CPU_ALL_PWROK RESET_L 300_4
+1.8V A7 PWROK
R267 *300_4 CPU_LDTSTOP# F10
D C452 C93 C92 LDTSTOP_L D
VID5 A5 VID5 (28)
C458 R266 300_4 CPU_SIC_R AF4 C6
SIC VID4 VID4 (28)
4.7U/6.3V_6 .22U/6V_4 3900p/25V_4 100U/6.3V_3528 CPU_SID_R AF5 A6
SID VID3 VID3 (28)
Place them to CPU within 1" VID2 A4 VID2 (28)
R21 44.2F_4 CPU_HTREF1 P6 C5
VLDT_RUN HT_REF1 VID1 VID1 (28)
CPU_HTREF0 R6 B5
HT_REF0 VID0 VID0 (28)
R17 44.2F_4
AC6 CPU_PRESENT#
CPU_PRESENT_L
(28) COREFB+V F6 VDD_FB_H
To Power E6 A3 PSI_L
+1.8V +3V (28) COREFB- VDD_FB_L PSI_L
T9 CPU_VDDIO_SUS_FB_H W9
+1.8VSUS CPU_VDDIO_SUS_FB_L VDDIO_FB_H PSI_L is a Power Status Indicator signal. This signal is asserted
T4 Y9 VDDIO_FB_L
when the processor is in a low powerstate. PSI_L should be
R287 R288 C455 3900p/25V_4 CPU_CLKIN_SC_P A9 connected to the power supply controller, if the controller supports
C454 .1U_4 (12) CPUCLK CPU_CLKIN_SC_N CLKIN_H
A8 CLKIN_L ¨skipmode, or diode emulation mode〃. PSI_L is asserted by the
300_4 4.7K/F_4 R282 processor during the C3 and S1 states.
5

169/F_6
(13,14) CPU_PWRGD 1
CPU_ALL_PWROK (12) CPUCLK# C456 3900p/25V_4 CPU_DBRDY
4 T17 G10 DBRDY
2
R262 220_4 CPU_TMS AA9 E10 CPU_DBREQ# R40 220_4 +1.8VSUS
U17 R261 220_4 CPU_TCK TMS DBREQ_L
+1.8VSUS AC9
3

NC7SZ08P5X_NL R260 220_4 CPU_TRST# TCK


AD9 TRST_L
R275 220_4 CPU_TDI AF9 AE9 CPU_TDO
TDI TDO T2
+1.8V

+1.8VSUS C9 CPU_TEST29_H_FBCLKOUT_P R33 80.6F_4


CPU_TEST25_H_BYPASSCLK_H TEST29_H CPU_TEST29_L_FBCLKOUT_N
E9 TEST25_H TEST29_L C8
R46 CPU_TEST25_L_BYPASSCLK_L E8 ROUTE AS 80 Ohm DIFFERENTIAL PAIR
C153 .1U_4 CPU_TEST19_PLLTEST0 TEST25_L
G9 TEST19 PLACE IT CLOSE TO CPU WITHIN 1"
300_4 CPU_TEST18_PLLTEST1 H10
C TEST18 C
5

AA7 TEST13
1 C2 AE7 CPU_TEST24_SCANCLK1
(10,13,14) LDT_STOP# TEST9 TEST24
4 CPU_LDTSTOP# T23 CPU_TEST17_BP3 D7 AD7 CPU_TEST23_TSTUPD
TEST17 TEST23 T78
2 T21 CPU_TEST16_BP2 E7 AE8 CPU_TEST22_SCANSHIFTEN
CPU_TEST15_BP1 TEST16 TEST22 CPU_TEST21_SCANEN
F7 TEST15 TEST21 AB8
U2 CPU_TEST14_BP0 C7 AF7 CPU_TEST20_SCANCLK2
3

NC7SZ08P5X_NL CPU_TEST12_SCANSHIFTENB TEST14 TEST20


AC8 TEST12
TEST28_H J7
C3 TEST7 TEST28_L H8
+1.8V AA6 AF8 CPU_TEST27_SINGLECHAIN
CPU_TEST5_THERMDC TEST6 TEST27 CPU_TEST26_BURNIN#
W7 TEST5 TEST26 AE6
+1.8VSUS +1.8VSUS +3V CPU_TEST4_THERMDA W8 K8
TEST4 TEST10
Y6 TEST3 TEST8 C4
R286 AB6
C453 .1U_4 TEST2
300_4 R280 R281
5

1 10K_4 10K_4
(13) LDT_RST#
4 CPU_HT_RESET# P20 H16
R284 0_4 RSVD0 RSVD8
(13,14,25) EC_PWRGD 2 P19 RSVD1 RSVD9 B18
Q20 N20 RSVD2
R285 *0_4 U18 2 MMBT3904 N19 B3
3

(10,25) NB_PWRGD NC7SZ08P5X_NL RSVD3 RSVD10


RSVD11 C1
PSI_L 1 3 PSI#
PSI# (28)
RSVD12 H6
RSVD13 G6
RSVD14 D5
MISC
RSVD15 R24
RSVD16 W18
R26 RSVD4 RSVD17 R23
separated input voltage R25 RSVD5 RSVD18 AA8
+1.8V P22 H18
RSVD6 RSVD19
B R22 RSVD7 RSVD20 H19 B
R15 4.7K/F_4 EC_PWRGD

R18
+1.8VSUS 330_4
AMD NPT S1 SOCKET
R14
Processor Socket
Q4
2

4.7K/F_4 R19 MMBT3904

300_4 3 1 +1.8VSUS
CPU_EC_PROCHOT# (25)
Q3
2

+1.8VSUS MMBT3904

R16 300_4 H_THERMTRIP# 1 3 H_PROCHOT# R20 *0_4


THERM_SYS_PWR (30) CPU_PROCHOT# (14)
CPU_TEST27_SINGLECHAIN R276 *300_4
CPU_TEST26_BURNIN# R272 300_4
CPU_PRESENT# R265 1K/F_4

om
CPU_TEST25_H_BYPASSCLK_H R39 510/F_4

+3V

CPU H/W MONITOR


CPU_TEST21_SCANEN R264 300_4

l.c
CPU_TEST20_SCANCLK2 R271 300_4
CPU_TEST24_SCANCLK1 R270 300_4

ai
R11 CPU_TEST22_SCANSHIFTEN R277 300_4
CPU_TEST12_SCANSHIFTENB R263 300_4

tm
10K_4 CPU_TEST15_BP1 R25 300_4
+3V CPU_TEST14_BP0 R34 300_4

ho
+3V
15 MIL MBDATA_CPU (25)
CPU_TEST25_L_BYPASSCLK_L R35 510/F_4
CPU_TEST19_PLLTEST0

f@
R28 300_4
R13 47/F_6 3V_THM R279 CPU_TEST18_PLLTEST1 R27 300_4
*10K_4 +3V
To SB GPIO

in
C8
.1U_4 Address 98H IF no use which Net

xa
MAX6648_AL# (14)
A
U1 G784
R10
need pull-up or down A

he
1 6 10K_4
CPU_TEST5_THERMDC VCC -ALT KBSMDAT
3 DXN SMDATA 7
2 8 KBSMCLK
DXP SMCLK MBCLK_CPU (25)
4 -OVT GND 5
C15 +3V
2200P/50V_4
CPU_TEST4_THERMDA PROJECT : ZR3
10 mil trace / Quanta Computer Inc.
R12
10 mil space 10K_4
To FAN MAX6648_OV# (26) SMBus SLAVE ADDRESS: 98h Size Document Number Rev
ATHLON64 CTRL & DEBUG 1A

Date: Wednesday, October 18, 2006 Sheet 5 of 31


5 4 3 2 1
5 4 3 2 1

VCC_CORE VCC_CORE
U16E U16F
AC4
VDD1 VDD43
V12 AA4
VSS1 VSS66
J6 BOTTOMSIDE DECOUPLING
AD2 V14 AA11 J8
VDD2 VDD44 VSS2 VSS67
D G4 W4 AA13 J10 D
VDD3 VDD45 VSS3 VSS68 VCC_CORE
H2 Y2 AA15 J12
VDD4 VDD46 VSS4 VSS69
J9 J15 AA17 J14
VDD5 VDD47 VSS5 VSS70
J11 K16 AA19 J16
VDD6 VDD48 VSS6 VSS71
J13 L15 AB2 J18
VDD7 VDD49 VSS7 VSS72 C79 C78 C445 C446 C77 C51 C62 C63 C80
K6 M16 AB7 K2
VDD8 VDD50 VSS8 VSS73
K10 P16 AB9 K7
VDD9 VDD51 VSS9 VSS74 22U/10V_8 22U/10V_8 22U/10V_8 22U/10V_8 22U/10V_8 22U/10V_8 22U/10V_8 22U/10V_8 22U/10V_8
K12 T16 AB23 K9
VDD10 VDD52 VSS10 VSS75
K14 U15 AB25 K11
VDD11 VDD53 VSS11 VSS76
L4 V16 AC11 K13
VDD12 VDD54 +1.8VSUS VSS12 VSS77
L7 AC13 K15
VDD13 VSS13 VSS78
L9 AC15 K17
VDD14 VSS14 VSS79
L11 H25 AC17 L6
VDD15 VDDIO1 VSS15 VSS80 VCC_CORE VCC_CORE
L13 J17 AC19 L8
M2
VDD16 VDDIO2
K18 AC21
VSS16 VSS81
L10
Near ATI RS485 Chipset
VDD17 VDDIO3 VSS17 VSS82
M6 K21 AD6 L12
VDD18 VDDIO4 VSS18 VSS83
M8 K23 AD8 L14
VDD19 VDDIO5 VSS19 VSS84 C74 C54 C89 C47 C162 C183 C115 C65 C52 C35
M10 K25 AD25 L16
VDD20 VDDIO6 VSS20 VSS85
N7 L17 AE11 L18
VDD21 VDDIO7 VSS21 VSS86 .22U/6V_4 .22U/6V_4 .01U_4 180P_4 .22U/6V_4 .22U/6V_4 .01U_4 .01U_4 .01U_4 .01U_4
N9 M18 AE13 M7
VDD22 VDDIO8 VSS22 VSS87
N11 M21 AE15 M9
VDD23 VDDIO9 VSS23 VSS88
P8 M23 AE17 M11
VDD24 VDDIO10 VSS24 VSS89
P10 M25 AE19 M17
VDD25 VDDIO11 VSS25 VSS90
R4 N17 AE21 N4
VDD26 VDDIO12 VSS26 VSS91
R7 P18 AE23 N8
VDD27 VDDIO13 VSS27 VSS92
R9 P21 B4 N10
VDD28 VDDIO14 VSS28 VSS93 +1.8VSUS
R11 P23 B6 N16
VDD29 VDDIO15 VSS29 VSS94
C T2 P25 B8 N18 C
VDD30 VDDIO16 VSS30 VSS95
T6 R17 B9 P2
VDD31 VDDIO17 VSS31 VSS96
T8 T18 B11 P7
VDD32 VDDIO18 VSS32 VSS97 C56 C46 C91 C90
T10 T21 B13 P9
VDD33 VDDIO19 VSS33 VSS98
T12 T23 B15 P11
VDD34 VDDIO20 VSS34 VSS99 22U/10V_8 22U/10V_8 .22U/6V_4 .22U/6V_4
T14 T25 B17 P17
VDD35 VDDIO21 VSS35 VSS100
U7 U17 B19 R8
VDD36 VDDIO22 VSS36 VSS101
U9 V18 B21 R10
VDD37 VDDIO23 VSS37 VSS102
U11 V21 B23 R16
VDD38 VDDIO24 VSS38 VSS103
U13 V23 B25 R18
VDD39 VDDIO25 VSS39 VSS104
V6 V25 D6 T7
VDD40 VDDIO26 VSS40 VSS105
V8 Y25 D8 T9
VDD41 VDDIO27 VSS41 VSS106
V10 D9 T11
VDD42 VSS42 VSS107
D11 T13
VSS43 VSS108
POWER D13 T15
D15
VSS44
VSS45
VSS109
VSS110
T17 DECOUPLING BETWEEN PROCESSOR AND DIMMs
Athlon 64 S1 D17
VSS46 VSS111
U4
D19 U6
Processor Socket
D21
VSS47
VSS48
VSS112
VSS113
U8 PLACE CLOSE TO PROCESSOR AS POSSIBLE
D23 U10
VSS49 VSS114
D25 U12
VSS50 VSS115 +1.8VSUS
E4 U14
VSS51 VSS116
F2 U16
VSS52 VSS117
F11 U18
VSS53 VSS118
F13 V2
VSS54 VSS119 C61 C75 C70 C84 C58 C83 C82 C45
F15 V7
VSS55 VSS120
F17 V9
VSS56 VSS121 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 .22U/6V_4 .22U/6V_4 .22U/6V_4 .22U/6V_4
B F19 V11 B
VSS57 VSS122
F21 V13
VSS58 VSS123
F23 V15
VSS59 VSS124
F25 V17
VSS60 VSS125
H7 W6
VSS61 VSS126
H9 Y21
VSS62 VSS127
H21 Y23
VSS63 VSS128 +1.8VSUS
H23 N6
VSS64 VSS129
J4
VSS65
GROUND
C59 C44 C66 C71 C103 C41 C94 C34
Athlon 64 S1
.01U_4 .01U_4 10P_4 180P_4 180P_4 180P_4 180P_4 180P_4
Processor Socket
A1 A26

Athlon 64 S1g1 PROCESSOR POWER AND GROUND


uPGA638
A
Top View A

PROJECT : ZR3
AF1
Quanta Computer Inc.
Size Document Number Rev
ATHLON64 PWR & GND 1A

Date: Wednesday, October 18, 2006 Sheet 6 of 31


5 4 3 2 1
A B C D E

TERMINATOR DECOUPLING CAPACITOR DDR2 TERMINATOR +0.9V_VTER +0.9V_VTER

+0.9V_VTER M_A_A2 RN14 1 2 47_4P2R_S M_B_A10 RN12 1 2 47_4P2R_S


+0.9V_VTER M_A_A4 3 4 M_B_BS#0 3 4
M_A_A3 RN17 1 2 47_4P2R_S M_B_A4 RN15 1 2 47_4P2R_S
M_CKE0 R30 47_4 M_A_A5 3 4 M_B_A2 3 4
C23 C111 C27 C101 C106 C33 C102 C100 C107 C104 C108 C109 C28 C32 C29 C24 C119 M_CKE1 R32 47_4 M_A_BS#1 RN10 1 2 47_4P2R_S M_B_A5 RN16 1 2 47_4P2R_S
M_CKE2 R31 47_4 M_A_A0 3 4 M_B_A1 3 4
10U/6.3V_8 .1U-16V_4 .1U-16V_4 .1U-16V_4 .1U-16V_4 .1U-16V_4 .1U-16V_4 .1U-16V_4 .1U-16V_4 .1U-16V_4 .1U-16V_4 .1U-16V_4 .1U-16V_4 .1U-16V_4 .1U-16V_4 .1U-16V_4 .1U-16V_4 M_CKE3 R29 47_4 M_A_A7 RN18 1 2 47_4P2R_S M_B_A6 RN19 1 2 47_4P2R_S
M_A_A6 3 4 M_B_A0 3 4
M_A_CS#3 RN2 1 2 47_4P2R_S
M_A_A13 3 4 M_A_A1 RN13 1 2 47_4P2R_S M_B_A3 RN25 1 2 47_4P2R_S
M_A_CAS# RN1 1 2 47_4P2R_S M_A_A10 3 4 M_B_A8 3 4
M_ODT0 3 4 M_A_WE# RN9 1 2 47_4P2R_S M_B_A11 RN23 1 2 47_4P2R_S
+0.9V_VTER M_A_BS#0 3 4 M_B_A7 3 4
4 M_ODT3 RN5 1 2 47_4P2R_S M_A_A12 RN20 1 2 47_4P2R_S M_B_BS#2 RN28 1 2 47_4P2R_S 4
M_B_WE# 3 4 M_A_BS#2 3 4 M_B_CS#2 3 4
M_B_A13 RN3 1 2 47_4P2R_S M_A_A8 RN22 1 2 47_4P2R_S M_B_RAS# RN11 1 2 47_4P2R_S
M_B_CS#3 3 4 M_A_A11 3 4 M_B_BS#1 3 4
C11 C10 C118 C37 C125 C19 C53 C76 C43 C113 C64 C26 C98 C110 C87 C31
M_A_CS#1 RN4 1 2 47_4P2R_S M_A_CS#2 RN24 1 2 47_4P2R_S M_ODT2 RN7 1 2 47_4P2R_S
.1U-16V_4 .1U-16V_4 .1U-16V_4 .1U-16V_4 .1U-16V_4 .1U-16V_4 .1U-16V_4 .1U-16V_4 .1U-16V_4 .1U-16V_4 .1U-16V_4 .1U-16V_4 .1U-16V_4 .1U-16V_4 .1U-16V_4 .1U-16V_4 M_ODT1 3 4 M_A_A9 3 4 M_B_CS#0 3 4
M_B_CAS# RN8 1 2 47_4P2R_S M_A_RAS# RN6 1 2 47_4P2R_S M_B_A12 RN21 1 2 47_4P2R_S
M_B_CS#1 3 4 M_A_CS#0 3 4 M_B_A9 3 4
M_A_A14 RN26 1 2 47_4P2R_S M_B_A15 RN27 1 2 47_4P2R_S
+1.8VSUS M_A_A15 3 4 M_B_A14 3 4

+1.8VSUS +1.8VSUS

103
104
111
112
117
118

103
104
111
112
117
118
81
82
87
88
95
96

81
82
87
88
95
96
(4) M_A_A[0..15] M_A_DQ[0..63] (4) (4) M_B_A[0..15] M_B_DQ[0..63] (4)
M_A_A0 102 5 M_A_DQ1 M_B_A0 102 5 M_B_DQ4
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11

VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
M_A_A1 A0 DQ0 M_A_DQ0 M_B_A1 A0 DQ0 M_B_DQ1
101 7 101 7
M_A_A2 A1 DQ1 M_A_DQ2 M_B_A2 A1 DQ1 M_B_DQ7
100 17 100 17
M_A_A3 A2 DQ2 M_A_DQ3 M_B_A3 A2 DQ2 M_B_DQ3
99 19 99 19
M_A_A4 A3 DQ3 M_A_DQ4 M_B_A4 A3 DQ3 M_B_DQ5
98 4 98 4
M_A_A5 A4 DQ4 M_A_DQ5 M_B_A5 A4 DQ4 M_B_DQ0
97 6 97 6
M_A_A6 A5 DQ5 M_A_DQ7 M_B_A6 A5 DQ5 M_B_DQ6
94 14 94 14
M_A_A7 A6 DQ6 M_A_DQ6 M_B_A7 A6 DQ6 M_B_DQ2
92 16 92 16
M_A_A8 93
A7 CN11 DQ7
23 M_A_DQ12 M_B_A8 93
A7 CN10 DQ7
23 M_B_DQ8
M_A_A9 A8 DQ8 M_A_DQ8 M_B_A9 A8 DQ8 M_B_DQ9
91 25 91 25
M_A_A10 105
A9 REVERSE DQ9
35 M_A_DQ10 M_B_A10 105
A9 REVERSE DQ9
35 M_B_DQ15
M_A_A11 A10 DQ10 M_A_DQ11 M_B_A11 A10 DQ10 M_B_DQ11
90 37 90 37
M_A_A12 A11 DQ11 M_A_DQ9 M_B_A12 A11 DQ11 M_B_DQ13
89 20 89 20
M_A_A13 A12 DQ12 M_A_DQ13 M_B_A13 A12 DQ12 M_B_DQ12
116 22 116 22
M_A_A14 A13 DQ13 M_A_DQ15 M_B_A14 A13 DQ13 M_B_DQ14
3 86 36 86 36 3
M_A_A15 A14 DQ14 M_A_DQ14 M_B_A15 A14 DQ14 M_B_DQ10 +1.8VSUS
84 38 84 38
A15 DQ15 M_A_DQ17 A15 DQ15 M_B_DQ16
43 43
DQ16 M_A_DQ21 DQ16 M_B_DQ17
(4) M_A_BS#0 107 45 (4) M_B_BS#0 107 45
BA0 DQ17 M_A_DQ23 BA0 DQ17 M_B_DQ18
(4) M_A_BS#1 106 55 (4) M_B_BS#1 106 55
BA1 DQ18 M_A_DQ18 BA1 DQ18 M_B_DQ19 C22 *10U/6.3V/X5R_8
(4) M_A_BS#2 85 57 (4) M_B_BS#2 85 57
BA2 DQ19 M_A_DQ20 BA2 DQ19 M_B_DQ20
44 44
M_A_DM0 DQ20 M_A_DQ19 M_B_DM0 DQ20 M_B_DQ21 C25 *10U/6.3V/X5R_8
10 46 10 46
M_A_DM1 DM0 DQ21 M_A_DQ22 M_B_DM1 DM0 DQ21 M_B_DQ22
26 56 26 56
M_A_DM2 DM1 DQ22 M_A_DQ16 M_B_DM2 DM1 DQ22 M_B_DQ23 C20 10U/10V/X5R_8
52 58 52 58
M_A_DM3 DM2 DQ23 M_A_DQ29 M_B_DM3 DM2 DQ23 M_B_DQ25
67 61 67 61
M_A_DM4 DM3 DQ24 M_A_DQ28 M_B_DM4 DM3 DQ24 M_B_DQ29 C114 10U/10V/X5R_8
130 63 130 63
M_A_DM5 DM4 DQ25 M_A_DQ31 M_B_DM5 DM4 DQ25 M_B_DQ27
147 73 147 73
M_A_DM6 DM5 DQ26 M_A_DQ30 M_B_DM6 DM5 DQ26 M_B_DQ26
170 75 170 75
M_A_DM7 DM6 DQ27 M_A_DQ24 M_B_DM7 DM6 DQ27 M_B_DQ28 C85 .1U_4
(4) M_A_DM[0..7] 185 62 (4) M_B_DM[0..7] 185 62
DM7 DQ28 M_A_DQ25 DM7 DQ28 M_B_DQ24
64 64
M_A_DQS0 DQ29 M_A_DQ26 M_B_DQS0 DQ29 M_B_DQ30 C95 .1U_4
13 74 13 74
M_A_DQS1 DQS0 DQ30 M_A_DQ27 M_B_DQS1 DQS0 DQ30 M_B_DQ31
31 76 31 76
M_A_DQS2 DQS1 DQ31 M_A_DQ32 M_B_DQS2 DQS1 DQ31 M_B_DQ32 C40 .1U_4
51 123 51 123
M_A_DQS3 DQS2 DQ32 M_A_DQ36 M_B_DQS3 DQS2 DQ32 M_B_DQ36
70 125 70 125
M_A_DQS4 DQS3 DQ33 M_A_DQ37 M_B_DQS4 DQS3 DQ33 M_B_DQ34 C50 .1U_4
131 135 131 135
M_A_DQS5 DQS4 DQ34 M_A_DQ35 M_B_DQS5 DQS4 DQ34 M_B_DQ38
148 137 148 137
M_A_DQS6 DQS5 DQ35 M_A_DQ33 M_B_DQS6 DQS5 DQ35 M_B_DQ33 C88 .1U_4
169 124 169 124
M_A_DQS7 DQS6 DQ36 M_A_DQ38 M_B_DQS7 DQS6 DQ36 M_B_DQ37
(4) M_A_DQS[0..7] 188 126 (4) M_B_DQS[0..7] 188 126
DQS7 DQ37 M_A_DQ34 DQS7 DQ37 M_B_DQ39 C36 .1U_4
134 134
M_A_DQS#0 DQ38 M_A_DQ39 M_B_DQS#0 DQ38 M_B_DQ35
11 136 11 136
M_A_DQS#1 DQS0 DQ39 M_A_DQ40 M_B_DQS#1 DQS0 DQ39 M_B_DQ41 C38 .1U_4
29 141 29 141
M_A_DQS#2 DQS1 DQ40 M_A_DQ41 M_B_DQS#2 DQS1 DQ40 M_B_DQ40
49 143 49 143
M_A_DQS#3 DQS2 DQ41 M_A_DQ42 M_B_DQS#3 DQS2 DQ41 M_B_DQ42 C73 .1U_4
68 151 68 151
M_A_DQS#4 DQS3 DQ42 M_A_DQ46 M_B_DQS#4 DQS3 DQ42 M_B_DQ43
129 153 129 153
M_A_DQS#5 DQS4 DQ43 M_A_DQ44 M_B_DQS#5 DQS4 DQ43 M_B_DQ45 C49 .1U_4
146 140 146 140
M_A_DQS#6 DQS5 DQ44 M_A_DQ45 M_B_DQS#6 DQS5 DQ44 M_B_DQ44
167 142 167 142
M_A_DQS#7 DQS6 DQ45 M_A_DQ43 M_B_DQS#7 DQS6 DQ45 M_B_DQ46 C48 .1U_4
(4) M_A_DQS#[0..7] 186 152 (4) M_B_DQS#[0..7] 186 152
DQS7 DQ46 M_A_DQ47 DQS7 DQ46 M_B_DQ47
154 154
DQ47 M_A_DQ49 DQ47 M_B_DQ48 C39 .1U_4
157 157
M_CLKOUT0 DQ48 M_A_DQ52 M_CLKOUT3 DQ48 M_B_DQ49
(4) M_CLKOUT0 30 159 (4) M_CLKOUT3 30 159
M_CLKOUT0# CK0 DQ49 M_A_DQ50 M_CLKOUT3# CK0 DQ49 M_B_DQ50 C81 .1U_4
2 (4) M_CLKOUT0# 32 173 (4) M_CLKOUT3# 32 173 2
M_CLKOUT1 CK0 DQ50 M_A_DQ51 M_CLKOUT4 CK0 DQ50 M_B_DQ51
(4) M_CLKOUT1 164 175 (4) M_CLKOUT4 164 175
M_CLKOUT1# CK1 DQ51 M_A_DQ53 M_CLKOUT4# CK1 DQ51 M_B_DQ52 C69 .1U_4
(4) M_CLKOUT1# 166 158 (4) M_CLKOUT4# 166 158
CK1 DQ52 M_A_DQ48 CK1 DQ52 M_B_DQ53
160 160
DQ53 M_A_DQ55 DQ53 M_B_DQ55 C68 .1U_4
(4) M_CKE0 79 174 (4) M_CKE2 79 174
CKE0 DQ54 M_A_DQ54 CKE0 DQ54 M_B_DQ54
(4) M_CKE1 80 176 (4) M_CKE3 80 176
CKE1 DQ55 M_A_DQ60 CKE1 DQ55 M_B_DQ61 C55 .1U_4
179 179
DQ56 M_A_DQ56 DQ56 M_B_DQ57
(4) M_A_RAS# 108 181 (4) M_B_RAS# 108 181
RAS DQ57 M_A_DQ58 RAS DQ57 M_B_DQ58 C57 .1U_4
(4) M_A_CAS# 113 189 (4) M_B_CAS# 113 189
CAS DQ58 M_A_DQ63 CAS DQ58 M_B_DQ62
(4) M_A_WE# 109 191 (4) M_B_WE# 109 191
WE DQ59 M_A_DQ57 WE DQ59 M_B_DQ56
SO-DIMM

SO-DIMM
110 180 110 180 C60 .1U_4
(4) M_A_CS#0 S0 DQ60 (4) M_B_CS#0 S0 DQ60
115 182 M_A_DQ61 115 182 M_B_DQ60
(4) M_A_CS#1 S1 DQ61 (4) M_B_CS#1 S1 DQ61
192 M_A_DQ59 192 M_B_DQ59 C30 .1U_4
DQ62 M_A_DQ62 DQ62 M_B_DQ63
(4) M_ODT0 114 194 (4) M_ODT2 114 194
ODT0 DQ63 ODT0 DQ63 C72 .1U_4
(4) M_ODT1 119 (4) M_ODT3 119
ODT1 ODT1
50 50
NC1 NC1 C67 .1U_4
198 69 198 69
SA0 NC2 R9 10K_4 SA0 NC2
200 83 M_A_CS#2 (4) +3V 200 83 M_B_CS#2 (4)
SA1 NC3 SA1 NC3
120 M_A_CS#3 (4) 120 M_B_CS#3 (4)
NC4 PDAT_SMB NC4
(12,14,20) PDAT_SMB 195 163 195 163
SDA NC/TEST PCLK_SMB SDA NC/TEST
(12,14,20) PCLK_SMB 197 197
SCL SCL
C4 .1U_4 199 C3 .1U_4 199
+3V VDDspd +3V VDDspd
C167 .1U_4 MVREF_DIM 1 196 C163 .1U_4 MVREF_DIM 1 196
+1.8VSUS VREF VSS56 +1.8VSUS VREF VSS56
193 193
VSS55 VSS55
2

2 190 2 190
C161 C166
2.2U/10V/X5R_8 .1U_4
3
8
VSS0
VSS1 (H=4) VSS54
VSS53
187
184
C180 C168
2.2U/10V/X5R_8 .1U_4
3
8
VSS0
VSS1 (H=8) VSS54
VSS53
187
184
1

VSS2 VSS52 VSS2 VSS52


9 183 9 183
VSS3 VSS51 VSS3 VSS51
12 178 12 178
VSS4 VSS50 VSS4 VSS50
15 177 15 177
VSS5 VSS49 VSS5 VSS49
18 172 18 172
VSS6 VSS48 VSS6 VSS48
21 171 21 171
VSS7 VSS47 +0.9V_REF +1.8VSUS VSS7 VSS47
24 168 24 168
M_CLKOUT0 VSS8 VSS46 M_CLKOUT3 VSS8 VSS46
27 165 27 165
VSS9 VSS45 VSS9 VSS45
28 162 28 162
1 C138 VSS10 VSS44 R47 C137 VSS10 VSS44 1
33 161 33 161
1.5P_4 VSS11 VSS43 R48 1.5P_4 VSS11 VSS43
34 156 34 156
VSS12 VSS42 *0_4 VSS12 VSS42
39 155 39 155
M_CLKOUT0# VSS13 VSS41 1K/F_4 M_CLKOUT3# VSS13 VSS41
40 150 40 150
VSS14 VSS40 MVREF_DIM VSS14 VSS40
41 149 41 149
M_CLKOUT1 VSS15 VSS39 M_CLKOUT4 VSS15 VSS39
42 145 42 145
VSS16 VSS38 VSS16 VSS38
47 144 47 144
C17 VSS17 VSS37 C175 R49 C14 VSS17 VSS37
48 139 48 139
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33

VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33

1.5P_4 VSS18 VSS36 1.5P_4 VSS18 VSS36


53 138 53 138
54
VSS19 VSS35
133 1U/10V_4 1K/F_4 54
VSS19 VSS35
133
PROJECT : ZR3
M_CLKOUT1# VSS20 VSS34 M_CLKOUT4# VSS20 VSS34
Quanta Computer Inc.
59
60
65
66
71
72
77
78
121
122
127
128
132

59
60
65
66
71
72
77
78
121
122
127
128
132

DDRII_SODIMM_R DDRII_SODIMM_R
Size Document Number Rev
SMBus ADDRESS: A0h SMBus ADDRESS: A4h DDR2 SO-DIMM 1A

Date: Wednesday, October 18, 2006 Sheet 7 of 31


A B C D E
5 4 3 2 1

D D

U19A

(3) HT_CADOUT15_P R19 HT_RXCAD15P HT_TXCAD15P P21 HT_CADIN15_P (3)


(3) HT_CADOUT15_N R18 HT_RXCAD15N PART 1 OF 5 HT_TXCAD15N P22 HT_CADIN15_N (3)
R21 HT_RXCAD14P HT_TXCAD14P P18 HT_CADIN14_P (3)
(3) HT_CADOUT14_P
(3) HT_CADOUT14_N R22 HT_RXCAD14N HT_TXCAD14N P19 HT_CADIN14_N (3)
U22 HT_RXCAD13P HT_TXCAD13P M22 HT_CADIN13_P (3)
(3) HT_CADOUT13_P
(3) HT_CADOUT13_N U21 HT_RXCAD13N HT_TXCAD13N M21 HT_CADIN13_N (3)
(3) HT_CADOUT12_P U18 HT_RXCAD12P HT_TXCAD12P M18 HT_CADIN12_P (3)
U19 HT_RXCAD12N HT_TXCAD12N M19 HT_CADIN12_N (3)
(3) HT_CADOUT12_N
(3) HT_CADOUT11_P W19 HT_RXCAD11P HT_TXCAD11P L18 HT_CADIN11_P (3)
W20 HT_RXCAD11N HT_TXCAD11N L19 HT_CADIN11_N (3)
(3) HT_CADOUT11_N
(3) HT_CADOUT10_P AC21 HT_RXCAD10P HT_TXCAD10P G22 HT_CADIN10_P (3)
(3) HT_CADOUT10_N AB22 HT_RXCAD10N HT_TXCAD10N G21 HT_CADIN10_N (3)
AB20 HT_RXCAD9P HT_TXCAD9P J20 HT_CADIN9_P (3)
(3) HT_CADOUT9_P

HYPER TRANSPORT CPU I/F


(3) HT_CADOUT9_N AA20 HT_RXCAD9N HT_TXCAD9N J21 HT_CADIN9_N (3)
AA19 HT_RXCAD8P HT_TXCAD8P F21 HT_CADIN8_P (3)
(3) HT_CADOUT8_P
(3) HT_CADOUT8_N Y19 HT_RXCAD8N HT_TXCAD8N F22 HT_CADIN8_N (3)

C T24 HT_RXCAD7P HT_TXCAD7P N24 HT_CADIN7_P (3) C


(3) HT_CADOUT7_P
(3) HT_CADOUT7_N R25 HT_RXCAD7N HT_TXCAD7N N25 HT_CADIN7_N (3)
U25 HT_RXCAD6P HT_TXCAD6P L25 HT_CADIN6_P (3)
(3) HT_CADOUT6_P
(3) HT_CADOUT6_N U24 HT_RXCAD6N HT_TXCAD6N M24 HT_CADIN6_N (3)
(3) HT_CADOUT5_P V23 HT_RXCAD5P HT_TXCAD5P K25 HT_CADIN5_P (3)
U23 HT_RXCAD5N HT_TXCAD5N K24 HT_CADIN5_N (3)
(3) HT_CADOUT5_N
(3) HT_CADOUT4_P V24 HT_RXCAD4P HT_TXCAD4P J23 HT_CADIN4_P (3)
V25 HT_RXCAD4N HT_TXCAD4N K23 HT_CADIN4_N (3)
(3) HT_CADOUT4_N
(3) HT_CADOUT3_P AA25 HT_RXCAD3P HT_TXCAD3P G25 HT_CADIN3_P (3)
(3) HT_CADOUT3_N AA24 HT_RXCAD3N HT_TXCAD3N H24 HT_CADIN3_N (3)
AB23 HT_RXCAD2P HT_TXCAD2P F25 HT_CADIN2_P (3)
(3) HT_CADOUT2_P
(3) HT_CADOUT2_N AA23 HT_RXCAD2N HT_TXCAD2N F24 HT_CADIN2_N (3)
AB24 HT_RXCAD1P HT_TXCAD1P E23 HT_CADIN1_P (3)
(3) HT_CADOUT1_P
(3) HT_CADOUT1_N AB25 HT_RXCAD1N HT_TXCAD1N F23 HT_CADIN1_N (3)
(3) HT_CADOUT0_P AC24 HT_RXCAD0P HT_TXCAD0P E24 HT_CADIN0_P (3)
AC25 HT_RXCAD0N HT_TXCAD0N E25 HT_CADIN0_N (3)
(3) HT_CADOUT0_N
W21 HT_RXCLK1P HT_TXCLK1P L21 HT_CLKIN1_P (3)
(3) HT_CLKOUT1_P
(3) HT_CLKOUT1_N W22 HT_RXCLK1N HT_TXCLK1N L22 HT_CLKIN1_N (3)
Y24 HT_RXCLK0P HT_TXCLK0P J24 HT_CLKIN0_P (3)
(3) HT_CLKOUT0_P
(3) HT_CLKOUT0_N W25 HT_RXCLK0N HT_TXCLK0N J25 HT_CLKIN0_N (3)

(3) HT_CTLOUT0_P P24 HT_RXCTLP HT_TXCTLP N23 HT_CTLIN0_P (3)


B
(3) HT_CTLOUT0_N P25 HT_RXCTLN HT_TXCTLN P23 HT_CTLIN0_N (3) B

R313 49.9/F_4 HT_RXCALP A24 C25 HT_TXCALP R65 100/F_4


HT_RXCALN HT_RXCALP HT_TXCALP HT_TXCALN
VDDHT_PKG C24 HT_RXCALN HT_TXCALN D24
R56 49.9/F_4

RS485M A11 HT

A A

PROJECT : ZR3
Quanta Computer Inc.
Size Document Number Rev
RS485-HT LINK0 I/F 1A

Date: Wednesday, October 18, 2006 Sheet 8 of 31


5 4 3 2 1
5 4 3 2 1

U19B
D D

G5 GFX_RX0P PART 2 OF 5 GFX_TX0P J1


G4 GFX_RX0N GFX_TX0N H2
J8 GFX_RX1P GFX_TX1P K2
J7 GFX_RX1N GFX_TX1N K1
J4 GFX_RX2P GFX_TX2P K3
J5 GFX_RX2N GFX_TX2N L3
L8 GFX_RX3P GFX_TX3P L1
L7 GFX_RX3N GFX_TX3N L2
L4 GFX_RX4P GFX_TX4P N2
L5 GFX_RX4N GFX_TX4N N1
M8 GFX_RX5P GFX_TX5P P2
M7 GFX_RX5N GFX_TX5N P1
M4 GFX_RX6P GFX_TX6P P3
M5 GFX_RX6N GFX_TX6N R3
P8 GFX_RX7P GFX_TX7P R1
P7 GFX_RX7N GFX_TX7N R2
P4 GFX_RX8P GFX_TX8P T2

PCIE I/F GFX


P5 GFX_RX8N GFX_TX8N U1
R4 GFX_RX9P GFX_TX9P V2
R5 GFX_RX9N GFX_TX9N V1
R7 GFX_RX10P GFX_TX10P V3
R8 GFX_RX10N GFX_TX10N W3
C U4 GFX_RX11P GFX_TX11P W1 C
U5 GFX_RX11N GFX_TX11N W2
W4 GFX_RX12P GFX_TX12P Y2
W5 GFX_RX12N GFX_TX12N AA1
Y4 GFX_RX13P GFX_TX13P AA2
Y5 GFX_RX13N GFX_TX13N AB2
V9 GFX_RX14P GFX_TX14P AB1
W9 GFX_RX14N GFX_TX14N AC1 Place these caps
AB7 GFX_RX15P GFX_TX15P AE3 close to connector
AB6 GFX_RX15N GFX_TX15N AE4

W11 AD8 GPP_TX0P_C C126 .1U_4


(20) MINI_PCIE_RXP0 GPP_RX0P GPP_TX0P MINI_PCIE_TXP0 (20)
WLAN MINI CARD W12 AE8 GPP_TX0N_C C122 .1U_4 WLAN MINI CARD
(20) MINI_PCIE_RXN0 GPP_RX0N GPP_TX0N MINI_PCIE_TXN0 (20)

T31 AA11 GPP_RX1P GPP_TX1P AD7 T84


T83 AB11 GPP_RX1N GPP_TX1N AE7 T82
PCIE I/F GPP
Y7 GPP_RX2P GPP_TX2P AD4
AA7 GPP_RX2N GPP_TX2N AE5

AB9 GPP_RX3P GPP_TX3P AD5


AA9 GPP_RX3N GPP_TX3N AD6

W14 AE9 A_TX0P_C C120 .1U_4


(13) A_RX0P SB_RX0P SB_TX0P A_TX0P (13)
B W15 PCIE I/F SB AD10 A_TX0N_C C121 .1U_4 B
(13) A_RX0N SB_RX0N SB_TX0N A_TX0N (13)
AB12 AC8 A_TX1P_C C139 .1U_4
(13) A_RX1P SB_RX1P SB_TX1P A_TX1P (13)
AA12 AD9 A_TX1N_C C140 .1U_4
(13) A_RX1N SB_RX1N SB_TX1N A_TX1N (13)
R43 10K_6 PCE_ISET AA14 AD11 PCE_PCAL R36 150/F_6
R37 8.25K/F_6 PCE_TXISET PCE_ISET(PCE_CALI) PCE_PCAL(PCE_CALRP) PCE_NCAL R38 100/F_6
AB14 PCE_TXISET(NC) PCE_NCAL(PCE_CALRN) AE11 VDDA12_PKG2

R27: 10KOhm FOR RS485 R28: 150 Ohm FOR RS485


1.47KOhm FOR RS690 RS485M A11 HT 562 Ohm FOR RS690
R29: 8.25KOhm FOR RS485 R26: Ward update to 100 Ohm FOR RS485
DNI FOR RS690 2KOhm FOR RS690

A A

PROJECT : ZR3
Quanta Computer Inc.
Size Document Number Rev
RS485-PCIE LINK I/F 1A

Date: Wednesday, October 18, 2006 Sheet 9 of 31


5 4 3 2 1
5 4 3 2 1

+1.8V HTPVDD
L9
HTPVDD
BK1608HS330_6
C468 C186 +3V AVDD_NB
L14
10U/10V/X5R_8 4.7U/6.3V_6
BK1608HS330_6
C189 C184
C199
10U/6.3V_6 .1U_4 *100U/6.3V_3528

D D

+1.8V AVDD1
close to NB TV_C/R_SYS R328 0/F_6 U19C
(21) TV_C/R_SYS
TV_Y/G_SYS
(21) TV_Y/G_SYS

1
TV_COMP_SYS C484 B22 B14 TXLOUT0+ (21)
(21) TV_COMP_SYS AVDD1 TXOUT_L0P
C22
AVDD2
PART 3 OF 5 TXOUT_L0N
B15 TXLOUT0- (21)
2.2U/10V_8 G17 B13 TXLOUT1+ (21)

2
R344 R345 R346 AVSSN1 TXOUT_L1P
H17 A13 TXLOUT1- (21)
+1.8V AVDDQ AVSSN2 TXOUT_L1N
A20 H14 TXLOUT2+ (21)
150/F_4 150/F_4 150/F_4 L54 AVDDDI TXOUT_L2P
B20 G14 TXLOUT2- (21)
AVSSDI TXOUT_L2N
D17 T34
BK1608HS330_6 TXOUT_L3P
A21 E17 T33
AVDDQ TXOUT_L3N

1
C486 C485 C481 A22
AVSSQ
A15 TXUOUT0+ (21)
10U/10V/X5R_8 2.2U/10V/X5R_8 .1U_4 TV_C/R_SYS TXOUT_U0P

CRT/TVOUT
C21 B16 TXUOUT0- (21)

2
TV_Y/G_SYS C_R TXOUT_U0N
C20 C17 TXUOUT1+ (21)
TV_COMP_SYS Y_G TXOUT_U1P
D19 C18 TXUOUT1- (21)
COMP_B TXOUT_U1N
close to NB TXOUT_U2P
B17 TXUOUT2+ (21)
(21) VGA_RED E19 A17 TXUOUT2- (21)
RED TXOUT_U2N
(21) VGA_GRN F19 A18 T85
GREEN TXOUT_U3P
(21) VGA_BLU G19 B18 T89
BLUE TXOUT_U3N
(21) VSYNC C6
+1.8V PLLVDD DACVSYNC
(21) HSYNC A5
DACHSYNC TXCLK_LP
E15 TXLCLKOUT+ (21) RS485: LVDDR18A=1.8V
R54 R50 R52 L55 D15
TXCLK_LN TXLCLKOUT- (21) +1.8V
R327 715/F_6 B21 H15
RSET TXCLK_UP TXUCLKOUT+ (21)
150/F_4 150/F_4 150/F_4 BK1608HS330_6 G15 L10
TXCLK_UN TXUCLKOUT- (21)
C488 C479 R70 0_4 B6
(21) DDCCLK DACSCL

LVDS
R69 0_4 A6 D14 LPVDD BK1608HS330_6
C (21) DDCDAT DACSDA LPVDD C
10U/10V/X5R_8 4.7U/6.3V_6 E14 C178 C192
LPVSS
A10
PLLVDD(PLLVDD18) LVDDR_D .1U_4 4.7U/6.3V_6
B10 A12
PLLVSS LVDDR18D_1
B12
LVDDR18D_2 +1.8V
HTPVDD B24 C12

PLL PWR
HTPVDD LVDDR18A_1 L53
B25 C13
+1.8V +3V HTPVSS LVDDR18A_2
R334 0_4 NB_RST# C10 A16 BK1608HS330_6
(13,20,22) ALINK_RST# R341 0_4 SYSRESET# LVSSR1 C480 C483
C11 A14
(5,25) NB_PWRGD POWERGOOD LVSSR3

PM
LDT_STOP#_NB C5 D12
R42 R64 LDTSTOP# LVSSR5 .1U_4 4.7U/6.3V_6
(13) ALLOW_LDTSTOP B5 C19
ALLOW_LDTSTOP LVSSR6
C15
10K_4 1K/F_4 R71 10K_4 LVSSR7 +1.8V
C23 C16
HTTSTCLK LVSSR8 L52
B23
(12) HTREFCLK HTREFCLK LVDDR_A
2

Q5 R62 10K_4 C2 F14 BK1608HS330_6


TVCLKIN LVSSR12 C188 C185
F15
LDT_STOP#_NB LVSSR13

CLOCKs
1 3 B11
(5,13,14) LDT_STOP# (12) NB_OSC PLLVDD12 OSCIN .1U_4 4.7U/6.3V_6
MMBT3904 T88 A11
OSCOUT(PLLVDD12)
F2
(12) NBSRC_CLKP GFX_CLKP LCD_PON R337 1K/F_4
E1 E12 LCD_POWER_ON (21)
(12) NBSRC_CLKN GFX_CLKN LVDS_DIGON LVDS_BLON
G12
LVDS_BLON LVDS_BLEN
G1 F12 T35
(12) SBLINK_CLKP SB_CLKP LVDS_BLEN
G2
(12) SBLINK_CLKN SB_CLKN
LOAD_ROM#: LOAD ROM STRAP ENABLE R57 *2.7K_4 DFT_GPIO0 DVO_D0(GPP_TX4P)
AD14
D6 AD15
R59 3K/F_4 LOAD_ROM# DFT_GPIO0 DVO_D1(GPP_TX4N)
D7 AE15
R63 *2.7K_4 DFT_GPIO2 DFT_GPIO1 DVO_D2(NC)
High, LOAD ROM STRAP DISABLE R326 *2.7K_4 DFT_GPIO3
C8
DFT_GPIO2 DVO_D3(GPP_RX4P)
AD16
C7 AE16
B R335 *2.7K_4 DFT_GPIO4 DFT_GPIO3 DVO_D4(GPP_RX4N) B
Low, LOAD ROM STRAP ENABLE R325 *2.7K_4 DFT_GPIO5
B8
DFT_GPIO4 DVO_D5(NC)
AC17
A8
DFT_GPIO5 DVO_D6(NC)
AD18 10/18 Change R337 from 0 to 1k

DVO
D27 AE19

MIS.
DVO_D7(GPP_TX5N)
(13) BMREQ# 2 1 RB751 B2 AD19
BMREQb DVO_D8(GPP_TX5P)
(21) PHL_CLK A2 AE20
I2C_CLK DVO_D9(GPP_RX5N)
(21) PHL_DATA B4 AD20
I2C_DATA DVO_D10(GPP_RX5P)
T27 AA15 AE21
THERMALDIODE_P DVO_D11(NC)
T25 AB15
THERMALDIODE_N
AD13
DVO_VSYNC(NC)
T86 C14 AC13
TMDS_HPD DVO_DE(NC)
T87 B3 AE13
R58 4.7K/F_4 DDC_DATA DVO_HSYNC(NC)
C3 AE17
R68 2K/F STRP_DATA TESTMODE DVO_IDCKP(NC)
+3V A3 AD17
STRP_DATA DVO_IDCKN(NC)
D34

RS485M A11 HT NB_PWRGD 1 2 LCD_POWER_ON

RB751

RS485 RS690 10/18 Add D34 For TOPPOLY LCD Power On Garbage
R340 0_4
OSCOUT(A11) OSCOUT PLLVDD12
DVO_D0(AD14) DVO_D0 GPP_TX4P +3V
LCD_PON R330 2K/F_4
DVO_D1(AD15) DVO_D1 GPP_TX4N

5
LVDS_BLON 1
A LVDS_BLON R53 2.7K/F_4 A
DVO_D3(AD16) DVO_D3 GPP_RX4P 4 BLON (21)
NB_PWRGD 2
DVO_D4(AE16) DVO_D4 GPP_RX4N U21

3
LVDS_BLEN R76 *2.7K/F_4 *NC7SZ08P5X_NL
DVO_D7(AE19) DVO_D7 GPP_TX5N
DVO_D8(AD19) DVO_D8 GPP_TX5P PROJECT : ZR3
DVO_D9(AE20) DVO_D9 GPP_RX5N 09/07 Add R340 For LCD Power OnOff Sequence Quanta Computer Inc.
DVO_D10(AD20) DVO_D10 GPP_RX5P
Size Document Number Rev
RS485-SYSTEM I/F & DVO 1A

Date: Friday, October 20, 2006 Sheet 10 of 31


5 4 3 2 1
5 4 3 2 1

AC10
AE10

AC4

AC2

AD1
AC5
AC6
AC7
AD3
AC9
AE6

AA3
V12
V11
V14

V15

Y15

Y11

Y12
Y14
W6
M3

M2
M6
G3

G6
H1

H3

N3

R6
U2

U3
U6

R9
A1

P6

P9

Y1

Y3
Y9
F3

F1

T1

T3
L6
J2

J6

J3
U19E

VSSA1
VSSA2
VSSA3
VSSA4
VSSA5
VSSA6
VSSA7
VSSA8
VSSA9
VSSA10
VSSA11
VSSA12
VSSA13
VSSA14
VSSA15
VSSA16
VSSA17
VSSA18
VSSA19
VSSA20
VSSA21
VSSA22
VSSA23
VSSA24
VSSA25
VSSA26
VSSA27
VSSA28
VSSA29
VSSA30
VSSA31
VSSA32
VSSA33
VSSA34
VSSA35
VSSA36
VSSA37
VSSA38
VSSA39
VSSA40
VSSA41
VSSA42
VSSA43
VSSA44
VSSA45
VSSA46
VSSA47
VSSA48
RS485M A11 HT

D D

PAR 5 OF 5
GROUND

VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
A25
F11
D23
E9
G11
Y23
P11
R24
AE18
M15
J22
G23
J12
L12
L14
L20
L23
M11
M20
M23
M25
N12
N14
B7
L24
P13
P20
P15
R12
R14
R20
W23
Y25
AD25
U20
H25
W24
Y22
AC23
D25
G24
AC14
H12
AC22
R23
C4
AE22
T23
T25
AE14
R17
H23
M17
A23
AC15
F17
D4
AC16
M13
VLDT_RUN
C
80 ohm(4A) C

C127 C141 C147 C131 C132 C152 C130 80 ohm(4A)


VDDA12 +1.2V
10U/10V_8 10U/10V_8 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 U19D L44
VDD_HT1 PART 4 OF 5
AE24 D1
VDDA12_1 FBJ3216HS800
AD24 G7
VDD_HT2 VDDA12_2 C181 C173 C159 C177 C470 C474 C462 C464
AD22 E2
VDD_HT3 VDDA12_3
AB17 C1
D30 D29 D28 VDD_HT4 VDDA12_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 10U/10V_8 10U/10V_8 100U/6.3V_3528 100U/6.3V_3528
AE23 E3
VDD_HT5 VDDA12_5
+3V 2 1 2 1 2 1 Y17 D2
VDD_HT6 VDDA12_6
W17 M9
SW1010C SW1010C SW1010C VDD_HT7 VDDA12_7
AC18 F4

POWER
+1.8V VDD_HT8 VDDA12_8 VDDC_NB +1.2V
AD21 B1
VDD18 VDD_HT9 VDDA12_9 L5
L15 TI201209G121
20mil trace width AC19
VDD_HT10 VDDA12_10
D3
AC20 L9
VDD_HT11 VDDA12_11 TI321611U330
AB19 E6
C171 C198 C193 C206 VDD_HT12 VDDA12_12 L4
120 ohm(3A) AD23
VDD_HT13
AA17 L11
1U/6.3V_6 1U/6.3V_6 1U/6.3V_6 1U/6.3V_6 VDD_HT14 VDDC_1 TI321611U330
RS485: VDDA18=1.8V AE25
VDD_HT15 VDDC_2
L13
L15 C165 C157 C158 C187 C164 C169 C170 C99
VDDC_3 C105
J14 M12
+1.8V VDD18_1 VDDC_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 10U/10V/X5R_8 10U/10V/X5R_8
J15 R15
VDDA18 VDD18_2 VDDC_5
M14
L46 BLM18PG330SN1D VDDC_6
AE2 N11
VDDA18_1(VDDA12_13) VDDC_7
AB3 N13
C450 C449 C154 C149 C133 C144 C148 C451 VDDA18_2(VDDA12_14) VDDC_8
U7 N15
VDDA18_3(VDDA12_15) VDDC_9
W7 J11
100U/6.3V_3528 10U/10V_8 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 VDDA18_4(VDDA12_16) VDDC_10
AB4 H11
B VDDA18_5(VDDA12_17) VDDC_11 B
AC3 P12
+3V
AD2
VDDA18_6(VDDA12_18)
VDDA18_7(VDDA12_19)
VDDC_12
VDDC_13
P14 NB RS485 POWER STATES
AE1
VDDA18_8(VDDA12_20) VDDC_14
R11 Power Signal S0 S1 S3 S4/S5 G3
VDDR3
L12 TI201209G121
20mil trace width VDDC_15
R13
E11
VDDR3_1 VDDC_16
A19 VDDHT ON ON OFF OFF OFF
D11 B19
C179 VDDR3_2 VDDC_17
20mil trace width VDDC_18
U11 VDDR ON ON OFF OFF OFF
AC12 U14
4.7U/6.3V_6 VDD_DVO1(VDDR_1) VDDC_19
33 ohm (3000mA) AD12
VDD_DVO2(VDDR_2) VDDC_20
P17 VDD18 ON ON OFF OFF OFF
AE12 L17
VDD_DVO3(VDDR_3) VDDC_21
20mil trace width VDDC_22
J19 VDDC ON ON OFF OFF OFF
+1.8V E7 D20
VDDDVO VDDA12_13(VDDPLL_1) VDDC_23
F7
VDDA12_14(VDDPLL_2) VDDC_24
G20 VDDA18 ON ON OFF OFF OFF
L6 TI201209G121 F9 A9
VSSA49(VSSPLL_1) VDDC_25
G9
VSSA50(VSSPLL_2) VDDC_26
B9 VDDA12 ON ON OFF OFF OFF
C124 C117 C112 C9
VDDC_27
VDDHT_PKG D22
VDDHT_PKG VDDC_28
D9 AVDD ON ON OFF OFF OFF
1U/10V_4 1U/10V_4 1U/10V_4 VDDA12_PKG1 M1 A7
VDDA12_PKG1 VDDC_29
VDDA12_PKG2 AC11
VDDA12_PKG2 VDDC_30
A4 AVDDDI ON ON OFF OFF OFF
U12
VDDC_31
VDDC_32
U15 PLLVDD ON ON OFF OFF OFF
VDDA12 HTPVDD ON ON OFF OFF OFF
VDDPLL
RS485M A11 HT
R55 0_6 VDDA12_PKG1 VDDR3 ON ON OFF OFF OFF
C176 LPVDD ON ON OFF OFF OFF
C174 C460
4.7U/6.3V_6 1U/10V_4 LVDDR18D ON ON OFF OFF OFF
10U/10V/X5R_8
A LVDDR18A ON ON OFF OFF OFF A

PROJECT : ZR3
Quanta Computer Inc.
Size Document Number Rev
RS485-POWER 1A

Date: Wednesday, October 18, 2006 Sheet 11 of 31


5 4 3 2 1
5 4 3 2 1

+3V CLK_VDD +3V


L58 L50 BK1608HS600_6
CLK_VDDA
SBK160808T-301Y-S
22 ohm/1A
C490 C222 C223 C221 C204 C201 C200 C495 C202 C203 C473
22U/10V_8 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 22U/10V_8

D D

+3V
CLK_VDD CLK_VDDA
L61 SBK160808T-301Y-S CLK_VDD_USB U20

300ohm/200mA 46 42 CLK_VDDA 8/10 Change Footprint to 0402.


C498 C224 VDD_CPU VDDA R292 261/F_4
14 41
1U/10V_4 .1U_4 VDD_SRC1 GNDA
23
VDD_SRC2 CPUCLK_EXT_R R298 47/F_6
26 48 CPUCLK (5)
VDD_SRC3 CPUCLK8T0 CPUCLK#_EXT_R R299 47/F_6
36 47 CPUCLK# (5)
+3V VDD_SRC4 CPUCLK8C0
5 44
VDD_48 CPUCLK8T1
33 43
L60 SBK160808T-301Y-S CLK_VDD_REF VDD_ATIG CPUCLK8C1
2
VDD_REF NBSRC_CLKP_R R307 0_4
52 35 NBSRC_CLKP (10)
VDDHTT ATIGCLKT0 NBSRC_CLKN_R R308 0_4
300ohm/200mA ATIGCLKC0
34 NBSRC_CLKN (10) NB
C497 C500 45 31
1U/10V_4 .1U_4 GND_CPU ATIGCLKT1
15 30
GND_SRC1 ATIGCLKC1
22
GND_SRC2
27
GND_SRC3
37
GND_SRC4
8
C494 33P_4 GND_48 SBLINK_CLKP_R R305 0_4
32 39 SBLINK_CLKP (10)
GND_ATIG SRCCLKT0 SBLINK_CLKN_R R306 0_4
1
GND_REF SRCCLKC0
38 SBLINK_CLKN (10) NB

1
C CLK_VDD 50 C
Y3 R343 GNDHTT
14.31818MHZ *1M_4 CLK_XIN 3
R352 XIN
2
C487 33P_4 CLK_XOUT 4 24 SBSRC_CLKP_R R355 0_4
XOUT SRCCLKT2 SBSRCCLK (13)
10K_4 25 SBSRC_CLKN_R R356 0_4 SB
SRCCLKC2 SBSRCCLK# (13)
20 GPP_CLK0P_R R353 0_4
Parallel Resonance Crystal SRCCLKT4
21 GPP_CLK0N_R R354 0_4
CLK_PCIE_MINI (20)
MINI
SRCCLKC4 CLK_PCIE_MINI# (20)
R360 *0_4 11 18
(14) SYS_RST# RESET_IN# SRCCLKT5
53 19
NC SRCCLKC5
16
SRCCLKT6
17
SRCCLKC6
12
SRCCLKT7
13
SRCCLKC7
R350 0_4 9 49 CLKREQA# T36
(7,14,20) PCLK_SMB SMBCLK *CLKREQA#
R351 0_4 10 28 CLKREQB# T98
(7,14,20) PDAT_SMB SMBDAT *CLKREQB#
29 CLKREQC# T90
*CLKREQC#
40 7 CLK_48M_1_R R349 22/F_4
IREF/**Turbo 48MHz_1/**Sync SDCLK1 (18)
6 CLK_48M_2_R R359 22/F_4
48MHz_0/**Mode USBCLK (14)
Ioh = 5 * Iref
(2.32mA)

1
R304 55
10K/F_4 *FSB/REF1 C249 C501 CLK_VDD
Voh = 0.71V @ 60 ohm *FSA/REF0
56
54 *10P_4 *10P_4

2
*FSC/REF2
51
HTTCLK0

RTM870T-691 R293 R329 R294


B B
10K_4 10K_4 10K_4
Note: * internal 150K pull up ,
R301 *10K_4
** internal 150K pull down R324 *10K_4
R302 *10K_4
EXT CLK FREQUENCY SELECT TABLE(MHZ)
FS2 FS1 FS0 CPU HTT SRC ATIG USB1 SSC SB_OSCIN_R R300 22/F_4
SB_OSCIN (14)
NB_OSCIN_R R303 22/F_4
NB_OSC (10)

0 0 0 266.67 66.66 100 100 48.00 +/- 0.25% HTREFCLK_R R295 33/F_4
HTREFCLK (10)

0 0 1 133.33 66.66 100 100 48.00 +/- 0.25%

1
R291
0 1 0 200.00 66.66 100 100 48.00 +/- 0.25% C469 C190 C227
CLK_VDD 49.9/F 10P_4 *10P_4 *10P_4

2
0 1 1 166.67 66.66 100 100 48.00 +/- 0.25%
CLK_48M_1_R R88 *10K_4
1 0 0 333.33 66.66 100 100 48.00 +/- 0.25% CLK_48M_2_R R87 *10K_4

1 0 1 100.00 66.66 100 100 48.00 +/- 0.25% CLKREQA# R290 *10K_4 08/16 More overshoot and undershoot improvement
CLKREQB# R357 *10K_4
1 1 0 400.00 66.66 100 100 48.00 +/- 0.25% CLKREQC# R309 *10K_4

1 1 1 200.00 66.66 100 100 48.00 +/- 0.25%


Check AMD clock
A A

PROJECT : ZR3
Quanta Computer Inc.
Size Document Number Rev
EXTERNAL CLOCK GENERATOR 1A

Date: Wednesday, October 18, 2006 Sheet 12 of 31


5 4 3 2 1
5 4 3 2 1

+3VSUS

C506 .1U_4
U23 R362 8.2K_4

5
1 EC_PWRGD U22A
16mA
8/15 For EMI
(10,20,22) ALINK_RST# 4
2 AG10
SB460 SB 27x27mm U2 PCI_MINI R389 22_4 PCLK_MINI PCLK_MINI C515 33P_4
NC7SZ08P5X A_RST# PCICLK0 PCLK_MINI (16,20,26)
Part 1 of 4 T2 PCI_591 R138 22_4 PCLK_591 PCLK_591 C327 33P_4

PCI CLKS
PCLK_591 (16,25)

3
PCICLK1 PCI_PCM R388 22_4 PCLK_PCM PCLK_PCM C514 33P_4
(12) SBSRCCLK J24 PCIE_RCLKP PCICLK2 U1 PCLK_PCM (16,18)
J25 V2 PCI_SIO R136 22_4 PCLK_SIO PCLK_SIO C325 33P_4
(12) SBSRCCLK# PCIE_RCLKN PCICLK3 PCLK_SIO (16)
W3 PCI_CLK4 R135 22_4 PCICLK4 PCICLK4 C324 33P_4
PCICLK4 PCICLK4 (16)
R368 *0_4 C478 .01U_4 A_RX0P_C P29 U3 PCI_LAN R137 22_4 PCLK_LAN PCLK_LAN C326 33P_4
(9) A_RX0P PCIE_TX0P PCICLK5 PCLK_LAN (16,17)
C477 .01U_4 A_RX0N_C P28 V1 PCI_CLK6 R390 22_4 PCICLK6 PCICLK6 C516 33P_4
D (9) A_RX0N PCIE_TX0N PCICLK6 PCICLK6 (16) D
C476 .01U_4 A_RX1P_C M29 T1 SPDIF_RR R387 0_4
(9) A_RX1P PCIE_TX1P SPDIF_OUT/PCICLK7/GPIO41 SB_SPDIF_OUT (16)
C475 .01U_4 A_RX1N_C M28
(9) A_RX1N PCIE_TX1N
K29 AJ9 PCIRST#_C
T91 PCIE_TX2P PCIRST#
T93 K28 PCIE_TX2N
H29 AD[0..31]
T92 PCIE_TX3P AD[0..31] (16,17,18,20,26)
H28 W7 AD0
T94 PCIE_TX3N AD0/ROMA18
Y1 AD1
AD1/ROMA17 AD2 +3V

PCI EXPRESS INTERFACE


SB CALIBRATION RESISITOR VALUE (9) A_TX0P T25 PCIE_RX0P AD2/ROMA16 W8
T26 W5 AD3
(9) A_TX0N PCIE_RX0N AD3/ROMA15
SB600 SB460 T22 AA5 AD4 C317 .1U_4
(9) A_TX1P PCIE_RX1P AD4/ROMA14
T23 Y3 AD5 C312 1000p/50V_4
(9) A_TX1N PCIE_RX1N AD5/ROMA13
562 OHM 1% 150 OHM 1% M25 AA6 AD6 U5
R? T48 PCIE_RX2P AD6/ROMA12 AD7 NC7SZ08P5X_NL
T44 M26 PCIE_RX2N AD7/ROMA11 AC5

5
2.05K 1% 150 OHM 1% M22 AA7 AD8 EC_PWRGD 1
R? T49 PCIE_RX3P AD8/ROMA9 AD9
(5,14,25) EC_PWRGD
PCIRST#
T46 M23 PCIE_RX3N AD9/ROMA8 AC3 4 PCIRST# (17,18,20,25,26)
0 ohm 4.12K 1% AC7 AD10 PCIRST#_C 2
R? R311 150/F_6 PCIE_CALRP AD10/ROMA7 AD11
E29 AJ7

3
R312 150/F_6 PCIE_CALRN PCIE_CALRP AD11/ROMA6 AD12
PCIE_VDDR E28 PCIE_CALRN AD12/ROMA5 AD4
AB11 AD13 C306 R128 C322
+1.8V PCIE_PVDD R310 4.12K/F_6 PCIE_CALI AD13/ROMA4 AD14 82P_4
E27 PCIE_CALI AD14/ROMA3 AE6
L13 AC9 AD15 *82P_4 8.2K_4
PCIE_PVDD AD15/ROMA2 AD16
U29 PCIE_PVDD AD16/ROMD0 AA3
SBK160808T-301Y-S_6 AJ4 AD17 R130 *0_4
AD17/ROMD1
PCIE Power
C191 C210 C205 U28 AB1 AD18
PCIE_PVSS AD18/ROMD2 AD19
AD19/ROMD3 AH4
10U/10V_8 1U/10V_4 .1U_4 F27 AB2 AD20
PCIE_VDDR_1 AD20/ROMD4 AD21 +3V
F28 PCIE_VDDR_2 AD21/ROMD5 AJ3
F29 AB3 AD22
PCIE_VDDR_3 AD22/ROMD6 AD23 PCI_LOCK# R372 8.2K_4
G26 PCIE_VDDR_4 AD23/ROMD7 AH3
G27 AC1 AD24
PCIE_VDDR_5 AD24

PCI INTERFACE
C AD25 INTE# R133 8.2K_4 C
G28 PCIE_VDDR_6 AD25 AH2
G29 AC2 AD26
+1.8V PCIE_VDDR PCIE_VDDR_7 AD26 AD27 INTF# R393 8.2K_4 C509
J27 PCIE_VDDR_8 AD27 AH1
L11 J29 AD2 AD28 .1U_4
PCIE_VDDR_9 AD28 AD29 INTG# R147 8.2K_4
L25 PCIE_VDDR_10 AD29 AG2
TI201209G121_8 L26 AD1 AD30
C207 C194 C195 C212 C214 C220 C217 C226 C215 C219 PCIE_VDDR_11 AD30 AD31 INTH# R132 8.2K_4
L29 PCIE_VDDR_12 AD31 AG1
N29 PCIE_VDDR_13 CBE0#/ROMA10 AB9 CBE0# (17,18,20,26)
22U/10V_8 .1U_6 .1U_6 .1U_6 .1U_6 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 AF9
CBE1#/ROMA1 CBE1# (17,18,20,26)
CBE2#/ROMWE# AJ5 CBE2# (17,18,20,26)
CBE3# AG3 CBE3# (17,18,20,26)
AA2 FRAME# +3V
FRAME# FRAME# (17,18,20,26)
AH6 DEVSEL# RN31 8.2KX4_4
DEVSEL#/ROMA0 DEVSEL# (17,18,20,26)
AG5 IRDY# PERR# 2 1
IRDY# IRDY# (17,18,20,26)
ATi Recommend AA1 TRDY# FRAME# 4 3
TRDY#/ROMOE# TRDY# (17,18,20,26)
AF7 PAR TRDY# 6 5

CLG Vendor: NSK


Part Number: NXG 32.768KAE12FUD 16 PPM.

1
Y4
4
32K_X1

32K_X2
PAR/ROMA19
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
Y2
AG8
AC11
AJ8
AE2
AG9
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
PAR (17,18,20)
STOP# (17,18,20)
PERR# (17,18,20)
SERR# (17,18,20)
REQ0# (17)

REQ2# (20)
STOP#

REQ4#
DEVSEL#
REQ0#
8

RN33
2
4
6
7

8.2KX4_4
1
3
5
C507
.1U_4

2 3 AH8 REQ3# REQ2# 8 7


REQ3#/GPIO70 REQ3# (18)
AH5 REQ4#
32.768KHZ REQ4#/GPIO71 GNT0# RN30 *8.2KX4_4
AD11

B
RTC R396
20M_4
R144

C319
18P_4
20M_4

C320
18P_4
GNT0#
GNT1#
GNT2#
GNT3#/GPIO72
GNT4#/GPIO73
CLKRUN#
LOCK#
AF2
AH7
AB12
AG4
AG7
AF6
GNT1#
GNT2#
GNT3#
GNT4#
CLKRUN#
PCI_LOCK#
GNT0# (17)

GNT2# (20,26)
GNT3# (18)

CLKRUN# (17,20,25)
GNT0#
GNT2#
GNT3#
GNT1#
2
4
6
8

RN34
1
3
5
7

8.2KX4_4 B
ATI recommand have internal pull-up REQ3# 2 1
3VRTC D4 RB751 VCCRTC AD3 INTE# SERR# 4 3
+1.2V INTE#/GPIO33 INTE# (17,20)
+3VPCU 2 1 AF1 INTF# REQ1# 6 5
INTF#/GPIO34 INTF# (20)
For SB600, connect to AF4 INTG# IRDY# 8 7
INTG#/GPIO35 INTG# (18)
32K_X1 D2 AF3 INTH#
CPU_PG/LDT_PG X1 INTH#/GPIO36 INTH# (18)
R105 D3 RB751
RTC_N02 2 1
For SB460, connect to R75 GNT4# R131 *8.2K_4

XTAL
SSMUXSEL/GPIO0 *10K_4 Add for debug.
2

1K/F_4 32K_X2 C1 PAR R361 8.2K_4


C261 C260 JP1 X2 LAD0/FWH0
LAD0 AG24 LAD0/FWH0 (25)
9/1 Battery should be connected *Clear PAD (5,14) CPU_PWRGD R74 *0_4 AC26 AG25 LAD1/FWH1 LAD3/FWH3 R297 100K/F_4 C196
CPU_PG/LDT_PG LAD1 LAD1/FWH1 (25)
1U/10V_4 .1U_4 H_INTR W26 AH24 LAD2/FWH2 .1U_4
directly - not through a UL resistor, T40 LAD2/FWH2 (25)
1

H_NMI INTR/LINT0 LAD2 LAD3/FWH3 LAD2/FWH2 R323 100K/F_4


W24 AH25

LPC
and not through a diode. T45 NMI/LINT1 LAD3 LAD3/FWH3 (25)
H_INIT# W25 AF24 LFRAME#/FWH4
T41 INIT# LFRAME# LFRAME#/FWH4 (16,25)
R109 H_SMI# AA24 AJ24 LDRQ#0 LAD1/FWH1 R77 100K/F_4
T42 SMI# LDRQ0#
AA23 AH26 LDRQ#1
(5,10,14) LDT_STOP# SLP#/LDT_STP# LDRQ1#/GNT5#/GPIO68
100/F_6 H_IGNNE# AA22 W22 BMREQ# LAD0/FWH0 R81 100K/F_4
T50 IGNNE#/SIC BMREQ#/REQ5#/GPIO65 BMREQ# (10)
H_A20M# AA26 AF23 SERIRQ
T39 A20M#/SID CPU SERIRQ SERIRQ (18,20,25)
H_FERR# Y27
T37 FERR#
AA25 D3 SERIRQ R73 10K_4
(10) ALLOW_LDTSTOP STPCLK#/ALLOW_LDTSTP RTCCLK RTC_CLK (16)
Q7 STP_CPU# AH9 F5
T110 CPU_STP#/DPSLP_3V# RTC RTC_IRQ#/GPIO69 AUTO_ON# (16)
MMBT3904 R96 R95 (14) H_DPSLP# H_DPSLP# R370 *0_4 B24
3VRTC 1 DPSLP_OD#/GPIO37
3 RTC_N01 RTC_N04
+5VPCU T38
DPRSLPVR W23 DPRSLPVR VBAT E1 VCCRTC BMREQ# R67 10K_4
(5) LDT_RST# AC25 LDT_RST#/DPRSTP#/PROCHOT# RTC_GND D1
1.5K/F_6 1.5K/F_6 FOR SB460, THIS BALL C298 RN29 10KX4_4
R94 C197 CLKRUN# 2 1
IS LDT_RST# ONLY
SB460 1U/10V_4 18P_4 LDRQ#1 4 3
4.7K/F_6 +3V LDRQ#0 6 5
2

RTC_N03 8 7
A A

R107 R371
1

CN15 10K_4
15K/F_6
C279 H_DPSLP#
.1U_4
PROJECT : ZR3
BATCON R369
*10K_4 Quanta Computer Inc.
2

Size Document Number Rev


Custom SB460M PCIE/PCI/CPU/LPC I/F 1A

Date: Wednesday, October 18, 2006 Sheet 13 of 31


5 4 3 2 1
5 4 3 2 1

+3V_S5 SB_OSCIN R86 *22_4 C233 *10P_4


PU/PD
U22D
SUSB# R115 4.7K/F_4
SUSC# R124 4.7K/F_4 SB460 SB 27x27mm R89 *22_4 C241 *10P_4
DNBSWON# R382 4.7K/F_4
C520 (18,20) PME# PME# A3 Part 4 of 4 A17 SB_48M_X1
PCI_PME#/GEVENT4# USBCLK USBCLK (12)
PME# R377 4.7K/F_4 RI# B2
T114 RI#/EXTEVNT0#
.1U_4 SUSB# F7 A14 USB_RCOMP R90 11.8K/F_4
(25) SUSB# SLP_S3# USB_RCOMP

ACPI / WAKE UP
SUS_STAT# R374 10K_4 SUSC# A5
(25) SUSC# SLP_S5#
RI# R378 10K_4 DNBSWON# E3 A11
D
(25) DNBSWON# PWR_BTN# USB_ATEST1 T106 D
SWI# R104 10K_4 B5 A10
(5,13,25) EC_PWRGD PWR_GOOD USB_ATEST0 T109
SUS_STAT# B3
T113 SUS_STAT#
SYS_RST# R153 10K_4 R99 10K_4 F9 H12
TEST2 USB_HSDP9+ T53
R100 10K_4 E9 G12 T52

EVENTS
PCIE_WAKE# R110 4.7K/F_4 R98 10K_4 TEST1 USB_HSDM9-
G9
GATEA20 TEST0
(25) GATEA20 AF26 E12 T51
GA20IN USB_HSDP8+

USB INTERFACE
EMAIL_LED# R379 10K_4 RCIN# AG26 D12
(25) RCIN# KBRST# USB_HSDM8- T54
MAX6648_AL# R398 10K_4 SWI# D7
(25) SWI# LPC_PME#/GEVENT3#
EXTEVNT1# C25 E14 USBP7+ (20)
T95 LPC_SMI#/EXTEVNT1# USB_HSDP7+
AZ_RST# R121 *10K_4 (5) CPU_PROCHOT# CPU_PROCHOT# D9 D14 USBP7- (20)
AC_RST# R111 10K_4 SYS_RST# S3_STATE/GEVENT5# USB_HSDM7-
(12) SYS_RST# F4
PCIE_WAKE# SYS_RESET#/GPM7#
(20) PCIE_WAKE# E7 G14 USBP6+ (20)
CPU_PROCHOT# R363 4.7K/F_4 EMAIL_LED# WAKE#/GEVENT8# USB_HSDP6+
(26) EMAIL_LED# C2 H14 USBP6- (20)
SB_THERMTRIP# BLINK/GPM6# USB_HSDM6-
T119 G7
SMBALERT#/THRMTRIP#/GEVENT2#
D16
+3V USB_HSDP5+
Delay 20ms after S5 powerOK USB_HSDM5-
E16 USB0: D/B IO
RSMRST# E2 USB1: D/B IO
(25) RSMRST# RSMRST#
RCIN# R72 4.7K/F_4 SB_OSCIN
OSC / RST USB_HSDP4+
D18 USBP4+ (20) USB2: D/B IO
(12) SB_OSCIN B23 E18 USBP4- (20)
GATEA20 R66 *10K_4 14M_OSC USB_HSDM4- USB4: M/B IO
GPIO10 C28 G16 USB6: BLUETOOTH
EXTEVNT1# R338 10K_4 C466 GPIO1 SATA_IS0#/GPIO10 USB_HSDP3+
A26 H16 USB7: MINI CARD
SB_THERMTRIP# R365 10K_4 GPIO6 ROM_CS#/GPIO1 USB_HSDM3-
B29
.1U_4 GPIO7 GHI#/SATA_IS1#/GPIO6
A23 G18 USBP2+ (20)
PCLK_SMB R318 2.2K_4 RST_HDD# WD_PWRGD/GPIO7 USB_HSDP2+
(22) RST_HDD# B27 H18 USBP2- (20)
PDAT_SMB R316 2.2K_4 GPIO5 SMARTVOLT/SATA_IS2#/GPIO4 USB_HSDM2-
D23
PCSPK SHUTDOWN#/GPIO5
(23) PCSPK B26 D19 USBP1+ (20)
RST_HDD# R78 10K_4 PCLK_SMB SPKR/GPIO2 USB_HSDP1+
(7,12,20) PCLK_SMB C27 E19 USBP1- (20)
SCL0/GPOC0# USB_HSDM1-

GPIO
SB_LLB# R375 *10K_4 PDAT_SMB B28
C
(7,12,20) PDAT_SMB
C3
SDA0/GPOC1#
SCL1/GPOC2# USB_HSDP0+
G19 USBP0+ (20)
USB power C
GPIO5 R358 4.7K/F_4 F3 H19 USBP0- (20)
BOARD_ID1 SDA1/GPOC3# USB_HSDM0- AVDD_USB L63 +3V_S5
D26
GPIO1 R342 10K_4 BOARD_ID0 DDC1_SCL/GPIO9 TI201209G121
C26
GPIO6 R317 10K_4 R336 0_4 GPIO0 DDC1_SDA/GPIO8
(5,13) CPU_PWRGD A27 B9
GPIO7 R348 10K_4 SB_LLB# SSMUXSEL/SATA_IS3#/GPIO0 AVDDTX_0
T112 A4 B11
GPIO13 R367 10K_4 LLB#/GPIO66 AVDDTX_1 C255 C245 C262 C274 C282 C505 C502
B13
GPIO31 R85 10K_4 AVDDTX_2
B16
USB_OCP9# AVDDTX_3 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 1U/10V_6 22U/10V_8
C6 B18
GPIO0 R331 *10K_4 USB_OCP8# USB_OC9#/SLP_S2/GPM9# AVDDTX_4
C5 A9
GPIO10 R319 *10K_4 USB_OCP7# USB_OC8#/AZ_DOCK_RST#/GPM8# AVDDRX_0
C4 B10
USB_OCP6# USB_OC7#/GEVENT7# AVDDRX_1
B4 B12
AZ_RST# USB_OC6#/GEVENT6# AVDDRX_2
B6 B14
GPIO3 R84 10K_4 USB_OCP4# USB_OC5#/DDR3_RST#/GPM5# AVDDRX_3 +3.3V_AVDDC +3V_S5
A6 B17

USB OC
GPIO14 R134 10K_4 USB_OCP3# USB_OC4#/GPM4# AVDDRX_4 L18
C8
USB_OCP2# USB_OC3#/GPM3#
C7 A12
PCSPK R82 10K_4 SCI# USB_OC2#/GPM2# AVDDC SBK160808T-301Y-S
(25) SCI# B8
USB_OC1#/GPM1#

2
CPU_PROCHOT# R97 *10K_4 (25) KBSMI# KBSMI# A8 A13 C277 C259 C263
USB_OC0#/GPM0# AVSSC
A16 1U/10V_6 .1U_4 2.2U/10V_8

1
AZ_BITCLK AVSS_USB_1
N2 C9

AZALIA
AZ_SDOUT AZ_BITCLK AVSS_USB_2
M2 C10
AZ_SDOUT AVSS_USB_3
T61 K2 C11
AC_SDIN2 R116 10K_4 AZ_SYNC AZ_SDIN3/GPIO46 AVSS_USB_4
L3 C12
AZ_SDIN1 R165 10K_4 AZ_SYNC AVSS_USB_5

USB PWR
T60 K3 C13
CD_SDIN0 R397 10K_4 AZ_RST# AVSS_USB_6
C14
AC_BITCLK_R R383 10K_4 AC_BITCLK_R AVSS_USB_7
T116 L1 C16
AZ_RST# R120 10K_4 AC_BITCLK/GPIO38 AVSS_USB_8
(16) AC_SDOUT L2 C17
AZ_SYNC R386 10K_4 CD_SDIN0 AC_SDOUT/GPIO39 AVSS_USB_9
(23) CD_SDIN0 L4 C18
AZ_SDOUT R149 10K_4 AZ_SDIN1 ACZ_SDIN0/GPIO42 AVSS_USB_10
(23) AZ_SDIN1 J2 C19
ACZ_SDIN1/GPIO43 AVSS_USB_11

AC97
AZ_BITCLK R126 10K_4 AC_SDIN2 J4 C20
B
T57 ACZ_SDIN2/GPIO44 AVSS_USB_12 B
AC_SYNC_R M3 D11
T115 AC_SYNC/GPIO40 AVSS_USB_13
AC_RST# L5 D21
T56 AC_RST#/GPIO45 AVSS_USB_14
E11
AVSS_USB_15
AVSS_USB_16 E21
F11
GPIO3 AVSS_USB_17
T43 E23 NC1 AVSS_USB_18 F12
GPIO31 AC21 F14
GPIO13 NC2 AVSS_USB_19
USB power use S3 power,But H_DPSLP#
AD7
NC3 AVSS_USB_20
F16
(13) H_DPSLP# AE7 F18
Over current signal datasheet is T66
GPIO14 AA4
NC4 AVSS_USB_21
F19
MAX6648_AL# NC5 AVSS_USB_22 +3V
S5 only,But ATI FAE say use (5) MAX6648_AL#
R117 0_4
T4 NC6 AVSS_USB_23 F21
(5,10,13) LDT_STOP# D4 G11
S3 is ok NC7 AVSS_USB_24 R315 *10K_4 BOARD_ID0 R314 10K_4
T47 AB19 G21
NC8 AVSS_USB_25
H11
AVSS_USB_26 R296 *10K_4 BOARD_ID1 R320 10K_4
H21
+3V_S5 AVSS_USB_27
AVSS_USB_28 J11
J12
AVSS_USB_29
AVSS_USB_30 J14
KBSMI# R366 4.7K/F_4 J16
R125 39_4 AVSS_USB_31
(23) CD_BITCLKA_MDC J18
AVSS_USB_32
AVSS_USB_33 J19
RP4 10KX2_4 Board ID ID1 ID0
USB_OCP2# 1 2 C308 *22P_4
SCI# 3 4
R127 39_4 AZ_BITCLK SB460 00 PATA HDD
(23) AZ_BITCLKA
RP5 *10KX2_4
USB_OCP9# 01 SATA HDD
1 2
USB_OCP8# 3 4 C309 *22P_4
10
RN32 10KX4_4
A USB_OCP3# 2 1 11 A
USB_OCP4# 4 3
USB_OCP6# 6 5
USB_OCP7# 8 7 R140 39_4 R384 39_4 R122 39_4
(23) CD_SDOUTA_MDC (23) CD_SYNC_MDC (23) CD_RESET#_MDC

C329 33P_4 C512 *22P_4 C295 *22P_4


PROJECT : ZR3
R139 39_4 AZ_SDOUT R385 39_4 AZ_SYNC R123 39_4 AZ_RST#
(23) AZ_SDOUTA (23) AZ_SYNCA (23,24) AZ_RESET#
Quanta Computer Inc.
CLG 09/07 Stuff C329,C328 to 33P For EMI Situation.
5
C328 33P_4

4
C513 *22P_4

3
C301 *22P_4

2
Size
Custom

Date:
Document Number
SB460M ACPI/GPIO/USB/AC97
Wednesday, October 18, 2006
1
Sheet 14 of 31
Rev
1A
5 4 3 2 1

+3V L51 VDDQ_3V U22C


U22B

C238 *.01U_4 SATA_TX0+_C AH21


FBJ3216HS800
C472 C265 C208 C213 C281 C229
A25
A28
VDDQ_1 SB4600 SB 27x27mmVSS_1 A1
A20
(22) SATA_TXP0
C239 *.01U_4 SATA_TX0-_C AJ21 SATA_TX0+ SB460 SB 27x27mm AB29 C29
VDDQ_2
Part 3 of 4
VSS_2
A21
(22) SATA_TXN0 SATA_TX0- IDE_IORDY PHDRDY (22) VDDQ_3 VSS_3
Part 2 of 4 AA28 80ohm/4A 100U/6.3V_3528 1U/10V_6 1U/10V_6 1U/10V_6 1U/10V_6 1U/10V_6 D24 A29
IDE_IRQ IRQ14 (22) VDDQ_4 VSS_4
D (22) SATA_RXN0 AH20 SATA_RX0- IDE_A0 AA29 PDA0 (22) L9 VDDQ_5 VSS_5 B1 D
(22) SATA_RXP0 AJ20 SATA_RX0+ IDE_A1 AB27 PDA1 (22) L21 VDDQ_6 VSS_6 B7
IDE_A2 Y28 PDA2 (22) M5 VDDQ_7 VSS_7 B25
AH18 AB28 C216 C240 C211 C299 C283 C296 P3 C21
T96 SATA_TX1+ IDE_DACK# PDDACK# (16,22) VDDQ_8 VSS_8
T100 AJ18 SATA_TX1- IDE_DRQ AC27 PDDREQ (22) P9 VDDQ_9 VSS_9 C22
C489 *27P_4@SATA SATA_X1 AC29 1U/10V_6 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 T5 C24
IDE_IOR# PDIOR# (22) VDDQ_10 VSS_10
T99 AH17 AC28 PDIOW# (22) V9 D6
1

Y2 SATA_RX1- IDE_IOW# VDDQ_11 VSS_11


T97 AJ17 SATA_RX1+ IDE_CS1# W28 PDCS1# (22) W2 VDDQ_12 VSS_12 E24
R332 R347 W27 W6 F2
IDE_CS3# PDCS3# (22) VDDQ_13 VSS_13
*10M_4@SATA 0_4@PATA AH13 C287 C232 C218 C209 C278 C286 W21 F23

SERIAL ATA

ATA 66/100
T105 SATA_TX2+ VDDQ_14 VSS_14
*25MHZ@SATA AH14 AD28 PDD0 W29 G1
2

T103 SATA_TX2- IDE_D0/GPIO15 VDDQ_15 VSS_15


SATA_X2 AD26 PDD1 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 AA12 J1
C482 *27P_4@SATA IDE_D1/GPIO16 PDD2 VDDQ_16 VSS_16
T101 AH16 SATA_RX2- IDE_D2/GPIO17 AE29 AA16 VDDQ_17 VSS_17 J8
AJ16 AF27 PDD3 AA19 L6
T102 SATA_RX2+ IDE_D3/GPIO18 VDDQ_18 VSS_18
AG29 PDD4 AC4 L8
IDE_D4/GPIO19 PDD5 +1.8V L21 VDD_1.8V VDDQ_19 VSS_19
D3A:R347 When PATA mount CS00002JB38 T111 AJ11 SATA_TX3+ IDE_D5/GPIO20 AH28 AC23 VDDQ_20 VSS_20 M9
AH11 AJ28 PDD6 AD27 M12
SATA And Osc mount CS04992FB31 T107 SATA_TX3- IDE_D6/GPIO21 VDDQ_21 VSS_21
AJ27 PDD7 AE1 M15
IDE_D7/GPIO22 FBJ3216HS800 VDDQ_22 VSS_22
AH12 AH27 PDD8 C300 C305 C257 C268 C267 AE9 M18
T108 SATA_RX3- IDE_D8/GPIO23 VDDQ_23 VSS_23
AJ13 AG27 PDD9 AE23 N13
T104 SATA_RX3+ IDE_D9/GPIO24 PDD10 VDDQ_24 VSS_24
AG28 *100U/6.3V_3528 22U/10V_8 1U/10V_6 1U/10V_6 1U/10V_6 AH29 N17
R364 *1K/F_4@SATA SATA_CAL IDE_D10/GPIO25 PDD11 VDDQ_25 VSS_25
AF12 SATA_CAL IDE_D11/GPIO26 AF28 AJ2 VDDQ_26 VSS_26 P1
AF29 PDD12 80ohm/4A AJ6 P6
SATA_X1 IDE_D12/GPIO27 PDD13 VDDQ_27 VSS_27
AD16 SATA_X1 IDE_D13/GPIO28 AE28 AJ26 VDDQ_28 VSS_28 P21
AD25 PDD14 C258 C250 C235 C252 C236 R12
SATA_X2 IDE_D14/GPIO29 PDD15 VSS_29
AD18 SATA_X2 IDE_D15/GPIO30 AD29 M13 VDD_1 VSS_30 R15
D31 1U/10V_6 .1U_4 .1U_4 .1U_4 .1U_4 M17 VDD_2 VSS_31 R18
(22,26) HDDLED# 2 1 *BAS316@SATA SATA_ACT# AC12 N12 T6
SATA_ACT#/GPIO67 VDD_3 VSS_32
N15 VDD_4 VSS_33 T9
C AD14 N18 U13 C
PLLVDD_ATA PLLVDD_SATA_1 VDD_5 VSS_34
AJ10 J3 C247 C246 C251 C243 R13 U17
PLLVDD_SATA_2 SPI_DI/GPIO12 VDD_6 VSS_35
J6 R17 V3

SPI ROM
SPI_DO/GPIO11 .1U_4 .1U_4 .1U_4 .1U_4 VDD_7 VSS_36
AC16 G3 U12 V8
SATA Power XTLVDD_ATA
AE14
XTLVDD_SATA SPI_CLK/GPIO47
SPI_HOLD#/GPIO31 G2
G6
U15
U18
VDD_8
VDD_9
VSS_37
VSS_38 V12
V15
+1.8V_ATA AVDD_SATA_1 SPI_CS#/GPIO32 VDD_10 VSS_39
AE16 AVDD_SATA_2 V13 VDD_11 VSS_40 V18
+1.8V L19 XTLVDD_ATA AE18 C23 +3V_S5 L64 SB_S5_3V V17 V21
*SBK160808T-301Y-S@SATA AVDD_SATA_3 LAN_RST#/GPIO13 VDD_12 VSS_41
AE19 AVDD_SATA_4 ROM_RST#/GPIO14 G5 VSS_42 W1
AF19 AVDD_SATA_5 A2 S5_3.3V_1 VSS_43 W9
AF21 M4 SBK160808T-301Y-S C508 C511 C510 C303 C302 C294 A7 Y29

POWER
C264 C248 AVDD_SATA_6 FANOUT0/GPIO3 S5_3.3V_2 VSS_44
AG22 AVDD_SATA_7 FANOUT1/GPIO48 T3 F1 S5_3.3V_3 VSS_45 AA11
AG23 V4 10U/10V_8 1U/10V_6 1U/10V_6 .1U_4 .1U_4 .1U_4 J5 AA14
*22U/10V_8 *1U/10V_4 AVDD_SATA_8 FANOUT2/GPIO49 S5_3.3V_4 VSS_46
AH22 AVDD_SATA_9 J7 S5_3.3V_5 VSS_47 AA18

SERIAL ATA POWER


AH23 AVDD_SATA_10 FANIN0/GPIO50 N3 K1 S5_3.3V_6 VSS_48 AC6
AJ12 P2 +1.8V_S5 L22 SB_S5_1.8V AC24
AVDD_SATA_11 FANIN1/GPIO51 VSS_49
AJ14 AVDD_SATA_12 FANIN2/GPIO52 W4 G4 S5_1.2V_1 VSS_50 AD9
AJ19 AVDD_SATA_13 SBK160808T-301Y-S H1 S5_1.2V_2 VSS_51 AD23
AJ22 P5 C311 C293 C297 C290 H2 AE3
AVDD_SATA_14 TEMP_COMM S5_1.2V_3 VSS_52

HW MONITOR
+1.8V L20 PLLVDD_ATA AJ23 AVDD_SATA_15 TEMPIN0/GPIO61 P7 300ohm(200mA) H3 S5_1.2V_4 VSS_53 AE27
*SBK160808T-301Y-S@SATA P8 10U/10V_8 .1U_4 .1U_4 .1U_4 AG6
TEMPIN1/GPIO62 VSS_54
AB14 AVSS_SATA_1 TEMPIN2/GPIO63 T8 A18 USB_PHY_1.2V_1 VSS_55 AJ1
AB16 AVSS_SATA_2 TEMPIN3/TALERT#/GPIO64 T7 A19 USB_PHY_1.2V_2 VSS_56 AJ25
C273 C254 AB18 +1.8V_S5 L59 +1.8VUSB_PHY B19 AJ29
AVSS_SATA_3 USB_PHY_1.2V_3 VSS_57
AC14 AVSS_SATA_4 VIN0/GPIO53 V5 B20 USB_PHY_1.2V_4
*22U/10V_8 *1U/10V_4 AC18 L7 SBK160808T-301Y-S B21
AVSS_SATA_5 VIN1/GPIO54 C499 C496 C242 C234 C230 C182 .1U_4 USB_PHY_1.2V_5
AC19 AVSS_SATA_6 VIN2/GPIO55 M8 PCIE_VSS_1 D27
AD12 AVSS_SATA_7 VIN3/GPIO56 V6 PCIE_VSS_2 D28
AD19 M6 22U/10V_8 1U/10V_6 .1U_4 .1U_4 .1U_4 +1.8V R60 *0_4 AA27 D29
B AVSS_SATA_8 VIN4/GPIO57 R61 0_4 CPU_PWR PCIE_VSS_3 B
AD21 AVSS_SATA_9 VIN5/GPIO58 P4 +1.2V PCIE_VSS_4 F26
AE12 AVSS_SATA_10 VIN6/GPIO59 M7 CPU_PWR=1.8V WHEN SB600 AE11 V5_VREF PCIE_VSS_5 G23
+1.8V L16 +1.8V_ATA AE21 V7 G24
AVSS_SATA_11 VIN7/GPIO60 CPU_PWR=1.2V WHEN SB460 PCIE_VSS_6
*TI201209G121_8@SATA AF11 +5V R112 1K/F_4 V5_VREF A24 G25
AVSS_SATA_12 AVDDCK_3.3V PCIE_VSS_7
AF14 AVSS_SATA_13 PCIE_VSS_8 H27
AF16 C285 C266 A22 J23
C225 C256 C228 C244 C231 C237 C253 AVSS_SATA_14 AVDDCK_1.2V PCIE_VSS_9
AF18 AVSS_SATA_15 AVDD N1 +3V 2 1
PCIE_VSS_10 J26
AG11 1U/10V_6 .1U_4 B22 J28
*22U/10V_8 *1U/10V_6 *1U/10V_6 *.1U_4 *.1U_4 *.1U_4 *.1U_4 AVSS_SATA_16 D5 SW1010C AVSSCK PCIE_VSS_11
AG12 AVSS_SATA_17 AVSS M1 PCIE_VSS_12 K27
AG13 AVSS_SATA_18 V29 PCIE_VSS_42 PCIE_VSS_13 L22
AG14 V28 L23
AVSS_SATA_19 PCIE_VSS_41 PCIE_VSS_14
AG16 AVSS_SATA_20 V27 PCIE_VSS_40 PCIE_VSS_15 L24
AG17 +1.8V L57 AVDD_CK_1.8V V26 L27
AVSS_SATA_21 PCIE_VSS_39 PCIE_VSS_16
AG18 V25 L28
AVSS_SATA_22 SBK160808T-301Y-S PCIE_VSS_38 PCIE_VSS_17
AG19 V24 M21
AVSS_SATA_23 PCIE_VSS_37 PCIE_VSS_18

2
R101 0_6@PATA XTLVDD_ATA AG20 C491 C493 C492 V23 M24
AVSS_SATA_24 PCIE_VSS_36 PCIE_VSS_19
AG21 V22 M27
R102 0_6@PATA AVSS_SATA_25 2.2U/10V_8 1U/10V_4 .1U_4 PCIE_VSS_35 PCIE_VSS_20
PLLVDD_ATA AH10 300ohm(200mA) U27 N27

1
AVSS_SATA_26 PCIE_VSS_34 PCIE_VSS_21
AH19 T29 N28
R83 0_8@PATA AVSS_SATA_27 PCIE_VSS_33 PCIE_VSS_22
+1.8V_ATA T28 PCIE_VSS_32 PCIE_VSS_23 P22
T27 PCIE_VSS_31 PCIE_VSS_24 P23
T24 P24
SB460 PCIE_VSS_30 PCIE_VSS_25
T21 P25
PDD[0..15] PCIE_VSS_29 PCIE_VSS_26
PDD[0..15] (22) P27 P26
PCIE_VSS_28 PCIE_VSS_27

SB460

A A

CLG PROJECT : ZR3


Quanta Computer Inc.
Size Document Number Rev
Custom SB460M HDD/POWER/DECOUPLING 1A

Date: Wednesday, October 18, 2006 Sheet 15 of 31


5 4 3 2 1
5 4 3 2 1

+3V +3V_S5 +3V +3V +3V +3V +3V_S5 +3V +3V +3V +3V +3V

R403 R141 R148 R401 R409 R163 R150 R405 R406 R160 R162 R80
*10K_4 10K_4 *10K_4 10K_4 10K_4 *10K_4 10K_4 *10K_4 *10K_4 10K_4 *10K_4 *10K_4

(14) AC_SDOUT (13) AUTO_ON#

D (13) RTC_CLK (13) SB_SPDIF_OUT D

(13) PCICLK4 (13,18) PCLK_PCM

(13) PCICLK6 (13) PCLK_SIO

(13,20,26) PCLK_MINI (13,17) PCLK_LAN

(13,25) PCLK_591 (13,25) LFRAME#/FWH4

R404 R142 R158 R400 R408 R164 R151 R399 R407 R159 R161 R79
10K_4 *10K_4 10K_4 *10K_4 *10K_4 10K_4 *10K_4 10K_4 10K_4 *10K_4 10K_4 10K_4

PCLK_MINI PCLK_591
AUTO_ON# SB_SPDIF_OUTPCLK_PCM PCLK_SIO PCLK_LAN LFRAME#
AC_SDOUT RTC_CLK PCI_CLK4 PCI_CLK6 PCI_CLK0 PCI_CLK1

C
REQUIRED PULL USE INTERNAL USE INT. CPU IF=K8
ROM TYPE: ACPWRON SPDIF_OUT PCI_CLK2 PCI_CLK3 PCI_CLK5 LFRAME#
C
H, H = PCI ROM
STRAPS HIGH DEBUG
STRAPS
RTC PLL48
H, L = LPC TYPE I ROM DEFAULT
PULL MANUAL SIO 24MHz XTAL MODE USB PHY PCIE_CM_SET
HIGH
ENABLE
HIGH PWR ON POWERDOWN THERMTRIP#
DEFAULT DEFAULT NOT DISABLE
L, H = LPC TYPE II ROM SUPPORTED
DEFAULT DEFAULT
PULL IGNORE EXTERNAL USE EXT. CPU IF=P4 L, L = FWH ROM
LOW DEBUG RTC 48MHZ NOTE:FOR SB460,PCICLK[8:7]
ARE CONNECTED TO SUBSTRATE PULL AUTO SIO 48MHz 48MHZ OSC USB PHY PCIE_CM_SET DISABLE
STRAPS HLOW
BALLS PCICLK[1:0] LOW PWR MODE POWERDOWN THERMTRIP#
DEFAULT DEFAULT
ON ENABLE
DEFAULT DEFAULT DEFAULT DEFAULT

BIOS ENABLE AFTER STARTUP


+3V +3V +3V +3V +3V +3V +3V

R322 R391 R394 R157 R380 R410 R373


10K_4 *10K_4 *10K_4 *10K_4 *10K_4 *10K_4 *10K_4

(15,22) PDDACK#

B (13,17,18,20) AD28 B

(13,17,18,20) AD27

(13,17,18,20) AD26

(13,17,18,20) AD25

(13,17,18,20) AD24

(13,17,18,20) AD23

R321 R392 R395 R156 R381 R411 R376


*10K_4 *10K_4 10K_4 10K_4 10K_4 10K_4 *10K_4

PDACK# PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23

DEBUG PULL USE


LONG
Reserved BYPASS
PCI PLL
BYPASS ACPI
BCLK
BYPASS IDE
PLL
USE EEPROM
PCIE STRAPS Reserved
HIGH
A
STRAPS RESET
DEFAULT A

PULL USE USE PCI USE ACPI USE IDE USE DEFAULT
LOW SHORT PLL BCLK PLL PCIE STRAPS
RESET PROJECT : ZR3

CLG DEFAULT DEFAULT DEFAULT DEFAULT

Size
Custom

Date:
Document Number
Quanta Computer Inc.
SB460M STRAPS
Wednesday, October 18, 2006 Sheet 16 of 31
Rev
1A

5 4 3 2 1
5 4 3 2 1

+3V_S5 +3VS5_LVDD
ID Select : AD18
Interrupt Pin : INTF# L24 BK1608HS220_6

Request Indicate : REQ0# C332 C335 C346 C344 C280 C323 C333 C314 C310

Grant Indicate : GNT0# 22U_1206 .1U_4 10U_8 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4
+3VS5_LAVDD +2.5VS5_LVDD

D +3V_S5 +3VS5_LAVDD D

120
L23 BK1608HS220_6

20

16

10

12
3
7
U6 +3VS5_LVDD
C272 C315 C284

AVDD33
AVDDL
AVDD33

AVDD25
NC

NC
NC
26 +3VS5_LVDD
VDD33 10U_8 .1U_4 .1U_4
(13,16,18,20,26) AD[0..31] 41
AD0 VDD33
104 56
AD0 VDD33

1
AD1 103 AVDDL AVDDH 71
AD2 AD1 VDD33 VDD33 Q8
102 84
AD3 AD2 VDD33 CTRL25
98 94 2
AD4 AD3 VDD33 +2.5VS5_LVDD 2SB1197KR
97 107
AD5 AD4 RTL8110SBL VDD33 +2.5VS5_LVDD
96
AD6 AD5
95 32

3
AD7 AD6 VDD33---+3.3V DIGITAL VDD25
93 54
AD8 AD7 AVDDH------+3.3V ANALOG DVDD VDD25
90 78
AD9 AD8 AVDDL-----+2.5V ANALOG VDD25 C340 C304 C330 C313 C292 C343 C336
89 99
AD10 AD9 DVDD-----+1.2V DIGITAL VDD25
87
AD11 AD10 DVDD_A----+1.2V ANALOG 22u_1206 10U_8 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4
86 45
AD12 AD11 NC
85 64
AD13 AD12 NC
83 116
AD14 AD13 DVDD NC +5V
82 110
AD15 AD14 NC
79 24
AD16 AD15 PCI NC
59
AD17 AD16 R143
58 126
AD18 AD17 RTL8100CL DVDD_A NC U13
57
AD19 AD18
55
AD20 AD19 VDD33---+3.3V DIGITAL RX+ T_RX+
C 53 1 16 C
AD21 AD20 AVDDL-----+3.3V ANALOG LAN_PME# 1K_4 RD+ RX+
50 31
AD22 AD21 DVDD-----+2.5V DIGITAL PMEB ISOLATEB RX- MCT1
49 23 2 14
AD23 AD22 AVDDH------+2.5V ANALOG ISOLATEB RD- CT
47 105 T55
AD24 AD23 LWAKE R146 V_DAC T_RX-
43 3 15
AD25 AD24 CT RX-
42
AD26 AD25 PM CTRL25 TX+ T_TX-
40 8 7 9
AD27 AD26 CTRL25 TD+ TX-
39 125
AD28 AD27 NC 15K/F_4 C419 TX- MCT0
37 74 8 11
AD29 AD28 NC TD- CMT
36 72
AD30 AD29 NC .1U_6 T_TX+
34 88 6 10
AD31 AD30 NC CT TX+ R239 R236
33 11
AD31 NC
CBE0# 92 NS681687 75/F_4 75/F_4
(13,18,20,26) CBE0# CBE0B
CBE1# 77 19 8/16 Reserve circuit For close Lan chips.
(13,18,20,26) CBE1# CBE1B NC
CBE2# 60 18 Near Transformer
(13,18,20,26) CBE2# CBE2B NC
CBE3# 44 15
(13,18,20,26) CBE3# CBE3B NC
STOP# 69 14 C420
(13,18,20) STOP# STOPB NC
PERR# 70 MII 6 RX- R444 *49.9/F_4 C559 *.01U_6 RX- R235 49.9/F_4 C417 .01U_6
(13,18,20) PERR# PERRB RX-
TRDY# 67 5 RX+ R443 *49.9/F_4 RX+ R234 49.9/F_4 9/11 Change to 0.01uF For 1000P/3KV_1808
(13,18,20,26) TRDY# TRDYB RX+
DEVSEL# 68 2 TX- R113 49.9/F_4 C289 .01U_6 TX- R445 *49.9/F_4 C560 *.01U_6 different from reference design.
(13,18,20,26) DEVSEL# DEVSELB TX-
AD18 R171 100_4 46 1 TX+ R114 49.9/F_4 TX+ R446 *49.9/F_4
FRAME# IDSEL TX+
(13,18,20,26) FRAME# 61
IRDY# FRAMEB
(13,18,20,26) IRDY#
SERR#
63
IRDYB NC
113 Near Lan chipset CN6
(13,18,20) SERR# 75 114
REQ0# SERRB LED LED2 LANLINK#
(13) REQ0# 30 115
PCIRST# REQB LED1 LANACT# +3V_S5 LANACT#
(13,18,20,25,26) PCIRST# 27 117 10
GNT0# RSTB LED0 YELLOW_N
(13) GNT0# 29
B
INTE# GNTB R237 220_4
B
(13,20) INTE# 25 9
PAR INTAB LAN_XIN C276 27P_4 YELLOW_P
(13,18,20) PAR 76 121
R103 5.6K/F_4 PAR OSC XTAL1 LAN_XOUT
127 122
RSET XTAL2

1
CLKRUN# R168 0_4 65 R108 Y1
(13,20,25) CLKRUN# CLKRUNB R241 *75/F_4 8
EESEL TX3-
106
EECS EECLK *1M_4 25.0000 MHz
111 7

2
EEPROM EESK EEDI TX3+
109
PCLK_LAN EEDI EEDO C275 27P_4 T_RX-
(13,16) PCLK_LAN 28 108 6
CLK EEDO TX1-
R154 R242 *75/F_4 5 14
TX2- GND2
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
NC
NC
NC
NC
NC
NC
NC
NC

4 13
*22_4 TX2+ GND1
8/16 Change 27P To Match the frequency stability
T_RX+ 3
4
35
52
100
80
17
128
124
21
51
66
81
91
101
38
119
123
62
13
48
73
9
22
112
118

C331 TX1+
RTL8100CL T_TX- 2
*10P_4 TX0-
T_TX+ 1
TX0+

+3V_S5 LANLINK# 12
GREEN_N
+3V_S5 R240 220_4 11
+3VS5_LVDD GREEN_P

A R106 RJ45 A
C288 *100P_4 +3V_S5
U4 R155
EESEL 1 8
3.6K_4 EECLK CS VCC
2 7
SK NC PROJECT : ZR3
1

EEDI 3 6 C307 *10K_4


EEDO DI NC
4 5
DO GND .1U_4 LAN_PME#
LAN_PME# (25) Quanta Computer Inc.
2

93C46-3GR

LAN 5 4 3 2
Size

Date:
Document Number
LAN RTL8110SBL/8100CL
Wednesday, October 18, 2006
1
Sheet 17 of 31
Rev
1A
5 4 3 2 1

+3V
09/07 Stuff R201,C391 in materials For EMI Situation.
PCLK_PCM R201 22_4 PCLK_PCM_R C391 10p_4

C389 C397 C390 C375 C372 SDCLK1


SDCLK1 (12)
.1U_4 .1U_4 .1U_4 .1U_4 .1U_4 R178
INTH# VCCD1#
(13) INTH#
INTG# VCCD0#
(13) INTG#
SERIRQ *0_6
(13,20,25) SERIRQ
PCM_PME# VPPD1
+3V PCMSPK VPPD0
(23) PCMSPK
PCIRST# R197 0_4 PCM_GRST#
D REQ3# +3V A_CRSVD/D2 D
(13) REQ3# A_CRSVD/D2 (19)
GNT3# A_CRSVD/D14
(13) GNT3# A_CRSVD/D14 (19)
C368 C350 C348 C367 C374 AD17 R196 100_4 PCM_IDSEL A_CRSVD/A18
A_CRSVD/A18 (19)
PCIRST# R185
(13,17,20,25,26) PCIRST#
.1U_4 .1U_4 .1U_4 .1U_4 .1U_4 PCLK_PCM A_CCD1# A_CCD1#
(13,16) PCLK_PCM A_CCD1# (19)
A_CCD2# A_CCD2#
A_CCD2# (19)
FRAME# 43K_4
(13,17,20,26) FRAME#
IRDY# A_CVS1# C377 C351
(13,17,20,26) IRDY# A_CVS1# (19)
TRDY# A_CVS2#
(13,17,20,26) TRDY# A_CVS2# (19)
DEVSEL#
(13,17,20,26) DEVSEL#
STOP# XDPWREN#MSPWREN# 10P_4 10P_4
+3V (13,17,20) STOP# XDPWREN#MSPWREN# (19)
PERR# XDDATA1/MSBS
(13,17,20) PERR# XDDATA1/MSBS (19)
SERR# XDDATA2/MSDATA0
(13,17,20) SERR# XDDATA2/MSDATA0 (19)

PCM_SUS#
XDDATA3/MSDATA3
XDDATA3/MSDATA3 (19)
2

Q10 XDRE#/MSCLK
XDRE#/MSCLK (19)
XDDATA5/MSDATA2
XDDATA5/MSDATA2 (19)
XDDATA6/MSDATA1
XDDATA6/MSDATA1 (19)
MSINX#
MSINX# (19)
(14,20) PME# 3 1 PCM_PME#

M10

M11

M13

M12
N11

N10

N13

N12

E10
L11

L10

L12
J13
M1

M9
G4

G9

G8
H1

N9

H5

C6
D9

H8

H9
H7
K3
K1

B1
A1

K9

K8

A2

A4

E9
*DTC144EU

F4

F9
L3
L2
L1

L8
J4

J9

J8
U9

SDCLKI
SERR#
PERR#
STOP#
DEVSEL#
TRDY#
IRDY#
FRAME#

PCIRST#

IDSEL

PCIGNT#
PCIREQ#

G_RST#

SUSPEND#

RI_OUT#/PME#

MFUNC6
MFUNC5
MFUNC4
MFUNC3
MFUNC2
MFUNC1
MFUNC0
MFUNC7

VCCD1#
VCCD0#

VPPD1
VPPD0

RSVD/D2
RSVD/D14
RSVD/A18

CCD1#/CD1#
CCD2#/CD2#

CVS1/VS1
CVS2/VS2

SMDATA2/MSDATA0
SMDATA3/MSDATA3

SMDATA5/MSDATA2
SMDATA6/MSDATA1
MSINX#
SPKROUT
PCICLK

SMDATA1/MSBS

SMRE#/MSCLK
SMPWREN#/MSPWREN
AD[0..31] A_CAD[0..31]
(13,16,17,20,26) AD[0..31] A_CAD[0..31] (19)
AD0 N8 B2 A_CAD31
AD1 AD0 CAD31/D10 A_CAD30
K7 C3
AD2 AD1 CAD30/D9 A_CAD29
L7 B3
AD3 AD2 CAD29/D1 A_CAD28
N7 A3
AD4 AD3 CAD28/D8 A_CAD27
M7 C4
AD5 AD4 CAD27/D0 A_CAD26
N6 A6
C AD6 AD5 CAD26/A0 A_CAD25 C
M6 D7
AD7 AD6 CAD25/A1 A_CAD24
K6 C7
AD8 AD7 CAD24/A2 A_CAD23
M5 A8
AD9 AD8 CAD23/A3 A_CAD22
L5 D8
AD10 AD9 CAD22/A4 A_CAD21
K5 A9
AD11 AD10 CAD21/A5 A_CAD20
M4 C9
AD12 AD11 CAD20/A6 A_CAD19
K4 A10
AD13 AD12 CAD19/A25 A_CAD18
N3 B10
AD14 AD13 CAD18/A7 A_CAD17
M3 D10
AD15 AD14 CAD17/A24 A_CAD16
ENE714 AJ007140T08 AD16
N2
J2
AD15 CAD16/A17
E12
F10 A_CAD15
AD17 AD16 CAD15/IOWR# A_CAD14
ENE1410 AJ014100T41 AD18
J1
H4
AD17 CAD14/A9
E13
F13 A_CAD13
AD19 AD18 CAD13/IORD# A_CAD12
H3 F11
AD20 AD19 CAD12/A11 A_CAD11
G3 G10
AD21 AD20 CAD11/OE# A_CAD10
G2 G11
AD22 AD21 CAD10/CE2# A_CAD9
F1 G12
AD23 AD22 CAD9/A10 A_CAD8
F2 H12
AD24 AD23 CAD8/D15 A_CAD7
E2 H10
AD25 AD24 CAD7/D7 A_CAD6
E3 J11
AD26 AD25 CAD6/D13 A_CAD5
E4 J12
AD27 AD26 CAD5/D6 A_CAD4
D1 K13
AD28 AD27 CAD4/D12 A_CAD3
D2 J10
AD29 AD28 CAD3/D5 A_CAD2
D4 K10
AD30 AD29 CAD2/D11 A_CAD1
C1 K12
AD31 AD30 CAD1/D4 A_CAD0
C2 L13
AD31 CAD0/D3

CSTSCHG/BVD1/STSCHG#

CCLKRUN#/WP/IOIS16#
CAUDIO/BVD2/SPKR#
CBE0#

CINT#/READY/IREQ#
(13,17,20,26) CBE0# N5
B CBE0# B

SMDATA7/SDDAT0

SMDATA4/SDDAT3
SMDATA0/SDDAT1
CBE1# N1
(13,17,20,26) CBE1# CBE1#

CREQ#/INPACK#
CBE2# J3 H13 A_CC/BE0#

SMCLE/SDDAT2

SMWPD#/SDWP
CSERR#/WAIT#
(13,17,20,26) CBE2# A_CC/BE0# (19)

SMALE/SDCMD
CDEVSEL#/A21

SMWE#/SDCLK
CBE2# CCBE0#/CE1#

CRST#/RESET
CFRAME#/A23

SDPWREN33#
CBE3# A_CC/BE1#

CBLOCK#/A19
(13,17,20,26) CBE3# E1 E11 A_CC/BE1# (19)

CPERR#/A14
CBE3# CCBE1#/A8

CTRDY#/A22
CSTOP#/A20
CGNT#/WE#

CIRDY#/A15
PAR M2 A11 A_CC/BE2#
(13,17,20) PAR PAR CCBE2#/A12 A_CC/BE2# (19)

CCLK/A16
B7 A_CC/BE3#

GND_SD
A_CC/BE3# (19)
VCC_SD

SMBSY#
CCBE3#/REG#

SMWP#
A_CPAR

SMCD#
SMCE#

SDCD#
D13
VCCA1
VCCA2

VCC10

CPAR/A13 A_CPAR (19)


GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7

VCC8
VCC9

CB714/1410
D3
H2
L4
M8
K11
F12
C10
B6

F3
G1
K2
N4
L6
L9
H11

G13
A7
D12
C8
B4

E7
G5

B5
C5
D6
D11

C11
B8

A5
C13

C12
B13
A13
A12
B11

D5
B9
B12

H6
J5
J6
J7
F5
E5
E6
F6
G6
F7
F8
E8
G7
SDPWREN33#
SDPWREN33# (19)
SDCD#
SDCD# (19)
SDWP
+3V SDWP (19)
U10 XDDATA0/SDDAT1
XDDATA0/SDDAT1 (19)
XDDATA4/SDDAT3
XDDATA4/SDDAT3 (19)
VCCD0# 1 16 +3V AVCC +3V XDWE#/SDCLK
VCCD0# SHDN# XDWE#/SDCLK (19)
VCCD1# 2 15 VPPD0 XDDATA7/SDDAT0
VCCD1# VPPD0 XDDATA7/SDDAT0 (19)
+3V 3 14 VPPD1 XDALE/SDCMD
3.3V VPPD1 XDALE/SDCMD (19)
4 13 XDCLE/SDDAT2
3.3V AVCC XDCLE/SDDAT2 (19)
+5V 5 12 AVCC +3V_CRVCC XDCD#
5V AVCC XDCD# (19)
6 11 XDWP#
5V AVCC XDWP# (19)
7 10 AVPP XDCE#
GND AVPP XDCE# (19)
8 9 XDBSY#
OC# 12V XDBSY# (19)
R_A_CCLK R186 10_4 A_CCLK
A_CCLK (19)
A_CRST#
ENE CP-2211 A_CCLKRUN#
A_CRST# (19)
A_CCLKRUN# (19)
A A_CFRAME# A
A_CFRAME# (19)
A_CIRDY#
A_CIRDY# (19)
A_CTRDY#
A_CTRDY# (19)
A_CDEVSEL#
+5V +3V AVCC AVPP +3V_CRVCC A_CDEVSEL# (19)
A_CSTOP#
A_CSTOP# (19)
A_CPERR#
A_CSERR#
A_CPERR# (19)
A_CSERR# (19)
PROJECT : ZR3
A_CREQ#
A_CREQ# (19)
C386 C385 C359 C384 C360 C362 C369 C349 C371 C361 C363 C364 C388 A_CGNT#
A_CBLOCK#
A_CGNT# (19)
A_CBLOCK# (19)
Quanta Computer Inc.
4.7U_6 .1U_4 4.7U_6 .1U_4 4.7U_6 .1U_4 .1U_4 .1U_4 .1U_4 4.7U_6 .1U_4 .1U_4 .1U_4 A_CINT#
A_CINT# (19)
A_CSTSCHG Size Document Number Rev
A_CSTSCHG (19)
A_CAUDIO ENE CB714/1410 1A
A_CAUDIO (19)
Date: Wednesday, October 18, 2006 Sheet 18 of 31
5 4 3 2 1
9
5 4 3 2 1

8
7
+3V_CRVCC +3V_CRVCC

6
CN4

5
TD-STD-TOPview

4
1 23 XDCD# AVCC
(1)MS-GND (19)XD-CD XDCD# (18)
XDDATA1/MSBS 2 24

3
XDDATA6/MSDATA1 (2)MS-BS (1)XD-GND XDBSY#