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MCQs in Semiconductor Diodes

1. How many terminals does a diode have?

 A) 1
 B) 2*
 C) 3
 D) 4
2. What is the resistor value of an ideal diode in the region of conduction?

 A) 0*
 B) 5 k
 C) Undefined
 D) Infinity
3. What is the state of an ideal diode in the region of nonconduction?

 A) An open circuit*
 B) A short circuit
 C) Unpredictable
 D) Undefined
4.The diode _____.

 A) is the simplest of semiconductor devices


 B) has characteristics that closely match those of a simple switch
 C) is a two-terminal device
 D) All of the above*
5.The ideal diode is a(n) _____ circuit in the region of nonconduction.

 A) open*
 B) short
6.Which of the following is an atom composed of?

 A) Electrons
 B) Protons
 C) Neutrons
 D) All of the above*
7. How many orbiting electrons does the germanium atom have?
 A) 4
 B) 14
 C) 32*
 D) 41
8.How many valence electrons does a silicon atom have?

 A) 1
 B) 2
 C) 3
 D) 4*
9.One eV is equal to _____ J.

 A) 6.02 × 1023
 B) 1.6 × 10–19*
 C) 6.25 × 1018
 D) 1.66 × 10–24
10. Which of the following elements is most frequently used for doping pure Ge
or Si?

 A) Boron
 B) Gallium
 C) Indium
 D) All of the above*
11.The diffused impurities with _____ valence electrons are called donor atoms.

 A) 4
 B) 3
 C) 5*
 D) 0
12.In what state is a silicon diode if the voltage drop across it is about 0.7 V?

 A) No bias*
 B) Forward bias
 C) Reverse bias
 D) Zener region
13.What unit is used to represent the level of a diode forward current IF?

 A) pA
 B) nA
 C) A
 D) mA*
14.Which of the following ratings is true?

 A) Si diodes have higher PIV and narrower temperature ranges than Ge


diodes.
 B) Si diodes have higher PIV and wider temperature ranges than Ge diodes.*
 C) Si diodes have lower PIV and narrower temperature ranges than Ge
diodes.
 D) Si diodes have lower PIV and wider temperature ranges than Ge diodes.
15.It is not uncommon for a germanium diode with an Is in the order of 1–2 A at
25°C to have leakage current of 0.1 mA at a temperature of 100°C.

 A) True*
 B) False
16. Calculate static resistance RD of a diode having ID = 30 mA and VD = 0.75 V.

 A) 25*
 B) 40
 C) 0.04
 D) 0.025
17. Calculate ID if RD = 30 and VD = 0.84 V.

 A) 28 mA*
 B) 0.028 mA
 C) 2.8 A
 D) 280 A
18. Refer to Figure 1.27. Calculate the dynamic resistance rd of a diode having ID
= 27.5 mA.

 A) 0
 B) 2*
 C) 5
 D) 26
19. Determining rd to a high degree of accuracy from a characteristic curve is
very accurate.

 A) True
 B) False*
20. The _____ diode model is employed most frequently in the analysis of
electronic systems.
 A) ideal device
 B) simplified*
 C) piecewise-linear
21.Calculate the power dissipation of a diode having ID = 40 mA.

 A) 28 mW*
 B) 28 W
 C) 280 mW
 D) Undefined
22. Which capacitance dominates in the reverse-bias region?

 A) depletion*
 B) conversion
 C) 40 Diffusion
 D) 140 None of the above
23. Which capacitance dominates in the forward-bias region?

 A) Diffusion*
 B) Transition
 C) Depletion
 D) None of the above
24. At what kind of operating frequency diffusion or transition is a capacitor
represented in parallel with the ideal diode?

 A) Low frequency
 B) Moderate frequency
 C) Mid frequency
 D) Very high frequency*
25. What is the value of the transition capacitance for a silicon diode when VD =
0?

 A) 1 pF
 B) 3 pF*
 C) 5 pF
 D) 10 pF
26. Which of the following devices can check the condition of a semiconductor
diode?

 A) Digital display meter (DDM)


 B) Multimeter
 C) Curve tracer
 D) All of the above*
27. What does a high resistance reading in both forward- and reverse-bias
directions indicate?

 A) A good diode
 B) An open diode*
 C) A shorted diode
 D) A defective ohmmeter
28. The condition of a semiconductor diode can be determined quickly using a
_____.

 A) DDM
 B) VOM
 C) curve tracer
 D) Any of the above*
29. Determine the nominal voltage for the Zener diode at a temperature of 120° C
if the nominal voltage is 5.1 volts at 25° C and the temperature coefficient is
0.05%/° C.

 A) 4.6 V
 B) 4.86 V
 C) 5.1 V
 D) 5.34 V*
30. Calculate the temperature coefficient in %/° C of a 10-V nominal Zener diode
at 25° C if the nominal voltage is 10.2 V at 100° C.

 A) 0.0238
 B) 0.0251
 C) 0.0267*
 D) 0.0321
31. In which of the following color(s) is (are) LEDs presently available?

 A) Yellow
 B) White
 C) Orange
 D) All of the above*
32.What is the maximum power rating for LEDs?

 A) 150 mW*
 B) 500 mW
 C) 1 W
 D) 10 W
33. In which of the following is the light intensity measured?

 A) Candela*
 B) Efficacy
 C) Flux
 D) Illumination
34. What is the range of the operating voltage level for LEDs?

 A) 5–12 mV
 B) 1.7–3.3 V*
 C) 5–12 V
 D) 20–25 V
35. In general, LEDs operate at voltage levels from _____ V to _____ V.

 A) 1.0, 3.0
 B) 1.7, 3.3*
 C) 0.5, 4.0
 D) None of the above
FILL IN THE BLANK QUESTIONS
1. A(n) _____ is the simplest of semiconductor devices.

 A) diode*
 B) transistor
 C) operational amplifier
 D) SCR
2. The term _____ is often used when comparing the resistance level of
materials.

 A) permittivity
 B) inductivity
 C) conductivity
 D) resistivity*
3. In the atomic lattice the _____ and _____ form the nucleus.

 A) electrons, neutrons
 B) electrons, protons
 C) neutrons, protons*
 D) None of the above
4. An increase in temperature of a semiconductor can result in a _____ in the
number of free electrons in the material.

 A) substantial increase*
 B) substantial decrease
 C) slight decrease
 D) no change
5. Ge and Si have a(n) _____ coefficient in forward bias.

 A) positive temperature
 B) negative temperature*
 C) absolute temperature
 D) temperature free
6. Any electron that has left its parent atom has _____ energy state relative to
any electron in the atomic structure.

 A) the same
 B) a lower
 C) a higher*
 D) an undefined
7. Introducing those impurity elements that have _____ valence electrons creates
the n-type material.

 A) 0
 B) 3
 C) 4
 D) 5*
8. In n-type material the _____ is called the majority carrier.

 A) electron*
 B) hole
 C) proton
 D) neutron
9. The diffused impurities with _____ valence electrons are called acceptor
atoms.

 A) 0
 B) 3*
 C) 4
 D) 5
10. The reverse-saturation current level is typically measured in _____.

 A) pA
 B) µA*
 C) mA
 D) A
11. The depletion width _____ in the forward bias, which results in having a
majority flow across the junction.

 A) widens
 B) remains unchanged
 C) shrinks*
 D) widens and shrinks alternatively
12. The forward characteristics curve of a diode grows in _____ form.

 A) linear
 B) exponential*
 C) logarithmic
 D) sinusoidal
13. The potential at which the characteristics curve vertical rise occurs is
commonly referred to as the _____.

 A) offset
 B) threshold
 C) firing potential
 D) All of the above*
14. The reverse saturation current Is will just _____ in magnitude for every 10° C
increase in temperature.

 A) double*
 B) remain the same
 C) halve
 D) triple
15. Diodes are connected _____ to increase the current-carrying capacity.

 A) in series
 B) in parallel*
 C) in parallel-series
 D) None of the above
16. The _____ the current through a diode, the _____ the dc resistance level.

 A) higher, lower
 B) lower, lower
 C) lower, higher*
 D) higher, higher
17. Varying the _____ can control the location of the Zener region.

 A) forward current
 B) doping levels*
 C) forward voltage
 D) dc resistance
18. The test current in a Zener diode IZT is the current defined by the _____
power level.

 A) 0.25*
 B) 0.5
 C) 0.75
 D) 1.00
19. The heavier the current in a Zener diode in reverse bias, _____ dynamic
resistance value.

 A) the more the


 B) the less the*
 C) there is substantially more
 D) there is no change in the
20. The intensity of LED is greatest at _____ degrees and the least at _____
degrees.

 A) 0, 90*
 B) 45, 90
 C) 0, 45
 D) 90, 180
21. The temperature coefficient can be _____ for different Zener levels.

 A) positive
 B) negative
 C) zero
 D) All of the above*
22. The reverse recovery time of most commercial switching diodes is in the
range of _____.

 A) picoseconds
 B) a few nanoseconds*
 C) several microseconds
 D) milliseconds
23. The ac resistance of a diode is the _____ of the characteristic curve at the Q-
point of operation.

 A) reciprocal of the slope*


 B) slope
 C) midpoint
 D) average value
24. Generally the value of ac resistance is _____ the value of dc resistance at the
same operating point.

 A) smaller than*
 B) larger than
 C) the same as
 D) unrelated to
25. The reverse-bias current _____ with the increase of temperature.

 A) decreases
 B) increases*
 C) remains the same
 D) None of the above

MCQs in Diode Applications


Choose the letter of the best answer in each questions.
1. Use the information provided here to determine the value of IDQ.

 A) 0 mA
 B) 4.3 mA*
 C) 5 mA
 D) 10 mA
2. In a particular problem, which mode has the highest level of IDQ?

 A) Ideal*
 B) Approximate equivalent
 C) Exact mode using characteristic curve
 D) None of the above
3. Which diode(s) has (have) a zero level current and voltage drop in the ideal
model?
 A) Si
 B) Ge
 C) Both Si and Ge*
 D) Neither Si nor Ge
4. Determine the current level if E = 15 V and R = 3 kΩ.

 A) 0A
 B) 4.76 mA*
 C) 5 mA
 D) 5A
5. Determine the voltage across the resistor.

 A) 0 V*
 B) 0.09 V
 C) 0.2 V
 D) 0.44 V
6. Determine the value of the load resistor.

 A) RL = 5 kΩ
 B) RL = 5.5 kΩ*
 C) RL = 6 kΩ
 D) None of the above
7. Determine ID.

 A) 0 mA
 B) 1.893 mA*
 C) 2.036 mA
 D) 2.143 mA
8. Determine V2.

 A) 3.201 V
 B) 0V
 C) 4.3 V
 D) 1.371 V*
9. A diode is in the “_____” state if the current established by the applied
sources is such that its direction matches that of the arrow in the diode symbol,
and VD ≥ 0.7 V for Si and VD ≥ 0.3 V for Ge.
 A) off
 B) on*
 C) neutral
 D) quiescent
10. An open circuit can have any voltage across its terminals, but the current is
always _____.
 A) 5A
 B) 0 A*
 C) 1A
 D) ∞
11. A short circuit has a _____ drop across its terminals, and the current is
limited only by the surrounding network.
 A) 5V
 B) 0 V*
 C) 1V
 D) ∞
12. Determine ID2.

 A) 29.40 mA
 B) 30.30 mA
 C) 14.70 mA*
 D) None of the above
13. Determine ID1.

 A) 0 mA*
 B) 29.40 mA
 C) 14.70 mA
 D) 14.09 mA
14. Determine ID2.

 A) 6.061 mA
 B) 0.7 mA
 C) 3.393 mA*
 D) 3.571 mA
15. Determine the current through each diode if E1 = E2 = 0 V.

 A) 4.65 mA*
 B) 9.3 mA
 C) 18.6 mA
 D) 0.7 mA
16. Determine Vo if E1 = E2 = 10 V.

 A) 9.3 V
 B) 10 V*
 C) –10 V
 D) 0V
17. What is the logic function of this circuit?

 A) Positive logic AND gate


 B) Positive logic OR gate*
 C) Negative logic AND gate
 D) Negative logic OR gate
18. What is the logic function of this circuit?

 A) Positive logic AND gate*


 B) Positive logic OR gate
 C) Negative logic AND gate
 D) Negative logic OR gate
19. What best describes the circuit?

 A) Full-wave rectifier
 B) Half-wave rectifier*
 C) Clipper
 D) Clamper
20. Determine the peak value of the current through the load resistor.

 A) 2.325 mA*
 B) 5 mA
 C) 1.25 mA
 D) 0 mA
21. Determine the average value of the current through the load resistor.

 A) 2.5 mA
 B) 0 mA
 C) 1.37 mA
 D) 1.479 mA
22. What best describes the circuit?

 A) Full-wave rectifier*
 B) Half-wave rectifier
 C) Clipper
 D) Clamper
23. List the categories of clippers.

 A) Series
 B) Parallel
 C) Series and parallel*
 D) None of the above
24. Determine the peak value of the output waveform.

 A) 25 V
 B) 15 V*
 C) –25 V
 D) –15 V
25. Determine the peak for both half cycles of the output waveform.

 A) 16 V, –4 V*
 B) 16 V, 4 V
 C) –16 V, 4 V
 D) –16 V, –4 V
26. What best describes the circuit?

 A) Full-wave rectifier
 B) Half-wave rectifier
 C) Clipper*
 D) Clamper
27. Determine the total discharge time for the capacitor in a clamper having C =
0.01 µF and R = 500 kΩ.
 A) 5 ms
 B) 25 ms*
 C) 2.5 ms
 D) 50 ms
28. Calculate IL and IZ.

 A) 2 mA, 0 mA
 B) 4 mA, 2 mA
 C) 2 mA, 2 mA
 D) 2 mA, 4 mA*
29. With this Zener diode in its “on state,” what is the level of IZ for the maximum
load resistance?

 A) 0 mA
 B) Undefined
 C) Equal to IRL
 D) IZM*
30. In a voltage regulator network with fixed RL and R, what element dictates the
minimum level of source voltage?
 A) VZ*
 B) IZ
 C) IZM
 D) None of the above
31. Which element dictates the maximum level of source voltage?

 A) VZ*
 B) IZM
 C) IZ
 D) None of the above
32. What is the peak inverse voltage across each diode in a voltage doubler?
 A) Vm
 B) 2Vm*
 C) 0.5Vm
 D) 0.25Vm
33. What is the voltage measured from the negative terminal of C4 to the
negative terminal of the transformer?

 A) –10 V
 B) –20 V*
 C) 10 V
 D) 20 V
34. In a voltage-multiplier circuit, the number of diodes is directly proportional to
the multiplicative voltage factor.
 A) True*
 B) False
35. Rectifiers are commonly used in battery chargers.

 A) True*
 B) False
Fill-in-the-blanks Questions
1. The intersection of the load line with the characteristic curve determines the
_____ of the system.
 A) point of operation*
 B) load-line analysis
 C) characteristic curve
 D) forward bias
2. The slope of the load line depends on the _____.

 A) type of the diode used


 B) characteristic curve
 C) load resistor*
 D) source voltage
3. The load line is defined by the _____ and a characteristic curve is defined by
the _____.

 A) quiescent point, device


 B) device, network
 C) network, device*
 D) None of the above
4. The quiescent point (Q-point) is defined by a(n) _____.

 A) ac network
 B) dc network*
 C) ac and dc network
 D) None of the above
5. The x-intercept of the load line with the characteristic curve is determined by
the _____.
 A) load resistor
 B) diode
 C) source voltage and the load resistor
 D) source voltage*
6. The source voltage must be _____ the voltage drop across the diode to
conduct the diode.
 A) larger than*
 B) smaller than
 C) the same as
 D) None of the above
7. As the load resistor increases, the slope of the dc load line and the levels of
diode current _____.
 A) increase
 B) decrease*
 C) remain unchanged
 D) are unpredictable
8. A germanium diode is approximated by _____ equivalent for voltages less
than 0.3 V.
 A) a short circuit
 B) a series circuit
 C) a parallel circuit
 D) an open circuit*
9. A diode is in the _____ state if the current established by the applied sources
is such that its direction matches that of the arrow in the diode symbol and VD >
0.7 V.
 A) off
 B) reverse bias
 C) on*
 D) transition
10. The combination of a short circuit in series with an open circuit always
results in a(n) _____ circuit.
 A) open*
 B) short
 C) neither short nor open
 D) unknown
11. The absence of the Si or Ge and VD label on a diode denotes _____ notation.
 A) approximate model
 B) ideal model*
 C) exact model
 D) None of the above
12. The process of removing one-half the input signal to establish a dc level is
called _____.
 A) rectifier
 B) full-wave rectifier
 C) half-wave rectifier*
 D) filtering
13. The dc voltage level of a silicon diode is _____ its ideal model.

 A) smaller than
 B) larger than*
 C) the same as
 D) None of the above
14. The PIV rating of the diodes in a full-wave rectifier must be larger than _____
Vm.
 A) 0.318
 B) 0.636
 C) 2
 D) 1*
15. For the ideal diode the transition between states will occur at the point on the
characteristic curve when VD = _____ V and ID = _____ A.
 A) 0.3, 0
 B) 0, 0*
 C) 0.7, 0
 D) 0.7, 0.3
16. A clamping network must have _____.

 A) a capacitor
 B) a diode
 C) a resistive element
 D) All of the above*
17. The ratio of the total swing of the output of a clamper to its input total swing
is _____.
 A) 1*
 B) 2
 C) 0.5
 D) 0
18. For the “off” state of a Zener diode, the voltage across the diode should be
_____.
 A) greater than VZ
 B) zero
 C) less than VZ but greater than zero*
 D) None of the above
19. Once the Zener diode is in the “on” state, VZ is always _____ VL.

 A) larger than
 B) smaller than
 C) the same as*
 D) None of the above
20. Zener diodes are used in regulator networks to _____.

 A) generate voltage
 B) consume power
 C) maintain a fixed voltage across the load resistor*
 D) protect the load
21. With the Zener diode in the “on” state, increasing IL will _____ IZ and
_____IR.

 A) decrease, increase
 B) increase, decrease
 C) decrease, keep the same level of*
 D) increase, keep the same level of
22. A Zener diode is in a _____ impedance region in the forward bias while it has
a _____ impedance region in the reverse bias.
 A) very large, low
 B) very large, very large
 C) low, low
 D) low, very large*
23. In a half-wave voltage doubler, the voltage across output capacitor C2 drops
across the load during the _____ half cycle and the capacitor is recharged up to
_____ during the _____ half cycle.

 A) negative, 2Vm, positive


 B) positive, Vm, negative
 C) positive, 2Vm, negative*
 D) negative, Vm, positive
24. The full-wave voltage doubler provides _____ filtering action than (as) the
half-wave voltage doubler.
 A) better*
 B) poorer
 C) the same
 D) None of the above
25. In this voltage multiplier, measuring from the top of the transformer winding
will provide _____ multiples of Vm at the output, whereas measuring the output
voltage from the bottom of the transformer will provide _____ multiples of the
peak Vm.

 A) odd, even*
 B) even, odd
 C) odd, odd
 D) even, even
MCQs in Boylestad Bipolar Junction Transistors
1. In what decade was the first transistor created?

 A) 1930s
 B) 1940s*
 C) 1950s
 D) 1960s
2. How many layers of material does a transistor have?

 A) 1
 B) 2
 C) 3*
 D) 4
3. What is the ratio of the total width to that of the center layer for a transistor?
 A) 1:15
 B) 1:150
 C) 15:1
 D) 150:1*
4. Which of the following is (are) the terminal(s) of a transistor?

 A) Emitter
 B) Base
 C) Collector
 D) All of the above*
5. List the types of bipolar junction transistors.

 A) ppn, npn
 B) pnp, npn*
 C) npp, ppn
 D) nnp, pnp
6. Transistors are _____-terminal devices.

 A) 2
 B) 3*
 C) 4
 D) 5
7. How many carriers participate in the injection process of a unipolar device?
 A) 1*
 B) 2
 C) 0
 D) 3
8. Which component of the collector current IC is called the leakage current?
 A) Majority
 B) Independent
 C) Minority*
 D) None of the above
9. For a properly biased pnp transistor, let IC = 10 mA and IE = 10.2 mA. What is
the level of IB?
 A) 0.2 A
 B) 200 mA
 C) 200 µA*
 D) 20.2 mA
10. Calculate minority current ICO if IC = 20.002 mA and IC majority = 20 mA.
 A) 2 µA*
 B) 0.002 µA
 C) 2 nA
 D) 2 pA
11. Which of the following regions is (are) part of the output characteristics of a
transistor?
 A) Active
 B) Cutoff
 C) Saturation
 D) All of the above*
12. In which region are both the collector-base and base-emitter junctions
forward-biased?
 A) Active
 B) Cutoff
 C) Saturation*
 D) All of the above
13. How much is the base-to-emitter voltage of a transistor in the “on” state?
 A) 0V
 B) 0.7 V*
 C) 0.7 mV
 D) Undefined
14. In the active region, while the collector-base junction is _____-biased, the
base-emitter is _____-biased.
 A) forward, forward
 B) forward, reverse
 C) reverse, forward*
 D) reverse, reverse
15. What is βdc equal to?

 A) IB / IE
 B) IC / IE
 C) IC / IB*
 D) None of the above
16. What are the ranges of the ac input and output resistance for a common-base
configuration?
 A) 10 Ω–100 Ω, 50 k Ω–1 MΩ*
 B) 50 kΩ –1 MΩ, 10 Ω –100 Ω
 C) 10 Ω –100 kΩ, 50 Ω –1 kΩ
 D) None of the above
17. For what kind of amplifications can the active region of the common-emitter
configuration be used?
 A) Voltage
 B) Current
 C) Power
 D) All of the above*
18. Use this table of collector characteristics to calculate βac at VCE = 15 V and
IB = 30 µA.

 A) 100*
 B) 106
 C) 50
 D) 400
19. Calculate βdc at VCE = 15 V and IB = 30 µA.

 A) 100
 B) 116
 C) 50
 D) 110*
20. Which of the following configurations can a transistor set up?

 A) Common-base
 B) Common-emitter
 C) Common-collector
 D) All of the above*
21. Determine the value of α when β = 100.

 A) 1.01
 B) 101
 C) 0.99*
 D) Cannot be solved with the information provided
22. What is the most frequently encountered transistor configuration?

 A) Common-base
 B) Common-collector
 C) Common-emitter*
 D) Emitter-collector
23. βdc for this set of collector characteristics is within _____ percent of βac.
 A) 2
 B) 5
 C) 7
 D) 10*
24. βdc = ________

 A) IB / IE
 B) IC / IE
 C) IC / IB*
 D) None of the above
25. What is (are) the component(s) of most specification sheets provided by the
manufacturer?
 A) Maximum ratings
 B) Thermal characteristics
 C) Electrical characteristics
 D) All of the above*
26. What is (are) the component(s) of electrical characteristics on the
specification sheets?
 A) On
 B) Off
 C) Small-signal characteristics
 D) All of the above*
27. Most specification sheets are broken down into _____.

 A) maximum ratings
 B) thermal characteristics
 C) electrical characteristics
 D) All of the above*
28. An example of a pnp silicon transistor is a 2N4123.

 A) True
 B) False*
29. Which of the following equipment can check the condition of a transistor?
 A) Current tracer
 B) Digital display meter (DDM)
 C) Ohmmeter (VOM)
 D) All of the above*
30. Which of the following can be obtained from the last scale factor of a curve
tracer?
 A) hFE
 B) αdc
 C) αac
 D) βac*
31. Calculate βac for IC = 15 mA and VCE = 5 V.

 A) 200*
 B) 180
 C) 220
 D) None of the above
32. What range of resistor values would you get when checking a transistor for
forward- and reverse-biased conditions by an ohmmeter?
 A) 100 Ω to a few kΩ, exceeding 100 kΩ*
 B) Exceeding 100 kΩ, 100 Ω to a few kΩ
 C) Exceeding 100 kΩ, exceeding 100 kΩ
 D) 100 Ω to a few kΩ, 100 Ω to a few kΩ
33. What does a reading of a large or small resistance in forward- and reverse-
biased conditions indicate when checking a transistor using an ohmmeter?
 A) Faulty device*
 B) Good device
 C) Bad ohmmeter
 D) None of the above
34. A transistor can be checked using a(n) _____.

 A) curve tracer
 B) digital meter
 C) ohmmeter
 D) Any of the above*
35. How many individual pnp silicon transistors can be housed in a 14-pin plastic
dual-in-line package?
 A) 4*
 B) 7
 C) 10
 D) 14
Fill-in-the-blanks Questions
1. All amplifiers should have at least _____ terminals with _____ terminal(s)
controlling the flow between _____ other terminal(s).
 A) 2, 1, 1
 B) 3, 1, 2*
 C) 3, 2, 1
 D) 3, 0, 3
2. The outer layers of a transistor are _____ the sandwiched layer.

 A) much smaller than


 B) the same as
 C) much larger than*
 D) None of the above
3. The doping of the sandwiched layer is _____ that of the outer layers.
 A) considerably less than*
 B) the same as
 C) considerably more than
 D) None of the above
4. The lower doping level _____ the conductivity and _____ the resistivity of the
material.
 A) increases, decreases
 B) increases, increases
 C) decreases, decreases
 D) decreases, increases*
5. The term bipolar reflects the fact that _____ and _____ participate in the
injection process into the oppositely polarized material.
 A) holes, neutrons
 B) holes, electrons*
 C) neutrons, electrons
 D) None of the above
6. One p-n junction of a transistor is _____-biased and the other one is _____-
biased in the active region.
 A) reverse, reverse
 B) forward, forward
 C) reverse, forward*
 D) None of the above
7. The magnitude of the base current is typically on the order of _____ as
compared to _____ for the emitter.
 A) µA, µA
 B) µA, mA*
 C) mA, µA
 D) mA, mA
8. The base current is the _____ of the emitter and collector currents.

 A) sum
 B) difference*
 C) product
 D) None of the above
9. The _____ region is the region normally employed for linear (undistorted)
amplifiers.
 A) active*
 B) cutoff
 C) saturation
 D) All of the above
10. In the cutoff region the collector-base junction is _____-biased and the base-
emitter junction is _____-biased for a transistor.
 A) reverse, forward
 B) forward, reverse
 C) reverse, reverse*
 D) forward, forward
11. In the saturation region the collector-base junction is _____-biased and the
base-emitter junction is _____-biased for a transistor.
 A) reverse, forward
 B) forward, reverse
 C) reverse, reverse
 D) forward, forward*
12. For practical transistors the level of alpha typically extends from _____ to
_____ with most approaching the higher end of the range.
 A) 0.0, 1
 B) 0.90, 0.998*
 C) 50, 400
 D) None of the above
13. Typical values of voltage amplification for the common-base configurations
vary from _____ and the current gain is always _____ .
 A) less than 1, 50 to 300
 B) 50 to 300, larger than 1
 C) 50 to 300, less than 1*
 D) larger than 1, 50 to 300
14. If a value of beta.gif is specified for a particular transistor configuration it will
normally be used for _____ calculations.
 A) ac
 B) dc
 C) ac and dc*
 D) None of the above
15. The common-collector configuration has a _____ input impedance and a
_____ output impedance.
 A) low, high
 B) high, low*
 C) high, high
 D) low, low
16. The active region of a transistor is bounded by the _____.

 A) cutoff region
 B) saturation region
 C) power dissipation curve
 D) All of the above*
17. The “on” and “off” characteristics refer to _____ limits while the small-signal
characteristics indicate the parameters of importance to _____ operation.
 A) ac, dc
 B) dc, ac*
 C) ac, dc and ac
 D) dc and ac, dc
18. The step function (per step) of a curve tracer reveals the scale for _____.
 A) collector current IC
 B) VCE voltage
 C) base current IB*
 D) All of the above
19. The level of _____ is determined and displayed by advanced digital meters.
 A) VCE
 B) IB
 C) IC
 D) βdc*
20. The level of _____ is determined and displayed by advanced digital meters if
using diode-testing mode.
 A) VBE*
 B) IC
 C) IB
 D) IE
21. When checking a transistor by ohmmeter, a relatively _____ resistance is
displayed for a forward-biased junction and _____ resistance for a reverse-
biased junction.
 A) low, very high*
 B) low, low
 C) high, high
 D) high, very low
22. An OL indication on an advanced digital meter indicates _____ while
checking a transistor.
 A) forward bias
 B) reverse bias*
 C) definitely a defective transistor
 D) None of the above
23. If the positive lead of an ohmmeter is connected to the base and the negative
lead to the emitter, a low resistance reading would indicate a _____ transistor
and a high resistance reading would indicate a _____ transistor.
 A) npn, pnp*
 B) pnp, npn
 C) npn, npn
 D) pnp, pnp
24. The leads of a transistor are typically made of _____.
 A) gold
 B) aluminum*
 C) nickel
 D) All of the above
25. There is(are) _____ in the internal construction of a TO-92 package.
 A) gold bond wires
 B) a copper frame
 C) epoxy encapsulation
 D) All of the above*

MCQs in DC Biasing – BJTs


Choose the letter of the best answer in each questions.
1. Which of the following currents is nearly equal to each other?

 A) IB and IC
 B) IE and IC*
 C) IB and IE
 D) IB, IC, and IE
2. The ratio of which two currents is represented by β?

 A) IC and IE
 B) IC and IB*
 C) IE and IB
 D) None of the above
3. At what region of operation is the base-emitter junction forward biased and
the base-collector junction reverse biased?

 A) Saturation
 B) Linear or active*
 C) Cutoff
 D) None of the above
4. Calculate the approximate value of the maximum power rating for the
transistor represented by the output characteristics of Figure 4.1?

 A) 250 mW
 B) 170 mW*
 C) 50 mW
 D) 0 mW
5. The cutoff region is defined by IB _____ 0 A.
 A) >
 B) <
 C) ≤*
 D) ≥
6. The saturation region is defined by VCE _____ VCEsat.

 A) >
 B) <
 C) ≤*
 D) ≥
7. For the BJT to operate in the active (linear) region, the base-emitter junction
must be _____-biased and the base-collector junction must be _____-biased.

 A) forward, forward
 B) forward, reverse*
 C) reverse, reverse
 D) reverse, forward
8. For the BJT to operate in the saturation region, the base-emitter junction must
be _____-biased and the base-collector junction must be _____-biased.

 A) forward, forward*
 B) forward, reverse
 C) reverse, reverse
 D) reverse, forward
9. Which of the following voltages must have a negative level (value) in any npn
bias circuit?

 A) VBE
 B) VCE
 C) VBC*
 D) None of the above
10. For what value of β does the transistor enter the saturation region?

 A) 20
 B) 50
 C) 75
 D) 116*
11. Determine the reading on the meter when VCC = 20 V, RC = 5 kΩ, and IC = 2
mA.

 A) 10 V*
 B) –10 V
 C) 0.7 V
 D) 20 V
12. Which of the following is assumed in the approximate analysis of a voltage
divider circuit?

 A) IB is essentially zero amperes.


 B) R1 and R2 are considered to be series elements.
 C) βRE ≥ 10R2
 D) All of the above*
13. It is desirable to design a bias circuit that is independent of the transistor
beta.

 A) True*
 B) False
14. Calculate the voltage across the 91 kΩ resistor.

 A) 18 V
 B) 9.22 V
 C) 3.23 V*
 D) None of the above
15. Calculate the value of VCEQ.
 A) 8.78 V
 B) 0V
 C) 7.86 V*
 D) 18 V
16. Calculate ICsat.

 A) 35.29 mA
 B) 5.45 mA
 C) 1.86 mA
 D) 4.72 mA*
17. Calculate VCE.
 A) 4.52 V
 B) –4.52 V*
 C) 4.48 V
 D) –4.48 V
18. Calculate VCE.

 A) –4.52 V
 B) 4.52 V*
 C) –9 V
 D) 9 V
19. Which of the following is (are) related to an emitter-follower configuration?
 A) The input and output signals are in phase.
 B) The voltage gain is slightly less than 1.
 C) Output is drawn from the emitter terminal.
 D) All of the above*
20. Determine the values of VCB and IB for this circuit.

 A) 1.4 V, 59.7 µA*


 B) –1.4 V, 59.7 µA
 C) –9.3 V, 3.58 µA
 D) 9.3 V, 3.58 µA
21. Calculate ETh for this network.

 A) −12.12 V
 B) 16.35 V
 C) −3.65 V*
 D) 10 V
22. Calculate Rsat if VCE = 0.3 V.

 A) 49.2 Ω*
 B) 49.2 kΩ
 C) 49.2 mΩ
 D) 49.2 MΩ
23. You can select the values for the emitter and collector resistors from the
information that is provided for this circuit.

 A) True
 B) False
24. In the case of this circuit, you must assume that VE = 0.1·VCC in order to
calculate RC and RE.
 A) True*
 B) False
25. Which of the following is (are) the application(s) of a transistor?

 A) Amplification of signal
 B) Switching and control
 C) Computer logic circuitry
 D) All of the above*
26. Calculate the storage time in a transistor switching network if toff is 56 ns, tf
= 14 ns, and tr = 20 ns.

 A) 70 ns
 B) 42 ns*
 C) 36 ns
 D) 34 ns
27. The total time required for the transistor to switch from the "off" to the "on"
state is designated as ton and defined as the delay time plus the time element.

 A) True*
 B) False
28. For an "on" transistor, the voltage VBE should be in the neighborhood of 0.7
V.

 A) True*
 B) False
29. For the typical transistor amplifier in the active region, VCE is usually about
_____ % to _____ % of VCC.

 A) 10, 60
 B) 25, 75*
 C) 40, 90
30. Which of the following is (are) a stability factor?

 A) S(ICO)
 B) S(VBE)
 C) S(β)
 D) All of the above*
31. In a fixed-bias circuit, which one of the stability factors overrides the other
factors?

 A) S(ICO)
 B) S(VBE)
 C) S(β)*
 D) Undefined
32. In a voltage-divider circuit, which one of the stability factors has the least
effect on the device at very high temperature?

 A) S(ICO)
 B) S(VBE)
 C) S(β)*
 D) Undefined
33. Use this table to determine the change in IC from 25ºC to 175ºC for RB / RE =
250 due to the S(ICO) stability factor. Assume an emitter-bias configuration.

 A) 140.34 nA
 B) 140.34 µA*
 C) 42.53 nA
 D) 0.14034 nA
34. Determine the change in IC from 25ºC to 175ºC for the transistor defined in
this table for fixed-bias with RB = 240 kΩ and β = 100 due to the S(VBE) stability
factor.

 A) 145.8 µA*
 B) 145.8 nA
 C) –145.8 µA
 D) –145.8 nA
35. Determine ICQ at a temperature of 175º C if ICQ = 2 mA at 25º C for RB / RE =
20 due to the S(β) stability factor.

 A) 2.417 mA*
 B) 2.392 mA
 C) 2.25 mA
 D) 2.58 mA
Fill-in-the-blanks Questions
1. By definition, quiescent means _____.

 A) quiet
 B) still
 C) inactive
 D) All of the above*
2. _____ should be considered in the analysis or design of any electronic
amplifiers.

 A) dc
 B) ac
 C) dc and ac*
 D) None of the above
3. For the dc analysis the network can be isolated from the indicated ac levels by
replacing the capacitor with _____.

 A) an open circuit equivalent*


 B) a short circuit equivalent
 C) a source voltage
 D) None of the above
4. In a fixed-bias circuit with a fixed supply voltage VCC’ the selection of a _____
resistor sets the level of _____ current for the operating point.

 A) collector, base
 B) base, base*
 C) collector, collector
 D) None of the above
5. Changes in temperature will affect the level of _____.

 A) current gain β
 B) leakage current ICEO
 C) both current gain β and leakage current ICEO*
 D) None of the above
6. In a fixed-bias circuit, the magnitude of IC is controlled by and therefore is a
function of _____.

 A) RB
 B) RC
 C) β
 D) RB and β*
7. For a transistor operating in the saturation region, the collector current IC is at
its _____ and the collector-emitter voltage VCE is to the _____.

 A) minimum, left of the VCEsat line


 B) minimum, right of the VCEsat line
 C) maximum, left of the VCEsat line*
 D) maximum, right of the VCEsat line
8. The dc load line is determined solely by the _____.

 A) base-emitter loop
 B) collector-emitter loop*
 C) base-collector loop
 D) None of the above
9. A change in value of _____ will create a new load line parallel to its previous
one in a fixed-bias circuit.

 A) RB
 B) RC
 C) VCC*
 D) VBE
10. In a fixed-bias circuit, the slope of the dc load line is controlled by _____.

 A) RB
 B) RC*
 C) VCC
 D) IB
11. The emitter resistor in an emitter-stabilized bias circuit appears to be _____
in the base circuit.

 A) larger*
 B) smaller
 C) the same
 D) None of the above
12. _____is the primary difference between the exact and approximate
techniques used in the analysis of a voltage divider circuit.

 A) Thevenin voltage ETh


 B) Thevenin resistance RTh*
 C) Base voltage VB
 D) RC
13. The Thevenin equivalent network is used in the analysis of the _____ circuit.

 A) fixed bias
 B) emitter-stabilized bias
 C) voltage divider*
 D) voltage feedback
14. The saturation current of a transistor used in a fixed-bias circuit is _____ its
value used in an emitter-stabilized or voltage-divider bias circuit for the same
values of RC’

 A) more than*
 B) the same as
 C) less than
 D) None of the above
15. In a collector feedback bias circuit, the current through the collector resistor
is _____ and the collector current is _____.

 A) IC’ IC
 B) IB + IC’ IC*
 C) IB’, IC
 D) None of the above
16. _____is the least stabilized circuit.

 A) Fixed bias*
 B) Emitter-stabilized bias
 C) Voltage divider
 D) Voltage feedback
17. _____ is less dependent on the transistor beta.

 A) Fixed bias
 B) Emitter bias
 C) Voltage divider*
 D) Voltage feedback
18. In a transistor-switching network, the level of the resistance between the
collector and emitter is _____ at the saturation and is _____at the cutoff.

 A) low, low
 B) low, high*
 C) high, high
 D) high, low
19. In a transistor-switching network, the operating point switches from _____ to
_____ regions along the load line.

 A) cutoff, active
 B) cutoff, saturation*
 C) active, saturation
 D) None of the above
20. For the typical transistor amplifier in the active region, VCE is usually about
_____ % to _____ % of VCC’

 A) 0, 100
 B) 25, 75*
 C) 45, 55
 D) None of the above
21. In any amplifier employing a transistor, the collector current IC is sensitive to
_____.

 A) β
 B) VBE
 C) ICO
 D) All of the above*
22. As the temperature increases, β _____, VBE _____, and ICO _____ in value
for every 10ºC.

 A) increases, decreases, doubles*


 B) decreases, increases, remains the same
 C) decreases, increases, doubles
 D) increases, increases, triples
23. A significant increase in leakage current due to increase in temperature
creates _____between IB curves.

 A) smaller spacing
 B) larger spacing*
 C) the same space as at lower temperature
 D) None of the above
24. The _____the stability factor, the _____sensitive the network is to variations
in that parameter.

 A) higher, more*
 B) higher, less
 C) lower, more
 D) None of the above
25. In an emitter-bias configuration, the _____ the resistance RE’, the _____ the
stability factor, and the _____ stable is the system.

 A) smaller, lower, less


 B) larger, more, more
 C) smaller, more, more
 D) larger, lower, more*
MCQs in Bipolar Junction Transistor Amplifiers
Choose the letter of the best answer in each questions.
1. Which of the following techniques can be used in the sinusoidal ac analysis of
transistor networks?

 A) Small-signal
 B) Large-signal
 C) Small- or large-signal*
 D) None of the above
2. What is the limit of the efficiency defined by = Po / Pi?

 A) Greater than 1
 B) Less than 1*
 C) Always 1
 D) None of the above
3. Which of the following define(s) the conversion efficiency?

 A) Ac power to the load/ac input power


 B) Ac power to the load/dc power supplied*
 C) Dc output power/ac input power
 D) All of the above
4. Which of the following should be done to obtain the ac equivalent of a
network?

 A) Set all dc sources to zero


 B) Replace all capacitors by a short-circuit equivalent.
 C) Remove all elements bypassed by the short-circuit equivalent.
 D) All of the above*
5. The _____ model suffers from being limited to a particular set of operating
conditions if it is to be considered accurate.

 A) hybrid equivalent*
 B) re
 C) β
 D) Thevenin
6. The _____ model fails to account for the output impedance level of the device
and the feedback effect from output to input.

 A) hybrid equivalent
 B) re*
 C) β
 D) Thevenin
7. Which of the following is (are) true regarding the input impedance for
frequencies in the midrange ≤ 100 kHz of a BJT transistor amplifier?

 A) The input impedance is purely resistive.


 B) It varies from a few ohms to mega ohms.
 C) An ohmmeter cannot be used to measure the small-signal ac input
impedance.
 D) All of the above*
8. Which of the following is (are) true regarding the output impedance for
frequencies in the midrange ≤ 100 kHz of a BJT transistor amplifier?

 A) The output impedance is purely resistive.


 B) It varies from a few ohms to more than 2 MΩ.
 C) An ohmmeter cannot be used to measure the small-signal ac output
impedance.
 D) All of the above*
9. What is the range of the current gain for BJT transistor amplifiers?

 A) less than 1
 B) 1 to 100
 C) above 100
 D) All of the above*
10. The input impedance of a BJT amplifier is purely _____ in nature and can
vary from a few _____ to _____.

 A) resistive, ohms, megohms*


 B) capacitive, microfarads, farads
 C) inductive, millihenrys, henrys
 D) None of the above
11. For BJT amplifiers, the _____ gain typically ranges from a level just less than
1 to a level that may exceed 1000.

 A) voltage
 B) current*
 C) impedance
 D) All of the above
12. What is the unit of the parameter ho?
 A) Volt
 B) Ohm
 C) Siemen*
 D) No unit
13. Which of the h-parameters corresponds to re in a common-base
configuration?

 A) hib*
 B) hfb
 C) hrb
 D) hob
14. What is the range of the input impedance of a common-base configuration?

 A) A few ohms to a maximum of 50 Ω*


 B) 1 kΩ to 5 kΩ
 C) 100 kΩ to 500 kΩ
 D) 1 MΩ to 2 MΩ
15. What is the typical value of the current gain of a common-base
configuration?

 A) Less than 1*
 B) Between 1 and 50
 C) Between 100 and 200
 D) Undefined
16. What is the controlling current in a common-base configuration?

 A) Ie*
 B) Ic
 C) Ib
 D) None of the above
17. What is the typical range of the output impedance of a common-emitter
configuration?

 A) 10 Ω to 100 Ω
 B) 1 kΩ to 5 kΩ
 C) 40 kΩ to 50 kΩ*
 D) 500 kΩ to 1 MΩ
18. Under which of the following conditions is the output impedance of the
network approximately equal to RC for a common-emitter fixed-bias
configuration?
 A) ro ≥ 10RC*
 B) ro < 10RC
 C) ro < ro
 D) ro > ro
19. Under which of the following condition(s) is the current gain Av ≈ β?

 A) ro ≥ 10RC
 B) RB ≥ 10re
 C) ro ≥ 10RC and RB ≥ 10re*
 D) None of the above
20. What does the negative sign in the voltage gain of the common-emitter fixed-
bias configuration indicate?

 A) The output and input voltages are 180º out of phase.*


 B) Gain is smaller than 1.
 C) Gain is larger than 1.
 D) None of the above
21. For the common-emitter fixed-bias configuration, there is a _____ phase shift
between the input and output signals.

 A) 0º
 B) 45º
 C) 90º
 D) 180º*
22. Which of the following configurations has an output impedance Zo equal to
RC?

 A) Fixed-bias common-emitter
 B) Common-emitter voltage-divider with bypass capacitor
 C) Common-emitter voltage-divider without bypass capacitor
 D) All of the above*
23. Which of the following configurations has a voltage gain of –RC /re?

 A) Fixed-bias common-emitter
 B) Common-emitter voltage-divider with bypass capacitor
 C) Fixed-bias common-emitter and voltage-divider with bypass capacitor*
 D) Common-emitter voltage-divider without bypass capacitor
24. Which of the following configurations has the lowest output impedance?

 A) Fixed-bias
 B) Voltage-divider
 C) Emitter-follower*
 D) None of the above
25. The _____ configuration is frequently used for impedance matching.

 A) fixed-bias
 B) voltage-divider bias
 C) emitter-follower*
 D) collector feedback
26. The emitter-follower configuration has a _____ impedance at the input and a
_____ impedance at the output.

 A) low, low
 B) low, high
 C) high, low*
 D) high, high
27. Which of the following gains is less than 1 for a common-base configuration?

 A) Ai*
 B) Av
 C) Ap
 D) None of the above
28. Which of the following conditions must be met to allow the use of the
approximate approach in a voltage-divider bias configuration?

 A) βre > 10R2


 B) βRE > 10R2
 C) βRE < 10R2*
 D) βre < 10R2
29. Which one of the following configurations has the lowest input impedance?

 A) Fixed-bias
 B) Common-base*
 C) Emitter-follower
 D) Voltage-divider?
30. For the collector dc feedback configuration, there is a _____ phase shift
between the input and output signals.

 A) 0º
 B) 45º
 C) 90º
 D) 180º*
31. Which of the following represent(s) the advantage(s) of the system approach
over the r-model approach?

 A) Thevenin’s theorem can be used.


 B) The effect of changing the load can be determined by a simple equation.
 C) There is no need to go back to the ac equivalent model and analyze the
entire network.
 D) All of the above*
32. The loaded voltage gain of an amplifier is always more than the no-load level.

 A) True
 B) False*
33. The smaller the level of RL, the larger the level of ac voltage gain.

 A) True
 B) False*
34. Which of the following is (are) true to achieve a good overall voltage gain for
the circuit?

 A) The effect of Rs and RL must be considered as a product.


 B) The effect of Rs and RL must be considered as a product and evaluated
individually.*
 C) The effect of Rs and RL must be evaluated individually.
 D) None of the above
35. The _____ the source resistance and/or _____ the load resistance, the less
the overall gain of an amplifier.

 A) smaller, smaller
 B) smaller, larger
 C) larger, smaller*
 D) larger, larger
36. The current gain for the Darlington connection is _____.

 A) β1 • (β2/2)
 B) β1 • β2*
 C) β1 / β2
 D) β1 • (β2 – 1)
37. What is the voltage gain of a feedback pair connection?

 A) 1*
 B) –1
 C) 100
 D) –100
38. Which of the following is referred to as the reverse transfer voltage ratio?

 A) hi
 B) hr*
 C) hf
 D) ho
39. In an unbypassed emitter bias configuration hie replaces _____ in the re
model.

 A) re
 B) β
 C) βre*
 D) Ib
Fill-in-the-blanks Questions
1. The _____ of the input signal is one of the first concerns in the sinusoidal ac
analysis of transistor networks.

 A) period
 B) frequency
 C) magnitude*
 D) None of the above
2. The _____ model(s) is (are) commonly used in the small-signal ac analysis of
transistor networks.

 A) re
 B) hybrid equivalent
 C) re and hybrid equivalent*
 D) None of the above
3. The peak value of the ac input signal is controlled by the _____ in a transistor
network for the frequencies in the low to midrange.

 A) resistors
 B) applied dc voltage*
 C) capacitors
 D) None of the above
4. _____ can be applied to determine the response of the ac equivalent circuit.
 A) Mesh analysis
 B) Node analysis
 C) Thevenin’s theorem
 D) All of the above*
5. For transistor amplifiers, the no-load voltage gain is _____ the loaded voltage
gain.

 A) smaller than
 B) greater than*
 C) the same as
 D) None of the above
6. The input and output signals are _____ for the typical transistor amplifier at
frequencies that permit ignoring the effects of the reactive elements.

 A) in phase
 B) 180º out of phase
 C) either in phase or 180º out of phase*
 D) None of the above
7. One junction of an operating transistor is _____ and the other one is _____.

 A) forward-biased, forward-biased
 B) forward-biased, reverse-biased*
 C) reverse-biased, reverse-biased
 D) None of the above
8. For a common-base configuration, the input impedance is relatively _____ and
the output impedance quite _____.

 A) high, small
 B) small, high*
 C) small, small
 D) high, high
9. The output voltage and the input voltage are _____ for the common-base
configuration.

 A) 45º out of phase


 B) 90º out of phase
 C) 180º out of phase
 D) in phase*
10. In a common-emitter configuration _____ is the controlling current while
_____ is the controlled current.
 A) IC, IB
 B) IC, IE
 C) IB, IC*
 D) None of the above
11. The level of re is determined by _____.

 A) α
 B) IE*
 C) β
 D) IB
12. The output voltage and the input voltage are _____ for the common-emitter
configuration.

 A) in phase
 B) 45º out of phase
 C) 90º out of phase
 D) 180º out of phase*
13. The common-emitter configuration has a _____ level of input impedance with
a _____ voltage and current gain.

 A) moderate, high*
 B) low, moderate
 C) low, low
 D) high, low
14. _____ refers to the forward transfer current ratio.

 A) hi
 B) hr
 C) hf*
 D) ho
15. For the common-emitter and common-base configurations, the magnitude of
_____ and _____ is often not included in the model.

 A) hr, ho*
 B) hi, he
 C) hi, hr
 D) he, ho
16. In a fixed-bias network, the input signal Vi is applied to the _____ of the
transistor while the output Vo is off the _____.
 A) base, collector*
 B) base, emitter
 C) emitter, collector
 D) None of the above
17. In a voltage-divider bias configuration, the voltage-divider equation is used to
determine the _____.

 A) ac level of Vb
 B) dc level of IB
 C) dc level of VB*
 D) ac level of Ib
18. In a voltage-divider bias configuration, there can be a measurable difference
in the results for _____ if the condition ro ≥ 10RC is not satisfied.

 A) Zo
 B) Av
 C) Ai*
 D) All of the above
19. The bypass capacitor in a common-emitter configuration _____ the voltage
gain.

 A) significantly decreases
 B) significantly increases*
 C) slightly increases
 D) slightly decreases
20. In an emitter-follower, the voltage gain is _____.

 A) slightly less than 1*


 B) slightly more than 1
 C) a very large value
 D) None of the above
21. In an emitter-follower, the output voltage is _____ with the input voltage.

 A) 45º out of phase


 B) 90º out of phase
 C) 180º out of phase
 D) in phase*
22. An emitter-follower has _____ impedance at the input and _____ impedance
at the output.
 A) high, high
 B) low, high
 C) high, low*
 D) low, low
23. _____ is slightly affected if the condition ro ≥ 10RE is not satisfied in the
analysis of an emitter-follower configuration.

 A) Zi
 B) Zo
 C) Av*
 D) Ai
24. A common-base configuration has _____ impedance at the input and _____
impedance at the output.

 A) high, high
 B) high, low
 C) low, low
 D) low, high*
25. In a common-base configuration, the input and output voltages are _____ and
the output and input currents are _____.

 A) 180º out of phase, 180º out of phase


 B) 180º out of phase, in phase
 C) in phase,180º out of phase
 D) in phase, in phase*
26. Ideally, the changes in the load resistor or the source resistor should have
_____ effect on all the parameters of the two-port model.

 A) a great
 B) a moderate
 C) no*
 D) None of the above
27. The loaded voltage gain of an amplifier is _____ the no-load level.

 A) always more than


 B) always less than*
 C) always the same as
 D) None of the above
28. The coupling capacitor places the load and collector resistors in a _____
arrangement.
 A) series
 B) parallel*
 C) series-parallel
 D) None of the above
29. The dc load line and ac load line both have the same _____ .

 A) x-intercept
 B) y-intercept
 C) slope
 D) Q-point*
30. The _____ the level of RL, the _____ the level of ac voltage gain.

 A) smaller, higher
 B) larger, lower
 C) smaller, lower*
 D) None of the above
31. The _____ the source resistance, the _____ the overall gain of an amplifier.

 A) larger, higher
 B) larger, lower*
 C) lower, lower
 D) None of the above
32. The ac voltage gain of a Darlington connection is about _____.

 A) 0
 B) 1*
 C) βD
 D) None of the above
33. The feedback pair uses a(n) _____ transistor driving a(n) _____ transistor, the
two devices acting effectively much like one pnp transistor.

 A) pnp, npn*
 B) pnp, pnp
 C) npn, npn
 D) None of the above
34. In an unbypassed emitter-bias configuration _____ replaces re in the hybrid
equivalent circuit.

 A) hie*
 B) hfe
 C) hre
 D) hoe
35. In a hybrid equivalent circuit, ______ is determined to make it easier to find
the other parameters.

 A) Zi
 B) Zo
 C) Ai
 D) Av*

MCQs in Field Effect Transistor Devices


Choose the letter of the best answer in each questions.
1. Which of the following controls the level of ID?

 A) VGS*
 B) VDS
 C) IG
 D) VDG
2. Which of the following is (are) not an FET?

 A) n-channel
 B) p-channel
 C) p-n channel*
 D) n-channel and p-channel
3. What is the range of an FET’s input impedance?

 A) 10 Ω to 1 kΩ
 B) 1 kΩ to 10 kΩ
 C) 50 kΩ to 100 kΩ
 D) 1 MΩ to several hundred MΩ*
4. Which of the following transistor(s) has (have) depletion and enhancement
types?

 A) BJT
 B) JFET
 C) MOSFET*
 D) None of the above
5. A BJT is a _____-controlled device. The JFET is a _____ – controlled device.

 A) voltage, voltage
 B) voltage, current
 C) current, voltage*
 D) current, current
6. The BJT is a _____ device. The FET is a _____ device.

 A) bipolar, bipolar
 B) bipolar, unipolar*
 C) unipolar, bipolar
 D) unipolar, unipolar
7. Which of the following is (are) the terminal(s) of a field-effect transistor (FET).

 A) Drain
 B) Gate
 C) Source
 D) All of the above*
8. What is the level of IG in an FET?

 A) Zero amperes*
 B) Equal to ID
 C) Depends on VDS
 D) Undefined
9. At which of the following is the level of VDS equal to the pinch-off voltage?

 A) When ID becomes equal to IDSS


 B) When VGS is zero volts
 C) IG is zero
 D) All of the above*
10. At which of the following condition(s) is the depletion region uniform?

 A) No bias*
 B) VDS > 0 V
 C) VDS = VP
 D) None of the above
11. Refer to the following characteristic curve. Calculate the resistance of the
FET at VGS = –0.25 V if ro = 10 kΩ.
 A) 1.1378 kΩ
 B) 113.78 Ω
 C) 11.378 Ω
 D) 11.378 kΩ*
12. What is the level of drain current ID for gate-to-source voltages VGS less
than (more negative than) the pinch-off level?

 A) zero amperes*
 B) IDSS
 C) Negative value
 D) Undefined
13. The three terminals of the JFET are the _____, _____, and _____.

 A) gate, collector, emitter


 B) base, collector, emitter
 C) gate, drain, source*
 D) gate, drain, emitter
14. The level of VGS that results in ID = 0 mA is defined by VGS = _____.

 A) VGS(off)
 B) VP*
 C) VDS
 D) None of the above
15. The region to the left of the pinch-off locus is referred to as the _____ region.

 A) saturation
 B) cutoff
 C) ohmic*
 D) All of the above
16. Which of the following represent(s) the cutoff region for an FET?
 A) ID = 0 mA
 B) VGS = VP
 C) IG = 0
 D) All of the above*
17. Referring to this transfer curve. Calculate (using Shockley’s equation) VGS at
ID = 4mA.

 A) 2.54 V
 B) –2.54 V*
 C) –12 V
 D) Undefined
18. Referring to this transfer curve, determine ID at VGS = 2 V.

 A) 0.444 mA*
 B) 1.333 mA
 C) 0.111 mA
 D) 4.444 mA
19. What is the ratio of ID / IDSS for VGS = 0.5 VP?

 A) 0.25*
 B) 0.5
 C) 1
 D) 0
20. The drain current will always be one-fourth of IDSS as long as the gate-to-
source voltage is _____ the pinch-off value.

 A) one-fourth
 B) one-half*
 C) three-fourths
 D) None of the above
21. Which of the following ratings appear(s) in the specification sheet for an
FET?

 A) Voltages between specific terminals


 B) Current levels
 C) Power dissipation
 D) All of the above*
22. Refer to this portion of a specification sheet. Determine the values of reverse-
gate-source voltage and gate current if the FET was forced to accept it.

 A) 25 Vdc, –200 nAdc


 B) –25 Vdc, 10 mAdc*
 C) –6 Vdc, –1.0 nAdc
 D) None of the above
23. Hand-held instruments are available to measure _____ for the BJT.
 A) βdc*
 B) IDSS
 C) VP
 D) All of the above
24. How many terminals can a MOSFET have?

 A) 2
 B) 3
 C) 4
 D) 3 or 4*
25. Which of the following applies to MOSFETs?

 A) No direct electrical connection between the gate terminal and the channel
 B) Desirable high input impedance
 C) Uses metal for the gate, drain, and source connections
 D) All of the above*
26. Referring to the following transfer curve, determine the level of VGS when the
drain current is 20 mA.

 A) 1.66 V*
 B) –1.66 V
 C) 0.66 V
 D) –0.66 V
27. Refer to the following curves. Calculate ID at VGS = 1 V.

 A) 8.167 mA
 B) 4.167 mA*
 C) 6.167 mA
 D) 0.616 mA
28. It is the insulating layer of _____ in the MOSFET construction that accounts
for the very desirable high input impedance of the device.

 A) SiO
 B) GaAs
 C) SiO2*
 D) HCl
29. Refer to the following figure. Calculate VGS at ID = 8 mA for k = 0.278 × 10–2
A/V2.

 A) 3.70 V*
 B) 5.36 V
 C) 7.36 V
 D) 2.36 V
30. The transfer curve is not defined by Shockley’s equation for the _____.

 A) JFET
 B) depletion-type MOSFET
 C) enhancement-type MOSFET*
 D) BJT
31. Which of the following applies to a safe MOSFET handling?

 A) Always pick up the transistor by the casing.


 B) Power should always be off when network changes are made.
 C) Always touch ground before handling the device.
 D) All of the above*
32. What is the purpose of adding two Zener diodes to the MOSFET in this
figure?

 A) To reduce the input impedance


 B) To protect the MOSFET for both polarities*
 C) To increase the input impedance
 D) None of the above
33. Which of the following is (are) the advantage(s) of VMOS over MOSFETs?

 A) Reduced channel resistance


 B) Higher current and power ratings
 C) Faster switching time
 D) All of the above*
34. Which of the following FETs has the lowest input impedance?

 A) JFET*
 B) MOSFET depletion-type
 C) MOSFET enhancement-type
 D) None of the above
35. Which of the following input impedances is not valid for a JFET?

 A) 1010 Ω
 B) 109 Ω
 C) 108 Ω*
 D) 1011 Ω
Fill-in-the-blanks Questions
1. A junction field-effect transistor (JFET) is a _____ device.

 A) current-controlled
 B) voltage-controlled*
 C) voltage-current controlled
 D) None of the above
2. The FET is a _____ device depending solely on either electron (n-channel) or
hole (p-channel) conduction.

 A) unipolar*
 B) bipolar
 C) tripolar
 D) None of the above
3. One of the most important characteristics of the FET is its _____ impedance.

 A) low input
 B) medium input
 C) high input*
 D) None of the above
4. The _____ transistor has become one of the most important devices used in
the design and construction of integrated circuits for digital computers.

 A) MOSFET*
 B) BJT
 C) JFET
 D) None of the above
5. In the n-channel transistor, the drain and source are connected to the _____
channel while the gate is connected to the two layers of _____ material.

 A) p-type, n-type
 B) p-type, p-type
 C) n-type, p-type*
 D) n-type, n-type
6. In an FET transistor, the depletion region is _____ near the top of both p-type
materials.

 A) wider*
 B) narrower
 C) the same as the rest of the depletion region
 D) None of the above
7. The pinch-off voltage continues to drop in a _____ manner as VGS becomes
more and more negative.

 A) linear
 B) parabolic*
 C) cubic
 D) None of the above
8. The region to the right of the pinch-off locus is commonly referred to as the
_____ region.

 A) constant-current
 B) saturation
 C) linear amplification
 D) All of the above*
9. As VGS becomes _____ negative, the slope of each curve in the
characteristics becomes _____ horizontal corresponding with an increasing
resistance level.

 A) less, more
 B) more, less
 C) more, more*
 D) None of the above
10. The transfer curve can be obtained by _____.

 A) using Shockley’s equation


 B) using both Shockley’s equation and by output characteristics*
 C) characteristics
 D) None of the above
11. The active region of an FET is bounded by _____.

 A) ohmic region
 B) cutoff region
 C) power line
 D) All of the above*
12. A(n) _____ can be used to check the condition of an FET.

 A) digital display meter (DDM)


 B) ohmmeter (VOM)
 C) curve tracer*
 D) All of the above
13. In a curve tracer, the _____ reveals the distance between the VGS curves for
the n-channel device.

 A) vertical sens.
 B) horizontal sens.
 C) Per step*
 D) gm
14. In an FET circuit, _____ is normally the parameter to be determined first.

 A) VGS*
 B) VDS
 C) VDG
 D) ID
15. The primary difference between the construction of a MOSFET and an FET is
the _____.

 A) construction of the gate connection*


 B) low input impedance
 C) threshold voltage
 D) None of the above
16. The primary difference between the construction of depletion-type and
enhancement-type MOSFETs is _____.

 A) the size of the transistor


 B) the absence of the channel*
 C) the reverse bias junction
 D) All of the above
17. The level of _____ that results in the significant increase in drain current in
enhancement-type MOSFETs is called threshold voltage VT’.

 A) VDD
 B) VDS
 C) VGS*
 D) VDG
18. In an n-channel enhancement-type MOSFET with a fixed value of VT’, the
_____ the level of VGS’, the _____ the saturation level for VDS’.

 A) higher, more*
 B) higher, less
 C) lower, lower
 D) None of the above
19. The enhancement-type MOSFET is in the cutoff region if _____.

 A) applied VGS is larger than VGS(Th)


 B) applied VGS is less than or equal to VGS(Th)*
 C) VGS has a positive level
 D) None of the above
20. The specification sheet provides _____ to calculate the value of k for
enhancement-type MOSFETs.

 A) VGS(on)
 B) ID(on)
 C) VGS(Th)
 D) All of the above*
21. _____ has high input impedance, fast switching speeds, and lower operating
power levels.

 A) CMOS*
 B) FET
 C) BJT
 D) None of the above
22. The FET resistance in the ohmic region is _____ at VP and _____ at the
origin.

 A) smallest, largest
 B) largest, smallest*
 C) larger, smaller
 D) smaller, larger
23. The silicon dioxide (SiO2) layer used in a MOSFET is _____.

 A) an insulator*
 B) a conductor
 C) a semiconductor
 D) None of the above
24. In an n-channel depletion-type MOSFET the region of positive gate voltages
on the drain or transfer characteristics is referred to as the _____ region with the
region between cutoff and the saturation level of ID referred to as the _____
region.

 A) depletion, enhancement
 B) enhancement, enhancement
 C) enhancement, depletion*
 D) None of the above
25. VMOS FETs have a _____ temperature coefficient that will combat the
possibility of thermal runaway.

 A) positive
 B) negative*
 C) zero
 D) None of the above

MCQs in DC Biasing – FETs


Choose the letter of the best answer in each questions.
1. What is the approximate current level in the gate of an FET in dc analysis?

 A) 0 A*
 B) 0.7 mA
 C) 0.3 mA
 D) Undefined
2. Which of the following current equations is true?

 A) IG = ID
 B) IG = IS
 C) ID = IS*
 D) IG = ID = IS
3. For the FET, the relationship between the input and output quantities is _____
due to the _____ term in Shockley’s equation.

 A) nonlinear, cubed
 B) linear, proportional
 C) nonlinear, squared*
4. The input controlling variable for a(n) _____ is a current level and a voltage
level for a(n) _____.

 A) BJT, FET*
 B) FET, BJT
 C) FET, FET
 D) BJT, BJT
5. Calculate the value of VDS.

 A) 0 V
 B) 8 V
 C) 4.75 V
 D) 16 V*
6. The self-bias configuration eliminates the need for two dc supplies.

 A) True*
 B) False
7. Which of the following is (are) true of a self-bias configuration compared to a
fixed-bias configuration?

 A) One of the dc supplies is eliminated.


 B) A resistor RS is added.
 C) VGS is a function of the output current ID.
 D) All of the above*
8. Which of the following represents the voltage level of VGS in a self-bias
configuration?

 A) VG
 B) VGS(off)
 C) VS*
 D) VP
9. What is the new value of RD when there is 7 V across VDS?

 A) 3 kΩ
 B) 3.3 kΩ*
 C) 4 kΩ
 D) 5 kΩ
10. Which of the following is a false statement regarding the dc load line when
comparing self-bias and voltage-divider configurations?

 A) Both are linear lines.


 B) Both cross the origin.*
 C) Both intersect the transfer characteristics.
 D) Both are obtained by writing Kirchhoff’s voltage law (KVL) at the input
side loop.
11. For what value of RD is the voltage across VDS zero?

 A) 2.400 kΩ
 B) 5.167 kΩ*
 C) 6.167 kΩ
 D) 6.670 kΩ
12. Calculate the value of VDS’.

 A) 0 V
 B) 0.35 V
 C) 3.8 V*
 D) 33.5 V
13. Which of the following describe(s) the difference(s) between JFETs and
depletion-type MOSFETs?

 A) VGS can be positive or negative for the depletion-type.


 B) ID can exceed IDSS for the depletion-type.
 C) The depletion-type can operate in the enhancement mode.
 D) All of the above*
14. At what value of RS does the circuit switch from depletion mode to
enhancement mode?

 A) 250 Ω*
 B) 500 Ω
 C) 10 MΩ
 D) None of the above
15. For what value of R2 is VGSQ equal to 1 V?

 A) 10 MΩ`
 B) 100 MΩ*
 C) 110 MΩ
 D) 220 MΩ
16. Depletion-type MOSFETs do not permit operating points with positive values
of VGS and levels of ID that exceed IDSS.

 A) True
 B) False*
17. For what value of RS can the depletion-type MOSFETs operate in
enhancement mode?

 A) 2.4 kΩ
 B) 5 kΩ
 C) 6.2 kΩ*
 D) None of the above
18. Determine the value of VDSQ.

 A) 3.5 V*
 B) 4.86 V
 C) 7.14 V
 D) 10 V
19. Calculate the value of VDSQ.

 A) 0 V
 B) 20 V
 C) 30 V
 D) 40 V*
20. What are the voltages across RD and RS?

 A) 0 V, 0 V*
 B) 5 V, 5 V
 C) 10 V, 10 V
 D) 20 V, 20 V
21. Calculate VD.

 A) 23.0 V
 B) 17.0 V*
 C) 4.6 V
 D) 12.4 V
22. Specification sheets typically provide the value of the constant k for
enhancement-type MOSFETs.

 A) True
 B) False*
23. Calculate VDS’.

 A) 0 V*
 B) 6 V
 C) 16 V
 D) 11 V
24. Calculate VCE’.

 A) 0 V
 B) 2 V
 C) 3 V
 D) 5.34 V*
25. Given the values of VDQ and IDQ for this circuit, determine the required
values of RD and RS.
 A) 2 kΩ, 2 kΩ
 B) 1 kΩ, 5.3 kΩ
 C) 3.2 kΩ, 400 Ω*
 D) 2.5 kΩ, 5.3 kΩ
26. Calculate the value of RS. Assume VGSQ = −2V.

 A) 0 kΩ
 B) 1.68 kΩ*
 C) 6.81 kΩ`
 D) 8.5 kΩ
27. Calculate the value of RD’.

 A) 2 kΩ
 B) 3 kΩ
 C) 3.5 kΩ
 D) 4.13 kΩ*
28. In the design of linear amplifiers, it is good design practice to choose
operating points that do not crowd the saturation level or cutoff regions.

 A) True*
 B) False
29. Seldom are current levels measured since such maneuvers require
disturbing the network structure to insert the meter.

 A) True*
 B) False
30. Calculate the value of VDS.

 A) –3 V*
 B) 3 V
 C) –4 V
 D) 4 V
31. Determine the quiescent values of ID and VGS.

 A) 1.2 mA, –1.8 V


 B) 1.5 mA, –1.5 V*
 C) 2.0 mA, –1.2 V
 D) 3.0 mA, –0.8 V
32. Calculate VDSQ.

 A) 1.0 V
 B) 1.50 V
 C) 2.56 V
 D) 3.58 V*
33. On the universal JFET bias curve, the vertical scale labelled _____ can, in
itself, be used to find the solution to _____ configurations.

 A) m, fixed-bias*
 B) M, fixed-bias
 C) M, voltage-bias
 D) m, voltage-bias
34. Through proper design, a ______ can be introduced that will affect the
biasing level of a voltage-controlled JFET resistor.

 A) photodiode
 B) thermistor*
 C) laser diode
 D) Zener diode
35. For the noninverting amplifier, one of the most important advantages
associated with using a JFET for control is the fact that it is _____ rather than
_____ control.

 A) dc, ac*
 B) ac, dc
Fill-in-the-blanks Questions
1. For the field-effect transistor, the relationship between the input and the
output quantities is _____.

 A) linear
 B) nonlinear*
 C) 3rd degree
 D) None of the above
2. The input controlling variable for an FET transistor is a _____ level.

 A) resistor
 B) current
 C) voltage*
 D) All of the above
3. The controlled variable on the output side of an FET transistor is a _____ level.

 A) current*
 B) voltage
 C) resistor
 D) None of the above
4. For _____, Shockley’s equation is applied to relate the input and the output
quantities.

 A) JFETs
 B) depletion-type MOSFETs
 C) enhancement-type MOSFETs
 D) JFETs and depletion-type MOSFETs*
5. The coupling capacitors are _____ for the dc analysis and _____________ for
the ac analysis.

 A) open-circuit, low impedance*


 B) short-circuit, low impedance
 C) open-circuit, high impedance
 D) None of the above
6. In a fixed-bias configuration, the voltage level of VGS is equal to _____.

 A) VS
 B) VG
 C) VGS(off)
 D) VP
7. The ratio of current ID to IDSS is equal to _____ for a fixed-bias configuration.

 A) 0
 B) 0.25
 C) 0.5
 D) 1*
8. When plotting the transfer characteristics, choosing VGS = 0.5VP will result in
a drain current level of _____ IDSS.

 A) 0
 B) 0.25*
 C) 0.5
 D) 1
9. The dc load line is drawn using the equation obtained by applying Kirchhoff’s
voltage law (KVL) at _____ side loop(s) of the circuit.

 A) the output
 B) the input*
 C) both the input and output
 D) None of the above
10. The slope of the dc load line in a self-bias configuration is controlled by
_____.

 A) VDD
 B) RD
 C) RG
 D) RS*
11. _____ levels of RS result in _____ quiescent values of ID and _____ negative
values of VGS.

 A) Increased, lower, less*


 B) Increased, higher, less
 C) Increased, higher, more
 D) Increased, less, lower
12. The slope of the dc load line in a voltage-divider is controlled by _____.

 A) R1
 B) R2
 C) RS
 D) All of the above*
13. In a depletion-type MOSFET, the transfer characteristic rises _____ as VGS
becomes more positive.

 A) less rapidly
 B) more rapidly*
 C) the same
 D) None of the above
14. In _____ configuration(s) a depletion-type MOSFET can operate in
enhancement mode.

 A) self-bias
 B) fixed-bias with no VGG
 C) voltage-divider*
 D) None of the above
15. In an enhancement-type MOSFET, the drain current is zero for levels of VGS
less than the _____ level.
 A) VGS(Th)*
 B) VGS(off)
 C) VP
 D) VDD
16. Specification sheets typically provide _____ for enhancement-type MOSFETs.

 A) the threshold voltage VGS(Th)


 B) a level of drain current ID(on)
 C) an ID(on)
 D) All of the above*
17. In a feedback-bias configuration, the slope of the dc load line is controlled by
_____.

 A) RG
 B) RD*
 C) VDG
 D) None of the above
18. For R2 smaller than _____ kΩ the voltage VD is equal to VDD = 16 V.

 A) 3.75*
 B) 5
 C) 12.0
 D) 24
19. _____ must be considered in the total design process.

 A) Dc conditions
 B) Level of amplification
 C) Signal strength
 D) All of the above*
20. In a JFET, the level of _____ is limited to values between 0 V and –VP.

 A) VSQ
 B) VDGQ
 C) VDSQ
 D) VGSQ*
21. The level of VDS is typically between _____ % and _____ % of VDD.

 A) 0, 100
 B) 10, 90
 C) 25, 75*
 D) None of the above
22. In a universal JFET bias curve, the vertical scale labeled m is used to find the
solution to the _____ configuration.

 A) fixed-bias*
 B) self-bias
 C) voltage-divider
 D) None of the above
23. In a universal JFET bias curve, the vertical scale labeled M is used for finding
the solution to the _____ configuration.

 A) fixed-bias
 B) self-bias
 C) voltage-divider*
 D) None of the above
24. In a universal JFET bias curve, the horizontal axis is _____.

 A) VDS
 B) ID / IDSS
 C) the normalized level *
 D) VGS
25. In p-channel FETs, the level of VGS is _____ while the level of VDS is _____.

 A) negative, negative
 B) positive, positive
 C) negative, positive
 D) positive, negative*
MCQs in Field Effect Transistor Amplifiers
Choose the letter of the best answer in each questions.
1. FET amplifiers provide ________.

 A) excellent voltage gain


 B) high input impedance
 C) low power consumption
 D) All of the above*
2. A BJT is a ________-controlled device.

 A) current*
 B) voltage
 C) power
 D) resistance
3. An FET is a ________-controlled device.

 A) current
 B) voltage*
 C) power
 D) resistance
4. The E-MOSFET is quite popular in ________ applications.

 A) digital circuitry
 B) high-frequency
 C) buffering
 D) All of the above*
5. What is the range of gm for JFETs?

 A) 1 µS to 10 µS
 B) 100 µS to 1000 µS
 C) 1000 µS to 5000 µS*
 D) 10000 µS to 100000 µS
6. For what value of ID is gm equal to 0.5 gm0?

 A) 0 mA
 B) 0.25 IDSS*
 C) 0.5 IDSS
 D) IDSS
7. What is the typical value for the input impedance Zi for JFETs?

 A) 100 kΩ
 B) 1 MΩ
 C) 10 MΩ
 D) 1000 MΩ*
8. Referring to the transfer characteristics shown below, calculate gm at VGSQ =
–1 V.

 A) 2 mS
 B) 3 mS*
 C) 4 mS
 D) 5 mS
9. Use the following equation to calculate gm for a JFET having IDSS = 10 mA,
VP = –5 V, and VGSQ = –2.5 V.

 A) 2 mS*
 B) 3 mS
 C) 4 mS
 D) 5 mS
10. Referring to the following figure, calculate gm for VGSQ = –1.25 V.

 A) 2 mS
 B) 2.5 mS
 C) 2.75 mS*
 D) 3.25 mS
11. Referring to this figure, obtain gm for ID = 6 mA.

 A) 2.83 mS
 B) 3.00 mS
 C) 3.25 mS
 D) 3.46 mS*
12. Referring to the figure below, determine the output impedance for VGS = –3 V
at VDS = 5 V.
 A) 100 kΩ*
 B) 80 kΩ
 C) 25 kΩ
 D) 5 kΩ
13. Calculate gm and rd if yfs = 4 mS and yos = 15 ΩS.

 A) 4 mS, 66.7 kΩ*


 B) 4 mS, 15 kΩ
 C) 66.7 kΩ, 4 mS
 D) None of the above
14. The steeper the slope of the ID versus VGS curve, the ________ the level of
gm.

 A) less
 B) same
 C) greater*
15. When VGS = 0.5 Vp gm is ________ the maximum value.

 A) one-fourth
 B) one-half*
 C) three-fourths
 D) two-thirds
16. If ID = IDSS / 2, gm = ___________ gmo.

 A) 1
 B) 0.707*
 C) 0.5
 D) 1.414
17. The more horizontal the characteristic curves on the drain characteristics,
the ________ the output impedance.
 A) less
 B) same
 C) greater*
18. What is (are) the function(s) of the coupling capacitors C1 and C2 in an FET
circuit?

 A) to create an open circuit for dc analysis


 B) to isolate the dc biasing arrangement from the applied signal and load
 C) to create a short-circuit equivalent for ac analysis
 D) All of the above*
19. Where do you get the level of gm and rd for an FET transistor?

 A) from the dc biasing arrangement


 B) from the specification sheet
 C) from the characteristics
 D) All of the above*
20. Referring to this figure, find Zo if yos = 20 µS.

 A) 1.85 kΩ
 B) 1.92 kΩ*
 C) 2.05 kΩ
 D) 2.15 kΩ
21. Referring to this figure, calculate Av if yos = 20 µS.

 A) –3.48
 B) –3.56
 C) –3.62*
 D) –4.02
22. For the fixed-bias configuration, if rd < 10 • RD, then Zo = ________.

 A) RD
 B) RD || rd*
 C) RG
 D) -gm • (RD || rd)
23. Which of the following is a required condition to simplify the equations for Zo
and Av for the self-bias configuration?

 A) rd ≤ 10RD
 B) rd = RD
 C) rd ≥ 10RD*
 D) None of the above
24. Referring to this figure, calculate Zo if yos = 40 µS.

 A) 2.92 kΩ*
 B) 3.20 kΩ
 C) 3.25 kΩ
 D) 3.75 kΩ
25. On which of the following parameters does rd have no or little impact in a
source-follower configuration?

 A) Zi
 B) Zo
 C) Av
 D) All of the above*
26. Referring to this figure, calculate Zo for VGSQ = –3.2 V.

 A) 362.52 Ω
 B) 340.5 Ω
 C) 420.5 Ω
 D) 480.9 Ω*
27. Referring to this figure, calculate Zi for yos = 20 µS. Assume VGSQ = −2.2V.

 A) 300.2 Ω
 B) 330.4 Ω*
 C) 340.5 Ω
 D) 350.0 Ω
28. Which of the following is (are) related to depletion-type MOSFETs?

 A) VGSQ can be negative, zero, or positive.


 B) gm can be greater or smaller than gm0’.
 C) ID can be larger than IDSS’.
 D) All of the above*
29. Referring to this figure, calculate Av for yos = 58 µS.

 A) –7.29*
 B) –7.50
 C) –8.05
 D) –8.55
30. Referring to this figure, calculate Zi if rd = 19 kΩ.

 A) 2.42 MΩ
 B) 2.50 MΩ
 C) 2.53 MΩ*
 C) 2.59 MΩ
31. Referring to this figure, calculate Zo if rd = 19 kΩ.

 A) 1.75 kΩ
 B) 1.81 kΩ*
 C) 1.92 kΩ
 D) 2.00 kΩ
32. Referring to this figure, calculate Av if rd = 19 kΩ.

 A) –2.85
 B) –3.26
 C) –2.95*
 D) –3.21
33. Determine the value for RD if the ac gain is 8.

 A) 1.51 kΩ
 B) 1.65 kΩ*
 C) 1.85 kΩ
 D) 2.08 kΩ
34. Referring to this figure, calculate the value of RD if the ac gain is 10. Assume
VGSQ = ¼Vp.

 A) 2.2 kΩ
 B) 2.42 kΩ
 C) 2.62 kΩ
 D) 2.82 kΩ*
35. For an FET small-signal amplifier, one could go about troubleshooting a
circuit by ________.

 A) viewing the circuit board for poor solder joints


 B) using a dc meter
 C) applying a test ac signal
 D) All of the above*
Fill-in-the-blanks Questions
1. A field-effect transistor amplifier provides excellent voltage gain with the
added feature of a _____ input impedance.

 A) low
 B) medium
 C) high*
 D) None of the above
2. The depletion MOSFET circuit has a _____ input impedance than a similar
JFET configuration.

 A) much higher*
 B) much lower
 C) lower
 D) higher
3. The _____ is quite popular in digital circuits, especially in CMOS circuits that
require very low power consumption.

 A) JFET
 B) BJT
 C) D-type MOSFET
 D) E-type MOSFET*
4. _____ is the amplification factor in FET transistor amplifiers.

 A) Zi
 B) gm*
 C) ID
 D) IG
5. _____ is an undefined quantity in a JFET.

 A) Ai*
 B) Av
 C) Zi
 D) Zo
6. The _____ controls the _____ of an FET.

 A) ID’, VGS
 B) VGS’, ID*
 C) IG’, VDS
 D) IG’, ID
7. Transconductance is the ratio of changes in _____.

 A) ID to VGS*
 B) ID to VDS
 C) VGS to IG
 D) VGS to VDS
8. The transconductance gm _____ as the Q-point moves from Vp to IDSS

 A) decreases
 B) remains the same
 C) increases*
 D) None of the above
9. gm has its maximum value for a JFET at _____.

 A) Vp
 B) 0.5 Vp
 C) 0.3 Vp
 D) IDSS*
10. The value of gm is at its maximum gm0 at VGS equal to _____ and zero at
VGS equal to _____.

 A) 0 V, Vp*
 B) Vp, 0 V
 C) 0.5Vp, 0.3Vp
 D) 0.3Vp , 0.5Vp
11. The range of input impedance Zi for MOSFETs is _____.

 A) 1 kΩ –10 kΩ
 B) 100 kΩ –1 MΩ
 C) 10 MΩ –100 MΩ
 D) 1012 Ω to 1015 Ω*
12. The range of output admittance yos for FETs is _____.

 A) 5 µS –10 µS
 B) 10 µS –50 µS*
 C) 50 µS –100 µS
 D) 200 µS –500 µS
13. The _____ configuration has the distinct disadvantage of requiring two dc
voltage sources.

 A) self-bias
 B) voltage-divider
 C) fixed-bias*
 D) All of the above
14. _____ is the network-input impedance for a JFET fixed-bias configuration.

 A) RG*
 B) RD
 C) Zero
 D) None of the above
15. _____ is a required step in order to calculate Zo.

 A) Setting IG equal to zero


 B) Setting Vi equal to zero*
 C) Setting ID equal to IDSS
 D) None of the above
16. _____ configuration(s) has (have) Zo ≈ RD.

 A) Fixed-bias
 B) Self-bias
 C) Voltage-divider
 D) All of the above*
17. _____ is the only parameter that is different between voltage-divider and
fixed-bias configurations.

 A) Zi*
 B) Av
 C) Zo
 D) None of the above
18. The input and output signals are in phase in a _____ configuration.

 A) fixed-bias
 B) source-follower*
 C) voltage-divider
 D) self-bias
19. A _____ configuration has a voltage gain less than 1.

 A) fixed-bias
 B) self-bias
 C) source-follower*
 D) voltage-divider
20. The input and output signals are 180º out of phase in a _____ configuration.

 A) source-follower
 B) common-gate
 C) common-drain
 D) voltage-divider*
21. The isolation between input and output circuits in the ac equivalent circuit is
lost in a _____ configuration.

 A) common-gate*
 B) common-source
 C) common-drain
 D) None of the above
22. The _____ configuration has an input impedance, which is other than RG.

 A) common-source
 B) common-gate*
 C) common-drain
 D) None of the above
23. The gate-to-source voltage VGS of a(n) _____ must be larger than the
threshold VGS(Th) for the transistor to conduct.

 A) JFET
 B) D-type MOSFET
 C) E-type MOSFET*
 D) None of the above
24. rd changes from one operation region to another with _____ values typically
occurring at _____ levels of VGS (closer to zero).

 A) lower, lower*
 B) lower, higher
 C) higher, lower
 D) None of the above
25. The _____ does not support Shockley’s equation.

 A) JFET
 B) D-type MOSFET
 C) E-type MOSFET*
 D) None of the above

MCQs in BJT and FET Frequency Response


Choose the letter of the best answer in each questions.
1. What is the ratio of the common logarithm of a number to its natural
logarithm?

 a. 0.435
 b. 2
 c. 2.3*
 d. 3.2
2. logea = _____ log10a

 a. 2.3*
 b. 2.718
 c. e
 d. 1.414
3. By what factor does an audio level change if the power level changes from 4 W
to 4096 W?

 a. 2
 b. 4
 c. 6*
 d. 8
4. The input power to a device is 10,000 W at 1000 V. The output power is 500 W,
and the output impedance is 100 Ω. Find the voltage gain in decibels.

 a. –30.01 dB
 b. –20.0 dB
 c. –13.01 dB*
 d. –3.01 dB
5. What magnitude voltage gain corresponds to a decibel gain of 50?

 a. 31.6238
 b. 316.228*
 c. 3162.38
 d. 31623.8
6. An amplifier rated at 30-W output is connected to a 5-Ω speaker. Calculate the
input power required for full power output if the power gain is 20 dB.
 a. 3 mW
 b. 30 mW
 c. 300 mW*
 d. 3 W
7. An amplifier rated at 30-W output is connected to a 5-Ω speaker. Calculate the
input voltage for the rated output if the amplifier voltage gain is 20 dB.

 a. 1.225 mV*
 b. 12.25 mV
 c. 122.5 mV
 d. 1.225 V
8. For audio systems, the reference level is generally accepted as

 a. 1 mW*
 b. 1 W
 c. 10 mW
 d. 100 mW
9. For which of the following frequency region(s) can the coupling and bypass
capacitors no longer be replaced by the short-circuit approximation?

 a. Low-frequency*
 b. Mid-frequency
 c. High-frequency
 d. All of the above
10. By what other name(s) are the cut-off frequencies in a frequency response
plot called?

 a. Corner frequency
 b. Break frequency
 c. Half-power frequency
 d. All of the above*
11. What is the ratio of the output power to the input power at the cut-off
frequencies in a normalized frequency response plot?

 a. 0.25
 b. 0.50*
 c. 0.707
 d. 1
12. What is the ratio of the output voltage to the input voltage at the cut-off
frequencies in a normalized frequency response plot?
 a. 0.25
 b. 0.50
 c. 0.707*
 d. 1
13. What is the normalized gain expressed in dB for the cut-off frequencies?

 a. –3 dB*
 b. +3 dB
 c. –6 dB
 d. –20 dB
14. The ________-frequency response of a transformer-coupled system is
calculated primarily by the stray capacitance between the turns of the primary
and secondary windings.

 a. Low
 b. Mid
 c. High*
15. The larger capacitive elements of the design will determine the ________ cut-
off frequency.

 a. Low*
 b. Mid
 c. High
16. The smaller capacitive elements of the design will determine the ________
cut-off frequencies.

 a. Low
 b. Mid
 c. High*
17. What is the ratio of the capacitive reactance XCS to the input resistance RI of
the input RC circuit of a single-stage BJT amplifier at the low-frequency cut-off?

 a. 0.25
 b. 0.50
 c. 0.75
 d. 1.0*
18. In the input RC circuit of a single-stage BJT, by how much does the base
voltage lead the input voltage for frequencies much larger than the cut-off
frequency in the low-frequency region?
 a. About 0º*
 b. 45º
 c. About 90º
 d. None of the above
19. In the input RC circuit of a single-stage BJT, by how much does the base
voltage lead the input voltage at the cut-off frequency in the low-frequency
region?

 a. About 0º
 b. 45º*
 c. About 90º
 d. None of the above
20. Determine the break frequency for this circuit.

 a. 15.915 Hz
 b. 159.15 Hz*
 c. 31.85 Hz
 d. 318.5 Hz
21. Refer to Figure 9.19. Calculate θ at 0.5f1.

 a. 63.43º*
 b. 26.56º
 c. 45º
 d. Undefined
22. A change in frequency by a factor of ________ is equivalent to 1 octave.

 a. 2*
 b. 10
 c. 5
 d. 20
23. A change in frequency by a factor of ________ is equivalent to 1 decade.

 a. 2
 b. 10*
 c. 5
 d. 20
24. For the low-frequency response of a BJT amplifier, the maximum gain is
where ________ .

 a. RB = 0 Ω
 b. RC = 0 Ω
 c. RE = 0 Ω*
25. Which of the low-frequency cutoffs determined by CS, CC, or CE will be the
predominant factor in determining the low-frequency response for the complete
system?

 a. Lowest
 b. Middle
 c. Highest*
 d. None of the above
26. Determine the lower cut-off frequency of this network.

 a. 15.8 Hz
 b. 46.13 Hz
 c. 238.73 Hz*
 d. 1575.8 Hz
27. Which of the following elements is (are) important in determining the gain of
the system in the high-frequency region?

 a. Interelectrode capacitances
 b. Wiring capacitances
 c. Miller effect capacitance
 d. All of the above*
28. In the ________-frequency region, the capacitive elements of importance are
the interelectrode (between terminals) capacitances internal to the active device
and the wiring capacitance between the leads of the network.

 a. Low
 b. Mid*
 c. High
29. Which of the following capacitors is (are) included in Ci for the high-
frequency region of a BJT or FET amplifier?

 a. Input wiring capacitance


 b. The transition capacitance ( )
 c. Miller capacitance
 d. All of the above*
30. In the hybrid or Giacoletto model, which one of the following does rb
include?
 a. Base spreading resistance
 b. Base contact
 c. Base bulk
 d. All of the above*
31. Which of the following configurations does (do) not involve the Miller effect
capacitance?

 a. Common-emitter
 b. Common-base*
 c. Common-collector
 d. All of the above
32. A 3-dB drop in hfe will occur at a frequency defined by ________.

 a.
 b. *
 c. 1
 d. 2
33. What is the range of the capacitors Cgs and Cgd?

 a. 1 to 10 pF*
 b. 1 to 10 nF
 c. 1 to 10 F
 d. 1 to 10 F
34. What is the range of the capacitor Cds?

 a. 0.01 to 0.1 pF
 b. 0.1 to 1 pF*
 c. 0.1 to 1 nF
 d. 0.1 to 1 F
35. Which of the following statements is true for a square-wave signal?

 a. It is composed of both even and odd harmonics.


 b. It is composed only of odd harmonics.*
 c. It is composed only of even harmonics.
 d. The harmonics waveforms are also square waves.
FILL-IN-THE-BLANKS
1. Logarithms taken to the base _____ are referred to as common logarithms,
while logarithms taken to the base _____ are referred to as natural logarithms.

 A. 10, e*
 B e, 10
 C. 5, e
 D. 10, 5
2. The logarithm of a number _____ than 1 is always _____.

 A. greater, negative
 B. less, positive
 C. less, negative*
 D. None of the above
3. The decibel (dB) is defined such that _____ decibel(s) = _____ bel(s).

 A. 1, 10
 B. 10, 1*
 C. 1, 1
 D. 10, 10
4. The resistance associated with the 1-mW power level is _____ , chosen
because it is the characteristic impedance of audio transmission lines.

 A. 100
 B. 250
 C. 400
 D. 600*
5. The decibel gain of a cascaded system is the _____ of the decibel gains of
each stage.

 A. sum*
 B. difference
 C. product
 D. quotient
6. Voltage gains of _____ dB or higher should immediately be recognized as
being quite high.

 A. 3
 B. 6
 C. 20
 D. 50*
7. For the RC-coupled amplifier, the drop in gain at low frequencies is due to the
increasing reactance of _____.

 A. CC
 B. Cs
 C. CE
 D. All of the above*
8. To fix the frequency boundaries of relatively high gain, _____ was chosen to
be the gain at the cut-off levels.

 A. 0.5Av mid
 B. 0.707Av mid*
 C. Av low
 D. 0.5Av high
9. In the input RC circuit of a single-stage BJT or FET amplifier, as the frequency
_____, the capacitive reactance _____ and _____ of the input voltage appears
across the output terminals.

 A. increases, decreases, more*


 B. increases, decreases, less
 C. increases, increases, more
 D. decreases, decreases, less
10. A change in frequency by a factor of 2 results in a _____ change in the ratio
of the normalized gain.

 A. 3-dB
 B. 6-dB*
 C. 10-dB
 D. 20-dB
11. A change in frequency by a factor of 10 results in a _____ change in the ratio
of the normalized gain.
 A. 3-dB
 B. 6-dB
 C. 10-dB
 D. 20-dB*
12. In the low-frequency region, the _____ low-frequency cut-off determined by
CS, CC, or CE will have the greatest impact on the network.

 A. highest*
 B. average
 C. lowest
 D. None of the above
13. The _____ region produces the maximum voltage gain in a single-stage BJT
or FET amplifier.

 A. low-frequency
 B. mid-frequency*
 C. high-frequency
 D. None of the above
14. For any inverting amplifier, the impedance capacitance will be _____ by a
Miller effect capacitance sensitive to the gain of the amplifier and the
interelectrode capacitance.

 A. unaffected
 B. increased
 C. decreased*
 D. None of the above
15. The Miller effect is meaningful in the _____ amplifier.

 A. inverting*
 B. noninverting
 C. inverting/noninverting
 D. None of the above
16. With a BJT amplifier in the high-frequency region, the capacitance Cbe is the
_____ of the parasitic capacitances while Cce is the _____.

 A. smallest, largest
 B. largest, smallest*
 C. smallest, medium
 D. None of the above
17. At very high frequencies, the effect of Ci is to _____ the total impedance of
the parallel combination of R1, R2, R3, and Ci.

 A. increase
 B. maintain
 C. decrease*
 D. None of the above
18. If the parasitic capacitors were the only elements to determine the high cut-
off frequency, the _____ frequency would be the determining factor.

 A. lowest*
 B. highest
 C. lowest or highest
 D. None of the above
19. The _____ configuration displays improved high-frequency characteristics
over the _____ configuration.

 A. common-collector, common-emitter
 B. common-emitter, common-base
 C. common-emitter, common-collector
 D. common-base, common-emitter*
20. The _____ of the upper cut-off frequencies defines a _____ possible
bandwidth for a system.

 A. highest, maximum
 B. lowest, maximum*
 C. lowest, minimum
 D. None of the above
21. is _____ than in a common-base configuration.
 A. significantly smaller
 B. smaller
 C. significantly greater*
 D. None of the above
22. For two identical stages in cascade, the drop-off rate in the high- and low-
frequency regions has increased to _____ per decade.

 A. –3 dB
 B. –6 dB
 C. –20 dB
 D. –40 dB*
23. The bandwidth _____ in a multistage amplifier compared to an identical
single-stage amplifier.

 A. increases
 B. decreases*
 C. remains the same
 D. None of the above
24. The _____ in the Fourier series has the same frequency as the square wave
itself.*

 A. fundamental*
 B. third harmonic
 C. fifth harmonic
 D. seventh harmonic
25. The magnitude of the third harmonic is _____ of the magnitude of the
fundamental.

 A. 1
 B. 0.5
 C. 0.33*
 D. 0.25

MCQs in Operational Amplifiers


Choose the letter of the best answer in each questions.
1. In which of the following are operational amplifiers (op-amps) used?

 a. Oscillators
 b. Filters
 c. Instrumentation circuits
 d. All of the above*
2. This circuit is an example of a _____.
 a. single-ended input*
 b. double-ended (differential) input
 c. double-ended output
 d. common-mode operation
3. This circuit is an example of a _____.

 a. single-ended input
 b. double-ended (differential) input*
 c. double-ended output
 d. common-mode operation
4. This circuit is an example of a _____.
 a. single-ended input
 b. double-ended (differential) input
 c. double-ended output*
 d. common-mode operation
5. This circuit is an example of a _____.

 a. single-ended input
 b. double-ended (differential) input
 c. double-ended output
 d. common-mode operation*
6. In which of the following operations is the resulting output signal of the
differential amplifier near zero?

 a. Single-ended
 b. Double-ended
 c. Common-mode*
 d. None of the above
7. In the differential amplifier circuit, which of the following terminals are
connected together?

 a. Bases
 b. Collectors
 c. One base to another collector
 d. Emitters*
8. Which of the following circuits is referred to as a BiMOS circuit?

 a. Bipolar and FET


 b. Bipolar and MOSFET*
 c. Opposite-type MOSFETs
 d. None of the above
9. An IC unit made using both _____ and _____ transistors is called a _____
circuit.

 a. bipolar, MOSFET, BiFET


 b. bipolar, MOSFET, BiMOS*
 c. TTL, MOSFET, TailFET
10. What is the level of the voltage between the input terminals of an op-amp?

 a. Virtually zero*
 b. 5 V
 c. 18 V
 d. 22 V
11. What is the level of the current through the amplifier input(s) to ground in an
op-amp?

 a. Virtually zero*
 b. 1.7 mA
 c. 2.8 mA
 d. 3.3 mA
12. If Rf = R1’, the voltage gain is _____.

 a. 1*
 b. –1
 c. 10
 d. very small
13. Calculate the overall voltage gain of the circuit if R1 = 100 and Rf = 1 kΩ.

 a. –1
 b. –10*
 c. 11
 d. 9
14. Calculate the overall voltage gain of the circuit if R1 = 100 Ω and Rf = 1 kΩ.

 a. –1
 b. –10
 c. 11*
 d. 9
15. What is the voltage gain of the unity follower?

 a. 0
 b. 1*
 c. –1
 d. Infinity
16. Calculate the input voltage if R1 = 100 Ω, Rf = 1 kΩ, and Vout = 550 mV.

 a. –50 mV
 b. –5 mV
 c. 550 mV
 d. 50 mV*
17. Calculate the output voltage if R1 = R2 = R3 = 100 Ω, Rf = 1 kΩ, and V1 = V2 =
V3 = 50 mV.

 a. –1.5 V*
 b. 1.5 V
 c. 0.5 V
 d. –0.5 V
18. What is the scale multiplier (factor) of a basic integrator?

 a. R / C
 b. C / R
 c. –RC
 d. –1 / RC*
19. The summing amplifier contains an inverting amplifier.
 a. True*
 b. False
20. This circuit is referred to as a(n) _____.

 a. inverting amplifier*
 b. noninverting amplifier
 c. unity follower
 d. integrator
21. This circuit is referred to as a(n) _____.

 a. inverting amplifier
 b. noninverting amplifier
 c. differentiator
 d. integrator*
22. This circuit is referred to as a(n) _____.
 a. inverting amplifier
 b. noninverting amplifier
 c. differentiator*
 d.integrator
23. Which of the following circuit conditions affect(s) the output offset voltage of
an op-amp?

 a. An input offset voltage, VIO


 b. An input offset current, IIO
 c. Both an input offset voltage, VIO and an input offset current, IIO*
 d. None of the above
24. What is the level of the roll-off in most op-amps?

 a. –6 dB / decade
 b. –20 dB / octave
 c. –6 dB / decade or –20 dB / octave
 d. –20 dB / decade or –6 dB / octave*
25. Which of the following is (are) the result of gain reduction by a feedback?

 a. The amplifier voltage gain is a more stable and precise value.


 b. The input impedance of the circuit is increased over that of the op-amp
alone.
 c. The output impedance is reduced over that of the op-amp alone.
 d. All of the above*
26. What is the open-loop gain of an op-amp at the gain-bandwidth product of
the op-amp?

 a. 200,000
 b. 50,000
 c. 200
 d. 1*
27. What is the cutoff frequency of an op-amp if the unity-gain frequency is 1.5
MHz and the open-loop gain is 100,000?

 a. 5 Hz
 b. 10 Hz
 c. 15 Hz*
 d. 20 Hz
28. What is the slew rate of an op-amp if the output voltages change from 2 V to
3 V in 0.2 ms?

 a. 5 V/ms*
 b. 3 V/ms
 c. 2 V/ms
 d. 1 V/ms
29. For an op-amp having a slew rate SR = 5 V/ms, what is the maximum closed-
loop voltage gain that can be used when the input signal varies by 0.2 V in 10
ms?

 a. 150
 b. 200
 c. 250*
 d. 300
30. Calculate the output impedance of an inverting op-amp using the 741 op-amp
(ro = 75 Ω, AOL = 200 V/mV) if R1 = 100 Ω and Rf = 1 kΩ.

 a. 0.011
 b. 0.00375*
 c. 0.0375
 d. 0.375
31. What is the difference output voltage of any signals applied to the input
terminals?

 a. The differential gain times the difference input voltage.


 b. The common-mode gain times the common input voltage.
 c. The sum of the differential gain times the difference input voltage and the
common-mode gain times the common input voltage.*
 d. The difference of the differential gain times the difference input voltage
and the common-mode gain times the common input voltage.
32. What is the difference voltage if the inputs are an ideal opposite signal?
 a. The differential gain times twice the input signal.*
 b. The differential gain times the input signal.
 c. The common-mode gain times twice the input signal.
 d. The common-mode gain times the input signal.
33. What is the difference voltage if the inputs are an ideal in-phase signal?

 a. The differential gain times twice the input signal.


 b. The differential gain times the input signal.
 c. The common-mode gain times twice the input signal.
 d. The common-mode gain times the input signal.*
34. At what input voltage level does the output voltage level become numerically
equal to the value of the differential gain of the amplifier?

 a. Vi1 = –Vi2 = 0.25 V


 b. V i1 = –V i2 = 0.50 V*
 c. V i1 = –V i2 = 0.75 V
 d. V i1 = –Vi2 = 1.00 V
35. At what input voltage level does the output voltage level become numerically
equal to the value of the common-mode gain of the amplifier?

 a. Vi1 = –Vi2 = 0.25 V


 b. Vi1 = –Vi2 = 0.50 V*
 c. Vi1 = –Vi2 = 0.75 V
 d.Vi1 = –Vi2 = 1.00 V
FILL-IN-THE-BLANKS
1. An operational amplifier is a _____ gain and _____ bandwidth differential
amplifier.

 A. very low, narrow


 B. low, wide
 C. medium, narrow
 D. very high, wide*
2. An operational amplifier has a _____ input impedance and a _____ output
impedance.

 A. high, low*
 B. high, high
 C. low, low
 D. low, high
3. The output signal of an op-amp is _____ out of phase with its input signal
connected to the inverting input terminal.

 A. 0º
 B. 90º
 C. 180º*
 D. 270º
4. In double-ended (differential) input operation, _____.

 A. an input is applied between the two input terminals


 B. two separate signals are applied to the input terminals
 C. either an input is applied between the two input terminals or two separate
signals are applied to the input terminals*
 D. None of the above
5. An input applied to either input terminal will result in _____.

 A. outputs from both output terminals, which have opposite polarities*


 B. outputs from both output terminals, which have the same polarities
 C. a single output from one of the output terminals
 D. None of the above
6. In a differential connection, the signals that are opposite at the inputs are
_____ amplified, and those that are common to the two inputs are _____
amplified.

 A. slightly, slightly
 B. slightly, highly
 C. highly, highly
 D. highly, slightly*
7. In a differential amplifier circuit, if an input signal is applied to either input with
the other input connected to ground, the operation is referred to as _____.

 A. double-ended
 B. single-ended*
 C. common-mode
 D. All of the above
8. If two opposite-polarity input signals are applied, the operation is referred to
as _____.

 A. double-ended*
 B. single-ended
 C. common-mode
 D. All of the above
9. If the same input is applied to both inputs, the operation is called _____.

 A. double-ended
 B. single-ended
 C. common-mode*
 D. All of the above
10. The main feature of the differential amplifier is the _____ gain when opposite
signals are applied to the inputs as compared to the _____ gain resulting from
common inputs.

 A. very large, large


 B. very small, large
 C. very small, very large
 D. very large, very small*
11. An IC unit containing a differential amplifier built using both bipolar and FET
transistors is referred to as a _____ circuit.

 A. CMOS
 B. BiFET*
 C. BiMOS
 D. None of the above
12. An IC unit containing a differential amplifier built using opposite-type
MOSFET transistors is referred to as a _____ circuit.

 A. CMOS*
 B. BiFET
 C. BiMOS
 D. None of the above
13. A _____ differential amplifier is particularly well suited for battery operation
due to its low power consumption.

 A. BiFET
 B. BiMOS
 C. CMOS*
 D. BJT
14. An ideal op-amp circuit has _____input impedance, _____ output impedance,
and _____ voltage gain.
 A. zero, infinite, infinite
 B. infinite, zero, zero
 C. zero, zero, infinite
 D. infinite, zero, infinite*
15. The _____ amplifier is the most widely used constant-gain amplifier circuit.

 A. inverting*
 B. noninverting
 C. differential
 D. None of the above
16. The feedback component of an integrator is a(n) _____.

 A. resistor
 B. capacitor*
 C. inductor
 D. diode
17. _____ is the unit for the slew rate, SR.

 A. V/ms*
 B. ms/V
 C. V
 D. V/s
18. The maximum frequency at which an op-amp may operate depends on the
_____.

 A. bandwidth (BW)
 B. slew rate (SR)
 C. unity-gain bandwidth
 D. All of the above*
19. As the supply voltage increases, the voltage gain of the circuit _____ and the
power consumption _____.

 A. increases, increases*
 B. increases, decreases
 C. decreases, decreases
 D. decreases, increases
20. As the frequency increases, the input impedance of an op-amp _____ and the
output impedance _____.

 A. increases, increases
 B. increases, decreases
 C. decreases, decreases*
 D. decreases, increases
21. Inverting amplifier connection is more widely used because it has _____.

 A. higher gain
 B. better frequency stability
 C. unit gain
 D. None of the above*
22. The output offset voltage is determined by _____.

 A. the input offset voltage and input offset current*


 B. the closed-loop gain
 C. both the input offset voltage and the closed-loop gain
 D. None of the above
23. The ratio of the unity-gain frequency to the cutoff frequency is numerically
equal to the level of _____.

 A. CMRR
 B. common-mode gain
 C. closed-loop gain*
 D. open-loop gain
24. When both input signals are the same, a common signal element due to the
two inputs can be defined as the _____ of the two signals.

 A. difference
 B. sum
 C. average of the sum*
 D. product
25. The common-mode rejection ratio (CMRR) is defined by _____.

 A. Ad / Ac*
 B. Ac / Ad
 C. Ad × Ac
 D. Ad + Ac
26. Ideally, the value of the CMRR is _____. Practically, the _____ the value of
CMRR, the better the circuit operation.

 A. zero, smaller
 B. infinite, larger*
 C. zero, larger
 D. infinite, smaller

MCQs in Op-Amp Applications

1. Determine the output voltage for this circuit with a sinusoidal input of 2.5 mV.

 a. –0.25 V
 b. –0.125 V*
 c. 0.25 V
 d. 0.125 V
2. Calculate the input voltage for this circuit if Vo = –11 V.

 a. 1.1 V*
 b. –1.1 V
 c. –1 V
 d. 1 V
3. Calculate the output voltage.
 a. –6.00 mV
 b. 6.0 mV
 c. 6.12 mV*
 d. –6.12 Mv
4. Calculate the input voltage when Vo = 11 V.

 a. 1.1 V
 b. –1.1 V
 c. –1 V
 d. 1 V*
5. Calculate the output voltage.
 a. 3.02 V*
 b. 2.03 V
 c. 1.78 V
 d. 1.50 V
6. Calculate the output of the first-stage op-amp when V1 = 25 mV.

 a. –1.05 V
 b. 0.075 V*
 c. 0.06 V
 d. 4.2 V
7. Calculate the output of the second stage op-amp if V1 = 25 mV.
 a. –0.075 V*
 b. 0.525 V
 c. 0.06 V
 d. 4.2 V
8. Calculate the input voltage if the final output is 10.08 V.

 a. –1.05 V
 b. 0.525 V
 c. 0.168 V*
 d. 4.2 V
9. Determine the value of Rf (assuming that all have the same value).

 a. 500 kΩ
 b. 50 kΩ*
 c. 25 kΩ
 d. 5 kΩ
10. When a number of stages are connected in parallel, the overall gain is the
product of the individual stage gains.
 a. True
 b. False*
11. A number of op-amp stages can be used to provide separate gains.
 a. True*
 b. False
12. Calculate the output voltage if V1 = V2 = 0.15 V.

 a. 0 V
 b. 4.65 V
 c. 6.45 V
 d. –6.45 V*
13. Calculate the output voltage if V1 = –3.3 V and V2 = 0.8 V
 a. 0 V
 b. –6.6 V*
 c. –4 V
 d. 2 V
14. Calculate the output voltage if V1 = 33 mV and V2 = 02 mV.

 a. 0 V
 b. –6.6 V
 c. –4 V*
 d. 2
15. Calculate the output voltage if V1 = 0 V and V2 = 0.2 V.

 a. 0 V
 b. –6.6 V*
 c. –4 V
 d. 2 V
16. Calculate the output voltage if V1 = –0.2 V and V2 = 0 V.
 a. 0 V
 b. –6.6 V
 c. –4 V
 d. 2 V*
17. Determine the output voltage.

 a. 10(V2 – Vi)
 b. –10(V2 – V1)*
 c. –10(V1 – V2)
 d. None of the above
18. Calculate the output voltage if V1 = 300 mV and V2 = 700 mV.
 a. 0 V
 b. –12 V
 c. 12 V
 d. –4 V*
19. Calculate the output voltage if V1 = V2 = 700 mV.

 a. 0 V*
 b. –12 V
 c. 12 V
 d. –8 V
20. Refer to Fig. Calculate the output voltage Vo if V1 = –V2 = 300 mV.
 a. 0 V
 b. –12 V
 c. 12 V*
 d. –8 V
21. Determine the output voltage when V1 = V2 = 1 V.

 a. 0 V*
 b. –2 V
 c. 1 V
 d. 2 V
22. Determine the output voltage when V1 = –V2 = 1 V.
 a. 0 V
 b. –2 V
 c. 1 V
 d. 2 V*
23. Determine the output voltage when V1 = –V2 = –1 V.

 a. 0 V
 b. –2 V*
 c. 1 V
 d. 2 V
24. How many op-amps are required to implement this equation?
 a. 2
 b. 3
 c. 4
 d. 1*
25. How many op-amps are required to implement this equation?

 a. 2*
 b. 3
 c. 4
 d. 1
26. How many op-amps are required to implement this equation?

 a. 2
 b. 3
 c. 4
 d. 1*
27. How many op-amps are required to implement this equation?
Vo = V1

 a. 2
 b. 3
 c. 4
 d. 1*
28. Calculate IL for this circuit.
 a. 3 mA
 b. 4 mA
 c. 5 mA*
 d. 6 mA
29. Calculate the output voltage for this circuit when V1 = 2.5 V and V2 = 2.25 V.

 a. –5.25 V
 b. 2.5 V
 c. 2.25 V
 d. 5.25 V*
30. An example of an instrumentation circuit is a(n) _____.
 a. dc voltmeter
 b. display driver
 c. ac voltmeter
 d. All of the above*
31. This circuit is an example of a(n)________.

 a. dc voltmeter
 b. display driver
 c. instrumentation amplifier*
 d. None of the above
32. Calculate the cut-off frequency of a first-order low-pass filter for R1 = 2.5 kΩ
and C1 = 0.05 μF.
 a. 1.273 kHz*
 b. 12.73 kHz
 c. 127.3 kHz
 d. 127.30 Hz
33. Calculate the cutoff frequencies of a bandpass filter with R1 = R2 = 5 kΩ and
C1 = C2 = 0.1 μF.
 a. fOL = 318.3 Hz, fOH = 318.3 Hz*
 b. fOL = 636.6 Hz, fOH = 636.6 Hz
 c. fOL = 318.3 Hz, fOH = 636.6 Hz
 d. fOL = 636.6 Hz, fOH = 318.3
34. A filter that provides a constant output from dc up to a cut-off frequency and
passes no signal above that frequency is called a _____ filter.
 a. low-pass*
 b. high-pass
 c. bandpass
35. A difference between a passive filter and an active filter is that a passive filter
uses amplifier(s), but an active filter does not.
 A. True
 B. False*

FILL-IN-THE-BLANKS
1. The level of the output voltage of an op-amp circuit is always _____ the level
of VCC.

 A. larger than
 B. the same as
 C. smaller than*
 D. None of the above
2. The input to an op-amp can be a(n) _____.

 A. dc source
 B. ac source
 C. combination of ac and dc sources
 D. All of the above*
3. When a number of stages are connected in series, the overall gain is the _____
of the individual stage gains.

 A. sum
 B. product*
 C. difference
 D. average
4. _____ build a multistage connection.

 A. Only an inverting op-amp circuit must be used to


 B. Only a noninverting op-amp circuit must be used to
 C. Both inverting and noninverting op-amp circuits can be used to*
 D. Neither inverting nor noninverting op-amp circuits must be used to
5. A voltage summing amplifier has _____.

 A. several inputs and several outputs


 B. several inputs and one output*
 C. one input and several outputs
 D. one input and one output
6. The voltage gain of a voltage buffer is _____ .

 A. 1*
 B. 0
 C. –1
 D. –5
7. The output voltage of a voltage buffer is _____ with the input voltage.

 A. in phase*
 B. 45º out of phase
 C. 90º out of phase
 D. 180º out of phase
8. The input impedance of a voltage buffer is _____.

 A. very low
 B. low
 C. high
 D. very high*
9. The output impedance of a voltage buffer is _____.

 A. very low
 B. low*
 C. high
 D. very high
10. Op-amps can be used to form _____ circuit(s).

 A. voltage-controlled voltage source


 B. voltage-controlled current source
 C. current-controlled voltage source
 D. All of the above*
11. _____ in a current-controlled voltage source circuit.

 A. The input current depends on the output voltage


 B. The input current depends on the input voltage source
 C. The output voltage depends on the input current.*
 D. The output current depends on the output voltage source
12. _____ can be used as a voltage-controlled voltage source.

 A. Only an inverting op-amp circuit


 B. Only a noninverting op-amp circuit
 C. Neither inverting nor noninverting op-amp circuits
 D. Both inverting and noninverting op-amp circuits*
13. In a current-controlled voltage source using the inverting op-amp circuit, the
controlled output current is _____ with the input voltage source.

 A. in phase*
 B. 45º out of phase
 C. 90º out of phase
 D. 180º out of phase
14. Op-amp circuits are used in _____ voltmeters.

 A. only dc
 B. only ac
 C. both ac and dc*
 D. neither ac nor dc
15. In a current-controlled current source, the controlled current Io depends on
_____.

 A. I1
 B. R1
 C. R2
 D. All of the above*
16. In a dc millivoltmeter, the amplifier provides a meter with _____ input
impedance and a scale factor dependent on _____ value and accuracy.

 A. high, resistor*
 B. low, resistor
 C. high, capacitor
 D. None of the above
17. In a millivoltmeter, the diodes and the capacitor are used in _____ parts of
the circuit.

 A. the dc
 B. the ac*
 C. both the dc and ac
 D. neither the dc nor ac
18. In an instrumentation amplifier, the output voltage is based on the _____
times a scale factor.

 A. summation of the two inputs


 B. product of the two inputs
 C. difference between the two inputs*
 D. None of the above
19. A(n) _____ is not a component of a passive filter.

 A. op-amp*
 B. capacitor
 C. inductor
 D. resistor
20. An active circuit is composed of a(n) _____.

 A. resistor
 B. capacitor
 C. op-amp
 D. All of the above*
21. A low-pass filter _____.

 A. provides a constant output up to the cutoff frequency


 B. passes frequencies from zero up to the cutoff frequency
 C. rejects all frequencies above the cutoff frequency
 D. All of the above*
22. A filter that passes signals that are above one ideal cutoff frequency and
below a second cutoff frequency is called _____.

 A. low-pass
 B. high-pass
 C. bandpass*
 D. band reject
23. The roll-off for a first-order high-pass filter is _____.

 A. –20 dB/decade
 B. –6 dB/octave
 C. either –20 dB/decade or –6 dB/octave*
 D. None of the above
24. The roll-off for a second-order high-pass filter is _____.

 A. either –20 dB per decade or –6 dB per octave


 B. either –40 dB per decade or –12 dB per octave*
 C. either –60 dB per decade or –18 dB per octave
 D. None of the above
25. A bandpass filter uses _____ circuit.
 A. a high-pass
 B. a low-pass
 C. a high-pass and a low-pass*
 D. neither a low-pass nor a high-pass

MCQs in Boylestad: Power Amplifiers


Choose the letter of the best answer in each questions.
1. Which of the following is (are) power amplifiers?
 a. Class A
 b. Class B or AB
 c. Class C or D
 d. All of the above
2. By how much does the output signal vary for a class AB power amplifier?
 a. 360º
 b. 180º
 c. Between 180º and 360º
 d. Less than 180º
3. Which type of power amplifier is biased for operation at less than 180º of the
cycle?
 a. Class A
 b. Class B or AB
 c. Class C
 d. Class D
4. Which type of amplifier uses pulse (digital) signals in its operation?
 a. Class A
 b. Class B or AB
 c. Class C
 d. Class D
5. Which of the power amplifiers has the lowest overall efficiency?
 a. Class A
 b. Class B or AB
 c. Class C
 d. Class D
6. Which of the following describe(s) a power amplifier?
 a. It can handle large power.
 b. It can handle large current.
 c. It does not provide much voltage gain.
 d. All of the above
7. _____ amplifiers primarily provide sufficient power to an output load to drive a
speaker from a few watts to tens of watts.
 a. Small-signal
 b. Power
 c. None of the above
8. The main features of a large-signal amplifier is the circuit’s ______.
 a. power efficiency
 b. maximum power limitations
 c. impedance matching to the output device
 d. All of the above
9. This is an example of the output swing for a class _____ amplifier.

 a. A
 b. B
 c. AB
 d. C
 e. D
10. This is an example of the output swing for a class _____ amplifier.
 a. A
 b. B
 c. AB
 d. C
 e. D
11. Class AB operation is _____ operation.
 a. similar to class A
 b. similar to class B
 c. similar to class C
 d. None of the above
12. Which operation class is generally used in radio or communications?
 a. A
 b. B
 c. AB
 d. C
 e. D
13. Categorize the power efficiency of each class of amplifier, from worst to best.
 a. A, B, AB, D
 b. A, AB, D, B
 c. A, AB, B, D
14. What is the maximum efficiency of a class A circuit with a direct or series-fed
load connection?
 a. 90%
 b. 78.5%
 c. 50%
 d. 25%
15. What is the ratio of the secondary voltage to the primary voltage with the turn
ratio in the winding
 a. N2/N1
 b. (N1/N2)2
 c. (N1/N2)1/3
 d. N1 × N2
16. Calculate the effective resistance seen looking into the primary of a 20:1
transformer connected to an 8- Ω load.
 a. 3.2 kΩ
 b. 3.0 kΩ
 c. 2.8 kΩ
 d. 1.8 kΩ
17. What transformer turns ratio is required to match an 8-speaker load so that
the effective load resistance seen at the primary is 12.8 k?
 a. 20:1
 b. 40:1
 c. 50:1
 d. 60:1
18. Calculate the efficiency of a transformer-coupled class A amplifier for a
supply of 15 V and an output of V(p) = 10 V.
 a. 25%
 b. 33.3%
 c. 50%
 d. 78.5%
19. The maximum efficiency of a transformer-coupled class A amplifier is _____.
 a. 25%
 b. 50%
 c. 78.5%
 d. 63.6%
20. What is the maximum efficiency of a class B circuit?
 a. 90%
 b. 78.5%
 c. 50%
 d. 25%
21. How many transistors must be used in a class B power amplifier to obtain the
output for the full cycle of the signal?
 a. 0
 b. 1
 c. 2
 d. 3
22. In class B operation, at what fraction of VCC should the level of VL(p) be to
achieve the maximum power dissipated by the output transistor?
 a. 0.5
 b. 0.636
 c. 0.707
 d. 1
23. Class B operation is provided when the dc bias leaves the transistor biased
just off, the transistor turning on when the ac signal is applied.
 a. True
 b. False
24. Calculate the efficiency of a class B amplifier for a supply voltage of VCC =
20 V with peak output voltage of VL(p) = 18 V. Assume RL = 16 Ω.
 a. 78.54%
 b. 75%
 c. 70.69%
 d. 50%
25. Which of the following is (are) the disadvantage(s) of a class B
complementary-symmetry circuit?
 a. It needs two separate voltage sources.
 b. There is crossover distortion in the output signal.
 c. It does not provide exact switching of one transistor off and the other on at
the zero-voltage condition.
 d. All of the above
26. Which of the push-pull amplifiers is presently the most popular form of the
class B power amplifier?
 a. Quasi-complementary
 b. Transformer-coupled
 c. Complementary-symmetry
 d. None of the above
27. nMOS and pMOS transistors can be used for class B.
 a. True
 b. False
28. Calculate the harmonic distortion component for an output signal having
fundamental amplitude of 3 V and a second harmonic amplitude of 0.25 V.

 a. 3.83%
 b. 38.3%
 c. 83.3%
 d. 8.33%
29. Which of the following instruments displays the harmonics of a distorted
signal?
 a. Digital multimeter
 b. Spectrum analyzer
 c. Oscilloscope
 d. Wave analyzer
30. Which of the following instruments allows more precise measurement of the
harmonic components of a distorted signal?
 a. Digital multimeter
 b. Spectrum analyzer
 c. Oscilloscope
 d. Wave analyzer
31. What is the maximum temperature rating for silicon power transistors?
 a. 50º to 80º
 b. 100º to 110º
 c. 150º to 200º
 d. 250º to 300º
32. Which of the power amplifiers is not intended primarily for large-signal or
power amplification?
 a. Class A
 b. Class B or AB
 c. Class C
 d. Class D
33. Determine what maximum dissipation will be allowed for a 70-W silicon
transistor (rated at 25ºC) if derating is required above 25ºC by a derating factor
of 0.6 W/ºC at a case temperature of 100º.
 a. 25 W
 b. 30 W
 c. 35 W
 d. 40 W
34. A silicon power transistor is operated with a heat sink (θSA = 1.5ºC/W). The
transistor, rated at 150 W (25ºC), has θJC = 0.5º C/W, and the mounting insulation
has θCS = 0.6 ºC/W. What is the maximum power that can be dissipated if the
ambient temperature is 50ºC and TJmax = 200 ºC?
 a. 61.5 W
 b. 60.0 W
 c. 57.7 W
 d. 55.5 W
35. Which of the following transistors has been quite popular as the driver
device for class D amplification?
 a. BJT
 b. FET
 c.UJT
 d. MOSFET
FILL-IN-THE-BLANKS
1. Power amplifiers primarily provide sufficient power to an output load, typically
from _____ to _____.

 A. a few kW, tens of kW


 B. 500 W, 1 kW
 C. 100 W, 500 W
 D. a few W, tens of W
2. The main feature(s) of a large-signal amplifier is (are) the _____.

 A. circuit’s power efficiency


 B. maximum amount of power that the circuit is capable of handling
 C. impedance matching to the output
 D. All of the above
3. In _____ power amplifiers, the output signal varies for a full 360º of the cycle.

 A. class A
 B. class B or AB
 C. class C
 D. class D
4. In class B power amplifiers, the output signal varies for _____ of the cycle.

 A. 360º
 B. 180º
 C. between 180º and 360º
 D. less than 180º
5. _____ amplifiers have the highest overall efficiency.

 A. Class A
 B. Class B or AB
 C. Class C
 D. Class D
6. Class D operation can achieve power efficiency of over _____.

 A. 90%
 B. 78.5%
 C. 50%
 D. 25%
7. The beta of a power transistor is generally _____.

 A. more than 200


 B. 100 to 200
 C. less than 100
 D. 0
8. A form of class A amplifier having maximum efficiency of _____ uses a
transformer to couple the output signal to the load.

 A. 90%
 B. 78.5%
 C. 50%
 D. 25%
9. The reflected impedance seen from one side of the transformer to the other
side is _____.

 A. N1/N2
 B. (N1/N2)2
 C. (N1/N2)1/3
 D. N1× N2
10. In a class A transformer-coupled power amplifier, _____ winding resistance
of the transformer determine(s) the dc load line for the circuit.

 A. the ac
 B. the dc
 C. both the ac and dc
 D. neither the ac nor dc
11. The slope of the ac load line in the class A transformer-coupled transistor is
_____.

 A. –1/RL (load resistor)


 B. 1/(a2RL)
 C. –1/(a2RL)
 D. 1/RL
12. The amount of power dissipated by the transistor is the _____ of that drawn
from the dc supply (set by the bias point) and the amount delivered to the ac
load.
 A. product
 B. difference
 C. average
13. A class A amplifier dissipates _____ power when the load is drawing
maximum power from the circuit.

 A. the least
 B. about the same
 C. the most
 D. None of the above
14. In a class A transformer-coupled amplifier, the _____ the value of VCEmax
and the _____ the value of VCEmin, the _____ the efficiency to (from) the
theoretical limit of 50%.

 A. larger, smaller, farther


 B. larger, smaller, closer
 C. smaller, larger, closer
 D. None of the above
15. In class B operation, the current drawn from a single power supply has the
form of _____ rectified signal.

 A. a full-wave
 B. a half-wave
 C. both a full-wave and a half-wave
 D. None of the above
16. The highest efficiency is obtained in class B operation when the level of
VL(p) is equal to _____.

 A. 0.25VCC
 B. 0.50VCC
 C. VCC
 D. 2VCC
17. _____ transistors can be used to build a class B amplifier.

 A. npn and pnp


 B. nMOS and pMOS
 C. Both npn and pnp or nMOS and pMOS
 D. None of the above
18. The complementary Darlington-connected transistor for a class B amplifier
provides _____ output current and _____ output resistance.
 A. higher, higher
 B. higher, lower
 C. lower, lower
 D. lower, higher
19. The fundamental component is typically _____ any harmonic component.

 A. larger than
 B. the same as
 C. smaller than
 D. None of the above
20. In Fourier technique, any periodic distorted waveform can be represented by
_____ the fundamental and all harmonic components.

 A. multiplying
 B. subtracting
 C. dividing
 D. adding
21. Improvement in production techniques of power transistors have _____.

 A. produced higher power ratings in small-sized packaging cases


 B. increased the maximum transistor breakdown voltage
 C. provided faster-switching power transistors
 D. All of the above
22. The greater the power handled by the power transistor, _____ the case
temperature.

 A. the higher
 B. the lower
 C. there is no change in
 D. None of the above
23. The _____ has the hottest temperature in a power transistor.

 A. heat sink
 B. case
 C. junction
 D. None of the above
24. A heat sink provides _____ thermal resistance between case and air.

 A. a high
 B. a low
 C. the same
 D. None of the above
25. A _____ power amplifier is limited to use at one fixed frequency.

 A. class A
 B. class B or AB
 C. class C
 D. class D

MCQs in Linear-Digital ICs


Choose the letter of the best answer in each questions.
1. Which of the following is not a linear/digital IC?

 A. Phase-locked loop
 B. Voltage-controlled oscillator
 C. Passive filter
 D. Comparator
2. Which of the following circuits is (are) linear/digital ICs?

 A. Comparators
 B. Timers
 C. Voltage-controlled oscillators
 D. All of the above
3. Which of the following is (are) the results of improvements built into a
comparator IC?

 A. Faster switching between the two output levels


 B. Noise immunity
 C. Outputs capable of directly driving a variety of loads
 D. All of the above
4. How many comparators does a 339 IC contain?

 A. 4
 B. 3
 C. 2
 D. 1
5. This circuit is an example of a ______.

 A. comparator
 B. 555 timer
 C. D to A converter
 D. ladder network
6. A 311 IC is an example of an eight-pin DIP that can be made to function as a
_____.

 A. comparator
 B. 555 timer
 C. D to A converter
 D. ladder network
7. A 339 IC is an example of a fourteen-pin DIP that can be made to function as a
_____.

 A. comparator
 B. 555 timer
 C. D to A converter
 D. ladder network
8. What is the function of a ladder network?

 A. Changing an analog signal to a digital signal


 B. Changing a linear signal to a digital signal
 C. Changing a digital signal to an analog signal
 D. None of the above
9. What is (are) the level(s) of the input voltage to a ladder-network conversion?

 A. 0
 B. Vref
 C. 0 V or Vref
 D. None of the above
10. What is the level of the output voltage of a ladder-network conversion?

 A. The analog output voltage proportional to the digital input voltage


 B. The digital output voltage proportional to the linear input voltage
 C. A fixed digital value Vref
 D. A fixed analog value Vref
11. What is the voltage resolution of an 8-stage ladder network?

 A. Vref /128
 B. Vref /256
 C. Vref /512
 D. Vref /1024
12. Which of the slope intervals of the integrator does the counter in the analog-
to-digital converter (ADC) operate?

 A. Positive
 B. Negative
 C. Both positive and negative
 D. Neither positive nor negative
13. What is the first phase of the dual-slope method of conversion?

 A. Connecting the analog voltage to the integrator for a fixed time


 B. Setting the counter to zero
 C. Connecting the integrator to a reference voltage
 D. All of the above
14. When is the counter set to zero in the dual-slope method of conversion?

 A. Prior to the charging of the capacitor of the integrator


 B. While the capacitor is being charged
 C. At the end of the charging of the capacitor
 D. During the discharging of the capacitor
15. Which of the following devices is (are) a component of a digital-to-analog
converter (DAC)?

 A. Integrator
 B. Comparator
 C. Digital counter
 D. All of the above
16. At which of the following period(s) is the counter advanced (incremented) in
dual-slope conversion?

 A. During the charging of the capacitor of the integrator


 B. During the discharging of the capacitor of the integrator
 C. During both the charging and discharging of the capacitor of the integrator
 D. None of the above
17. What is (are) the input(s) to the comparator in the ladder-network conversion
of an ADC?

 A. Staircase voltage
 B. Analog input voltage
 C. Both staircase and analog input voltage
 D. None of the above
18. What is the maximum conversion time of a clock rate of 1 MHz operating a
10-stage counter in an ADC?

 A. 1.024 s
 B. 102.3 ms
 C. 10.24 ms
 D. 1.024 ms
19. What is the minimum number of conversions per second of a clock rate of 1
MHz operating a 10-stage counter in an ADC?

 A. 1000
 B. 976
 C. 769
 D. 697
20. On which of the following does the conversion depend in ladder-network
conversion?

 A. Comparator
 B. Control logic
 C. Digital counter
 D. Clock
21. This circuit is an example of a _____.

 A. comparator
 B. 555 timer
 C. D to A converter
 D. ladder network
22. This figure is a block diagram of a(n) _____.

 A. ADC
 B. DAC
 C. comparator
 D. 555 timer
23. Calculate the frequency of this circuit.

 A. 635 Hz
 B. 450 Hz
 C. 228 Hz
 D. 128 Hz
24. The 555 timer IC is made up of a combination of linear comparators and
digital flip-flops.

 A. True
 B. False
25. Which application best describes this 555 timer circuit?
 A. Monostable multivibrator
 B. Astable multivibrator
 C. Bistable multivibrator
 D. One-shot multivibrator
26. Which application best describes this 555 timer circuit?

 A. Monostable multivibrator
 B. Astable multivibrator
 C. Bistable multivibrator
 D. Free-running multivibrator
27. Which of the following best describes the output of a 566 voltage-controlled
oscillator?

 A. Square-wave
 B. Triangular-wave
 C. Both square- and triangular-wave
 D. None of the above
28. Which of the following best describes limitations for the 566 VCO?

 A. 2 kΩ ≤ R1 ≤ 20 kΩ
 B. 0.75 V+ ≤ Vc ≤+
 C. fo < 1 MHz
 D. All of the above
29. Determine the free-running frequency for this circuit.

 A. 32.5 kHz
 B. 53.33 kHz
 C. 533.3 kHz
 D. 5.3 MHz
30. Determine the free-running frequency when R3 is set to 2.5 kΩ.

 A. 19.7 kHz
 B. 32.5 kHz
 C. 116.39 kHz
 D. 212.9 kHz
31. The voltage-controlled oscillator is a subset of the "test bench" function
generator.
 A. True
 B. False
32. Which of the following applications include a phase-locked loop (PLL)
circuit?

 A. Modems
 B. Am decoders
 C. Tracking filters
 D. All of the above
33. How many Vcc connections does the 565 PLL use?

 A. 0
 B. 1
 C. 2
 D. 3
34. The timing components for a PLL are 15 kΩ and 220 pF. Calculate the free-
running frequency.

 A. 90.91 kHz
 B. 136.36 kHz
 C. 156.1 kHz
 D. 181.8 kHz
35. Which of the following frequencies is associated with the 565 frequency-shift
keyed decoder?

 A. 1070 Hz
 B. 1270 Hz
 C. Both 1070 Hz and 1270 Hz
 D None of the above
FILL-IN-THE-BLANKS
1. A comparator circuit accepts input of _____ voltages and provides a _____
output that indicates when one input is less than or greater than the second.

 A. linear, digital
 B. linear, linear
 C. digital, linear
 D. None of the above
2. In a comparator, the reference voltage is connected to _____ input terminal
and the input signal is applied to _____ input terminal.
 A. only the minus, only the plus
 B. only the plus, only the minus
 C. either the plus or minus, the other
 D. None of the above
3. In a comparator, the level of the reference voltage must be _____.

 A. negative
 B. positive
 C. zero
 D. All of the above
4. The 311 voltage comparator can operate from _____.

 A. dual power supplies of 15 V


 B. a single +5 V supply
 C. either a dual power supply of 15 V or a single +5 V supply
 D. None of the above
5. When the input to the 311 voltage comparator is _____ value, the output is
_____ if the inverting input is connected to ground.

 A. any negative, low


 B. any positive, low
 C. any positive, high
 D. None of the above
6. In the operation of two 311 voltage comparators as the voltage window
detector, a high output indicates that the input is _____.

 A. above the higher reference voltage


 B. below the lower reference voltage
 C. either above the higher reference voltage or below the lower reference
voltage
 D. within the high and the low reference voltages
7. In the operation of two 311 voltage comparators as the voltage window
detector, a low output indicates that the input is _____.

 A. above the higher reference voltage


 B. below the lower reference voltage
 C. either above the higher reference voltage or below the lower reference
voltage
 D. within the high and the low reference voltages
8. In a ladder-network conversion, _____ ladder stages provide _____ voltage
resolution.

 A. more, greater
 B. more, smaller
 C. fewer, greater
 D. None of the above
9. In a ladder-network conversion, the _____ circuit provides a signal to stop the
counter when the staircase voltage rises above the input voltage.

 A. control logic
 B. comparator
 C. ladder-network
 D. None of the above
10. The conversion resolution of an 8-stage counter operating an 8-stage ladder
network using a reference voltage of 5 V is _____.

 A. 0.0195 mV
 B. 0.195 mV
 C. 1.95 mV
 D. 19.5 mV
11. In a 555 timer, a series connection of three resistors sets the reference
voltage levels to the two comparators at _____ and __________.

 A. 2VCC / 3, VCC / 3
 B. VCC / 2, VCC / 4
 C. VCC, VCC / 2
 D. VCC, VCC
12. In astable operation of the 555 timer, the external capacitor, C, is charged
through external resistor(s) _____ and is discharged through resistor(s) _____.
 A. RA, RA
 B. RB, RA
 C. RA and RB, RB
 D. RB, RA and RB
13. In astable operation of the 555 timer, the lower and upper peaks of the
charging/discharging external capacitor are _____ to _____.

 A. –VCC, VCC
 B. –0.5 VCC, 0.5 VCC
 C. 1/3 VCC, 1/2 VCC
 D. 1/3 VCC, 2/3 VCC
14. Time periods for monostable operation of the 555 timer can range from _____
to _____, making this IC useful for a range of applications.

 A. picoseconds, nanoseconds
 B. nanoseconds, milliseconds
 C. microseconds, many seconds
 D. None of the above
15. A voltage-controlled oscillator (VCO) is a circuit that provides a _____ output
signal.

 A. zero
 B. varying
 C. constant
 D. None of the above
16. The frequency of the 566 VCO is set by _____.

 A. an external resistor
 B. an external capacitor
 C. both an external resistor and an external capacitor
 D. None of the above
17. A phase-locked loop (PLL) is an electronic circuit that consists of _____.

 A. a phase detector
 B. a low-pass filter
 C. a voltage-controlled oscillator
 D. All of the above
18. When the loop is in lock in a PLL, the input frequency is _____ the output
frequency from the VCO.

 A. the same as
 B. greater than
 C. smaller than
 D. None of the above
19. In the frequency-shift keyed (FSK) signal decoder, the RC ladder filter is used
to _____.

 A. remove the difference frequency component


 B. remove the sum frequency component
 C. remove both the difference and the sum frequency components
 D. None of the above
20. The free-running frequency of a 565 FSK decoder is adjusted with _____.

 A. external capacitors
 B. an external resistor
 C. an external RC network
 D. an internal clock
21. An input at a frequency of 1070 Hz will drive the decoder output voltage to
_____.

 A. –5 V
 B. 14 V
 C. –5 V and 14 V
 D. None of the above
22. In interfacing circuitry, a receiver provides _____ input impedance to
minimize loading of the input signal.

 A. high
 B. medium
 C. low
 D. zero
23. For transistor transistor logic (TTL) circuits, _____ is a mark and _____ is a
space.

 A. 12 V, 0 V
 B. 0 V, 12 V
 C. 0 V, 5 V
 D. 5 V, 0 V
24. For the RS-232C circuit, _____ is a mark and _____ is a space.

 A. 12 V, –12 V
 B. –12 V, 12 V
 C. 5 V, 0 V
 D. –5 V, 0 V
25. Which of the following require(s) interfacing circuitry?

 A. Keyboards
 B. Video terminals
 C. Printers
 D. All of the above

MCQs in Feedback and Oscillator Circuits


Choose the letter of the best answer in each questions.
1. Which of the following improvements is (are) a result of the negative feedback
in a circuit?

 A. Higher input impedance


 B. Better stabilized voltage gain
 C. Improved frequency response
 D. All of the above
2. Which of the following improvements is (are) a result of the negative feedback
in a circuit?
 A. Lower output impedance
 B. Reduced noise
 C. More linear operation
 D. All of the above
3. Which of the following is (are) feedback?

 A. Voltage-series
 B. Voltage-shunt
 C. Current-series
 D. All of the above
4. What is the ratio of the input impedance with series feedback to that without
feedback?

 A. 1 + βA
 B. βA
 C. β
 D. 1
5. What is the ratio of the output impedance with series feedback to that without
feedback?

 A. 1
 B. 1 + βA
 C. βA
 D. A
6. The frequency distortion arising because of varying amplifier gain with
frequency is considerably reduced in a negative-voltage feedback amplifier
circuit.

 A. True
 B. False
7. Determine the voltage gain with feedback for a voltage-series feedback having
A = –100, R1 = 15 kΩ, Ro = 20 kΩ, and a feedback of β = –0.25.

 A. 3.85
 B. –3.85
 C. –9.09
 D. 9.09
8. Determine the input impedance with feedback for a voltage-series feedback
having A = –100, R1 = 15 kΩ, Ro = 20 kΩ, and a feedback of β = –0.25.
 A. 110 kΩ
 B. 290 kΩ
 C. 390 kΩ
 D. 510 kΩ
9. Determine the output impedance with feedback for a voltage-series feedback
having A = –100, R1 = 15 kΩ, Ro = 20 kΩ, and a feedback of β = –0.25.

 A. 0.2 kΩ
 B. 392.16 kΩ
 C. 1.82 kΩ
 D. 769.23 Ω
10. An amplifier with a gain of –500 and a feedback of β = –0.1 has a gain change
of 15% due to temperature. Calculate the change in gain of the feedback
amplifier.

 A. 0.2%
 B. 0.3%
 C. 0.4%
 D. 0.5%
11. Referring to this figure, calculate the amplification gain with feedback for the
following circuit values: R1 = 80 kΩ, R2 = 20 kΩ, Ro = 10 kΩ, RD = 61 kΩ, and gm
= 4000 μS.

 A. –4.36
 B. –4.25
 C. –6.35
 D. –20.85
12. Referring to this figure, calculate the amplification gain where the op-amp
gain (A) is 200,000, R1 = 1.5 kΩ, and R2 = 400 Ω.

 A. 4.25
 B. 4.50
 C. 4.75
 D. 5.00
13. Referring to this figure, calculate the voltage gain with feedback Avf.

 A. –4.85
 B. –4.20
 C. –4.17
 D. –4.00
14. Referring to this figure, calculate the voltage gain without feedback for the
following circuit values: RD = 4 kΩ, RS = 1 kΩ, RF = 15 kΩ, and gm = 5000 μS.

 A. –20.0
 B. –21.5
 C. –23.5
 D. –25.5
15. Referring to this figure, calculate the voltage gain with the feedback for the
following circuit values: RD = 4 kΩ, RS = 1 kΩ, RF = 15 kΩ, and gm = 5000 μS.

 A. –11.2
 B. –8.57
 C. –6.75
 D. –3.25
16. Which of the following is (are) the determining factor(s) of the stability of a
feedback amplifier?

 A. A
 B. Phase shift between input and output signals
 C. Both A and the phase shift between input and output signals
 D. None of the above
17. At what phase shift is the magnitude of βA at its maximum in the Nyquist
plot?

 A. 90º
 B. 180º
 C. 270º
 D. 0º
18. At what phase shift is the magnitude of βA at its minimum in the Nyquist
plot?

 A. 90º
 B. 180º
 C. 270º
 D. 0º
19. The Nyquist plot combines the two Bode plots of gain versus frequency and
phase shift versus frequency on a single plot.

 A. True
 B. False
20. The amplifier is unstable if the Nyquist curve plotted encloses (encircles) the
–1 point, and it is stable otherwise.

 A. True
 B. False
21. Which of the following is required for oscillation?

 A. βA > 1
 B. The phase shift around the feedback network must be 180º.
 C. Both βA > 1 and the phase shift around the feedback network must be
180º.
 D. None of the above
22. An input signal is needed for an oscillator to start.

 A. True
 B. False
23. Only the condition βA = _____ must be satisfied for self-sustained
oscillations to result.
 A. 0
 B. –1
 C. 1
 D. None of the above
24. Given gm = 5000 µS, rd = 40 kΩ, R = 10 kΩ, and A = 35. Determine the value of
RD for oscillator operation at 1 kHz.

 A. 8.05 kΩ
 B. 8.48 kΩ
 C. 10.8 kΩ
 D. 12.3 kΩ
25. In the IC phase-shift oscillator, what should the ratio of feedback resistor Rf
to R1 be?

 A. Zero
 B. Greater than –29
 C. Less than 29
 D. Any value
26. This circuit is a _____ oscillator.

 A. phase-shift
 B. Wien bridge
 C. Colpitts
 D. Hartley
27. For a phase-shift oscillator, the gain of the amplifier stage must be greater
than _____.

 A. 19
 B. 29
 C. 30
 D. 1
28. In the Wien bridge oscillator, which of the following is (are) frequency-
determining components?

 A. R1 and R2
 B. C1 and C2
 C. R1, R2, C1, and C2
 D. None of the above
29. Calculate the resonant frequency of this oscillator.

 A. 1560.34 Hz
 B. 3120.70 Hz
 C. 4681.07 Hz
 D. 6241.37 Hz
30. Calculate the resonant frequency of this Wien bridge oscillator if R1 = 25 kΩ,
R2 = 40 kΩ, C1 = 0.001 µF, and C2 = 0.002 µF.

 A. 1560.3 Hz
 B. 1779.4 Hz
 C. 3120.7 Hz
 D. 3558.8 Hz
31. Calculate the value of C1 = C2 for the Wien bridge oscillator to operate at a
frequency of 20 kHz. Assume R1 = R2 = 50 kΩ and R3 = 3R4 = 600 Ω?

 A. 1.59 pF
 B. 15.9 pF
 C. 159 pF
 D. 1.59 nF
32. This circuit is a _____ oscillator.

 A. phase-shift
 B. Wien bridge
 C. Colpitts
 D. Hartley
33. Which of the following oscillators is (are) tuned oscillators?

 A. Colpitts
 B. Hartley
 C. Crystal
 D. All of the above
34. This circuit is a _____ oscillator.

 A. phase-shift
 B. Wien bridge
 C. Colpitts
 D. Hartley
35. What is the typical value of quality factor for crystal oscillators?

 A. 20,000
 B. 1000
 C. 100
 D. 10
FILL-IN-THE-BLANKS
1. Negative feedback results in _____.

 A. decreased voltage gain


 B increased voltage gain
 C. oscillation in the circuit
 D. None of the above
2. Positive feedback results in _____.

 A. decreased voltage gain


 B. increased voltage gain
 C. oscillation in the circuit
 D. None of the above
3. Series-feedback connections tend to _____ the input resistance. Shunt
feedback connections tend to _____ the input resistance.

 A. decrease, increase
 B. increase, decrease
 C. increase, increase
 D. decrease, decrease
4. Voltage feedback connections tend to _____ the output impedance. Current
feedback connections tend to _____ the output impedance.

 A. decrease, increase
 B. increase, decrease
 C. increase, increase
 D. decrease, decrease
5. With feedback, β, the overall gain of the circuit is reduced by a factor _____
where A is the gain without the feedback.

 A. β
 B. Aβ
 C. A
 D. 1 + βA
6. An amplifier with negative feedback has _____ bandwidth than (as) the
amplifier without feedback.
 A. the same
 B. less
 C. more
 D. None of the above
7. A feedback amplifier has a _____ upper 3-dB frequency and a _____ lower 3-
dB frequency compared to an amplifier without feedback.

 A. smaller, higher
 B. higher, smaller
 C. smaller, smaller
 D. higher, higher
8. What is the gain at the origin of the Nyquist plot?

 A. Zero
 B. A negative value
 C. A positive value
 D. Undefined
9. In a Nyquist plot, as the frequency increases, the phase shift between input
and output signals _____.

 A. remains the same


 B. decreases
 C. increases
 D. None of the above
10. An amplifier is stable if the absolute magnitude of βA is _____.

 A. ∞
 B. less than 1
 C. greater than 1
 D. None of the above
11. In the Barkhausen criterion, the loop gain A is equal to _____.

 A. ∞
 B. 200,000
 C. 0
 D. 1
12. In practice, A is made _____ and the system is started oscillating by
amplifying noise voltage, which is always present.

 A. greater than 1
 B. smaller than 1
 C. equal to 1
 D. None of the above
13. In the phase-shift oscillator, the gain of the amplifier stage must be _____.

 A. 0
 B. less than 29
 C. greater than 29
 D. ∞
14. In the phase-shift oscillator, the operating frequency is determined by _____.

 A. resistance only
 B. capacitance only
 C. LC combinations
 D. RC combinations
15. In the Wien bridge oscillator with R1 = R2 = R and C1 = C2 = C, a ratio of R3
to R4 will provide sufficient loop gain for the circuit to oscillate.

 A. 0
 B. 0.5
 C. 1
 D. 2
16. In the Colpitts oscillator, the frequency is determined by _____ .

 A. resistance only
 B. inductance only
 C. capacitance only
 D. both inductance and a capacitance
17. In the Colpitts oscillator, the elements X1 and X2 are _____ and X3 is a(n)
_____.

 A. inductors, capacitor
 B. capacitors, inductor
 C. capacitors, resistor
 D. inductors, resistor
18. In a Hartley oscillator, the elements X1 and X2 are _____ and X3 is a(n) _____.

 A. inductors, capacitor
 B. capacitors, inductor
 C. capacitors, resistor
 D. inductors, resistor
19. Crystal oscillators are used whenever a(n) _____ level of stability is required.

 A. lower
 B. average
 C. greater
 D. None of the above
20. Since the crystal losses represented by R are small, the equivalent crystal Q
(quality factor) is _____.
 A. very low
 B. low
 C. medium
 D. high
21. The series-resonant impedance of a crystal oscillator is _____.

 A. very low
 B. low
 C. medium
 D. very high
22. The parallel-resonant impedance of a crystal oscillator is _____.

 A. very low
 B. low
 C. medium
 D. very high
23. At the series-resonant frequency, the amount of positive feedback is _____.

 A. very large
 B. large
 C. small
 D. very small
24. _____ is a frequency-determining component in a unijunction oscillator.

 A. Total resistance
 B. Total capacitance
 C. Intrinsic stand-off ratio
 D. All of the above
25. Typically, a unijunction transistor has a stand-off ratio from _____ to _____.

 A. 0.0, 0.2
 B. 0.2, 0.4
 C. 0.4, 0.6
 D. 0.6, 0.8

MCQs in Power Supplies (Voltage Regulators)


1. In which of the following applications is a pulsating dc voltage suitable?

 A. Battery charger
 B. Radio
 C. Stereo system
 D. Computer
2. Calculate the ripple of a filter output having a 20-V dc component and a 1.7
Vr(rms) ac component.

 A. 6%
 B. 8.5%
 C. 85%
 D. 58%
3. Calculate the voltage regulation of a power supply having VNL = 50 V and VFL
= 48 V.

 A. 4.17%
 B. 5.2%
 C. 6.2%
 D. 7.1%
4. Across which of the following components of a power supply does the
average (dc) voltage exist?

 A. Diodes
 B. Secondary of the transformer
 C. Capacitor filter
 D. None of the above
5. Calculate the ripple voltage of a full-wave rectifier with a 75-µF filter capacitor
connected to a load drawing 40 mA.

 A. 1.20 V
 B. 1.28 V
 C. 1.32 V
 D. 1.41 V
6. What is the ratio of the period of the output voltage to the period of the input
voltage in a full-wave rectifier?

 A. 0
 B. 0.5
 C. 1
 D. 2
7. A _____ -wave rectified signal has less ripple than a _____ -wave rectified
signal and is thus better to apply to a filter.
 A. full, half
 B. half, full
8. If the value of full-load voltage is the same as the no-load voltage, the voltage
regulation calculated is _____ %, which is the best expected.

 A. 0
 B. 1
 C. 99
 D. 100
9. In which period is the capacitor filter charged in a full-wave rectifier?

 A. The time during the positive cycle


 B. The time during which the diodes are not conducting
 C. The time during which the diode(s) is (are) conducting
 D. The time during the negative cycle
10. In which period is the capacitor filter discharged through the load in a full-
wave rectifier?

 A. The time during the positive cycle


 B. The time during which the diodes are not conducting
 C. The time during which the diode(s) is (are) conducting
 D. The time during the negative cycle
11. If a peak rectified voltage for the full-wave filter circuit is 40 V, calculate the
filter dc voltage if C = 75 µF and load current is 40 mA.

 A. 27.9 V
 B. 32.12 V
 C. 37.78 V
 D. 40 V
12. Calculate the ripple of a capacitor filter for a peak rectified voltage of 40 V, a
capacitor value C = 75 µF, and a load current of 40 mA.

 A. 3.2%
 B. 3.59%
 C. 4.03%
 D. 4.59%
13. What is the ratio of the peak ripple voltage level to its rms voltage level?

 A. √3
 B. √2
 C. √3/2
 D. √2/2
14. The larger the value of the capacitor, the smaller the peak current drawn
through the rectifying diodes.

 A. True
 B. False
15. What is the purpose of an additional RC filter section in a power supply
circuit?

 A. Increase the dc voltage component


 B. Increase the ac voltage component
 C. Decrease the ac voltage component
 D. None of the above
16. Calculate the dc voltage across a 2-kΩ load for an RC filter section (R = 50 Ω,
C = 20 µF). The dc voltage across the initial filter capacitor is Vdc = 50 V.

 A. 40.78 V
 B. 42.78 V
 C. 45.78 V
 D. 48.78 V
17. The purpose of the added RC section is to pass most of the dc component
while reducing as much of the ac component as possible.

 A. True
 B. False
18. This circuit is an example of the ac equivalent of an RC filter.

 A. True
 B. False
19. For a full-wave rectifier with ac ripple at 120 Hz, the impedance of a capacitor
can be calculated using XC = _____.

 A. 0.707 ÷ C
 B. 1.414 ÷ C
 C. 1.3 ÷ C
 D. 0.785 ÷ C
20. In a simple series regulator circuit, which of the following components is the
controlling element?

 A. Load resistor
 B. Zener diode
 C. Transistor Q1
 D. None of the above
21. In this improved series regulator circuit, which of the following components
is the sampling circuit?

 A. Zener diode
 B. Load resistor
 C. Either of the two transistors Q1 or Q2
 D. Resistors R1 and R2
22. In this op-amp series regulator circuit, which of the following components is
the comparator circuit?

 A. Op-amp
 B. Transistor Q1
 C. R1 and R2 resistors
 D. Zener diode
23. What regulated output voltage is provided for the following circuit elements:
R1 = 15 kΩ, R2 = 35 kΩ, and VZ = 11.2 V?

 A. 16.50 V
 B. 17 V
 C. 17.35 V
 D. 18.25 V
24. Which component(s) set(s) the voltage across the load in a basic transistor
shunt regulator?

 A. Zener diode
 B. Transistor base-emitter voltage
 C. Both the Zener diode and the transistor base-emitter voltage
 D. None of the above
25. In an improved shunt regulator, which of the following components sets the
reference voltage?

 A. Transistor Q1
 B. Zener diode
 C. Transistor Q2
 D. RS
26. For what range of load current can voltage regulators be selected for
operation?

 A. Hundreds of picoamperes to tens of nanoamperes


 B. Hundreds of picoamperes to tens of milliamperes
 C. Hundreds of milliamperes to tens of amperes
 D. None of the above
27. For what range of fixed regulated voltages do the series 78xx regulators
provide regulation?

 A. –5 V to +24 V
 B. +5 V to +24 V
 C. –5 V to –24 V
 D. None of the above
28. What is the typical dropout voltage for the 7812 fixed positive voltage
regulator?

 A. 4 mV
 B. 100 mV
 C. 1.5 V
 D. 2 V
29. How many diodes conduct in the full-wave bridge rectifier while the capacitor
is being charged?

 A. 1
 B. 2
 C. 3
 D. 4
30. What is the range of the voltage level of the LM317 adjusted voltage
regulator?
 A. 0 V to 5 V
 B. 1.2 V to 37 V
 C. –5 V to –24 V
 D. 5 V to 24 V
31. What are the typical values of Vref and Iadj for the LM317 adjustable voltage
regulator?

 A. 1.0 V, 100 mA
 B. 1.5 V, 100 mA
 C. 1.25 V, 100 μA
 D. 1.25 V, 10 mA
32. The 7812 regulator IC provides _____.

 A. 5 V
 B. –5 V
 C. 12 V
 D. –12 V
33. The 7912 regulator IC provides _____ .

 A. 5 V
 B. –5 V
 C. 12 V
 D. –12 V
34. The 7905 regulator IC provides _____.

 A. 5 V
 B. –5 V
 C. 12 V
 D. –12 V
35. The 7805 regulator IC provides _____.

 A. 5 V
 B. –5 V
 C. 12 V
 D. –12 V
FILL-IN-THE-BLANKS
1. A complete power supply has a _____.

 A. rectifier
 B. filter
 C. voltage regulator
 D. All of the above
2. The output resulting from a rectifier is a(n) _____.

 A. ac voltage
 B. pure dc voltage
 C. pulsating dc voltage
 D. None of the above
3. The _____ the ac variation with respect to the dc level, the _____ the filter
circuit’s operation.

 A. smaller, better
 B. larger, better
 C. smaller, worse
 D. None of the above
4. A dc voltmeter reads the _____ while measuring a pulsating dc voltage.

 A. ac component of the signal


 B. average of the signal
 C. peak of the pulsating signal
 D. None of the above
5. The filter output voltage of a power supply _____ when load current is drawn
from the supply.

 A. remains the same


 B. is increased
 C. is reduced
 D. None of the above
6. The _____ the voltage regulation, the _____ the operation of the voltage
supply circuit.

 A. smaller, better
 B. larger, better
 C. smaller, worse
 D. None of the above
7. A full-wave rectified signal has _____ dc component and _____ ripple than (as)
the half-wave rectified voltage.

 A. a larger, more
 B. a smaller, less
 C. the same, less
 D. a larger, less
8. If the value of the full-load voltage is the same as the no-load voltage, the
voltage regulation calculated is _____.

 A. 0%
 B. a negative percentage
 C. a positive percentage
 D. None of the above
9. In a half-wave rectifier, the dc voltage level is _____ the ripple voltage level.

 A. smaller than
 B. the same as
 C. larger than
 D. None of the above
10. In a full-wave rectifier, the dc voltage level is _____ the ripple voltage level.

 A. smaller than
 B. the same as
 C. larger than
 D. None of the above
11. In a full-wave rectifier, if no load were connected across the capacitor, the
output voltage would ideally be a(n) _____.

 A. ac voltage
 B. constant dc voltage
 C. pulsating dc voltage
 D. ramp voltage
12. The output of a loaded power supply is _____ that of the unloaded.

 A. the same as
 B. larger than
 C. smaller than
 D. None of the above
13. The charging and discharging of the capacitor filter take _____ of the period
of the input voltage.

 A. 0.25
 B. 0.5
 C. 0.75
 D. 1
14. The frequency of the output voltage of a full-wave rectifier is _____ the
frequency of its input voltage.

 A. the same as
 B. twice
 C. one-half
 D. one-third
15. The ripple voltage Vr is a result of the _____.

 A. conduction of the diode(s)


 B. transformer windings
 C. charging and discharging of the capacitor
 D. load resistor
16. The _____ values of capacitor filter provide _____ ripple and _____ average
voltage.

 A. larger, more, higher


 B. smaller, less, lower
 C. smaller, more, higher
 D. larger, less, higher
17. The _____ the diode conduction time, the _____ the amount of the charging
current through the capacitor filter.

 A. shorter, larger
 B. shorter, smaller
 C. longer, larger
 D. None of the above
18. In a current-limiting circuit, _____ provide(s) the limiting of the maximum
load current.

 A. the Zener diode


 B. the short-circuit resistor Rsc
 C. the transistor Q1
 D. both the short-circuit resistor Rsc and transistor Q2
19. In a foldback configuration, limiting the current reduces _____, protecting the
load from overcurrent as well as protecting the regulator.

 A. the output voltage


 B. the output current
 C. both the output voltage and output current
 D. None of the above
20. A type of regulator circuit that is quite popular for its efficient transfer of
power to the load is the _____.

 A. current-limiting voltage regulator


 B. switching regulator
 C. foldback limiting regulator
 D. op-amp series regulator
21. Regulator IC units contain the circuitry for the _____.

 A. reference source
 B. comparator amplifier
 C. control device and overload protection
 D. All of the above
22. IC units provide regulation of _____.

 A. a fixed positive voltage


 B. a fixed negative voltage
 C. an adjustably set voltage
 D. All of the above
23. The specification sheet for the 7812 fixed positive voltage regulator shows
that the output voltage could be as low as _____ or as high as _____.

 A. 11.5 V, 12.5 V
 B. 11.2 V, 12.2 V
 C. 11 V, 13 V
 D. 8 V, 15 V
24. The series 7900 ICs are _____.

 A. positive voltage regulators


 B. negative voltage regulators
 C. both positive and negative voltage regulators
 D. adjustable-set voltage regulators
25. The _____ is (are) an adjustable voltage regulator.

 A. series 7800 ICs


 B. series 7900 ICs
 C. LM317
 D. None of the above

MCQs in Other Two-Terminal Devices


1. Which of the following is (are) diodes?

 A. Schottky
 B. Varactor
 C. Tunnel
 D. All of the above
2. Which of the following metals is (are) used in the fabrication of Schottky
diodes?

 A. Molybdenum
 B. Platinum
 C. Tungsten
 D. All of the above
3. What are the typical ranges of reverse-bias current levels IS for low-power and
high-power Schottky diodes at room temperature?

 A. Picoamperes, nanoamperes
 B. Nanoamperes, microamperes
 C. Microamperes, milliamperes
 D. Milliamperes, amperes
4. What is the voltage drop across Schottky diodes?

 A. 0 V to 0.2 V
 B. 0.7 V to 0.8 V
 C. 0.8 V to 1.0 V
 D. 1.0 V to 1.5 V
5. What metal(s) is(are) used in the construction of Schottky diodes?

 A. Molybdenum
 B. Platinum
 C. Tungsten
 D. Silicon
 E. Any of the above
6. For a 50-A unit, the PIV of the Schottky is about _____ compared to 150 V for
the p-n junction variety.
 A. 25
 B 50
 C. 75
 D. 100
7. Schottky diodes are very effective at frequencies approaching _____.

 A. 20 GHz
 B. 10 MHz
 C. 100 MHz
 D. 1 MHz
8. This is an approximate equivalent circuit for the _____ diode.

 A. Schottky
 B. varicap
 C. tunnel
9. What is the range of the varying capacitor CT in varactor diodes?

 A. 0 pF to 5 pF
 B. 2 pF to 100 µF
 C. 2 µF to 100 µF
 D. 2 pF to 100 pF
10. Which of the following areas is (are) applications of varactor diodes?

 A. FM modulators
 B. Automatic-frequency control devices
 C. Adjustable bandpass filters
 D. All of the above
11. The tuning diode is a _____-dependent, variable _____.

 A. voltage, resistor
 B. current, capacitor
 C. voltage, capacitor
 D. current, inductor
12. This is an equivalent circuit for the _____ diode.

 A. Schottky
 B. varicap
 C. tunnel
13. The varicap diode has a transition capacitance sensitive to the applied
reverse-bias potential that is a maximum at zero volts and decreases _____ with
increasing reverse-bias potentials.

 A. logarithmically
 B. parabolically
 C. exponentially
14. The majority of power diodes are constructed using _____.

 A. molybdenum
 B. platinum
 C. tungsten
 D. silicon
15. The current capability of power diodes can be increased by placing two or
more in series.

 A. True
 B. False
16. The PIV rating of power diodes can be increased by stacking the diodes in
series.

 A. True
 B. False
17. Which of the following diodes has a negative-resistance region?

 A. Schottky
 B. Varactor
 C. Tunnel
 D. Power
18. Which of the following semiconductor materials is (are) used in the
manufacturing of tunnel diodes?

 A. Germanium
 B. Gallium
 C. Both germanium and gallium arsenide
 D. Silicon
19. What is the ratio IP / IV for gallium arsenide?

 A. 1:1
 B. 5:1
 C. 10:1
 D. 20:1
20. What is the limit of peak current IP in tunnel diodes?

 A. A few microamperes to several hundred amperes


 B. A few microamperes to several amperes
 C. A few microamperes to several milliamperes
 D. A few microamperes to several hundred microamperes
21. What is the maximum peak voltage for tunnel diodes?

 A. 50 mV
 B. 100 mV
 C. 250 mV
 D. 600 mV
22. In which region is the operating point stable in tunnel diodes?

 A. Negative-resistance
 B. Positive-resistance
 C. Both negative- and positive-resistance
 D. Neither negative- nor positive-resistance
23. Which of the following diodes is limited to the reverse-bias region in its
region of operation?

 A. Schottky
 B. Tunnel
 C. Photodiode
 D. Rectifier
24. What is the response time of cadmium sulfide (CdS) in photoconductive
cells?
 A. 100 ms
 B. 50 ms
 C. 25 ms
 D. 10 ms
25. Which of the following areas is (are) an application of infrared-emitting
diodes?

 A. Intrusion alarms
 B. Shaft encoders
 C. Paper-tape readers
 D. All of the above
26. What is the maximum temperature limit for liquid-crystal displays (LCDs)?

 A. 10ºC
 B. 30ºC
 C. 60ºC
 D. 100ºC
27. What is the response time of light-emitting diodes (LEDs)?

 A. Less than 100 ns


 B. 50 ms
 C. 100 ms to 300 ms
 D. 400 ms
28. What is the response time of LCDs?

 A. Less than 100 ns


 B. 50 ms
 C. 100 ms to 300 ms
 D. 400 ms
29. What is the power density received from the sun at sea level?

 A. 10 mW/cm2
 B. 100 mW/cm2
 C. 500 mW/cm2
 D. 1 W/cm2
30. Which of the following semiconductor materials is (are) used for
manufacturing solar cells?

 A. Gallium arsenide
 B. Indium arsenide
 C. Cadmium sulfide
 D. All of the above
31. What type of temperature coefficient do thermistors have?

 A. Positive
 B. Negative
 C. Either positive or negative
 D. None of the above
32. Which of the following materials is (are) used in the manufacturing of
thermistors?

 A. Ge
 B. Si
 C. A mixture of oxides of cobalt, nickel, strontium, or manganese
 D. All of the above
33. What is the resistance of thermistors at room temperature (20ºC)?

 A. 5 kΩ
 B. 1 kΩ
 C. 100 Ω
 D. 1 Ω
34. What is the resistance of thermistors at boiling temperature (100ºC)?

 A. 5 kΩ
 B. 1 kΩ
 C. 100 Ω
 D. 1 Ω
35. What is the typical level of change in resistance per degree change in
temperature?

 A. 1% to 2%
 B. 3% to 5%
 C. 7% to 10%
 D. 10% to 25%
FILL-IN-THE-BLANKS
1. Schottky diodes have _____.

 A. quick response time


 B. a lower noise figure
 C. both quick response time and a lower noise figure
 D. None of the above
2. Schottky diode construction results in a _____ uniform junction region and a
_____ level of ruggedness.

 A. more, high
 B. less, high
 C. more, low
 D. less, low
3. In both n-type and p-type silicon materials, the _____ is the majority carrier in
a Schottky diode.

 A. hole
 B. electron
 C. proton
 C. neutron
4. The barrier at the junction for a Schottky diode is _____ that of the p-n
junction device in both the forward- and reverse-bias regions.

 A. the same as
 B. more than
 C. less than
 D. None of the above
5. A Schottky diode has _____ level of current at the same applied bias
compared to that of the p-n junction at both the forward- and reverse-bias
regions.

 A. a lower
 B. a higher
 C. the same
 D. None of the above
6. The PIV of Schottky diodes is usually _____ that of a comparable p-n junction
unit.

 A. 1/2
 B. 1/3
 C. 1/4
 D. 1/5
7. Varactor diodes are _____.
 A. semiconductor devices
 B. voltage-dependent
 C. variable capacitors
 D. All of the above
8. In varactor diodes, as the reverse-bias potential increases, the width of the
depletion region _____, which in turn _____ the transition capacitance.

 A. increases, increases
 B. decreases, reduces
 C. increases, reduces
 D. decreases, increases
9. The normal range of reverse-bias voltage VR for varactor diodes is limited to
about _____.

 A. 15 V
 B. 20 V
 C. 25 V
 D. 40 V
10. In the reverse-bias region of varactor diodes, the resistance RR in parallel
with the varying capacitor is _____ and the series resistance RS is _____.

 A. very large, very small


 B. very large, very large
 C. very small, very large
 D. very small, very small
11. The majority of power diodes are constructed using silicon because of its
higher _____ rating(s).

 A. current
 B. temperature
 C. PIV
 D. All of the above
12. The current capability of power diodes can be increased by placing two or
more of the diodes in _____, and the PIV rating can be increased by stacking the
diodes in _____.

 A. parallel, parallel
 B. series, parallel
 C. parallel, series
 D. series, series
13. In the negative-resistance region of tunnel diodes, as the terminal voltage
increases, the diode current _____.

 A. remains the same


 B. decreases
 C. increases
 D. is undefined
14. The p-n junction of a tunnel diode is doped at a level from _____ to _____
times that of a typical semiconductor diode.

 A. one, several
 B. several, ten
 C. more than ten, several hundred
 D. one hundred, several thousand
15. The negative-resistance region of tunnel diodes can be used in the design of
_____.

 A. oscillators
 B. switching networks
 C. pulse generators
 D. All of the above
16. The wavelength is usually measured in _____.

 A. angstrom units
 B. micrometers
 C. both angstrom units and micrometers
 D. None of the above
17. In photodiodes, an increase in light intensity _____ the reverse current.

 A. increases
 B. decreases
 C. maintains
 D. None of the above
18. Ge has a _____ dark current and a _____ level of reverse current than silicon.

 A. higher, lower
 B. higher, higher
 C. lower, higher
 D. lower, lower
19. The response time for cadmium selenide (CdSe) is _____.
 A. 100 ms
 B. 50 ms
 C. 25 ms
 D. 10 ms
20. A decrease in illumination _____ the resistance Rλ of a photoconductive cell.

 A. decreases
 B. increases
 C. maintains
 D. None of the above
21. LCDs have _____ power requirement than (as) LEDs.

 A. a lower
 B. a higher
 C. the same
 D. None of the above
22. LCDs are characteristically _____ LEDs.

 A. the same speed as


 B. much slower than
 C. faster than
 D. much faster than
23. _____ is (are) the most widely used material(s) for solar cells.

 A. Selenium
 B. Silicon
 C. Both selenium and silicon
 D. Cadmium sulfide
24. In general, silicon _____.

 A. has a higher conversion efficiency


 B. has greater stability
 C. is less subject to fatigue
 D. All of the above
25. Typical levels of efficiency for solar cells range from _____ to _____.

 A. 10%, 40%
 B. 40%, 50%
 C. 50%, 75%
 D. 75%, 100%
MCQs in pnpn and Other Devices
Choose the letter of the best answer in each questions.
1. How many layers of semiconductor materials does a silicon-controlled
rectifier (SCR) have?

 A. 2
 B. 3
 C. 4
 D. 5
2. Which of the following devices has (have) four layers of semiconductor
materials?

 A. Silicon-controlled switch (SCS)


 B. Gate turn-off switch (GTO)
 C. Light-activated silicon-controlled rectifier (LASCR)
 D. All of the above
3. A thyristor is a _____-layer semiconductor material device.

 A. 2
 B. 3
 C. 4
 D. 5
4. Which of the following devices is unquestionably of the greatest interest
today?

 A. SCR
 B. GTO
 C. LASCR
 D. SCS
5. What is the frequency range of application of SCRs?

 A. About 10 kHz
 B. About 50 kHz
 C. About 250 kHz
 D. About 1 mHz
6. Which one of the SCR terminals fires the SCR?

 A. Anode
 B. Cathode
 C. Gate
 D. All of the above
7. What is the typical value of the reverse resistance of SCRs?

 A. 1 Ω to 10 Ω
 B. 100 Ω to 1 kΩ
 C. 1 k Ω to 50 kΩ
 D. 100 kΩ or more
8. Which of the following transistors is an SCR composed of?

 A. npn, pnp
 B. npn, npn
 C. pnp, pnp
 D. None of the above
9. Which of the transistors of an SCR are conducting when the SCR is fired and
is in the conduction mode?

 A. npn
 B. pnp
 C. Both npn and pnp
 D. Neither npn nor pnp
10. What is the range of the turn-on times in high-power SCR devices?

 A. 30 µs to 100 µs
 B. 10 µs to 25 µs
 C. 5 µs to 8 µs
 D. 1 µs to 5 µs
11. What is the typical range of turn-off times for SCRs?

 A. 5 µs to 30 µs
 B. 1 µs to 5 µs
 C. 0.1 µs to 1 µs
 D. 0.01 µs to 0.1 µs
12. This symbol is an example of a(n) _____.

 A. SCR
 B. SCS
 C. GTO
 D. DIAC
13. Which of the following parameters are usually provided by the manufacturer
on the specification sheet for SCRs?

 A. Turn-on time (ton )


 B. Turn-off time (toff )
 C. Junction and case temperatures (tj and tc )
 D. All of the above
14. How many terminals does a silicon-controlled switch (SCS) device have?

 A. 2
 B. 3
 C. 4
 D. 5
15. What is the typical value of the triggering anode gate for SCS devices?

 A. 1.5 mA
 B. 150 A
 C. 15 A
 D. 1 A
16. Which of the following is (are) the advantages of the SCS over a
corresponding SCR?

 A. Reduced turn-off time


 B. Increased control and triggering sensitivity
 C. More predictable firing situation
 D. All of the above
17. Which of the following areas is (are) applications of an SCS?

 A. Counters
 B. Pulse generators
 C. Voltage sensors
 D. All of the above
18. This symbol is an example of a(n)_____.

 A. SCR
 B. SCS
 C. GTO
 D. DIAC
19. For an SCS, a _____ pulse at the anode gate turns the device on, while a
_____ pulse will turn it off.

 A. negative, positive
 B. positive, negative
20. An advantage of the SCR over the SCS is the reduced turn-off time.

 A. True
 B. False
21. Which of the following devices has the smallest turn-off time?

 A. SCR
 B. GTO
 C. SCS
 D. LASCR
22. Which of the following devices has nearly the same turn-on time as turn-off
time?

 A. SCR
 B. GTO
 C. SCS
 D. LASCR
23. This symbol is an example of a(n) _____.

 A. SCR
 B. SCS
 C. GTO
 D. diac
24. What is the maximum current (rms) rating for commercially available LASCRs
today?

 A. 3 A
 B. 15 A
 C. 20 A
 D. 25 A
25. How many terminals does a Shockley diode have?

 A. 5
 B. 4
 C. 3
 D. 2
26. This symbol is an example of a(n) _____.

 A. SCR
 B. SCS
 C. GTO
 D. DIAC
27. Which of the following devices does not have a cathode terminal?

 A. SCR
 B. SCS
 C. Triac
 D. Shockley diode
28. Today, the SCR is more widely used than the TRIAC.

 A. True
 B. False
29. Which of the following devices has a negative-resistance region in its
characteristics curve?

 A. SCR
 B. SCS
 C. Unijunction transistor
 D. Phototransistor
30. What is the range of the variable resistor in the equivalent circuit of a
unijunction transistor?

 A. 50 Ω to 5 kΩ
 B. 6 kΩ to 10 kΩ
 C. 5 Ω to 50 Ω
 D. 1 Ω to 5 Ω
31. This is an example of a high-isolation _____ gate.

 A. OR
 B. NOT
 C. AND
 D. NAND
32. The ISO-LIT Q1 16-pin Litronix opto-isolator DIP contains _____ opto-
isolators.

 A. 4
 B. 8
 C. 12
 D. 6
33. How many terminals does a programmable unijunction transistor (PUT)
have?

 A. 4
 B. 3
 C. 2
 D. 1
34. Determine RB1 for a silicon PUT if it is determined that h = 0.84, VP = 11.2 V,
and RB2 = 5 kΩ.

 A. 12.65 kΩ
 B. 16.25 kΩ
 C. 20.00 kΩ
 D. 26.25 kΩ
FILL-IN-THE-BLANKS
1. The two-layer semiconductor diode has led to _____layer devices.

 A. three-
 B. four-
 C. five-
 D. All of the above
2. The four-layer devices with a control mechanism are commonly referred to as
_____.

 A. thyristors
 B. transistors
 C. diodes
 D. None of the above
3. _____ are areas of application for SCRs.

 A. Relay controls
 B. Time-delay circuits
 C. Motor controls
 D. All of the above
4. SCRs have been designed to control powers as high as _____, with individual
ratings as high as _____ at _____.

 A. 1800 MW, 10 A, 2000 V


 B. 1800 MW, 2000 A, 10 V
 C. 10 MW, 2000 A, 1800 V
 D. 2000 MW, 10 A, 1800 V
5. The _____ are the terminals of SCRs.

 A. anode and cathode


 B. anode, gate, and cathode
 C. base, anode, and cathode
 D. gate and anode
6. In the conduction region, the dynamic resistance of the SCR is typically _____
to _____.

 A. 0.01 Ω, 0.1 Ω
 B. 1 Ω, 10 Ω
 C. 50 Ω, 100 Ω
 D. 500 Ω, 10 kΩ
7. The SCRs have typical turn-on times of _____ in the regeneration action.

 A. 0.1 μs to 1 μs
 B. 0.1 ms to 1 ms
 C. 3 ms to 5 ms
 D. 5 ms to 9 ms
8. The method(s) for turning off an SCR is (are) categorized as _____.

 A. current interruption
 B. forced commutation
 C. both current interruption and forced commutation
 D. None of the above
9. At –65ºC the minimum current that will trigger the series of an SCR is _____,
while at +150ºC only _____ is required.

 A. 20 mA, 100 mA
 B. 50 mA, 75 mA
 C. 75 mA, 50 mA
 D. 100 mA, 20 mA
10. In a half-wave variable-resistance phase control operation, the control cannot
be extended past a ______ phase displacement.

 A. 45º
 B. 90º
 C. 135º
 D. 180º
11. The _____ are the terminals of an SCS.

 A. anode, anode gate, cathode gate, and cathode


 B. anode, cathode, cathode gate, and gate
 C. anode, anode gate, cathode, and gate
 D. anode, cathode, and gate
12. The _____ the anode gate current, the _____ the required anode-to-cathode
voltage to turn the SCS device on.

 A. higher, higher
 B. lower, lower
 C. higher, lower
 D. None of the above
13. The anode gate connection can be used to turn the SCS device _____.

 A. on
 B. off
 C. neither on nor off
 D. either on or off
14. To turn on an SCS device, a _____ pulse must be applied to the anode gate
terminal; to turn off the device, a _____ pulse is required.

 A. positive, positive
 B. negative, positive
 C. positive, negative
 D. negative, negative
15. In general, the triggering (turn-on) anode gate current is _____ the required
cathode gate current.

 A. larger than
 B. the same as
 C. smaller than
 D. None of the above
16. A(n) _____ can be triggered in either direction.

 A. SCR
 B. Shockley diode
 C. diac
 D. SCS
17. _____ is (are) the element(s) of a unijunction transistor’s equivalent circuit.

 A. One fixed resistor


 B. A variable resistor
 C. A diode
 D. All of the above
18. The current induced by photoelectric effects is the _____ current of the
transistor.

 A. collector
 B. base
 C. emitter
 D. None of the above
19. _____ in light intensity corresponds with _____ in collector current.

 A. An increase, an increase
 B. An increase, a decrease
 C. A decrease, an increase
 D. None of the above
20. _____ is(are) example(s) of applications of phototransistors.

 A. Punch-card readers
 B. Lighting control (for example, on highways)
 C. Level indication
 D. All of the above
21. An opto-isolator contains _____.

 A. an infrared LED
 B. a photodetector
 C. both an infrared LED and a photodetector
 D. None of the above
22. The switching time of an opto-isolator _____ with increased current, while for
many devices it is exactly the reverse.
 A. increases
 B. decreases
 C. remains the same
 D. None of the above
23. In a programmable unijunction transistor (PUT), the _____ can be controlled
through a couple of resistors and the supply voltage.

 A. interbase resistance RBB


 B. intrinsic stand-off ratio
 C. emitter firing potential VP
 D. All of the above
24. The peak and valley currents of the PUT are typically _____ those of a
similarly rated UJT.

 A. lower than
 B. the same as
 C. higher than
 D. None of the above
25. The minimum operating voltage of the UJT is typically _____ that of a
similarly rated PUT.

 A. lower than
 B. the same as
 C. higher than
 D. None of the above

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