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Dr. D. C.

Patel

Introduction
Practical PLC
Programming
First Edition

i
Preface

It gives a great pleasure to present this book on “Introduction to Practical PLC


Programming”. This book has been written for the first course in “PLC
Programming” especially for beginner learner of automation technology. This
book covers introduction of programmable logic controllers with basic to
advance ladder programming techniques. The main objective of this book is to
bridge the gap between theory and practical implementation of PLC
information and knowledge.
In this book, you will get an overview of how relay logic can be converted into
PLC logic. There also lots of examples, tables, and ladder diagrams to help and
explain the topics.
I would like to express my special thanks to my guide Dr. D P Vakharia to
always motivate me for industrial problem solving exercise. Also, I would like
to thanks my parents, wife for continue support me.

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Table of Contents

Chapter Items Page No.

1 Introduction PLC And Automation 1-11


1.1 Introduction
1.2 What Is PLC
1.3 History of Programmable Logic
Controllers (PLCs):
1.4 Types of PLC
1.5 Functional Description

2 Relay Logic to PLC Inputs/Outputs 12-21


2.1 Concept Of Relay Functioning
2.2 Relay Logic
2.3 Plc Inputs And Outputs
2.4 Plc Data Types
2.5 Memory Types
2.6 Address The Input And Output
2.7 Sinking And Sourcing

3 PLC Ladder Logic Programming 22-44


3.1 Introduction
3.2 Ladder Programming
3.3 Logic Functions
3.4 Multiple Outputs
3.5 Entering Programs
3.6 Function Block Diagram (FBD)
3.7 Jump And Call
3.8 Jumps Within Jumps
3.9 Subroutines

4 Event Based Logic Programming 45-68


4.1 Introduction

iii
4.2 Latching
4.3 Timer
4.4 Counter
4.5 Sequencer
4.6 Shift Registers
4.7 A Sequencing Application
4.8 Keeping Track Of Items

5 Data Handling and Advance Logic 69-84


5.1 Introduction
5.2 Data Handling
5.3 Logical Functions

6 Analog Programming 85-93


6.1 Introduction
6.2 Analog (A/D) Input
6.3 Analog (D/A) Output
6.4 Analog Data Handling
6.5 Analog I/O Potential Problems

7 Different PLC Programming 94-103


Languages
7.1 Introduction
7.2 Instruction List Programming
7.3structured Text Programming
7.4 Ladder Diagram (LD)
7.5 Function Block Programming
7.6 Sequential Function Charts

8 BIBLIOGRAPHY 105

iv
CHAPTER 1: INTRODUCTION PLC AND AUTOMATION

1.1 INTRODUCTION

A Programmable Logic Controller (PLC) is a specialized industrial computer control system used to
replace banks of electromagnetic relays in industrial process control via continuously monitoring
the state of input devices and makes decisions based upon custom program to control the state of
output devices. The PLC is also known as a programmable controller (PC). The tile "PC" for
programmable controller could be confused in common usage with "PC" used to mean personal
computer. To avoid this confusion, it is generally referred as programmable controller or
programmable logic controller or PLC.

The programmable logic controller is like a heavy-duty computer system designed for machine
control. Like a general-purpose computer, the PLC is based on digital logic and can be field-
programmed. The programming language is a bit different because the purpose of the PLC is to
control machines. The PLC is used to time and sequence functions that might be required in
assembly lines, robots, and chemical processing. It is designed to deal with the harsh conditions of
the industrial environment. Some of the physical environment problems could include vibration and
shock, dirt and vapors, and temperature extremes. The PLC commonly has to interface with a wide
variety of both input and output devices. Some input devices include limit and pressure switches,
temperature and optical sensors, and analog- to digital converters (ADCs). Some output devices
valves, motors and cylinders, and Digital-to Analog converts (DAC).

Before the advent of solid-state logic circuits, logical control systems were designed and built
exclusively around electromechanical relays. Relays are far from obsolete in modern design, but
have been replaced in many of their former roles as logic-level control devices, relegated most
often to those applications demanding high current and/or high voltage switching. Systems and
processes requiring "on/off" control abound in modern commerce and industry, but such control
systems are rarely built from either electromechanical relays or discrete logic gates. Instead, digital
computers fill the need, which may be programmed to do a variety of logical functions.

In the late 1960's an American company named Bedford Associates released a computing device
they called the MODICON. As an acronym, it meant Modular Digital Controller, and later became
the name of a company division devoted to the design, manufacture, and sale of these special-
purpose control computers. Other engineering firms developed their own versions of this device,
and it eventually came to be known in non-proprietary terms as a PLC, or Programmable Logic
Controller.

The leading PLC Manufacturers are Siemens, Schneider, Allen Bradley, Mitsubishi, Omron, ABB,
Panasonic, GE Fanuc, LG, Fatek, Delta etc.
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The purpose of a PLC was to directly replace electromechanical relays as logic elements,
substituting instead a solid-state digital computer with a stored program, able to emulate the
interconnection of many relays to perform certain logical tasks.

A PLC has many "input" terminals, through which it interprets "high" and "low" logical states from
sensors and switches. It also has many output terminals, through which it outputs "high" and "low"
signals to power lights, solenoids, contactors, small motors, and other devices lending themselves
to on/off control. In an effort to make PLC easy to program, their programming language was
designed to resemble ladder logic diagrams. Thus, an industrial electrician or electrical engineer
accustomed to reading ladder logic schematics would feel comfortable programming a PLC to
perform the same control functions.

PLC are industrial computers, and as such their input and output signals are typically 230 volts AC,
just like the electromechanical control relays they were designed to replace. Although some PLC
has the ability to input and output low-level DC voltage signals of the magnitude used in logic gate
circuits, this is the exception and not the rule.

1.2 WHAT IS A PLC?

A Programmable Logic Controller (PLC) is an industrial computer control system that continuously
monitors the state of input devices and makes decisions based upon a custom program to control
the state of output devices.

Almost any production line, machine function, or process can be greatly enhanced using this type
of control system. However, the biggest benefit in using a PLC is the ability to change and replicate
the operation or process while collecting and communicating vital information.

Another advantage of a PLC system is that it is modular. It can mix and match the different types of
Input and Output devices to best suit other industrial applications.

Programming
device Program & data Communications
memory interface

Input Output
inter- Processor inter-
face face

Power supply

Figure 1.1: PLC systems with interconnections

2
According to NEMA (National Electrical Manufacturer Association) “PLC is a digitally operated
electronic system, designed especially for the use in industrial environment, which use
programmable memory for internal storage of user-oriented instructions for implementing specific
function such as logic, sequencing, timing, counting & arithmetic to control, through digital & analog
inputs & outputs for various types of machines & processes.”

Both the PLC & its associated peripherals are designed so that they can be easily

integrated into an industrial control system & easily used in all intended functions.

1.3 HISTORY OF PROGRAMMABLE LOGIC CONTROLLERS (PLCS):

1968 : Design of PLCs developed for General Motors Corporation to eliminate

costly Scrapping or assembly line relays during model changeovers.

1969 : First PLCs manufactured for automotive industry as electronic equivalents of relays.

1971 : First application of PLCs outside the automotive industry.

1973 : Introduction of "smart" PLCs for arithmetic operations, printer control

move, Matrix operations, CRT interface etc.

1974 : Introduction of analog PID (Proportional, integral, derivative) control, which Made possible
the accessing of thermocouples, pressure sensors etc.

1975 : First use of PLCs in hierarchical configurations as part of an integrated Manufacturing


system.

1977 : Introduction of very small PLCs based on microprocessor technology.

1978 : PLCs gain wide acceptance, sales approach $ 80 million.

1979 : Integration of plant operation through a PLC communication system.

1980 : Introduction of intelligent input and output modules to provide high speed, accurate control
in positioning applications.

1981 : Data highways enable users to interconnect many PLCs up to 15000 feet from Each other.
More 16-bit PLCs become available. Color graphic CRTs are available from several
suppliers.

1982 : Larger PLCs with up to 8192 I/O become available.

1983 : "Third party" peripherals, including graphic CRTs, operator’s interfaces, I/O networks, panel
displays, and documentation packages, become available from many sources.

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1.4 TYPES OF PLC

Programmable logic controllers (PLCs) has several types. PLC divided into two types: Based on
the size of the module and it can be classified according to its working,

1.4.1 Based on Size

I. Micro PLC or Small PLC: It is the simplest PLC with the Power Supply module, CPU, I / O
modules and communication ports in a single chassis. This PLC types are usually limited to a few I
/ O discrete and can be expanded. There are various micro PLCs are in the market today. The vast
majority offer analog I /O. with just about any micro PLC, or for that matter PLC in general, when
the application requires the monitoring of various analog signals, a separate module is required for
each signal (voltage, current, temperature). Examples of this type are CP1H Omron, Siemens S7-
200, Fuji Electric SPB.

II. Medium PLC or Mini: It is PLC which has CPU module, I / O or communication port are
separately. Each module is connected by connector or backplane. It has the capacity more than
2000 I / O. Examples of this type are Omron CS1, Siemens S7-300.

III. Large PLC or Rack: This kind of PLC is nearly equal to the medium one but it

has large I/O capacity and more able to be connected with the higher control systems. Examples of
this type are CVM1 Omron, Siemens S7-400.

Figure 1.2: Micro, Mini and Rack type PLC

1.4.2 Classified according to its Output working:

I. Relay based: This type of PLC are used for general purpose application.

II. Transistor based: This type of PLC are used for High speed application.

III. SCR based: This type of plc are used for heavy load switching.

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1.5 FUNCTIONAL DESCRIPTION

A programmable controller manufactured by any company has several common functional parts.
Figure illustrates a generic PLC architecture.

Programming device

Power supply CPU Memory

I/O System module


PLC

Input Device Output Device


Switches, Push button, Actuator, Motor,
Sensor limits,thermo- Solenoid coil,
couples, pre. sensor etc. valves ... etc.

Figure 1.3: Generic PLC architecture

The diagram shows Power Supply, I/O, central processor, memory, and programming and
peripheral device subsections. Each is discussed below.

1.5.1 Input System:

Inputs are defined as real-world signals giving the controller real-time status of process variables.
These signals can be analog or digital, low or high frequency, maintained or momentary. Typically
they are presented to the programmable controller as a varying voltage current or resistance value.
Signals from thermocouples (TCs) and resistance temperature detectors (RTDs) are common
examples of analog signals. Some flow meters and strain gauges provide variable frequency
signals, while pushbuttons, limit switches, or even electromechanically relay contacts are familiar
examples of digital, contact closure type signals. One additional type of input signal, the register
input, reflects the computer nature of the programmable controller.

Inputs are devices that supply a signal/data to a PLC. Typical examples of inputs are push
buttons, switches, and measurement devices. Basically, an input device tells the PLC, "Hey,
something’s happening out here…you need to check this out to see how it affects the control
program."

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Figure 1.4: common PLC Input devices

A discrete input, also referred to as a digital input, is an input that is either in an ON or OFF
condition. Pushbuttons, toggle switches, limit switches, proximity switches, and contact closures
are examples of discrete sensors which are connected to the PLC discrete or digital inputs. In the
ON condition a discrete input may be referred to as logic 1 or logic high. In the OFF condition a
discrete input may be referred to as logic 0 or a logic low.

Normally Open Pushbutton

Normally Closed Pushbutton

Normally Open Switch


PLC
Inputs
Normally Closed Switch

Normally Open Contact

Normally Closed contact

Figure 1.5: Discrete inputs

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An analog input is a continuous, variable signal. Typical analog inputs may vary from 0 to 20
milliamps, 4 to 20 milliamps, or 0 to 10 volts. In the following example, a level transmitter monitors
the level of liquid in a tank. Depending on the level transmitter, the signal to the PLC can either
increase or decrease as the level increases or decreases.

Level Transmitter
PLC
Inputs

Figure 1.6: Analog inputs

1.5.2. Outputs:

There are three common categories of outputs: Discrete, Register, and Analog. Discrete outputs
can be pilot lights, solenoid valves, or annunciator Windows (lamp box). Register output can drive
panel meters or displays; analog outputs can drive signals to variable speed drives or to I/P
(current to air) converters and thus to control valves.

Outputs are devices that await a signal/data from the PLC to perform their control functions.
Lights, horns, motors, and valves are all good examples of output devices. These devices stay put,
minding their own business, until the PLC says, "You need to turn on now" or "You’d better open
up your valve a little more," etc.

Figure 1.7: common PLC outputs devices

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A discrete output is an output that is either in an ON or OFF condition.

Solenoids, contactor coils, and lamps are examples of actuator devices connected to discrete
outputs. Discrete outputs may also be referred to as digital outputs. In the following example, a
lamp can be turned on or off by the PLC output it is connected to.

PLC
Outputs

Sunlight

Figure 1.8: Discrete outputs

An analog output is a continuous, variable signal. The output may be as simple as a 0-10 VDC
level that drives an analog meter. Examples of analog meter outputs are speed, weight, and
temperature. The output signal may also be used on more complex applications such as a current-
to-pneumatic transducer that controls an air-operated flow-control valve.

Motor

PLC Current to Pneumatic Transducer


Outputs I
Air Supply
P

Flow control valves

Figure 1.9: Analog outputs

The PLC program is executed as part of a repetitive process referred to as a scan. A PLC scan
starts with the CPU reading the status of inputs. The application program is executed using the
status of the inputs. Once the program is completed, the CPU performs internal diagnostics and
communication tasks. The scan cycle ends by updating the outputs, and then starts over. The
cycle time depends on the size of the program, the number of I/Os, and the amount of
communication required.

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1.5.3. Control Processor Unit (Real Time):

The central processor unit (CPU), or central control unit (CCU), performs the tasks necessary to
fulfill the PLC function. Among these tasks are scanning, I/O bus traffic control, program execution,
peripheral and external device communications, special function or data handling execution
(enhancements), and self-diagnostics.

One common way of rating how a PLC performs these tasks is its scan time. Scan time is roughly
defined as the time it takes for the programmable controller to interrogate the input devices,
execute the application program, and provide updated signals to the output devices. Scan times
can vary from 0.1 milliseconds per 1K (1024) words of logic to more than 50 milliseconds per 1 K
of logic. Therefore, when selecting a programmable controller other performance factors must be
considered. The user should take into account the application as well as the speed of the
controller.

1.5.4. Memory Unit:

The memory unit of the PLC serves several functions. It is the library where the application
program is stored. It is also where the PLC's executive is stored. An executive program functions
as the operating system of the PLC. It is the program that interprets, manages, and executes the
user's application program. Finally, the memory unit is the part of the programmable controller
where process data from the input modules and control data for the output modules are temporarily
stored as data tables. Typically, an image of these data tables is used by the CPU and, when
appropriate, sent to the output modules. Memory can be volatile or nonvolatile. Volatile memory is
erased if power is removed. Obviously, this is undesirable, and most units with volatile memory
provide battery back up to ensure that there will be no loss of program in the event of a power
outage. Nonvolatile memory does not change state on loss of power and is used in cases in which
extended power outages or long transportation time to job site (after program entry) are
anticipated. The basic programmable controller memory element is the word. A word is a collection
of 4, 8, 16, or 32 bits that is used to transfer data about the programmable controller. As word
length increase more information can be stored in a memory location.

1.5.5. Programmer Units:

The programmer unit provides an interface between the PLC and the user During Program
development, start-up, and troubleshooting. The instruction to be performed during each scan are
coded and inserted into memory with the programmer.

Programmers vary from small hand-held units the size of a large calculator to desktop stand-alone
intelligent CRT-based units. These units come complete with documentation, reproduction, I/O
status, and on-line and off-line programming ability. Many PLC manufactures now offer controller
models that can use a personal computer as the programming tool. Under these circumstances,

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the manufacture will sell a program for the personal computer that usually allows the computer that
module installed in the programmable controller.

Programming units are the liaison between what the PLC understands (words) and what the
engineer desires to occur during the control sequence. Some programmers have the ability to store
programs on other media, including cassette tapes and floppy disks. Another desirable feature is
automatic documentation of the existing program. This is accomplished by a printer attached to the
programmer. With off-line programming, the user can write a control program on the programming
unit, then take the unit to the PLC in the field and load the memory with the new program, all
without removing the PLC.

Selection of these features depends on user requirements and budget. On-line programming
allows cautions modification of the program while the PLC is controlling the process or the
machine.

1. 6 HOW DOES A PROGRAMMABLE LOGIC CONTROLLER WORKS?

24VDC

Sensor
Program Processor
Memory
Power Input Module
supply Output Module

Actuator

GND

Figure 1.10: PLC basic subparts

10
RS 232 Ethernet

Real Time Flash Serial Port Ethernet


CPU ROM EPROM
Clock Controller controller
Extension
bus
Buffers
Parallel Bus

Field bus Analog Digital Digital Analog Extension


Digital Output Digital Input
Controller Converters Converters I/Os

Signal Power Signal


Relays
Conditioning Amplifiers Conditioning

Field bus
Direct Inputs and Outputs

Figure 1.11: Architecture of PLC

PLC inputs must convert a variety of logic levels to the 5Vdc logic levels used on the data bus. This
can be done with circuits similar to those shown below. Basically, the circuits condition the input to
drive an opto coupler. This electrically isolates the external electrical circuitry from the internal
circuitry. Other circuit components are used to guard against excess or reversed voltage polarity.

PLC outputs must convert the 5Vdc logic levels on the PLC data bus to external voltage levels.
This can be done with circuits similar to those shown below. Basically, the circuits use an Opto-
coupler to switch external circuitry. This electrically isolates the external electrical circuitry from the
internal circuitry. Other circuit components are used to guard against excess or reversed voltage
polarity.

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CHAPTER 2: RELAY LOGIC AND PLC INPUTS/OUTPUTS

2.1 CONCEPT OF RELAY FUNCTIONING

2.1.1 What is a relay?

The most of the high end industrial application devices have relays for their effective working. A
relay is an electromagnetic switch operated by a relatively small electric current that can turn on or
off a much larger electric current. Relays consist of an electromagnet and also a set of contacts.
The heart of a relay is an electromagnet (a coil of wire that becomes a temporary magnet when
electricity flows through it). Relay works as electric lever and switch it on with a tiny current and it
switches on ("leverages") another appliance using a much bigger current. The switching
mechanism is carried out with the help of the electromagnet. There are also other operating
principles for its working. But they differ according to their applications.

From
To load
Power
source
Contacts
Control
open
switch
Control
coil
Iron core

Figure 2.1 : Relay and its construction

2.1.2 Why is a relay used?

The main operation of a relay comes in places where only a low-power signal can be used to
control a circuit. It is also used in places where only one signal can be used to control a lot of
circuits. The application of relays started during the invention of telephones. They played an
important role in switching calls in telephone exchanges.

They were also used in long distance telegraphy. They were used to switch the signal coming from
one source to another destination. After the invention of computers, they were also used to perform
Boolean and other logical operations. The high-end applications of relays require high power to be
driven by electric motors and so on. Such relays are called contactors.

As the main purpose of the PLC is to reduce real world relays we convert its element in to 3 basic
symbols for develop understanding over relays for CPU.

12
A relay is an electromagnetically actuated switch. When a voltage is applied to the solenoid coil, an
electromagnetic field results. This causes the armature to be attracted to the coil core. The
armature actuates the relay contacts, either closing or opening them, depending on a design. A
return spring returns the armature to its initial position when current to the coil is interrupted.

Com
Com NC NO
NC NO

Coil

Coil

Figure 2.2 : Relay coil symbolic presentation

2.2 RELAY LOGIC

There are several kinds of logic that are made with the help of relay. This smaller logic is the base
of all kind of functioning performed in industries. As we get command over these types of logics we
can handle even complex functionality of plant or process. The panel made by the relay is known
as relay logic panel.

2.3 PLC INPUTS AND OUTPUTS

2.3.1 Sensor (Connected to PLC Input)

A Sensor is a device that measures a physical quantity and converts it into a signal which can be
read by an observer or by an instrument. For example, a mercury-in glass thermometer converts
the measured temperature into expansion and contraction of a liquid which can be read on a
calibrated glass tube. A thermocouple converts temperature to an output voltage which can be
read by a voltmeter. For accuracy, most sensors are calibrated against known standards. Sensor
are two types

Digital Sensor: Digital Sensor have two unique voltage associated them to represent the two
unique digital states of 0 to 1. These voltages are commonly OV to 24V but there are many also
other. Ex. IR sensor, Proximity sensor, Hall sensor, PIR Sensor Analog Sensor: Analog sensor are
sensor that vary with respect to time. Ex. Level sensor, Flow sensor, Temperature Sensor, Speed
sensor.

Need for Sensors are omnipresent. They embedded in our bodies’ automobiles, airplane, cellular
telephone, radio, chemical plant, industrial plant and countless other application.

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2.3.2 Actuator (Connected to PLC Output)

An Actuator is a mechanical device for moving or controlling a mechanism or System. It is


operated by a source of energy, usually in the form of an electric current, hydraulic fluid pressure
or pneumatic pressure, and converts that energy into some kind of motion. Ex. Motor, Solenoid
valve, seven segments Display, Contactor, Relay, and Buzzer.

2.3.3 Difference between Actuator and Sensor

A sensor controls the variable for example temperature and pressure and transfers a signal to
indicator or transmitter. The actuator is a machine which knocks a valve or other machine in
accordance with the control signal transferred to the transducer. The transducer generally
transforms the control signal to a relative air signal which works the actuator with a great
diaphragm opposite a spring.

The mainly common actuator is an actuator of electro-servo or an actuator of hydraulic. These are
actuators of linear that transfer a piston rod to a place force and stroke. It is utilized to pull and
push at a force and fixed length (stroke). The actuator can be utilized to transfer controls through
variable geometry for example arcs used in conjunction with cranks and rods.

The Actuator of Hydraulic has an internal piston to the housing. The pressure of hydraulic is
docked on one end and pushes the piston to stir to the opposite end, which forces the rod to
enlarge it. Reversing the pressure of hydraulic will cause the rod to knock back to origin position.
The force that is existing is similar to the pressure of hydraulic times the piston area.

A sensor or detectors is a tool that measures a physical quantity and transforms it into a signal
which can be interpreted by a spectator or by an device. Sensors are utilized in everyday items for
example touch-sensitive buttons of elevator and lamps which brighten or dim by contacting the
base. There are also numerous applications for sensors of which mainly people are not aware. The
appliances consist of machines, cars, aerospace, manufacturing, robotics and medicine.

2.4 PLC DATA TYPES

There are 4 kinds of Data Types supported by most of the PLCs, which are as follows:

Bit (0,1)

Byte (combination of 8bits)

Word (combination of 16bits) = 2B

Double Word (combination of 32bits) = 2W

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Table 2.1: Types of data supported by PLC

1byte=8bits
Bit0 Bit5 Bit6 Bit7
I0.0 I0.2 I0.3 I0.4 I0.5 I0.6 I0.7
IB0
Q0.0 Q0.2 Q0.3 Q0.4 Q0.5 Q0.6 Q0.7
QB0
1byte=8bits
Bit0 Bit1 Bit2 Bit5 Bit6 Bit7
I1.0 I1.2 I1.3 I1.4 I1.5 I1.6 I1.7
IB1
Q1.0 Q1.2 Q1.3 Q1.4 Q1.5 Q1.6 Q1.7
QB1
Elementary Data Data Type Description Range
types Size
Bool 1bit Boolean 0 to 1
Byte 8 bit Unsigned byte 0 to 255
Byte 8 bit Signed byte -128 to 127
Word 16bit Unsigned integer 0 to 65535
int 16 bit Signed integer -32768 to +32767
Dword 32 bit Unsigned Double integer 0 to 429467295
Dint 32 bit Signed double integer -2147483648 to
2147483647
Real 32 bit IEEE 32 bit floating point +1.1751954E-38 to
+3.402823E+38

2.5 MEMORY TYPES

There are different memory locations, which is represented by memory types

abbreviations. The general the memory types are tabulated below.

Table 2.2: General memory locations in PLCs

Description International
Input I
Output Q
Variable Memory V
Internal Memory M
Analog Input AI
Analog Output AQ
Timer T
Counter C
Special Memory SM
Accumulator AC

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2.6 ADDRESS THE INPUT AND OUTPUT

I0.4 : means input bit 0.4


Input I0.4 Bit No.4

Byte No.0
Q0.6 : means output bit 0.6
Output Q0.6 Bit No.6

Byte No.0
T37 : means TIMER 37 ( Resolution : 10ms)
Timer T37

Timer no. 37
AIW0 : means analog input word 0
AIW0 Word no.0
Analog Input Word
SMB38 : means special memory byte 30
SMB30 Byte No. 30
Special Memory Byte

Figure 2.3: Addressing of input and output memory

2.7 SINKING AND SOURCING

One of the most often misunderstood notions in control engineering is the concept of the Sinking
and Sourcing relationship between I/O devices. This document is meant to give a solid
understanding of these concepts, and clear up the definition issues of Sinking (NPN), and Sourcing
(PNP), from both a technical and terminology perspective. “Sinking” and “Sourcing” terms are very
important in connecting a PLC correctly with external environment. These terms are applied only
for DC modules.

In general, sinking (NPN) and Sourcing (PNP) are terms that define the control of direct current
flow in a load. They are only pertinent with DC components and should not be associated with AC
control structures. Devices like relay outputs, reed switches, etc, are typically not affected since
they are not current direction dependent (unless they have internal polarity sensitive devices like
LEDs or unidirectional spike suppressors.

From an electro-pneumatic control perspective, it is important to understand this

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concept because it dictates which solenoid valve type (sinking or sourcing) is required for proper
operation with a specific (sinking or sourcing) output module. The same issues also apply for
inputs and sensor devices.

The following is a detailed explanation of these concepts that, in short, dictate:

“Sinking (NPN) provides a path to 0 VDC (-DC)”

“Sourcing (PNP) provides a path to +24 VDC (+DC)”

Sinking Input Sinking Output


(IE C : Positive Logic ) (IE C : Negative Logic )

Input Output
Load
Input Output NPN
Sensing Switch
common common
PLC PLC
Sourcing Input Sourcing Output
(IE C : Negative Logic ) (IE C : Positive Logic )
common common

Input Output PNP


Sensing Switch
Load
Input
PLC Output
PLC

Figure 2.4: circuit for sinking and sourcing

Note:

 Wire all I/O points with a shared common as either sinking or sourcing.
 Do not use an AC Power Supply on a DC sink/source I/O point.

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NPN Sinking PNP Sourcing
+ 24 V + 24 V

Out 1 : C Out 1 : C

Out 1 : E Out 1 : E

GND GND

Figure 2.5 : NPN sinking and PNP sourcing circuit

2.8 OUTPUT DEVICE

Sinking (NPN) Output: Are outputs that “Sink” or “pull” current through the load.In this case the
common connection to the load is the 24 VDC (+DC) line. Sinking output modules require the load
to be energized by a current, which flows from +24 VDC (+DC), through the load, through the NPN
Output Switch Device to the 0 VDC (-DC) line. Below is a representation of the circuit connection.

common
+24 V (+DC)

L L
O O
A A
D D
Current Flow

NPN Output
Switch

+0 V (- DC)

Figure 2.6: NPN sinking current flow diagram

18
+5 V DC
COM + 5V

01

02
5V DC Output
Module Sinking
03

04

05

06

07

TYP CKT 08
ALL OUTPUT

COM i

Figure 2.7: NPN sinking load connections

“Positive side {+24 VDC (+DC)} common and Negative side {0 VDC (-DC)} Switched Sourcing
(PNP) Outputs: Are outputs that “Source” or “push” current through the load.

This means that the common connection to the load is the 0 VDC (-DC) line. Sourcing output
modules require the load to be energized by a current that flows from +24 VDC (+DC), through the
PNP Output Switch device, through the load, to the 0 VDC (-DC) line. Below is a representation of
the circuit connection.

19
+24 V (+DC)

Current Flow PNP Output


Switch

L L
O O
A A
D D

+0 V (- DC)
common

Figure 2.8 : PNP sourcing current flow diagram

+5 V DC
+ 5V COM

01
5V DC Output
Module Sourcing
02

03

04

05 i

06

07

TYP CKT 08
ALL OUTPUT

COM

Figure 2.9: PNP sourcing load connections

Sourcing (PNP) Inputs: Are inputs that require an external sensor device to “Source” or “push”
current from the 24 VDC (+DC) line to the Input Circuitry. This means that the external sensor

20
device provides a current path from the 24 VDC (+DC) common point to the Input circuitry. Below
is a representation of the circuit connection.

+24 VDC PNP Input Circuit


Common

Sensor's PNP
Current Flow
Output CKT

Input Signal

+0 VDC

Figure 2.10: PNP input circuit connection

+24 V DC
COM +V

01
24V DC Input
sourcing module
02

03

04

05

06

+ - 07
Prox
TYP CKT Each
INPUT
+ -
Prox 08

COM

Figure 2.11: PNP input load connection

21
CHAPTER 3: PLC LADDER LOGIC PROGRAMMING

3.1 INTRODUCTION

Firstly, Microcontroller based systems programs are load into machine code, which is a sequence
of binary code numbers to represent the instruction of program. However, assembly language
based on the use of mnemonics can be used, e.g. LD is used to indicate the operation required to
load the data that follows the LD, and a computer program called an assembler is used to translate
the mnemonics into machine code. Programming can be made even easier by the use of the so-
called high-level languages, e.g. C, BASIC, PASCAL, FORTRAN, COBOL. These use pre-
packaged functions, represented by simple words or symbols descriptive of the function
concerned. For example, with C language the symbol & is used for the logic AND operation.
However, the use of these methods to write programs requires some skill in programming and
PLCs are intended to be used by engineers without any great knowledge of programming.

PLC microprocessor uses some software to convert ladder programming into machine code. This
method of writing programs became adopted by most PLC manufacturers, however each tended
to have developed their own versions and so an international standard has been adopted for
ladder programming and indeed all the methods used for programming PLCs. The standard,
published in 1993, is IEC 1131-3 (International Electrotechnical Commission). The IEC 1131-3
programming languages are ladder diagrams (LAD), instruction list (IL), sequential function charts
(SFC), structured text (ST), and function block diagrams (FBD).

This chapter is an introduction to the programming of a PLC using ladder diagrams and functional
block diagrams, with discussion of the other advance techniques in the next chapter. Here we are
concerned with the basic techniques involved in developing ladder and function block programs to
represent basic switching operations, involving the logic functions of AND, OR, Exclusive OR,
NAND and NOR, and latching. Later chapters continue with further ladder programming involving
other elements.

3.2 LADDER PROGRAMMING

Ladder logic is a form of drawing electric logic schematics, and is a graphical language very
popular for programming of PLC. Ladder was original invented to describe logic made from relay.
The name is based on the observation that program in this language resemble ladders, with two
vertical “rails” and a series of horizontal “rungs” between them.

22
Rungs

Left Right
Rail Rail

Figure 3.1 : Ladder Rungs

Power Neutral
Rail Rail

S L

GND
+ 24 V
I 0.0 Q 0.0

Switch Bulb

Figure 3.2 : Ladder Rung symbolic

The different companies Ladder Logic (LAD) editor allows you to build programs that resemble the
equivalent of an electrical wiring diagram. Ladder programming is probably the method of choice
for many PLC programmers and maintenance personnel. Basically, the ladder programs allow the
CPU to emulate the flow of electric current from a power source, through a series of logical input
conditions that in turn enable logical output conditions. The logic is usually separated into small,
easy-to-understand pieces that are often called "rungs" or "networks." The program is executed
one network at a time, from left to right and then top to bottom as dictated by the program. Once
the CPU has reached the end of the program, it starts over again at the top of the program.

23
Network 1

I 0.0 I 0.1 Q 1.0

I 2.1 I 2.1

Network 2

I 2.1 MOV_B SWAP

EN END EN END

VBS0 IN OUT AC0 AC0 IN

Figure 3.3 : Example of ladder programme

The various instructions are represented by graphic symbols and include three basic forms. As
shown in above figure, connect multiple box instructions in series.

1. Contacts - represent logic "input" conditions analogous to switches, buttons, internal


conditions and so on.
2. Coils - usually represent logic "output" results analogous to lamps, motor starters, interposing
relays, internal output conditions and so on.
3. Boxes - represent additional instructions such as timers, counters, or math instructions.

In drawing a ladder diagram, certain conventions are adopted like,

1. The vertical lines of the diagram represent the power rails between which circuits are
connected. The power flow is taken to be from the left-hand vertical across a rung.
2. Each rung on the ladder defines one operation in the control process.
3. A ladder diagram is read from left to right and from top to bottom, Figure 3.4 showing the
scanning motion employed by the PLC. The top rung is read from left to right. Then the
second rung down is read from left to right and so on. When the PLC is in its run mode, it
goes through the entire ladder program to the end, the end rung of the program being clearly
denoted, and then promptly resumes at the start. This procedure of going through all the
rungs of the program is termed a cycle. The end rung might be indicated by a block with the
word END or RET for return, since the program promptly returns to its beginning.

24
Right Power
Left Power
Rail
Rail Power flow
Rung 1

Rung 2

Rung 3

Rung 4

Rung 5

END End Rung

Figure 3.4 : Flow of instruction in rungs

4 Each rung must start with an input or inputs and must end with at least one output. The term
input is used for a control action, such as closing the contacts of a switch, used as an input to
the PLC. The term output is used for a device connected to the output of a PLC, e.g. a motor.

5 Electrical devices are shown in their normal condition. Thus a switch which is normally open until
some object closes it, is shown as open on the ladder diagram. A switch that is normally closed
is shown closed.

6 A particular device can appear in more than one rung of a ladder. For example, we might have a
relay which switches on one or more devices. The same letters and/or numbers are used to label
the device in each situation.

7 The inputs and outputs are all identified by their addresses, the notation used depending on the
PLC manufacturer. This is the address of the input or output in the memory of the PLC Figure
3.5 shows standard IEC 1131-3 symbols that are used for input and output devices. Some slight
variations occur between the symbols when used in semi-graphic form and when in full graphic.

25
Semi graphic form Full graphic form

A horizontal link along which


power can flow

Interconnection of horizontal
and vertical power flows

Left hand power connection


of ladder rung

Right hand power connection


of ladder rung

Normally open contact

Normally closed contact

Output coil: if the power flow


to it is on then the coil state is on

Figure 3.5 : Basic symbols

Note that inputs are represented by different symbols representing normally open or normally
closed contacts. The action of the input is equivalent to opening or closing a switch. Output coils
are represented by just one form of symbol. Further symbols will be introduced in later chapters.

To illustrate the drawing of the rung of a ladder diagram, consider a situation where the energizing
of an output device, e.g. a motor, depends on a normally open start switch being activated by
being closed. The input is thus the switch and the output the motor. Figure 3.6 shows the ladder
diagram.

Figure 3.6: A ladder rung time interpretation

Starting with the input, we have the normally open symbol | | for the input contacts. There
are no other input devices and the line terminates with the output, denoted by the symbol ( ).

26
When the switch is closed, i.e. there is an input, the output of the motor is activated. Only
while there is an input to the contacts is there an output. If there had been a normally closed
switch |/| with the output (Figure 3.6), then there would have been an output until that switch
was opened. Only while there is no input to the contacts is there an output.

In drawing ladder diagrams the names of the associated variable or addresses of each
element are attached to its symbol. Thus Figure 3.7 shows how the ladder diagram of Figure
3.6a would appear using (a) Mitsubishi, (b) Siemens, (c) Allen-Bradley, (d) Telemecanique
notations for the addresses. Thus Figure 3.7a indicates that this rung of the ladder program
has an input from address X400 and an output to address Y430. When wiring up the inputs
and outputs to the PLC, the relevant ones must be connected to the input and output
terminals with these addresses.

Figure 3.7: Notation: (a) Mitsubishi, (b) Siemens, (c) Allen-Bradley, (d) Telemecanique

3.3 LOGIC FUNCTIONS

There are many control situations requiring actions to be initiated only when a certain
combination of conditions is fulfilled. For an example, car should start when all the four
doors are in closed position. Such a situation involves the AND logic function for all the four-
door’s limit switch, this section is a consideration of such logic functions.

3.3.1 AND

Figure 3.8 shows a situation where an output is not energized unless both two, normally
open, switches are closed. Switch A and switch B both have to be closed, which gives an
AND logic situation. Thus, if we use 1 to indicate an on signal and 0 to represent an off
signal, then for there to be a 1 output we must have A and B both 1. Such an operation is
said to be controlled by a logic gate and the relationship between the inputs to a logic gate

24
and the outputs is tabulated in a form known as a truth table. Thus, for the AND gate we
have:
A B
Output
Inputs Inputs
A B
A Logic gate
0 0 0 Output
0 1 0 B
1 0 0 Control AND
1 1 1
Applied Voltage

Figure 3.8: (a) AND circuit, (b) AND logic gate

An example of an AND gate is an interlock control system for a machine tool so that it can
only be operated when both safety guard is in active position and the power switched on.

Figure 3.9 shows an AND gate system on a ladder diagram. The ladder diagram starts with
| |, shows a normally open set of contacts and labelled input A, to represent switch A and in
series with it | |, another normally open set of contacts labelled input B, to represent switch
B. The line then terminates with O to represent the output. For output condition to be
activated both input A and input B have to occur, i.e. input A and input B contacts have to be
closed. In general:

On a ladder diagram contacts in a horizontal rung, i.e. contacts in series, represent the
logical AND operations.

Input Input Input A


Output
A B
Input B

Output

Figure 3.9: AND gate with a ladder diagram rung

3.3.2 OR

Figure 3.10 shows an electrical circuit where an output is energized when switch A or B,
either of both normally open, are closed. This describes an OR logic gate in that input A or
input B must be on for there to be an output. The truth table is:

25
A
Inputs Output
A B B Inputs
0 0 0 A Logic gate
0 1 1 Output
1 0 1 B
Control OR
1 1 1
Applied Voltage

(a) (b) (c) Figure 3.10: (a) OR electrical circuit

(b) OR logic gate

Figure 3.10(a) shows an OR logic gate system on a ladder diagram,

Figure 3.11 showing an equivalent alternative way of drawing the same diagram. The ladder
diagram starts with | |, normally open contacts labelled input A, to represent switch A and in
parallel with it | |, normally open contacts labelled input B, to represent switch B. Either input
A or input B have to be closed for the output to be energized (Figure 3.11). The line then
terminates with O to represent the output. In general:

Alternative paths provided by vertical paths from the main rung of a ladder diagram, i.e.
paths in parallel, represent logical OR operations.

Output
Input A Input A

Input B
Input B

Output

3.11: OR gate

An example of an OR gate control system is a conveyor belt transporting bottled products to


packaging where a deflector plate is activated to deflect bottles into a reject bin if either the
weight is not within certain tolerances or there is no cap on the bottle.

3.3.3 NOT

Figure 3.12(a) shows an electrical circuit controlled by a switch that is normally closed.
When there is an input to the switch, it opens and there is then no current in the circuit. This
illustrates a NOT gate in that there is an output when there is no input and no output when
there is an input (Figure 3.12(c)). The gate is sometimes referred to as an inverter. The truth
table is:

26
Inputs Output
A
0 1
1 0

A
Input A Output

Input A

Applied Voltage Output

(a) (b) & (c)

Figure 3.12: (a) NOT logic with a ladder rung, (b) high output when no input to A

Figure 3.12 (b) shows a NOT gate system on a ladder diagram. The input A contacts are
shown as being normally closed. This is in series with the output ( ). With no input to input A,
the contacts are closed and so there is an output. When there is an input to input A, it opens
and there is then no output.

An example of a NOT gate control system is a machine should remain ON until an


emergency switch is OFF, as emergency switch activate machine should be OFF.

3.3.4 NAND

Suppose we follow an AND gate with a NOT gate (Figure 3.13(a)). The consequence of
having the NOT gate is to invert all the outputs from the AND gate. An alternative, which
gives exactly the same results, is to put a NOT gate on each input and then follow that with
OR (Figure 3.13(b)). The same truth table occurs, namely:

Output A NOT
Inputs
A B
0 0 1 A OR
AND NOT
0 1 1 B
1 0 1
1 0 B NOT

(a) (b) (c) Figure 3.13 : NAND gate

27
Both the inputs A and B have to be 0 for there to be a 1 output. There is an output when
input A and input B are not 1. The combination of these gates is termed a NAND gate.

Output
Input A Input A

Input B
Input B

Output

Figure 3.14 A NAND gate

Figure 3.14 shows a ladder diagram which gives a NAND gate. When the inputs to input A
and input B are both 0 then the output is 1. When the inputs to input A and input B are both
1, then the output is 0.

An example of a NAND gate control system is a warning light that comes on if, with a
machine tool, the safety guard switch has not been activated and the limit switch signaling
the presence of the workpiece has not been activated.

3.3.5 NOR

Suppose we follow an OR gate by a NOT gate (Figure 3.15(a)). The consequence of having
the NOT gate is to invert the outputs of the OR gate. An alternative, which gives exactly the
same results, is to put a NOT gate on each input and then an AND gate for the resulting
inverted inputs (Figure 3.15(b)). The following is the resulting truth table:

A NOT
Output
Inputs
A AND
A B OR NOT
B
0 0 1
0 1 0 B NOT
1 0 0
1 0
(a) (b) (c) Figure 3.15 NOR gate

The combination of OR and NOT gates is termed a NOR gate. There is an output when
neither input A or input B is 1.

28
Figure 3.16 shows a ladder diagram of a NOR system. When input A and input B are both
not activated, there is a 1 output. When either X400 or X401 are 1 there is a 0 output.

Output
Input A Input B Input A

Input B

Output

Figure 3.16 Ladder diagram of NOR gate

3.3.6 Exclusive OR (XOR)

The OR gate gives an output when either or both of the inputs are 1. Sometimes there is,
however, a need for a gate that gives an output when either of the inputs is 1 but not when
both are 1, i.e. has the truth table:

Output
Inputs
A B
0 0 1
0 1 0
1 0 0
1 0

Such a gate is called an Exclusive OR or XOR gate. One way of obtaining such a gate is by
using NOT, AND and OR gates as shown in Figure 5.16.

A NOT
AND
B
OR

AND
NOT

Figure 3.17 : XOR gate

Figure 3.18 shows a ladder diagram for an XOR gate system. When input A and input B are
not activated then there is 0 output. When just input A is activated, then the upper branch
results in the output being 1. When just input B is activated, then the lower branch results in
the output being 1. When both input A and input B are activated, there is no output. In this

29
example of a logic gate, input A and input B have two sets of contacts in the circuits, one set
being normally open and the other normally closed. With PLC programming, each input may
have as many sets of contacts as necessary.

Output
Input A Input B Input A

Input B
Input A Input B

Output

Figure 3.18 : XOR gate

3.4 MULTIPLE OUTPUTS

With ladder diagrams, there can be more than one output connected to a contact. Figure
3.19 shows a ladder program with two output coils. When the input contacts close both the
coils give outputs.

Input A Output A Input

Output B Output A

Output B

Figure 3.19 : Ladder diagram with two outputs

For the ladder rung shown in Figure 3.20, output A occurs when input A occurs. Output B
only occurs when both input A and input B occur.

Input A Output A
Input A

Input B
Input B Output B

Output A

Output B

Figure 3.20 : Ladder diagram with two inputs and two outputs

Such an arrangement enables a sequence of outputs to be produced, the sequence being in


the sequence with which contacts are closed. Figure 3.21 illustrates this with the same

30
ladder program in Mitsubishi and Siemens notations. Outputs A, B and C are switched on as
the contacts in the sequence given by the contacts A, B and C are being closed. Until input
A is closed, none of the other outputs can be switched on. When input A is closed, output A
is switched on. Then, when input B is closed, output B is switched on. Finally, when input C
is closed, output C is switched on.

Input A Output A Input A Output A


X100 Y420 I0.0 Q2.0

Input B Output B Input B Output B


X101 Y421 I0.1 Q2.1

Input C Output C Input C Output C


X102 Y422 I0.2 Q2.2

(a) (b)
Input A

Input B

Input C

Output A

Output B

Output C

Figure 3.21 : Multi input and output for Mitsubishi and Siemens notation

3.5 ENTERING PROGRAMS

Each horizontal rung on the ladder represents an instruction in the program to be used by
the PLC. The entire ladder gives the complete program. There are several methods that can
be used for keying in the program into a programming terminal. Whatever method is used to
enter the program into a programming terminal or computer, the output to the memory of the
PLC has to be in a form that can be handled by the microprocessor. This is termed machine
language and is just binary code, e.g. 0010100001110001.

3.5.1 Ladder symbols

One method of entering the program into the programming terminal involves using a keypad
having keys with symbols depicting the various elements of the ladder diagram and keying

31
them in so that the ladder diagram appears on the screen of the programming terminal. For
example, to enter a pair of contacts the key marked

might be used, followed by its address being keyed in. To enter an output the key

might be used, followed by its address. To indicate the start of a junction

might be pressed; to indicate the end of a junction path

To indicate horizontal circuit links, the following key might be used:

The terminal then translates the program drawn on the screen into machine language.

Computers can be used to draw up a ladder program. These involve loading the computer
with the relevant software, e.g. RSLogix from Rockwell Automation Inc. for Allen-Bradley
PLCs, MELSOFT − GX Developer for Mitsubishi PLCs, STEP 7 - Micro/WIN V4 for Siemens
PLCs. The software operates on the Windows operating system and involves selecting
items, in the usual Windows manner, from pull-down menus on the screen.

3.6 FUNCTION BLOCK DIAGRAM (FBD)

The term function block diagram (FBD) is used for PLC programs described in terms of
graphical blocks. It is described as being a graphical language for depicting signal and data
flows through blocks, these being reusable software elements. A function block is a program

32
instruction unit which, when executed, yields one or more output values. Thus, a block is
represented in the manner shown in Figure 3.22 with the function name written in the box.

Output
Inputs Function

Figure 3.22 : Function Block

The IEC 113-3 standard for drawing such blocks is shown in Figure 3.23. A function block is
depicted as a rectangular block with inputs entering from the left and outputs emerging from
the right. The function block type name is shown in the block, e.g. AND, with the name of
the function block in the system shown above it, Timer1. Names of function block inputs are
shown within the block at the appropriate input and output points. Cross diagram connectors
are used to indicate where graphical lines would be difficult to draw without cluttering up or
complicating a diagram and show where an output at one point is used as an input at
another.

Semi graphic form Full graphic form

Horizontal and vertical lines

Interconnection of horizontal
and vertical

Crossing horizontal and


vertical signal flows

Blocks with connections

Connectors AV_WEIGHT AV_WEIGHT

AV_WEIGHT AV_WEIGHT

Figure 3.23 Function block diagrams representation

33
Function blocks can have standard functions, such as those of the logic gates or counters or
times, or have functions defined by the user, e.g. a block to obtain an average value of
inputs.

3.6.1 Logic gates

Programs are often based on logic gates. Two forms of standard circuit symbols are used
for making logic gates, one having originated in the United States and the other being an
international standard form (IEEE/ANSI) which uses a rectangle with the logic function
written inside it. The 1 in a box indicates that there is an output when the input is 1. The OR
function is given by 1, this is because there is an output if an input is greater than or equal
to 1. A negated input is represented by a small circle on the input, a negative output by a
small circle on the output (Figure 3.24). Figure 3.25 shows the symbols. In FBD diagrams
the notation used in the IEEE/ANSI form is often encountered.

Figure 3.24 : (a) Negated input (b) Negated output

A A
Output Output A Output
Inputs Inputs
B B Input

A A
Output Output A Output
Inputs  Inputs  
B B  Input

AND gate OR gate Nor gate

A A
Output Output A Output
Inputs Inputs
B B Input

A A
Output Output A Output
Inputs  Inputs  
B B  Input

NAND gate NOR gate XOR gate

Figure 3.25 : Logic gate symbols

34
Input A
Input A Output
Input B  Input B
Input C
Input C

Output

Input A
Input A Output
Input B  Input B

Output

AND Function

Input A

Input B
Input A Output
Input B 
 Output

Input A
Input A Output
Input B  Input B

Output

OR Function

Input A
Input A Output
Input B  Input B

 Output

Input A
Input A Output
Input B Input B


 Output

XOR Function

Figure 3.26 : Functional block

35
To illustrate the form of such a diagram and its relationship to the ladder diagram, Figure
3.27 shows an OR gate. When A or B inputs are 1 then there is an output.

Output
Input A
A Output
Inputs  Q
B 
Input B

Figure 3.27 : Ladder diagram and equivalent functional block diagram

Figure 3.28 shows a ladder diagram and its function block equivalent in Siemens notation.
The = block is used to indicate an output from the system.

Output
Input A Input B I0.0
Output
Inputs Q2.0
I0.0 I0.1 Q2.0 I0.1

Figure 3.28 : Ladder diagram and equivalent functional block diagram

Figure 3.29 shows a ladder diagram involving the output having contacts acting as an input.
The function block diagram equivalent can be shown as a feedback loop.

Output Q
Input A Input B


A
Output Q  Q

B

Figure 3.29 : Ladder diagram and equivalent functional block diagram

Consider the development of a function block diagram and ladder diagram for an application
in which a pump is required to be activated and pump liquid into a tank when the start switch
is closed, the level of liquid in the tank is below the required level and there is liquid in the
reservoir from which it is to be pumped. What is required is an AND logic situation between
the start switch input and a sensor input which is on when the liquid in the tank is below the
required level. We might have a switch which is on until the liquid is at the required level.
These two elements are then in an AND logic situation with a switch indicating that there is

36
liquid in the reservoir. Suppose this switch gives an input when there is liquid. The function
block diagram, and the equivalent ladder diagram, is then of the form shown in Figure 3.30.

Liquid
Start Pump
level Reservoir Start Pump
Liquid level 
Reservoir

Figure 3.30 : Pump Application

3.6.2 Boolean algebra

Ladder programs can be derived from Boolean expressions since we are concerned with a
mathematical system of logic. In Boolean algebra there are just two digits, 0 and 1. When
we have an AND operation for inputs A and B then we can write:

A.B=Q

where Q is the output. Thus Q is equal to 1 only when A = 1 and B = 1. The OR operation
for inputs A and B is written as:

A+B=Q

Thus Q is equal to 1 only when A = 1 or B = 1. The NOT operation for an input A is written
as:

𝐴=Q

Thus when A is not 1 there is an output.

As an illustration of how we can relate Boolean expressions with ladder diagrams, consider
the expression:

A+B·C=Q

This tells us that we have A or the term B and C giving the output Q. Figure 3.31 shows the
ladder and functional block diagrams. Written in terms of Mitsubishi notation, the above
expression might be:

X400 + X401 · X402 = Y430

In Siemens notation it might be:

37
Input A Output Q
Input A Output Q


Input B
Input B 
Input C Input C

Figure 3.31 : Ladder diagram

I0.0 + I0.1 · I0.2 = Q2.0

As a further illustration, consider the Boolean expression:

A+B =Q

Figure 3.32 shows the ladder and functional block diagrams.

Input A Output Q A
Output Q
Inputs 
B
Input B

Figure 3.32 : Ladder diagram

Written in terms of Mitsubishi notation, the expression might be:

X400 + 𝐴401= Y430

and in Siemens notation:

I0.0 + 𝐴 0.1= Q2.0

A 1

B
Output Q



1

Figure 3.33 : XOR gate

Consider the exclusive-OR gate and its assembly from NOT, AND and OR gates, as shown
in Figure 3.33.

38
The input to the bottom AND gate is:

A and B

and so its output is:

A·B

The input to the top AND gate is:

A and B

so its output is:

A ·B

Thus the Boolean expression for the output from the OR gate is:

A·B +A ·B=Q

Consider a logic diagram with many inputs, as shown in Figure 3.34, and its representation
by a Boolean expression and a ladder rung.

A 
B

C 
Output Q
D 

E
F 1

Figure 3.34 : Ladder diagram

For inputs A and B we obtain an output from the upper AND gate of A ·B. From the OR gate
we obtain an output of A ·B + C. From the lower AND gate we obtain an output Q of:

(A ·B + C) D E F= Q

The ladder diagram to represent this is shown in Figure 3.35

A B D E F Q

Figure 3.35 : Ladder diagram for figure 3.35

39
3.7 JUMP AND CALL

Each time a faulty item is detected, a pulse signal occurs at input X400. This enters a 1 into
the shift register at internal relay M140. When items move, whether faulty or not, there is a
pulse input at X401. This shifts the 1 along the register. When the 1 reaches internal relay
M144, it activates

the output Y430 and the rejection mechanism removes the faulty item from the conveyor.
When an item is removed it is sensed and an input to X403 occurs. This is used to reset the
mechanism so that no further items are rejected until the rejection signal reaches M144. It
does this by giving an output to internal relay M100 which latches the X403 input and
switches the rejection output Y430 off. This represents just the basic elements of a system.
A practical system would include further internal

relays in order to make certain that the rejection mechanism is off when good items move
along the conveyor belt and also to disable the input from X400 when the shifting is
occurring.

A function often provided with PLCs is the conditional jump. We can describe this as: IF
(some condition occurs) THEN perform some instructions ELSE perform some other
instructions.

Such a facility enables programs to be designed such that if certain conditions are met then
certain events occur, if they are not met then other events occur. Thus, for example, we
might need to design a system so that if the temperature is above 60oC a fan is switched
on, and if below that temperature no action occurs.

Jump
Input A
Rung 1

Rung 2

Rung 3
Jump end
Rung 4

Figure 3.36 : Jump instruction

40
Thus, if the appropriate conditions are met, this function enables part of a ladder program to
be jumped over. Figure 3.36 illustrates this in a general manner. When there is an input to In
1, its contacts close and there is an output to the jump relay. This then results in the
program jumping to the rung in which the jump end occurs, so missing out intermediate
program rungs. Thus, in this case, when there is an input to Input 1, the program jumps to
rung 4 and then proceeds with rungs 5, 6, etc. When there is no input to Input 1, the jump
relay is not energised and the program then proceeds to rungs 2, 3, etc.

Input 1
X400 Input Jump
I: 012/10 010
CJP 700
JMP
Input 2 Output 1
X401 X430
jump between X401 O:012/10
Input 3 Output 2 these rungs
X402 X431 of the program Input 3 Jump if input
if input 1 occurs X402 O:012/11 I: 012/10 occur

Label 010 O:012/12


EJP 700
LBL

Figure 3.37 : Jump Mitsubishi and Allen Bradley programme

Figure 3.37 shows the above ladder program in the form used by Mitsubishi. The jump
instruction is denoted by CJP (conditional jump) and the place to which the jump occurs is
denoted by EJP (end of jump). The condition that the jump will occur is then that there is an
input to X400.

When that happens the rungs involving inputs X401 and X403 are ignored and the program
jumps to continue with the rungs following the end jump instruction with the same number as
the start jump instruction, i.e. in this case EJP 700.

With the Allen-Bradley PLC-5 format the jump takes place from the jump instruction (JMP) to
the label instruction (LBL). The JMP instruction is given a three-digit number from 000 to
255 and the LBL instruction the same number. Figure 8.2(b) shows a ladder program in this
format.

With Siemens’ programs, conditional jumps are represented as shown in Figure 3.38, there
being a jump instruction JMP which is executed if the input is a 1 and another jump
instruction JMPN which is executed if the input is 0. The end of both instructions is the label
DEST.

41
JMP Jump if Jump if
JMPN
input 1 input 0

End of
DEST Jump

Figure 3.38 : Simens jump instruction

3.8 JUMPS WITHIN JUMPS

Jumps within jumps are possible. For example, we might have the situation shown in Figure
3.39. If the condition for the jump instruction 1 is realised then the program jumps to rung 8.
If the condition is not met then the program continues to rung 3. If the condition for the jump
instruction 2 is realised then the program jumps to rung 6. If the condition is not met then the
program continues through the rungs.

Thus if we have an input to In 1, the rung sequence is rung 1, 8, etc. If we have no input to
In 1 but an input to In 3, then the rung sequence is 1, 2, 6, 7, 8, etc. If we have no input to In
1 and no input to In 3, the rung sequence is 1, 2, 3, 4, 5, 6, 7, 8, etc. The jump instruction
enables different groups of program rungs to be selected, depending on the conditions
occurring.

In1 Jump 1
Rung 1

Rung 2

In3 Jump 3
Rung 3

Rung 4

Rung 5
Jump 2 end
Rung 6

Rung 7

Jump 1 end
Rung 8

Figure 3.39: Jump within Jump

42
3.9 SUBROUTINES

Subroutines are small programs to perform specific tasks which can be called for use in
larger programs. Thus with a Mitsubishi program we might have the situation shown in
Figure 3.40. When input 1 occurs, the subroutine P is called. This is then executed, the
instruction SRET indicating its end and the point at which the program returns to the main
program. To clearly indicate where the main program ends the FEND instruction is used.

With Allen-Bradley, subroutines are called by using a jump-tosubroutine JSR instruction, the
start of the subroutine being indicated by SBR and its end and point of return to the main
program by RET (Figure 3.40).

With Siemens a similar format can be adopted, using CALL to call up a subroutine block and
RET to indicate the return instruction to the main program. However, a function box
approach (Figure 3.41) can be used and is particularly useful where there is a library of
subroutine functions to be called. If the EN (enable) block input is connected directly to the
left power rail then the call is without conditions and always executed. If there is a logic
operation preceding EN then the block call is only executed if the logic condition is fulfilled,
in Figure 3.42 this is closure of contacts of Input 1. Several blocks can be connected in
series by

Input 1
CALL P Jump to subroutine
conditional on input 1

Main program and


return point after
subroutine

FEND End of main program

subroutine

SRET End of subroutine and


return to main program
END End of entire program

Figure 3.40: Jump to Subroutine call with Mitsubishi PLC

43
Input 1
JSR Jump to subroutine
conditional on input 1

Main program

SBR subroutine

RET Return to main


program

Figure 3.41 : Jump to Subroutine call with Allen Bradley PLC3

Main program prior to call


Input 1 FCx
EN ENO Subroutine block FCx
enabled when input to EN

Processing of the block parameters


IN1 OUT
Output when IN1 and IN2

EN2 Return to main program

Figure 3.42 : call to subroutine with siemens PLC

44
CHAPTER 4: EVENT BASED LOGIC PROGRAMMING

4.1 INTRODUCTION

More complex systems cannot be controlled with combinatorial logic alone. The main reason for
this is that we cannot, or choose not to add sensors to detect all conditions. In these cases we can
use events to estimate the condition of the system. Typical events used by a PLC include; first
scan of the PLC - indicating the PLC has just been turned on time since an input turned on/off - a
delay count of events - to wait until set number of events have occurred latch on or unlatch - to lock
something on or turn it off.

Push Button

+V Device

On/Off

Push Button
Device
Logical Response
Device Event Response
Time

Figure 4.1 - An Event Driven Device

The common theme for all of these events is that they are based upon one of two questions "How
many?" or "How long?" An example of an event based device is shown in Figure 4.1. The input to
the device is a push button. When the push button is pushed the input to the device turns on. If the
push button is then released and the device turns off, it is a logical device. If when the push button
is release the device stays on, is will be one type of event based device. To reiterate, the device is
event based if it can respond to one or more things that have before. If the device responds only
one way to the immediate set of inputs, it is logical.

4.2 LATCHING

There are often situations where it is necessary to hold an output energized, even when the input
ceases. A simple example of such a situation is starter switch of motor which is started by pressing
a GREEN push button switch. Though the switch contacts do not remain closed, the motor is
required to continue running until a RED stop push button switch is pressed. The term latch circuit

45
is used for the circuit used to carry out such an operation. It is a self-maintaining circuit in that, after
being energized, it maintains that state until another input is received.

An example of a latch circuit is shown in Figure 4.2. When the input A contacts close, there is an
output. However, when there is an output, another set of contacts associated with the output
closes. These contacts form an OR logic gate system with the input contacts. Thus, even if the
input A opens, the circuit will still maintain the output energized. The only way to release the output
is by operating the normally closed contact B.

Output
Input A Input B

Output

Figure 4.2 Latched circuit

As an illustration of the application of a latching circuit, consider a motor controlled by stop and start
push button switches and for which one signal light must be illuminated when the power is applied
to the motor and another when it is not applied. Figure 4.3 shows the ladder diagram with Mitsubishi
notation for the addresses.

Start Stop Output


X400 X401 Y430

Output
Y430

Lamp for power


Output
Y430 not applied Y431

Output Lamp for power


Y430 applied Y432

Figure 4.3 Motor on-off, with signal lamps, ladder diagram. Note that the stop contacts X401 are
shown as being programmed as open. If the stop switch used is normally closed then X401
receives a start-up signal to close. This gives a safer operation than programming X401 as
normally closed.

X401 is closed when the program is started. When X400 is momentarily closed, Y430 is energised
and its contacts close. This results in latching and also the switching off of Y431 and the switching

46
on of Y432. To switch the motor off, X401 is pressed and opens. Y430 contacts open in the top
rung and third rung, but close in the second rung. Thus Y431 comes on and Y432 off.

Latching is widely used with start-ups so that the initial switch on of an application becomes
latched on.

4.2.1 Timing Diagram for Latch

A latch is like a sticky switch - when pushed it will turn on, but stick in place, it must be pulled to
release it and turn it off. A latch in ladder logic uses one instruction to latch, and a second
instruction to unlatch, as shown in Figure 4.4. The output with an ’L’ inside will turn the output ’D’
on when the input ’A’ becomes true. ’D’ will stay on even if ’A’ turns off. Output ’D’ will turn off if
input ’B’ becomes true and the output with a ’U’ inside becomes true (Note: this will seem a little
backwards at first). If an output has been latched on, it will keep its value, even if the power has
been turned off. e.g. A Start Push Button

A
D
L

A C

B D
U

Figure 4.4 : A Ladder Logic Latch

The operation of the ladder logic in Figure 4.5 is illustrated with a timing diagram in Figure

7.3. A timing diagram shows values of inputs and outputs over time. For example the value of input
A starts low (false) and becomes high (true) for a short while, and then goes low again. Here when
input ’A’ turns on both the outputs turn on. There is a slight delay between the change in inputs and
the resulting changes in outputs, due to the program scan time. Here the dashed lines represent
the output scan, sanity check and input scan (assuming they are very short.) The space between
the dashed lines is the ladder logic scan. Consider that when ’A’ turns on initially it is not detected
until the first dashed line. There is then a delay to the next dashed line while the ladder is scanned,
and then the output at the next dashed line. When ’A’ eventually turns off, the normal output ’C’
turns off, but the latched output ’D’ stays on. Input ’B’ will unlatch the output ’D’. Input ’B’ turns on
twice, but the first time it is on is not long enough to be detected by an input scan, so it is ignored.
The second time it is on it unlatches output ’D’ and output ’D’ turns off.

47
Timing Diagram event too short

A
B
C
D

The space between the lines is the scan time for the ladder logic.
the space may vary if different parts of the ladder diagram are
executed each time through the ladder. the space is a function of the
speed of the PLC. and number of Ladder logic elements in the
program.

Figure 4.5 : A timing Diagram for the Ladder Logic in Figure 4.4

The timing diagram shown in Figure 4.5 has more details than are normal in a timing diagram as
shown in Figure 4.6. The brief pulse would not normally be wanted, and would be designed out of
a system either by extending the length of the pulse, or decreasing the scan time. An ideal system
would run so fast that aliasing would not be possible.

A
B
C
D

Figure 4.6 : A typical Timing Diagram

A more elaborate example of latches is shown in Figure 4.7. In this example the addresses are for
an Allen-Bradley SLC-150.

48
002 011

002 012
L

003 012
U

002 013

003 013

002
003

011
012
013

Figure 4.7 - A Latch Example for an Allen Bradley SLC-150

A normal output should only appear once in ladder logic, but latch and unlatch instructions

may appear multiple times. In Figure 4.7 a normal output ’013’ is repeated twice. When the
program runs it will examine the fourth line and change the value of ’013’ in memory (remember
the output scan does not occur until the ladder scan is done.) The last line is then interpreted and it
overwrites the value of ’013’. Basically, only the last line will change ’013’.

Latches are not used universally by all PLC vendors, others such as Siemens use flip-flops. These
have a similar behavior to latches, but a different notation as illustrated in Figure 4.8. Here the flip-
flop is an output block that is connected to two different logic rungs. The first rung shown has an
input ’A’ connected to the ’S’ setting terminal. When ’A’ goes true the output value ’Q’ will go true.
The second rung has an input ’B’ connected to the ’R’ resetting terminal. When ’B’ goes true the
output value ’Q’ will be turned off. The output Q will always be the inverse of Q. Notice that the ’S’
and ’R’ values are equivalent to the ’L’ and ’U’ values from earlier examples.

49
A S Q

B R Q

A
B
Q
Q

Figure 4.8- Flip-Flops for Latching Values

4.3 TIMERS

There are four fundamental types of timers shown in Figure 4.9. An on-delay timer will wait for a
set time after a line of ladder logic has been true before turning on, but it will turn off immediately.

An off-delay timer will turn on immediately when a line of ladder logic is true, but it will delay before
turning off. Consider the example of an old car. If you turn the key in the ignition and the car does
not start immediately, that is an on-delay. If you turn the key to stop the engine but the engine
doesn’t stop for a few seconds, that is an off delay. An on-delay timer can be used to allow an oven
to reach temperature before starting production. An off delay timer can keep cooling fans on for a
set time after the oven has been turned off.

On delay Off delay


Retentive RTO RTF
Non retentive TON TOF

TON- Timer ON
TOF – Timer OFF
RTO- Retentive Timer On
RTF – Retentive Timer OFF
Figure 4.9 - The Four Basic Timer Types

A retentive timer will sum all of the on or off time for a timer, even if the timer never finished. A
nonretentive timer will start timing the delay from zero each time. Typical applications for retentive
timers include tracking the time before maintenance is needed. A non retentive timer can be used
for a start button to give a short delay before a conveyor begins moving.

An example of an Allen-Bradley TON timer is shown in figure 4.10. The rung has a single input ’A’
and a function block for the ’TON’. (Note: This timer block will look different for different PLCs, but

50
it will contain the same information.) The information inside the timer block describes the timing
parameters. The first item is the timer number ’T4:0’. This is a location in the PLC memory that will
store the timer information. The ’T4:’ indicates that it is timer memory, and the ’0’ indicates that it is
in the first location. The time base is ’1.0’ indicating that the timer will work in 1.0 second intervals.
Other time bases are available in fractions and multiples of seconds. The preset is the delay for the
timer, in this case it is 4. To find the delay time multiply the time base by the preset value 4*1.0s =
4.0s. The accumulator value gives the current value of the timer as ’0’. While the timer is running
the Accumulated value will increase until it reaches the retentive nonretentive on-delay off-delay
preset value. Whenever the input ’A’ is true the ’EN’ output will be true. The ’DN’ output will be
false until the accumulator has reached the preset value. The ’EN’ and ’DN’ outputs cannot be
changed when programming, but these are important when debugging a ladder logic program. The
second line of ladder logic uses the timer ’DN’ output to control another output ’B’

DN
A
DN
TIMER T4:0
Time Base 1.0
Preset 4
Accumulator 0
EN

T4: 0/ DN
B

A
T4:0 / EN
T4:0 / DN
T4:0 / TT

T4:0 Acuum
0 3 6 9 13 14 17 19

Figure 4.10 : An Allen Bradley TON Timer

The timing diagram in Figure 4.11 illustrates the operation of the TON timer with a 4 second on-
delay. ’A’ is the input to the timer, and whenever the timer input is true the ’EN’ enabled bit for the
timer will also be true. If the accumulator value is equal to the preset value the ’DN’ bit will be set.
Otherwise, the ’TT’ bit will be set and the accumulator value will begin increasing.

The first time ’A’ is true, it is only true for 3 seconds before turning off, after this the value resets to
zero. (Note: in a retentive time the value would remain at 3 seconds.) true, it is on more than 4
seconds. After 4 seconds the ’TT’ bit turns off, and the ’DN’ bit turns on.

But, when ’A’ is released the accumulator resets to zero, and the ’DN’ bit is turned off. A value can
be entered for the accumulator while programming. When the program is downloaded this value

51
will be in the timer for the first scan. If the TON timer is not enabled the valuewill be set back to
zero. Normally zero will be entered for the preset value.

The timer in Figure 4.10 is identical to that in Figure 4.11, except that it is retentive. The most
significant difference is that when the input ’A’ is turned off the accumulator value does not reset to
zero. As a result the timer turns on much sooner, and the timer does not turn off after it turns on. A
reset instruction will be shown later that will allow the accumulator to be reset to zero.

RTO
A TIMER T4:0 DN
Time Base 1.0
Preset 4
Accumulator 0
EN

A
T4:0 / EN
T4:0 / DN
T4:0 / TT

T4:0 Acuum
0 3 6 9 10 14 17 19

Figure 4.11 : An Allen Bradley retentive On Delay Timer

An off delay timer is shown in Figure 7.12. This timer has a time base of 0.01s, with a preset value
of 350, giving a total delay of 3.5s. As before the ’EN’ enable for the timer matches the input. When
the input ’A’ is true the ’DN’ bit is on. Is is also on when the input ’A’ has turned off and the
accumulator is counting. The ’DN’ bit only turns off when the input ’A’ has been off long enough so
that the accumulator value reaches the preset. This type of timer is not retentive, so when the input
’A’ becomes true, the accumulator resets.

52
TOF
A TIMER T4:0 DN
Time Base 0.01
Preset 350
Accumulator 0
EN

A
T4:0 / EN
T4:0 / DN
T4:0 / TT

T4:0 Acuum
0 3 6 9 10 14 17 19

Figure 4.12 : An Allen Bradley Off Delay Timer

Retentive off-delay (RTF) timers have few applications and are rarely used, therefore many PLC
vendors do not include them. An example program for an Allen Bradley SLC-150 PLC is shown in
Figure 4.13. The Timers for this PLC are simpler than the ones presented before. Here timers are
stored in numerical addresses starting at 901. There is no direct access to ’EN’ and ’TT’ bits, and
the address of the timer is used as the ’DN’ bit. Here all four different types of counters have the
input ’001’. The preset values for the timers is shown below the timer as tenths of a second,
therefore all four timers have a preset of 4s. Output ’011’ will turn on when the TON counter using
’901’ is done. All four of the timers can be reset with input ’002’.

53
001 901 TON
PR0040

001 902 RTO


PR0040

001 903 TOFF


PR0040

001 904 RTF


PR0040

901 011 TON


PR0040

002 901
RST

002 9021
RST

002 903
RST

002 904
RST

Figure 4.13 : An Allen Bradley SLC 150 Timer Example

A timing diagram for this example is shown in Figure 4.14. As input ’001’ is turned on the

TON and RTO timers begin to count and reach 4s and turn on. When ’002’ becomes true is resets
both timers and they start to count for another second before ’001’ is turned off. After the input is
turned off the TOF and RTF both start to count, but neither reaches the 4s preset. The input ’001’
is turned on again and the TON and RTO both start counting. The RTO turns on one second
sooner because it had 1s stored from the 7-8s time period. After ’001’ turns off again both the off
delay timers count down, and reach the 4 second delay, and turn on. These patterns continue
across the diagram.

54
001

002

901

902

903

904

001

0 5 10 15 20 25 30 35 40 time(sec)

Figure 4.14 : A Timing diagram for Figure 4.13

Consider the short ladder logic program in Figure 4.15 for control of a heating oven. The system is
started with a ’Start’ button that seals in the ’Auto’ mode. This can be stopped if the ’Stop’ button is
pushed. (Remember: Stop buttons are normally closed.) When the ’Auto’ goes on initially the TON
timer is used to sound the horn for the first 10 seconds to warn that the oven will start, and after
that the horn stops and the heating coils start. When the oven is turned off the fan continues to
blow for 300s or 5 minutes after.

Start Stop Auto

Auto

Auto
TON
Timer T4:0
Delay 10s

TOF
Timer T4:1
Delay 300s
T4:0/TT
Horn

T4:0/TT
Heating Coils

T4:0/TT
Fan

Figure 4.15 : A Timer Example

55
A program is shown in Figure 4.16 that will flash a light once every second. When the PLC starts,
the second timer will be off and the ’T4:1/DN’ bit will be off, therefore the normally closed input to
the first timer will be on. ’T4:0’ will start timing until it reaches 0.5s, when it is done the second
timer will start timing, until it reaches 0.5s. At that point ’T4:1/DN’ will become true, and the input to
the first time will become false. ’T4:0’ is then set back to zero, and then ’T4:1’ is set back to zero.
And, the process starts again from the beginning. In this example the first timer is used to drive the
second timer. This type of arrangement is normally called cascading, and can use more that two
timers.

T4:1/DN TON
Timer T4:0
Delay 10s
T4:0/DN
TOF
Timer T4:1
Delay 300s
T4:1/TT
Light

Figure 4.16 : Another Timer Example

4.4 COUNTERS

There are two basic counter types: count-up and count-down. When the input to a count-up
counter goes true the accumulator value will increase by 1 (no matter how long the input is true.)

If the accumulator value reaches the preset value the counter ’DN’ bit will be set. A count-down
counter will decrease the accumulator value until the preset value is reached.

An Allen Bradley count-up (CTU) instruction is shown in Figure 4.17. The instruction requires
memory in the PLC to store values and status, in this case is ’C5:0’. The ’C5:’ indicates that it is
counter memory, and the ’0’ indicates that it is the first location. The preset value is 4 and the value
in the accumulator is 2. If the input ’A’ were to go from false to true the value in the accumulator
would increase to 3. If ’A’ were to go off, then on again the accumulator value would increase to 4,
and the ’DN’ bit would go on. The count can continue above the preset value. If input ’B’ goes true
the value in the counter accumulator will become zero.

56
CTU
A Counter C5:0 EN
Preset 4
Accu 2 DN
C5:0/DN
X

B
RES C5:0

Figure 4.17 - An Allen Bradley Counter

Count-down counters are very similar to count-up counters. And, they can actually both be

used on the same counter memory location. Consider the example in Figure 4.18 for an Allen
Bradley SLC-150. In a SLC-150 the timer and counter memory is shared, so the counters can also
start at 901 (but not overlap with locations used for timers.) In the example input ’001’ drives the
count-up instruction for counter ’901’. Input ’002’ drives the count-down instruction for the same
counter location. The preset value for a counter is stored in memory location ’901’ so both the
count-up and count-down instruction must have the same preset. Input ’003’ will reset the counter.

001 901 CTU


PR0003

002 901 CTD


PR0003

003 901
RST

901 111

001
002

003
901
111

Figure 4.18 : A Counter Example for an Allen Bradley SLC 150

57
Figure 4.18 - A Counter Example for an Allen Bradley SLC-150 .The timing diagram in Figure 4.18
illustrates the operation of the counter. If we assume that the value in the accumulator starts at ’0’,
then the ’001’ inputs cause it to count up to 3 where it turns the counter ’901’ on. It is then reset by
input ’003’ and the accumulator value goes to zero. Input ’001’ then pulses again and causes the
accumulator value to increase again, until it reaches a maximum of 5. Input ’002’ then causes the
accumulator value to decrease down below 3, and the counter turns off again. Input ’001’ then
causes it to increase, but input ’003’ resets the accumulator back to zero again, and the pulses
continue until 3 is reached near the end.

The program in Figure 4.19 is use to remove 5 out of every 10 parts from a conveyor with a
pneumatic cylinder. When the part is detected both counters will increase their values by 1. When
the sixth part arrives the first counter will then be done, thereby allowing the pneumatic cylinder to
actuate for any part after the fifth. The second counter will continue until the eleventh part is
detected and then both of the counters will be reset.

Part Present
CTU
Counter C5:0
Preset 6

CTU
Counter C5:1
Preset 11
C5:1/DN
RES C5:0

RES C5:0

C5:0/DN Part preset Pneumatic


Cylinder

Figure 4.19 - A Counter Example

4.5 SEQUENCER

The drum sequencer is a form of counter that is used for sequential control. It replaces the
mechanical drum sequencer that was used to control machines that have a stepped sequence of
repeatable operations. One form of the mechanical drum sequencer consisted of a drum from
which a number of pegs protruded (Figure 4.20). When the cylinder rotated, contacts aligned with
the pegs were closed when the peg impacted on them and opened when the peg had passed.
Thus for the arrangement shown in Figure 4.20, as the drum rotates, in the first step the peg for
output 1 is activated, in step 2 the peg for the third output, in step 3 the peg for the second output,
58
and so on. Different outputs could be controlled by pegs located at different distances along the
drum. Another form consisted of a series of cams on the same shaft, the profile of the cam being
used to switch contacts on and off.

Pegs to activate contact

1
2
Steps 3
4 Rotation
5
6
7
Different segment for contacts for each
of output

Figure 4.20 : Drum sequencer

The PLC sequencer consists of a master counter that has a range of preset counts corresponding
to the different steps and so, as it progresses through the count, when each preset count is
reached it can be used to control outputs. Each step in the count sequence relates to a certain
output or group of outputs. The outputs are internal relays, these in turn being used to control the
external output devices.

Suppose we want output 1 to be switched on 5 s after the start and remain on until the time
reaches 10 s, output 2 to be switched on at 10 s and remain on until 20 s, output 3 to be switched
on at 15 s and remain on until 25 s, etc. We can represent the above requirements by a time
sequence diagram, Figure 10.13, showing the required time sequence.

Time in sec
0 5 10 15 20 25 30
Outputs
1
2
3
4

Figure 4.21 : Timing diagram

59
We can transform the timing diagram into a drum sequence requirement. Taking each drum
sequence step to take 5 s gives the 180 Programmable Logic Controllers requirement diagram
shown in Table 4.1. Thus at step 1 we require output 1 to be switched on and to remain on until
step 2. At step 2 we require output 2 to be switched on and remain on until step 4. At step 3 we
require output 3 to be switched on and remain on until step 5. At step 5 we require output 4 to be
switched on and remain on until step 6.

Table 4.1 : Sequence requirements

Step Time (s) Output 1 Output 2 Output 3 Output 4


0 0 0 0 0 0
1 5 1 0 0 0
2 10 0 1 0 0
3 15 0 1 1 0
4 20 0 0 1 0
5 25 0 0 1 1
6 30 0 0 0 0

With a PLC, such as a Toshiba, the sequencer is set up by switching on the Step Sequence
Initialize (STIZ) function block R500 (Figure 10.14). This sets up the program for step 1 and R501.
This relay then switches on output Y020. The next step is the switching on of R502. This switches
on the output Y021 and also a delay-on timer so that R503 is not switched on until the timer has
timed out. Then R503 switches on Y022 and also the next step in the sequence.

60
X000 to switch
on sequencer
STIZ R500

R500 R501
L

R501 R502
U

R501 Y020

R502 Y021

R502 R503
TON T000 U

R503 Y022

R503 R504

and so on

Figure 4.22 : Sequencer with a Toshiba PLC

With the Allen-Bradley form of PLC the sequencer is programmed by using a sequence of binary
words in the form of the outputs required, e.g. those listed in Table 4.1. Thus we would have the
following binary word sequence put into the program using the programming device.

Input 4
Input 3
-------

Input 2
---

Input 1
-

0 0 0 0
0 0 0 1
0 0 1 0
0 1 1 0
0 1 0 0
0 1 0 0
0 0 0 0

61
4.6 SHIFT REGISTERS

The term register is used for an electronic device in which data can be stored. An internal relay,
see Chapter 7, is such a device. The shift register is a number of internal relays grouped together
which allow stored bits to be shifted from one relay to another. This chapter is about shift registers
and how they can be used where a sequence of operations is required or to keep track of particular
items in a production system

A register is a number of internal relays grouped together, normally 8, 16 or 32. Each internal relay
is either effectively open or closed, these states being designated as 0 and 1. The term bit is used
for each such binary digit. Therefore, if we have eight internal relays in the register we can store
eight 0/1 states. Thus we might have:

Internal relays

12345678

and each relay might store an on-off signal such that the state of the register at some instant is:

10110010

i.e. relay 1 is on, relay 2 is off, relay 3 is on, relay 4 is on, relay 5 is off, etc. Such an arrangement
is termed an 8-bit register. Registers can be used for storing data that originate from input sources
other than just simple, single on-off devices such as switches.

With the shift register it is possible to shift stored bits. Shift registers require three inputs, one to
load data into the first location of the register, one as the command to shift data along by one
location and one to reset or clear the register of data. To illustrate this, consider the following
situation where we start with an 8-bit register in the following state:

10110010

Suppose we now receive the input signal 0. This is an input signal to the first internal relay.

Input 0

→10110010

If we also receive the shift signal, then the input signal enters the first location in the register and all
the bits shift along one location. The last bit overflows and is lost.

01011001→

Overflow 0 . Thus a set of internal relays that were initially on, off, on, on, off, off, on, off are now
off, on, off, on, on, off, off, on.

The grouping together of internal relays to form a shift register is done automatically by a PLC
when the shift register function is selected. With the Mitsubishi PLC, this is done by using the
programming code SFT (shift) against the internal relay number that is to be the first in the register
62
array. This then causes a block of relays, starting from that initial number, to be reserved for the
shift register.

4.6.1 Ladder Programs for Shift Register

Consider a 4-bit shift register and how it can be represented in a ladder program (Figure 4.23. The
input In 3 is used to reset the shift register, i.e. put all the values at 0. The input In 1 is used to
input to the first internal relay in the register. The input In 2 is used to shift the states of the internal
relays along by one. Each of the internal relays in the register, i.e. IR 1, IR 2, IR 3 and IR 4, is
connected to an output, these being Out 1, Out 2, Out 3 and Out 4.

In 1 OUT In 1

Shift Register Time


In 2 SFT Internal registers
IR1,IR2,IR3,IR4 In 2
In 3 RST Time

In 1 OUT 1 OUT 1
Output controlled
Time
by first internal relay
in register
In 2 OUT 2 Output controlled OUT 2
by second internal relay
in register Time
In 3 OUT 3
Output controlled
by third internal relay OUT 3
in register
In 4 OUT 4 Time
Output controlled
by fourth internal relay
in register OUT 4

END Time

Figure 4.23 : The shift register

Suppose we start by supplying a momentary input to In 3. All the internal relays are then set to 0
and so the states of the four internal relays IR 1, IR 2, IR 3 and IR 4 are 0, 0, 0, 0. When In 1 is
momentarily closed there is a 1 input into the first relay. Thus the states of the internal relays IR 1,
IR 2, IR 3 and IR 4 are now 1, 0, 0, 0. The IR 1 contacts close and we thus end up with an output
from Out 1. If we now supply a momentary input to In 2, the 1 is shifted from the first relay to the
second. The states of the internal relays are now 0, 1, 0, 0. We now have no input from Out 1 but
an output from Out 2. If we supply another momentary input to In 2, we shift the states of the relays

63
along by one location to give 0, 0, 1, 0. Outputs 1 and 2 are now off but Out 3 is on. If we supply
another momentary input to In 2 we again shift the states of the relays along by one and have 0, 0,
0, 1. Thus now, outputs 1, 2 and 3 are off and output 4 has been switched on. When another
momentary input is applied to In 2, we shift the states of the relays along by one and have 0, 0, 0,
0 with the 1 overflowing and being lost. All the outputs are then off. Thus the effect of the sequence
of inputs to In 2 has been to give a sequence of outputs Out 1, followed by Out 2, followed by Out
3, followed by Out 4. Figure 4.23 shows the sequence of signals.

Figure 4.24 shows the Mitsubishi version of the above ladder program and the associated
instruction list. Instead of the three separate outputs for reset, output and shift, the Mitsubishi shift
register might appear in a program as a single function box, as shown in the Figure. With the
Mitsubishi shift register, the M140 is the address of the first relay in the register.

M140
X400 OUT
RST
OUT M140
X401 SFT SFT
Representation of the
X402 RST three shift register elements
in a single box.

M140 Y430 LD Y430


OUT M140
LD X401
SFT M140
M141 Y431 LD X402
RST M140
LD M140
M142 Y432 OUT Y430
LD M141
OUT Y431
M143 Y433 LD M142
OUT Y432
LD M143
OUT Y433
END
END

Figure 4.24 : Mitsubishi program

Figure 4.25 shows a shift register ladder program for a Toshiba PLC. With the Toshiba R016 is the
address of the first relay in the register. The (08) indicates that there are eight such relays. D is
used for the data input, S for shift input, E for enable or reset input and Q for output.

64
X007
D Q

X000
S 08

X001
E R016
R016 Y020

R017 Y021

R018 Y022

R019 Y023

R01A Y024

R01B Y025
SHL
BIT IN ANY
R01C Y026 INT N

Shift to left
R01D Y027
SHR
BIT IN ANY

INT N
END
Shift to right

Figure 4.25 : Shift register

Figure 4.26 shows the IEC 1131-3 standard symbol for a shift register. The value to be shifted is at
input IN and the number of places it is to be shifted is at input N. Figure 4.26 shows the Siemens
symbol for a shift register. If the enable input EN 1 the shift function is executed and ENO is then 1.
If EN is 0 the shift function is not executed and ENO is 0. The shift function SHL_W shifts the
contents of the word variable at input IN bit by bit to the left the number of positions specified by
the input at N. The shifted word output is at OUT.

65
SHL_W SHR_W
EN ENO EN ENO
IN OUT IN OUT
N N

Shift left a word Shift right a word

Figure 4.26: Siemens shift register symbol

4.7 A SEQUENCING APPLICATION

Consider the requirement for a program for two double solenoid cylinders, the arrangement being
as shown in Figure 4.27, to give the sequence A+, B+, A–, B–. Figure 11.6(b) shows a program to
achieve this sequence by the use of a shift register.

This gives an input


Start IR Register of 1 to the register
a- a+ OUT to give the state of
a+ Stop Register the registers as 1000
SFT Shift for
A b+ IR 1, IR 2
IR IR 3, IR 4
Activation of any
a- limit switch
produces a pulse
b- which shift the
A+ A- OUT pulse along
by 1 bit. Thus
b- b+ Register
Restart a+ gives 0100
RST b+ gives 0010
a- gives 0001
B and b- gives 0000
IR 1 A+

IR 2 B+

B+ B-
IR 3 A-

IR 4 B-

END

Figure 4.27 : Sequencing application

66
4.8 KEEPING TRACK OF ITEMS

The above indicates how a shift register can be used for sequencing. Another application is to
keep track of items. For example, a sensor might be used to detect faulty items moving along a
conveyor and keep track of it so that when it reaches the appropriate point a reject mechanism is
activated to remove it from the conveyor. Figure 4.28 illustrates this arrangement and the type of
ladder program that might be used.

Faulty items
Items for
detected
packaging

Faulty items
deflected from
conveyor
X400 Register
SFT

M140

X401 Register
RST

X402 Register
RST

X403 M144 Register


SFT
Resetting after
rejection
M100

M144 M100 Register Output to


OUT activate
rejection
mechanism
END

Figure 4.28 : Sequencing for tracking items

Each time a faulty item is detected, a pulse signal occurs at input X400. This enters a 1 into the
shift register at internal relay M140. When items move, whether faulty or not, there is a pulse input
at X401. This shifts the 1 along the register. When the 1 reaches internal relay M144, it activates
the output Y430 and the rejection mechanism removes the faulty item from the conveyor. When an

67
item is removed it is sensed and an input to X403 occurs. This is used to reset the mechanism so
that no further items are rejected until the rejection signal reaches M144. It does this by giving an
output to internal relay M100 which latches the X403 input and switches the rejection output Y430
off. This represents just the basic elements of a system. A practical system would include further
internal relays in order to make certain that the rejection mechanism is off when good items move
along the conveyor belt and also to disable the input from X400 when the shifting is occurring.

68
CHAPTER 5: DATA HANDLING AND ADVANCE LOGIC

5.1 INTRODUCTION

In PLC programming Ladder logic input contacts and output coils allow simple logical decisions. The
Functions extend basic ladder logic to allow other types of control. For example, the addition of
timers and counters allowed event based control. This chapter will discuss Data Handling and
advance Numerical Logic control of PLC.

Most of the functions will use PLC memory locations to get values, store values and track function
status. Most function will normally become active when the input is true. But, some functions, such
as TOF timers, can remain active when the input is off. While other functions will only operate when
the input goes from false to true, this is known as positive edge triggered. Consider a counter that
only counts when the input goes from false to true, the length of time the input is true does not
change the function behavior. A negative edge triggered function would be triggered when the input
goes from true to false. Most functions are not edge triggered: unless stated assume functions are
not edge triggered.

5.2 DATA HANDLING

5.2.1 Move Functions

There are two basic types of move functions;

1. MOV (value, destination) - moves a value to a memory location


2. MVM (value, mask destination) - moves a value to a memory location, but with a mask to
select specific bits.

The simple MOV will take a value from one location in memory and place it in another memory
location. Examples of the basic MOV are given in Figure 5.1. When A is true the MOV function
moves a floating point number from the source to the destination address. The data in the source
address is left unchanged. When B is true the floating-point number in the source will be converted
to an integer and stored in the destination address in integer memory. The floating-point number will
be rounded up or down to the nearest integer. When C is true the integer value of 123 will be placed
in the integer file N7:25

69
A MOV
Source F8:05
destination F8:25

B MOV
Source F8:05
destination N7:25

C MOV
Source123
destination N7:25

Figure 5.1: Examples of the MOV Function


when a function changes a value, except for inputs and outputs, the value is changed immediately.
Consider Figure 5.1 if A, B and C are all true, then the value in F8:25 will change before the next
instruction starts. This is different than the input and output scans that only happen before and after
the logic scan.
A more complex example of move functions is given in Figure 5.2. When A becomes true the first
move statement will move the value of 130 into N7:0. And, the second move statement will move the
value of -9385 from N7:1 to N7:2. (Note: The number is shown as negative because we are using 2s
compliment.) For the simple MOVs the binary values are not needed, but for the MVM statement the
Binary values are essential. The statement moves the binary bits from N7:3 to N7:5, but only those
bits that are also on in the mask N7:4, other bits in the destination will be left untouched. Notice that
the first bit N7:5/0 is true in the destination address before and after, but it is not true in the mask.
The MVM function is very useful for applications where individual binary bits are to be manipulated,
but they are less useful when dealing with actual number values.

The concept of a mask is very useful, and it will be used in other functions Masks allow instructions
to change a couple of bits in a binary number without having to change the entire number. You might
want to do this when you are using bits in a number to represent states, modes, status, etc

70
A MOV
Source 130
dest N7:0

MOV
Source N7:1
dest N7:2

MVM
Source N7:3
mask N7:4
dest N7:5

MVM
Source N7:3
mask N7:4
dest N7:6

before after
binary decimal binary decimal
N7:0 0000000000000000 0 0000000010000010 130
N7:1 1101101101010111 -9385 1101101101010111 -9385
N7:2 1000000000000000 -32768 1101101101010111 -9385
N7:3 0101100010111011 22715 0101100010111011 22715
becomes
N7:4 0010101010101010 10922 0010101010101010 10922
N7:5 0000000000000001 1 0000100010101011 2219
N7:6 1101110111111111 1101110111111111

Figure 5.2 Example of the MOV and MVM Statement with Binary Values

5.2.2 Mathematical Functions

Mathematical functions will retrieve one or more values, perform an operation and store the
result in memory. Figure 5.3 shows an ADD function that will retrieve values from N7:4 and
F8:35, convert them both to the type of the destination address, add the floating point numbers,
and store the result in F8:36. The function has two sources labelled source A and source B. In
the case of ADD functions the sequence can change, but this is not true for other operations
such as subtraction and division. A list of other simple arithmetic function follows. Some of the
functions, such as the negative function are unary, so there is only one source.

71
A ADD
Source A N7:05
Source B F8:35
Destination F8:36

ADD(value,value,destination) - add two values


SUB(value,value,destination) - subtract
MUL(value,value,destination) – multiply
DIV(value,value,destination) – divide
NEG(value,destination) - reverse sign from positive/negative
CLR(value) - clear the memory location
Figure 5.3 Arithmetic Functions

To save space the function types are shown in the shortened notation above. For example, the
function ADD (value, value, destination) requires two source values and will store it in a
destination. It will use this notation in a few places to reduce the bulk of the function descriptions

An application of the arithmetic function is shown in Figure 5.4. Most of the operations provide
the results we would expect. The second ADD function retrieves a value from N7:3, adds 1 and
over-writes the source - this is normally known as an increment operation. The first DIV statement
divides the integer 25 by 10, the result is rounded to the nearest integer, in this case 3, and the
result is stored in N7:6. The NEG instruction takes the new value of -10, not the original value of
0, from N7:4 inverts the sign and stores it in N7:7.

72
ADD
Source A N7:0
Source B N7:1
dest N7:2 Addr. before after

ADD N7:0 10 10
Source A 1 N7:1 25 25
Source B N7:3
N7:2 0 35
dest N7:3
N7:3 0 1
SUB N7:4 0 -10
Source A N7:1 N7:5 0 250
Source B N7:2
dest N7:4
N7:6 0 3
N7:7 0 10
MUL N7:8 100 0
Source A N7:0
Source B N7:1
F8:0 10.0 10.0
dest N7:5 F8:1 25.0 25.0
F8:2 0 2.5
DIV
Source A N7:1
F8:3 0 2.5
Source B N7:0
dest N7:6

NEG
Source A N7:4
dest N7:7

CLR dest
dest N7:8

DIV
Source A F8:1
Source B F8:0
dest F8:2

DIV
Source A N7:1
Source B N7:0
dest F8:3

Figure 5.4 : Arithmetic Functions

A list of more advanced functions are given in Figure 5.5. This list includes basic Trigonometry
functions, exponents, logarithms and a square root function. The last function CPT will accept an
expression and perform a complex calculation.
ACS(value,destination) - inverse cosine
COS(value,destination) - cosine
ASN(value,destination) - inverse sine
SIN(value,destination) - sine
ATN(value,destination) - inverse tangent
TAN(value,destination) - tangent
XPY(value,value,destination) - X to the power of Y

73
LN(value,destination) - natural log
LOG(value,destination) - base 10 log
SQR(value,destination) - square root
CPT(destination,expression) - does a calculation

Figure 5.5 Advanced Mathematical Functions

Figure 5.6 shows an example where an equation has been converted to ladder logic. The first
step in the conversion is to convert the variables in the equation to unused memory locations in
the PLC. The equation can then be converted using the most nested calculations in the equation,
such as the LN function. In this case the results of the LN function are stored in another memory
location, to be recalled later. The other operations are implemented in a similar manner. (Note:
This equation could have been implemented in other forms, using fewer memory locations.)
Given 𝐴 = ln 𝐴 + 𝐴𝐴 acos⁡(𝐴) , assign A = F8:0, B=F8:1, C=F8:2, D=F8:3

LN
Source A F8:1
Dest F8:4

XPY
Source A 2.718
Source B F8:2
Dest F8:5

ACS
Source A F8:3
Dest F8:6

MUL
Source A F8:5
Source B F8:6
Dest F8:7

ADD
Source A tF8:4
Source B F8:7
Dest F8:7

SQR
Source A F8:7
Dest F8:0

Figure 5.6 An Equation in Ladder Logic

74
The same equation in Figure 5.6 could have been implemented with a CPT function as shown in
Figure 5.7. The equation uses the same memory locations chosen in Figure 5.6. The expression
is typed directly into the PLC programming software.

A CPT
Dest F8:0
Expression
SQR(LN(F8:1)+XPY(2.718,F8:2)*ACS(F8:3))

Figure 5.7 Calculations with a Compute Function

Math functions can result in status flags such as overflow, carry, etc. care must be taken to avoid
problems such as overflows. These problems are less common when using floating point
numbers. Integers are more prone to these problems because they are limited to the range.
5.2.3 Conversions
Ladder logic conversion functions are listed in Figure 5.8. The example function will retrieve a
BCD number from the D type (BCD) memory and convert it to a floating-point number that will be
stored in F8:2. The other function will convert from 2s compliment binary to BCD, and between
radians and degrees.

A FRD
Source A D10:5
Dest. F8:2

TOD(value,destination) - convert from BCD to 2s compliment


FRD(value,destination) - convert from 2s compliment to BCD
DEG(value,destination) - convert from radians to degrees
RAD(value,destination) - convert from degrees to radians
Figure 5.8 Conversion Functions

Examples of the conversion functions are given in Figure 5.9. The functions load in a source
value, do the conversion, and store the results. The TOD conversion to BCD could result in an
overflow error.

75
FRD
Source D9:1
Dest N7:0

TOD
Source A N7:1
Dest D9:0

DEG
Source F8:0
Dest F82

FRD
Source A F8:1
Dest F8:3

Addr. Before after


N7:0 0 1793
N7:1 548 548
F8:0 3.141 3.141
F8:1 45 45
F8:2 0 180
F8:3 0 0.785
D9:0 0000 0000 0000 0000 0000 0101 0100 1000
D9:1 0001 0111 1001 0011 0001 0111 1001 0011

Figure 5.9 Conversion Example

5.2.4 Array Data Functions


Arrays allow us to store multiple data values. In a PLC this will be a sequential series of num-bers
in integer, floating point, or other memory. For example, assume we are measuring and storing
the weight of a bag of chips in floating point memory starting at #F8:20. We could read a weight
value every 10 minutes, and once every hour find the average of the six weights. This section will
focus on techniques that manipulate groups of data organized in arrays, also called blocks in the
manuals.

5.2.4.1 - Statistics
Functions are available that allow statistical calculations. These functions are listed in Figure
5.10. When A becomes true the average (AVE) conversion will start at memory location F8:0and
average a total of 4 values. The control word R6:1 is used to keep track of the progress of the

operation, and to determine when the operation is complete. This operation, and the others, are
edge triggered. The operation may require multiple scans to be completed. When the operation is
done the average will be stored in F8:4 and the R6:1/DN bit will be turned on.

76
A AVE
File # F8:0
Dest F8:4
Control R6:1
length 4
position 0

AVE(start value,destination,control,length) - average of values


STD(start value,destination,control,length) - standard deviation of values
SRT(start value,control,length) - sort a list of values

Figure 5.10 Statistic Functions

Examples of the statistical functions are given in Figure 5.11 for an array of data that starts at
F8:0 and is 4 values long. When done the average will be stored in F8:4, and the standard
deviation will be stored in F8:5. The set of values will also be sorted in ascending order from F8:0
to F8:3. Each of the function should have their own control memory to prevent overlap. It is not a
good idea to activate the sort and the other calculations at the same time, as the sort may move
values during the calculation, resulting in incorrect calculations.

A AVE
File #F8:0
Dest F8:4
Control R6:1
length 4
position 0

B STD
File # F8:0
Dest F8:5
Control R6:2
length 4
position 0

C
SRT
File # F8:0
Control R6:3
length 4
position 0

Addr. before after A after B after C


F8:0 3 3 3 1
F8:1 1 1 1 2
F8:2 2 2 2 3
F8:3 4 4 4 4
F8:4 0 2.5 2.5 2.5
F8:5 0 0 1.29 1.29

Figure 5.11: statistical calculations

77
ASIDE: These function will allow a real-time calculation of SPC data for control limits, etc. The
only PLC function missing is a random function that would allow random sample times.

5.2.4.2 - Block Operations


A basic block function is shown in Figure 5.12. This COP (copy) function will copy an array of 10
values starting at N7:50 to N7:40. The FAL function will perform mathematical operations using
an expression string, and the FSC function will allow two arrays to be compared using an
expression. The FLL function will fill a block of memory with a single value.

A COP
Source #N7:50
Dest #N7:40
length 10

COP(start value,destination,length) - copies a block of values


FAL(control,length,mode,destination,expression) - will perform basic math
operations to multiple values.
FSC(control,length,mode,expression) - will do a comparison to multiple values
FLL(value,destination,length) - copies a single value to a block of memory

Figure 5.12: Block Operation Functions

Figure 214 shows an example of the FAL function with different addressing modes. The first FAL
function will do the following calculations N7:5=N7:0+5, N7:6=N7:1+5, N7:7=N7:2+5,
N8:7=N7:3+5, N7:9=N7:4+5. The second FAL statement does not have a file ’#’ sign in front of
the expression value, so the calculations will be N7:5=N7:0+5, N7:6=N7:0+5, N7:7=N7:0+5,
N8:7=N7:0+5, N7:9=N7:0+5. With a mode of 2 the instruction will do two of the calculations for
every scan where B is true. The result of the last FAL statement will be N7:5=N7:0+5,
N7:5=N7:1+5, N7:5=N7:2+5, N7:5=N7:3+5, N7:5=N7:4+5. The last operation would seem to be
useless, but notice that the mode is incremental. This mode will do one calculation for each
positive transition of C. The all mode will perform all five calculations in a single scan whenever
there is a positive edge on the input. It is also possible to put in a number that will indicate the
number of calculations per scan. The calculation time can be long for large arrays and trying to
do all of the calculations in one scan may lead to a watchdog time-out fault.

78
FAL
Control R6:0 array to array
length 5
A position 0
Mode all
Destination #N7:5
Expression #N7:0 + 5

FAL
Control R6:1 element to array
B length 5
position 0 array to element
Mode 2
Destination #N7:5
Expression N7:0 + 5

FAL
Control R6:2
C length 5
position 0 array to element
Mode incremental
Destination N7:5
Expression #N7:0 + 5

Figure 5.13: File Algebra Example

5.3 LOGICAL FUNCTIONS


5.3.1 Comparison of Values
Comparison functions are shown in Figure 5.14. Previous function blocks were outputs, these
replace input contacts. The example shows an EQU (equal) function that compares two floating
point numbers. If the numbers are equal, the output bit light is true, otherwise it is false. Other
types of equality functions are also listed.

79
EQU B 3:5
A F8:01
B F8:02

EQU(value,value) - equal
NEQ(value,value) - not equal
LES(value,value) - less than
LEQ(value,value) - less than or equal
GRT(value,value) - greater than
GEQ(value,value) - greater than or equal
CMP(expression) - compares two values for equality
MEQ(value,mask,threshold) - compare for equality using a mask
LIM(low limit,value,high limit) - check for a value between limits

Figure 5.14 Comparison Functions

The example in Figure 5.15 shows the six basic comparison functions. To the right of the figure are
examples of the comparison operations.

O:012
EQU N7:3=5 O:012/0=0
A N7:03 N7:2=3 O:012/0=1
B N7:02 00 O:012/0=0
O:012/0=0
O:012 O:012/0=1
NEQ O:012/0=1
A N7:03
B N7:02 01

O:012
LES N7:3=3 O:012/0=1
A N7:03 N7:2=3 O:012/0=0
B N7:02 02 O:012/0=0
O:012/0=1
O:012 O:012/0=0
LEQ O:012/0=1
A N7:03
B N7:02 03

N7:3=1 O:012/0=0
O:012
GRT N7:2=3 O:012/0=1
A N7:03 O:012/0=1
B N7:02 O:012/0=1
04
O:012/0=0
O:012 O:012/0=0
GEQ
A N7:03
B N7:02 05

Figure 5.15: Comparison Function Examples

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The ladder logic in Figure 5.15 is recreated in Figure 5.16 with the CMP function that allows text
expressions.

O:012
CMP
expression
N7:03 = N7:02 00

O:012
CMP
expression
N7:03 <> N7:02 01

O:012
CMP
expression
N7:03 < N7:02 02

O:012
CMP
expression
N7:03 <= N7:02 03

O:012
CMP
expression
N7:03 > N7:02 04

O:012
CMP
expression
N7:03 >= N7:02 05

Figure 5.16 : Equivalent Statements Using CMP Statements

Expressions can also be used to do more complex comparisons, as shown in Figure 218. The
expression will determine if B is between A and C.

04
CMP
expression
(F8:1 > F8:0) & (F8:1 < F8:2)
O: 012
Figure 5.17: A More Complex Comparison Expression
The LIM and MEQ functions are shown in Figure 5.18. The first three functions will compare a test
value to high and low limits. If the high limit is above the low limit and the test value is between or
equal to one limit, then it will be true. If the low limit is above the high limit then the function is only
true for test values outside the range. The masked equal will compare the bits of two numbers, but
only those bits that are true in the mask.

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LIM
low limit N7:0
test value N7:1 N7:5/0
high limit N7:2

LIM
low limit N7:2
N7:5/1
test value N7:1
high limit N7:0

LIM
low limit N7:2
N7:5/2
test value N7:3
high limit N7:0

MEQ
low limit N7:0
N7:5/3
test value N7:1
high limit N7:2

MEQ
low limit N7:0
N7:5/4
test value N7:1
high limit N7:4

Addr before (decimal) before (binary) after (binary)


N7:0 1 0000000000000001 0000000000000001
N7:1 5 0000000000000101 0000000000000101
N7:2 11 0000000000001011 0000000000001011
N7:3 15 0000000000001111 0000000000001111
N7:4 0000000000001000 0000000000001000
N7:5 0 0000000000000000 0000000000001101

Figure 5.18 Complex Comparison Functions

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Figure 5.19 shows a number line that helps determine when the LIM function will be true.

HL
LL

LL
HL

Figure 5.19 A Number Line for the LIM Function

File to file comparisons are also permitted using the FSC instruction shown in Figure 221.
The instruction uses the control word R6:0. It will interpret the expression 10 times, doing two
comparisons per logic scan (the Mode is 2). The comparisons will be F8:10<F8:0, F8:11<F8:0
then F8:12<F8:0, F8:13<F8:0 then F8:14<F8:0, F8:15<F8:0 then F8:16<F8:0, F8:17<F8:0
then F8:18<F8:0, F8:19<F8:0. The function will continue until a false statement is found, or the
comparison completes. If the comparison completes with no false statements the output A will
then be true. The mode could have also been All to execute all the comparisons in one scan,
or Increment to update when the input to the function is true - in this case the input is a plain
wire, so it will always be true.

FSC
Control R6:0 A
length 10
position 0
Mode 2
Expression #F8:10 < F8:0

Figure 5.20 File Comparison Using Expressions

5.3.2 Boolean Functions


Figure 5.21 shows Boolean algebra functions. The function shown will obtain data words from
bit memory, perform an and operation, and store the results in a new location in bit memory.
These functions are all oriented to word level operations. The ability to perform Boolean
operations allows logical operations on more than a single bit.

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A AND
source A B3:0
source B B3:1
dest.B3:2

AND(value,value,destination) - Binary and function


OR(value,value,destination) - Binary or function
XOR(value,value,destination) - Binary exclusive or function
NOT(value,destination) - Binary not function
Figure 5.21: Boolean Functions
The use of the Boolean functions is shown in Figure 5.22. The first three functions require two
arguments, while the last function only requires one. The AND function will only turn on bits in
the result that are true in both of the source words. The OR function will turn on a bit in the
result word if either of the source word bits is on. The XOR function will only turn on a bit in the
result word if the bit is on in only one of the source words. The NOT function reverses all of
the bits in the source word.

AND
source A N7:0
source B N7:1
dest.N7:2

OR
source A N7:0
source B N7:1
dest.N7:3

XOR
source A N7:0
source B N7:1
dest.N7:4

NOT
source A N7:0
dest.N7:5

addr. data (binary)


n[0] 0011010111011011
n[1] 1010010011101010
n[2] 0010010011001010
n[3] 1011010111111011
n[4] 1001000100110001
n[5] 1100101000100100

Figure 5.22 Boolean Function Example

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CHAPTER 6: ANALOG PROGRAMMING
6.1 INTRODUCTION

Although most of the operations performed by a PLC are either discrete I/O or register I/O
operations, there are some situations that require the PLC to either monitor an analog voltage or
produce an analog voltage. As example of an analog monitoring function, consider a PLC that is
monitoring the wind speed in a wind tunnel. In this situation, an air flow sensor is used that outputs
a DC voltage that is proportional to wind speed or emf output of thermocouple which is
proportional to temperature difference. This voltage is then connected to an analog input (also
called A/D input) on the PLC.

As an example of an analog control function, consider an AC variable frequency motor drive (called
a VFD). This is an electronic unit that produces an AC voltage with a variable frequency. When
connected to a 3-phase AC induction motor, it can operate the motor at speeds other than rated
speed. VFD’s are generally controlled by a 0-10 volt DC analog input with zero volts corresponding
to zero speed and 10 volts corresponding to rated speed. PLCs can be used to operate a VFD by
connecting the analog output (also called D/A output) of the PLC to the control input of the VFD.

Voltage

logical
continuous

time

Figure 6.1 : Logical and continuous Values

Analog input and output values are generally handled by the PLC as register operations. Input and
output transfers are usually done at update time. Internally, the values can be manipulated
mathematically and logically under ladder program control.

This chapter will focus on the general principles behind digital-to-analog (D/A) and analog to

digital (A/D) conversion. The chapter will show how to output and input analog values with a

PLC.

6.2 ANALOG (A/D) INPUT

To input an analog voltage (into a PLC or any other computer) the continuous voltage value

must be ’sampled’ and then converted to a numerical value by an A/D converter. Figure 17.2

shows a continuous voltage changing over time. There are three samples shown on the figure. The
process of sampling the data is not instantaneous, so each sample has a start and stop time. The
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time required to acquire the sample is called the ’sampling time’. A/D converters can only acquire a
limited number of samples per second. The time between samples is called the sampling period
’T’, and the inverse of the sampling period is the sampling frequency (also called sampling rate).
The sampling time is often much smaller than the sampling period. The sampling frequency is
specified when buying hardware, but for a PLC a maximum sampling rate might be 20Hz.

Voltage

time
-1 Sampling time
T=(sample Frequency)

Figure 6.2 : Sampling an analog voltage

Analog inputs to PLCs are generally done using add-on modules which are extra cost items. Few
PLCs have analog input as a standard feature. Analog inputs are available in unipolar (positive
input voltage capability) or bipolar (plus and minus input voltage capability). Standard off-the-shelf
unipolar analog input modules have ranges of 0-5 VDC and 0-10 VDC, while standard bipolar units
have ranges of -5 to +5 VDC and -10 to +10 VDC.

6.2.1 Specifying an Analog Input

There are basically three characteristics that need to be considered when selecting

an analog input. They are as follows.

1. Unipolar (positive only) or bipolar (plus and minus)

This is a simple decision. If the voltage being measured cannot be negative, then a unipolar input
is the best choice. It is not economical to purchase a bipolar input to measure a unipolar signal.

2.Input range

This is relatively simple also. For this specification, you will need to know the type of output from
the sensor, system, or transducer being measured. If you expect a signal greater then 10 volts,
purchase a 10 volt input and divide the voltage to be measured using a simple resistive voltage
divider (keep in mind that, if necessary, you can restore the value in software by a simple
multiplication operation). If you know the measured voltage will never exceed 5 volts, avoid
purchasing a 10 volt converter because you will be paying extra for the unused additional range.

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3.Number of Bits of Resolution

The resolution of an A/D operation determines the number of digital values that the converter is
capable of discerning over its range. As an example, consider an analog input with 4 bits of
resolution and a 0-10 volt range. With 4 bits, we will have 16 voltage steps, including zero.
Therefore, zero volts will convert to binary 0000 and the converter will divide the 10 volt range into
16 increments. It is important to understand that with four binary bits, the largest number that can
be provided is 11112 or 1510. Therefore, the largest voltage that can be represented by a 10 volt
4-bit converter is 10 / 16 * 15 = 9.375 volts. In other words, our 10 volt converter is incapable of
measuring 10 volts. All converters are capable of measuring a maximum voltage that is equal to
the rated voltage (sometimes called VREF) times (2n-1)/(2n), where n is the number of bits. Since
our converter divides the 10 volt range into 16 equal parts, each step will be 10/16=0.625 volt. This
means that a binary value of 0001 (the smallest increment) will correspond to 0.625 volt. This is
called the voltage resolution of the converter. Sometimes we refer to resolution as the number of
bits the converter outputs, which is called the bit resolution. Our example converter has a bit
resolution of 4 bits. It is important to remember that the bit resolution (and voltage resolution) of an
A/D converter determines the smallest voltage increment that the converter can determine.
Therefore, it is important to be able to properly specify the converter. If we use a converter with too
few bits of resolution, we will not be able to correctly measure the input value to the degree of
precision needed. Conversely, if we specify too many bits of resolution, we will be spending extra
money for unnecessary resolution.

For a unipolar converter, the voltage resolution is the full scale voltage divided by 2n, where n is
the bit resolution. As a rule of thumb, you should select a converter with a voltage resolution that is
approximately 25% or less of the desired resolution.

Increasing the bit resolution makes the voltage resolution smaller. Consider the table below for a 4
bit 10 volt unipolar converter.

Step10 Step2 Vout

0 0000 0.000

1 0001 0.625

2 0010 1.250

3 0011 1.875

4 0100 2.500

5 0101 3.125

6 0110 3.750

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7 0111 4.375

8 1000 5.000

9 1001 5.625

10 1010 6.250

11 1011 6.875

12 1100 7.500

13 1101 8.125

14 1110 8.750

15 1111 9.375

The leftmost column shows the sixteen discrete steps that the converter is capable of

resolving, 0 through 15. The middle column shows the binary value. The rightmost column shows
the corresponding voltage which is equal to the step times the rated voltage times (2n-1)/(2n). For
our converter, this will be the step times 10 volts x 15/16. Again, notice that even though this is a
10 volt converter, the highest voltage that it can convert is 9.375 volts, which is one step below 10
volts.

Case study Problem 6.1 :

A temperature sensor outputs 0-10 volts DC for a temperature span of 0-100 degrees C. What is
the bit resolution of a PLC analog input that will digitize a temperature variation of 0.1 degree C?

Solution:

Since, for the sensor, 10 volts corresponds to 100 degrees, the sensors outputs 10V / 100 degrees
= 0.1 volt/degree C. Therefore, a temperature variation of 0.1 degree would correspond to 0.01
volt, or 10 millivolts from the sensor. Using our rule of thumb, we would need an analog input with
a voltage resolution of 10 mV x 25% = 2.5 mV (or less) and an input range of 0-10 volts. This
means the converter will need to divide its 0-10 volt range into 10 V / 2.5 mV = 4000 steps. To find
the bit resolution we find the smallest value of n that solves the inequality 2n>4000. The smallest
value of n that will satisfy this inequality is n=12, where 2n = 4096. Therefore, we would need a 12-
bit 10 volt analog input. Now we can find the actual resolution by solving for a 12-bit 10 volt
converter. The resolution would be 10v / 212 = 2.44 mV. This voltage step would correspond to a
temperature variation of 0.0244 degree. This means that the digitized value will be within plus or
minus 0.144 degree of the actual temperature.

88
Determining the number of bits of resolution for bipolar uses a similar method. Bipolar converters
generally utilize what is called an offset binary system. In this system, all binary zeros represents
the largest negative voltage and all binary ones represents the largest positive voltage minus one
bit-resolution. To illustrate, assume we have an A/D converter with a range of -10 volts to +10 volts
and a bit resolution of 8 bits. Since the overall range is 20 volts, the voltage resolution will be 20
volts / 28 = 78.125 mV. Therefore, the converter will equate 000000002 to -10 volts and
111111112 will become +10 V - 0.078125 V = 9.951875 V. Keep in mind that this will make the
binary number 100000002, or 12810 (called the half-range value) be -10 V + 128 x 78.125 mV =
0.000 V.

Consider the table below for a 4 bit 10 volt unipolar converter.

Step10 Step2 Vout

0 0000 -10.000

1 0001 -8.750

2 0010 -7.500

3 0011 -6.250

4 0100 -5.000

5 0101 -3.750

6 0110 -2.500

7 0111 -1.250

8 1000 0.000

9 1001 1.250

10 1010 2.500

11 1011 3.750

12 1100 5.000

13 1101 6.250

14 1110 7.500

15 1111 8.750

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The leftmost column shows the sixteen discrete steps that the converter is capable of resolving, 0
through 15. The middle column shows the binary value. The rightmost column shows the
corresponding voltage which is equal to the step times the voltage span times (2n-1)/(2n). For our
converter, this will be the step times 20 volts x 15/16. Notice that digital zero corresponds to -10
volts, the half value point 10002 corresponds to zero volts, and the highest voltage that it can
convert is 8.750 volts, which is one step below +10 volts.

It is important to understand that expanding the span of the converter (span is the voltage
difference between the minimum and maximum voltage capability of the converter) to cover both
positive and negative voltages increases the value of the voltage resolution which in turn detracts
from the precision of the converter. For example, an 8-bit 10 volt unipolar converter has a voltage
resolution of 10 / 28 = 39.0625 mV while an 8-bit bipolar 10 volt converter has voltage resolution of
20 / 28 = 78.125 mV.

Case study Problem 6.2:

A 10-bit bipolar analog input has an input range of -5 to +5 volts. If the converter outputs the binary
number 01101111012 what is the voltage being read?

Solution:

First we find the voltage resolution of the converter. Since the span is 10 volts, the resolution is 10 /
210 = 9.7656 mV. Next we convert the output binary number to decimal (01101111012 = 44510)
and multiply it by the resolution to get 10 / 210 x 445 = 4.3457 V.

Finally, since the converter uses offset binary, we subtract 5 volts from the result to get 4.3457 V -
5 V = -0.6543 V.

The impedance of the source of the voltage to be measured must also be a consideration.
However, this factor usually does not affect the selection of the analog input because generally all
analog inputs are high impedance (1 Megohm or higher). Therefore, if the source impedance is
also high, the designer should exercise caution to make sure the analog input does not load the
source and create a voltage divider. This will cause an error in the reading. As a simple example,
assume the voltage to be read has a source impedance of 1 Megohm and the analog input also
has an impedance of 1 Megohm. This means that the analog input will only read half the voltage
because the other half will be dropped across the source impedance. Ideally, a 1000:1 or higher
ratio between the analog input impedance and the source impedance is desirable. Any lower ratio
will cause a significant error in the measurement. Fortunately, since most analog sensors utilize
operational amplifier outputs, the source impedance will generally be extremely low and loading
error will not be a problem.

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6.3 ANALOG (D/A) OUTPUT

When selecting an analog output for a PLC, most of the same design considerations are used as is
done with the analog input. Most analog outputs are available in unipolar 0 to 5 V and 0 to 10 V,
and in bipolar -5 to +5 V and -10 to +10 V systems. The methods for calculating bit resolution and
voltage resolution is the same as for analog inputs, so the selection process is very similar.

However, one additional design consideration that must be investigated when applying an analog
output is load impedance. Most D/A converters use operational amplifiers as their output
amplifiers. Therefore, the maximum current capability of the converter is the same as the output
current capability of the operational amplifier, typically about 25 mA. In most cases, a simple ohm’s
law calculation will indicate the lowest impedance value that the D/A converter is capable of
accurately driving.

Case study Problem 6.3:

A 12-bit 10 volt bipolar analog output has a maximum output current capability of 20 mA. It is
connected to a load that has a resistance of 330 ohms. Will this system work correctly?

Solution:

If the converter were to output it’s highest magnitude of voltage, which is -10 volts, the current
would be 10 V / 330 ohms = 30.3 mA. Therefore, in this application, the converter would go into
current limiting mode for any output voltage greater than 20 mA x 330 ohms = 6.6 V (of either
polarity).

6.4 ANALOG DATA HANDLING

As mentioned earlier, analog I/O is generally handled internally to the PLC as register values. For
most PLCs the values can be mathematically manipulated using software math operations. For
more powerful PLCs, these can be done in binary, octal, decimal or hexadecimal arithmetic.
However, in the lower cost PLCs, the PLC may be limited in the number systems it is capable of
handling, so designer may be forced to work in a number system other then decimal. When this
occurs, simple conversions between the PLC’s number system and decimal will allow the designer
to verify input values and program output values.

Case study Problem 6.4:

An voltage of 3.500 volts is applied to an 8-bit 5 volt unipolar analog input of a PLC. Using monitor
software, the PLC analog input register shows a value of 2638. Is the analog input working
correctly?

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Solution:

First, convert 2638 to decimal. It would be 2 x 82 + 6 x 81 + 3 x 80 = 179. For an 8-bit 5 volt


unipolar converter, 179 would correspond to 179 x 5 / 28 = 3.496 volts. Since the resolution is 5 /
28 = 0.0195 volts, the result is within ½ of a bit and is therefore correct.

6.5 ANALOG I/O POTENTIAL PROBLEMS

After installing an analog input system, it sometimes becomes apparent that there are problems.
Generally these problems occur in analog inputs and fall into three categories, a constant offset
error, percentage offset error, or an unstable reading.

6.5.1 Constant Offset Error

Constant offset errors appear as an error in which you find that the correct values always differ
from the measured values by an additive (or subtractive) constant. It is also accompanied by a
zero error (where zero volts is not measured as zero). Although there are many potential causes
for this, the most common is that the analog input is sharing a ground circuit with some other
device. The other device is drawing significant current through the ground such that a voltage drop
appears on the ground conductor. Since the analog input is also using the ground, the voltage drop
appears as an additional analog input. This problem can be avoided by making sure that all analog
inputs are 2-wire inputs and both of the wires extend all the way to the source. Also, the negative (-
) wire of the pair should only be grounded at one point (called single point grounding). Care should
be taken here because many analog sensors have a negative (-) output wire that is grounded
inside the sensor. This means that if you ground the negative wire at the analog input also, you will
create the potential for a ground loop with its accompanying voltage drop and analog input error.

6.5.2 Percentage Offset Error

This type of error is also called gain error. This is apparent when the measured value can be
corrected by multiplying it by a constant. It can be caused by a gain error in the analog input, a
gain error in the sensor output, or most likely, loading effect caused by interaction between the
output resistance of the sensor and the input resistance of the analog input. Also, if a resistive
voltage divider is used on the input to reduce a high voltage to a voltage that is within the range of
the analog input, an error in the ratio of the two resistors will produce this type of problem.

6.5.3 Unstable Reading

This is also called a noisy reading. It appears in cases where the source voltage is stable, but the
measured value rambles, usually around the correct value. It is usually caused by external noise
entering the system before it reaches the analog input. There are numerous possible reasons for
this; however, they are all generally caused by electromagnetic or electrostatic pickup of noise by
the wires connecting the signal source to the analog input. When designing a system with analog
inputs (or troubleshooting a system with this type of problem), remember that the strength of an

92
electromagnetic field around a current carrying wire is directly proportional to the current being
carried by the wire and the frequency of that current. If an analog signal wire is bundled with or
near a wire carrying high alternating currents or high frequency signals, it is likely that the analog
signal wires will pickup electrical noise. There are some standard design practices that will help
reduce or minimize noise pickup.

1. For the analog signal wiring, use twisted pair shielded cable. The twisted pair will cause
electromagnetic interference to appear equally in both wires which will be cancelled by the
differential amplifier at the analog input. The copper braid shield will supply some electromagnetic
shielding and excellent electrostatic shielding. To prevent currents from circulating in the shield,
ground the shield only on one end.

2. Use common sense when routing analog cables. Tying them into a bundle with AC line or
controls wiring, or routing the analog wires near high current conductors or sources of high
electromagnetic fields (such as motors or transformers) is likely to cause problems.

3. If all else fails, route the analog wires inside steel conduit. The steel has a high magnetic
permeability and will shunt most if not all interference from external magnetic fields around the
wires inside, thereby shielding the wires.

93
CHAPTER 7: DIFFERENT PLC PROGRAMMING LANGUAGES

7.1 INTRODUCTION

PLC languages are designed to emulate the popular relay ladder diagram format. This format is
read and understood worldwide by maintenance technicians as well as by engineers. Unlike
computer programming, PLC programming does not require extensive special training.
Applications know-how is much more important. Although certain special techniques are important
to programming efficiency, they are easily learned. The major goal is the control program
performance. Another difference between computers and PLCs is the sequential operation of the
PLC.

Start

Start

Event
Task 1 Counter

Task 2
Start

Task 3

Task 4
Task 1 Task 2 Task 3 Task 4

Figure 7.1: Sequential operation of PLC

This is an extremely useful feature that allows easy programming of shift registers, ring counters,
drum timers, and other useful indexing techniques for real-time control applications.

This chapter discusses the Textual language like, IEC 1131-3 (International Electrotechnical
Commission) programming languages, i.e. instruction lists (IL) and structured text (ST), and
Graphic language like sequential function charts (SFC), Function block diagram (FBD) and Ladder
Diagram (LD).

7.1.1 Textual Languages:

 Instruction List (IL)


 Structured Text (ST)

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7.1.2 Graphic Languages

 Ladder Diagram (LD)


 Function Block Diagram (FBD)
 Sequential Function Chart (SFC)

7.2 INSTRUCTION LIST PROGRAMMING (IL):

A programming method, which can be considered to be the entering of a ladder program using
text, is instruction lists (IL). Instruction list gives programs which consist of a series of instructions,
each instruction being on a new line. An instruction consists of an operator followed by one of more
operands, i.e. the subjects of the operator. In terms of ladder diagrams an operator may be
regarded as a ladder element. Each instruction may either use or change the value stored in a
memory register. For this, mnemonic codes are used, each code corresponding to an
operator/ladder element. The codes used differ to some extent from manufacturer to manufacturer,
though a standard IEC 1131-3 has been proposed and is being widely adopted. Table 6.1 shows
some of the codes used by manufacturers, and the proposed standard, for instructions used in this
chapter.

Table 7.1: Basic instruction used in Allen Bradley PLC

Mnemonics Function Mnemonics Function


LD Load ORB Or Block
LDN Load Not ANDN And Not
ST Store ORN Or Not
STN Store Not MPS Memory Push
AND And MPP Memory Pop
OR Or MRD Memory Read
ANB And Block MCR Master Control
Relay

95
Figure 7.2 : Instruction lists (IL) Programming screen

7.3 STRUCTURED TEXT PROGRAMMING

Structured text is a programming language that strongly resembles the programming language
PASCAL. Programs are written as a series of statements separated by semicolons. The
statements use predefined statements and subroutines to change variables, these being defined
values, internally stored values or inputs and outputs.

Assignment statements are used to indicate how the value of a variable it to be changed, e.g.

Light := SwitchA; is used to indicate that a light is to have its ‘value’ changed, i.e. switched on or
off, when switch A changes its ‘value’, i.e. is on or off. The general format of an assignment
statement is: X := Y; where Y represents an expression which produces a new value for the
variable X.

96
Table 7.2: Structure test operator

Operator Description Precedence


( …. ) Parenthised (bracketed) expression Highest
Function List of parameters of function
(….)
** Raising to a power
*, NOT NEGATION, Boolean NOT
+,- Addition, subtraction
*, /, MOD Multiplication, division, modulus operation
<,>,<=,>= Less than, greater than, less than or equal to ,
greater than or equal to
=, <> Equality, inequality
AND, & Boolean, AND
XOR Boolean XOR
OR Boolean OR

Table 7.2 shows some of the operators, like the OR in the above statement, that are used in
structured text programs, and their relative precedence when an expression is being evaluated.
For example:

InputA = 6

InputB = 4

InputC = 2

has (3 – InputC) evaluated before its value is used as


a divisor so the second part of the OutputQ statement is 4/(3 – 2) = 4. Division has precedence
over addition and so the first part of the statement is evaluated before the addition, i.e. 6/3. So we
have for Output Q the value 2 + 1 = 3.

Structured text is not case sensitive, thus lower case or capital letters can be used as is felt
necessary to aid clarity. Likewise spaces are not necessary but can be used to aid clarity, likewise
indenting lines. All the identities of directly represented variables start with the % character and is
followed by one or two letter code to identify whether the memory location is associated with
inputs, outputs or internal memory and whether it is bits, bytes or words, e.g.

%IX100 (*Input memory bit 100*)

%ID200 (*Input memory word 200*)

%QX100 (*Output memory bit 100*)

The first letter is I for input memory location, Q for output memory location, M for internal memory.
The second letter is X for bit, B for byte (8 bit), W for word (16 bits), D for double word (32 bits), L
for long word (64 bits).

AT is used to fix the memory location for a variable. Thus we might have:

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Input1 AT %IX100; (*Input1 is located at input memory bit 100*)

A Figure
7.3 : Structured Text Example Program

7.4 Ladder Diagram (LD)

The Ladder Diagram is also a graphics-oriented programming language which approaches


the structure of an electric circuit. On the one hand, the Ladder Diagram is suitable for
constructing logical switches, on the other hand one can also create networks as in FBD.
Therefore the LD is very useful for controlling the call of other POUs. The Ladder Diagram
consists of a series of networks. A network is limited on the left and right sides by a left
and right vertical current line. In the middle is a circuit diagram made up of contacts, coils,
and connecting lines. Each network consists on the left side of a series of contacts which
pass on from left to right the condition "ON" or "OFF" which correspond to the Boolean
values TRUE and FALSE. To each contact belongs a Boolean variable. If this variable is
TRUE, then the condition is passed from left to right along the connecting line. Otherwise
the right connection receives the value OFF.

98
Figure 7.4: ladder diagram programme

7.5 FUNCTION BLOCK PROGRAMMING

Function Block Diagrams (FBDs) are another part of the IEC 61131-3 standard. The primary
concept behind a FBD is data flow. In these types of programs the values flow from the inputs
to the outputs, through function blocks.

A Simple Program using FBD Language:

MOD LT AND OR
Var1 FBD example
10 5

GT b2
Var2 MOD b1
20 10

Var2 MOD GT
20 10

Figure 7.5: Function block diagram

7.6 SEQUENTIAL FUNCTION CHARTS

Sequential Function Charts (SFCs) are a graphical technique for writing concurrent control
programs. (Note: They are also known as Grafcet or IEC 848.) SFCs are a subset of the more
complex Petrinet techniques. The basic elements of an SFC Diagram are shown in Figure 7.6.

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S1 Step 1

t1 Transition 1

S2 Step 2

Figure 7.6: Basic Elements in SFCs

Example of SFC Language:

Figure 7.7 : SFC example in Codesys software

If we wanted to describe a traffic lamp sequence, one way we could do this would be to represent it
as a sequence of functions or states such as red light state and green light state and the inputs
and outputs to each state. Figure 7.8 illustrates this. State 0 has an input which is triggered after
the green light has been on for 1 minute and an output of red light on. State 1 has an input which is
triggered after the red light has been on for 1 minute and an output of green light on.

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States Outputs

Red light
0
only ON
transfer condition for next state is
Red light on for 1 minute

1 Green light
only ON
transfer condition for next state is
Green light on for 1 minute

Figure 7.8: Sequence for traffic light

The term sequential function chart (SFC) is used for a pictorial representation of a system’s
operation to show the sequence of the events involved in its operation. SFC charts have the
following elements:

Initial step in which the system


Start
is held ready to start

Transition condition

state/step Output

Transition condition

Stop Final step

Figure 7.9: States and its transition

1 The operation is described by a number of separate sequentially connected states or steps which
are represented by rectangular boxes, each representing a particular state of the system being
controlled. The initial step in a program is represented differently to the other steps, Figure 7.9
shows its representation

2 Each connecting line between states has a horizontal bar representing the transition condition
that has to be realised before the system can move from one state to the next. Two steps can
never be directly connected, they must always be separated by a transition. Two transitions can
never directly follow from one to another, they must always be separated by a step.

3 When the transfer conditions to the next state are realised then the next state or step in the
program occurs.

4 The process thus continues from one state to the next until the complete machine cycle is
completed.

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5 Outputs/actions at any state are represented by horizontally linked boxes and occur when that
state has been realised.

Start

IN 1 OUT 1
IN 1 Step 0
When IN 1 occur, then
step 0 Output 1
step 0 is realised and
OUT 1 occurs
IN 2
OUT 3
OUT 1 Step 1
When step 1 is realised
step 1 Output 2 and transfer condition
IN 2 IN2 , then OUT2 occurs
IN 2

End Final step


End

Figure 7.10: SFC and its equivalent ladder diagram

As an illustration of the principles of SFC, consider the situation with, say, part of the washing cycle
of a domestic washing machine where the drum is to be filled with water and then when full a
heater has to be switched on and remain on until the temperature reaches the required

level. Then the drum is to be rotated for a specified time. We have a sequence of states which can
be represented in the manner shown in Figure 7.11.

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Start

Start switch pressed

step 1 Fill with


Drum water

Level full switch

step 2 Heat
Water water

Right temperature switc h

step 3
Rotate
Hot Water

Time switch And so on for


Rest of cycle

Figure 7.11: Sequence in washing machine

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BIBLIOGRAPHY
1. Bolton, w., Programmable Logic Controllers: An Introduction, Butterworth-Heinemann,
1997. [8] Bryan, L.A., Bryan, E.A., Programmable Controllers, Industrial Text and
VideoCompany, 1997
2. Delta, “DVP-PLC Application Manual: Programming” 2014.
3. Delta, “DVP-ES2/EX2/SS2/SA2/SX2/SE&TP Operation Manual Programming” 2014.
4. Mitsubishielectric, “Mitsubishi Programmable Logic Controller Training Manual, Q-series
basic course (for GX Developer)” 2017.
5. Rockwell Automation Publication, “Logix5000 Controllers Generals Instructions Reference
Manual, 1756-RM003R-EN-P”, December 2016
6. Rohner, P., PLC: Automation With Programmable Logic Controllers, International
Specialized Book Service, 1996.
7. Schneider Electric , “SoMachine Programming Guide” 2010.
8. Simens , “Programming with STEP 7 manual” Edition 3, 2006.

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ACKNOWLEDGEMENT

At every stage of book writing, right from the conceptualization of the topic to its

compilation, I have received constant support, guidance and encouragement from my

respected teacher, Dr. D. P. Vakharia. I sincerely acknowledge his valuable contribution.

I know mere words can do nothing to express the feeling of gratitude that I have towards

all my teachers for the guidance they have given. I sincerely thank all teachers in

Mechanical Engineering Department, SVNIT, SURAT, INDIA.

I would like to thank all the friends that I met during the study and testing of different PLC
machines. I think it wouldn’t be possible to maintain spirits throughout the study and

testing without their moral support.

Finally, and most importantly, I record my permanent gratitude for the faith and support

of the people with whom I really worked and lived - my parents and my wife.

Dr. D. C. Patel

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