ELE504A

Embedded Systems Design

ELE504A

Lecture-1
Introduction to
ARM® CortexTM-M Processor

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 Objectives
 Introduce Cortex-M Processor
 Subset of the Cortex-M core assembly Language
 Define the memory mapped I/O structure
 Addressing Modes
 Describe How software is developed.

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 What are Embedded Systems?

 An embedded system (ES) is a system with a microcontroller

embedded (hidden) inside, and dedicated to performing a
single dedicated task
 Every year, more embedded systems are produced than
there are people on the earth (9 billions vs millions of
desktop/laptop PCs)
 Nearly, 99% of all 32-bit CPUs in use today are incorporated
within embedded systems. In future, nearly 90% of all
software will be for embedded systems
 The field of ES will get a boost with the growth of IOT
 Each household and each automobile has ~50 ES!
 More and more ES are built with OS and are networked

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 Medical
Embedded Systems
Automotive

 Embedded Systems are

Communications
Military everywhere/ubiquitous
 Microprocessor
 Intel: 4004, ..8080,.. x86
 Freescale
Comsumer Industrial (Motorola/NXP): 6800,
68000,... 9S12,..
PowerPC
 ARM, DEC, SPARC,
Embedded system MIPS, PowerPC, Natl.
Microcontroller LM3S or TM4C Electrical, Semi.,…
mechanical,
Processor chemical,  Microcontroller
or
RAM
I/O Ports
optical  Microprocessor + Memory
devices + I/O Ports (Interfaces)
ROM DAC
Bus ADC
Analog
signals  Remember!
 µC ≠ ES & µP ≠ µC
 Embedded Systems

 Single-functioned
 Executes a single program, repeatedly
 Tightly-constrained
 Low cost, low power, small, fast, etc.
 A reactive system continuously
 Accepts inputs → performs calculations → generates outputs
 A real-time system (not all ES are real-time)
 Specifies an upper bound on the time required to perform the
input/calculation/output in reaction to external events
 Interacts with the physical environment
 Often, has its own real-time operating system (RTOS)
 Microcontroller
 Processor – Instruction Set + memory + accelerators
 Ecosystem (e.g., CISC or RISC architecture)
 Memory
 Non-Volatile
o ROM
o EPROM, EEPROM, Flash
 Volatile
o RAM (DRAM, SRAM)
 Interfaces
 Hardware: Ports
 Software: Device Driver
 Parallel, Serial, Analog, Time

 I/O
 Memory-mapped vs. I/O-mapped I/O
 Features of Embedded System
 Highest available speed of microcontroller
 Size of the Chip (DIP, QEP) – determines size
of the system
 Amount of on-chip RAM/ROM space.
 Cost of chip – determines cost of overall system
 Development platform should be good enough
to reduce the design time. (on-chip debugging
facility (JTAG port), debug software)
 Availability of chips
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 Comparison

 Embedded Systems  General Purpose Computing

 Few applications that are known  Broad class of applications.
at design-time.
 Not programmable by end user.
 Programmable by end user.
 Fixed run-time requirements
(additional computing power not  Faster is better.
useful).
 Criteria:
 Criteria:
 cost
cost
 power consumption
 predictability average speed
 Three Key ES Technologies

 Processor technology
 The architecture of the computation engine used to
implement a system’s desired functionality
 General purpose processor (e.g., Pentium), application-
specific processor (programmable, optimized), single
purpose (ES MCU)
 IC technology
 Full custom/VLSI – excellent, but expensive and long time
to market
 Semi-custom ASIC – good but long time
 PLD – low cost, but power hungry and slower
 Design technology – exponential growth (Moore’s Law)
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 ARM Cortex M4-based System
 RISC machine
Pipelining effectively provides single cycle operation for many instructions
Thumb-2 configuration employs both 16- and 32-bit instructions
CISC
Many instructions
Instructions have varying lengths
Instructions execute in varying times
Many instructions can access memory
In one instruction, the processor can both
 read memory and
 write memory
Fewer and more specialized registers.
 some registers contain data,
 others contain addresses
Many different types of addressing modes
RISC
Few instructions
Instructions have fixed lengths
Instructions execute in 1 or 2 bus cycles
Few instructions can access memory
 Load from memory to a register
 Store from register to memory
No one instruction can both read and write
memory in the same instruction
Many identical general purpose registers
Limited number of addressing modes
 register,
 immediate, and
 indexed.
 ARM ISA: Thumb2 Instruction Set

Variable-length instructions
ARM instructions are a fixed
length of 32 bits
Thumb instructions are a fixed
length of 16 bits
Thumb-2 instructions can be
either 16-bit or 32-bit
Thumb-2 gives approximately 26%
improvement in code density over
ARM
Thumb-2 gives approximately 25%
improvement in performance over
Thumb
 Embedded System Interfaces
 The I/O devices are a crucial part of an embedded system, because
they provide necessary functionality.
 In human-computer interface (HCI) or man-machine interface (MMI),
the interfacing involves humans
 We can classify I/O interfaces into parallel, serial, analog or time
(time-encoded inputs and outputs).
 A device driver is a set of software functions that facilitate the use of
an I/O port
 Embedded systems run in real-time, if we can put an upper bound
on the time required to perform the input-calculation-output
sequence
 The worst case upper bound on the response time between when
the new input information becomes available and when that
information is processed, is called interface latency
 Embedded System Software
 The software is usually programmed into ROM and therefore fixed
 Software maintenance is still important, as injury or death may result
if hardware/software fails:
 Verification of proper operation

 Updates

 Fixing bugs

 Adding features

 Extending to new applications

 User end configuration

 An effective approach to building embedded systems is to first

design the system using a hardware/software simulator, then
download and test the system on an actual microcontroller.
 Review of Computer Architecture
 Ebook – Chapter 2 (CPU, RAM, RAM, I/O, bus)
 Most MCs have Flash ROM, as it is smaller in size (each bit
needs only two MOSFETs) than regular EEPROM
 Von Neumann architecture:
 Review of Computer Architecture
(cont’d)
Harvard architecture: Different buses for instructions and data
 Review of Arm Architecture

 ARM uses Harvard architecture:

 ARM – Advanced RISC Machine
 RISC – Reduced Instruction Set Computer
 High performance typical of 32-bit processors
combined with high code density of 8/16-bit MCUs
 Separate buses used for data and instruction
 Memory and I/O ports are byte addressable
 Each 8-bit byte in the 32-bit data and instructions has
a unique address, so memory and I/O ports are (1, 2,
4) byte addressable for read and write
 Reduced interrupt latency, due to fast ISR execution
Some Single Chip MCUs

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 I/O Ports

 An interface is defined as the collection of the I/O port,

external electronics, physical devices, and the software,
which combine to allow the computer to communicate
with the external world.
 We can classify I/O interfaces into four categories:
 Parallel - binary data are available simultaneously on a
group of lines
 Serial – binary data are available one bit at a time on a
single line
 Analog – data are encoded as an electrical voltage,
current, or power
 Time – data are encoded as a period, frequency, pulse
width, or phase shift
 I/O Mapping

 Memory-mapped I/O
• I/O ports/registers appear as addresses on common
bus with memory
• I/O ports/registers are accessed as though they are
locations in memory
• Employed on the ARM, Freescale and TI processors
 I/O-mapped I/O
• I/O ports/registers have separate control signals from
those used with memory
• Special instructions are used to access I/O ports/
registers
• Employed on Intel x86 processors

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Architecture of TM4C123

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 Architecture of TM4C123 (cont’d)

 GPIO – general purpose I/O (digital)

 UART – universal asynchronous receiver/transmitter
 I2C – inter-integrated circuit (2-wire interface)
 SSI/SPI – synchronous serial interface (aka, serial peripheral
interface, for master-slave, e.g., controller to sensor)
 JTAG – joint test action group (debug port for serial
communication)
 CAN bus – controller area network (for connecting MCU to
devices)
 Analog comparator – provides binary output for comparing
two analog signals
 CPU Registers

 Most basic, and fastest, storage area of the processor

 Used for data, addresses, timer, counter, etc.
 GP 32-bit registers: R0-R7 – low registers, R8-R12 –
high reg; used for data operations
 SP – stack pointer, points to top of the stack
 MSP – Main SP, is the default
 PSP – process SP, is used by application code
 LR – link register, stores return address of functions
 PC – program counter, points to next instruction to be
fetched from memory; incremented after the fetch
CPU Registers (cont’d)

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 Status Registers
 The program status register (PSR) can be addressed commonly or
individually as application PSR (APSR), interrupt PSR (IPSR), and
execution PSR (EPSR)
 N, Z, C, V, Q bits give information about previous ALU operation
(e.g., Z is set if result is zero, N if negative, C for carry on unsigned
overflow, V for signed overflow, and Q for saturated)
 ICT – Interruptible-Continuable Instruction; IT – if-then instruction

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 Status Registers (cont’d)
 T = 1 always, indicating that ARM Cortex processor is executing
Thumb instructions (16-bit long subset of the most commonly used
32-bit ARM instructions)
 ISR_NUMBER indicates which interrupt, if any, the processor is
handling
 Bit 0 of the special register PRIMASK is the interrupt mask bit. If it is
1, most interrupts and exceptions are not allowed. If it is 0, then
interrupts are allowed
 Bit 0 of the special register FAULTMASK is the fault mask bit. If it is
1, all interrupts and faults are not allowed. If it is 0, interrupts and
faults are allowed
 The nonmaskable interrupt (NMI) is not affected by these interrupts
 The BASEPRI register defines the priority of the executing software.
It prevents interrupts with lower or equal priority but allows higher
priority interrupts
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 Assembly Language
 Use of C language instructions often provides satisfactory execution
speeds
 However, in speed-critical applications such as loops in video game
programming, use of assembly language minimizes code size and
optimizes execution speed
 “A good explains why an operation is being performed, how it is used, how
it can be changed, or how it was debugged. A bad comment explains what
the operation does.”
 Syntax:

 The assembler translates assembly source code into object code, which
are the machine instructions executed by the processor.
 When we build a project all files are assembled or compiled and then linked
together by the linker
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 Addressing Mode and Operands

 Addressing mode (of an operand in an

instruction) - the format the instruction uses to
specify the memory location to read or write
data.
 A single instruction could exercise multiple
addressing modes for each of the operands
 Immediate addressing mode: the data is
contained in the instruction itself, e.g., MOV R0,
#1
 Most instructions operate on the registers (data flows
right to left)
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 Addressing Mode and Operands
(cont’d)
 Immediate addressing is only used to get,
load, or read data. It is not used with an
instruction that stores to memory

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 Addressing Mode and Operands
(cont’d)
 Indexed addressing mode: here, a register pointer is
used to address memory
 A register/index pointer contains the address or location of the
data
 E.g., R1 points to RAM, the instruction LDR R0, [R1] will read the 32 bit
value pointed to by R1 and place it in R0. R1 could be pointing to any valid
object in the memory map (i.e., RAM, ROM, or I/O), and R1 is not modified

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 Addressing Mode and Operands
(cont’d)
 PC-relative addressing mode: is indexed
addressing mode where the program counter
contains the address of the data
 used for branching, for calling functions, and
accessing constant data stored in ROM
 called PC relative because the machine code
contains the address difference between where the
program is now and the address to which the
program will access

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Addressing Mode and Operands
(cont’d)

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 Address Space

 TM4C123GH6PM with
Cortex-M processor
 32 KiB RAM
 256 KiB Flash
 43 I/O pins
 I/O modules: floating
point, CAN, DMA,
USB, PWM (+ SysTick,
RTC, timers, UART,
I2C, SSI, and ADC)
 KiB = kibibyte = 1024 bytes

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 Software Development Process

 ARM Keil uVision IDE

to be used
 Texas Instruments
Code Composer
Studio also available
 Include editor,
assembler/compiler,
and simulator
 Can download and
debug software on a
real microcontroller

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 Software Development Process
(cont’d)
 Editor is used to create source code
 Assembler/compiler is used to translate source code into
object code (instructions in machine-readable form)
 Most assembly source code is one to one with the object
code
 One line of a C program can translate into several
machine instructions
 The assembler/compiler may also produce a listing file,
which is a human readable output showing the
addresses and object code that correspond to each line
of the source program

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 Software Development Process
(cont’d)
 The target specifies the platform on which we will be
running the object code.
 When testing software with the simulator, we choose the
Simulator as the target.
 The simulator is an easy and inexpensive way to get
started on a project. However, its usefulness will
diminish as the I/O becomes more complex.
 For embedded systems, we typically perform initial
testing on a simulator.
 We will use the real MC’s JTAG debugger connected via
a USB cable to download and debug programs. The
JTAG is both a loader and a debugger.
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 References

 These three reference manuals for the Cortex M4

processor are available as pdf files:
 Cortex-M4 Instruction Set Technical User's Manual
 Cortex-M4 Technical Reference Manual
 ARM® and Thumb-2 Instruction Set Quick Reference Card
 Those new to ES programming, must first run lots of
existing projects (similar to Arduino sketches).
 Next, pick an existing project most like your intended
solution, and then make a copy of that project.
 Finally, make modifications to the copy a little bit at a
time as you morph the existing project into your solution.
After each modification verify that it still runs.
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