The Essential Guide to Data conversion Analog-to-Digital Converter AC Performance Specifications

FULL-SCALE (FS)
( )
SNR (Signal-to-Noise Ratio, dB or dBFS)
The ratio of the RMS value of the measured output signal (peak or full
scale) to the RMS sum of all other spectral components excluding the first
6 harmonics and DC.
UNIPOLAR SINGLE-ENDED

0V
VIN
FS
Analog Input/Output Configurations

Single-ended signaling is most common.

INPUT SIGNAL LEVEL (CARRIER) Example: p
p Unipolar Differential
RMS Signal = (FSR / 2) / √(2), RMS Noise = Qn = q / √(12)
“Real-World” Sampled Data Systems Consist of ADCs and DACs Time Domain DAC Output SNR (dB) = RMS Signal / RMS Noise = 20 × log(2(n – 1) × √6)) = 6.02 × n + 1.76 UNIPOLAR DIFFERENTIAL
VIN−
FS VIN+
VIN+ VIN–
Differential signals measure the difference in voltage between the
positive and negative input terminals.
1.5V
SFDR (dBFS) VIN+ The inputs are 180 degrees out of phase with each other.
SINAD (Signal-to-Noise Ratio and Distortion, dB) 0V 1V p-p
SFDR (dBc)
ANALOG DIGITAL dB The ratio of the RMS signal amplitude to the RMS value of the sum of all
VIN
+FS/2
Vcm Many benefits in using differential inputs.
inputs
OVERSHOOT CLOCK / DATA
FEEDTHROUGH
GLITCH
IMPULSE
Clock to output delay other spectral components including harmonics, but excluding DC. BIPOLAR SINGLE-ENDED
0V
Vcm = 1 VDC
+
1V
Input transient reduction
SINAD (dB) = –20 × log (√(10(–SNR W/O DIST/10) + 10(THD/10))) 1V p-p
ADC
ENERGY Group delay due to DAC propagation delay −FS/2
– Input noise reduction
Analog-to-Digital
g g Converters (ADC)
( ) and Digital-to-Analog
g g Converters ((DAC)) WORST SPUR LEVEL ENOB (BITS) = (SINAD – 1.76 + 20 × log (FSR/Actual FSR)) / 6.02 VIN–
VIN Signal swing is doubled
allow DSPs to interact with real-world signals. NON-IDEAL
Settling time VIN− +FS/2
0 5V
0.5V
SENSOR CHANNEL DSP MEMORY RESPONSE
THD (Total Harmonic Distortion, dBc) BIPOLAR DIFFERENTIAL
Pseudo differential is a single-ended/differential hybrid.
Real-world signals are continuous (analog) signals. SETTLING DNL ERROR 1 LSB Measured relative to output signal alone The ratio of the RMS sum of the first 6 harmonics to the RMS value of the
0V
Separation of signal ground from ADC ground for the ADC conversion
ERROR VIN+
Pressure sensor Time between when signal leaves ±0.5 LSB error band to when it −FS/2
DAC BAND measured fundamental. VIN(adc) = VIN+ – VIN– = 2 V p-p

TPUT
Temperature sensor,
sensor etc.
etc Consider ADC common-mode requirements
q Vcm = ((Vp
p + Vn)) / 2.
IDEAL remains within ±0.5 LSB error band of final value THD (–dB)
( dB) = 20 × log 2ND HAR/20))2 +
(√((10((–2ND (10((–3RD
3RD HAR/20))2 +
+… (10((–6TH
6TH HAR/20))2 ) Consider differential common-mode requirements

DAC ANALOG OUT

VIN+
Real-world signal processing allows for efficient and cost effective
RESPONSE NONLINEAR PSEUDO DIFFERENTIAL The ADC converts VIN+ – VIN–.
Slew rate SFDR (Spurious-Free Dynamic Range, dB or dBFS)
UDE

FS
TAL
OG

SLEWING
UE
AMPLITU

extraction of information from a signal.

ANALO

VALU
DIGIT

LOW DC
Signal amplitude Defined as maximum rate of change of voltage or current at output fs The ratio of the RMS value of the peak signal amplitude (or full-scale) to INPUT
VIN−
0, DC FREQUENCY
the RMS value of the amplitude of the peak spurious spectral component. 0V
TIME TIME
Phase, etc. Specified as V/sec or A/sec depending on DAC output stage 2
CLOCK / DATA The peak spurious component may or may not be a harmonic.
ADC SAMPLED AND DAC RECONSTRUCTED
QUANTIZED WAVEFORM WAVEFORM Digital information differs from real-world information in two important FEEDTHROUGH
Typically measured for full-scale step size with 10% to 90% error band
respects…it is sampled, and it is quantized. Both of these restrict how
much h iinformation
f ti digital
a di it l signal
i l can contain.
t i CLOCK TO Glitch impulse energy
OUTPUT DELAY
C
Caused db
by unequall propagation
ti d
delays
l within
ithi DAC
CODE =
ZEROSCALE
CODE =
ZEROSCALE
CODE =
MIDSCALE
CODE =
MIDSCALE
CODE =
MIDSCALE + 1
Often measured for midscale LSB transition (011..111 to 100..000) What Resolution Do I Need? Dynamic Range vs. Signal-to-Noise Ratio Requirements
T1 T2 T3 T4 T5
TIME
Measured as “area” of glitch impulse with units p/nV-s or p/nA-s

Oversampling Relaxes Requirements on Baseband Antialiasing Filter

Converter Resolution, INL, and DNL Oversampling Relaxes Requirements on Baseband Antialiasing Filter
Dynamic Range (DR) is the difference in level between the highest signal
peak that can be reproduced byy the system
y and the amplitude of the Si
Signal-to-Noise
lt N i R Ratio
ti (SNR) iis th
the diff
difference iin llevell b t
between th
the RMS
Frequency Domain DAC Output highest spectral component of the noise floor.
DR provides amplitude range so the converter can “see” the signal of interest.
signal level and the RMS level of the noise floor, except the first six
harmonics and DC. ADC FULL-SCALE (dBFS)
0
Converter resolution represents the analog signal at a number of discrete levels Converter DR is limited by SFDR and, theoretically, by its resolution.
A B SNR limits th capability
li it the bilit off the
th
IDEAL or steps. C
Consider
id using
i analog
l gain
i tto iincrease DR capability
bilit off th
the system.
t N = 12 BITS
fa fs – fa fa Kfs – fa converter to see “small” signals. 20
The smallest resolvable signal is 1 Least Significant Bit (LSB), which is equal FULL-SCALE Sinc(x) M = 4096 # OF FFT PTS
FS = 245.76MSPS
FS to FS/8 in this example. Converter SNR is, theoretically, 74dB = 6.02N + 1.76dB = SNR
Generally an antialiasing filter is required on the analog front end of an ADC.
FS
7/8 IDEAL –x dB FROM FULL-SCALE (dBFS)
SINC ATTENUATION
DAC’s time domain step response (zero-order hold) modifies DAC limited by its resolution.
40
BIN SPACING =
4096
IIntegral
t Nonlinearity
lN li it (INL) iis a measure off th
the maximum
i deviation
d i ti iin LSB
LSBs, ffrom –3.9dBc @ FDAC/2 frequency response If the sampling frequency is not much greater than the max input frequency fa, then
INL a straight line passing through negative full-scale and positive full-scale. Quantization noise of an 60
6/8 the requirements on an antialiasing filter can be severe, as in (A).

MPLITUDE (dB)
AMPLITUDE
AMPLITUDE
Good INL is required for open-loop systems and many closed-loop systems.
FUNDAMENTAL
DESIRED SIGNAL IMAGES
DAC output signals are attenuated by sin(π f/fdac)/(π f/fdac) envelope DYNAMIC
ideal ADC will have an RMS QUANTIZATION NOISE LEVEL
74dB
DNL SIGNAL g
The dotted regions indicate where the dynamic
y range
g can be limited by
y signals
g RANGE
ANALOG
G

5/8 VGA ADC SNR = 6.02N + 1.76 (dB), 80

M
ANALOG

y ((DNL)) is the difference between the actual step

Differential Nonlinearity p size and Harmonics DR outside the bandwidth of interest. DYNAMIC
RANGE AAF N = Number of bits. 33dB = 10log 10 ( 2 ) = FFT NOISE FLOOR (PER BIN)

the ideal 1 LSB change between two adjacent codes.

AM
100
4/8
ACTUAL Created by DAC’s static and dynamic nonlinearities Oversampling relaxes the requirements of the analog antialiasing filter as SIGNAL CHAIN Effective Number of Bits 107dB

1 LSB DNL error results in: (ENOB) is calculated from SNR:

3/8
Smaller or larger step sizes than the ideal
SFDR (dBc)
g
Images shown in (B). FREQUENCY FREQUENCY
120
ENOB = (SNR – 1.76) / 6.02 (bits). FS

ITUDE (dB)
QUANTIZATION
Additive noise/spurs beyond the effects of quantization DAC CLOCK FEEDTHROUGH Sigma delta converters are a good example.
Sigma-delta example 78 = 10log10(FS/2) = NOISE FLOOR (PER Hz) 2
UNCERTAINTY
Duplicate of the desired signal (and its DAC induced harmonics) at

plitude (dB)
2/8 2nd AND 3rd Example: 10-bit ADC with an FSR = 4 V p-p has an LSB = 3.9 mV p-p or 4/2BITS.
140
NON-MONOTONIC
1/8
A DAC is monotonic if its output increases or remains the same for an increment HARMONICS higher Nyquist zones Outputs of DACs need filtering also, and these are called “anti-imaging” Therefore, 4 V / 3.9 mV = 1024 codes. This can also be expressed in dB or 20 × log
152dB

Amp
AMPL
160
in the digital code, i.e., DNL > –1 LSB (a key requirement in a control system). DESIRED SIGNAL filters. They serve essentially the same purpose as the antialiasing filter (1024) = 60 dB.
2nd AND 3rd IMAGE HARMONICS Images are predicted by sampling theory fs fs Kfs
FREQUENCY (Hz)
Conversely, a DAC is nonmonotonic if the output decreases for an increment Kfs ahead of an ADC.
000 001 010 011 100 101 110 111 000 001 010 011 100 101 110 111 in the digital code.
code SFDR 2 2
An ADC has no missing codes if the input voltage is swept over the entire input NSD (dBm/Hz) STOPBAND ATTENUATION = DR STOPBAND ATTENUATION = DR
DIGITAL
DIGITAL INPUT Measured with single-tone output in first Nyquist band (unit is dBc)
range and all output code combinations appear at the converter output. A DNL TRANSITION BAND: fa to fs – fa TRANSITION BAND: fa to Kfs – fa
error of > –0.99 LSB guarantees that the converter will have no missing codes. Difference between single-tone
g amplitude
p to the next highest
g spurious
p
CORNER FREQUENCY: fa CORNER FREQUENCY: fa
tone
FDAC/2 FDAC
Noise Spectral Density (NSD) Quantization: Converter Circuits
FREQUENCY
Frequency
Integration
g of the noise floor in a small frequency
q y band (unit
( is The Size of a Least Significant Bit (LSB)
Converter Errors (Unipolar) dBm/Hz or nV/rtHz)

DAC Amplifier Coupled Circuit

DAC Definitions VDD
500Ω
POSITIVE
Zero-Code Error is the measured output voltage from VOUT of the DAC
Nyquist’s Criteria Theoretical SNR and ENOB Due to Jitter vs. Full-scale Sinewave Analog Input Frequency
GAIN AND AVDD
GAIN ERROR U
FULL-SCALE
SC
OFFSET
NEGATIVE
ERROR
ERROR when zero code (all zeros) is loaded to the DAC register. 225Ω
Ω
GAIN ERROR VOLTAGE IOUTB
Zero-Code Error is typically expressed in LSBs. RESOLUTION N 2N ppm FS % FS dBFS
(2 V/10 V FS) DAC AMP
225Ω
DAC Offset Error is a measure of the difference between the actual VOUT Theoretical SNR and ENOB Due to Jitter vs. Full-Scale Sine Wave 2-bit 4 0.5/2.5 V 250,000 25 –12 GND
IOUTA
OUTPUT
VOLTAGE OUTPUT
and the ideal VOUT in the linear region of the transfer function. Offset error A l
Analog IInputt F
Frequency 4-bit 16 125/625 mV 62,500 6.25 –24 COPT AVSS
AVDD
ROPT
ACTUAL VOLTAGE can be negative or positive in the DAC and output amplifier. AMP ITUDE
AMPLITUDE
6-bit 64 31.3/156 mV 15,625 1.56 –36
25Ω 25Ω
1kΩ
IDEAL ACTUAL
IDEAL
Offset Error is typically expressed in mV or mA.
mA 130 8-bit
8 bit 256 7.8/39.1 mV 3906 0.39 –48
48
500Ω

fa IMAGE
DAC Gain Error is a measure of the span error of the DAC. It is the deviation RMS JITTER TOTAL JITTER = t j (RMS) The total amount of jitter is dependent on
ZERO-CODE
ERROR
in slope of the actual DAC transfer characteristic from the ideal.
NYQUIST ZONE 1 120 10-bit 1024 2/9.77 mV 977 0.098 –60
(BASEBAND) Undersampled analog signal fa sampled @ Fs has images 0.125 ps
the effective aperture jitter within the 12-bit 4096 0.49/2.44 mV 244 0.024 –72
POSITIVE
Gain Error
Ga o is
s usua
usually
yeexpressed
p essed as a pe
percentage
ce tage o
of tthe
e full-scale
u sca e range.
a ge
((aliases)
li ) att | ± KFs ± fa|, 0.5,
| K=0 5 11, 1 5…
1.5 110
0.25 ps SNR = 20log 10
1 converter, as well as the external jitter 14-bit 16,384 122/610 µV 61 0.0061 –84 ADC Amplifier Coupled Circuit
DAC CODE OFFSET
DAC CODE Full-Scale Error is a measure of the output error when full-scale code FREQUENCY 2 π ft j generated by the sampling clock circuit. 16-bit 65,536 30.5/153 µV 15 0.0015 –96
(0xFFFF) is loaded into the DAC register. Ideally, the output should be VREF
0
NYQUIST ZONE 2 0.5Fs A signal with a maximum frequency fa must be sampled at a rate 100 0.5 ps 16 BITS AMP-AVDD
AVDD DRVDD
1 ps These terms are root sum squared to determine 18-bit 262,144 7.6/38 µV 4 0.0004 –108
− 1 LSB. (Full-Scale Error = Offset Error + Gain Error) Fs > 2fa or information about the signal will be lost because of 205Ω

SNR IN dB
B
90 2 ps 14 BITS
the total amount of jitter applied to the signal 20-bit 1,048,576 1.9/9.54 µV 1 0.0001 –120 24Ω 0.1µF 33Ω
aliasing.
aliasing
VIN+

ENOB
BUFFERED OR
Full-Scale Error is typically expressed as a percentage of the full-scale range. chain. 200Ω UNBUFFERED ADC
dV 22-bit 4,194,304 0.47/2.38 µV 0.24 0.000024 –132 ANALOG

80 INPUT +VS
Deadband Errors, DACs with integrated output amplifiers will have 62Ω 10kΩ 10kΩ
GAIN AND
OFFSET
performance degradation, deadbands, at codes outside of the linear region Aliasing occurs whenever Fs < 2fa. 12 BITS TOTAL JITTER = 24-bit 16,777,216 119/596 nV* 0.06 0.000006 –144 VOCM
G = UNITY REQUIRED FOR
UNBUFFERED ADC
2p R C
DEADBAND CODES
70
0.1µF 10kΩ 200Ω
ERROR
Fs NYQUIST ZONE 3 (ADC APERTURE JITTER) + (SAMPLING CLOCK JITTER)
2 2 –VS 10kΩ ADC INTERNAL
of the output amplifier.
amplifier *600 nV is the Johnson Noise in a 10 kHz BW of a 2.2 kΩ resistor @ 25°C.
The concept g is widely
p of aliasing y used in communications
33Ω

S
INPUT Z
27Ω
AMPLIFIER 10 BITS VIN–
The number of deadband codes depends on the DAC output voltage span, the Remember: 10 bits and 10 V FS yields an LSB of 10 mV, 1000 ppm, or 0.1%. 24Ω
OUTPUT
FULL-SCALE FOOTROOM
headroom and footroom of the amplifier, and the power supply rails used. applications such as direct IF-to-digital conversion. 60 ERROR
0.1µF
0 1 F
VCM
VOLTAGE
ERROR
ZERO-CODE
fa VOLTAGE In this example, if a 12-bit ENOB, 74 dB SNR (All other values may be calculated by powers of 2.) 205Ω

ACTUAL NEGATIVE
OFFSET
ERROR
ADC
C Definitions
e to s A signal that has frequency components between fa and fb must 50 is desired for the design with an analog 0.1µF

IDEAL
be sampled at a rate Fs > 2 (fb – fa) in order to prevent alias input frequency of 100 MHz
MHz, then the total
ADC Offset Error is the deviation of the first code transition, for example NYQUIST ZONE 4 1.5Fs 40 jitter required must be 0.5 ps or less.
(000…000) to (000…001) from the ideal (AGND + 1 LSB). Offset error is components from overlapping the signal frequencies.
NEGATIVE typically expressed in LSBs. 30
OFFSET
DAC CODE
ADC Gain Error is the deviation of the last code transition, for example
1 10 100 1000 ENCODE
(111…110) to (111…111) from the ideal (VREF – 1 LSB) after the offset error is 2Fs
adjusted out. Gain error for an ADC does not include the reference error FULL-SCALE ANALOG INPUT FREQUENCY IN MHz dt
and is typically expressed in LSBs.

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