Computer Organization

CS1403
 This Lecture:
• Text Books
• Prerequisites
• What we are going to study?
• Why this course is there in syllabus?
– Rather…Why we should study this?
• What is Computer Organizaton and Architecture ?
• The course structure.

Mayank Pandey, MNNIT, Allahabad, India

 Text Books
• Stalling W., Computer Organizaton & Architecture, 7th
Editon, Pearson Educaton India, 2010
• Hamacher C. etal, Computer Organizaton, 5th Editon,
McGrawHill, 2002
• Henneyssy J. L., Paterson D., Computer Organizaton
And Design: The Hardware/Sofware Interface, Morgan
Kaufmann, 2008

Mayank Pandey, MNNIT, Allahabad, India

Prerequisites
• Require Knowledge of
– Number System
• Decimal, Binary, their inter-conversion etc.
– Digital Logic
• Boolean Algebra, Karnaugh Maps, Logic Gates,
Sequental and Combinatonal circuits
– Data Structure and C/C++ Programming
– Probability and Mathematcs (10+2 stuff

Mayank Pandey, MNNIT, Allahabad, India

Course Objectves
• To learn ‐
– How computers work, basic principles
– How to analyze their performance
– How computers are designed and built
– Issues afectng modern processors
• (caches, pipelines, etc.f

Mayank Pandey, MNNIT, Allahabad, India

Why to study this course?
• Embarrassing if you are a BTech in CS/IT and
can’t
– make sense of the following terms: DRAM,
pipelining, cache hierarchies, I/O, virtual memory
– decide which processor to buy: 3 GHz P4 or 2.5
GHz Athlon
• Obvious frst step for chip designers, compiler/
OS writers

Mayank Pandey, MNNIT, Allahabad, India

What is Computer?
• Input (mouse, keyboard, …f
• Output (display, printer, …f
• Memory Input
– main (DRAMf, cache (SRAMf
– secondary (disk,
CD, DVD, …f Output
• Datapath Processor Processor
• Control (CPU)
Control
Memory
1001010010110000
0010100101010001
1111011101100110
1001010010110000
Datapath 1001010010110000
1001010010110000

Mayank Pandey, MNNIT, Allahabad, India

What is Computer Organizaton?
• Is it?
• The processor (CPUf…
• datapath
• Control

• Or is it memory, I/O
• …implemented using millions of transistors
• …impossible to understand by looking at individual
transistors
• we need...

Mayank Pandey, MNNIT, Allahabad, India

Abstracton
• Should know the abstracton frst
– Delving into the depths reveals more informaton
• An abstracton omits unneeded detail
– helps us cope with complexity

Mayank Pandey, MNNIT, Allahabad, India

Sofware Abstracton

Mayank Pandey, MNNIT, Allahabad, India

Hardware Abstracton

Mayank Pandey, MNNIT, Allahabad, India

Inside your Laptop

Mayank Pandey, MNNIT, Allahabad, India

The Memory

Mayank Pandey, MNNIT, Allahabad, India

Hardware/Sofware Interface

Mayank Pandey, MNNIT, Allahabad, India

Levels of Abstracton
• Instructon set architecture (ISAf
– Lowest level visible to a programmer
– Operaton (add/sub/mul/shiff
• Micro architecture
– Fills the gap between instructons and logic
modules
– Operaton Vs Micro Operaton

Mayank Pandey, MNNIT, Allahabad, India

 Instructon Set Architecture
• Assembly Language View
– Processor state (RF, memf
– Instructon set and encoding
• Layer of Abstracton
– Above: how to program machine
• HLL, OS
• Below:
– what needs to be built
– tricks to make it run fast
Mayank Pandey, MNNIT, Allahabad, India
The Abstract Machine

Mayank Pandey, MNNIT, Allahabad, India

Embedded Computers
• Processor as an intelligent electronic
component rather than Processor as a
computng engine
• Real tme operaton
• Requires hardware‐sofware co‐design
• Highly customized

Mayank Pandey, MNNIT, Allahabad, India

Why Diferent Processors?
• What is the diference between processors
used in desk‐tops, lap‐tops, mobile phones,
washing machines etc.?
– Performance / speed
– Power consumpton
– Cost
– General purpose / special purpose
– Domain Specifc: Network, DSP, Image. Crypto

Mayank Pandey, MNNIT, Allahabad, India

Topics to be covered:
• Performance issues
• A specifc instructon set architecture
– With insight into various addressing modes
• Arithmetc and how to build an ALU
• Constructng a processor to execute instructons
– Data path
– Design of Control Unit
• Pipelining to improve performance
• Memory: caches and virtual memory
• Input / output
Mayank Pandey, MNNIT, Allahabad, India