FSC FMEA

FAILURE MODE AND EFFECT ANALYSIS

Document FSC Site / Supplier / FMEA Team :

#: DFSILF-A Customer : FSCB C. Quiñones, C. Estacio, G. Baje, M.
Gestole, J. Matheu
Equipment Or Pkg FMEA Type:
Type : SO-8 Wireless DESIGN

Process Name Or Specification Number Originator:

BOTTOM FRAME SOIC, 8 LD, ETCHED
Or Parts: Clemens Quiñones
Reference Drawing: (CB)36-0001

Approvals:

Consuelo Tangpuz Noel Laylo Edwin Esperanza Cyrus dela Rama Roger Pineda
PTG Dept. Manager Engineering Dept. Maintenance Dept. Operations Manager QA & R Manager
Manager Manager

Rev # Date Originators Revision History Rev # Date Originators Revision History

A April Clemens Origination

23, Quiñones
1999

419671441.doc Page 1 of 21 29 April, 1999

Document # : DFSILF-A FSC FMEA
Failure Mode and Effect Analysis

C Area/
Part/ Potential Potential S L Potential Cause O Design D R Recommended Individual Actions S O D R
Process Function Failure Effect(s) E A of Failure C Verification or E P Actions Responsibl Taken E C E P
Modes of Failure V S C Current Control T N e& V C T N
S Timeframe

419671441.doc Page 2 of 21 29 April, 1999

Document # : DFSILF-A FSC FMEA
Failure Mode and Effect Analysis

C Area/
Part/ Potential Potential S L Potential Cause O Design D R Recommended Individual Actions S O D R
Process Function Failure Effect(s) E A of Failure C Verification or E P Actions Responsibl Taken E C E P
Modes of Failure V S C Current Control T N e& V C T N
S Timeframe

Die  Connect  Intermitte RDSon 6 S  Inconsistent DAP 6  DAP and fused 1 36  Change C. Estacio  Actio 6 3 1 1
Attach s die ntly failure planarity which leads lie on the leadframe (lf) 10 Aug. n(s) 8
Pad back- provide will result to same plane thus design from ‘98 reflecte
(DAP) side to backside inconsistent reducing dual strand to d in
leadfram connection solder wire tendency of DAP single strand (CB)36-
e for (partial dispense height tilting during for better 0001
drain failure) resulting to upset process DAP planarity C. rev. B
connecti varying solder done by supplier  Specify 2 mils Quiñones drawing
on quantity.  Design maximum lf 11 Sept.  Actio
 Irregular DAP verification rail ‘98 n(s)
surface causing through etched parallelism to reflecte
poor soft solder leadframe tooling DAP in the d in
wetting during  IQC visual drawing to (CB)
D/A sampling ensure 36-
inspection prior tolerable DAP C. Estacio 0001rev
to use planarity. 21 Aug. .D
 Specify 0.5 ‘98
mil maximum
DAP surface  Actio
flatness in n(s)
drawing. reflecte
d in
(CB)36-
0001
rev C
 No Drain open 6 S Inconsistent DAP 3 (same as above) 1 18
connection planarity which
to die back can contribute to
(complete missing soft
failure) solder material

419671441.doc Page 3 of 21 29 April, 1999

Document # : DFSILF-A FSC FMEA
Failure Mode and Effect Analysis

C Area/
Part/ Potential Potential S L Potential Cause O Design D R Recommended Individual Actions S O D R
Process Function Failure Effect(s) E A of Failure C Verification or E P Actions Responsibl Taken E C E P
Modes of Failure V S C Current Control T N e& V C T N
S Timeframe

 Isolates  Complete Electrical 8 S DAP width too 9  Minimum 5 36 Reduce DAP C. Action(s) 8 2 1 1
drain failure to short wide causing clearance 0 width from 113 Quiñones Reflected 6
connecti isolation DAP-source or between DAP & mils 106 size, 5 Oct. ‘98 in
on from DAP-gate shorting source/ gate set thus increasing (CB)36-
source at 5.4 mils the minimum 0001
and gate  Design clearance Rev. F
verification between DAP
through etched lf & source/ gate
tooling to 10.4 mils.
 IQC dimensional
sampling
inspection prior
to use
 Over- Poor thermal 8 S DAP size too 4  DAP design rule: 2 64 Increase DAP C. Action(s) 8 4 2 6
isolation performance small to promote 7 mils longer than length from Quiñones reflected 4
(partial of device fast heat die in each side 155 to 160 to 1Feb ‘99 in
failure) dissipation  DAP size = 113 compensate (CB)36-
mils x 155 mils metal volume 0001
 IQC dimensional loss when DAP Rev. M
sampling width is
inspection prior reduced from
to use 113 mils to
 SO-8 Package 106 mils.
thermal
simulation using
145 mils x 90
mils die size

419671441.doc Page 4 of 21 29 April, 1999

 Document # : DFSILF-A FSC FMEA
Failure Mode and Effect Analysis

C Area/
Part/ Potential Potential S L Potential Cause O Design D R Recommended Individual Actions S O D R
Process Function Failure Effect(s) E A of Failure C Verification or E P Actions Responsibl Taken E C E P
Modes of Failure V S C Current Control T N e& V C T N
S Timeframe

DAP  Serve as Incorrect  Wrong die 9 C DAP offset to 4  DAP x & y 1 36

(contin a die attach placement leadframe pilot/ dimensions with
ued) referenc reference  Tilted die index hole (which respect to pilot
e or (partial resulting to will result to hole included in
guide for failure) poor gate & wrong D/A IQC dimensional
die source reference) inspection
attach contacts
placeme  Electrical
nt fall-outs
(gate open
or short)
 Mold dents
(due to die
overhangin
g the mold
outline)

419671441.doc Page 5 of 21 29 April, 1999

Document # : DFSILF-A FSC FMEA
Failure Mode and Effect Analysis

C Area/
Part/ Potential Potential S L Potential Cause O Design D R Recommended Individual Actions S O D R
Process Function Failure Effect(s) E A of Failure C Verification or E P Actions Responsibl Taken E C E P
Modes of Failure V S C Current Control T N e& V C T N
S Timeframe

 Dissipat Inefficient  Poor 9 C  D/A voids due to 5  Material 4 18  Increase DAP C. Action(s) 9 5 2 9
es heat heatsinking thermal poor wetting as selection: 0 length from Quiñones reflected 0
during or heat device a result of Alloy194 with 155 to 160 to 1Feb ‘99 in
device dissipation performanc irregular DAP thermal compensate (CB)36-
applicati (partial e surface resistivity = metal volume 0001
on failure)  Over-  DAP size too 0.625 cal/cm- loss when Rev. M
stressed small to promote C-sec DAP width is
internal fast heat  KFC with reduced from
package dissipation thermal 113 mils to C. Estacio
assembly resistivity = 106 mils. 21Aug.’98 Action(s)
resulting to 0.87 cal/cm-C-  Specify 0.5 reflected
die cracks sec mil maximum in
and  DAP design rule: DAP surface (CB)36-
possible 7 mils longer than flatness in 0001 rev.
mold die in each side drawing. C
compound  DAP size = 113
burning mils x 155 mils
 IQC dimensional
sampling
inspection prior
to use
 SO-8 Package
thermal
simulation using
145 mils x 90
mils die size
 Design
verification
through etched
frame tooling

419671441.doc Page 6 of 21 29 April, 1999

Document # : DFSILF-A FSC FMEA
Failure Mode and Effect Analysis

C Area/
Part/ Potential Potential S L Potential Cause O Design D R Recommended Individual Actions S O D R
Process Function Failure Effect(s) E A of Failure C Verification or E P Actions Responsibl Taken E C E P
Modes of Failure V S C Current Control T N e& V C T N
S Timeframe

Die  Suppress Soft solder  Mold 8 S  Location of D/A 6  Designed flow 1 48

Attach es on leads bleeding flow guide too guide center to
Flow outflow (total  Mold tool far from fused fused lead
Guide( of D/A failure) dents (due leads distance = 7 mils
s) material to bulging [Ref: (CB)36-0001
(soft D/A Rev. M]
solder) material on  Design
into leads verification
fused outside through etched lf
leads mold tooling
outline)
 Mold
delaminatio
n
 Spreads Die back  RDSon 8 S  Wrong flow 8  Designed star 2 12 Review star C.
out D/A voids failures guides location burst flow guide 8 burst flow Quiñones
material (partial & shape design at DAP guide design WW48-50
through- failure) center [Ref: for possible FY99
out die (CB)36-0001 Rev. redesigns
back M]
 Design
verification
through etched lf
tooling
 X-ray buy-off
during D/A

419671441.doc Page 7 of 21 29 April, 1999

 Document # : DFSILF-A FSC FMEA
Failure Mode and Effect Analysis

C Area/
Part/ Potential Potential S L Potential Cause O Design D R Recommended Individual Actions S O D R
Process Function Failure Effect(s) E A of Failure C Verification or E P Actions Responsibl Taken E C E P
Modes of Failure V S C Current Control T N e& V C T N
S Timeframe

DAP  Holds Pad tilting  Insufficient 9 C  Width of tie bar 6  Designed total 1 54
Tie Bar DAP (partial amount of not be enough width of tie bar =
firmly to failure) dispensed to support the 12 mils
avoid solder as a DAP during  Designed shape
twisting result of stamping of tie bar: two-
or tilting varying process pronged bridge
during dispense to  Location of tie between DAP &
stampin DAP bar not able to mold clamping
g distance suppress area
/coining  RDSon moments  Tie bar is
(@ failures strategically
vendor minimal situated near the
side) drain DAP edge (no
contact fuse-lead side) for
 Reliability a more rigid
failures due support
to cracks  Design
induced by verification
thin solder through etched lf
layer tooling
Holds DAP Floating  D/A voids 5 S  Width of tie bar 6 (same as above) 3 90  Change C. Estacio/ Action(s) 5 5 1 2
firmly DAP during due to poor not be enough leadframe 10Aug. ‘98 reflected 5
during D/A scrubbing to support the design from in
D/A (partial @ D/A spring back dual strand to (CB)36-
failure)  RDSon action of DAP single strand 0001 rev.
failures during D/A for stronger B
 Wrong die  Location of tie DAP support
position bar not able to
suppress
moments

419671441.doc Page 8 of 21 29 April, 1999

 Document # : DFSILF-A FSC FMEA
Failure Mode and Effect Analysis

C Area/
Part/ Potential Potential S L Potential Cause O Design D R Recommended Individual Actions S O D R
Process Function Failure Effect(s) E A of Failure C Verification or E P Actions Responsibl Taken E C E P
Modes of Failure V S C Current Control T N e& V C T N
S Timeframe

DAP Firmly Tie bar Index 8 S  Width of tie bar 6  Designed total 1 48  Change C. Estacio Action(s) 8 3 1 2
Tie Bar supports premature jamming not be enough width of tie bar = leadframe 10Aug. ‘98 reflected 4
(contin the cut during during TNF to support the 12 mils design from in
ued) molded TNF package during  Designed shape dual strand to (CB)36-
package (partial TNF of tie bar: two- single strand 0001 rev.
during failure)  Location of tie pronged bridge for stronger B
trim & bar wrt molded between package package
form package not & mold clamping support
(TNF) able to suppress area during TNF
process moments  Designed location
of tie bar: along
Y-axis of package
center
 Design
verification
through etched lf
tooling
Too rigid  Package 9 C Tie bar width too 5  Designed total 1 45
package delaminatio wide thus causing width of tie bar =
support n high mechanical 12 mils
(partial  Package stress on the  Designed shape
failure) crack package during of tie bar: two-
 Reliability singulation pronged bridge
failures between package
& mold clamping
area
 Design
verification
through etched lf
tooling

419671441.doc Page 9 of 21 29 April, 1999

Document # : DFSILF-A FSC FMEA
Failure Mode and Effect Analysis

C Area/
Part/ Potential Potential S L Potential Cause O Design D R Recommended Individual Actions S O D R
Process Function Failure Effect(s) E A of Failure C Verification or E P Actions Responsibl Taken E C E P
Modes of Failure V S C Current Control T N e& V C T N
S Timeframe

Mold Prevents Mold  Visual 6 S Narrow clamping 1  Designed clamp 2 12 Increased mold C. Estacio Action(s) 6 5 1 3
Clampi mold flashing of reject width not able to 0 area width 0 clamping area 21Aug ‘98 reflected 0
ng flashing lower leads  Solderabilit withstand mold outside package to from in
Area of leads (complete y problem transfer pressure is 12 mils approximately (CB)36-
below failure)  High mold resulting to  Testing of lf 30 mils to 50 0001 rev.
dambar compound flooding of mold prototypes during mils C
(via rail usage rate flashes into rail preliminary mold
downset downset channel tool set-up
channel) and into lower
leads
Holds DAP Flimsy tie  Weakening 6 S  Distance 4  Designed 1 24
tie bar bar support of tie bar between molded distance from
after mold  Premature package and mold outline to
(partial breakage of mold clamping tie bar neck = 3.5
failure) tie bar area too wide mils
during  Follow
dejunk & conventional SO-
TNF 8 design
 Testing of lf
prototypes during
preliminary
dejunk & TNF
tools set-up

419671441.doc Page 10 of 21 29 April, 1999

 Document # : DFSILF-A FSC FMEA
Failure Mode and Effect Analysis

C Area/
Part/ Potential Potential S L Potential Cause O Design D R Recommended Individual Actions S O D R
Process Function Failure Effect(s) E A of Failure C Verification or E P Actions Responsibl Taken E C E P
Modes of Failure V S C Current Control T N e& V C T N
S Timeframe

Damba Simplifies Mold  Visual 6 S  Narrow dambar 5  Designed dambar 1 30

r mold tool flashing of reject width not able to width = 10 mils
design & lower leads  Solderabilit withstand mold  Follow existing
prevents (complete y problem transfer pressure SO-8
flashing failure)  High mold resulting to conventional
of mold compound flooding of mold dambar
compoun usage rate flashes into the specifications
d into lower leads
lower
leads
Allocate Incomplete  External 8 S Dambar distance 5  Designed dambar 1 40
space for venting mold from package too to package
mold (partial package close obstructing distance = 10
venting failure) void – vented air during mils
visual reject mold packing  Follow existing
 Internal SO-8
mold conventional
package dambar
void – specifications
reliability
risk
Pools in Dejunking  Package 9 C Dambar distance 5  Designed dambar 1 45 Increase lower C. Action(s) 9 3 1 2
mold errors crack (due too close to to package dambar Quiñones reflected 7
flashes (partial to dejunk package distance = 10 dimension of 29Sept. in
for dejunk failure) tool hitting mils outermost ‘98 (CB)36-
pkg edge)  Follow existing leads (for 0001
 Package SO-8 stronger Rev. E
delaminatio conventional dejunk tool)
n dambar
specifications

419671441.doc Page 11 of 21 29 April, 1999

 Document # : DFSILF-A FSC FMEA
Failure Mode and Effect Analysis

C Area/
Part/ Potential Potential S L Potential Cause O Design D R Recommended Individual Actions S O D R
Process Function Failure Effect(s) E A of Failure C Verification or E P Actions Responsibl Taken E C E P
Modes of Failure V S C Current Control T N e& V C T N
S Timeframe

Leadfr Connects Flimsy  Index 7 S Narrow leadframe 6  Designed 4 16  Change lf C. Estacio Action(s) 7 3 1 2
ame every unit leadframe jamming @ rails cannot resist leadframe rail 8 design from 10Aug. ‘98 reflected 1
Rail to make a (partial D/A mechanical width = 97mils/ dual strand to in
sturdy failure)  Leadframe stresses causing side single strand, (CB)36-
leadframe bowing deformations  Design thus 0001
strip  Poor after several verification increasing Rev. B
(backbon alignment handling through etched lf the rail to lf C. Estacio
e of the to topframe tooling width ratio 21Aug. ‘98
leadframe resulting to from 27% to Action(s)
) poor source 41% reflected
& gate  Increase rail in
contacts width to 126 (CB)36-
 Electrical mils per side 0001
fall-outs Rev C
Leadfr Maintain Non-parallel  Irregular 8 S Poor rail planarity 7 Design verification 6 33 Specify 2 mils C. Action(s) 8 6 2 9
ame parallelis bottomfram contact condition through etched lf 6 maximum Quiñones reflected 6
Rail m of e to between (irregular macro- tooling parallelism of 11Sept. in
(contin bottomfra topframe topframe & contours on rails rails wrt leads ‘98 (CB)36-
ued) me to assembly Si die surface) 0001 rev.
topframe (complete solder D
failure) bumps
 Electrical
fall-outs
(gate/
source
open)
 Low
process
yield

419671441.doc Page 12 of 21 29 April, 1999

Document # : DFSILF-A FSC FMEA
Failure Mode and Effect Analysis

C Area/
Part/ Potential Potential S L Potential Cause O Design D R Recommended Individual Actions S O D R
Process Function Failure Effect(s) E A of Failure C Verification or E P Actions Responsibl Taken E C E P
Modes of Failure V S C Current Control T N e& V C T N
S Timeframe

Maintain Non-  No contact 8 S Poor surface 7 Design verification 6 33 Specify 0.5 C. Estacio Action(s) 8 6 2 9
lead coplanar between flatness of rail through etched lf 6 mils maximum 21Aug. ‘98 reflected 6
coplanarit topframe & topframe & tooling surface in
y of bottomfram solder balls/ flatness of rail (CB)36-
bottomfra e leads bumps in the drawing 0001 rev.
me to (complete  Electrical C
topframe failure) fall-outs
(gate/
source
open)
 Low
process
yield

419671441.doc Page 13 of 21 29 April, 1999

 Document # : DFSILF-A FSC FMEA
Failure Mode and Effect Analysis

C Area/
Part/ Potential Potential S L Potential Cause O Design D R Recommended Individual Actions S O D R
Process Function Failure Effect(s) E A of Failure C Verification or E P Actions Responsibl Taken E C E P
Modes of Failure V S C Current Control T N e& V C T N
S Timeframe

Rail Connects Rail  Floating 9 C  Weak tie bar 6  Designed lead 1 54 Reduce leads C. Action(s) 9 6 1 5
Ti individual disconnects leads design tie bar width = 31 tie bar width Quiñones reflected 4
e units to (partial  Intermittent  Narrow tie bar mils from 31 mils 26Feb. ‘99 in
Ba leadframe failure) contact width  Total to 28 mils (for (CB)36-
r rails & between horizontal rail strip cutting 0001
makes-up topframe & width (@downset purposes) Rev. P
width of solder balls/ area) = 202 mils
the bumps  Design
leadframe  Electrical verification
(Analogy: fall-outs through etched lf
ribs of the (gate/ tooling
human source
body') open)
 Dejunk &
TNF index
jamming
 Deflash
jamming
 Low
process
yield

419671441.doc Page 14 of 21 29 April, 1999

 Document # : DFSILF-A FSC FMEA
Failure Mode and Effect Analysis

C Area/
Part/ Potential Potential S L Potential Cause O Design D R Recommended Individual Actions S O D R
Process Function Failure Effect(s) E A of Failure C Verification or E P Actions Responsibl Taken E C E P
Modes of Failure V S C Current Control T N e& V C T N
S Timeframe

Rail Reduces Inconsistent  No contact 8 S  Rail tie bar 7 Designed slots 2 11 Increase total C. Action(s) 8 3 2 4
Tie Bar over-all downset between downset slots split rail tie bar 2 rail tie bar Quiñones reflected 8
Downs downset depth topframe & too small (its into three. Active downset slot 20Nov. ‘98 in
et rail tie bar (partial solder balls/ effect in tie bar locations length from (CB)36-
Slots volume failure) bumps reducing over-all along DAP tie bar, 115 mils to 0001
for  Electrical upset rail dambar & leads 157 mils rev. J
improved fall-outs volume is tie bar
downset (gate/ insignificant) Designed rail tie
control of source bar downset slots
leadframe open) total length =
manufact  Low 115 mils/ unit
uring process against 202 mils/
yield unit total rail
downset length
[Ref: (CB)36-0001
Rev H]
Design
verification
through etched lf
tooling
IQC dimensional
sampling
inspection prior
to use
Rail Maintain Non-parallel  No contact 8 S  Poor planarity of 7 Designed rail tie 6 33 Specify 2 mils C. Action(s) 8 6 2 9
Tie Bar parallel & topframe & between rail wrt bar downset 6 maximum Quiñones reflected 6
Downs sufficient bottomfram topframe & bottomframe depth = 8 2 mils parallelism of 11Sept. in
et gap for e leads solder balls/ leads Design rails to ‘98 (CB)36-
topframe (partial bumps  Inconsistent rail verification bottomframe 0001
failure)  Electrical downset depth through etched lf leads rev. D
fall-outs tooling
(gate/
source
open)
 Low
process
yield

419671441.doc Page 15 of 21 29 April, 1999

 Document # : DFSILF-A FSC FMEA
Failure Mode and Effect Analysis

C Area/
Part/ Potential Potential S L Potential Cause O Design D R Recommended Individual Actions S O D R
Process Function Failure Effect(s) E A of Failure C Verification or E P Actions Responsibl Taken E C E P
Modes of Failure V S C Current Control T N e& V C T N
S Timeframe

Rail Maintains Leadframe  Leadframe 5 S Varied rail tie 5  Specify 1 25

Tie Bar stacking offset deformatio bar downset downset angle
Downs ability of stacking ns angle dimension dimension and
et bottom-  D/A input from leadframe practical angle
Angle frame jamming to leadframe location in
leadframe
drawing [Ref:
( CB)36-0001 Rev.
G]
Design
verification
through etched lf
tooling
Maintains Rail tie bar  Floating 9 C  Too much plastic 6  Designed 1 54
rail tie bar cracking leads deformation on downset angle
downset  Intermittent rail tie bar dimension =
strength contact caused by too 1355 relative
between steep downset to rail surface
topframe & angle [Ref:( CB)36-0001
solder balls/ Rev. G]
bumps  Design
 Electrical verification
fall-outs through etched lf
(gate/ tooling
source
open)
 Dejunk &
TNF index
jamming
 Deflash
jamming
 Low
process
yield

419671441.doc Page 16 of 21 29 April, 1999

 Document # : DFSILF-A FSC FMEA
Failure Mode and Effect Analysis

C Area/
Part/ Potential Potential S L Potential Cause O Design D R Recommended Individual Actions S O D R
Process Function Failure Effect(s) E A of Failure C Verification or E P Actions Responsibl Taken E C E P
Modes of Failure V S C Current Control T N e& V C T N
S Timeframe

Square Facilitate Index  Leadframe/ 7 S Irregular unit 9  Set index hole 1 63

Index leadframe jamming strip pitch (inter-index as pilot hole
Holes indexing (partial damage hole dimension) (leadframe
at failure)  Package dimensional
various crack reference)
assembly  High scrap  Index/pilot
processes rate / low holes center
such as process dimensions
D/A, yield tolerance: 1 mil
dejunk &  Set non-
TNF cumulative pilot
hole tolerance: 
2 mils
 IQC
dimensional
sampling
inspection prior
to use
Aligns Misalign  Vertical or 7 S Offset index hole 1  Set index hole 1 70
“internal internal horizontal wrt to location of 0 as reference to all
package” package to package DAP leadframe
of mold offsets dimensions
leadframe outline  Leads including DAP
to mold (complete pinching  Index/ pilot
tool failure)  Leadform holes center
(square irregularitie dimension
shape tolerance: 1 mil
s
ensures
minimal  IQC
contact dimensional
with or sampling
shape inspection prior
locating to use
pins of
mold)

419671441.doc Page 17 of 21 29 April, 1999

 Document # : DFSILF-A FSC FMEA
Failure Mode and Effect Analysis

C Area/
Part/ Potential Potential S L Potential Cause O Design D R Recommended Individual Actions S O D R
Process Function Failure Effect(s) E A of Failure C Verification or E P Actions Responsibl Taken E C E P
Modes of Failure V S C Current Control T N e& V C T N
S Timeframe

Rail stress Leadframe  Index 9 C Unequal 4 Leadframe is 1 36

relief camber jamming expansion of designed with nine
(complete  Reflowed opposite rails pairs of index
failure) solder joint after soft solder holes at
cracks D/A or solder alternating
reflow process locations on
opposite rails
Circula  Breaks  Misfeeding  Package 1 C  Latitudinal & 6  Add circular 1 60
r symmetr @ Deflash cracking 0 longitudinal orientation holes
Leadfr y of Dejunk &  Rough symmetry of adjacent to
ame leadfram TNF Package leadframe is square index
Orient e inorder  Misloading  Damaged perfect (except holes on one side
ation to @ mold tooling internal package of the rail [Ref:
Hole prevent  High tooling design) (CB)36-0001 Rev.
misfeed- (complete maintenanc  No immediate K)
ing @ failures) e cost visual distinction  Circular
EOL  Processing between top & orientation hole
processe delays bottom side of center dimension
s leadframe after tolerance wrt
package is index hole: 1 mil
molded  IQC
dimensional
sampling
inspection prior
to use

419671441.doc Page 18 of 21 29 April, 1999

 Document # : DFSILF-A FSC FMEA
Failure Mode and Effect Analysis

C Area/
Part/ Potential Potential S L Potential Cause O Design D R Recommended Individual Actions S O D R
Process Function Failure Effect(s) E A of Failure C Verification or E P Actions Responsibl Taken E C E P
Modes of Failure V S C Current Control T N e& V C T N
S Timeframe

Circula Aligns Misalign  Marginal or 1 C Offset alignment 8  Leadframe is 1 80

r bottom- leadframes no solder 0 stud wrt X & Y designed with
Leadfr frame and after contact to coordinates of nine pairs
ame topframe welding topframe square index alignment studs
Alignm assembly (complete  Electrical holes. at alternating
ent prior to failure) fall-outs locations on
Studs welding (open/ opposite rails
shorts) [Ref: (CB)36-0001
 Mold Rev L ]
package  Alignment stud
offset center dimension
 Leads tolerance wrt
pinching @ index hole: 1 mil
mold  IQC dimensional
 Leadform sampling
irregularitie inspection prior
s to use
Leads Connects Broken or  Mechanical 6 S  Leadwidth too 3  Designed lead 3 54
device missing reject narrow to resist width = 14 mils
(attached leads  Low yield various EOL  Follow
on DAP) (complete processing conventional SO-
to failure) stresses 8 design
external  Material too  Follow JEDEC
world brittle to specifica-tion for
withstand lead SOIC-8 package
stressing  IQC dimensional
sampling
inspection prior
to use
Cracking of  Mechanical 6 S  Material too 3  Specify Alloy194 3 54
leads reject brittle to Half-hard material
 Solderabilit withstand lead in drawing
y failure stressing  Follow
 Material conventional SO-
elongation too 8 leadform
short relative to outline
projected  Follow JEDEC
leadforming specifica-tion for
deformations SOIC-8 package

419671441.doc Page 19 of 21 29 April, 1999

 Document # : DFSILF-A FSC FMEA
Failure Mode and Effect Analysis

C Area/
Part/ Potential Potential S L Potential Cause O Design D R Recommended Individual Actions S O D R
Process Function Failure Effect(s) E A of Failure C Verification or E P Actions Responsibl Taken E C E P
Modes of Failure V S C Current Control T N e& V C T N
S Timeframe

Leadfr Enhances Broken or  Mechanical 6 S  Lead thickness 3  Designed 3 54

ame lead missing reject too thin to resist leadframe
Thickn strength leads  Low yield various EOL thickness = 8
ess (complete processing mils
failure) stresses  Follow
 Material too conventional SO-
brittle to 8 design
withstand lead  Follow JEDEC
stressing specification for
SOIC-8 package
 IQC dimensional
sampling
inspection prior
to use
Leadfr Ensures Mold  Visual 6 S Unbalanced 3  Specify leadframe 2 36
ame good flashing of reject leadframe thickness
Thickn clamping lower leads  Solderabilit thickness within tolerance of  0.3
ess at mold (complete y problem one strip mils in the
(contin failure)  High mold drawing
ued)
compound  IQC dimensional
usage rate sampling
inspection prior
to use
DAP Promotes Die back RDSon 8 S  Porous Ag 7  Designed Ag 1 56
Plating wetting voids failures plating allowing plating thickness
(for and (partial Cu to migrate = 90u” min. [Ref:
soft spread of failure) towards Ag layer (CB)36-0001 Rev.
solder D/A M]
D/A
material  Plating thickness
applicat
ion) on DAP measurements
included in IQC
sampling
inspection prior
to use

419671441.doc Page 20 of 21 29 April, 1999

Document # : DFSILF-A FSC FMEA
Failure Mode and Effect Analysis

C Area/
Part/ Potential Potential S L Potential Cause O Design D R Recommended Individual Actions S O D R
Process Function Failure Effect(s) E A of Failure C Verification or E P Actions Responsibl Taken E C E P
Modes of Failure V S C Current Control T N e& V C T N
S Timeframe

Prevents Scattered  RDSon 8 C  Porous Ag 5  Added Ni flash 3 12  Improve Ag  Leadfram

direct Cu-Sn IMC failures plating allowing (flood plating) 0 finish e vendor
intermetal formations  Latent Cu to migrate underneath Ag compactness. –PBE
lic (IMC) on die back TMCL towards Ag layer layer to prevent WW50
formation (partial failures  Too thin Ag layer Cu migration FY99-
of Cu & failure) such that Ag [Ref: (CB)36-0001 WW05-
Sn completely Rev. M]  Specify type FY00
dissolves into  Plating thickness of Ag finish
solder during measurements on leadframe  C.
D/A, thus included in IQC drawing. Quiñones
rendering Cu sampling PD01
readily for IMC inspection prior FY00
formation to use

419671441.doc Page 21 of 21 29 April, 1999