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COMPUTER EVOLUTION

AND PERFORMANCE
Stallings, W. Computer Computer Architecture and Organization
Organization and
Architecture, 9th Edition
Informatics – 2018-2019

History of Computers
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First Generation: Vacuum Tubes


ENIAC
Electronic Numerical Integrator And Computer

Designed and constructed at the University of Pennsylvania


Started in 1943 – completed in 1946
By John Mauchly and John Eckert
World’s first general purpose electronic digital computer
Army’s Ballistics Research Laboratory (BRL) needed a way to supply trajectory tables
for new weapons accurately and within a reasonable time frame
Was not finished in time to be used in the war effort
Its first task was to perform a series of calculations that were used to help
determine the feasibility of the hydrogen bomb
Continued to operate under BRL management until 1955 when it was
disassembled

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ENIAC
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Major
Memory drawback
consisted
was the need
Occupied of 20
Contained Capable
1500 Decimal accumulators,
more of for manual
Weighed square 140 kW rather each
than 5000 programming
30 feet Power than capable
18,000 additions of by setting
tons of consumption binary
vacuum per switches
floor machine holding
tubes second and
space a
10 digit plugging/
number unplugging
cables

John von Neumann


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EDVAC
First publication of the idea was in 1945
Stored program concept
Attributed to ENIAC designers, most notably the
mathematician John von Neumann
Program represented in a form suitable for storing in
memory alongside the data
IAS computer
Princeton Institute for Advanced Studies
Prototype of all subsequent general-purpose computers
Completed in 1952

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Structure of von Neumann Machine
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IAS Memory Formats


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The memory of the IAS Both data and instructions are


consists of 1000 storage stored there
locations (called words) of Numbers are represented in
40 bits each binary form and each
instruction is a binary code

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Structure
of
IAS
Computer

Registers
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Memory buffer register • Contains a word to be stored in memory or sent to the I/O unit
(MBR) • Or is used to receive a word from memory or from the I/O unit

Memory address register • Specifies the address in memory of the word to be written from
(MAR) or read into the MBR

Instruction register (IR) • Contains the 8-bit opcode instruction being executed

Instruction buffer register • Employed to temporarily hold the right-hand instruction from a
(IBR) word in memory

• Contains the address of the next instruction pair to be fetched


Program counter (PC) from memory

Accumulator (AC) and • Employed to temporarily hold operands and results of ALU
multiplier quotient (MQ) operations

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IAS
Operations

Commercial Computers
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UNIVAC
1947 – Eckert and Mauchly formed the Eckert-Mauchly
Computer Corporation to manufacture computers
commercially
UNIVAC I (Universal Automatic Computer)
First successful commercial computer
Was intended for both scientific and commercial applications
Commissioned by the US Bureau of Census for 1950 calculations
The Eckert-Mauchly Computer Corporation became part of
the UNIVAC division of the Sperry-Rand Corporation
UNIVAC II – delivered in the late 1950’s
Had greater memory capacity and higher performance
Backward compatible

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History of Computers
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Second Generation: Transistors


Smaller
Cheaper
Dissipates less heat than a vacuum tube
Is a solid state device made from silicon
Was invented at Bell Labs in 1947
It was not until the late 1950’s that fully transistorized
computers were commercially available

Computer Generations
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Second Generation Computers
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Introduced:
Appearance of the Digital
More complex arithmetic and Equipment Corporation (DEC)
logic units and control units
in 1957
The use of high-level
programming languages PDP-1 was DEC’s first computer
Provision of system software This began the mini-computer
which provided the ability to: phenomenon that would
load programs become so prominent in the
move data to peripherals and third generation
libraries
perform common
computations

Members of the IBM 700/7000 Series


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Table 2.3 Example Members of the IBM 700/7000 Series

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IBM
7094
Configuration

History of Computers
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Third Generation: Integrated Circuits


1958 – the invention of the integrated circuit
Discrete component
Single, self-contained transistor
Manufactured separately, packaged in their own
containers, and soldered or wired together onto
masonite-like circuit boards
Manufacturing process was expensive and cumbersome
The two most important members of the third
generation were the IBM System/360 and the DEC
PDP-8

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Microelectronics
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Integrated Circuits
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Data storage – provided by A computer consists of gates, memory


memory cells cells, and interconnections among these
elements
Data processing – provided by
gates The gates and memory cells are
constructed of simple digital electronic
Data movement – the paths components
among components are used to
move data from memory to Exploits the fact that such components as
memory and from memory transistors, resistors, and conductors can
through gates to memory be fabricated from a semiconductor
Control – the paths among such as silicon
components can carry control Many transistors can be produced at the
signals same time on a single wafer of silicon
Transistors can be connected with a
processor metallization to form circuits

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Wafer, Chip, and Gate Relationship
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Chip Growth
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Moore’s Law
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1965; Gordon Moore – co-founder of Intel

Observed number of transistors that could be


put on a single chip was doubling every year

Consequences of Moore’s law:


The pace slowed to
a doubling every
18 months in the The cost of Computer
1970’s but has computer The electrical becomes
sustained that rate logic and path length is smaller and is Reduction in
shortened, more power and Fewer
ever since memory interchip
circuitry has increasing convenient to cooling
operating use in a variety requirements connections
fallen at a speed of
dramatic rate environments

Characteristics of the System/360


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Family

Table 2.4 Characteristics of the System/360 Family

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Evolution of the PDP-8
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Table 2.5 Evolution of the PDP-8

DEC - PDP-8 Bus Structure


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Later Generations: Microprocessors
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The density of elements on processor chips continued to rise


More and more elements were placed on each chip so that
fewer and fewer chips were needed to construct a single
computer processor
1971 Intel developed 4004
First chip to contain all of the components of a CPU on a single
chip
Birth of microprocessor
1972 Intel developed 8008
First 8-bit microprocessor
1974 Intel developed 8080
First general purpose microprocessor
Faster, has a richer instruction set, has a large addressing
capability

Evolution of Intel Microprocessors


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a. 1970s Processors

b. 1980s Processors

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Evolution of Intel Microprocessors
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c. 1990s Processors

d. Recent Processors

Microprocessor Speed
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Techniques built into contemporary processors include:


• Processor moves data or instructions into a
Pipelining conceptual pipe with all stages of the pipe
processing simultaneously

Branch • Processor looks ahead in the instruction code


fetched from memory and predicts which

prediction branches, or groups of instructions, are likely to


be processed next

Data flow • Processor analyzes which instructions are


dependent on each other’s results, or data, to
analysis create an optimized schedule of instructions

• Using branch prediction and data flow analysis,


Speculative some processors speculatively execute
instructions ahead of their actual appearance in

execution the program execution, holding the results in


temporary locations, keeping execution engines
as busy as possible

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Performance
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Balance
Adjust the organization and Increase the number
architecture to compensate of bits that are
retrieved at one time
for the mismatch among the by making DRAMs
“wider” rather than
capabilities of the various “deeper” and by
using wide bus data
components paths

Architectural examples Reduce the frequency


include: of memory access by
incorporating
increasingly complex
and efficient cache
structures between
the processor and
main memory

Increase the
Change the DRAM interconnect
interface to make it bandwidth between
more efficient by processors and
including a cache or memory by using
other buffering higher speed buses
scheme on the DRAM and a hierarchy of
chip buses to buffer and
structure data flow

Typical I/O Device Data Rates


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Improvements in Chip Organization
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and Architecture
Increase hardware speed of processor
Fundamentally due to shrinking logic gate size
More gates, packed more tightly, increasing clock rate
Propagation time for signals reduced
Increase size and speed of caches
Dedicating part of processor chip
Cache access times drop significantly
Change processor organization and architecture
Increase effective speed of instruction execution
Parallelism

Problems with Clock Speed and Login


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Density
Power
Power density increases with density of logic and clock speed
Dissipating heat
RC delay
Speed at which electrons flow limited by resistance and capacitance
of metal wires connecting them
Delay increases as RC product increases
Wire interconnects thinner, increasing resistance
Wires closer together, increasing capacitance
Memory latency
Memory speeds lag processor speeds

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Processor Trends
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Multicore
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The use of multiple processors


on the same chip provides the
potential to increase
performance without increasing
the clock rate

Strategy is to use two simpler


processors on the chip rather
than one more complex
processor

With two processors larger


caches are justified

As caches became larger it


made performance sense to
create two and then three
levels of cache on a chip

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Many Integrated Core (MIC)
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Graphics Processing Unit (GPU)
MIC GPU
Leap in performance as well Core designed to perform
as the challenges in parallel operations on graphics
developing software to exploit data
such a large number of cores Traditionally found on a plug-in
The multicore and MIC graphics card, it is used to
strategy involves a encode and render 2D and 3D
homogeneous collection of graphics as well as process
general purpose processors on video
a single chip Used as vector processors for a
variety of applications that
require repetitive computations

8080
First general purpose microprocessor
8-bit machine with an 8-bit data path to
memory
36 Used in the first personal computer (Altair)
8086
16-bit machine
Used an instruction cache, or queue
First appearance of the x86 architecture

x86 Evolution 8088


used in IBM’s first personal computer

80286
Enabled addressing a 16-MByte memory instead
of just 1 MByte

80386
Intel’s first 32-bit machine
First Intel processor to support multitasking

80486
More sophisticated cache technology and
instruction pipelining
Built-in math coprocessor

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x86 Evolution - Pentium
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Pentium Pentium Pro Pentium II Pentium III Pentium 4

• Superscalar • Increased • MMX • Additional • Includes


• Multiple superscalar technology floating-point additional
instructions organization • Designed instructions to floating-point
executed in • Aggressive specifically to support 3D and other
parallel register process video, graphics enhancements
renaming audio, and software for multimedia
• Branch graphics data
prediction
• Data flow
analysis
• Speculative
execution

x86 Evolution (continued)


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Core
Instruction set
architecture is First Intel x86 microprocessor
backward compatible with a dual core, referring to
with earlier versions
the implementation of two
processors on a single chip
X86 architecture Core 2
continues to
dominate the Extends the architecture to 64
processor market bits
outside of
embedded Recent Core offerings have up
systems
to 10 processors per chip

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Embedded Systems
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General definition
“A combination of computer hardware and software,
and perhaps additional mechanical or other parts,
designed to perform a dedicated function. In many
cases, embedded systems are part of a larger system
or product, as in the case of an antilock braking
system in a car.”

Examples of Embedded Systems


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and Their Markets

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Embedded Systems
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Requirements and Constraints


Small to large systems,
implying different cost
constraints and different
needs for optimization and
reuse

Relaxed to very strict


Different models of requirements and
computation ranging from combinations of different
discrete event systems to quality requirements with
hybrid systems respect to safety, reliability,
real-time and flexibility

Different application
characteristics resulting in
static versus dynamic loads,
slow to fast speed, compute Short to long life times
versus interface intensive
tasks, and/or combinations
thereof

Different environmental
conditions in terms of
radiation, vibrations, and
humidity

Possible Organization of an
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Embedded System

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Acorn RISC Machine (ARM)
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Family of RISC-based Widely used in PDAs and


microprocessors and other handheld devices
microcontrollers
Chips are the processors in
Designs microprocessor and iPod and iPhone devices
multicore architectures and
licenses them to Most widely used
manufacturers embedded processor
Chips are high-speed architecture
processors that are known Most widely used processor
for their small die size and architecture of any kind
low power requirements

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E
v
o
A l
R u
M t
i
o
DSP = digital signal processor SoC = system on a chip n

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ARM Design Categories
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ARM processors are designed to meet the needs of


three system categories:
Secure applications
Smart cards, SIM cards,
and payment terminals Application platforms
Devices running open
Embedded real-time systems operating systems
Systems for storage, including Linux, Palm
automotive body and power- OS, Symbian OS, and
train, industrial, and
networking applications Windows CE in
wireless, consumer
entertainment and
digital imaging
applications

System Clock
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Performance Factors and System
Attributes
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Desirable Benchmark Characteristics


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Written in a high-level language, making it portable


across different machines

Representative of a particular kind of programming


style, such as system programming, numerical
programming, or commercial programming

Can be measured easily

Has wide distribution

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