Assignment- Sequential Circuits and logic Design, Logic families

[EDES232C: Digital Electronics]

Q1. Design a 3-bit binary up-down counter using J-K flip-flop. Also draw the required waveforms.
What is Johnson counter, give an application of it?

Q2. Explain lock out condition? Design a synchronous counter for counting the sequence 4, 6, 7, 3,
1........... . Avoid lock out condition. Use J K flip flop.

Q3. (i) Convert the T flip flop in D flip-flop?

(ii) Draw the waveform for +ve edge triggered, -ve edge triggered, +ve level triggered, -ve level
triggered S-R flip-flop and Master-slave flip flop for data input 0010101

Q4. Simplify the following function using Quine McCluskey method. Also implement with logic gates.

F( A, B, C, D) = Σm (0, 2, 3, 4, 5, 6, 7, 8, 10, 11, 15)

Q5 An asynchronous circuit has two internal states and output. The excitation and output functions
describing the circuits are as follows:

Y1 = x1x2 + x2y1

Y2 = x1y2 + x2

Output function

Z = x1 + y2

(i) Derive the logic diagram of the circuit.

(ii) Derive the transition table and output map.
(iii) Obtain the flow table of the circuit.

Q.6- (i) what is shift register counter? Explain RING and JOHNSON counter.

(ii) What is shift resister? Classify on the basis of mode of input and output?

Q.7- (i) What is universal shift register? Explain.

(ii) Design a BCD ripple counter using J-K flip-flop and draw the corresponding waveform of
output Q.

Q.8 -(i) show how the PLA circuit can be programmed to implement 3 bit binary to gray code
converter?

(ii) What is memory? Explain RAM and ROM? Also explain its types. Realize the following
function using PROM of size 8×3 :

F1 ( A, B, C) = Σm (0, 4, 7)
 F2 ( A, B, C) = Σm (1, 3, 6 )

F3 ( A, B, C) = Σm (1, 2, 4, 6 )

Q.9. Explain circuit diagram RTL, DTL, TTL, ECL and CMOS? Also compare all logic families in terms of
fan in, fan out, noise margin, power dissipation, propagation delay.

Q.10 Design mod 6 gray code synchronous counter using JK flip- flop?

Q.11. Explain with truth table, logic diagram, characteristics table , characteristics equation and
excitation table, the working of SR flip flop? Convert SR flip flop in T flip flop.

Q.12. Design a sequential circuit with two JK flip flops A and B and two inputs E and x. If E=0 circuit
remains in the same state regardless the value of x. When E=1 and x=1, the circuit goes through the
state transitions from 00 to 01 to 10 to 11 back to 00 and repeats. When E=1 and x=0, the circuit
goes through the state transitions from 00 to 11 to 10 to 01 back to 00 and repeats.

Q.13 An asynchronous circuit has following the excitation and output functions describing the circuits
are as follows:

Y = x1x2 + (x1 + x2) y

Z= y

(i) Derive the logic diagram of the circuit.

(ii) Derive the transition table and output map.
(iii) Obtain the flow table of the circuit.

Q.14 (i) What is universal shift register? Explain.

(ii) Design a sequence generator using JK flip flop to generate the sequence 1101011 .

Q.15. (i) What is race around condition? How to remove it?

(ii) What is hazard? Explain all types? How to eliminate it.

(iii) Design excess 3 to BCD code converter.

Q.16. (i) Design 4 bit parallel adder/subtractor?

(ii) Design divided by 5 ripple counter using T flip flop?

(iii) what is CMOS? Design CMOS NOR gate .

Q.17. (i) Show how the PLA circuit can be programmed to implement full subtractor

(ii) Obtain the reduced state table and reduced state diagram:

Q.18. Design a counter with the following repeated sequence: 0, 1, 3, 7, 6, 4 . Use T flip flop to
design.

Q.19. (i) show how the PAL circuit can be programmed to implement 3 bit gray to binary converter?

(ii) Compare a) RAM and ROM. b) Latch and flip-flop

Q20. Explain the read and write operations in RAM unit. Also draw the timing waveforms of the
circuit.

Q.21. Design a Moore and a Mealy machine

(i) to detect the sequence 11011, allow overlapping.

(ii) to detect the patterns 110 and 1011, no overlapping is allowed.