Samsung R518 - BONN-E - BONN-C BA41-01060 - REV 1.0 PDF

4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D Sheet 1. Cover D
Sheet 2-7. Diagram (Block/Power) & Annotations
BONN-E/BONN-C Sheet 8.
Sheet 9
Sheet 10-12.
Clock Generator -CK505
Thermal Sensor & FAN
Penryn-6M CPU
Sheet 13-17. Cantiga-MCH
Sheet 18. DDR2 SODIMM A
CPU :Intel Penryn Sheet 19. DDR2 SODIMM B
Sheet 20-24. ICH9-M
Chip Set :PM45 & ICH9M Sheet 25. SPI ROM & Debug Connector
Sheet 26-31. GFx_External_M9X
Graphic : M96/M92/gDDR3 1g bit Sheet 32-35. Graphics_Memory_gDDR3 1g bit
Sheet 36-38. Graphic Interface
C
Remarks : Montevina Platform Sheet 39-43. High Definition Audio (ALC272 GR) C
Sheet 44. LAN_Marvell_88E8057
Sheet 45. Express_Card
Model Name : BONN-E/BONN-C Sheet 46. MultiCard_AU6336 (3 in 1)
Sheet 47. PCIE_Minicard_Slot
PBA Name : MAIN Sheet 48. SATA I/F CONN
PCB Code : GCE : BA41-01060A Sheet 49. MICOM_Renesas2110
Sheet 50. Micom Glue Logic
NAN : BA41-01061A Sheet 51. LED_Switch
Sheet 52. USB Port
HAN : BA41-01062A Sheet 53. USB I/F Devices
Sheet 54. HDA_Modem
Sheet 55. PWR_MV_Charger
B
Dev. Step : MP Sheet 56. PWR_MV_3V_5V B
Revision : 1.0 Sheet 57. PWR_MV_Memory

Sheet 58. PWR_MV_Cantiga
T.R. Date : 2009.04.11 Sheet 59. PWR_CPU_MV_ISL6266
Sheet 60-61. PWR_GFX_MV_Ext
Sheet 62. PWR_MV_Switched
Sheet 63. PWR_MV_DisCharger
Design CHECK APPROVAL Sheet 64. 2 USB Port & Power S/W SUB B’D
Sheet 65. SATA ODD SUB B’D
Sheet 66. EMC Capacitor & Mount
Sheet 67. Test Point
A A
DRAW DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP MAIN
APPROVAL REV PART NO.
COVER
Owner : SEC Mobile R & D Signature : X BL Lee REV 1.0 BA41-01060A
MODULE CODE LAST EDIT
April 11, 2009 10:05:58 AM PAGE 1 OF 67

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D:/Users/mobile39/mentor/BONN-E/BONN-E_mp10
4 3 2 1
SAMSUNG PROPRIETARY
FAN CPU Smart
Charging
Clocking Mobile Processor DC/DC Battery DC/DC
PG 8 Circuit Module
CK-505 IMVP-6
D
Penryn-6M D
PG 12 CPU
Thermistor FSB 1067
(TBD) 478pin ON BOARD
PG 8
PG 9-11 L2 Cache : 6/3MB
Termination VCCP / DC-DC
FSB
PG 18,19
800/1067 MT/S PG 48
HDMI HDMI
Channel A (Standard) DDR II 667/800 DDR II PG 18
PG 28,29
GMCH-M SODIMM 0
g
Dual channel DDR II Power
LCD LCD
Cantiga-PM Channel B (Reverse)
DDR II PG 19 PG 47
DDR II 667/800 SODIMM 1
PG 26 PM45
n
CRT
1329 FCBGA
l
PG 27 CRT
PG 13-17
C
PG 42, 52 USB 0,2,6
ANT
s u t i a
Direct Media Interface
USB 0,2,6
x4, 1.5V
CLINK
PCIE x1 Lane 4 88E8057

PG 34
RJ45
PG 34
C
m
USB 5 52P
n
PG 43 Bluetooth PCIE x1 Lane 1 ANT
OPTION
ICH9-M USB 1 PG 37 Mini Card 1
USB 8
a
(WLAN)
e
PG 43 Camera
676 BGA
PCIE x1 Lane 2
52P
High Definition Audio HD Audio Mini Card 2
S fid
PG 20 - 24 PG 37 (HSDPA)
PG 31
Aud. Audio HD Audio
AMP PCIE x1 Lane 3
ALC272 12P
USB 7
Express Card
MDC HD Audio
PG 30 RJ11 PG 35
n
Modem
PG 33 2pin cable type
B PG 44
B
USB 4
o
SPI 3 IN 1 SD(SDHC) PG 36
HP PG 25 SPI ROM AU6366-MWF
MMC PG 36
MIC-IN
LPC
PG 36
C
SATA 0
2P 2P PG 38 SATA HDD
PG 31 12P
SATA 1
PG 53 SATA ODD PG 40
Touch
Sub board MICOM PAD
Touchpad
LED
3.3V LPC, 33MHz
SPKR R
PG 38 H8S-2110B
PG 40
TMKBC (TBD) KBD
PG 39 PG 40
SPKR L
80 Port
A LED A
PG 25 PG 41 DRAW DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP MAIN
BL Lee REV 1.0 BLOCK DIAGRAM BA41-01060A

undefined April 11, 2009 10:05:58 AM PAGE 2 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
EXCEPT AS AUTHORIZED BY SAMSUNG. BOARD INFORMATION
D SCHEMATIC ANNOTATIONS AND BOARD INFORMATION D
PCI Devices
Crystal / Oscillator
Devices IDSEL# REQ/GNT# Interrupts
TYPE FREQUENCY DEVICE USAGE
Cardbus AD25 3 A,B,C
Crystal 32.768KHz ICH8-M Real Time Clock
Crystal 10MHz MICOM HD64F2169/2160
Crystal 14.318MHz CLOCK-Generator CK-505
g
USB AD29(internal) - USB2.0 #0 (USB0) : A
USB2.0 #1 (USB1) : D Crystal 25MHz LAN Intel LAN
USB2.0 #2 (USB4) : C
USB2.0 #3 (USB5) : E
USB2.0 #4 (EHCI) : H
n
Hub to PCI AD30(internal) - -
LPC bridge/IDE/AC97/SMBUS AD31(internal) - B
l
Internal MAC AD24(internal) - E
u
AC Link - - B
GLAN - - F
LCD Pannel Detect (TBD)
s i a
C Devices Resolution PANNEL_DETECT_0 C
Voltage Rails
VDC
VCC_CORE
Primary DC system power supply (7 to 21V)
Core Voltage for CPU
m n t 2
I C / SMB Address
a e
GFX_CORE Core Voltage for GPU Devices Address Hex Bus
P1.05V (VCCP) VTT for CPU, Crestline & ICH8-M
P3.3V_MICOM 3.3V always power rail (for Micom)
ICH8-m Master - SMBUS Master
P1.5V 1.5V switched power rail (off in S3-S5)
P1.8V 1.8V switched power rail (off in S3-S5) CPU Thermal Sensor 0111 101x 7Ah Thermal Sensor
S fid
SODIMM0 1010 000x A0h -
P1.8V_AUX 1.8V power rail for DDR (off in S4-S5) SODIMM1 1010 010x A4h -
P0.9V 0.9V power rail for DDR (off in S3-S5)
Thermal Sensor on SODIMM0 0011 000x 30h -
P3.3V 3.3V switched power rail (off in S3-S5) Thermal Sensor on SODIMM1 0011 010x 34h -
P3.3V_AUX 3.3V switched on power rail (off in S4-S5)
P5.0V 5.0V switched power rail (off in S3-S5) CK-505M (Clock Generator) 1101 001x D2h Clock, Unused Clock Output Disable
P5.0V_AUX 5.0V switched on power rail (off in S4-S5)
P5.0V_ALW 5.0V always power rail
o n B
USB PORT Assign
PORT #
0
1
2
3
4
5
6
7
8
9
ASSIGNED TO
SYSTEM PORT 0
SYSTEM PORT 1
SYSTEM PORT 2
NC
NC
Bluetooth
Mini PCI Express 2
Camera
NC
NC
PCI Express Assign
PORT #
0
1
2
3
4
5
ASSIGNED TO
NC
LOM
C
Mini Card 1 (WLAN)
NC
Mini Card 2 (ROBSON or DVB-T)

NC
REVISION HISTORY
See rev notes for more information.

A A
DRAW DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP MAIN
BL Lee REV 1.0 BOARD INFO BA41-01060A


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
POWER DIAGRAM
KBC3_SUSPWR KBC3_PWRON KBC3_VRON
D D
(CHP3_S4_STATE*) (CHP3_SLPS3*) P1.1V_PWRGD
AC Adapter PENRYN
P1.05V VPU_CORE PENRYN
Cantiga
ICH9-M
Battery DC VDC
g
ICH9-M
PEG
P1.8V_AUX SODIMM (DDR II) P1.8V GDDR-3 for PEG
n
Cantiga
ESATA-REPEATER
l
DDR II-Termination DDR II-Termination
P0.9V
u
P0.9V
s i a
C ICH9-M HDD
C
CRT THERMAL SENSOR
t
P3.3V_MICOM ICH P5.0V MICOM HDMI
P5V_AUX ODD AUDIO
TOUCHPAD CAMERA
MICOM
P5.0V_ALW
a m USB
e n P1.5V
PENRYN
CANTIGA
ICH9-M
CLOCK
S fid
EXPRESS CARD
HSPA
THERMAL SENSOR
P12.0V_ALW P3.3V_AUX ICH8-M
LAN EGFX_CORE PEG
EXPRESS
MDC
n
CLOCK MCH 2IN1 LIDSWITCH
MEMORY ICH EXPRESS BLUETOOTH
B P3.3V SPI PEG WLAN LEDS B
LCD AUDIO HSPA
o
LOM
P1.2V_LAN
Power On/Off Table by S-state
State
Rail
+V*A(LWS)
+V*LAN
S0
ON
S3
ON
S4
ON
S5
ON
C
S5-S4
P1.8V_LAN
P2.5V_LAN
LAN
LAN
S3 S0
A +1.8V_AUX A
ON ON
+0.9V
DRAW DATE TITLE
+V*AUX ON ON
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
+V ON MK Kim MP MAIN
+V* (CORE) ON BL Lee REV 1.0 POWER DIAGRAM BA41-01060A


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
POWER RAILS ANALYSIS

220V
Rev. 0.6 (060920)
D D
5.0V_AUX ( TBD A )
Adapter Battery
3.3V_AUX ( TBD A )
MICOM 3V ( TBD A )
1.8V ( TBD A )
g
1.05V
0.1 A (TBD) ITP
CPU CORE MICOM 3V

CPU CORE ( TBD A )
1.05V (VCCP)
41 A (TBD) Penryn-6M 3.3V Thermal
3.3V
0.08 A (TBD) KBC
n
1.05V ( TBD A ) 4.5 A (TBD) 0.75 A (TBD) Sensor 0.08 A (TBD)
1.5V ( 35 W )
1.5V ( TBD A ) 0.13 A (TBD)
l
1.25V ( TBD A )
3.3V ( TBD A ) MICOM 3V
PWR LED
u
0.1 A (TBD)
5.0V ( TBD A ) 1.05V (MCH CORE)
1.8V_AUX ( TBD A ) 7.7 A (TBD)
a
1.05V (VCCP)
0.9V( TBD A ) 4.48 A (TBD) Cantiga
1.5V 1.8V
s i
C 0.125 A (TBD) 3.3V C
1.25V GMCH 0.25 A (TBD) CLOCK 3.3V
VGA CORE (TBD A)
2.43A (TBD)
VDC INV ( TBD A )
3.3V
0.33 A (TBD)
t
PEX IO (TBD A)
1.8V_AUX 3.79 A (TBD) (8 - 8.5 W )

RTC_Battery
3.3V KeyBoard
0.2 A (TBD) 3.3V_AUX
LAN
m
0.6 A (TBD)
n
1.05V
1.13 A (TBD)
1.5V
3.3V 2.4A (TBD) ICH9-M 3.3V
0.01 A (TBD) KBD LED
a
0.374 A (TBD) 3.3V_AUX
e
3.3V_AUX 0.1 A (TBD) SD Card
0.209 A (TBD)
5V
5V_AUX 0.001 A (TBD)
RTC_Battery
0.001 A (TBD) ( ~ 2.0 W ) 3.3V 0.015 A (TBD) SPI 3.3V
0.006 A (TBD)
S fid
5V
1.0V-1.1V (EGFX CORE) 3.3V

17.75 A (TBD) 5V 0.06 A (TBD) HD Audio 3.3V
0.07 A (TBD) 1.5 A (TBD)
1.8V 3.3V_AUX
6.53 A (TBD) PEG 1.5V
0.5 A (TBD) Mini Card X 2
0.75A (TBD)
1.2V (PEX IO)
1.75 A (TBD) 5V
1.5 A (TBD) ODD SATA
n
3.3V
0.67 A (TBD)
3.3V_AUX
B
1.8V_AUX
0.5 A (TBD) MDC B
3.1 A (TBD) DDR-2 5V
o
0.9V 1 A (TBD) (Dual slots) 0.22 A (TBD) SATA HDD
( ~ 5.0 W )
1.8V gDDR3 5V FAN
4 A (TBD) 0.16 A (TBD)
P3.3V_AUX
P1.2V_LAN
P1.8V/2.5V_LAN
0.08 A (TBD)
0.29 A (TBD)
0.15 A (TBD)
LAN (88E8055) C
3.3V (LCD 3V)
19V (VDC INV)
0.67 A (TBD)
0.5 A (TBD)
LCD 5V
5V
5V
1.5 A (TBD)
2 A (TBD)
0.2 A (TBD)
Audio AMP
USB (x 3)
Touch Pad
A A
DRAW DATE TITLE
Value by Datasheet/Application notes (Value by measurement) CHECK

MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP MAIN
BL Lee REV 1.0 POWER RAILS BA41-01060A


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL Host Boot / ME Off
SAMSUNG ELECTRONICS CO’S PROPERTY. (SLPS4* = S4_STATE*) > (SLPM* = SLPS3*)
RTC PRTC_BAT
1 POWER SEQUENCE
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS Rev. 0.7
M-1) KBC3_DDR_PWRON (TBD) = 8) KBC3_SUSPWR Battery CHP3_RTCRST#
6) P3.3V_AUX
M-2) KBC3_ME_PWRON = 15) KBC3_PWRON
Host / ME Boot
(SLPS4* = S4_STATE*) > SLPM* > SLPS3*
15) VRM3_CPU_PWRGD
D
PRTC PRTC
16 15 D
Host S5 / ME Boot
POWER 8
(SLPS4* = SLPM*) > S4_STATE* > SLPS3*
10-1) ICH_CORE (P1.05V) 16) CLK3_PWRGD CK-505 16-1) Clock Running
LAN100_SLP
INTVRMEN
Sheet 8
S/W 8) CHP3_SLPS5#/4#/3#
7 7) KBC3_RSMRST# 7) P1.05V_AUX
7) P1.5V_AUX 12)GCORE3_PWRGD (PM-model) CPU
4 VRM
4) POWER_SW*
KBC 15)VRM3_CPU_PWRGD 13) KBC3_VRON (Back-up)
g
VRMPWRGD
DC/DC B’d
17) KBC3_PWRGD
17 17) KBC3_PWRGD 18 (Test Option)
PWROK
n
110ms Delay 18) CPU1_PWRGDCPU 14) VCC_CORE
15)VRM3_CPU_PWRGD
CPU
l
19) PLT3_RST*
5) KBC3_SUSPWR ICH8-M 19) PCI3_RST* 19 14
u
5 9) KBC3_PWRON 17) KBC3_PWRGD 10-1) P1.5V
a
9 CL_PWROK Sheet 22-25
13) KBC3_VRON 20
s i
C 10-1) P1.05V C
Sheet 10-12
t
3 13 10) P5.0V DDR2 POWER 6) P1.8V_AUX 20) CPU1_CPURST*
8) KBC3_SUSPWR
P3.3V_MICOM 6
9) KBC3_PWRON
6) MEM1_VREF 17) KBC3_PWRGD

Adapter
2) VDC SC486
m
PWROK
n
AC_DC / Battery
5) KBC3_SUSPWR 17) KBC3_PWRGD
10) P1.5V 10-2) 0.9V CL_PWROK 19) PLT3_RST*
ICSL6256 SC486
a
Sheet 50
e
Battery
10 GMCH
2) VDC
S fid
AP4435 10) P5.0V 2) VDC
10) P1.1 6) P1.8V_AUX
2 10) P1.05V (IGFX_CORE) 10-1) P3.3V

9-1 9) KBC3_PWRON ISL6227 PM-model only
Sheet 15-19
10) P1.05V
2-1) P12.0V_ALW 9-1) KBC3_PWRON_INV#
11-1) GFX_CORE
n
10-1) P3.3V
B
3 P3.3V_AUX & P5V_AUX
11) VCCP3_PWRGD
PCIe B
TPS51120 SC471 12)GCORE_PWRGD
10-1) P1.8V
o
P5.0V_ALW 6) P5.0V_AUX Devices
9 6) P3.3V_AUX
10-1) P3.3V
11 12
10) P1.5V
AP6680A
9) KBC3_PWRON 19
6) P3.3V_AUX
C
Sheet 40
P3.3V_MICOM
10-1) P1.2V
6 6) P1.8V_AUX
AP6680A 11-1) P1.8V
11) VCCP3_PWRGD 2) VDC
Sheet 40 6) P1.8V_AUX PEG
10-2) P0.9V
DDR3 10-1) P3.3V
Memory
Sheet 20-21
10-1) P3.3V
10-1) P1.8V PCI 19) PCI3_RST*

6-1) P1.2V_LAN 10) P1.5V
Devices
LOM BCP69
A A
Marvell 6-1) P1.8V/P2.5V_LAN Sheet 46
DRAW DATE TITLE
Sheet 46-47
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP MAIN
BL Lee REV 1.0 POWER SEQUENCE BA41-01060A


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
EXCEPT AS AUTHORIZED BY SAMSUNG. CLOCK DISTRIBUTION Rev. 0.1
P3.3V FS(2:0)
D 266 MHz CLK0_HOST_CPU/CPU* D

CPU BSEL
CLK3_PWRGD*
1
FSB
MUX
ITP_EN 667/800 MHz
333/400 MHz CLK1_MCLK0/0#
CPU_STP* 266 MHz CLK0_HOST_GMCH/GMCH* HPLL
Main PLL
SSC MPLL 333/400 MHz CLK1_MCLK1/1# SODIMM #0
100 MHz (SRC0) CLK1_PEG/PEG*
PCI Express Gfx
g
Cantiga 333/400 MHz
PEG CLK1_MCLK3/3#
MCH3_CLKREQ* MCH
MUX
n
100 MHz (SRC4) CLK1_MCH3GPLL/3GPLL* 333/400 MHz CLK1_MCLK4/4# SODIMM #1
PCIE PLL
l
CLK1_DREFCLK/CLK*
u
96 MHz
DPLLA
a
SS(96/100) SEL 100 MHz CLK1_DREFSSC/SSC*
PLL3
s i
C DPLLB MIN3_CLKREQ*
C
SSC MINI PCIE
t
CK-505M (w/ CLKREQ* & SSDC)
100 MHz (SRC 6) CLK1_MINIPCIE/PCIE*

CARD 1
100 MHz (SRC 6,8,9,10) DMI
m
ITM3_CLKREQ*
n
100 MHz (SRC 8) CLK1_MINI2PCIE/PCIE*
MINI PCIE
CARD 2
a e
xSLG8SP513r05)
100 MHz (SRC 3) CLK1_PCIEICH/ICH* LOM3_CLKREQ*

PCIEPLL ICH9-M 100 MHz (SRC 9) CLK1_PCIELOM/LOM* PCIE LAN
S fid
48MHz PLL 48 MHz CLK3_USB48
USBPLL (Marvell)
CHP3_SATACLKREQ* 25 MHz
MUX
EXP3_CLKREQ*
100 MHz (SRC 2) CLK1_SATA/SATA*
SATAPLL CLK1_EXPCARD# EXPRESS CARD
14.318 MHz CLK3_ICH14
n
B 33 MHz CLK3_PCLKICH 32.768 KHz B
OSC AUD3_BCLK
o
HD 24 MHz HD Audio
C
MDC3_BCLK
33 MHz 33 MHz CLK3_PCLKMICOM RTC Clock MDC
PCI_STP*
Buffer
KBC 10 MHz
32.768 KHz
17.86 MHz
SPI3_CLK
SPI
33 MHz CLK3_PCLKPORT80
PORT 80
14 MHz
A OSC A
14.318 MHz DRAW DATE TITLE
MS Yang 12/05/2008
BONN-E SAMSUNG
Page 8 CHECK DEV. STEP
ELECTRONICS
MK Kim MP MAIN
BL Lee REV 1.0 CLOCK DIAGRAM BA41-01060A


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
CK505M
D P3.3V P1.5V P3.3V D

FSA FSB FSC
HOST CLK
BSEL0 BSEL1 BSEL2
B30 B31 B28
0 0 0 266 MHz
BLM18PG181SN1 BLM18PG181SN1 BLM18PG181SN1
0 0 1 333 MHz
0 1 0 200 MHz nostuff
VDD_SRC_IO VDD_CPU_IO VDD_PLL3_IO VDD_IO VDD_REF VDD_48 VDD_PCI VDD_PLL3 VDD_SRC VDD_CPU
0 1 1 400 MHz
10000nF-X5R
10000nF-X5R
10000nF-X5R
10000nF-X5R
4700nF-Y5V
4700nF-Y5V
10V
10V
10V
10V
10V
10V
10V
10V
10V
10V
10V
10V
1 0 0 133 MHz
6.3V
6.3V
6.3V
6.3V
10V
1 0 1 100 MHz
10V
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
g
1 1 0 166 MHz
1 1 1 RSVD
C416
C424
C700
C413
C400
C394
C417
C397
C409
C430
C429
C432
C431
C401
C433
C381
C393
C404
CLK3_VDD_SRC_IO_MN CLK3_VDD_REF_MN
u n a l
P3.3V
s i
C U12 P3.3V C
10K 1%
10K 1%
SLG8SP513
t
19 4
VDD_IO VDD_REF
33 16
VDD_SRC_IO1 VDD_48
43 9
VDD_SRC_IO2 VDD_PCI
R234 33 52 23 R565
CLK3_FM48 VDD_SRC_IO3 VDD_PLL3
R235
m
33 56
R224
R230
CLK3_USB48 10K
n
VDD_CPU_IO
27 46 1%
VDD_PLL3_IO VDD_SRC
R236 2.2K nostuff 62
CPU1_BSEL0 55
VDD_CPU
CPU1_BSEL1 R216 10K 1%
NC
61
a
CPU1_BSEL2 CPU0 CLK0_HCLK0
e
CLK3_USB48_R_MN 17 60
USB_FS_A CPU0# CLK0_HCLK0#
R217 33 64
CLK3_ICH14 CLK3_ICH14_R_MN 5
FSB_TESTMODE
58
REF_FS_C_TEST_SEL CPU1_MCH
57
CLK0_HCLK1
44
CPU1_MCH# CLK0_HCLK1#
CHP3_CPUSTP#
S fid
CPUSTOP#
45 40
CHP3_PCISTP# PCISTOP# SRC11_CLKREQH#
39 ITM3_CLKREQ#
63
SRC11#_CLKREQG# LOM3_CLKREQ#
CLK3_PWRGD CLKPWRGD_PWRDN#
41
SRC10 CLK1_MINIPCIE2
CLK3_PCLKICH R228 22 5% CLK3_PCLKICH_R_MN 14
PCIF_5_ITP_EN SRC10#
42
CLK1_MINIPCIE2#
R222 22 5% CLK3_DBGLPC_R_MN 13 37
CLK3_DBGLPC PCI_4_SEL_LCDCLK# SRC9
38
CLK1_PCIELOM
12
SRC9# CLK1_PCIELOM#
PCI_3
n
54
SRC8_ITP CLK1_EXPCARD
R220 22 5% CLK3_PCLKMICOM_R_MN 11 53
CLK3_PCLKMICOM PCI_2 SRC8#_ITP# CLK1_EXPCARD#
B MCH3_CLKREQ#
R221 475 1% MCH3_CLKREQ#_R_MN 10
PCI_1_CLKREQ_B# SRC7_CLKREQF#
51
EXP3_CLKREQ#
B
50
SRC7#_CLKREQE# MIN3_CLKREQ#
o
R218 475 1% CHP3_SATACLKREQ#_R_MN 8
CHP3_SATACLKREQ# PCI_0_CLKREQ_A#
48
7
SRC6
47
CLK1_MINIPCIE
SMB3_CLK 6
SCL SRC6# CLK1_MINIPCIE#
SMB3_DATA SDA
34
CLK3_XTAL_IN_14_MN 3
SRC4
35
CLK1_MCH3GPLL
C
2
XTAL_IN SRC4# CLK1_MCH3GPLL#
XTAL_OUT
31
CLK1_PCIEICH
10K 1%
10K 1%
SRC3_CLKREQC#
0.033nF50V
0.033nF50V
0.033nF50V
18 32
59
VSS_48 SRC3#_CLKREQD# CLK1_PCIEICH#
Y1 VSS_CPU
22 28
5%
5%
5%
15
VSS_IO SRC2
29
CLK1_SATA
1
26
VSS_PCI SRC2# CLK1_SATA#
14.31818MHz VSS_PLL3
1 THERM_GND 24 CLK3_GFX_27M_R_MN R589 22
C422
C420
C418
VSS_REF LCDCLK_27M CLK3_GFX_27M

2801-004518 30 25 CLK3_GFX_27M_SS_R_MN R127 22
R223
R229
36
VSS_SRC1 LCDCLK#_27M_SS CLK3_GFX_27M_SS
C395 VSS_SRC2
C396 nostuff 49
VSS_SRC3 SRC0_DOT96
20
CLK1_PEG
0.018nF 0.018nF 21
50V 50V
SRC0#_DOT96# CLK1_PEG#
1205-003156
65
CLK REQ DEVICE SRC PORT

CLK REQ A SATA SRC2
CLK REQ B GMCH SRC4 Place 14.318MHz within
500mils of CK-505 This part is 64pin QFN package.
A CLK REQ E MINI CARD SRC6 A
CLK REQ F EXP3_CLKREQ# SRC8 IDT : 1205-003159 DRAW DATE TITLE
SL : 1205-003533
SEL_LCDCLK* Pin 20/21 Pin 24/25 CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
LOW DOT_96/DOT_96# PEG_CLK/PEG_CLK# MK Kim MP MAIN_CLOCK_CIRCUIT
HIGH SRC_0/SRC_0# 27M & 27M_SS BL Lee REV 1.0 CK_Clock_505M BA41-01060A

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D
THERMAL SENSOR & FAN CONTROL D
P5.0V P3.3V_AUX P3.3V P3.3V_AUX
g R509 Check if PU is doubled to Micom Side.
10K 1%
10K 1%
10K 1%
10K 1%
49.9
1%
n
C21
l
C506 C505 THM3_VDD_3V_MN
10000nF-X5R
100nF 100nF
6.3V
R21
R19
R30
R644
10V 10V
U1
EMC2102
a
1 22
VDD_3V SMDATA KBC3_THERM_SMDATA
24 23
s i
C 27
VDD_5V_1 SMCLK KBC3_THERM_SMCLK C
VDD_5V_2
19
ALERT# THM3_ALERT#
t
14 12
KBC3_PWRGD 16
POWER_OK SYS_SHDN# THM3_STP#
RESET#
2
DN1 CPU2_THERMDC
10 3 C119
FAN_MODE DP1 For Intel 45nm(From penryn)
m
25 0.47nF 50V
FAN5_VDD CPU2_THERMDA
n
FAN_1
26 4
28
FAN_2 DN2
5 C508 GFX3_THERMDN
FAN3_FDBACK# TACH DP2 For ATI M9x 10mil width and 10mil spacing.
2.2nF 50V
13 6 THM3_THERMDN_MN GFX3_THERMDP
a
THERMTRIP# DN3
e
THM3_SHDN_SEL_MN 7 THM3_THERMDP_MN
SHDN_SEL MODE DP3 2
R16 0 9
SHDN_SEL
CH1(INTEL MODE) P3.3V_AUX 11
TRIP_SET CLK_SEL
17 C507 MMBT3904
0 nostuff 18 2.2nF 1 Q516
CLK_IN
HIGH Z 8 50V
3
CH3(DIODE MODE)
S fid
NC_1
R26 15
NC_2 GND
20 Opposite side of CPU.
1 N/A (SHDN# NOT USED) R1 200K 21
NC_3 THRM_PAD
29
1%
THM3_TRIP_SET_MN
1209-001718
R29 93 degree C SMBUS Address 7Ah

R2 51.1K
1%
THM3_TRIP_SET_R_MN
n
R36
20K
B 1% B
Co
TRIP_SET pin voltage = (T-75)/21
3.3 * [R2/(R1+R2)] = (T-75)/21
Line Width = 20 mil

P3.3V
R106
10K
1%
J503
M503
HEAD
DIA
LENGTH
BA61-01090A
M2
HEAD
DIA
LENGTH
BA61-01090A
M1
HEAD
DIA
LENGTH
BA61-01090A
M3
HEAD
DIA
LENGTH
BA61-01090A
HDR-4P-1R-SMD
FAN5_VDD 1
2
FAN3_FDBACK# 3
To support heatsink
4
5
C111 6
MNT1
A 10000nF-X5R MNT2 A
6.3V
3711-000456
DESIGN DATE TITLE
Type:straight
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP THERMAL SENSOR
BL Lee REV 1.0 THERMAL SENSOR EMC2102 BA41-01060A

April 11, 2009 10:05:58 AM PAGE 9 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D D
P1.05V
R87
J501-1
56 J501-2
PENRYN PENRYN
1/4 2/4
g
CPU1_A#(16:3) CPU1_D#(15:0) CPU1_D#(47:32)
3 J4 H1 0 E22 Y22 32
A3# ADS# CPU1_ADS# D0# D32#
4 L5 E2 1 F24 AB24 33
A4# BNR# CPU1_BNR# D1# D33#
5 L4 G5 2 E26 V24 34
A5# BPRI# CPU1_BPRI# D2# D34#
6 K5 3 G22 V26 35
A6# D3# D35#
7 M3 F1 4 F23 V23 36
n
A7# BR0# CPU1_BREQ# D4# D36#
ADDR GROUP
8 N2 5 G25 T22 37
A8# D5# D37#
9 J1 H5 6 E25 U25 38
A9# DEFER# CPU1_DEFER# D6# D38#
l
10 N3 F21 7 E23 U23 39
A10# DRDY# CPU1_DRDY# D7# D39#
DATA GRP 0
DATA GRP 2
11 P5 E1 8 K24 Y25 40
A11# DBSY# CPU1_DBSY# D8# D40#
u
12 P2 9 G24 W22 41
A12# CPU1_IERR#_MN D9# D41#
CONTROL
13 L2 D20 10 J24 Y23 42
A13# IERR# D10# D42#
a
14 P4 B3 11 J23 W24 43
A14# INIT# CPU1_INIT# D11# D43#
15 P1 12 H22 W25 44
A15# D12# D44#
16 R1 H4 13 F26 AA23 45
s i
C M1
A16# LOCK# CPU1_LOCK#
14 K22
D13# D45#
AA24 46
C
CPU1_ADSTB0# ADSTB0# D14# D46#
C1 15 H23 AB25 47
RESET# CPU1_CPURST# D15# D47#
t
F3 J26 Y26
RS0# CPU1_RS0# CPU1_DSTBN0# DSTBN0# DSTBN2# CPU1_DSTBN2#
F4 H26 AA26
CPU1_A#(35:17) RS1# CPU1_RS1# CPU1_DSTBP0# DSTBP0# DSTBP2# CPU1_DSTBP2#
17 Y2
A17# RS2#
G3 CPU1_RS2# C3895 CPU1_DBI0#
H25
DINV0# DINV2#
U22 CPU1_DBI2#
18 U5 G2 0.1nF
A18# TRDY# CPU1_TRDY# CPU1_D#(31:16) CPU1_D#(63:48)
m
19 R3 50V nostuff 16 N22 AE24 48
n
A19# D16# D48#
20 W6 G6 For ESD 17 K25 AD24 49
A20# HIT# CPU1_HIT# D17# D49#
21 U4 E4 18 P26 AA21 50
A21# HITM# CPU1_HITM# D18# D50#
22 Y5 19 R23 AB22 51
A22# D19# D51#
23 U1 A6 20 L23 AB21 52
a
A23# A20M# CPU1_A20M# D20# D52#
e
24 R4 A5 21 M24 AC26 53
1
ADDR GROUP
A24# FERR# CPU1_FERR# D21# D53#

25 T5 C4 22 L22 AD20 54
A25# IGNNE# CPU1_IGNNE# D22# D54#
26 T3 23 M23 AE22 55
A26# D23# D55#
ICH
DATA GRP 1
DATA GRP 3
27 W2 D5 24 P25 AF23 56
A27# STPCLK# CPU1_STPCLK# D24# D56#
28 W5 C6 25 P23 AC25 57
S fid
A28# LINT0 CPU1_INTR D25# D57#
29 Y4 B4 26 P22 AE21 58
A29# LINT1 CPU1_NMI D26# D58#
30 U2 A3 27 T24 AD21 59
A30# SMI# CPU1_SMI# D27# D59#
31 V4
A31# CPU1_REQ#(4:0) C3896 28 R24
D28# D60#
AC22 60
32 W3 K3 0 0.1nF 29 L25 AD23 61
A32# REQ0# 50V
D29# D61#
33 AA4 H2 1 nostuff 30 T25 AF22 62
A33# REQ1# D30# D62#
34 AB2 K2 2 31 N25 AC23 63
A34# REQ2# For ESD D31# D63#
35 AA3 J3 3 L26 AE25
A35# REQ3# CPU1_DSTBN1# DSTBN1# DSTBN3# CPU1_DSTBN3#
V1 L1 4 M26 AF24
CPU1_ADSTB1# ADSTB1# REQ4# CPU1_DSTBP1# DSTBP1# DSTBP3# CPU1_DSTBP3#
N24 AC20
CPU1_DBI1# DINV1# DINV3# CPU1_DBI3#
n
0143854500|bga_479p_sock
0143854500|bga_479p_sock
B B
o
CPU Socket : 3704-001153
MT6 MT7 MT3 MT4

C
RMNT-38-70-1P RMNT-38-70-1P RMNT-38-70-1P RMNT-38-70-1P
A A
DRAW DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
CPU mount MK Kim MP CPU
BL Lee REV 1.0 PENRYN (1/3) BA41-01060A


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D D
J501-3 CPU Core Voltage Table IMVP-6
PENRYN P1.5V
3/4
A22 B26 Active/Deeper Sleep
Deeper Sleep/Extended Deeper Sleep
H CLK
CLK0_HCLK0 BCLK0 VCCA_1 Active Mode
CLK0_HCLK0# A21
BCLK1 VCCA_2
C26
C97 C88 Dual Mode Region Dual Mode Region
10nF 10000nF
D7 K6
CPU1_SLP# B5
SLP# VCCP_1
J6
25V 6.3V
VID(6:0) Voltage VID(6:0) Voltage VID(6:0) Voltage
CPU1_DPSLP# E5
DPSLP# VCCP_2
M6
CPU1_DPRSTP# D24
DPRSTP# VCCP_3
N6 0 0 0 0 0 0 0 1.5000 V 0 1 0 1 0 0 0 1.0000 V 1 0 1 0 0 0 1 0.4875 V
CPU1_DPWR# D6
DPWR# VCCP_4
T6 0 0 0 0 0 0 1 1.4875 V 0 1 0 1 0 0 1 0.9875 V 1 0 1 0 0 1 0 0.4750 V
CPU1_PWRGDCPU AE6
PWRGOOD VCCP_5
R6 0 0 0 0 0 1 0 1.4750 V 0 1 0 1 0 1 0 0.9750 V 1 0 1 0 0 1 1 0.4625 V
g
CPU1_PSI# PSI# VCCP_6
K21 0 0 0 0 0 1 1 1.4625 V 0 1 0 1 0 1 1 0.9625 V 1 0 1 0 1 0 0 0.4500 V
CPU1_VID(6:0) 6 AE2
VCCP_7
J21 0 0 0 0 1 0 0 1.4500 V 0 1 0 1 1 0 0 0.9500 V 1 0 1 0 1 0 1 0.4375 V
VID_6 VCCP_8 P1.05V 0 0 0 0 1 0 1 1.4375 V 0 1 0 1 1 0 1 0.9375 V 1 0 1 0 1 1 0 0.4250 V
C3894 5 AF3
VID_5 VCCP_9
M21
P1.05V 0.1nF 4 AE3 N21 0 0 0 0 1 1 0 1.4250 V 0 1 0 1 1 1 0 0.9250 V 1 0 1 0 1 1 1 0.4125 V
VID_4 VCCP_10 0 0 0 0 1 1 1 1.4125 V 0 1 0 1 1 1 1 0.9125 V 1 0 1 1 0 0 0 0.4000 V
50V 3 AF4 T21
n
nostuff VID_3 VCCP_11 0 0 0 1 0 0 0 1.4000 V 0 1 1 0 0 0 0 0.9000 V 1 0 1 1 0 0 1 0.3875 V
2 AE5 R21 EC50
For ESD VID_2 VCCP_12 0 0 0 1 0 0 1 1.3875 V 0 1 1 0 0 0 1 0.8875 V 1 0 1 1 0 1 0 0.3750 V
R88
1 AF5
VID_1 VCCP_13
V21 220uF C65 C71 C57 C49 C52 C69
0 0 1
l
0 AD6 W21 2.5V 100nF 100nF 100nF 100nF 100nF 100nF 0 0 1 0 1 0 1.3750 V 1 1 0 0 1 0 0.8750 V 0 1 1 0 1 1 0.3625 V
56 VID_0 VCCP_14 AD 0 0 0 1 0 1 1 1.3625 V 0 1 1 0 0 1 1 0.8625 V 1 0 1 1 1 0 0 0.3500 V
V6 10V 10V 10V 10V 10V 10V
VCCP_15 0 0 0 1 1 0 0 1.3500 V 0 1 1 0 1 0 0 0.8500 V 1 0 1 1 1 0 1 0.3375 V
u
CPU1_PROCHOT#_MN D21 G21
THERMAL
PROCHOT# VCCP_16 0 0 0 1 1 0 1 1.3375 V 0 1 1 0 1 0 1 0.8375 V 1 0 1 1 1 1 0 0.3250 V
A24
CPU2_THERMDA THRMDA 0 0 0 1 1 1 0 1.3250 V 0 1 1 0 1 1 0 0.8250 V 1 0 1 1 1 1 1 0.3125 V
a
B25 AC1
P1.05V CPU2_THERMDC C7
THRMDC PREQ#
AC2 0 0 0 1 1 1 1 1.3125 V 0 1 1 0 1 1 1 0.8125 V 1 1 0 0 0 0 0 0.3000 V
CPU1_THRMTRIP# THERMTRIP# PRDY#
AC4 0 0 1 0 0 0 0 1.3000 V 0 1 1 1 0 0 0 0.8000 V 1 1 0 0 0 0 1 0.2875 V
s i
C BPM3# 0 0 1 0 0 0 1 1.2875 V 0 1 1 1 0 0 1 0.7875 V 1 1 0 0 0 1 0 0.2750 V C
XDP/ITP SIGNALS
C21 AD1
CPU1_BSEL2 B23
BSEL2 BPM2#
AD3 0 0 1 0 0 1 0 1.2750 V 0 1 1 1 0 1 0 0.7750 V 1 1 0 0 0 1 1 0.2625 V
R38 CPU1_BSEL1 BSEL1 BPM1# 0 1 0 1 1 0
t
B22 AD4 0 0 0 1 1 1.2625 V 1 1 0 1 1 0.7625 V 1 0 1 0 0 0.2500 V
1K CPU1_BSEL0 BSEL0 BPM0# 0 0 1 0 1 0 0 1.2500 V 0 1 1 1 1 0 0 0.7500 V 1 1 0 0 1 0 1 0.2375 V
1%
CPU1_GTLREF_MN AD26 AC5 0 0 1 0 1 0 1 1.2375 V 0 1 1 1 1 0 1 0.7375 V 1 1 0 0 1 1 0 0.2250 V
GTLREF TCK
AA6
CPU1_TCK 0 0 1 0 1 1 0 1.2250 V 0 1 1 1 1 1 0 0.7250 V 1 1 0 0 1 1 1 0.2125 V
TDI CPU1_TDI 0 0 1 0 1 1 1 1.2125 V 0 1 1 1 1 1 1 0.7125 V 1 1 0 1 0 0 0
1 0.2000 V
R43
m
R37 1% 54.9 CPU1_COMP3_MN Y1 AB3
n
COMP3 TDO 0 0 1 1 0 0 0 1.2000 V 1 0 0 0 0 0 0 0.7000 V 1 1 0 1 0 0 1 0.1875 V
2K C31 R42 1% 27.4 CPU1_COMP2_MN AA1 AB5
1% 100nF R52 1% 54.9 CPU1_COMP1_MN U26
COMP2 TMS
AB6 CPU1_TMS 0 0 1 1 0 0 1 1.1875 V 1 0 0 0 0 0 1 0.6875 V 1 1 0 1 0 1 0 0.1750 V
COMP1 TRST# CPU1_TRST# 0 0 1 1 0 1 0 1.1750 V 1 0 0 0 0 1 0 0.6750 V 1 1 0 1 0 1 1 0.1625 V
10V R59 1% 27.4 CPU1_COMP0_MN R26 C20
COMP0 DBR# ITP3_DBRESET# 0 0 1 1 0 1 1 1.1625 V 1 0 0 0 0 1 1 0.6625 V 1 1 0 1 1 0 0 0.1500 V
a
0 1 1 0 1 0
e
AF7 M4 C3897 0 1 1 0 0 1.1500 V 0 0 1 0 0 0.6500 V 1 1 1 0 1 0.1375 V
CPU1_VCCSENSE AE7
VCCSENSE RSVD_1
N5 0.1nF 0 0 1 1 1 0 1 1.1375 V 1 0 0 0 1 0 1 0.6375 V 1 1 0 1 1 1 0 0.1250 V
CPU1_VSSSENSE VSSSENSE RSVD_2
T2 50V 0 0 1 1 1 1 0 1.1250 V 1 0 0 0 1 1 0 0.6250 V 1 1 0 1 1 1 1 0.1125 V
RSVD_3 nostuff 0 0 1 1 1 1 1 1.1125 V 1 0 0 0 1 1 1 0.6125 V 1 1 1 0 0 0 0 0.1000 V
CPU1_TEST1_MN C23 V3
CPU1_TEST2_MN D25
TEST1 RSVD_4
B2 For ESD 0 1 0 0 0 0 0 1.1000 V 1 0 0 1 0 0 0 0.6000 V 1 1 1 0 0 0 1 0.0875 V
RSVD
S fid
TEST2 RSVD_5 0 1 0 0 0 0 1 1.0875 V 1 0 0 1 0 0 1 0.5875 V 1 1 1 0 0 1 0 0.0750 V
1%
1%
C24 D2
TEST3 RSVD_6 0 1 0 0 0 1 0 1.0750 V 1 0 0 1 0 1 0 0.5750 V 1 1 1 0 0 1 1 0.0625 V
AF26 D22
TEST4 RSVD_7 0 1 0 0 0 1 1 1.0625 V 1 0 0 1 0 1 1 0.5625 V 1 1 1 0 1 0 0 0.0500 V
AF1 D3
TEST5 RSVD_8 0 1 0 0 1 0 0 1.0500 V 1 0 0 1 1 0 0 0.5500 V 1 1 1 0 1 0 1 0.0375 V
1K
1K
A26 F6
TEST6 RSVD_9 0 1 0 0 1 0 1 1.0375 V 1 0 0 1 1 0 1 0.5375 V 1 1 1 0 1 1 0 0.0250 V
C3
TEST7 0 1 0 0 1 1 0 1.0250 V 1 0 0 1 1 1 0 0.5250 V 1 1 1 0 1 1 1 0.0125 V
0 1 0 0 1 1 1 1.0125 V 1 0 0 1 1 1 1 0.5125 V 1 1 1 1 0 1
0 0 0.0000 V
0143854500|bga_479p_sock 1 0
1 1 0 0 0 0 0.5000 V 1 1 1 1 0 0 1 0.0000 V
R102
R89
1 1 1 1 0 1 0 0.0000 V
nostuff Deeper Slp 1 1 1 1 0 1 1 0.0000 V
n
nostuff Active 1 1 1 1 1 0 0 0.0000 V
DPRSLPVR 0 DPRSLPVR 1 1 1 1 1 1 0 1 0.0000 V
B DPRSTP* 0 1 1 1 1 1 1 0 0.0000 V
DPRSTP* 1 1 1 1 1 1 1 1 0.0000 V
PSI2* 0 or 1 PSI2* 0 or 1
o
*"1111111" : 0V power good asserted.
P1.05V
*Yonah Processor (2.33 GHz / 800 MHz : TBD)
C
54.9 1%
54.9
GTLREF : Keep the Voltage divider within 0.5"

of the first GTLREF0 pin with Zo=55ohm trace.
near the CPU Minimize coupling of any switching signals to this net.
R41
R40
BSEL COMP0,2(COMP1,3) should be connected with Zo=27.4ohm(55ohm)

trace shorter than 1/2" to their respective Banias socket pins.
Pull-down
GND test points within 100mil of the VCC/VSSsense at the end of the line.
CPU1_TDI FSB 1067 MHz BSEL0, BSEL1, BSEL2
CPU1_TMS FSB 800 MHz BSEL0, BSEL2 Route the VCC/VSSsense as a Zo=55ohm traces with equal length.
Observe 3:1 spacing b/w VCC/VSSsense lines and 25mil away
CPU1_TCK (preferred 50mil) from any other signal. And GND via 100mil away
CPU1_TRST#
54.9 1%
from each of the VCC/VSS test point vias.

54.9
A A
DRAW DATE TITLE
SAMSUNG
R39
MS Yang 12/05/2008
R35
BONN-E
CHECK DEV. STEP
ELECTRONICS
MK Kim MP CPU


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D D
M22
M25
N23
N26
R22
K23
K26
P21
P24
L21
L24
M2
M5
N1
N4
R2
K4
P3
P6
L3
L6
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
A11 K1
VSS_1 CPU_CORE CPU_CORE VSS_120
A14 J5
VSS_2 VSS_119
A16 J25
VSS_3 VSS_118
A19 J22
VSS_4 VSS_117
A2 A10 AE9 J2
VSS_5 VCC_1 VCC_51 VSS_116
A23 A12 AF10 H6
A25 A13 AF12 H3
A4 A15 AF14 H24
g
A8 A17 AF15 H21
AA11 A18 AF17 G4
AA14 A20 AF18 G26
AA16 A7 AF20 G23
AA19 A9 AF9 G1
n
CPU_CORE AA2
VSS_13
AA10
VCC_9 J501-4 VCC_59
B10
VSS_108
F8
AA22 AA12 B12 F5
VSS_15 VCC_11 PENRYN VCC_61 VSS_106
l
AA25 AA13 B14 F25
AA5 AA15 B15 F22
u
AA8 AA17 B17 F2
AB1
VSS_18
VSS_19
AA18
VCC_14
VCC_15
4/4 VCC_64
VCC_65
B18
VSS_103
VSS_102
F19
a
AB11 AA20 B20 F16
AB13 AA7 B7 F13
AB16 AA9 B9 F11
s i
C AB19
VSS_22
AB10
VCC_18 VCC_68
C10
VSS_99
E8
C
AB26 AB12 C12 E6
t
6.3V
6.3V
AB4 AB14 C13 E3
R22 100 1% AB8 AB15 C15 E24
CPU1_VCCSENSE AC11
VSS_26
AB17
VCC_22 VCC_72
C17
VSS_95
E21
22000nF-X5R
22000nF-X5R
AC14 AB18 C18 E19
20%
20%
m
AC16 AB20 C9 E16
n
AC19 AB7 D10 E14
AC21 AB9 D12 E11
AC24 AC10 D14 D8
AC3 AC12 D15 D4
a
C124
C40
e
AC6 AC13 D17 D26
AC8 AC15 D18 D23
AD11 AC17 D9 D19
R20 100 1% nostuff AD13 AC18 E10 D16
CPU1_VSSSENSE nostuff AD16
VSS_37
AC7
VCC_33 VCC_83
E12
VSS_84
D13
S fid
AD19 AC9 E13 D11
AD2 AD10 E15 D1
AD22 AD12 E17 C8
AB23 AD14 E18 C5
AD25 AD15 E20 C25
AD5 AD17 E7 C22
AD8 AD18 E9 C2
Prodlizer used AE1
VSS_46
AD7
VCC_42 VCC_92
F10
VSS_75
C19
AE11 AD9 F12 C16
n
AE14 AE10 F14 C14
AE16 AE12 F15 C11
AE19 AE13 F17 B8
B AE23
VSS_51
AE15
VCC_47 VCC_97
F18
VSS_70
B6 B
AE26 AE17 F20 B24
o
AE4 AE18 F7 B21
AE8 AE20 F9 B19
AF11 B16
VSS_55 VSS_66
AF13 B13
VSS_56 VSS_65
AF16 B11
VSS_57 VSS_64
AF19 AF8
C
VSS_58 VSS_63
AF2 AF6
VSS_59 VSS_62
AF21 AF25
VSS_163
VSS_162
VSS_161
VSS_160
VSS_159
VSS_158
VSS_157
VSS_156
VSS_155
VSS_154
VSS_153
VSS_152
VSS_151
VSS_150
VSS_149
VSS_148
VSS_147
VSS_146
VSS_145
VSS_144
VSS_143
VSS_142
VSS_60 VSS_61
Y6
Y3
Y24
Y21
W4
W26
W23
W1
V5
V25
V22
V2
U6
U3
U24
U21
T4
T26
T23
T1
R5
R25
0143854500|bga_479p_sock
A A
DRAW DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP CPU


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL P1.05V P1.05V
SAMSUNG ELECTRONICS CO’S PROPERTY. EC8 C304 C376 C339 C317
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS 220uF 22000nF-X5R 220nF 220nF 100nF
EXCEPT AS AUTHORIZED BY SAMSUNG. 2.5V 20% 10V 10V 10V EC7
AD 6.3V C365 C377 C346 C369
470nF 2200nF 4700nF 4700nF 220uF
2.5V
16V 10V 10V 10V
AD
AM33
AG24
AG25
AG26
AG33
AG34
AC26
AC28
AC33
AC34
AH23
AH25
AH28
AA28
AA33
AA34
AB34
AE26
AE33
AK33
AF23
AF25
AF28
AF33
AJ23
AJ26
AJ33
W33
U33
U34
U10
U11
U12
U13
V33
V34
Y33
Y34
T32
T10
T11
T12
T13
CPU1_A#(35:3)
U1
U2
U3
U5
U6
U7
U8
U9
V1
V2
V3
T2
T5
T6
T7
T8
T9
D CPU1_D#(63:0) 22-D2 A14 3
D
H_A#_3
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25
0 F2 C15 4
H_D#_0 H_A#_4
1 G8 F16 5
H_D#_1 H_A#_5
2 F8 H13 6
H_D#_2 H_A#_6
3 E6 C18 7
H_D#_3 H_A#_7
4 G2 M16 8
H_D#_4 H_A#_8
5 H6 J13 9
H_D#_5 H_A#_9
6 H2 P16 10
H_D#_6 VCC CORE VTT H_A#_10
7 F6 R16 11
H_D#_7 H_A#_11
8 D4 N17 12
H_D#_8 H_A#_12
9 H3 M13 13
H_D#_9 H_A#_13
10 M9 E17 14
H_D#_10 H_A#_14
11 M11 P17 15
H_D#_11 H_A#_15
HOST ADDRESS BUS

12 J1 F17 16
g
H_D#_12 H_A#_16
13 J2 G20 17
P1.05V H_D#_13 H_A#_17
14 N12 B19 18
H_D#_14 H_A#_18
15 J6 J16 19
H_D#_15 H_A#_19
16 P2 E20 20
H_D#_16 H_A#_20
17 L2 H16 21
n
R153 H_D#_17 H_A#_21
221 18 R2 J20 22
H_D#_18 H_A#_22
1% 19 N9 L17 23
H_D#_19 H_A#_23
l
20 L6 A17 24
MCH1_HXSWING H_D#_20 H_A#_24
21 M5
H_D#_21 U513-1 H_A#_25
B17 25
u
R159 22 J3 L16 26
H_D#_22 H_A#_26
100 C221 23 N2
H_D#_23 H_A#_27
C21 27
EB88CTPM
a
1% 100nF 24 R1 J17 28
H_D#_24 H_A#_28
10V 25 N5 H20 29
H_D#_25 H_A#_29
26 N6 B18 30
s i
C H_D#_26 H_A#_30 C
SI request 27
28
P13
N8
H_D#_27 1 OF 5 H_A#_31
K17
B20
31
32
H_D#_28 H_A#_32
t
29 L7 F21 33
HOST DATA BUS

H_D#_29 H_A#_33
30 N10 K21 34
H_D#_30 H_A#_34
31 M3 L20 35
H_D#_31 0904-002483 H_A#_35
32 Y3
H_D#_32
m
33 AD14 H12
CPU1_ADS#
n
H_D#_33 H_ADS#
34 Y6 B16
35 Y10
H_D#_34 H_ADSTB#_0
G17 CPU1_ADSTB0#
36 Y12
H_D#_35 H_ADSTB#_1
A9
CPU1_ADSTB1#
37 Y14
H_D#_36 H_BNR#
F11 CPU1_BNR#
a
H_D#_37 H_BPRI# CPU1_BPRI#
e
38 Y7 G12
39 W2
H_D#_38 H_BREQ# CPU1_BREQ#
P1.05V H_D#_39
40 AA8 E9
41 Y9
H_D#_40 H_DEFER#
B10
CPU1_DEFER#
42 AA13
H_D#_41 H_DBSY#
J11 CPU1_DBSY#
CPU1_DPWR#
S fid
H_D#_42 H_DPWR#
R154 43 AA9 F9
44 AA11
H_D#_43 H_DRDY# CPU1_DRDY#
1K H_D#_44
1% 45 AD11 H9
46 AD10
H_D#_45 H_HIT#
E12
CPU1_HIT#
MCH1_HVREF 47 AD13
H_D#_46 H_HITM#
H11
CPU1_HITM#
48 AE12
H_D#_47 H_LOCK#
C9
CPU1_LOCK#
R151 H_D#_48 H_TRDY# CPU1_TRDY#
2K C3921 49 AE9
H_D#_49
1% 100nF 50 AA2 AH7
10V 51 AD8
H_D#_50 HPLL_CLK
AH6 CLK0_HCLK1
HOST CONTROL
H_D#_51 HPLL_CLK# CLK0_HCLK1#
n
52 AA3
SI request H_D#_52
53 AD3 J8
54 AD7
H_D#_53 H_DINV#_0
L3
CPU1_DBI0#
B 55 AE14
H_D#_54 H_DINV#_1
Y13
CPU1_DBI1# B
56 AF3
H_D#_55 H_DINV#_2
Y1 CPU1_DBI2#
H_D#_56 H_DINV#_3 CPU1_DBI3#
o
57 AC1
H_D#_57
58 AE3 L10
59 AC3
H_D#_58 H_DSTBN#_0
M7
CPU1_DSTBN0#
60 AE11
H_D#_59 H_DSTBN#_1
AA5
CPU1_DSTBN1#
61 AE8
H_D#_60 H_DSTBN#_2
AE6
CPU1_DSTBN2#
62 AG2
H_D#_61 H_DSTBN#_3 CPU1_DSTBN3#
C
H_D#_62
63 AD6 L9
H_D#_63 H_DSTBP#_0
M8
CPU1_DSTBP0#
C12
H_DSTBP#_1
AA6 CPU1_DSTBP1#
CPU1_CPURST# E11
H_CPURST# H_DSTBP#_2
AE5
CPU1_DSTBP2#
CPU1_SLP# H_CPUSLP# CFG H_DSTBP#_3 CPU1_DSTBP3#
NC CPU1_REQ#(4:0)
C5 B15 0
MCH1_HXSWING MCH1_H_RCOMP_MN E3
H_SWING H_REQ#_0
K13 1
H_RCOMP H_REQ#_1
R158 24.9 1% F13 2
H_REQ#_2
B11 B13 3
MCH1_HVREF H_DVREF H_REQ#_3
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31
VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44
A11 B14
VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8
VCC_NCTF_9
1608 4
H_AVREF H_REQ#_4
MCH1_VTTLF1_MN A8 B6
VTTLF
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20
VTTLF_1 H_RS#_0 CPU1_RS0#

CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
MCH1_VTTLF2_MN AB2 F12

MCH1_VTTLF3_MN L1
VTTLF_2 H_RS#_1
C8
CPU1_RS1#
CPU1_RS2#
470nF
470nF
470nF
VTTLF_3 H_RS#_2
16V
16V
16V
*POCAFEB-12 Only (Remove in MP Model)

T25
R25
P25
P20
P24
C25
N24
M24
E21
C23
C24
N21
P21
T21
R20
M20
L21
H21
P29
R28
T28
AA29
AA30
AA32
AB30
AC29
AC30
AC32
AE29
AE30
AE32
AF30
AG29
AG30
AG32
AH29
AH30
AH32
AJ29
AJ32
AK23
AK24
AK25
AK26
AK28
AK29
AK30
AK32
AL26
AL28
AL29
AL30
AL32
AM30
AM32
U30
U32
V29
V30
W29
W30
W32
Y29
Y30
Y32
Current Setting (def. : default Option)
CFG# P1.05V
C204
C335
C285
Low High CPU1_BSEL0

CPU1_BSEL1 MCH1_CFG6_MN
A CFG(5) DMIx2 DMIx4 (def.) A
CFG(6) iTPM Host Interface Enable iTPM Host Interface Disable (def.) CPU1_BSEL2
R179
CFG(7) ME Crypto no confidentiality ME Crypto confidentiality (def.) 2.2K DRAW DATE TITLE
CFG(9) PEG Reversal (def.) Normal nostuff MS Yang 12/05/2008

BONN-E SAMSUNG
CFG(10) PCIE Loop Back Enable PCIE Loop Back Disable(def) CHECK DEV. STEP
iTPM option ELECTRONICS
CFG(16) Dynamic ODT Disabled Dynamic ODT Enabled (def.) MK Kim MP MCH_CANTIGA_PM_DDR2
CFG(19) DMI Lane Normal (def.) DMI Lane Reversal APPROVAL REV PART NO.
BL Lee REV 1.0 CANTIGA (1/5) BA41-01060A

CFG(20) SDVO or PCIE X1 SDVO and PCIE X1
Only(def.) Simultaneously MODULE CODE LAST EDIT

4 3 2 1
A
B
C
D
P3.3V
R175
R178
R170
10K
10K
10K
4
4
1%
1%
SAMSUNG PROPRIETARY

C29
B29
B30
A28
B28
E38
E37
B43
C44
B37
A37
K37
F37
G38
B42
J37
G37
H38
A41
C41
C40
B40
F40
D45
H48
A40
G40
E46
H47
L32
G32
M29
M33
M32
J33
K33
H24
K25
H25
F25
E32
C31
G29
E29
J28
G28
E28
L29
J29
J32
H32
TV_RTN
HDA_SDI
TVB_DAC
TVA_DAC
TVC_DAC
CRT_RED
HDA_SDO
LVDS_IBG
CRT_IRTN
L_VDD_EN
HDA_RST#
CRT_BLUE
HDA_BCLK
LVDS_VBG
HDA_SYNC
L_BKLT_EN
LVDSB_CLK
LVDSA_CLK
L_DDC_CLK
CRT_VSYNC
CRT_HSYNC
CRT_GREEN
L_CTRL_CLK
MCH3_EXTTS1#
MCH3_EXTTS0#
LVDSB_CLK#
LVDSA_CLK#
LVDS_VREFL
L_DDC_DATA
LVDS_VREFH
MCH3_CLKREQ#
L_BKLT_CTRL
L_CTRL_DATA
CRT_DDC_CLK
CRT_TVO_IREF
LVDSB_DATA_3
LVDSB_DATA_2
LVDSB_DATA_1
LVDSB_DATA_0
LVDSA_DATA_3
LVDSA_DATA_2
LVDSA_DATA_1
LVDSA_DATA_0
TV_DCONSEL_1
TV_DCONSEL_0
CRT_DDC_DATA
LVDSB_DATA#_3
LVDSB_DATA#_2
LVDSB_DATA#_1
LVDSB_DATA#_0
LVDSA_DATA#_3
LVDSA_DATA#_2
LVDSA_DATA#_1
LVDSA_DATA#_0
PEG1_RXN(15:0)
HDA LVDS TV VGA
A43 H44
NC_1 PEG_RX#_0
A44 J46
NC_2 PEG_RX#_1
A46 L44
NC_3 PEG_RX#_2
A47 L40
NC_4 PEG_RX#_3
A5 N41
NC_5 PEG_RX#_4
A6 P48
NC_6 PEG_RX#_5
B4 AE16 AA15 N44
NC_7 VCC_AXG_NCTF_8 VCC_AXG_1 PEG_RX#_6
B45 AE17 AA20 T43
B47 AE19 AA21 U43
B48 AF16 AA23 Y43
BC1 AF17 AA24 Y48
BC48 AF19 AA25 Y36
BD1 AG16 AB15 AA43
BD48 AG17 AB20 AD37
BE2 AG19 AB23 AC47
BE47 AH16 AB25 AD39
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

BF1 AH17 AC20
NC_17 VCC_AXG_NCTF_18 VCC_AXG_11
C
BF3 AH19 AC21 H43
3
3
NC_18 VCC_AXG_NCTF_19 VCC_AXG_12 PEG_RX_0

BF46 AJ16 AC23 J44
BF48 AJ19 AC24 L43
BG1 AK16 AE15 L41
BG2 AK17 AE20 N40
BG4 AK19 AE21 P47
NC
BG45 AK20 AE23 N43
BG47 AK21 AE24 T42
BG48
a AL16 AE25 U42
o
BH2 AL19 AF15 Y42
BH3 AL21 AF20 W47
BH43 AM16 AG15 Y37
PCIE GFX
GFX VCC
BH44 AM17 AG21 AA42

BH46 AM19 AH15 AD36
BH47 AM20 AH20 AC48
BH5 AM21 AJ15 AD40
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

BH6 U16 AJ21
NC_34 VCC_AXG_NCTF_35 VCC_AXG_28 100nF
C3
C46
C48
n NC_35
NC_36
U19
U20
U21
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_29
VCC_AXG_30
AL15
AM14
AM15
PEG_TX#_0
PEG_TX#_1
J41 C613
M46 C615
M47 C631
100nF
100nF
2 OF 5
NC_37 VCC_AXG_NCTF_38 VCC_AXG_31 PEG_TX#_2

U513-2
D2 V16 AN14 M40 C630 100nF

m
NC_38 VCC_AXG_NCTF_39 VCC_AXG_32 PEG_TX#_3 100nF
D47 V17 T14 M42 C639
GFX VCC NCTF

E1 V19 T16 R48 C640
E48 V21 T17 N38 C647
NC_41 VCC_AXG_NCTF_42 VCC_AXG_35 PEG_TX#_6
EB88CTPM
F1 V23 U14 T40 C648 100nF

F48 V24 U15 U37 C657
0904-002483

V25 V15 U40 C658
VCC_AXG_NCTF_45 VCC_AXG_38 PEG_TX#_9 100nF
V26 Y15 Y40 C664
VCC_AXG_NCTF_46 VCC_AXG_39 PEG_TX#_10 100nF
s
AH10 V28 Y21 AA46C665

RSVD_1 VCC_AXG_NCTF_47 VCC_AXG_40 PEG_TX#_11 100nF
AH12 W16 Y24 AA37C674
RSVD_2 VCC_AXG_NCTF_48 VCC_AXG_41 PEG_TX#_12
PEG1_RXP(15:0)
AH13 W17 Y26 AA40C675 100nF

RSVD_3 VCC_AXG_NCTF_49 VCC_AXG_42 PEG_TX#_13 100nF
AH9 W19 AD43C682
RSVD_4 VCC_AXG_NCTF_50 PEG_TX#_14 100nF
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
AK34 W20 AC46C680

RSVD_5 RSVD11 VCC_AXG_NCTF_51 PEG_TX#_15
AL34 W21
RSVD_6 RSVD10 VCC_AXG_NCTF_52 100nF
AM35 W23 J42 C601
S fid
RSVD_7 RSVD13 VCC_AXG_NCTF_53 PEG_TX_0 100nF
AN35 W24 AA16 L46 C614
RSVD_8 RSVD12 VCC_AXG_NCTF_54 VCC_AXG_NCTF_1 PEG_TX_1 100nF
AY21 W25 AA19 M48 C627
RSVD_9 VCC_AXG_NCTF_55 VCC_AXG_NCTF_2 PEG_TX_2
u
B2 W26 AB16 M39 C624 100nF

RSVD_10 VCC_AXG_NCTF_56 VCC_AXG_NCTF_3 PEG_TX_3 100nF
B31 W28 AB17 M43 C635
RSVD_11 VCC_AXG_NCTF_57 VCC_AXG_NCTF_4 PEG_TX_4
RSVD
BF18 Y16 AB19 R47 C636 100nF

BF23 Y17 AC16 N37 C643
2
2

BG23 Y19 AC17 T39 C644
GFX VCC NCTF

BH18
e
U36 C651
RSVD_15 PEG_TX_8 100nF
K12 U39 C652
M1 Y39 C660
M36 Y46 C661
n

N36 AA36C669
PEG1_TXN(15:0)

R33 AA39C670
DRAW
CHECK

APPROVAL T24 AD42C679
T33
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
AD46C683
MODULE CODE
RSVD_22 PEG_TX_15
n
g
PCIE GFX
MISC PM ME CLK DMI

t
undefined
BL Lee
MK Kim
MS Yang
i
REV
DATE
LAST EDIT
DEV. STEP
PEG1_TXP(15:0)
TSATN#
ICH_SYNC#
CLKREQ#
SDVO_CTRLDATA
SDVO_CTRLCLK
DDPC_CTRLDATA
DDPC_CTRLCLK
PM_EXT_TS#_1
PM_EXT_TS#_0
THERMTRIP#
RSTIN#
PWROK
DPRSLPVR
PM_DPRSTP#
PM_SYNC#
CL_VREF
CL_RST#
CL_PWROK
CL_DATA
CL_CLK
PEG_CLK#
PEG_CLK
DPLL_REF_SSCLK#
DPLL_REF_SSCLK
DPLL_REF_CLK#
DPLL_REF_CLK
DMI_TXP_3
DMI_TXP_2
DMI_TXP_1
DMI_TXP_0
DMI_TXN_3
DMI_TXN_2
DMI_TXN_1
DMI_TXN_0
DMI_RXP_3
DMI_RXP_2
DMI_RXP_1
DMI_RXP_0
DMI_RXN_3
DMI_RXN_2
DMI_RXN_1
DMI_RXN_0
GFX_VR_EN
GFX_VID_4
GFX_VID_3
GFX_VID_2
GFX_VID_1
GFX_VID_0
PEG_COMPO
PEG_COMPI
REV 1.0
MP
12/05/2008
B7
a
T20
F43
F41
F33
T36
T37
B12
K36
E36
P32
E43
E41
A38
B38
E33
B32
B33
H36
N28
R32
R29
C34
G36
G33
M28
TITLE
AJ35
AT11
AT40
AF46
AE44
AE46
AE43
AE35
AE48
AE38
AE40
AE47
AE37
AE41
AH34
AN36
AH36
AH37
AH43
AD35
AH42
AH40
AH39
R212
l
R157
R164
PEG1_TXN9_C_MN
PEG1_TXN8_C_MN
PEG1_TXN7_C_MN
PEG1_TXN6_C_MN
PEG1_TXN5_C_MN
PEG1_TXN4_C_MN
PEG1_TXN3_C_MN
PEG1_TXN2_C_MN
PEG1_TXN1_C_MN
PEG1_TXN0_C_MN
PEG1_TXN15_C_MN
PEG1_TXN14_C_MN
PEG1_TXN13_C_MN
PEG1_TXN12_C_MN
PEG1_TXN11_C_MN
PEG1_TXN10_C_MN
1%
MCH1_TSATN#_MN
0
R188
56
N33 CPU1_THRMTRIP#_R_MN
MCH1_SDVO_CTRLDATA_MN
MCH1_COMPIO_R_MN
BONN-E
SHORT564
nostuff
DMI1_TXP_3
DMI1_TXP_2
DMI1_TXP_1
DMI1_TXP_0
DMI1_TXN_3
DMI1_TXN_2
DMI1_TXN_1
DMI1_TXN_0
DMI1_RXP_3
DMI1_RXP_2
DMI1_RXP_1
DMI1_RXP_0
DMI1_RXN_3
DMI1_RXN_2
DMI1_RXN_1
DMI1_RXN_0
CANTIGA (2/5)
CPU1_DPRSTP#
KBC3_PWRGD
1
1
MCH1_CL_VREF_MN
P1.05V
CHP3_DPRSLPVR
CHP3_PM_SYNC#
CHP3_CL_CLK_0
CLK1_MCH3GPLL
100 PLT3_RST#_R_MN
PEG1_TXP9_C_MN
PEG1_TXP8_C_MN
PEG1_TXP7_C_MN
PEG1_TXP6_C_MN
PEG1_TXP5_C_MN
PEG1_TXP4_C_MN
PEG1_TXP3_C_MN
PEG1_TXP2_C_MN
PEG1_TXP1_C_MN
PEG1_TXP0_C_MN
April 11, 2009 10:05:58 AM

CHP3_CL_RST_0#
CHP3_CL_DATA_0
CLK1_MCH3GPLL#
PEG1_TXP15_C_MN
PEG1_TXP14_C_MN
PEG1_TXP13_C_MN
PEG1_TXP12_C_MN
PEG1_TXP11_C_MN
PEG1_TXP10_C_MN
MCH_CANTIGA_PM_DDR2
49.9 1%
R1005-SHORT
10V
PAGE
C372
100nF
1608 Size
PART NO.
P1.05V_PEG
KBC3_PWRGD
MCH3_CLKREQ#
MCH3_ICHSYNC#
14
P1.05V
1K
1%
1%
50V
499
0.1nF
R203
R201
MCH3_EXTTS1#
MCH3_EXTTS0#
TP2105
C3899
CPU1_THRMTRIP#
OF
nostuff
SAMSUNG
BA41-01060A
ELECTRONICS
Added by EMC
PLT3_RST#
A
500 ohm for Cantiga B
C
D
4 3 2 1
SAMSUNG PROPRIETARY
PROPRIETARY INFORMATION THAT IS PLACE EACH CAP NEAR AV42 PIN
EXCEPT AS AUTHORIZED BY SAMSUNG. MEM1_ADQ(63:0) MEM1_VREF
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 C407 C408
100nF 100nF
MEM1_SM_REXT_MN 10V 10V
AW36
AM38
AM44
AM42
AM11
AM13
AN38
AN43
AN44
AU40
AN41
AN39
AU44
AU42
BD43
BC40
BD38
BD13
AU11
BC11
AU13
BD12
BC12
AU10
AN10
AN12
AV39
AY44
BA40
AV41
AY43
BB41
AY37
AV37
AY38
BB38
AV36
BA12
AV13
BA11
AT38
AT36
AJ38
AJ41
AJ36
AJ40
AJ11
AJ12
AM5
R225 499 1%
BD9
AN8
AU5
AU6
BB9
BA9
AV9
AY8
BA6
AV5
AV7
AT9
AT5
AJ9
AJ8
nostuff
nostuff
D MEM1_ABS(2:0) D
SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63
0 BD21 BF17
SA_BS_0 SM_REXT
1 BG18 AV42
2 AT25
SA_BS_1 SM_VREF MEM1_VREF SM_PWROK
SA_BS_2 DDR2 : GND
BC36
MEM1_ADM(7:0) SM_DRAMRST#
0 AM37
SA_DM_0 SM_PWROK
AR36 DDR3 : Connect to VRM.
1 AT41
SA_DM_1
2 AY41 BG16
3 AU39
SA_DM_2 SB_CAS#
AU17
MEM1_BCAS#
4 BB12
SA_DM_3 SB_RAS#
BF14
MEM1_BRAS#
SA_DM_4 SYSTEM MEMORY A SB_WE# MEM1_BWE#
5 AY6
SA_DM_5
6 AT7 AV16
7 AJ5
SA_DM_6 SB_CS#_0
AR13
MEM1_CS2#
SA_DM_7 SB_CS#_1 MEM1_CS3#
MEM1_ADQS#(7:0) 0 AJ43 BF15
g
1 AT43
SA_DQS#_0 SB_ODT_0
AY13
MEM1_ODT2
2 BA44
SA_DQS#_1 SB_ODT_1 MEM1_ODT3
SA_DQS#_2
3 BD37 AY36
4 AY12
SA_DQS#_3 SB_CKE_0
BB36 MEM1_CKE2
5 BD8
SA_DQS#_4 SB_CKE_1 MEM1_CKE3
n
SA_DQS#_5
6 AU9 AV24
7 AM8
SA_DQS#_6 SB_CK_0
AU24
CLK1_MCLK2
SA_DQS#_7 SB_CK#_0 CLK1_MCLK2#
l
AU20
MEM1_ADQS(7:0) 0 AJ44
SB_CK_1
AV20
CLK1_MCLK3
SA_DQS_0 SB_CK#_1 CLK1_MCLK3#
u
1
2
AT44
BA43
SA_DQS_1
SA_DQS_2
U513-3 SB_DM_0
AM47 0 MEM1_BDM(7:0)
a
3 BC37 AY47 1
SA_DQS_3 SB_DM_1
EB88CTPM
SYSTEM MEMORY A
4 AW12 BD40 2
SA_DQS_4 SB_DM_2
5 BC8 BF35 3
s i
C 6 AU8
SA_DQS_5 SB_DM_3
BG11 4
C
SA_DQS_6 SB_DM_4
7 AM7
SA_DQS_7 3 OF 5 SB_DM_5
BA3 5
t
AP1 6
MEM1_AMA(14:0) 0 BA21
SB_DM_6
AK2 7
SA_MA_0 SB_DM_7
1 BC24
2 BG24
SA_MA_1
AL46 0
MEM1_BDQS#(7:0)
SA_MA_2 0904-002483 SB_DQS#_0
m
3 BH24 AV47 1
n
SA_MA_3 SB_DQS#_1
4 BG25 BH41 2
SA_MA_4 SB_DQS#_2
5 BA24 BH37 3
SA_MA_5 SB_DQS#_3
6 BD24 BG9 4
SA_MA_6 SB_DQS#_4
7 BG27 BC2 5
SYSTEM MEMORY B
a
SA_MA_7 SB_DQS#_5
e
8 BF25 AT2 6
SA_MA_8 SB_DQS#_6
9 AW24 AN5 7
SA_MA_9 SB_DQS#_7
10 BC21
11 BG26
SA_MA_10
AL47 0
MEM1_BDQS(7:0)
SA_MA_11 SB_DQS_0
12 BH26 AV48 1
S fid
SA_MA_12 SB_DQS_1
13 BH17 BG41 2
SA_MA_13 SB_DQS_2
14 AY25 BG37 3
SA_MA_14 SB_DQS_3
BH9 4
SB_DQS_4
BD20 BB2 5
MEM1_ACAS# BB20
SA_CAS# SB_DQS_5
AU1 6
MEM1_ARAS# AY20
SA_RAS# SB_DQS_6
AN6 7
MEM1_AWE# SA_WE# SB_DQS_7
BA17 AV17 0
MEM1_BMA(14:0)
MEM1_CS0# AY16
SA_CS#_0 SB_MA_0
BA25 1
MEM1_CS1# SA_CS#_1 SB_MA_1
n
BC25 2
SB_MA_2
BD17 AU25 3
MEM1_ODT0 AY17
SA_ODT_0 SB_MA_3
AW25 4
B MEM1_ODT1 SA_ODT_1 SB_MA_4
BB28 5 B
SB_MA_5
BC28 AU28 6
MEM1_CKE0 SA_CKE_0 SB_MA_6
o
AY28 AW28 7
P1.8V_AUX MEM1_CKE1 SA_CKE_1 SB_MA_7
AT33 8
SB_MA_8
AP24 BD33 9
CLK1_MCLK0 AR24
SA_CK_0 SB_MA_9
BB16 10
CLK1_MCLK0# AT21
SA_CK#_0 SB_MA_10
AW33 11
R226 CLK1_MCLK1 SA_CK_1 SYSTEM MEMORY B SB_MA_11
80.6 AR21 AY33 12
C
1% CLK1_MCLK1# SA_CK#_1 SB_MA_12
BH15 13
SB_MA_13
MCH1_SM_RCOMP_MN BG22 AU33 14
SM_RCOMP SB_MA_14
MCH1_SM_RCOMP#_MN BH21
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63
SM_RCOMP# MEM1_BBS(2:0)
SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
BC16 0
SB_BS_0
MCH1_SM_RCOMP_V_OH_MN BF28 BB17 1
R232 MCH1_SM_RCOMP_V_OL_MN
SM_RCOMP_V_OH SB_BS_1
BH28 BB33 2
80.6 SM_RCOMP_V_OL SB_BS_2
1%
AK47
AH46
AP47
AP46
AJ46
AJ48
AM48
AP48
AU47
AU46
BA48
AY48
AT47
AR47
BA47
BC47
BC46
BC44
BG43
BF43
BE45
BC41
BF40
BF41
BG38
BF38
BH35
BG35
BH40
BG39
BG34
BH34
BH14
BG12
BH11
BG8
BH12
BF11
BF8
BG7
BC5
BC6
AY3
AY1
BF6
BF5
BA1
BD3
AV2
AU3
AR3
AN2
AY2
AV1
AP3
AR1
AL1
AL2
AJ1
AH1
AM2
AM3
AH3
AJ3
P1.8V_AUX
Route as short as possible
R219 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
1K MEM1_BDQ(63:0)
1%
C419 C421
R227 10nF 2200nF
3.01K 25V 10V
A 1%
A
Cantiga SM_RCOMP : 80 ohm to P1.8V_AUX
DRAW DATE TITLE
DDR2 SM_RCOMP# : 80 ohm to VSS
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
R231 C425 C427 ELECTRONICS
10nF 2200nF
MK Kim MP MCH_CANTIGA_PM_DDR2
1K
1% 25V 10V APPROVAL REV PART NO.

April 11, 2009 10:05:58 AM PAGE 15 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
PROPRIETARY INFORMATION THAT IS P1.8V_AUX
EXCEPT AS AUTHORIZED BY SAMSUNG. EC10 C398 C399
220uF 22000nF-X5R 22000nF-X5R
C415 C410
2.5V 20% 20% 100nF 100nF
AD 6.3V 6.3V 10V 10V
D D
AW16
AW13
BD16
BB24
BB21
BA36
AT13
P1.05V P3.3V P1.05V
BH32
BH31
BH29
BG32
BG31
BG30
BG29
BF32
BF31
BF29
BD32
BD29
BC32
BC29
BB32
BB29
BA32
BA29
AY32
AY29
AW32
AW29
AV32
AV29
AU32
AU29
AT32
AT29
AR32
AR29
AP33
AP32
AP29
AN33
AN32
VCC_SM_NC_7
VCC_SM_NC_6
VCC_SM_NC_5
VCC_SM_NC_4
VCC_SM_NC_3
VCC_SM_NC_2
VCC_SM_NC_1
VCC_SM_35
VCC_SM_34
VCC_SM_33
VCC_SM_32
VCC_SM_31
VCC_SM_30
VCC_SM_29
VCC_SM_28
VCC_SM_27
VCC_SM_26
VCC_SM_25
VCC_SM_24
VCC_SM_23
VCC_SM_22
VCC_SM_21
VCC_SM_20
VCC_SM_19
VCC_SM_18
VCC_SM_17
VCC_SM_16
VCC_SM_15
VCC_SM_14
VCC_SM_13
VCC_SM_12
VCC_SM_11
VCC_SM_10
VCC_SM_9
VCC_SM_8
VCC_SM_7
VCC_SM_6
VCC_SM_5
VCC_SM_4
VCC_SM_3
VCC_SM_2
VCC_SM_1
C226 C373
10000nF 1000nF MCH1_P3.3V_HV_R_MN
3
6.3V 6.3V R621 12.1 1 2
1%
nostuff C599 BAT54A
100nF D518
10V
VCC AXG
VCC HAD
A21
g
VCC_AXF_1
B21 VCC_SM A32
VCC_AXF_2 VCC_HDA P1.05V_PEG
B22
VCC_AXF_3 2A routing P1.05V
INSTPAR
P1.05V_PEG SHORT504
A35
VCC_HV
VCC_HV_1
AF48 B35
VCC AXG
VCC_DMI_1 VCC_HV_2 C655 EC508
AG47
VCC_DMI_2 VCC_HV_3
C35 C656 22000nF-X5R 220uF
l
C360 AH47 4700nF-X5R20% INSTPAR
VCC_DMI_3 2.5V
100nF AH48 10V 6.3V AD SHORT503
VCC_DMI_4 P1.05V
u
10V U46
VCC_PEG_1
U513-4 U47
PEG POWER
VCC_PEG_2 P1.5V
a
U48
VCC_PEG_3
B27 V47
A26
VCCA_CRT_DAC_1
EB88CTPM VCC_PEG_4
V48 Cantiga : 1.5V
s i
C VCCA_CRT_DAC_2 VCC_PEG_5 C
R650 B515
4 OF 5 VCCA_PEG_BG
AD48 1 BLM18PG181SN1
t
C666
0904-002483 C292 100nF MCH1_P1.05V_PEG_PLL_R_MN
A25
VCCA_DAC_BG 100nF 10V
C673
CRT / TV POWER AA48 10V
VCCA_PEG_PLL 10000nF
m n
6.3V
AA47 MCH1_P1.05V_PEG_PLL_MN
VCCD_PEG_PLL
A24
VCCA_TV_DAC_1
B24
a
VCCA_TV_DAC_2
e
F47
VCCA_DPLLA
PLL POWER
P1.5V
L48 P1.05V
VCCA_DPLLB
M25
S fid
VCCD_TVDAC
C277 C276 MCH1_P1.5V_QDAC_MN VCCA_HPLL
AD1
100nF 10nF L28 C361
VCCD_QDAC
10V 25V R173 4700nF-X5R C364
R171 AE1 MCH1_P1.05V_MPLL_MN 10V 100nF
0 0 VCCA_MPLL
J48 10V
nostuff
VCCA_LVDS P1.05V
LVDS POWER
AF1 BLM18PG181SN1
VCCD_HPLL
n
L37
VCCD_LVDS_1 R205
M38 VCC_SM_LF VCC_SM_CK VCCA_SM_CK_NCTF VCCA_SM_CK VCCA_SM
VCCD_LVDS_2 B25
AXG SENSE
VCC_AXG_SENSE
AJ14 0 C367
B 100nF
R200 R199 B
K47 AH14 R2040 10V 1 1
VCC_TX_LVDS VSS_AXG_SENSE
o
VCCA_SM_CK_NCTF_8
VCCA_SM_CK_NCTF_7
VCCA_SM_CK_NCTF_6
VCCA_SM_CK_NCTF_5
VCCA_SM_CK_NCTF_4
VCCA_SM_CK_NCTF_3
VCCA_SM_CK_NCTF_2
VCCA_SM_CK_NCTF_1
nostuff C353
nostuff
100nF
C333
22000nF-X5R
VCCA_SM_CK_5
VCCA_SM_CK_4
VCCA_SM_CK_3
VCCA_SM_CK_2
VCCA_SM_CK_1
10V
VCC_SM_CK_4
VCC_SM_CK_3
VCC_SM_CK_2
VCC_SM_CK_1
20%
VCC_SM_LF_7
VCC_SM_LF_6
VCC_SM_LF_5
VCC_SM_LF_4
VCC_SM_LF_3
VCC_SM_LF_2
VCC_SM_LF_1
6.3V
VCCA_SM_9
VCCA_SM_8
VCCA_SM_7
VCCA_SM_6
VCCA_SM_5
VCCA_SM_4
VCCA_SM_3
VCCA_SM_2
VCCA_SM_1
C
MCH1_VCC_AXG_SENSE_MN
MCH1_VSS_AXG_SENSE_MN MCH1_P1.05V_MPLL_R_MN
BB13
BA37
AY5
AV44
AV21
AM40
AM10
BH20
BG20
BF21
BF20
AM28
AM26
AM25
AM24
AM23
AL25
AL24
AL23
AP28
AP25
AN28
AN25
AN24
AT16
AR20
AR17
AR16
AP20
AP17
AP16
AN20
AN17
10VC414 100nF
MCH1_P1.8VAUX_SM_CK_MN
MCH1_VCC_SM_LF_7_MN C411
6.3V 1000nF-X5R
MCH1_VCC_SM_LF_6_MN 10VC405 220nF P1.05V
MCH1_VCC_SM_LF_5_MN C403
6.3V 1000nF-X5R
MCH1_VCC_SM_LF_4_MN
MCH1_VCC_SM_LF_3_MN 10VC406 220nF
MCH1_VCC_SM_LF_2_MN 16VC375 470nF EC9
MCH1_VCC_SM_LF_1_MN C366 C379 C392 C334
10VC378 100nF 220uF
1000nF 4700nF 22000nF-X5R 22000nF-X5R
6.3V 10V 20% 20% 2.5V
6.3V 6.3V AD
P1.8V_AUX P1.05V
nostuff
A B29 C380 C402

C331 A
BLM18PG181SN1 R233 22000nF-X5R
1 100nF 2200nF 20%
10V 10V 6.3V DRAW DATE TITLE
MCH1_P1.8VAUX_SM_CK_R_MN C423
100nF
MS Yang 12/05/2008
BONN-E SAMSUNG
C426 nostuff CHECK DEV. STEP
10V ELECTRONICS
10000nF MK Kim MP MCH_CANTIGA_PM_DDR2
6.3V

April 11, 2009 10:05:58 AM PAGE 16 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
AM12
AM34
AM36
AM39
AM41
AM43
AM46
AN11
AN13
AN16
AN21
AN29
AN37
AN40
AN42
AN47
AR25
AR28
AR33
AR46
AR48
AU16
AU21
AU36
AU38
AU41
AU43
AU48
AK15
AP21
AV10
AV12
AV25
AV28
AT10
AT12
AT17
AT20
AT24
AT28
AT37
AT39
AT42
AL33
AL48
AJ25
AJ28
AJ34
AJ37
AJ39
AJ42
AJ47
AM1
AM6
AM9
AN7
AN9
AR2
AU2
AU7
AP2
AT6
AT8
AL3
AJ7
D D
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
A12
VSS_1
A15 AV3
VSS_2 VSS_136
A18 AV33
VSS_3 VSS_137
A20 AV40
VSS_4 VSS_138
A23 AV43
VSS_5 VSS_139
A29 VSS AV46
VSS_6 VSS_140
A31 AV6
VSS_7 VSS_141
A34 F38 M44 AV8
VSS_8 VSS_241 VSS_295 VSS_142
AA1 F44 M6 AW17
AA10 F46 N11 AW2
AA12 F5 N13 AW20
AA14 G11 N16 AW21
g
AA26 G13 N20 AW37
AA35 G16 N25 AW47
AA38 G21 N29 AY11
AA41 G24 N32 AY24
AA44 G25 N39 AY42
n
AA7 G41 N42 AY46
AB21 G47 N47 AY7
VSS_19 VSS_252 U513-5 VSS_306 VSS_153
l
AB24 G9 N7 B23
AB26 H1 P1 B26
VSS_21 VSS_254 EB88CTPM VSS_308 VSS_155
u
AB28 H17 P28 B34
AB33 H28 P3 B36
VSS_23 VSS_256
5 OF 5 VSS_310 VSS_157
a
AB47 H29 P33 B39
AC15 H33 P36 B41
AC2 H37 P46 B8
s i
C AC25
VSS_26
H40
VSS_259 0904-002483 VSS_313
R17
VSS_160
B9
C
AD12 H46 R21 BA13
t
AD2 H5 R24 BA16
AD38 J12 R3 BA2
AD41 J21 R46 BA20
AD44 J24 T29 BA28
m
AD47 J25 T35 BA33
n
AD5 J36 T38 BA38
VSS
VSS
AD9 J38 T41 BA46
VSS
AE10 J43 T44 BA5
VSS

AE13 J5 T47 BB11
a
e
AE2 J7 U24 BB25
AE28 K16 U25 BB37
AE34 K2 U28 BB40
AE36 K20 U29 BB47
AE39 K24 U35 BB8
S fid
AE42 K28 U38 BC13
AE7 K29 U41 BC17
AF2 K32 U44 BC20
AF21 L12 V46 BC3
AF24 L13 W15 BC33
AF26 L24 W34 BC38
AF34 L25 Y11 BC43
AF47 L33 Y2 BC9
AG20 L36 Y20 BD11
n
AG23 L39 Y23 BD25
AG28 L42 Y25 BD28
AH11 L47 Y28 BD36
B AH2
VSS_55
L5
VSS_288 VSS_342
Y35
VSS_189
BD41 B
AH21 L8 Y38 BD46
o
AH24 M10 Y41 BD6
AH26 M17 Y44 BE4
AH33 M2 Y47 BF12
AH35 M21 Y5 BF24
AH38 M41 Y8 BF26
AH41 BF34
C
VSS_62 TV & LVDS VSS_196
AH44 BF37
VSS_63 VSS VSS SCB VSS NCTF VSS VSS_197
AH5 BF44
VSS_64 VSS_198
AH8 BF9
VSS_65 VSS_199
AJ10 BG10
VSSA_DAC_BG
VSS_66 VSS_200
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
AJ13 BG13
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_67 VSS_201
VSSA_LVDS
VSS_SCB_1
VSS_SCB_2
VSS_SCB_3
VSS_SCB_4
VSS_SCB_5
AJ2 BG14
VSS_68 VSS_202
AJ20 BG15
VSS_349
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_69 VSS_203
AJ24 BG17
VSS_70 VSS_204
BG19
VSS_205
B25
J47
A3
A48
BH1
BH48
C1
AA17
AB29
AB32
AC19
AF29
AF32
AJ17
AJ30
AL17
AL20
AM29
U17
U23
U26
V20
V32
AJ6
BG21
BG28
BG33
BG36
BG40
BG42
BG6
BH23
BH25
BH38
BH8
C11
C14
C17
C20
C26
C28
C32
C37
C38
C43
C6
E13
E16
E24
E25
E40
E8
F20
F24
F28
F29
F3
F32
F36
A A
DRAW DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP MCH_CANTIGA_PM_DDR2

April 11, 2009 10:05:58 AM PAGE 17 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
PROPRIETARY INFORMATION THAT IS DDR SO-DIMM #0
D D
MEM1_ADQ(63:0)
P0.9V
DDR501-1 MEM1_AMA(14:0)
DDR2-SODIMM-200P-STD 0 R402 56
1 R369 56
MEM1_AMA(14:0)
1/2 2 R401 56
0 102
A0 DQ0
5 0 3 R368 56
1 101
A1 DQ1
7 1 4 R400 56
2 100 17 2 P1.8V_AUX 5 R366 56
A2 DQ2
3 99 19 3 6 R399 56
g
A3 DQ3
4 98
A4 DQ4
4 4 7 R398 56
5 97
A5 DQ5
6 5 DDR501-2 8 R367 56
6 94
A6 DQ6
14 6
DDR2-SODIMM-200P-STD 9 R364 56
7 92
A7 DQ7
16 7 10 R370 56
8 93 23 8 2/2 11 R397 56
n
A8 DQ8
9 91
A9 DQ9
25 9 112
VDD1 VSS16
18 12 R365 56
10 105
A10_AP DQ10
35 10 111
VDD2 VSS17
24 13 R407 56
l
11 90
A11 DQ11
37 11 117
VDD3 VSS18
41 14 R396 56
12 89 20 12 96 53
A12 DQ12 P3.3V VDD4 VSS19
u
13 116 22 13 95 42 R405 56
14 86
A13 DQ13
36 14 118
VDD5 VSS20
54 MEM1_CS0# R375 56
A14 DQ14 VDD6 VSS21 MEM1_CS1#
a
84 38 15 81 59
A15 DQ15 VDD7 VSS22
85 43 16 82 65 R362 56
MEM1_ABS(2) A16_BA2 DQ16 C3586 VDD8 VSS23 MEM1_CKE0
45 17 C3625 87 60 R395 56
s i
C 107
DQ17
55 18
100nF
2200nF 103
VDD9 VSS24
66
MEM1_CKE1 C
MEM1_ABS(0) 106
BA0 DQ18
57 19
10V 10V 88
VDD10 VSS25
127 R406 56
MEM1_ABS(1) BA1 DQ19 VDD11 VSS26 MEM1_ODT0
t
44 20 104 139 R374 56
110
DQ20
46 21
VDD12 VSS27
128 MEM1_ODT1
MEM1_CS0# S0* DQ21 VSS28
MEM1_CS1# 115
S1* DQ22
56 22 199
VDDSPD VSS29
145
MEM1_ABS(0) R371 56
58 23 165 R403 56
DQ23 VSS30 MEM1_ABS(1)
R363
m
30 61 24 83 171 56
CLK1_MCLK0 MEM1_ABS(2)
n
CK0 DQ24 NC1 VSS31
32 63 25 120 172
CLK1_MCLK0# 164
CK0* DQ25
73 26 50
NC2 VSS32
177 R373 56
CLK1_MCLK1 CK1 DQ26 MCH3_EXTTS0# NC3 VSS33 MEM1_ACAS#
166 75 27 69 187 R404 56
CLK1_MCLK1# 79
CK1* DQ27
62 28 163
NC4 VSS34
178 MEM1_ARAS# R372 56
a
MEM1_CKE0 CKE0 DQ28 NCTEST VSS35 MEM1_AWE#
e
80 64 29 190
MEM1_CKE1 CKE1 DQ29
74 30 1
VSS36
9
113
DQ30
76 31
MEM1_VREF VREF VSS37
21
MEM1_ACAS# 108
CAS* DQ31
123 32
C3605 C889 201
VSS38
33
MEM1_ARAS# 109
RAS* DQ32
125 33
100nF 2200nF
202
GND0 VSS39
155
MEM1_AWE#
S fid
WE* DQ33 10V GND1 VSS40
135 34 10V 34
DQ34 VSS41
R387 10K 1% MEM3_CHA_SA0_MN 198
SA0 DQ35
137 35 47
VSS1 VSS42
132
R388 10K 1% MEM3_CHA_SA1_MN 200
SA1 DQ36
124 36 133
VSS2 VSS43
144
197 126 37 183 156
SMB3_CLK 195
SCL DQ37
134 38 77
VSS3 VSS44
168
SMB3_DATA SDA DQ38
136 39 12
VSS4 VSS45
2
DQ39 VSS5 VSS46
114 141 40 48 3
MEM1_ODT0 119
ODT0 DQ40
143 41 184
VSS6 VSS47
15
MEM1_ODT1 ODT1 DQ41
151 42 78
VSS7 VSS48
27
MEM1_ADM(7:0) DQ42 VSS8 VSS49
n
0 10 153 43 71 39
1 26
DM0 DQ43
140 44 72
VSS9 VSS50
149
Place one cap close to every 2 pull-up resistors terminated to P0.9V
DM1 DQ44 VSS10 VSS51 P0.9V
2 52 142 45 121 161
DM2 DQ45 VSS11 VSS52
B 3 67
DM3 DQ46
152 46 122
VSS12 VSS53
28 B
4 130 154 47 196 40
o
5 147 157 48 193 138
6 170 159 49 8 150 C3773 C895 C3607 C927 C862 C912 C3175 C3366 C3393 C909 C3172 C3574 C926
7 185 173 50 162 nostuff
DM7 DQ50 VSS57
175 51 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF nostuff
MEM1_ADQS(7:0) 0 13
DQ51
158 52 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V nostuff
DQS0 DQ52 nostuff
1 31 160 53 3709-001325 nostuff
C
DQS1 DQ53
2 51 174 54 nostuff
DQS2 DQ54
3 70 176 55
DQS3 DQ55
4 131 179 56
DQS4 DQ56
5 148 181 57
DQS5 DQ57
6 169 189 58
DQS6 DQ58 ME POWER RAIL UNDER ME ENABLE
7 188 191 59
DQS7 DQ59
180 60
MEM1_ADQS#(7:0) 0 11
DQ60
182 61
DQS*0 DQ61
1 29
DQS*1 DQ62
192 62 Place near SO-DIMM0
2 49 194 63 C3913 0.012nF 50V P1.8V_AUX
DQS*2 DQ63 CLK1_MCLK0
3 68
DQS*3 CLK1_MCLK0# C3914 0.012nF 50V
4 129 C3915 0.012nF 50V
5 146
DQS*4 CLK1_MCLK1 C3916 0.012nF
DQS*5 CLK1_MCLK1#
50V EC522
6 167
DQS*6 220uF C3210 C3558 C878 C911 C3749 C3585 C3556 C3604 C3606
7 186 nostuff 2.5V 2200nF 2200nF 2200nF 2200nF 2200nF 100nF 100nF 100nF 100nF
DQS*7 AD
nostuff 10V 10V 10V 10V 10V 10V 10V 10V 10V
nostuff
nostuff nostuff
3709-001325
A EMC request A
DRAW DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP SODIMM_DDR2
BL Lee REV 1.0 SODIMM_DDR2 #1 BA41-01060A

April 11, 2009 10:05:58 AM PAGE 18 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
SAMSUNG ELECTRONICS CO’S PROPERTY. DDR SO-DIMM #1
MEM1_BDQ(63:0) P0.9V
D D
MEM1_BMA(14:0) 0 R338 56
1 R320 56
2 R337 56
DDR500-1 3 R319 56
P1.8V_AUX 4 R336 56
DDR2-SODIMM-200P-RVS 5 R318 56
MEM1_BMA(14:0)
1/2 DDR500-2 6 R334 56
0 102
A0 DQ0
5 0
DDR2-SODIMM-200P-RVS 7 R335 56
1 101
A1 DQ1
7 1 8 R317 56
2 100
A2 DQ2
17 2 2/2 9 R316 56
3 99
A3 DQ3
19 3 112
VDD1 VSS16
18 10 R322 56
4 98 4 4 111 24 11 R332 56
g
A4 DQ4 VDD2 VSS17
5 97
A5 DQ5
6 5 117
VDD3 VSS18
41 12 R315 56
6 94
A6 DQ6
14 6 96
VDD4 VSS19
53 13 R342 56
7 92 16 7 P3.3V 95 42 14 R333 56
A7 DQ7 VDD5 VSS20
8 93 23 8 118 54
A8 DQ8 VDD6 VSS21
9 91 25 9 81 59 R341 56
n
10 105
A9 DQ9
35 10 82
VDD7 VSS22
65 MEM1_CS2# R325 56
11 90
A10_AP DQ10
37 11 87
VDD8 VSS23
60
MEM1_CS3#
A11 DQ11 C3819 VDD9 VSS24
l
12 89 20 12 C923 103 66 R314 56
A12 DQ12 100nF VDD10 VSS25 MEM1_CKE2
13 116
A13 DQ13
22 13
10V
2200nF 88
VDD11 VSS26
127
MEM1_CKE3 R313 56
u
14 86 36 14 10V 104 139
A14 DQ14 VDD12 VSS27
84 38 15 128 R343 56
A15 DQ15 VSS28 MEM1_ODT2
R326
a
85 43 16 199 145 56
MEM1_BBS(2) A16_BA2 DQ16
45 17
VDDSPD VSS29
165 MEM1_ODT3
DQ17 VSS30
107 55 18 83 171 R321 56
s i
C MEM1_BBS(0) 106
BA0 DQ18
57 19 120
NC1 VSS31
172
MEM1_BBS(0)
R339 56
C
MEM1_BBS(1) BA1 DQ19
44 20 50
NC2 VSS32
177 MEM1_BBS(1) R331 56
DQ20 MCH3_EXTTS1# NC3 VSS33 MEM1_BBS(2)
t
110 46 21 69 187
MEM1_CS2# 115
S0* DQ21
56 22 163
NC4 VSS34
178 R324 56
MEM1_CS3# S1* DQ22 NCTEST VSS35 MEM1_BCAS#
DQ23
58 23
VSS36
190
MEM1_BRAS# R340 56
30 61 24 1 9 R323 56
CLK1_MCLK2 CK0 DQ24 MEM1_VREF VREF VSS37 MEM1_BWE#
m
32 63 25 21
CLK1_MCLK2#
n
CK0* DQ25 VSS38
164 73 26 201 33
CLK1_MCLK3 166
CK1 DQ26
75 27 C3682 C935 202
GND0 VSS39
155
CLK1_MCLK3# 79
CK1* DQ27
62 28
100nF
2200nF
GND1 VSS40
34
MEM1_CKE2 80
CKE0 DQ28
64 29
10V 10V 47
VSS41
132
a
MEM1_CKE3 CKE1 DQ29 VSS1 VSS42
e
74 30 133 144
DQ30 VSS2 VSS43
113 76 31 183 156
P3.3V MEM1_BCAS# 108
CAS* DQ31
123 32 77
VSS3 VSS44
168
MEM1_BRAS# 109
RAS* DQ32
125 33 12
VSS4 VSS45
2
MEM1_BWE# WE* DQ33
135 34 48
VSS5 VSS46
3
S fid
DQ34 VSS6 VSS47
R344 10K 1% MEM3_CHB_SA0_MN 198
SA0 DQ35
137 35 184
VSS7 VSS48
15
R345 10K 1% MEM3_CHB_SA1_MN 200
SA1 DQ36
124 36 78
VSS8 VSS49
27
197 126 37 71 39
SMB3_CLK 195
SCL DQ37
134 38 72
VSS9 VSS50
149
SMB3_DATA SDA DQ38
136 39 121
VSS10 VSS51
161
DQ39 VSS11 VSS52
114 141 40 122 28
MEM1_ODT2 119
ODT0 DQ40
143 41 196
VSS12 VSS53
40
MEM1_ODT3 ODT1 DQ41 VSS13 VSS54 Place one cap close to every 2 pull-up resistors terminated to P0.9V
151 42 193 138 P0.9V
MEM1_BDM(7:0) 0 10
DQ42
153 43 8
VSS14 VSS55
150
n
1 26 140 44 162
DM1 DQ44 VSS57
2 52 142 45
3 67
DM2 DQ45
152 46
C898 C3591 C3241 C887 C904 C3597 C928 C925 C881 C893 C867 C3622 C3424 nostuff
DM3 DQ46 3709-001327 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF nostuff
B 4 130
DM4 DQ47
154 47 nostuff B
5 147 157 48 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V nostuff
DM5 DQ48
o
6 170 159 49 nostuff
DM6 DQ49 nostuff
7 185 173 50
DM7 DQ50
175 51
MEM1_BDQS(7:0) 0 13
DQ51
158 52
DQS0 DQ52
1 31 160 53
DQS1 DQ53
2 51 174 54
C
DQS2 DQ54
3 70 176 55
DQS3 DQ55
4 131 179 56
DQS4 DQ56
5 148 181 57
DQS5 DQ57 P1.8V_AUX
6 169
DQS6 DQ58
189 58 Place near SO-DIMM1
7 188 191 59
DQS7 DQ59
180 60
MEM1_BDQS#(7:0) 0 11
DQ60
182 61
DQS*0 DQ61
1 29 192 62 C3917 0.012nF 50V EC11
DQS*1 DQ62 CLK1_MCLK2
2 49
DQS*2 DQ63
194 63
CLK1_MCLK2# C3918 0.012nF 50V 220uF C3427 C495 C493 C496 C3563 C3784 C899 C492 C491
3 68 C3919 0.012nF 50V 2.5V 2200nF 2200nF 2200nF 2200nF 2200nF 100nF 100nF 100nF 100nF
DQS*3 CLK1_MCLK3 AD
4 129
DQS*4 CLK1_MCLK3# C3920 0.012nF 50V 10V 10V 10V 10V 10V 10V 10V 10V 10V
5 146
DQS*5 nostuff
6 167 nostuff
DQS*6 nostuff
7 186 nostuff
DQS*7 nostuff
3709-001327
EMC request
A A
DRAW DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP SODIMM_DDR2
BL Lee REV 1.0 SODIMM_DDR2 #2 BA41-01060A

April 11, 2009 10:05:58 AM PAGE 19 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
Internal VR Strap
INTVRMEN Pull up C734 Y501
VccSus1_05, VccSus1_5, VccCL1_5 0.007nF 32.768KHz
D VccLAN1_05, VccCL1_05 D
P3.3V
1
R275
10M R384 10K 1%
4
KBC3_CPURST#
KBC3_A20G R347 10K 1%
2801-003856
C736
CHP3_XTALOUT_MN
CHP3_XTALIN_MN
0.007nF
U518-1
NH82801IBM
g
P3.3V_MICOM PRTC_BAT 1/5
C23 K5 0
LPC3_LAD(3:0)
RTCX1 FWH0_LAD0
C24 K4 1
PRTC_BAT RTCX2 FWH1_LAD1
L6
n
2
FWH2_LAD2
A25 K2 3
2
CHP3_RTCRST# F20
RTCRST# FWH3_LAD3
RTC
LPC
9-D4 19-B4
D519 R282 CHP3_ME_RTCRST# SRTCRST#
l
CHP3_INTRUDER#_R_MN 19-B3 9-D4 9-D4 19-B4 C22 K3
BAT54C CHP3_INTRUDER# 300K CHP3_INTRUDER# INTRUDER# FWH4_LFRAME# LPC3_LFRAME#
3
1% 9-D4 19-B3
C459 R255 1M P1.05V
u
CHP3_INTVRMEN_MN B22 J3
1000nF-X5R INTVRMEN LDRQ0#
A22 J1
1
LAN100_SLP LDRQ1#_GPIO23
a
E25 N7 R263
GLAN_CLK A20GATE
AJ27
KBC3_A20G
s i
C A20M# CPU1_A20M# 56 C
C13
R257 LAN_RTCSYNC
RTC1_BATT_R_MN
20K 1% AJ25
CHP3_RTCRST# DPRSTP# CPU1_DPRSTP#
t
19-B4 9-D4 F14 AE23
G13
LAN_RXD0 DPSLP# CPU1_DPSLP#
R253 LAN_RXD1
LAN / GLAN
0 D14 AJ26 CPU1_FERR#_R_MN
LAN_RXD2 FERR# CPU1_FERR#
R262 56
R254 20K 1% C3268
m
D13 AD22
CHP3_ME_RTCRST# CPU1_PWRGDCPU
n
LAN_TXD0 CPUPWRGD
19-B4 9-D4 0.015nF D12
nostuff LAN_TXD1
nostuff 50V E13 AF25
J21 RTC1_BATT_MN C460 C473 C732 LAN_TXD2 IGNNE# CPU1_IGNNE#
C3892
CPU
R697 1K 1000nF-X5R 1000nF-X5R 10000nF
B10 AE22 0.1nF
a
1 6.3V 6.3V 6.3V GLAN_DOCK#_GPIO56 INIT# CPU1_INIT#
e
For RTC Reset AG25 50V nostuff
2 P1.5V INTR CPU1_INTR
3 nostuff R733 22 CHP3_COMPIO_MN B28 L3
MNT1 HDA3_AUD_BCLK GLAN_COMPI RCIN# For ESD
MNT2
4 nostuff
HDA3_MDC_BCLK R732 22 R696 24.9 1% B27
GLAN_COMPO
MDC AF23 P1.05V
R751 22 HDA3_BCLK_R_MN AF6
NMI
AF24 CPU1_NMI KBC3_CPURST#
3711-000541 HDA3_AUD_SYNC CPU1_SMI#
S fid
HDA_BIT_CLK SMI#
HDR-2P-SMD R750 22 HDA3_SYNC_R_MN AH4 R268 C3900
HDA3_MDC_SYNC HDA_SYNC
AH27 0.1nF nostuff
MDC STPCLK# CPU1_STPCLK# 56
HDA3_AUD_RST# R726 22 HDA3_RST#_R_MN AE7
HDA_RST# For ESD 50V
Angel type R727 22 AG26 CPU1_THRMTRIP#_RR_MN
HDA3_MDC_RST# THRMTRIP# CPU1_THRMTRIP#
MDC HDA3_AUD_SDI0 AF4
HDA_SDIN0 R269 54.9 1%
AG4 AG27
IHDA
HDA3_MDC_SDI1 AH3
HDA_SDIN1 PECI
Place 56 ohm resistor within 2" of ICH9M
HDA_SDIN2
AE5
P3.3V HDA3_SDO_R_MN
HDA_SDIN3 Place PU resistor within 2" of 56ohm res.
R741
n
22 AG5
HDA3_AUD_SDO HDA_SDOUT
R740 22 AH11
SAT1_ESATA_RXN_C_MN 25V 10nF C930
HDA3_MDC_SDO SATA4RXN SAT1_ESATA_RXN
R354 AG7
HDA_DOCK_EN#_GPIO33 SATA4RXP
SAT1_ESATA_RXP_C_MN
AJ11 25V 10nF C3197 SAT1_ESATA_RXP
B 10K MDC AE8
HDA_DOCK_RS#_GPIO34 SATA4TXN
AG12
SAT1_ESATA_TXN_C_MN 25V 10nF C3560
SAT1_ESATA_TXN
B
1% AF12
SAT1_ESATA_TXP_C_MN 25V 10nF C920
SATA4TXP SAT1_ESATA_TXP
o
AG8
CHP3_SATALED# SATALED#
AH9
SATA5RXN
SAT1_HDD_RXN C748 10nF 25V AJ16
SAT1_HDD_RXN_C_MN
SATA0RXN SATA5RXP
AJ9
SATA
C747 10nF 25V AH16
SAT1_HDD_RXP_C_MN AE10
SAT1_HDD_RXP SATA0RXP SATA5TXN
SAT1_HDD_TXN C744 10nF 25V SAT1_HDD_TXN_C_MN
AF17
SATA0TXN SATA5TXP
AF10
SATA
C746 10nF 25V AG17
SAT1_HDD_TXP_C_MN
C
SAT1_HDD_TXP SATA0TXP
AH18
SATA_CLKN CLK1_SATA#
C759 10nF 25V AH13
SAT1_ODD_RXN_C_MN AJ18
SAT1_ODD_RXN C755 10nF 25V AJ13
SAT1_ODD_RXP_C_MN
SATA1RXN SATA_CLKP CLK1_SATA
SAT1_ODD_RXP SATA1RXP
SAT1_ODD_TXN C751 10nF 25V AG14
SAT1_ODD_TXN_C_MN
SATA1TXN SATARBIAS#
AJ7
C750 10nF 25V AF14
SAT1_ODD_TXP_C_MN AH7
SAT1_ODD_TXP SATA1TXP SATARBIAS SAT1_ARBIAS_MN
0904-002378
R357
24.9
1%
SATA Cap. Place ment :
Distance b/w the ICH9-M & cap on the "P" signal should be identical
distance b/w the ICH9-M & cap on the "N" signal same pair.
A A
DRAW DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP ICH_9M_B
BL Lee REV 1.0 ICH9-M (1/5) BA41-01060A

April 11, 2009 10:05:58 AM PAGE 20 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D D
U518-2 P3.3V
NH82801IBM
2/5
D11 F1 PCI3_REQ0#_MN R390 10K
AD0 PCI REQ0#
C8 G4 PCI3_GNT0#_MN
AD1 GNT0#
D9 B6
AD2 REQ1#_GPI050
E12
AD3 GNT1#_GPIO51
A7 R376
E9 F13 1K
AD4 REQ2#_GPIO52
C9 F12 1%
AD5 GNT2#_GPIO53
E10 E6
AD6 REQ3#_GPIO54
B7 F6
AD7 GNT3#_GPIO55
C7
g
AD8
C5 D8
AD9 C_BE0#
G11 B4
AD10 C_BE1#
F8 D6
AD11 C_BE2# PCI3_IRDY#_MN
F11 A5
AD12 C_BE3#
E7
n
AD13
A3
AD14 IRDY#
D3 R385 10K
D2 E3
AD15 PAR
l
F10 R1 PCI3_PCIRST#_MN
AD16 PCIRST#
D5
AD17 DEVSEL#
C6 PCI3_EDVSEL#_MN R352 10K
u
D10
AD18 PERR#
E4 PCI3_PERR#_MN R358 10K
B3
AD19 PLOCK#
C2 PCI3_PCLK#_MN R389 10K
R380
a
F7 J4 PCI3_SERR#_MN 10K
AD20 SERR#
C3
AD21 STOP#
A4 PCI3_STOP#_MN R377 10K
F3 F5 PCI3_TRDY#_MN R382 10K
s i
C F4
AD22 TRDY#
D7 PCI3_FRAME#_MN R351 10K
C
AD23 FRAME#
C1
AD24
t
G7 C14
H7
AD25 PLTRST#
D4 PLT3_RST_ORG#
D1
AD26 PCICLK
R2
CLK3_PCLKICH
AD27 PME#
G5
P3.3V AD28 P3.3V
m
H6
n
AD29
G1
AD30
H3
P3.3V AD31 1%
R361 10K CHP3_PIRGA#_MN J5 H4 10K
a
PIRQA# PIRQE#_GPIO2
e
R391 10K CHP3_PIRGB#_MN E1 Interrupt I/F K6 R761
PIRQB# PIRQF#_GPIO3
R353 10K CHP3_PIRGC#_MN J6
PIRQC# PIRQG#_GPIO4
F2
R360 10K R359 10K CHP3_PIRGD#_MN C4 G2 R762 0 nostuff
CHP3_SERIRQ PIRQD# PIRQH#_GPIO5 FFS3_INT_R_MN
FFS3_INT
R378 10K N29 E29 nostuff Boot BIOS Select
PCI3_CLKRUN# PEX1_MINIRXN1
S fid
PERN1 PCI - Express PERN5
N28 E28
PEX1_MINIRXP1 C462 100nF 10V PEX1_MINITXN1_C_MN P27
PERP1 PERP5
F27
PEX1_MINITXN1 PETN1 PETN5 BIOS PCI3_GNT0# SPI3_CS1#
PEX1_MINITXP1 C461 100nF 10V PEX1_MINITXP1_C_MN P26
PETP1 PETP5
F26
LPC option ; These are used with LPC P3.3V LPC HIGH HIGH
L29 C29
PEX1_MINIRXN2 L28
PERN2 PERN6_GLAN_RXN
C28 SPI LOW HIGH
PEX1_MINIRXP2 C464 100nF 10V PEX1_MINITXN2_C_MN M27
PERP2 PERP6_GLAN_RXP
D27
nostuff
PEX1_MINITXN2 PETN2 PETN6_GLAN_TXN PCI HIGH LOW
C463 100nF 10V PEX1_MINITXP2_C_MN M26 D26 R266
PEX1_MINITXP2 PETP2 PETP6_GLAN_TXP
1K
P3.3V
n
J29 1%
PEX1_EXPCARDRXN3 J28
PERN3 iTPM Disable
PEX1_EXPCARDRXP3 PERP3
PEX1_EXPCARDTXN3 C466 100nF 10V PEX1_EXPCARDTXN3_C_MN K27
PETN3
B C465 100nF 10V PEX1_EXPCARDTXP3_C_MN K26 SPI D23 SPI3_CLK_R_MN R278 12.1 1% B
PEX1_EXPCARDTXP3 PETP3 SPI_CLK
D24 SPI3_CS0#_R_MN R272 12.1 1% SPI3_CLK R265
SPI_CS0# SPI3_CS0# 10K
o
G29 F23
PEX1_GLAN_RXN4 G28
PERN4 SPI_CS1#_GPIO58_CLGPIO6
D25 R267 12.1 1%
PEX1_GLAN_RXP4 PERP4 SPI_MOSI SPI3_MOSI SPI3_CS1#_R_MN
PEX1_GLAN_TXN4 C468 100nF 10V PEX1_GLAN_TXN4__C_MN H27
PETN4 SPI_MISO
E23 SPI3_MOSI_R_MN
SPI3_MISO
C467 100nF 10V PEX1_GLAN_TXP4_C_MN H26
PEX1_GLAN_TXP4 PETP4
0904-002378
PLT3_RST_ORG#
SHORT557
P3.3V_AUX
2
5
3
+
-
U519
7SZ08
4
nostuff
R720
100K
1%
CC3893
0.1nF
50V
For ESD
nostuff
PLT3_RST#
AC caps : PCIE need to be within 250mils of the driver
Resistor for Test : Place Stuffing Option to minimize stubs
A R1005-SHORT A
DRAW DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP ICH_9M_B


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
EXCEPT AS AUTHORIZED BY SAMSUNG. P3.3V_AUX P3.3V_AUX
R311
U518-3
NH82801IBM
2.2K
2.2K
10K
1%
P3.3V_AUX 3/5
D P3.3V_AUX G16 V27
D
SMB3_CLK A13
SMBCLK DMI0RXN
V26
DMI1_RXN_0
SMB3_DATA SMBDATA DMI0RXP DMI1_RXP_0
R308
R327
SMB
R312 10K CHP3_LINKALERT#_MN E17 U29
SMB3_ALERT# CHP3_SMLINK0_MN C17
LINKALERT#_GPIO60_CLGPIO4 DMI0TXN
U28 DMI1_TXN_0
R292 CHP3_SMLINK1_MN B18
SMLINK0 DMI0TXP DMI1_TXP_0
P3.3V_AUX 10K SMLINK1
R305 1K 1% Y27
PEX3_WAKE# 1% F19
DMI1RXN
Y26
DMI1_RXN_1
RI# DMI1RXP
W29
DMI1_RXP_1
R4
DMI1TXN
W28
DMI1_TXN_1
R304 CHP3_SUSSTAT# SUS_STAT#_LPCPD# DMI1TXP DMI1_TXP_1
Direct Media Interface

10K G19
1% ITP3_DBRESET# SYS_RESET#
AB27
M6
DMI2RXN
AB26
DMI1_RXN_2
CHP3_PM_SYNC# PMSYNC#_GPIO0 DMI2RXP
AA29 DMI1_RXP_2
A17
DMI2TXN
AA28
DMI1_TXN_2
g
P3.3V_AUX SMB3_ALERT# SMALERT#_GPIO11 DMI2TXP DMI1_TXP_2
A14 AD27
SYS GPIO
CHP3_PCISTP# E19
STP_PCI#_GPIO15 DMI3RXN
AD26
DMI1_RXN_3
CHP3_CPUSTP# STP_CPU#_GPIO25 DMI3RXP
AC29 DMI1_RXP_3
P3.3V R298 DMI3TXN DMI1_TXN_3
L4 AC28
n
10K PCI3_CLKRUN# CLKRUN#_GPIO32 DMI3TXP DMI1_TXP_3
1%
R302 0 PEX3_WAKE#_R_MN E20 T26
PEX3_WAKE# WAKE# DMI_CLKN CLK1_PCIEICH# P1.5V
l
M5 T25
CHP3_SERIRQ AJ23
SERIRQ DMI_CLKP CLK1_PCIEICH
R288 10K 1% nostuff THM3_ALERT# THRM#
u
AF29
CHP3_BIOSWP# D21
DMI_ZCOMP
AF28 R256 24.9
nostuff VRM3_CPU_PWRGD VRMPWRGD DMI_IRCOMP
a
nostuff CHP3_DMI_COMP_MN 1% 1608
R349 10K 1% C3901 A20 F24 P3.3V
AUD3_SPKR PU : No Reboot Mode 0.1nF
TP8 CL_CLK0
B19
CHP3_CL_CLK_0
s i
C 50V nostuff C16
CL_CLK1 C
R329 4.7K Added by EMC CHP3_SLPS3# E16
SLP_S3#
F22
SMB3_DATA CHP3_SLPS4# SLP_S4# CL_DATA0 CHP3_CL_DATA_0 R694
P3.3V_AUX
t
G17 C19 3.24K
CHP3_SLPS5# SLP_S5# CL_DATA1
1%
R328 4.7K CHP3_CL_VREF0_MN
Controller Link
C10 C25
SMB3_CLK G20
S4_STATE#_GPIO26 CL_VREF0
A19
KBC3_PWRGD PWROK CL_VREF1
C722
m
R695
n
R355 M2 F21 100nF 453
CHP3_DPRSLPVR B13
DPRSLPVR_GPIO16 CL_RST0#
D18 CHP3_CL_RST_0# 10V 1%
Power MGT
10K BATLOW# CL_RST1#
1% R330 10K 1% CHP3_BATLOW#_MN
R3 A16
a
KBC3_PWRBTN# PWRBTN# MEM_LED_GPIO24
e
D20 C18
LAN_RST# ALERT#_GPIO10
0 R927 C11
R711 100 1% KBC3_RSMRST#_R_MN NETDETECT_GPIO14
D22 C20
KBC3_RSMRST# R5
RSMRST# WOL_EN_GPIO9
9-B4
48-C3
19-D3
CLK3_PWRGD CK_PWRGD
AC5
R710 USB3_P0-
S fid
USBP0N
10K R6 AC4
1% KBC3_PWRGD CLPWROK USBP0P
AD3 USB3_P0+
B16
USBP1N
AD2
USB3_WIMAX-
P3.3V SLP_M# USBP1P
AC1
USB3_WIMAX+
AG19
USBP2N
AC2
USB3_P2-
KBC3_EXTSMI# AH21
TACH1_GPIO1 USBP2P
AA5
USB3_P2+
CHP3_BIOSWP# AG21
TACH2_GPIO6 EHCI0 USBP3N
AA4 USB3_MINIPCIE2-
R297 KBC3_RUNSCI# TACH3_GPIO7 USBP3P USB3_MINIPCIE2+ USB0 : eSATA/Chargerble USB
NoWoofer A21 AB2
High No Woofer 10K KBC3_WAKESCI# GPIO8 USBP4N USB3_MMC- USB1 : WIMAX
1% C12 AB3
LANPHYPC_GPIO12 USBP4P USB3_MMC+ USB2 : Single USB
n
C21 AA1
Low Sub-Woofer AE18
ENGDET_GPIO13 USBP5N
AA2
USB3_BLUETOOTH- USB3 : HSDPA
P3.3V TACH0_GPIO17 USBP5P USB3_BLUETOOTH+
R309 CHP3_GPIO18 K1
GPIO18 USBP6N
W5
USB3_P6- USB4 : MMC Card
B Sub-Woofer 4.7K CHP3_GPIO20
AF8
GPIO20 USBP6P
W4
USB3_P6+ USB5 : Bluetooth B
5% AJ22 Y3
CHP3_BIOS_CRI# SCLOCK_GPIO22 USBP7N USB3_EXPCARD- USB6 : USB (Sub Board)
o
GPIO
R392 A9 Y2
SATA_PWR_EN0# D19 QRT_STATE0_GPIO27 USBP7P
W1 USB3_EXPCARD+ USB7 : Express Card
10K SATA_PWR_EN1# QRT_STATE1_GPIO28 USBP8N USB3_CAMERA-
1% L1 W2 USB8 : Camera
CHP3_SATACLKREQ#
AE19
SATACLKREQ#_GPIO35 USBP8P
V2
USB3_CAMERA+
P3.3V SLOAD_GPIO38 EHCI1 USBP9N USB10 : USB(Sub Board)
USB
R277 10K 1% CHP3_SDATAOUT0_MN AG22
SDATAOUT0_GPIO39 USBP9P
V3
R301 10K 1% CHP3_SDATAOUT1_MN AF21 U5
C
AH24
SDATAOUT1_GPIO48 USBP10N
U4 USB3_P10-
GPIO49 USBP10P USB3_P10+
R734 10K 1% CHP3_GPIO57_MN A8
GPIO57_CLGPIO5 USBP11N
U1
iTPM Disable nostuff USBP11P
U2
M7
AUD3_SPKR AJ24
SPKR
N4
MCH3_ICHSYNC# B21
MCH_SYNC# OC0#_GPIO59
N5
TP3 OC1#_GPIO40
MISC
AH20 N6
P3.3V PWM0 OC2#_GPIO41
AJ20 P6
PWM1 OC3#_GPIO42
AJ21 M1
PWM2 OC4#_GPIO43
N2
P3.3V OC5#_GPIO29
H1 M4
CLK3_ICH14 CLK14 OC6#_GPIO30
Clocks
AF3 M3
R393 R350 CLK3_USB48 CLK48 OC7#_GPIO31
N3
OC8#_GPIO44 Ext GFX Select
10K 10K R279 CHP3_SUSCLK_MN P1 N1
P3.3V SUSCLK OC9#_GPIO45
1% 1% nostuff P5 CHP3_EXTGFX_SEL_MN
10K OC10#_GPIO46
nostuff AH23
SATA0GP_GPIO21 OC11#_GPIO47
P3 R381 1K
CHP3_SATA4GP_MN AF19 1%
GPIO
SATA
SATA1GP_GPIO19
AE21 AG2
CHP3_GPIO18 CHP3_BIOS_CRI# SATA4GP_GPIO36 USBRBIAS
R273 47K AD20 AG1 R379 22.6 1%
CHP3_GPIO20 SATA5GP_GPIO37 USBRBIAS# CHP3_USBBIAS#_MN
A A
R707 0904-002378
0
R394 R346 DRAW DATE TITLE
nostuff
10K
1%
10K
1% CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
nostuff BIOS CRISIS RECOVER STRAP ELECTRONICS
nostuff
MK Kim MP ICH_9M_B
PLACE NEAR KEYBOARD APPROVAL REV PART NO.

( Put it a debugger connector)
April 11, 2009 10:05:58 AM PAGE 22 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
AD25
AD24
AC25
AC24
AE29
AE28
AE27
AE26
AE25
AB25
AB24
AA25
AA24
G25
H24
F25
VCC1_5_B_16
VCC1_5_B_15
VCC1_5_B_14
VCC1_5_B_13
VCC1_5_B_12
VCC1_5_B_11
VCC1_5_B_10
VCC1_5_B_09
VCC1_5_B_08
VCC1_5_B_07
VCC1_5_B_06
VCC1_5_B_05
VCC1_5_B_04
VCC1_5_B_03
VCC1_5_B_02
VCC1_5_B_01
EXCEPT AS AUTHORIZED BY SAMSUNG. H25
VCC1_5_B_17
J24
VCC1_5_B_18
J25
VCC1_5_B_19 P1.05V
K24
VCC1_5_B_20
K25
P1.5V VCC1_5_B_21
L23
330ohm@100MHz VCC1_5_B_22
L24
D L25
VCC1_5_B_23
C3762 C916
D
B32 VCC1_5_B_24
CHP3_P1.5V_5_B_MN M24 A15
BLM18PG181SN1 VCC1_5_B_25 VCC1_05_01
100nF 100nF
22000nF-X5R M25 B15 10V 10V
VCC1_5_B_26 VCC1_05_02
EC521 N23 C15
C475 C482 VCC1_5_B_27 VCC1_05_03
220uF C720 N24
VCC1_5_B_28 VCC1_05_04
D15
2.5V 20% 20% 2200nF N25 E15
AD VCC1_5_B_29 VCC1_05_05 P1.5V
6.3V 6.3V 10V P24 F15
VCC1_5_B_30 VCC1_05_06
22000nF-X5R P25 L11
nostuff
VCC1_5_B_31 VCC1_05_07
R24 L12
PRTC_BAT VCC1_5_B_32 VCC1_05_08 CHP3_P1.5V_VCCDMIPLL_MN
R25 L14
VCC1_5_B_33 VCC1_05_09
R26 L16
VCC1_5_B_34 VCC1_05_10 C719 B518
R27 L17 C721
VCCA3GP
VCC1_5_B_35 VCC1_05_11 10000nF BLM18PG181SN1
T24 L18 10nF
VCC1_5_B_36 VCC1_05_12 6.3V
Need switched P5V_ALW controled by alws_on C497 C484 T27 M11 25V
g
VCC1_5_B_37 VCC1_05_13
CORE
100nF 100nF T28 M18
VCC1_5_B_38 VCC1_05_14
10V 10V T29 P11
P5.0V_AUX P3.3V_AUX VCC1_5_B_39 VCC1_05_15
U24 P18
P5.0V P3.3V VCC1_5_B_40 VCC1_05_16 P1.05V
U25 T11 B33
2
2
VCC1_5_B_41 VCC1_05_17
V24 T18
n
VCC1_5_B_42 VCC1_05_18 CHP3_P1.05V_VCC_DMI_MN BLM18PG181SN1
BAT54A
BAT54A
V25 U11
D521 VCC1_5_B_43 VCC1_05_19
U23 U18
3
3
R410 R745 VCC1_5_B_44 VCC1_05_20 C499
D8
l
100 W24 V11
100 VCC1_5_B_45 VCC1_05_21 4700nF
1% W25 V12
1
1% 1
CHP3_P5.0V_V5REF_MN VCC1_5_B_46 VCC1_05_22 10V
u
K23 V14
VCC1_5_B_47 VCC1_05_23
C874
Y24
VCC1_5_B_48 U518-4 VCC1_05_24
V16 P1.05V
C775
a
Y25 V17
1000nF-X5R VCC1_5_B_49 VCC1_05_25
1000nF-X5R VCC1_05_26
V18
A23 NH82801IBM
s i
C VCCRTC
C488 C489
C749 C
4700nF
A6
V5REF 4/5 VCCDMIPLL
R29 100nF 100nF
10V
t
10V 10V
DMI
P1.5V CHP3_P5.0VAUX_VREF_SUS_MN AE1 W23
V5REF_SUS 0904-002378 VCC_DMI_1
Y23
CHP3_P1.5V_VCSATAPLL_MN VCC_DMI_2
AJ19
VCSATAPLL
m
B34 AB23
C924 C872
n
V_CPU_IO_1 P3.3V
BLM18PG181SN1 AC16 AC23
10000nF 1000nF-X5R VCC1_5_A_01 V_CPU_IO_2
AD15
6.3V 6.3V VCC1_5_A_02
C933 AD16
VCC1_5_A_03 VCC3_3_01
AG29
1000nF AE15
a
VCC1_5_A_04
e ARX
6.3V AF15
VCC1_5_A_05 VCC3_3_02
AJ6 C469 C458
AG15 P3.3V 100nF 100nF
VCC1_5_A_06
AH15 AC10 10V 10V
P1.5V VCC1_5_A_07 VCC3_3_07
AJ15
VCC1_5_A_08
VCCP CORE
AD19
S fid
VCC3_3_03
AC11
VCC1_5_A_09 VCC3_3_04
AF20 C3624 C3559
AD11 AG24 100nF 100nF
VCC1_5_A_10 VCC3_3_05 P3.3V
C888 AE11
VCC1_5_A_11 VCC3_3_06
AC20 10V 10V
1000nF AF11
6.3V
VCC1_5_A_12 ATX
AG10 B9
VCC1_5_A_13 VCC3_3_08 P3.3V
AG11 F9
AH10
VCC1_5_A_14 VCC3_3_09
G3 C3573 C905 C896
VCC1_5_A_15 VCC3_3_10 100nF 100nF
AJ10 G6
PCI
100nF
VCC1_5_A_16 VCC3_3_11 10V 10V
J2 10V
VCC3_3_12
n
AC9 J7
VCC1_5_A_17 VCC3_3_13 nostuff
K7 nostuff
VCC3_3_14
AC18
VCC1_5_A_18 C3590
B P1.5V AC19 AJ4 P3.3V_AUX 100nF B
VCC1_5_A_19 VCCHDA
HDA
10V
LOGIC_IO
o
AC21 AJ3
VCC1_5_A_20 VCCSUSHDA
G10
C3596 VCC1_5_A_21
100nF VCCSUS1_05_1
AC8 C3628
G9 F17 100nF Internal : P1.5V level
10V VCC1_5_A_22 VCCSUS1_05_2
AC12
VCC1_5_A_23
10V External : P3.3V level
AD8
C
VCCSUS1_5_1
AC13 F18 CHP3_VCCSUS1_5_2_MN
VCC1_5_A_24 VCCSUS1_5_2
AC14
VCC1_5_A_25
C3745
A18 100nF
CONTROL LINK VCCPSUS
VCCSUS3_3_01 P3.3V_AUX
AJ5 D16 10V
VCCUSBPLL VCCSUS3_3_02
D17
VCCSUS3_3_03
AA7 E22
VCC1_5_A_26 VCCSUS3_3_04
USB CORE
C3587 AB6
VCC1_5_A_27 CHP3_VCCL1_05_MN
100nF AB7
VCC1_5_A_28 VCCCL1_05
G22 C886 C897
10V AC6 CHP3_VCC1_5_MN 100nF 100nF
P3.3V VCC1_5_A_29
AC7 G23 10V 10V
VCC1_5_A_30 VCCCL1_5
C485 C486
A10
VCCLAN1_05_1 VCCCL3_3_1
A24 100nF
C483 100nF
C766 A11 B24 1000nF 10V
VCCLAN1_05_2 VCCCL3_3_2 10V
C3671 6.3V
LAN
100nF
100nF 10V A12
P1.5V VCCLAN3_3_1 P3.3V
10V B12
VCCLAN3_3_2 VCCPUSB
nostuff
nostuff
A27
VCCGLANPLL
GLAN POWER
D28
VCCSUS3_3_20
VCCSUS3_3_19
VCCSUS3_3_18
VCCSUS3_3_17
VCCSUS3_3_16
VCCSUS3_3_15
VCCSUS3_3_14
VCCSUS3_3_13
VCCSUS3_3_12
VCCSUS3_3_11
VCCSUS3_3_10
VCCSUS3_3_09
VCCSUS3_3_08
VCCSUS3_3_07
VCCSUS3_3_06
VCCSUS3_3_05
A D29
VCCGLAN1_5_1 A
VCCGLAN1_5_2
E26
P1.5V VCCGLAN1_5_3
E27 DRAW DATE TITLE
VCCGLAN1_5_4
A26
P3.3V_AUX MS Yang 12/05/2008
BONN-E SAMSUNG
VCCGLAN3_3 CHECK DEV. STEP
ELECTRONICS
P3.3V MK Kim MP ICH_9M_B
C910 C3801
T7
Y7
Y6
W7
W6
V7
V6
U7
U6
T6
T5
T4
T3
T2
T1
AF1
C3670 APPROVAL REV PART NO.

22nF 22nF
100nF BL Lee REV 1.0 ICH9-M (4/5) BA41-01060A
25V 25V
10V
April 11, 2009 10:05:58 AM PAGE 23 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
AC22
M12
M13
M14
M15
M16
M17
M23
M28
M29
H29
N11
N12
N13
K28
K29
L13
L15
L26
L27
J23
J26
J27
D D
H5
L2
L5
L7
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
AA26 N14
VSS_001 VSS_133
AA27 N15
VSS_002 VSS_134
AA3 N16
VSS_003 VSS_135
AA6 N17
VSS_004 VSS_136
AB1 N18
VSS_005 VSS_137
AA23 N26
VSS_006 VSS_138
AB28 N27
VSS_007 VSS_139
AB29 P12
VSS_008 VSS_140
AB4 P13
AB5
VSS_009 GND VSS_141
P14
VSS_010 VSS_142
AC17 P15
VSS_011 VSS_143
AC26 P16
g
VSS_012 VSS_144
AC27 P17
VSS_013 VSS_145
AC3 P2
VSS_014 VSS_146
AD1 P23
VSS_015 VSS_147
AD10 P28
VSS_016 VSS_148
AD12 P29
n
VSS_017 VSS_149
AD13 P4
VSS_018 VSS_150
AD14 P7
VSS_019 VSS_151
l
AD17 R11
VSS_020 VSS_152
AD18 R12
VSS_021 VSS_153
u
AD21 R13
VSS_022 VSS_154
AD28 R14
VSS_023 VSS_155
a
AD29 R15
VSS_024 VSS_156
AD4 R16
VSS_025 VSS_157
AD5 R17
s i
C AD6
VSS_026 VSS_158
R18
C
VSS_027 VSS_159
AD7 R28
VSS_028 VSS_160
t
AD9 T12
VSS_029 VSS_161
AE12 T13
VSS_030 VSS_162
AE13 T14
VSS_031 VSS_163
AE14 T15
VSS_032 VSS_164
m
AE16 T16
n
VSS_033 VSS_165
AE17 T17
VSS_034 VSS_166
AE2
VSS_035 U518-5 VSS_167
T23
AE20 B26
VSS_036 VSS_168
AE24 U12
a
VSS_037 NH82801IBM VSS_169
e
AE3 U13
VSS_038 VSS_170
AE4 U14
AE6
VSS_039
VSS_040
5/5 VSS_171
VSS_172
U15
AE9 U16
VSS_041 VSS_173
AF13 U17
S fid
VSS_042 0904-002378 VSS_174
AF16 AD23
VSS_043 VSS_175
AF18 U26
VSS_044 VSS_176
AF22 U27
VSS_045 VSS_177
AH26 U3
VSS_046 VSS_178
AF26 V1
VSS_047 VSS_179
AF27 V13
VSS_048 VSS_180
AF5 V15
VSS_049 VSS_181
AF7 V23
VSS_050 VSS_182
AF9 V28
VSS_051 VSS_183
n
AG13 V29
VSS_052 VSS_184
AG16 V4
VSS_053 VSS_185
AG18 V5
VSS_054 VSS_186
B AG20
VSS_055 VSS_187
W26 B
AG23 W27
VSS_056 VSS_188
o
AG3 W3
VSS_057 VSS_189
AG6 Y1
VSS_058 VSS_190
AG9 Y28
VSS_059 VSS_191
AH12 Y29
VSS_060 VSS_192
AH14 Y4
VSS_061 VSS_193
AH17 Y5
C
VSS_062 VSS_194
AH19 AG28
VSS_063 VSS_195
AH2 AH6
VSS_064 VSS_196
AH22 AF2
VSS_065 VSS_197
AH25 B25
VSS_066 VSS_198
AH28
VSS_067
AH5 A1
VSS_068 VSS_NCTF_01
AH8 A2
VSS_069 VSS_NCTF_02
AJ12 A28
VSS_070 VSS_NCTF_03
AJ14 A29
VSS_071 VSS_NCTF_04
AJ17 AH1
VSS_072 VSS_NCTF_05
AJ8 AH29
VSS_073 VSS_NCTF_06
B11 AJ1
VSS_074 VSS_NCTF_07
B14 AJ2
VSS_075 VSS_NCTF_08
B17 AJ28
VSS_076 VSS_NCTF_09
B2 AJ29
VSS_077 VSS_NCTF_10
B20 B1
VSS_078 VSS_NCTF_11
B29
VSS_079
VSS_080
VSS_081
VSS_082
VSS_083
VSS_084
VSS_085
VSS_086
VSS_087
VSS_088
VSS_089
VSS_090
VSS_091
VSS_092
VSS_093
VSS_094
VSS_095
VSS_096
VSS_097
VSS_098
VSS_099
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_NCTF_12
A A
B23
B5
B8
C26
C27
E11
E14
E18
E2
E21
E24
E5
E8
F16
F28
F29
G12
G14
G18
G21
G24
G26
G27
G8
H2
H23
H28
DRAW DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP ICH_9M_B

April 11, 2009 10:05:58 AM PAGE 24 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
SPI_BIOS_ROM
02 VERIFY REAL MODE 66 CONFIGURE ADVANCE CACHE REG.
03 DISABLE NMI 6A DISPLAY EXTERNAL CACHE SIZE
04 GET CPU TYPE 6C DISPLAY SHADOW MESSAGE
06 INIT. SYSTEM H/W 6E DISPLAY NON-DISPOSABLE SEGMENT
D 08 INIT. CHIPSET REG. 70 DISPLAY ERROR MESSAGE D
09 SET IN POST FLAG 72 CHECK FOR CONFIGURATION ERROR
0A INIT CPU.REG 74 TEST REAL-TIME CLOCK
0B CPU CACHE ON 76 CHECK FOR KEYBOARD EERROR
0C INIT.CACHE TO POST 7C SETUP HARDWARE INTERRUPT VECTOR
OE INIT. I/O VALUE 7E TEST COPROCESSER IF PRESENT
0F ENABLE THE L-BUS IDE 80 DISABLE ON-BOARD I/O PORT
10 INIT. POWER MANAGER 82 DETECT AND INSTALL EXT.RS232C
11 LOAD ALTERNATE REG. 84 DETECT AND INSTALL EXT.PARALLEL
13 PCI BUS MASTER RESET 86 RE-INIT. ON-BOARD I/O PORT
88 INIT. BIOS DATA ROM
WITH INITIAL POST VALUE 8A INIT.EXTENDED BIOS DATA AREA
14 INIT. KEYBOARD CONTROLLER 8C INIT. FDD CONTROLLER
16 CHECK CHECKSUM 9A SHADOW OPTION ROMS
18 8254 TIMER INIT. 9C SETUP POWER MANAGEMENT
g
1A 8237 DMA CONTROLLER INIT. 9E ENABLE H/W INTERRUPT
1C RESET INTERRUP CONTROLLER A0 SET TIME OF DAY
16MBit 20
22
TEST DRAM REFRESH
TEST 8742 KEYBOARD CONTROLLER
A4
A8
INIT. TYPEMATIC RATE
ERASE F2 PROMPT
U19 P3.3V
n
MX25L1605D
24 SET ES SEGMENT REG. TO 4GB AA SCAN FOR F2 KEY STROKE
26 ENABLE A20 AC ENTER SETUP
1 8 28 AUTO SIZING DRAM AE CLEAR IN POST FLAG
SPI3_CS0# CE* VDD
l
SPI3_MISO
R787 12.1 1% SPI3_MISO_R_MN 2
SO HOLD*
7 SPI3_HOLD#_MN 32 COMPUTE THE CPU SPEED B0 CHECK FOR ERRORS
CHP3_BIOSWP#
3
WP* SCK
6 R788 10K 1% SPI3_CLK 34 TESET CMOS RAM B2 POST DONE-PREPARE TO BOOT O/S
u
4 5 38 SHADOW SYSTEM BIOS ROM B4 ONE BEEP
VSS SI SPI3_MOSI
R789 3A AUTO SIZING CACHE B6 CHECK PASSWORD (OPTION)
C845
a
100K 1107-001709 3C CONFIGURE ADVANCED CHIPSET REG. B7 ACPI INIT
1% 100nF
3D LOAD ALTER REG. WITH CMOS VALUE BA DMI INIT
10V
s i
C C-die : 1107-001600 42 INIT. INTERRUPT VECTOR BE CLEAR SCREEN C
44 INIT. BIOS INTERRUPT C0 TRY BOOT WITH INT19
46 CHECK ROM COPYRIGHT NOTICE D0 INTERRUPT HANDLER ERROR
t
47 INIT. I20 SUPPORT IF INSTALLED D2 UNKNOWN INTERRUPT ERROR
48 CHECK VIDEO CONFIGURE AGAINST CMOS D4 PENDING INTERRUPT ERROR
49 INIT. PCI BUS AND DEVICE D6 SHUTDOWN 5
4A INIT. ALL VIDEO BIOS ROM D8 SHUTDOWN ERROR
m
4C SHADOW VIDEO BIOS ROM DA EXTENDED BLOCK MOVE
n
50 DISPLAY CPU TYPE AND SPEED DC SHUTDOWN 10
52 TEST KEYBOARD 89 ENABLE NMI
54 SET KEYCLICK IF ENABLED 90 INIT. HDD CONTROLLER
56 ENABLE KEYBOARD 91 INIT. LOCAL BUS HDD CONTROLLER
a e
58 TEST FOR UNEXPECTED INTERRUPTS 92 JUMP TO USER PATCH 2
5A DISPLAY " PRESS ...... SETUP" 94 DISABLE A20 ADDRESS LINE
5C TEST RAM GETWEEN 512K AND 640K 96 CLEAR HUGE ES SEGMENT REG.
60 TEST EXTENDED MEMORY 98 SEARCH FOR OPTION ROMS
62 TEST EXTENDED MEMORY ADDRESS LINE
S fid
64 JUMP TO USER PATCH 1
80H DECODER CONNECTOR
o n B
PLT3_RST#
CLK3_DBGLPC
LPC3_LFRAME#
LPC3_LAD(3)
LPC3_LAD(2)
LPC3_LAD(1)
C P3.3V
J504
HDR-10P-1R-SMD
1
2
3
4
5
6
7
8
LPC3_LAD(0) 9
A 11
10 A
MNT1
12
MNT2
DRAW DATE TITLE
3711-000386 MS Yang 12/05/2008

BONN-E SAMSUNG
Type : straight CHECK DEV. STEP
ELECTRONICS
MK Kim MP SPI_BIOS_ROM
BL Lee REV 1.0 SPI_BIOS_ROM BA41-01060A

April 11, 2009 10:05:58 AM PAGE 25 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL PEG1_TXP(15:0) 0 AA38 Y33 C242 100nF 16V 0 PEG1_RXP(15:0)
PROPRIETARY INFORMATION THAT IS PCIE_RX0P PCIE_TX0P
GFX3_SCL_MN GFX3_JTAG_TRSTB_MN
1 Y35
PCIE_RX1P PCIE_TX1P
W33 C246 100nF 16V 1
SAMSUNG ELECTRONICS CO’S PROPERTY. 2 W38 U33 C252 100nF 16V 2 PEG1_RXP0_C_MN
GFX3_SDA_MN GFX3_JTAG_TDI_MN PCIE_RX2P PCIE_TX2P PEG1_RXP1_C_MN
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS GFX3_GPIO8_MN GFX3_JTAG_TCK_MN 3 V35 U30 C263 100nF 16V 3 PEG1_RXP2_C_MN
EXCEPT AS AUTHORIZED BY SAMSUNG. GFX3_GPIO9_MN GFX3_JTAG_TMS_MN PCIE_RX3P PCIE_TX3P
GFX3_GPIO10_MN GFX3_JTAG_TDO_MN
4 U38
PCIE_RX4P PCIE_TX4P
T33 C269 100nF 16V 4 PEG1_RXP3_C_MN
5 T35 T30 C279 100nF 16V 5 PEG1_RXP4_C_MN
GFX3_GPIO14_MN GFX3_GENERICB_MN PCIE_RX5P PCIE_TX5P PEG1_RXP5_C_MN
GFX3_GPIO18_MN GFX3_GENRICC_MN 6 R38
PCIE_RX6P PCIE_TX6P
P33 C294 100nF 16V 6 PEG1_RXP6_C_MN
GFX3_GPIO19_MN GFX3_XTALOUT_MN 7 P35 P30 C301 100nF 16V 7 PEG1_RXP7_C_MN
GFX3_GPIO22_MN GFX3_H2SYNC_MN PCIE_RX7P PCIE_TX7P PEG1_RXP8_C_MN
GFX3_GPIO23_MN GFX3_V2SYNC_MN 8 N38 N33 C308 100nF 16V 8
M9X_TP NET NAME GFX3_NC_PWRGOOD_MN 9 M35
PCIE_RX8P
PCIE_RX9P
PCIE_TX8P
PCIE_TX9P
N30 C318 100nF 16V 9
PEG1_RXP9_C_MN
PEG1_RXP10_C_MN
D 10 L38
PCIE_RX10P PCIE_TX10P
L33 C321 100nF 16V 10 PEG1_RXP11_C_MN
D
P3.3V_GFX 11 K35 L30 C332 100nF 16V 11 PEG1_RXP12_C_MN
P1.8V_VDDDI PCIE_RX11P PCIE_TX11P PEG1_RXP13_C_MN
PCI EXPRESS INTERFACE

12 J38
PCIE_RX12P PCIE_TX12P
K33 C337 100nF 16V 12 PEG1_RXP14_C_MN
13 H35 J33 C345 100nF 16V 13 PEG1_RXP15_C_MN
R137
10K
U510-1 P1.8V_AVDD 14 G38
15 F35
PCIE_RX13P
PCIE_RX14P
PCIE_TX13P
PCIE_TX14P
K30
H33
C359
C351
100nF
100nF
16V
16V
14
15
1% M96-M 1/5 PEG1_TXN(15:0) 0 Y37
PCIE_RX15P
PCIE_RX0N
PCIE_TX15P
PCIE_TX0N
Y32 C248 100nF 16V 0 PEG1_RXN(15:0)
AK26
SCL
1 W36
PCIE_RX1N PCIE_TX1N
W32 C251 100nF 16V 1
AJ26 I2C AD39 2 V37 U32 C262 100nF 16V 2
SDA R CRT3_RED PCIE_RX2N PCIE_TX2N
R#
AD37 3 U36
PCIE_RX3N PCIE_TX3N
U29 C268 100nF 16V 3
4 T37 T32 C278 100nF 16V 4 PEG1_RXN0_C_MN
GENERAL PURPOSE I/O PCIE_RX4N PCIE_TX4N PEG1_RXN1_C_MN
AH20 AE36 5 R36 T29 C290 100nF 16V 5 PEG1_RXN2_C_MN
GFX3_GPIO0 GPIO_0 G CRT3_GREEN PCIE_RX5N PCIE_TX5N
AH18 AD35 6 P37 P32 C300 100nF 16V 6 PEG1_RXN3_C_MN
GFX3_GPIO1 AN16
GPIO_1 G# 7 N36
PCIE_RX6N PCIE_TX6N
P29 C306 100nF 16V 7 PEG1_RXN4_C_MN
GFX3_GPIO2 GPIO_2 PCIE_RX7N PCIE_TX7N PEG1_RXN5_C_MN
AH23 AF37 8 M37 N32 C314 100nF 16V 8 PEG1_RXN6_C_MN
g
GPIO_3_SMBDATA B CRT3_BLUE PCIE_RX8N PCIE_TX8N
AJ23
GPIO_4_SMBCLK B#
AE38 9 L36
PCIE_RX9N PCIE_TX9N
N29 C322 100nF 16V 9 PEG1_RXN7_C_MN
ADT3_SEL#_F_MN AH17 10 K37 L32 C330 100nF 16V 10 PEG1_RXN8_C_MN
GPIO_5_AC_BATT PCIE_RX10N PCIE_TX10N PEG1_RXN9_C_MN
AJ17 DAC1 AC36 11 J36 L29 C336 100nF 16V 11 PEG1_RXN10_C_MN
GFX3_VOLTID2 GPIO_6 HSYNC CRT3_HSYNC PCIE_RX11N PCIE_TX11N
C342 100nF
GFX3_DAC1_REST_MN
AK17 AC38 12 H37 K32 16V 12 PEG1_RXN11_C_MN
MCH3_BKLTEN GPIO_7_BLON VSYNC CRT3_VSYNC PCIE_RX12N PCIE_TX12N PEG1_RXN12_C_MN
AJ13 13 G36 J32 C349 100nF 13
n
16V
GPIO_8_ROMSO PCIE_RX13N PCIE_TX13N PEG1_RXN13_C_MN
AH15
GPIO_9_ROMSI
14 F37
PCIE_RX14N PCIE_TX14N
K29 C363 100nF 16V 14 PEG1_RXN14_C_MN
AJ16
GPIO_10_ROMSCK RSET
AB34
C209 C229 C210
15 E37
PCIE_RX15N PCIE_TX15N
H32 C354 100nF 16V 15 PEG1_RXN15_C_MN
l
AK16 R148 R156 R149
GFX3_GPIO11 AL16
GPIO_11
AD34
0.012nF 0.012nF 0.012nF
GFX3_GPIO12 GPIO_12 AVDD 150 150 150 50V 50V 50V CLOCK
u
AM16 AE34 1% 1% 1% AB35
GFX3_GPIO13 AM14
GPIO_13 AVSSQ CLK1_PEG AA36
PCIE_REFCLKP
GPIO_14_HPD2 CLK1_PEG# PCIE_REFCLKN
a
AM13 AC33
GFX3_VOLTID0 AK14
GPIO_15_PWRCNTL_0 VDD1DI
AC34
CLK3_GFX_27M_SS GPIO_16_SSIN VSS1DI CALIBRATION
AG30 AJ21 Y30 R160 1.24K 1% P1.1V
s i
C GPIO_17_THERMAL_INT R163 NC_1 PCIE_CALRP C
AN14 499 AK21 GFX3_PCIE_CALRP_MN
GPIO_18_HPD3 NC_2
AM17
GPIO_19_CTF
1% AH16
NC_PWRGOOD PCIE_CALRN
Y29 R165 2K 1%
t
AL13 AC30 GFX3_PCIE_CALRN_MN
GFX3_VOLTID1 AJ14
GPIO_20_PWRCNTL_1 R2
AC31 R142 10K 1%
GFX3_BBEN GPIO_21_BB_EN R2# LVDS CONTROL
AK13 AA30 AK27
AN13
GPIO_22_ROMCSB
AD30
PLT3_RST# PERSTB VARY_BL
AJ27
LCD3_BRIT
GPIO_23_CLKREQB G2 DIGON MCH3_LCDVDDON
m
AM23 AD31
n
JTAG_TRSTB G2#
AN23 AK35 AP34
Q18 D 3 AK23
JTAG_TDI
AF30 LCD1_BCLK AL36
TXCLK_UP_DPF3P TXCLK_LP_DPE3P
AR34 LCD1_ACLK
RHU002N06 AL24
JTAG_TCK B2
AF31
LCD1_BCLK# TXCLK_UN_DPF3N TXCLK_LN_DPE3N LCD1_ACLK#
JTAG_TMS B2#
G AM24 AJ38 AW37
a
ADT3_SEL# JTAG_TDO LCD1_BDATA0 TXOUT_U0P_DPF2P TXOUT_L0P_DPE2P LCD1_ADATA0
e
1 AJ19 AC32 AK37 AU35
AK19
GENERICA C
AD32 P1.8V_VDDDI P1.8V LCD1_BDATA0# TXOUT_U0N_DPF2N TXOUT_L0N_DPE2N LCD1_ADATA0#
S 2 GENERICB Y
AJ20 DAC2 AF32 B8 AH35 AR37
AK20
GENERICC COMP
AD29
LCD1_BDATA1 AJ36
TXOUT_U1P_DPF1P TXOUT_L1P_DPE1P
AU39
LCD1_ADATA1
AJ24
GENERICD H2SYNC
AC29 LCD1_BDATA1# TXOUT_U1N_DPF1N TXOUT_L1N_DPE1N LCD1_ADATA1#
PEG3_HPD_HDMI C198 C216 C131 BLM18PG181SN1
S fid
GENERICE_HPD4 V2SYNC
AH26 AG38 AP35
AH24
GENERICF
AG31
100nF 6.3V 6.3V LCD1_BDATA2 AH37
TXOUT_U2P_DPF0P TXOUT_L2P_DPE0P
AR35 LCD1_ADATA2
10V 1000nF-X5R 10000nF-X5R
GENERICG VDD2DI
AG32
LCD1_BDATA2# TXOUT_U2N_DPF0N TXOUT_L2N_DPE0N LCD1_ADATA2#
P1.8V VSS2DI P3.3V_GFX
AK24 nostuff AF35 AN36
HPD1 TXOUT_U3P TXOUT_L3P
AG36 LVTMDP AP37
P1.8V R115 AG33 P1.8V_A2VDDQ P1.8V TXOUT_U3N TXOUT_L3N
499 A2VDD
B18 GFX3_VREFG_MN B510
1% AH13 AD33 AU24 C146 100nF 10V
VREFG A2VDDQ TXCAP_DPA3P
AV23 C141 100nF 10V
PEG3_TXCP_HDMI
BLM18PG181SN1 C178 C177 C180 R118 C128 C597 BLM18PG181SN1
MUTI GFX TXCAM_DPA3N PEG3_TXCN_HDMI
C596 C600 C157
n
249 AF33 AR8 AT25 100nF 10V
10000nF 1000nF 100nF 100nF A2VSSQ 100nF DVPCNTL_MVP_0 TX0P_DPA2P PEG3_TX0P_HDMI
6.3V 6.3V 10V 1% 10V 10V 10V 6.3V AU8 DPA AR24 C148 100nF 10V
DVPCNTL_MVP_1 TX0M_DPA2N PEG3_TX0N_HDMI
R2SET
AA29 100nF 10000nF-X5R AP8
DVPCNTL_0 TX1P_DPA1P
AU26 C174 100nF 10V
PEG3_TX1P_HDMI
B AW8
DVPCNTL_1 TX1M_DPA1N
AV25 C167 100nF 10V
PEG3_TX1N_HDMI
B
GFX3_DAC2_R2SET_MN
PLL/CLOCK DDC/AUX AM26 AR3 AT27 C190 100nF 10V

P1.1V DDC1CLK CRT3_DDCCLK DVPCNTL_2 TX2P_DPA0P PEG3_TX2P_HDMI
o
GFX3_P1.8V_DPLL_PVDD_MN AM32 AN26 AR1 AR26 C183 100nF 10V
AN32
DPLL_PVDD DDC1DATA CRT3_DDCDATA AU1
DVPCLK TX2M_DPA0N
AR30 PEG3_TX2N_HDMI
B506 DPLL_PVSS DVPDATA_0 TXCBP_DPB3P
GFX3_P1.1V_DPLL_VDDC_MN AL27 AU3 AT29
AUX1N DVPDATA_1 TXCBM_DPB3N
AM27 AW3 AV31
BLM18PG181SN1 C574 C577 C579 AUX1P
AP6
DVPDATA_2 TX3P_DPB2P
AU30
10000nF 1000nF 100nF DVPDATA_3 DPB TX3M_DPB2N
6.3V 6.3V 10V AN31 AM19 AW5 AR32 PEG3_TXCP_HDMI_C_MN
C
DPLL_VDDC DDC2CLK
AL19 LCD3_EDID_CLK AU5
DVPDATA_4 TX4P_DPB1P
AT31 PEG3_TXCN_HDMI_C_MN
DDC2DATA LCD3_EDID_DATA AR6
DVPDATA_5 TX4M_DPB1N
AT33 PEG3_TX0P_HDMI_C_MN
DVPDATA_6 TX5P_DPB0P PEG3_TX0N_HDMI_C_MN
R593 100 CLK3_GFX_27M_MN AV33 AM20 AW6 AU32 PEG3_TX1P_HDMI_C_MN
CLK3_GFX_27M 1% AU34
XTALIN AUX2N
AN20 AU6
DVPDATA_7 TX5M_DPB0N
AU14 PEG3_TX1N_HDMI_C_MN
XTALOUT AUX2P R155 DVPDATA_8 TXCCP_DPC3P PEG3_TX2P_HDMI_C_MN
R592 715 AT7 AV13
DVPDATA_9 TXCCM_DPC3N PEG3_TX2N_HDMI_C_MN
150 AL30 1% AV7 AT15
DDCCLK_AUX3P DVPDATA_10 TX0P_DPC2P
1% AM30 AN7 AR14
DDCDATA_AUX3N DVPDATA_11 TX0M_DPC2N
AV9 DPC AU16
DVPDATA_12 TX1P_DPC1P
AL29 AT9 AV15
DDCCLK_AUX4P DVPDATA_13 TX1M_DPC1N
AF29 AM29 AR10 AT17
GFX3_THERMDP AG29
DPLUS DDCDATA_AUX4N
AW10
DVPDATA_14 TX2P_DPC0P
AR16
GFX3_THERMDN DMINUS THERMAL DVPDATA_15 TX2M_DPC0N
AN21 AU10 AU20
P1.8V DDCCLK_AUX5P DVPDATA_16 TXCDP_DPD3P
AM21 AP10 AT19
DDCDATA_AUX5N P1.8V DVPDATA_17 TXCDM_DPD3N
B19 AK32 AV11 AT21
GFX3_P1.8V_TSVDD_MN AJ32
TS_FDO DVPDATA_18 TX3P_DPD2P
AJ30 AT11 AR20
TSVDD DDC6CLK PEG3_HDMI_CLK DVPDATA_19 TX3M_DPD2N
AJ33 AJ31 R585 10K 1% AR12 DPD AU22
BLM18PG181SN1 C196 C191 C192 TSVSS DDC6DATA PEG3_HDMI_DATA
R587 10K 1% AW12
DVPDATA_20 TX4P_DPD1P
AV21
10000nF 1000nF 100nF DVPDATA_21 TX4M_DPD1N
6.3V 6.3V 10V NC_DDCCLK_AUX7P
AK30 R586 10K 1% AU12
DVPDATA_22 TX5P_DPD0P
AT23
NC_DDCDATA_AUX7N
AK29 R584 10K 1% AP12
DVPDATA_23 TX5M_DPD0N
AR22
P1.8V P1.8V_AVDD
A nostuff A
0904-002460 BLM18PG181SN1 nostuff
GFX3_DVPDATA_20_MN nostuff
GFX3_DVPDATA_21_MN nostuff DRAW DATE TITLE
B524
M92-LP : 0904-002461 C3873 C3875
C3874
GFX3_DVPDATA_22_MN
GFX3_DVPDATA_23_MN
MS Yang 12/05/2008
BONN-E SAMSUNG
10000nF-X5R 1000nF-X5R CHECK DEV. STEP
100nF ELECTRONICS
6.3V 6.3V
10V
MK Kim MP EXT_GFX
BL Lee REV 1.0 M9x (1/5) BA41-01060A

April 11, 2009 10:05:58 AM PAGE 26 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
U510-5
PEG1_DQA(63:0)
M96-M 5/5 PEG1_MAA(12:0) PEG1_DQC(63:0) PEG1_MAC(12:0)
0 C37 G24 0 0 C5 P8 0
DQA_0 MAA_0 DQB_0 MAB_0
1 C35 J23 1 1 C3 T9 1
D 2 A35
DQA_1 MAA_1
H24 2 2 E3
DQB_1 MAB_1
P9 2
D
3 E34 J24 3 3 E1 N7 3
4 G32 H26 4 4 F1 N8 4
5 D33 J26 5 5 F3 N9 5
6 F32 H21 6 6 F5 U9 6
7 E32 G21 7 7 G4 U8 7
8 D31 H19 8 8 H5 Y9 8
9 F30 H20 9 9 H6 W9 9
10 C30 L13 10 10 J4 AC8 10
11 A30 G16 11 11 K6 AC9 11
12 F28 J16 12 12 K5 AA7 12
13 C28
DQA_12 MAA_12
H16 2
PEG1_BAA(2:0) 13 L4
DQB_12 MAB_12
AA8 2
PEG1_BAC(2:0)
DQA_13 MAA_BA2 DQB_13 MAB_BA2
14 A28 J17 0 14 M6 Y8 0
15 E28 H17 1 15 M1 AA9 1
g
16 D27 16 M3
17 F26
DQA_16
A32 0
PEG1_DQMA(7:0) 17 M5
DQB_16
H3 0
PEG1_DQMC(7:0)
DQA_17 DQMA_0 DQB_17 DQMB_0
18 C26 C32 1 18 N4 H1 1
19 A26 D23 2 19 P6 T3 2
20 F24 E22 3 20 P5 T5 3
n
21 C24 C14 4 21 R4 AE4 4
22 A24 A14 5 22 T6 AF5 5
l
23 E24 E10 6 23 T1 AK6 6
MEMORY INTERFACE A
MEMORY INTERFACE B
24 C22 D9 7 24 U4 AK5 7
u
25 A22 25 V6
26 F22
DQA_25
C34 0 PEG1_RDQSA(7:0) 26 V1
DQB_25
F6 0 PEG1_RDQSC(7:0)
DQA_26 RDQSA_0 DQB_26 RDQSB_0
a
27 D21 D29 1 27 V3 K3 1
28 A20 D25 2 28 Y6 P3 2
29 F20 E20 3 29 Y1 V5 3
s i
C 30 D19
DQA_29 RDQSA_3
E16 4 30 Y3
DQB_29 RDQSB_3
AB5 4
C
31 E18 E12 5 31 Y5 AH1 5
t
32 C18 J10 6 32 AA4 AJ9 6
33 A18 D7 7 33 AB6 AM5 7
34 F18 34 AB1
35 D17
DQA_34
A34 0
PEG1_WDQSA(7:0) 35 AB3
DQB_34
G7 0
PEG1_WDQSC(7:0)
DQA_35 WDQSA_0 DQB_35 WDQSB_0
m
36 A16 E30 1 36 AD6 K1 1
n
37 F16 E26 2 37 AD1 P1 2
38 D15 C20 3 38 AD3 W4 3
39 E14 C16 4 39 AD5 AC4 4
40 F14 C12 5 40 AF1 AH3 5
a
e
41 D13 J11 6 41 AF3 AJ8 6
42 F12 F8 7 42 AF6 AM3 7
43 A12 43 AG4
DQA_43 DQB_43
44 D11 J21 44 AH5 T7
45 F10
DQA_44 ODTA0
G19 PEG1_ODTA0 45 AH6
DQB_44 ODTB0
W7 PEG1_ODTC0
PEG1_ODTA1 PEG1_ODTC1
S fid
DQA_45 ODTA1 DQB_45 ODTB1
46 A10 46 AJ4
DQA_46 DQB_46
47 C10 H27 47 AK3 L9
48 G13
DQA_47 CLKA0
G27
PEG1_MCLKA0 48 AF8
DQB_47 CLKB0
L8
PEG1_MCLKC0
49 H13
DQA_48 CLKA0# PEG1_MCLKA0# 49 AF9
DQB_48 CLKB0# PEG1_MCLKC0#
DQA_49 DQB_49
50 J13 J14 50 AG8 AD8
51 H11
DQA_50 CLKA1
H14
PEG1_MCLKA1 51 AG7
DQB_50 CLKB1
AD7
PEG1_MCLKC1
52 G10
DQA_51 CLKA1# PEG1_MCLKA1# 52 AK9
DQB_51 CLKB1# PEG1_MCLKC1#
DQA_52 DQB_52
53 G8 K23 53 AL7 T10
54 K9
DQA_53 RASA0#
K19 PEG1_RASA0# 54 AM8
DQB_53 RASB0#
Y10 PEG1_RASC0#
DQA_54 RASA1# PEG1_RASA1# DQB_54 RASB1# PEG1_RASC1#
n
55 K10 55 AM7
DQA_55 DQB_55
56 G9 K20 56 AK1 W10
57 A8
DQA_56 CASA0#
K17
PEG1_CASA0# 57 AL4
DQB_56 CASB0#
AA10
PEG1_CASC0#
B 58 C8
DQA_57 CASA1# PEG1_CASA1# 58 AM6
DQB_57 CASB1# PEG1_CASC1# B
P1.5V DQA_58 P1.5V DQB_58
59 E8 K24 59 AM1 P10
DQA_59 CSA0_0# PEG1_CSA00# DQB_59 CSB0_0# PEG1_CSC00#
o
60 A6 K27 60 AN4 L10
DQA_60 CSA0_1# DQB_60 CSB0_1#
61 C6 61 AP3
DQA_61 DQB_61
R202 62 E6 M13 R169 62 AP1 AD10
63 A5
DQA_62 CSA1_0#
K16
PEG1_CSA10# 63 AP5
DQB_62 CSB1_0#
AC10
PEG1_CSC10#
100 DQA_63 CSA1_1# 100 DQB_63 CSB1_1#
1% 1%
GFX3_MVREFDA_MN L18 K21 GFX3_MVREFDB_MN Y12 U10
C
L20
MVREFDA CKEA0
J20 PEG1_MCKEA0 AA12
MVREFDB CKEB0
AA11 PEG1_MCKEC0
MVREFSA CKEA1 PEG1_MCKEA1 MVREFSB CKEB1 PEG1_MCKEC1
R198 L27 K26 R166 N10
NC_MEM_CALRN0 WEA0# PEG1_WEA0# C254 C233 WEB0# PEG1_WEC0#
100 C352 C309 N12
NC_MEM_CALRN1 WEA1#
L15
PEG1_WEA1# 100 100nF 100nF WEB1#
AB11
PEG1_WEC1#
1% 100nF 100nF AG12 1%
NC_MEM_CALRN2 10V 10V
P1.5V
10V 10V AF28
GFX3_MEM_CALRP1_MN M12
RSVD_1 GFX3_TESTEN_MN R146 4.7K
AG28 AD28
MEM_CALRP1 RSVD_2 TESTEN
M27 AL31
NC_MEM_CALRP0 RSVD_3
AH12 GFX3_CLKTESTA_MN AK10
NC_MEM_CALRP2 CLKTESTA
R184 H23 GFX3_CLKTESTB_MN AL10 AH11
RSVD_5
J19
CLKTESTB DRAM_RST PEG1_DRAMRST#
240 RSVD_6
T8 R143
RSVD_9
W8
C188
RSVD_11 4.7K 1000nF-X5R
R152 R147 R138 6.3V
0904-002460 1K 4.7K 4.7K
1%
nostuff
A A
DESIGN DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP EXT_GFX
BL Lee REV 1.0 M9x (2/5) BA41-01060A

April 11, 2009 10:05:58 AM PAGE 27 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
U510-4
D M96-M 4/5 D
DP C/D POWER DP A/B POWER
AP20 AN24
NC_DPC_VDD18_1 NC_DPA_VDD18_1
AP21 AP24
NC_DPC_VDD18_2 NC_DPA_VDD18_2
P1.1V P1.1V
GFX3_P1.1V_DPC_VDD10_MN GFX3_P1.1V_DPA_VDD10_MN B7
AP13 AP31
DPC_VDD10_1 DPA_VDD10_1
AT13 AP32
SHORT551 INSTPAR C125 C126 C122 DPC_VDD10_2 DPA_VDD10_2 C134 C139 C132 BLM18PG181SN1
10000nF-X5R 1000nF-X5R 100nF 100nF 1000nF 10000nF
6.3V 6.3V 10V 10V 6.3V 6.3V
AN17 AN27
DPC_VSSR_1 DPA_VSSR_1
AP16 AP27
nostuff DPC_VSSR_2 DPA_VSSR_2
nostuff AP17 AP28
g
AW14 AW24
AW16 AW26
n
AP22 AP25
NC_DPD_VDD18_1 NC_DPB_VDD18_1
AP23 AP26
NC_DPD_VDD18_2 NC_DPB_VDD18_2
l
P1.1V P1.1V
u
SHORT552 INSTPAR GFX3_P1.1V_DPD_VDD10_MN AP14 AN33 GFX3_P1.1V_DPB_VDD10_MN SHORT553 INSTPAR
DPD_VDD10_1 DPB_VDD10_1
a
AP15 AP33
C120 C127 C123 DPD_VDD10_2 DPB_VDD10_2 C169 C153 C145
10000nF-X5R 1000nF-X5R 100nF 100nF 1000nF-X5R 10000nF-X5R
s i
C 6.3V 6.3V 10V 10V 6.3V 6.3V C
nostuff
AN19 AN29 nostuff
nostuff DPD_VSSR_1 DPB_VSSR_1
t
nostuff AP18 AP29
DPD_VSSR_2 DPB_VSSR_2
AP19 AP30
AW20 AW30
DPD_VSSR_4 DPB_VSSR_4 P1.8V
AW22 AW32
m
B6
n
P1.8V P1.8V_DPE GFX3_P1.8V_DPA_PVDD_MN
GFX3_DPCD_CALR_MN
B20 R588 150 C576 C578 C118 BLM18PG181SN1
R591 150 AW18
DPCD_CALR DPAB_CALR
AW28 100nF 1000nF 10000nF
1% 1%
a
10V 6.3V 6.3V
BLM18PG181SN1 C211 C212 C213 C200
e
GFX3_DPAB_CALR_MN
10000nF 1000nF-X5R 100nF 1000nF-X5R
6.3V 6.3V 10V 6.3V DP E/F POWER DP PLL POWER
AH34 AU28
DPE_VDD18_1 DPA_PVDD P1.8V
AJ34 AV27
DPE_VDD18_2 DPA_PVSS
S fid
P1.1V P1.1V_DPE
B13 C152 C149
AL33
DPE_VDD10_1 DPB_PVDD
AV29 C156 1000nF-X5R 10000nF-X5R
AM33 AR28 100nF 6.3V 6.3V
BLM18PG181SN1 C163 C162 C182 DPE_VDD10_2 DPB_PVSS 10V
10000nF 1000nF 100nF
6.3V 6.3V 10V
AN34 AU18
DPE_VSSR_1 DPC_PVDD
AP39 AV17
DPE_VSSR_2 DPC_PVSS C113 C110
C168
n
AR39
DPE_VSSR_3 1000nF-X5R 10000nF-X5R
AU37 100nF 6.3V 6.3V
DPE_VSSR_4
AW35 10V
DPE_VSSR_5
B DPD_PVDD
AV19 B
P1.8V_DPE AR18
DPD_PVSS
o
AF34 nostuff
DPF_VDD18_1 C155 C116 nostuff
AG34
DPF_VDD18_2 C144 1000nF-X5R 10000nF-X5R nostuff
P3.3V_GFX CONTROL CIRCUIT P1.1V_DPE DPE_PVDD
DPE_PVSS
AM37
AN38
100nF
10V
6.3V 6.3V nostuff
nostuff
nostuff
C
AK33
DPF_VDD10_1
AK34
DPF_VDD10_2
AL38
P3.3V_AUX P3.3V_GFX NC_DPF_PVDD P1.8V
AM35
NC_DPF_PVSS
GFX3_P1.8V_DPE_PVDD_MN B509
Q25 AF39
DPF_VSSR_1
SI2315BDS-T1 AH39
AK39
DPF_VSSR_2 C592 C593 C591 BLM18PG181SN1
DPF_VSSR_3 100nF 1000nF 10000nF
3
AL34
2
DPF_VSSR_4 10V 6.3V 6.3V

D
S
AM34
DPF_VSSR_5
1
R150
G
C611
100nF 10K
10V
R918 10K P3.3VGFX_QR_MN R139 150 AM39
DPEF_CALR
1%
D 3 GFX3_DPEF_CALR_MN 0904-002460
Q24 C3910
R919 1000nF-X5R
R628 G RHU002N06 10K
P1.1V_PWRGD 10K
6.3V
1
S 2
A C620 nostuff A
220nF
10V
DESIGN DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP EXT_GFX
BL Lee REV 1.0 M9x (3/5) BA41-01060A

April 11, 2009 10:05:58 AM PAGE 28 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL M96-M U510-3 3 / 5 P1.8V
PROPRIETARY INFORMATION THAT IS MEM I/O PCIE
SAMSUNG ELECTRONICS CO’S PROPERTY. GFX3_P1.8V_PCIE_VDDR_MN B21
G11 V28
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS VDDR1_1 PCIE_VDDR_1
G14 W29
EXCEPT AS AUTHORIZED BY SAMSUNG. G17
VDDR1_2 PCIE_VDDR_2
W30
C239 C270 C231 C232 C261 C249 C230 BLM18PG181SN1
VDDR1_3 PCIE_VDDR_3 100nF 100nF 100nF 1000nF 1000nF 1000nF 10000nF
G20 Y31
VDDR1_4 PCIE_VDDR_4 10V 10V 10V 6.3V 6.3V 6.3V 6.3V
G23 AA31
VDDR1_5 PCIE_VDDR_5
G26 AA32
P1.5V VDDR1_6 PCIE_VDDR_6 nostuff
G29 AA33
VDDR1_7 PCIE_VDDR_7 P1.1V
H10 AA34
VDDR1_8 PCIE_VDDR_8
J7
D J9
VDDR1_9
G30
D
C187 C217 C288 C186 C324 C311 C282 C302 K8
VDDR1_10 PCIE_VDDC_1
G31
1000nF 1000nF 1000nF 1000nF 1000nF 1000nF 1000nF 1000nF
K11
H29
C328 C295 C281 C305 C303 C316 C357
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V VDDR1_12 PCIE_VDDC_3 100nF 100nF 1000nF 1000nF 1000nF 1000nF 10000nF
K13 H30
VDDR1_13 PCIE_VDDC_4 10V 10V 6.3V 6.3V 6.3V 6.3V 6.3V
L7 J29
nostuff VDDR1_14 PCIE_VDDC_5
L12 J30
VDDR1_15 PCIE_VDDC_6 nostuff
L16 L28
L21 M28
C223 C344 C341 C260 C329 C348 C343 C313 L23
N28
1000nF 1000nF 1000nF 1000nF 1000nF 1000nF 1000nF 1000nF VDDR1_18 PCIE_VDDC_9
6.3V L26 R28
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V VDDR1_19 PCIE_VDDC_10 EGFX_CORE
M11 T28
nostuff VDDR1_20 PCIE_VDDC_11
nostuff N11 U28
P7
VDDR1_22
R11 CORE M16
g
VDDR1_23 VDDC_1
U7 M18
C355 C185 C325 C208 C199 C327 C280 C340 U11
VDDR1_24 VDDC_2
M23
C234 C257 C201 C258 C297 C227 C310 C224 C259
10000nF 10000nF 10000nF 10000nF 100nF 100nF 100nF 100nF VDDR1_25 VDDC_3 1000nF 1000nF 1000nF 1000nF 1000nF 1000nF 1000nF 1000nF 1000nF
10V Y7 M26
6.3V 6.3V 6.3V 6.3V 10V 10V 10V VDDR1_26 VDDC_4 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
Y11 N15 nostuff
VDDR1_27 VDDC_5 nostuff
AC7 N17
n
nostuff VDDR1_28 VDDC_6
nostuff AD11 N20
P1.8V AF7
VDDR1_29 VDDC_7
N22
VDDR1_30 VDDC_8
l
B9 AG10 N24
GFX3_P1.8V_VDD_CT_MN AJ7
VDDR1_31 VDDC_9
N27
C235 C275 C298 C207 C244 C256 C272 C273 C299
VDDR1_32 VDDC_10 1000nF 1000nF 1000nF 1000nF 1000nF 1000nF 1000nF 1000nF 1000nF
u
BLM18PG181SN1 AK8 R13 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
C154 C203 C215 C184 C195 AL9
VDDR1_33 VDDC_11
R16
POWER
10000nF 1000nF 1000nF 100nF 1000nF
a
R18 nostuff nostuff
6.3V 6.3V 6.3V 10V 6.3V VDDC_13
R21
VDDC_14
R23
s i
C LEVEL VDDC_15 C
P3.3V_GFX TRANSLATION R26
AF26
VDDC_16
T15 C240 C219 C206 C247 C228 C218 C202 C255 C237
VDD_CT_1 VDDC_17 1000nF 1000nF 1000nF 1000nF 1000nF 1000nF 1000nF 1000nF 1000nF
t
AF27 T17 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
VDD_CT_2 VDDC_18 nostuff
AG26 T20
C175 C189 C194 AG27
VDD_CT_3 VDDC_19
T22
nostuff
10000nF 1000nF 1000nF VDD_CT_4 VDDC_20 nostuff
T24
6.3V 6.3V 6.3V VDDC_21
m
T27
n
VDDC_22
I/O U16
P1.8V AF23
VDDC_23
U18 C284 C296 C312 C265 C245 C220 C271 C236 C274
VDDR3_1 VDDC_24 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF
B11 AF24 U21
GFX3_P1.8V_VDDR5_MN VDDR3_2 VDDC_25 10V 10V 10V 10V 10V 10V 10V 10V 10V
AG23 U23
a
e
BLM18PG181SN1 AG24 U26
C151 C165 C173 VDDR3_4 VDDC_27
V15
10000nF-X5R 1000nF-X5R 100nF VDDC_28
6.3V 6.3V V17
10V VDDC_29
AF13 V20
AF15
VDDR5_1 VDDC_30
V22 C289 C250 C267 C222 C193 C238
S fid
VDDR5_2 VDDC_31 10000nF 10000nF 10000nF 10000nF 10000nF 10000nF
B10 AG13 V24 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
GFX3_P1.8V_VDDR4_MN VDDR5_3 VDDC_32
AG15 V27
VDDR5_4 VDDC_33
BLM18PG181SN1 Y16
C150 C172 C164 VDDC_34
Y18
nostuff
10000nF-X5R 1000nF-X5R 100nF VDDC_35 nostuff
6.3V 6.3V AD12 Y21
10V VDDR4_1 VDDC_36
AF11 Y23
VDDR4_2 VDDC_37
AF12 Y26
VDDR4_3 VDDC_38
AG11 Y28
VDDR4_4 VDDC_39
AA15
P1.5V VDDC_40
n
AA17
VDDC_41
B26 MEM CLK AA20
GFX3_P1.8V_VDDRHA_MN VDDC_42
AA22
VDDC_43
B BLM18PG181SN1 C326
M20
VDDRHA VDDC_44
AA24 B
M96 M21 AA27
1000nF VSSRHA VDDC_45
o
6.3V M96 AB13
M96 VDDC_46
R920 0
VDDC_47
AB16
V12 AB18
VDDRHB VDDC_48
B23 U12 AB21
GFX3_P1.8V_VDDRHB_MN VSSRHB VDDC_49
AB23
VDDC_50
BLM18PG181SN1 AB26
C
C264 VDDC_51
AB28 EGFX_CORE
1000nF VDDC_52
6.3V PLL AC12
VDDC_53
AC15 B24
VDDC_54 GFX3_GCORE_VDDCI_MN
AB37 AC17
PCIE_PVDD VDDC_55
AC20
P1.8V H7
VDDC_56
AC22
C307 C293 C283 C356 BLM18PG181SN1
NC_MPV18_1 VDDC_57 100nF 1000nF 1000nF 10000nF
B511 GFX3_P1.8V_PCIE_PVDD_MN H8 AC24 10V 6.3V 6.3V 6.3V
NC_MPV18_2 VDDC_58
AC27
VDDC_59
BLM18PG181SN1 AD13
C609 C608 C607 AM10
VDDC_60
AD16
10000nF 1000nF 100nF NC_SPV18 VDDC_61
6.3V 6.3V 10V AD18
VDDC_62
AN9 AD21
SPV10 VDDC_63
AD23
EGFX_CORE VDDC_64
AN10 AD26
SPVSS VDDC_65
B15 AF17
GFX3_GCORE_SPV10_MN VDDC_66
AF20
VDDC_67
BLM18PG181SN1 AF22
C161 C159 C160 VDDC_68
AG16
10000nF 1000nF 100nF BACK BIAS VDDC_69
6.3V 6.3V 10V AG18
VDDC_70
AG21
A AA13
VDDC_71
AH22
A
BBP_1 VDDC_72
Y13 AH27
BBP_2 VDDC_73
AH28 DESIGN DATE TITLE
VDDC_74
R130 0 GFX3_GCORE_EBP_MN
ISOLATED
MS Yang 12/05/2008
BONN-E SAMSUNG
nostuff C138 C140 CHECK DEV. STEP
CORE I/O VDDCI_1 M15 ELECTRONICS
EGFX_BBP 1000nF 100nF
N13
MK Kim MP EXT_GFX
6.3V 10V VDDCI_2
R12 APPROVAL REV PART NO.
SHORT571 VDDCI_3
T12 BL Lee REV 1.0 M9x (4/5) BA41-01060A
VDDCI_4
R1608-SHORT MODULE CODE LAST EDIT
Back Bias Voltage 0904-002460 April 11, 2009 10:05:58 AM PAGE 29 OF 67
4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D D
U510-2
M96-M 2/5
E39 A3 AC21 R6
PCIE_VSS_1 GND_1 GND_120 GND_61
F34 A37 AC23 R15
F39 B7 AC26 R17
G33 B9 AC28 R20
G34 B11 AD9 R22
H31 B13 AD15 R24
g
H34 B15 AD17 R27
H39 B17 AD20 T11
J31 B19 AD22 T13
J34 B21 AD24 T16
K31 B23 AD27 T18
n
K34 B25 AE2 T21
K39 B27 AE6 T23
l
L31 B29 AF10 T26
L34 B31 AF16 U2
u
M34 B33 AF18 U6
M39 C1 AF21 U13
a
N31 C39 AG2 U15
N34 E5 AG6 U17
P31 E35 AG9 U20
s i
C P34
PCIE_VSS_20 GND_20
F7 AG17
GND_139 GND_80
U22
C
P39 F9 AG20 U24
t
R34 F11 AG22 U27
T31 F13 AH21 V11
T34
PCIE_VSS_25 GND_25
F15 AH29
GND_144 GND GND_85
V13
T39 F17 AJ2 V16
m
U31 F19 AJ6 V18
n
U34 F21 AJ10 V21
V34 F23 AJ11 V23
V39 F25 AJ28 V26
W31 F27 AK7 W2
a
e
W34 F29 AK11 W6
Y34 F31 AK31 Y15
Y39 F33 AL2 Y17
AB39 G2 AL6 Y20
G6 AL8 Y22
S fid
GND_36 GND_155 GND_96
H9 AL11 Y24
J2 AL14 Y27
J6 AL17 AA2
GND GND_40
J8 AL20
GND_159 GND_100
AA6
J27 AL21
GND_41 GND_160
AA16 K7 AL23
AA18 K14 AL26
AA21 L2 AL32
AA23 L6 AM9
n
AA26 L11 AM11
AA28 L17 AM31
AB12 L22 AN11
B AB15
GND_108 GND_49
L24 AN2
GND_168
B
AB17 M17 AN6
o
AB20 M22 AN8
AB22 M24 AN30
AB24 N2 AP7 A39
GND_112 GND_53 GND_172 VSS_MECH_1
AB27 N6 AP9 AW1
AC11 N16 AP11 AW39
AC13 N18 AR5
C
AC16 N21 AW34
AC18 N23
GND_117 GND_58
AC2 N26
GND_118 GND_59
AC6 R2
GND_119 GND_60
0904-002460
A A
DRAW DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP EXT_GFX
BL Lee REV 1.0 M9x (5/5) BA41-01060A

April 11, 2009 10:05:58 AM PAGE 30 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D D
M9X STRAPS BACK BIAS LOGIC
TX_PWRS_ENB AUD[1:0]
PCIE FULL TX OUTPUT SWING 00 : No Audio Function
g
0 : 50% TX OUTPUT SWING 01 : Audio for DP & HDMI if adapter is detected EGFX_BBP
P3.3V_GFX
=> LOW LOSS INTERCONNECT 10 : Audio for DP Only
P3.3V_GFX
1 : FULL TX OUTPUT SWING 11 : Audio for Both DP & HDMI
n
C143
1000nF-X5R
l
GFX3_GPIO0 R125 10K 6.3V
CRT3_HSYNC R624 10K P1.8V
EGFX_CORE
u
nostuff
3
R625
a
10K
2
CRT3_VSYNC
S
D
S
RHU002N06 SI2315BDS-T1
1
s i
G
C Q15 Q20 C
1
G
P5.0V
t
R114 100K 1%
GFX3_P5.0V_BB_R_MN
D 3
TX_DEEMPH_EN Q14
m
If BIOS_ROM_EN=1, ROMCFGID[2:0] (INTERNAL PULL DOWN)
n
SHORT572 R1608-SHORT
PCIE TRANSMITTER DE-EMPHASIS ENABLED G RHU002N06
If BIOS_ROM_EN=0, Memory Aperture Size GFX3_BBEN
0 : TX DE-EMPHASIS DISABLED 1
S
1 : TX DE-EMPHASIS ENABLED P3.3V_GFX GFX3_GPIO(13 : 11) R117 2
10K
a e
(USING MXM OR ON BOARD) 000 : 128MB
GFX3_BBEN_R_MN
001 : 256MB
010 : 64MB
GFX3_GPIO1 R133 10K
S fid
011 : RESERVED
nostuff 1XX : RESERVED
P3.3V_GFX
nostuff
n
GFX3_GPIO13 R124 10K
B BIF_GEN2_EN_A B
0 : 2.5GT/s CAPABLE FOR PCIe DEVICE
o
1 : 5.0GT/s CAPABLE FOR PCIe DEVICE P3.3V_GFX
=> 5.0GT/s CAPABILITY WILL BE
R120 10K
CONTROLLED BY SOFTWARE GFX3_GPIO12
C
GFX3_GPIO2 R119 10K
nostuff
R122 10K R121 10K
GFX3_GPIO11
A A
DESIGN DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP EXT_GFX
BL Lee REV 1.0 M9x Straps & PU BA41-01060A

April 11, 2009 10:05:58 AM PAGE 31 OF

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D
A-Channel #0 D
P1.5V P1.5V P1.5V P1.5V
P1.5V P1.5V
G7
G7
D9
N1
N9
R1
R9
C1
C9
D2
D9
N1
N9
R1
R9
C1
C9
D2
B2
K2
K8
A1
A8
B2
K2
K8
A1
A8
PEG1_MAA(12:0) PEG1_MAA(12:0)
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
0 N3 E9 0 N3 E9
A0 VDDQ_6 A0 VDDQ_6
1 P7 F1 1 P7 F1
A1 VDDQ_7 A1 VDDQ_7
2 P3 H2 2 P3 H2
n
A2 VDDQ_8 A2 VDDQ_8
3 N2 H9 3 N2 H9
4 P8
A3 VDDQ_9 PEG1_DQA(7:0) 4 P8
A3 VDDQ_9 PEG1_DQA(15:8)
A4 A4
l
5 P2 D7 0 5 P2 D7 15
A5 DQU0 A5 DQU0
6 R8 C3 4 6 R8 C3 10
A6 DQU1 A6 DQU1
u
7 R2 C8 1 7 R2 C8 14
A7 DQU2 A7 DQU2
8 T8 U14 C2 6 8 T8 U517 C2 11
A8 DQU3 A8 DQU3
a
9 R3 K4W1G1646E-HC12 A7 3 9 R3 K4W1G1646E-HC12 A7 12
A9 DQU4 A9 DQU4
10 L7 1105-002019 A2 7 10 L7 1105-002019 A2 8
A10_AP DQU5 A10_AP DQU5
11 R7 B8 2 11 R7 B8 13
s i
C A11 E-DIE DQU6 A11 E-DIE DQU6 C
12 N7 A3 5 12 N7 A3 9
T3
A12 DQU7 PEG1_DQA(23:16) T3
A12 DQU7 PEG1_DQA(31:24)
A13 A13
t
T7 E3 20 T7 E3 31
A14 DQL0 A14 DQL0
M7 F7 17 M7 F7 24
A15_BA3 DQL1 A15_BA3 DQL1
F2 21 F2 29
DQL2 DQL2
J7 F8 18 J7 F8 26
PEG1_MCLKA0 CK DQL3 PEG1_MCLKA0 CK DQL3
m
K7 H3 23 K7 H3 28
PEG1_MCLKA0# PEG1_MCLKA0#
n
CK# DQL4 CK# DQL4
H8 16 H8 27
DQL5 DQL5
K9 G2 22 K9 G2 30
PEG1_MCKEA0 CKE_CKE0 DQL6
H7 19
H7 25
DQL7 DQL7
M2 M2
a
PEG1_BAA(0) BA0 PEG1_BAA(0) BA0
e
N8 C7 N8 C7
PEG1_BAA(1) M3
BA1 DQSU
F3
PEG1_RDQSA(0) PEG1_BAA(1) M3
BA1 DQSU
F3
PEG1_RDQSA(1)
PEG1_BAA(2) BA2 DQSL PEG1_RDQSA(2) PEG1_BAA(2) BA2 DQSL PEG1_RDQSA(3)
T2 B7 T2 B7
PEG1_DRAMRST# RESET# DQSU#
G3 PEG1_WDQSA(0) PEG1_DRAMRST# RESET# DQSU#
G3 PEG1_WDQSA(1)
PEG1_WDQSA(2) PEG1_WDQSA(3)
S fid
DQSL# DQSL#
L2 L2
PEG1_CSA00# L1
CS#_CS0# PEG1_CSA00# L1
CS#_CS0#
NC_CS1# NC_CS1#
J3 J3
PEG1_RASA0# K3
RAS#
J9
PEG1_RASA0# K3
RAS#
J9
PEG1_CASA0# L3
CAS# NC_CE1 PEG1_CASA0# L3
CAS# NC_CE1
PEG1_WEA0# WE# PEG1_WEA0# WE#
P1.5V D3 P1.5V D3
PEG1_DQMA(0) E7
DMU
B1
PEG1_DQMA(1) E7
DMU
B1
PEG1_DQMA(2) DML VSSQ_1
B9 PEG1_DQMA(3) DML VSSQ_1
B9
VSSQ_2 VSSQ_2
n
R208 K1 D1 R691 K1 D1
PEG1_ODTA0 J1
ODT_ODT0 VSSQ_3
D8
PEG1_ODTA0 J1
ODT_ODT0 VSSQ_3
D8
4.99K NC_ODT1 VSSQ_4 4.99K NC_ODT1 VSSQ_4
1% E2 1% E2
GMEM_VREF1_MN VSSQ_5 GMEM_VREF3_MN VSSQ_5
B H1
VREFDQ VSSQ_6
E8 H1
VREFDQ VSSQ_6
E8 B
M8 F9 M8 F9
VREFCA VSSQ_7 VREFCA VSSQ_7
o
R209 C384 G1 R692 C715 G1
VSS_10
VSS_11
VSS_12
VSSQ_8
VSS_10
VSS_11
VSS_12
VSSQ_8
GMEM_ZQ1_MN L8 G9 L8 G9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
GMEM_ZQ2_MN
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
4.99K 100nF 4.99K 100nF
ZQ_ZQ0 VSSQ_9 ZQ_ZQ0 VSSQ_9
1% 10V L9 1% 10V L9
NC_ZQ1 NC_ZQ1
R243 R672
240 240
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
C
P1.5V M96 M96
P1.5V
R241
4.99K R670 R238 56
1% PEG1_MCLKA0 R237 56
GMEM_VREF2_MN M96
4.99K PEG1_MCLKA0#
M96
1% GMEM_VREF4_MN
M96 M96 PEG1_MCLKA0_R_MN
R242 C444 M96 M96 C449
100nF M96 C695 M96 10nF M96
4.99K M96 R671 M96
1% 10V M96 4.99K 100nF M96 25V M96
1% 10V M96 M96
M96
P1.5V
A A
DRAW DATE TITLE
C708 C441
C390
1000nF-X5R
C391
1000nF-X5R
C389
1000nF-X5R
C368
1000nF-X5R
C717 C445 C443
10000nF-X5R 10000nF-X5R 10000nF-X5R
C446
10000nF-X5R
C440
100nF
C706
100nF
C386
100nF
C707
100nF
C388
100nF
C387
100nF
10nF 10nF
MS Yang 12/05/2008
BONN-E SAMSUNG
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 16V 16V CHECK DEV. STEP
10V 10V 10V 10V 10V 10V ELECTRONICS
MK Kim MP Graphics_Memory(gDDR3_1.5V)
M96 M96 M96 M96 M96 M96 M96 M96 M96 M96 M96 M96 M96 M96 M96 M96 Graphics_Memory_ATI A #0
BL Lee REV 1.0 BA41-01060A
April 11, 2009 10:05:58 AM PAGE 32 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D A-Channel #1 D
P1.5V P1.5V P1.5V P1.5V
P1.5V P1.5V
G7 g
G7
D9
N1
N9
R1
R9
C1
C9
D2
D9
N1
N9
R1
R9
C1
C9
D2
B2
K2
K8
A1
A8
B2
K2
K8
A1
A8
PEG1_MAA(12:0) PEG1_MAA(12:0)
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
0 N3 E9 0 N3 E9
A0 VDDQ_6 A0 VDDQ_6
1 P7 F1 1 P7 F1
n
A1 VDDQ_7 A1 VDDQ_7
2 P3 H2 2 P3 H2
A2 VDDQ_8 A2 VDDQ_8
3 N2 H9 3 N2 H9
A3 VDDQ_9 PEG1_DQA(47:40) A3 VDDQ_9 PEG1_DQA(63:56)
l
4 P8 4 P8
A4 A4
5 P2 D7 43 5 P2 D7 63
A5 DQU0 A5 DQU0
u
6 R8 C3 45 6 R8 C3 59
A6 DQU1 A6 DQU1
7 R2 C8 40 7 R2 C8 62
A7 DQU2 A7 DQU2
a
8 T8 U13 C2 44 8 T8 U516 C2 56
A8 DQU3 A8 DQU3
A9 DQU4 A9 DQU4
10 L7 A2 47 10 L7 A2 57
s i
C A10_AP 1105-002019 DQU5 A10_AP 1105-002019 DQU5 C
11 R7 E-DIE B8 41 11 R7 E-DIE B8 61
A11 DQU6 A11 DQU6
12 N7 A3 46 12 N7 A3 58
A12 DQU7 PEG1_DQA(39:32) A12 DQU7 PEG1_DQA(55:48)
t
T3 T3
A13 A13
T7 E3 35 T7 E3 51
A14 DQL0 A14 DQL0
M7 F7 36 M7 F7 52
F2 32 F2 49
DQL2 DQL2
m
J7 F8 39 J7 F8 53
PEG1_MCLKA1 PEG1_MCLKA1
n
CK DQL3 CK DQL3
K7 H3 34 K7 H3 48
PEG1_MCLKA1# CK# DQL4
H8 38 PEG1_MCLKA1# CK# DQL4
H8 54
DQL5 DQL5
K9 G2 33 K9 G2 50
H7 37 PEG1_MCKEA1 CKE_CKE0 DQL6
H7 55
a
DQL7 DQL7
e
M2 M2
PEG1_BAA(0) N8
BA0
C7
PEG1_BAA(0) N8
BA0
C7
PEG1_BAA(1) M3
BA1 DQSU
F3
PEG1_RDQSA(5) PEG1_BAA(1) M3
BA1 DQSU
F3
PEG1_RDQSA(7)
PEG1_BAA(2) BA2 DQSL PEG1_RDQSA(4) PEG1_BAA(2) BA2 DQSL PEG1_RDQSA(6)
T2 B7 T2 B7
PEG1_DRAMRST# PEG1_WDQSA(5) PEG1_DRAMRST# PEG1_WDQSA(7)
S fid
RESET# DQSU# RESET# DQSU#
G3 G3
L2
DQSL# PEG1_WDQSA(4) L2
DQSL# PEG1_WDQSA(6)
PEG1_CSA10# L1
CS#_CS0# PEG1_CSA10# L1
CS#_CS0#
NC_CS1# NC_CS1#
J3 J3
PEG1_RASA1# K3
RAS#
J9
PEG1_RASA1# K3
RAS#
J9
PEG1_CASA1# L3
CAS# NC_CE1 PEG1_CASA1# L3
CAS# NC_CE1
PEG1_WEA1# WE# PEG1_WEA1# WE#
P1.5V D3 P1.5V D3
PEG1_DQMA(5) E7
DMU
B1 PEG1_DQMA(7) E7
DMU
B1
PEG1_DQMA(4) DML VSSQ_1 PEG1_DQMA(6) DML VSSQ_1
n
B9 B9
VSSQ_2 VSSQ_2
R240 K1 D1 R668 K1 D1
PEG1_ODTA1 J1
ODT_ODT0 VSSQ_3
D8
PEG1_ODTA1 J1
ODT_ODT0 VSSQ_3
D8
B 1%
VSSQ_5
E2 1%
VSSQ_5
E2 B
GMEM_VREF5_MN H1 E8 GMEM_VREF7_MN H1 E8
VREFDQ VSSQ_6 VREFDQ VSSQ_6
o
M8 F9 M8 F9
R239 C437 G1 R666 C692 G1
VSS_10
VSS_11
VSS_12
VSSQ_8
VSS_10
VSS_11
VSS_12
VSSQ_8
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
4.99K 100nF GMEM_ZQ3_MN L8 G9 4.99K 100nF GMEM_ZQ4_MN L8 G9
1% 10V L9 1% 10V L9
NC_ZQ1 NC_ZQ1
R207 R688
240 240
C
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
M96 M96
P1.5V P1.5V
R206 R690
4.99K 4.99K
1% 1%
PEG1_MCLKA1 R686 56
GMEM_VREF6_MN M96 GMEM_VREF8_MN R687 56
M96 M96 PEG1_MCLKA1#
M96 M96
C383 M96 C714 M96 PEG1_MCLKA1_R_MN
R210 M96 R689 M96
4.99K 100nF
M96 4.99K 100nF M96 C713
1% 10V M96 1% 10V M96 10nF M96
M96 25V M96
M96
P1.5V
A A
DRAW DATE TITLE
C412 C694
C705
1000nF-X5R
C704
1000nF-X5R
C435
1000nF-X5R
C382
1000nF-X5R
C385 C709 C442 C691
10000nF-X5R 10000nF-X5R 10000nF-X5R 10000nF-X5R
C436
100nF
C439
100nF
C438
100nF
C702
100nF
C703
100nF
C693
100nF
10nF 10nF
MS Yang 12/05/2008
BONN-E SAMSUNG
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 16V 16V CHECK DEV. STEP
10V 10V 10V 10V 10V 10V ELECTRONICS
M96 M96 M96 M96 M96 M96 M96 M96 M96 M96 M96 M96 M96 M96 M96 M96 Graphics_Memory_ATI A #1
April 11, 2009 10:05:58 AM PAGE 33 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D B-Channel #0 D
P1.5V P1.5V P1.5V P1.5V
P1.5V P1.5V
G7
g
G7
D9
N1
N9
R1
R9
C1
C9
D2
D9
N1
N9
R1
R9
C1
C9
D2
B2
K2
K8
A1
A8
B2
K2
K8
A1
A8
PEG1_MAC(12:0) PEG1_MAC(12:0)
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
0 N3 E9 0 N3 E9
n
A0 VDDQ_6 A0 VDDQ_6
1 P7 F1 1 P7 F1
A1 VDDQ_7 A1 VDDQ_7
2 P3 H2 2 P3 H2
A2 VDDQ_8 A2 VDDQ_8
l
3 N2 H9 3 N2 H9
4 P8
A3 VDDQ_9 PEG1_DQC(7:0) 4 P8
A3 VDDQ_9 PEG1_DQC(15:8)
A4 A4
u
5 P2 D7 1 5 P2 D7 15
A5 DQU0 A5 DQU0
6 R8 C3 7 6 R8 C3 10
A6 DQU1 A6 DQU1
a
7 R2 C8 0 7 R2 C8 14
A7 DQU2 A7 DQU2
8 T8 U9 C2 4 8 T8 U511 C2 11
A8 DQU3 A8 DQU3
s i
C 10 L7
A9 DQU4
A2 6 10 L7
A9 DQU4
A2 8
C
A10_AP 1105-002019 DQU5 A10_AP 1105-002019 DQU5
11 R7 E-DIE B8 2 11 R7 E-DIE B8 13
A11 DQU6 A11 DQU6
t
12 N7 A3 5 12 N7 A3 9
T3
A12 DQU7 PEG1_DQC(23:16) T3
A12 DQU7 PEG1_DQC(31:24)
A13 A13
T7 E3 20 T7 E3 31
A14 DQL0 A14 DQL0
M7 F7 18 M7 F7 24
m
F2 22 F2 30
n
DQL2 DQL2
J7 F8 16 J7 F8 26
PEG1_MCLKC0 K7
CK DQL3
H3 21 PEG1_MCLKC0 K7
CK DQL3
H3 28
PEG1_MCLKC0# CK# DQL4
H8 17
PEG1_MCLKC0# CK# DQL4
H8 27
DQL5 DQL5
K9 G2 23 K9 G2 29
a
PEG1_MCKEC0 CKE_CKE0 DQL6 PEG1_MCKEC0 CKE_CKE0 DQL6
e
H7 19 H7 25
DQL7 DQL7
M2 M2
PEG1_BAC(0) N8
BA0
C7
PEG1_BAC(0) N8
BA0
C7
PEG1_BAC(1) M3
BA1 DQSU
F3
PEG1_RDQSC(0) PEG1_BAC(1) M3
BA1 DQSU
F3
PEG1_RDQSC(1)
PEG1_BAC(2) BA2 DQSL PEG1_RDQSC(2) PEG1_BAC(2) BA2 DQSL PEG1_RDQSC(3)
S fid
T2 B7 T2 B7
G3 PEG1_WDQSC(0) PEG1_DRAMRST# RESET# DQSU#
G3 PEG1_WDQSC(1)
L2
DQSL# PEG1_WDQSC(2) L2
DQSL# PEG1_WDQSC(3)
PEG1_CSC00# L1
CS#_CS0# PEG1_CSC00# L1
CS#_CS0#
NC_CS1# NC_CS1#
J3 J3
PEG1_RASC0# K3
RAS#
J9
PEG1_RASC0# K3
RAS#
J9
PEG1_CASC0# L3
CAS# NC_CE1 PEG1_CASC0# L3
CAS# NC_CE1
PEG1_WEC0# WE# PEG1_WEC0# WE#
P1.5V D3 P1.5V D3
PEG1_DQMC(0) DMU PEG1_DQMC(1) DMU
n
E7 B1 E7 B1
PEG1_DQMC(2) DML VSSQ_1
B9
B9
VSSQ_2 VSSQ_2
R180 K1 D1 R651 K1 D1
B PEG1_ODTC0 J1
ODT_ODT0 VSSQ_3
D8
PEG1_ODTC0 J1
ODT_ODT0 VSSQ_3
D8 B
1% E2 1% E2
GMEM_VREF9_MN VSSQ_5 VSSQ_5
o
H1 E8 GMEM_VREF11_MN H1 E8
VREFDQ VSSQ_6 VREFDQ VSSQ_6
M8 F9 M8 F9
R185 C323 VSSQ_8
G1 R646 C659 VSSQ_8
G1
VSS_10
VSS_11
VSS_12
VSS_10
VSS_11
VSS_12
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
GMEM_ZQ6_MN
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
4.99K 100nF 4.99K 100nF
1% 10V L9 1% 10V L9
NC_ZQ1 NC_ZQ1
R181 R636
C
240 240
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
P1.5V P1.5V
R172 R629
4.99K 4.99K PEG1_MCLKC0 R192 56
1% GMEM_VREF10_MN 1% R187 56
GMEM_VREF12_MN PEG1_MCLKC0#
PEG1_MCLKC0_R_MN
R176 C291 R630 C642 C319

4.99K 100nF 4.99K 100nF 10nF
1% 10V 1% 10V 25V
P1.5V
A A
C137 C142 C374 C158 C205 C225 C583 C214 C170 C612
C241 C587 C617 C616 C147 C197 10nF 10nF
DRAW DATE TITLE
6.3V
1000nF-X5R
6.3V
1000nF-X5R
6.3V
1000nF-X5R
6.3V
1000nF-X5R
6.3V 6.3V 6.3V 6.3V
100nF
10V
100nF
10V
100nF
10V
100nF
10V
100nF
10V
100nF
10V
16V 16V
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
BL Lee REV 1.0 Graphics_Memory_ATI C #0 BA41-01060A

April 11, 2009 10:05:58 AM PAGE 34 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D
B-Channel #1 D
P1.5V P1.5V P1.5V P1.5V
P1.5V P1.5V
G7
g
G7
D9
N1
N9
R1
R9
C1
C9
D2
D9
N1
N9
R1
R9
C1
C9
D2
B2
K2
K8
A1
A8
B2
K2
K8
A1
A8
PEG1_MAC(12:0) PEG1_MAC(12:0)
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
0 N3 E9 0 N3 E9
A0 VDDQ_6 A0 VDDQ_6
1 P7 F1 1 P7 F1
A1 VDDQ_7 A1 VDDQ_7
2 P3 H2 2 P3 H2
n
A2 VDDQ_8 A2 VDDQ_8
3 N2 H9 3 N2 H9
4 P8
A3 VDDQ_9 PEG1_DQC(47:40) 4 P8
A3 VDDQ_9 PEG1_DQC(63:56)
A4 A4
l
5 P2 D7 43 5 P2 D7 63
A5 DQU0 A5 DQU0
6 R8 C3 45 6 R8 C3 59
A6 DQU1 A6 DQU1
u
7 R2 C8 42 7 R2 C8 62
A7 DQU2 A7 DQU2
8 T8 U6 C2 44 8 T8 U509 C2 56
A8 DQU3 A8 DQU3
a
A9 DQU4 A9 DQU4
10 L7 1105-002019 A2 47 10 L7 1105-002019 A2 57
A10_AP DQU5 A10_AP DQU5
11 R7 B8 41 11 R7 B8 61
s i
C A11 E-DIE DQU6 A11 E-DIE DQU6 C
12 N7 A3 46 12 N7 A3 58
T3
A12 DQU7 PEG1_DQC(39:32) T3
A12 DQU7 PEG1_DQC(55:48)
A13 A13
t
T7 E3 34 T7 E3 51
A14 DQL0 A14 DQL0
M7 F7 37 M7 F7 52
F2 32 F2 49
DQL2 DQL2
J7 F8 39 J7 F8 55
PEG1_MCLKC1 CK DQL3 PEG1_MCLKC1 CK DQL3
m
K7 H3 36 K7 H3 48
PEG1_MCLKC1# PEG1_MCLKC1#
n
CK# DQL4 CK# DQL4
H8 38 H8 54
DQL5 DQL5
K9 G2 33 K9 G2 50
PEG1_MCKEC1 CKE_CKE0 DQL6
H7 35
PEG1_MCKEC1 CKE_CKE0 DQL6
H7 53
DQL7 DQL7
M2 M2
a
PEG1_BAC(0) BA0 PEG1_BAC(0) BA0
e
N8 C7 N8 C7
PEG1_BAC(1) M3
BA1 DQSU
F3
PEG1_RDQSC(5) PEG1_BAC(1) M3
BA1 DQSU
F3
PEG1_RDQSC(7)
PEG1_BAC(2) BA2 DQSL PEG1_RDQSC(4) PEG1_BAC(2) BA2 DQSL PEG1_RDQSC(6)
T2 B7 T2 B7
G3 PEG1_WDQSC(5) PEG1_DRAMRST# RESET# DQSU#
G3 PEG1_WDQSC(7)
PEG1_WDQSC(4) PEG1_WDQSC(6)
S fid
DQSL# DQSL#
L2 L2
PEG1_CSC10# L1
CS#_CS0# PEG1_CSC10# L1
CS#_CS0#
NC_CS1# NC_CS1#
J3 J3
PEG1_RASC1# K3
RAS#
J9
PEG1_RASC1# K3
RAS#
J9
PEG1_CASC1# L3
CAS# NC_CE1 PEG1_CASC1# L3
CAS# NC_CE1
PEG1_WEC1# WE# PEG1_WEC1# WE#
P1.5V D3 P1.5V D3
PEG1_DQMC(5) E7
DMU
B1
PEG1_DQMC(7) E7
DMU
B1
B9 PEG1_DQMC(6) DML VSSQ_1
B9
VSSQ_2 VSSQ_2
n
R145 K1 D1 R626 K1 D1
PEG1_ODTC1 J1
ODT_ODT0 VSSQ_3
D8
PEG1_ODTC1 J1
ODT_ODT0 VSSQ_3
D8
1% E2 1% E2
GMEM_VREF13_MN VSSQ_5 GMEM_VREF15_MN VSSQ_5
B H1
VREFDQ VSSQ_6
E8 H1
VREFDQ VSSQ_6
E8 B
M8 F9 M8 F9
o
R141 C176 G1 R622 C598 G1
VSS_10
VSS_11
VSS_12
VSSQ_8
VSS_10
VSS_11
VSS_12
VSSQ_8
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
GMEM_ZQ8_MN
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
4.99K 100nF 4.99K 100nF
1% 10V L9 1% 10V L9
NC_ZQ1 NC_ZQ1
R134 R606
240 240
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
C
P1.5V P1.5V
R144 R623
4.99K 4.99K
1% 1% R602 56
GMEM_VREF14_MN GMEM_VREF16_MN PEG1_MCLKC1
PEG1_MCLKC1# R604 56
PEG1_MCLKC1_R_MN
R140 C171 R620 C595
4.99K 100nF 4.99K 100nF C590
1% 10V 1% 10V 10nF
25V
P1.5V
A A
C362 C286 C619 C626 C253 C628 C358 C676 C338 C370
C641 C347 C646 C634 C350 C266 10nF 10nF
DRAW DATE TITLE
6.3V
1000nF-X5R
6.3V
1000nF-X5R
6.3V
1000nF-X5R
6.3V
1000nF-X5R
6.3V 6.3V 6.3V 6.3V

100nF
10V
100nF
10V
100nF
10V
100nF
10V
100nF
10V
100nF
10V
16V 16V
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
BL Lee REV 1.0 Graphics_Memory_ATI C #1 BA41-01060A

April 11, 2009 10:05:58 AM PAGE 35 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D
LVDS D
Backlight On LCD Power EBL Purpose
P5.0V_STB P3.3V_AUX LCD_VDD3V
g
Q1
P3.3V SI2315BDS-T1
R1
3
2
200K
D
S
1%
1
G
C8
5 R2 330nF
C9
l
1 + 100nF
KBC3_BKLTON 30.1K 1% 10V
R503 1K 1%
LCD3_BKLTON MCH3_LCDVDDON_Q_MN
4
u
2
MCH3_BKLTEN - LCD3_BKLTON_R_MN MCH3_LCDVDDON_QR_MN
3 U500 D 3
a
R504 R500 7SZ08 MCH3_LCDVDDON_R_MN
100K 100K Q2
1% 1% R501 10K 1% RHU002N06 P3.3V
s i
G
C MCH3_LCDVDDON C
1
S 2
R502
t
100K C529 SI team request
1% 22000nF-X5R
20%
6.3V
LED Power
a m e n 2Ch. LCD Connector
VDC nostuff
nostuff
S fid
VDD_LED
C530
LCD_VDD3V P3.3V
C3922
VDD_LED P3.3V
2.2K
2.2K
R49 C531
n
0 1000nF-X5R 4700nF-X5R
R50 0 6.3V
100nF
25V
10V
B
Q4 B
R521
R520
SI2307BDS-T1-E3 JLCD1
1 2
3
2
3 4 LCD3_BKLTON
D
S
LCD3_BRIT 5 6
1
R4
G
C11 C46 LCD1_BCLK 7 8 LCD1_BDATA2

150K
C
1%
100nF 100nF LCD1_BCLK# 9 10 LCD1_BDATA2#
25V 25V LCD1_BDATA1 11 12 LCD1_BDATA0
LCD1_BDATA1# 13 14 LCD1_BDATA0#
15 16
P3.3V_VDD_INV_EN_QR_MN LCD1_ACLK 17 18 LCD1_ADATA2
R3 LCD1_ACLK# 19 20 LCD1_ADATA2#
51.1K LCD1_ADATA1 21 22 LCD1_ADATA0
P3.3V 1%
LCD1_ADATA1# 23 24 LCD1_ADATA0#
P3.3V_VDD_INV_EN_Q_MN 25 26 LCD3_EDID_CLK
D 3 27 28 LCD3_EDID_DATA
Q3 29 30
31
RHU002N06 MNT1
R7 10K 1%
G
MNT2
32
1
S 2 3710-002498
P3.3V_VDD_INV_EN_MN SOCK-30P-2R-SMD-MNT
Type : angle
A
A
DESIGN DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP GRAPHICS_IF
BL Lee REV 1.0 LVDS BA41-01060A

April 11, 2009 10:05:58 AM PAGE 36 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
VCC_CRT
D506
P5.0V
CRT P5.0V
D
MMBD4148
3 1
1
C520 D503
100nF 3
MMBD4148
U502
10V
SN74AHCT1G125DCKR CRT3_P5.0V_D_MN
5
g
2 + 4 R516 40.2 5% B505
CRT3_HSYNC OE*
- CRT5_HSYNC
3 CRT5_HSYNC_R_MN BLM18PG181SN1
CRT CONNECTOR
1
n
C513
100nF
l
10V J6
DSUB-15-VGA
82nH
u
L504 CRT3_RED_L_MN 1
CRT3_RED 6
VCC_CRT
a
11
L503 82nH CRT3_GREEN_L_MN 2
CRT3_GREEN 7
s i
C 12
C
L502 82nH CRT3_BLUE_L_MN 3
CRT3_BLUE
t
U501 C512 8
1%
150
150
150
1%
1%
SN74AHCT1G125DCKR
100nF 13
0.022nF
0.022nF
0.022nF
50V
50V
50V
1
10V 4
C521 C518 C516 9
PGB1010603NR
D507
PGB1010603NR
D505
PGB1010603NR
D504
5
R514
m
2 + 4 40.2 5% 0.022nF 0.022nF 0.022nF 14
CRT3_VSYNC CRT5_VSYNC
n
-
OE* 50V 50V 50V 5 16
R517
R518
R519
2
3 CRT5_VSYNC_R_MN
C523
1 10 17
C29
C24
15
a e
nostuff
nostuff 3701-001515
nostuff
Type : angle
CRT5_DDCDATA
CRT5_DDCCLK
S fid
P3.3V_GFX
CRT5_HSYNC
P3.3V_GFX VCC_CRT CRT5_VSYNC
270pF
270pF
0.1nF
0.1nF
3
R507 R508
G
1
2.2K Q500 2.2K 1 2
CRT5_DDCDATA_CLK_D_MN
50V 50V 50V 50V BAV99LT1
S
CRT3_DDCDATA CRT5_DDCDATA
C27
C16
C23
C20
D500
n
2
3
3
1 2
RHU002N06
B nostuff BAV99LT1 B
nostuff D501 nostuff
o
nostuff
R11 0
P3.3V_GFX
C
P3.3V_GFX VCC_CRT
R510 R512
G
1
2.2K Q501 2.2K

S
CRT3_DDCCLK CRT5_DDCCLK
2
RHU002N06
nostuff
nostuff
R15 0
A Check "CRT3_DDCCLK/DATA" Voltage Level A
2N06 Can be replaced with SM6K2 DESIGN
MS Yang
DATE
12/05/2008
TITLE
SAMSUNG
BONN-E
CHECK DEV. STEP
ELECTRONICS
BL Lee REV 1.0 CRT BA41-01060A

April 11, 2009 10:05:58 AM PAGE 37 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
P5.0V
D HDMI TH501
miniSMDC110-2
D
1
D511
CRS06
2
PEG3_P5.0V_HDMI_D_MN
2.2K
2.2K
B17 C571
100nF
HDMI
ACM2012H-900-2P PEG3_TX2P_HDMI_B_MN
2 3 10V
J10
g
PEG3_TX2P_HDMI
B16
R583
R590
ACM2012H-900-2P PEG3_TX2N_HDMI_B_MN HDMI-19P-FEMALE
PEG3_TX2N_HDMI 1 4 2 3 PEG3_TX1P_HDMI_B_MN 1
PEG3_TX1P_HDMI 2
TMDS_DATA2
n
B14 TMDS_DATA2_SHIELD
3
ACM2012H-900-2P TMDS_DATA2#
PEG3_TX1N_HDMI_B_MN 4
PEG3_TX1N_HDMI TMDS_DATA1
l
2 3 1 4 PEG3_TX0P_HDMI_B_MN 5
PEG3_TX0P_HDMI 6
TMDS_DATA1_SHIELD
B12 TMDS_DATA1#
u
7
ACM2012H-900-2P TMDS_DATA0
PEG3_TX0N_HDMI_B_MN 8
PEG3_TX0N_HDMI TMDS_DATA0_SHIELD
a
1 4 2 3 PEG3_TXCP_HDMI_B_MN 9
PEG3_TXCP_HDMI 10
TMDS_DATA0#
TMDS_CLOCK
11
s i
C PEG3_TXCN_HDMI_B_MN 12
TMDS_CLOCK_SHIELD C
PEG3_TXCN_HDMI 1 4 13
TMDS_CLOCK#
CEC
t
14
PEG5_HDMI_CLK_L_MN RESERVED
B508 BLM18PG181SN1 15
PEG5_HDMI_CLK B507 BLM18PG181SN1 PEG5_HDMI_DATA_L_MN 16
SCL
20
PEG5_HDMI_DATA 17
SDA MNT1
21
DDC_GROUND MNT2
m
18 22
n
5V_POWER MNT3
19 23
VGA5_HDMI_HPD HOT_PLUG_DETECT MNT4
For EMI
C568
100nF 3701-001597
0.01nF
0.01nF
a
0.5pF
0.5pF
10V
e
For ESD Type : angle
3
nostuff
1 2
C580
C575
50V 50V
S fid
nostuff BAV99LT1
nostuff D5 3
1 2
P3.3V_GFX
BAV99LT1
P3.3V_GFX nostuff
D4 nostuff
nostuff
R599 nostuff
G
n
1
10K
1%
S
B PEG3_HDMI_DATA PEG5_HDMI_DATA B
2
o
Q514
RHU002N06 R609 499 1%
PEG3_TX2P_HDMI
PEG3_TX2N_HDMI R608 499 1%
R607 499 1%
R582 PEG3_TX1P_HDMI
0
PEG3_TX1N_HDMI R605 499 1%
R603 499 1%
C
PEG3_TX0P_HDMI R601 499 1%
PEG3_TX0N_HDMI
R600 499 1%
PEG3_TXCP_HDMI R597 499 1% P3.3V P3.3V
PEG3_TXCN_HDMI
P3.3V_GFX 3 VGA5_HDMI_HPD_R_MN
PEG3_TX_HDMI_PU_Q_MN
Q520 1 R618 100K 1%
P3.3V_GFX 3 D MMBT3904 VGA5_HDMI_HPD
Q519 2
nostuff RHU002N06 G
nostuff PEG3_HPD_HDMI
R598 1
G
1
S
10K 2 R619
1% R627 47K
S
PEG3_HDMI_CLK PEG5_HDMI_CLK 100K

2
nostuff
Q513
RHU002N06
A R594 0
A
DESIGN DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
BL Lee REV 1.0 HDMI BA41-01060A

April 11, 2009 10:05:58 AM PAGE 38 OF

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D
P3.3V
AUDIO D
C804 C803 C798

10000nF-X5R
100nF 100nF
10V
10V 10V
Codec Pin9 Setting

S/B with Low Voltage IO S/B without Low Voltage IO
Pin9 : 1.5V Pin9 : 3.3V
U524
ALC272-GR
g
1 36
9
DVDD LOUT1-R_PORT-D-R
35
AUD5_LINE_O_RIGHT
DVDD-IO LOUT1-L_PORT-D-L AUD5_LINE_O_LEFT
39
P4.75V_AUD LOUT2-L_PORT-A-L
5 41
n
HDA3_AUD_SDO 6
SDATA-OUT LOUT2-R_PORT-A-R
HDA3_AUD_BCLK BCLK
HDA3_AUD_SDI0 R759 22 5% HDA3_AUD_SDI0_R_MN 8
SDATA-IN HPOUT-R_PORT-I-R
32
AUD5_HP_O_RIGHT
l
10 33
HDA3_AUD_SYNC 11
SYNC HPOUT-L_PORT-I-L AUD5_HP_O_LEFT
R757 HDA3_AUD_RST# RESET#
u
20K CBP
29 AUD3_CBP_MN C760 2200nF-X5R
1% C802 1000nF-X5R 6.3V AUD3_SPKR_C_MN 12 30 AUD3_CBN_MN 10V
PC_BEEP CBN
R730
a
AUD3_CPVEE_MN 4.7K 5%
AUD3_SPKR_Q_MN B528 AUD3_DMIC_CLK1_R_MN 46 31 C761 2200nF-X5R R729 4.7K 5% AUD5_MIC1_VREF_RIGHT
AUD3_DMIC_CLK1 44
DMIC-CLK1_2 CPVEE
10V
AUD5_MIC1_VREF_LEFT
s i
C B529 AUD3_DMIC_DATA1_R_MN 2
DMIC-CLK3_4
22 AUD5_MIC1_RIGHT_C_MN C773 1000nF-X5R 6.3V
C
D 3 C801 AUD3_DMIC_DATA1 3
GPIO0_DMIC01_2 MIC1-R_PORT-B-R
21 AUD5_MIC1_LEFT_C_MN C772 1000nF-X5R 6.3V
AUD5_MIC1_RIGHT
R758 4.7nF AUD3_GPIO1# GPIO1_DMIC-3_4 MIC1-L_PORT-B-L AUD5_MIC1_LEFT
t
Q546 1K nostuff BLM18PG181SN1
R756 25V nostuff BLM18PG181SN1
1K 1% G RHU002N06 1% C3906 C3907 47 28 AUD3_MIC2_VREFO_MN
AUD3_SPKR 0.047nF 0.047nF
EAPD MIC1-VREFO
1
AUD3_SPKR_R_MN S 50V 50V 45 17AUD5_MIC2_RIGHT_C_MN C787 1000nF-X5R 6.3V
2 SPDIFO2 MIC2-R_PORT-F-R AUD5_MIC2_RIGHT
C786
m
nostuff 48 16AUD5_MIC2_LEFT_C_MN 1000nF-X5R 6.3V
AUD5_MIC2_LEFT
n
SPDIFO1 MIC2-L_PORT-F-L
nostuff
43 19
G_AUD NC MIC2-VREFO AUD5_MIC2_VREF
G_AUD AUD3_JDREF_MN
R742 20K 1% 40 24 3
a
JDREF LINE1-R_PORT-C-R
e
2 1
23
LINE1-L_PORT-C-L G_AUD AUD5_MIC1_VREF_LEFT AUD5_MIC1_VREF_RIGHT
R755 20K 1% AUD5_SENS_MIC#_R_MN 13
AUD5_SENS_MIC# SENSEA BAT54A
AUD5_SENS_HP# R721 5.1K 1% AUD5_SENS_HP#_R_MN 34
SENSEB LINE1-VREFO
18
D520
4 15
S fid
DVSS_1 LINE2-R_PORT-E-R
7 14
DVSS_2 LINE2-L_PORT-E-L
P4.75V_AUD 25 20
G_AUD AVDD1 LINE2-VREFO
38
AVDD2
37
MONO-OUT AUD5_LFE_O
C770 C764 26
AVSS1
100nF 100nF 42 27 AUD5_VREF_MN
10V 10V
AVSS2 VREF
AUD3_AVSS_MN 1205-003526
n
SHORT507 RGND-SHORT C762
10000nF-X5R
C765
100nF
10V
B SHORT506 RGND-SHORT
10V B
o
G_AUD
G_AUD
C
P5.0V_AUD P4.75V_AUD SHORT512 R1608-SHORT
U525
MIC5252-4.75BM5 G_AUD
1 5
IN OUT
2
GND
3 4
C800 EN BYPASS C792 C788
C808 100nF 100nF 10000nF-X5R
10000nF-X5R SHORT509 1203-003344 10V 10V
10V
10V R1608-SHORT MIC5_EYPASS_MN
C791
SHORT508 1000nF-X5R
R1608-SHORT 6.3V
A A
G_AUD G_AUD G_AUD G_AUD
DESIGN DATE TITLE

GMT : 1203-005579
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP HDA_CODEC
BL Lee REV 1.0 AUDIO CODEC ALC272 BA41-01060A

April 11, 2009 10:05:58 AM PAGE 39 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D D
P5.0V_AMP
AUD5_LINE_O_LEFTGND_C_MN AUD5_LINE_O_LEFTGND_R_MN
AUD5_LINE_O_LEFT_C_MN AUD5_LINE_O_LEFT_R_MN
AUD5_LINE_O_RIGHTGND_C_MN AUD5_LINE_O_RIGHTGND_R_MN P5.0V_AUD P5.0V_AMP
AUD5_LINE_O_RIGHT_C_MN AUD5_LINE_O_RIGHT_R_MN
C754 C758 C752
10000nF-X5R
100nF 100nF 10V R1608-SHORT
10V 10V SHORT510
g
U520
TPA6020A2RGWR
C780 220nF 10V R736 15K 1% 12 7
LIN+ LVDD
C779 220nF 10V R735 15K 1% 13 19
AUD5_LINE_O_LEFT LIN- RVDD G_AUD C809 C789
C793
n
C757 10000nF-X5R 10000nF-X5R
220nF 10V R725 15K 1% 16 4 100nF
RIN+ LOUT+ SPK5_L_P 10V 10V
AUD5_LINE_O_RIGHT C763 220nF 10V R722 15K 1% 17 RIN- LOUT-
6
SPK5_L_M
10V
l
C781 220nF 10V AUD3_LBYPASS_MN 11 LBYPASS ROUT+
1
SPK5_R_P
u
C778 220nF 10VAUD3_RBYPASS_MN 15 3
RBYPASS ROUT- SPK5_R_M
a
2 9
5
GND1 L_SD#
14 AUD3_SHDN#
GND2 R_SD# G_AUD G_AUD
s i
C 8 18
C
NC1 NC3
10 20
NC2 NC4
t
21
THERM
1201-002810 SHORT568 R1608-SHORT
m n
G_AUD G_AUD G_AUD G_AUD
a
S fid e P3.3V
R724
1K
1%
G_AUD
n
R719 10K J15
B AUD3_SHDN# 1%
AUD3_GPIO1# HDR-4P-SMD B
SPK5_R_M 1
o
3 D
Q600 SPK5_R_P 2
RHU002N06 G R731 1K SPK5_L_M 3
1%
KBC3_SPKMUTE SPK5_L_P 5
4
1 MNT1
2 S 6
KBC3_SPKMUTE_U_MN MNT2
C
3711-000922
SMD_A
Type : angle
G_AUD
A A
DESIGN DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP HDA_CODEC
BL Lee REV 1.0 SPK AMP TPA6017 BA41-01060A

April 11, 2009 10:05:58 AM PAGE 40 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D D
g
AUD5_MIC2_VREF
R746 Mono Mic Ass’y

Nearby Codec
n
2.2K
J19
HDR-2P-SMD
l
B519 1
R700 330 AUD5_MIC2_VREF_B_MN
AUD5_MIC2_RIGHT 2
u
3
AUD5_MIC2_VREF_R_MN BLM18PG181SN1 MNT1
4
MNT2
C723
a
C785 0.1nF
SHORT550 47nF 3711-000541
Nearby Codec 50V
s i
C R1608-SHORT 25V Type : angle C
G_AUD
t
AUD5_MIC2_LEFT G_AUD C724 10nF 25V
G_AUD
m n
G_AUD
a
S fid e Digital MIC CONNECTOR
B
o n P3.3V
BLM18PG181SN1
B525 SMD_A
B
C
J22
B526 HDR-4P-SMD
BLM18PG181SN1 1
AUD3_DMIC_CLK1 2
AUD3_DMIC_DATA1 3
B527 4
5
BLM18PG181SN1 MNT1
C3904 6
MNT2
C3905 C480 0.047nF
0.047nF 0.047nF 50V 3711-000922
50V 50V
Type : angle nostuff

nostuff
nostuff
nostuff
nostuff
nostuff
nostuff
A A
DESIGN DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP HDA_CODEC
BL Lee REV 1.0 MIC AMP LMV358 BA41-01060A

April 11, 2009 10:05:58 AM PAGE 41 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D D
HEADPHONE(BLACK)
J23
JACK-PHONE-6P-BLACK
5
AUD5_SENS_HP# 4
AUD5_HP_O_RIGHT_R_MN AUD5_HP_O_RIGHT_B_MN
R716 56 B521 3 R
AUD5_HP_O_RIGHT 6
AUD5_HP_O_LEFT_R_MN AUD5_HP_O_LEFT_B_MN
R713 56 B520 2 L
g
AUD5_HP_O_LEFT 1
BLM18PG181SN1
0.1nF 50V
0.1nF 50V
0.1nF 50V
G1
R714 R715 BLM18PG181SN1
20K G2
P3.3V 20K
3722-002588
n
10K
Type : angle
C740
C739
C733
P3.3V G_AUD nostuff
u
R702
2
a
Q539 3
DTA114YUA R704
KBC3_SPKMUTE_Q_MN 1K 1% 1 Q540
s i
C G_AUD C
1 MMBT3904
3 2 3
t
D 3 R708
Q537 1K 1% 1 Q538
R701 1K 1% G RHU002N06 MMBT3904
KBC3_SPKMUTE KBC3_SPKMUTE_QQ_MN
1 2
m
KBC3_SPKMUTE_R_MN S 2
n
AUD5_HP_O_RIGHT_Q_MN
AUD5_HP_O_LEFT_Q_MN
a e
G_AUD
MIC JACK(BLACK)
C729
C735
C742
10nF
10nF
10nF
25V
25V
25V
S fid AUD5_SENS_MIC#
AUD5_MIC1_RIGHT
R684
R685
330 B516
B517
AUD5_MIC1_RIGHT_B_MN
AUD5_MIC1_LEFT_B_MN
BLM18PG181SN1
BLM18PG181SN1
5
4
3
6
J20
JACK-PHONE-6P-BLACK
n
330 2
AUD5_MIC1_LEFT 1
G1
50V
50V
50V
B G2 B
G_AUD AUD5_MIC1_RIGHT_R_MN
o
0.1nF
0.1nF
0.1nF
AUD5_MIC1_LEFT_R_MN 3722-002588
Type : angle
C712
C711
C710
C
nostuff
G_AUD
A A
DESIGN DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP HDA_CODEC
BL Lee REV 1.0 H/P JACK AND MIC JACK BA41-01060A

April 11, 2009 10:05:58 AM PAGE 42 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D SUB-WOOFER D
50V
C832 2.2nF
g
R778 47K
AUD5_LFE_O_CR_MN
P4.75V_AUD
n
U528-1
l
AUD5_LFE_O_C_MN
LMV358M
C826 R774 2 8 R926 0
AUD5_LFE_O -
u
V
1000nF-X5R 33.2K 1
6.3V 1% 3
OUT AUD5_LFE_O_M
G
+ P3.3V
C828 0.047nF 50V
a
4 AUD5_LFE_O_P
R775 47K
s i
C C831 C
1000nF-X5R
P4.75V_AUD P4.75V_AUD
6.3V
t
G_AUD C848
AUD5_LFE_O_P_R_MN
AUD5_LFE_O_M_C1_MN U528-2 100nF
R773 LMV358M R791 25V
AUD5_LFEO_U_MN 8
10K R776 47K 6
- Sub-Woofer 10K
V
m
1% 7 Sub-Woofer 1%
n
OUT U530
5 G Sub-Woofer
+ AUD3_SHDN#_P3.3V_R_MN 1
5 7SZ08
4 Sub-Woofer +
Sub-Woofer 4
C825 C833
C834 1000nF-X5R 2 AUD3_LFE_SHDN#
R772 Sub-Woofer
a
1000nF-X5R AUD3_SHDN# -
e
10K 100nF Sub-Woofer
6.3V 6.3V 3
1% 25V Sub-Woofer
Sub-Woofer
Sub-Woofer R790 nostuff
Sub-Woofer 1M
S fid
G_AUD G_AUD nostuff
Sub-Woofer nostuff
Sub-Woofer nostuff
G_AUD
Sub-Woofer
Sub-Woofer
Sub-Woofer
n
B P5.0V_AMP B
AUD5_LFE_O_P
AUD5_LFE_O_M
C841
C840
AUD5_LFE_O_P_C_MN
220nF
220nF
10V
10V
AUD5_LFE_O_M_C_MN
C844
C839
R786
R785
220nF
220nF
AUD5_LFE_O_P_CR_MN
39.2K 1%
39.2K 1%
AUD5_LFE_O_M_CR_MN
AUD5_LFE_O_LBYPASS_MN
10V
10V
Co
13
17
11
15
U529
TPA6020A2RGWR
12 LIN+
LIN-
16 RIN+
RIN-
LBYPASS
RBYPASS
LVDD
RVDD
LOUT+
LOUT-
ROUT+
ROUT-
19
1
3
7
4
C846
G_AUD
100nF
10V
C835
100nF
10V
C847
10000nF-X5R
10V
SPK5_LFE_P
SPK5_LFE_M
Sub-Woofer
Sub-Woofer
Sub-Woofer
SPK5_LFE_M
SPK5_LFE_P
R728
R723
AUD5_LFE_M_R_MN
0
0
AUD5_LFE_P_R_MN 3
4
J24
HDR-2P-SMD
1
2
MNT1
MNT2
3711-000541
Type : angle
AUD5_LFE_O_RBYPASS_MN
2 9
GND1
5 GND2
L_SD#
14
AUD3_LFE_SHDN#
R_SD#
8 NC1 18 Sub-Woofer
NC3 Sub-Woofer
10 20
NC2 NC4 Sub-Woofer
A 21 Sub-Woofer A
THERM Sub-Woofer
Sub-Woofer DESIGN DATE TITLE
1201-002810
G_AUD G_AUD G_AUD

Sub-Woofer
Sub-Woofer
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
Sub-Woofer ELECTRONICS
Sub-Woofer MK Kim MP HDA_CODEC
BL Lee REV 1.0 SUB-WOOFER BA41-01060A

April 11, 2009 10:05:58 AM PAGE 43 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
ALT BOM
D LFE9261A-R LAN3214-50
D
2603-000107 2603-000110 3722-002843
P1.8V_LAN MNT2
PEX1_GLAN_RXP4_C_MN 10
MNT1
PEX1_GLAN_RXN4_C_MN 9
P3.3V P3.3V_AUX ALT3_MX4-_MN
U506 TD4- MX4- TERM4
12 13 ALT3_MX4+_MN 8
88E8057 TD4+ MX4+ ALT3_MX2-_MN
TERM3
11 14 7
TCT4 MCT4 RD-
R541 5 30 LAN3_MDI+_3_MN 10 15 ALT3_MX3-_MN 6
PLT3_RST# 6
PERST# MDI+_3
31 LAN3_MDI-_3_MN ALT3_MX3+_MN 5
TERM2
10K PEX3_WAKE# WAKE# MDI-_3 TD3- MX3- TERM1
55 26 LAN3_MDI+_2_MN 9 16 ALT3_MX2+_MN 4
CLK1_PCIELOM 56
REFCLK+ MDI+_2
27 LAN3_MDI-_2_MN 8
TD3+ MX3+
17 ALT3_MX1-_MN 3
RD+
R540 nostuffCLK1_PCIELOM# REFCLK- MDI-_2 TCT3 MCT3 TD-
C557 100nF 10V 49 20 LAN3_MDI+_1_MN 7 18 ALT3_MX1+_MN 2
g
10K PEX1_GLAN_RXP4 TX+ MDI+_1 TD+
C558 100nF 10V 50 21 LAN3_MDI-_1_MN 1
PEX1_GLAN_RXN4 54
TX- MDI-_1
17 LAN3_MDI+_0_MN 6
TD2- MX2-
19
PEX1_GLAN_TXP4 RX+ MDI+_0 TD2+ MX2+ JACK-LAN-8P
53 18 LAN3_MDI-_0_MN 5 20 J9
PEX1_GLAN_TXN4 RX- MDI-_0
4
TCT2 MCT2
21
42
n
LOM3_CLKREQ# 43
CLKREQ#
3
TD1- MX1-
22
NC_9 TD1+ MX1+
10V
10V
10V
10V
2 23
TCT1 MCT1
l
37 59 1 24
SPI_CLK LED_ACTIVE#
35 60 LFE9261A-R
100nF
100nF
100nF
100nF
P3.3V_AUX SPI_DI LED_LINK10_100#
u
34 62 LT1
SPI_DO LED_LINK1000#
36 63
SPI_CS# LED_DUPLEX# 2603-000107
a
Trace width 12mils
C559
C556
C551
C567
38 3 25-A4
VPD_CLK CTRL12 LAN3_CTL12
C542 C570 41 4
s i
C 100nF 100nF
VPD_DATA PD18LDO C
1%
1%
1%
1%
10V 10V 1
P3.3V_AUX VDDO_TTL_1
t
40 9
VDDO_TTL_2 NC_1
45 11
75
75
75
75
VDDO_TTL_3 NC_2
61
VDDO_TTL_4 P3.3V_AUX P3.3V
m
8
n
AVDDH
12
R574
R558
R551
R537
NC_3
C100 2
VDD_1
100nF 7 47
VDD_2 VMAIN_AVLBL
10V 13
a
P1.2V_LAN VDD_3 C560
e
33
VDD_4 LOM_DISABLE#
10 R578 10K 1nF
39 LAN3_LOM_DISABLE#_MN
VDD_5 3KV
44 15
VDD_6 XTALI
48
C565 C96 C77 C541 C540 58
VDD_7
14 Y500
S fid
4700nF-X5R
100nF 100nF 100nF 100nF
VDD_8 XTALO 25MHz
25V
10V 10V 10V 10V 32
AVDD18_OUT
28 1 2
AVDDL_2
nostuff 22 46 LAN3_XTALO_MN 2801-004517 LAN3_XTALI_MN
P1.8V_LAN NC_4 TESTMODE
19 29
AVDDL_1 NC_8
57
NC_12 NC_6
24 C108 C102
52 25 1% 0.015nF 0.015nF
NC_11 NC_7
51 16 50V 50V
C569 C90 C86 C80 C81 NC_10 RSET
10000nF R576 4.99K
n
100nF 100nF 100nF 100nF 23 LAN3_RSET_MN
6.3V NC_5
10V 10V 10V 10V 65
THERMAL
64 Place crystal within 0.75inches from LAN chip.
NC_13
B Place nearby Pin32
B
1205-003587
P3.3V_AUX
B5
Co P1.2V_LAN
4
BLM18PG181SN1 LAN3_CTL12_R_MN LAN3_CTL12_U_MN

3
C133 C130 C121 C115

1
R111 C114 4700nF 22000nF-X5R 10000nF 4700nF

C109
4.7K 100nF 20%
U508 100nF
10V 6.3V 10V
10V 6.3V BCP69-16 10V
A A
DESIGN DATE TITLE
LAN3_CTL12 25-C3
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP LAN
BL Lee REV 1.0 LAN_MARVELL_8057 BA41-01060A

April 11, 2009 10:05:58 AM PAGE 44 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D
Express Card D
Express Card Power Switch
n g l
SMB3_CLK_MN
P3.3V_EXP P3.3V_AUX_EXP P1.5V_EXP
u
SMB3_DATA_MN
P3.3V PEX3_WAKE#_MN
s i a
C C3618 C900 C795 C784
C
R408
P3.3V_AUX P1.5V P3.3V P3.3V_EXP P1.5V_EXP P3.3V_AUX_EXP 10K J25 100nF 100nF 100nF 100nF
t
1% EDGE-XPRESS-26P 10V 10V 10V 10V
2
USB3_EXPCARD- 3
USB_D-
15
U522 USB3_EXPCARD+ USB_D+ +3.3V_2
C783 C794 C777 nostuff +3.3V_1
14
R5538D001-TR-F
m
100nF 100nF 100nF nostuff 4
EXP3_CPUSB#
n
CPUSB#
10V 10V 10V 2 3 12
3.3VIN_1 3.3VOUT_1 +3.3V_AUX
4 5 R749 0 7
3.3VIN_2 3.3VOUT_2 SMB3_CLK SMB_CLK
R748 0 8 10
12 11 SMB3_DATA SMB_DATA +1.5V_1
9
a
1.5VIN_1 1.5VOUT_1 +1.5v_2
e
14
1.5VIN_2 1.5VOUT_2
13
PEX3_WAKE# R754 0 11
WAKE#
15 nostuff 13 26
17
AUXOUT EXP3_PERST# PERST# GND_4
23
AUXIN GND_3
8 16 20
EXP3_PERST# EXP3_CLKREQ#
S fid
PERST* CLKREQ# GND_2
18 10 17 1
RCLKEN CPPE*
9 EXP3_CPPE# EXP3_CPPE# 18
CPPE# GND_1
20
CPUSB* EXP3_CPUSB# CLK1_EXPCARD# 19
REFCLK-
1
SHDN*
16
CLK1_EXPCARD REFCLK+
CHP3_SLPS3# 6
STBY* NC_5
21 6
PLT3_RST# SYSRST*
7
PEX1_EXPCARDRXN3 22
PERN0 RESERVED_2
5
19
GND PEX1_EXPCARDRXP3 PERP0 RESERVED_1
OC*
C3909 21 24 27
0.1nF
THERMAL PEX1_EXPCARDTXN3 25
PETN0 MNT1
28
PEX1_EXPCARDTXP3 PETP0 MNT2
n
50V 1205-002807
nostuff 3711-007016
B Type : angle B
GMT : 1205-003667
Co TYPE - II
1
2
J26
EXPRESS-26P-FRAME
MNT1
Type 2 module
54.00 mm
EXPRESS CARD
MNT2
75.00 mm
THIS SIDE UP
INSERT
3709-001566
Angle type
54.00 mm W
X
75.00 mm L
X
5.00 mm H
A A
DESIGN DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP EXPRESS CARD
BL Lee REV 1.0 EXPRESS CARD BA41-01060A

April 11, 2009 10:05:58 AM PAGE 45 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
3 IN 1 CARD (AU6336) D
P3.3V
n g l
P3.3V_MCD
C829
R779
150K
P3.3V_MCD
u
100nF 1%
10V
C837
C823 R780
C810 U527
a
1000nF-X5R 100K 1000nF-X5R
100nF AU6336C52-MWF 1%
6.3V 6.3V
10V 2 15
s i
C VD33P SD_V33 J506 C
9 EDGE-SD-9P
VDDHM
14 24
VDD33C SDDATA0 MCD3_SDDATA0 R783
t
17 49.9 1% MCD3_SDDATA3_R_MN1
28
SDDATA1
19 MCD3_SDDATA1 MCD3_SDDATA3 2
CD_DAT3
8
VDD SDDATA2
21
MCD3_SDDATA2 MCD3_SDCMD 3
CMD
C815 USB3_MMC_R_MN VDDU SDDATA3 MCD3_SDDATA3 VSS1
4700nF-Y5V
C820 USB3_MMC#_R_MN
SDDATA4
22 4
VDD
R765
m
100nF 0 3 23 5
USB3_MMC+ MCD3_SDCLK
n
10V DP SDDATA5 CLK
10V R766 0 4 12 6
USB3_MMC- DM SDDATA6
11 R782 49.9 1% 7
VSS2
SDDATA7 MCD3_SDDATA0 DAT0
C3169 C866 20 R781 49.9 1% 8
0.018nF 0.018nF
CLED
10 MCD3_SDDATA1 R784 49.9 1% 9
DAT1
a
TRIST MCD3_SDDATA2 DAT2
e
nostuff 50V 50V C816 27
470nF 16V
RSTN SDCDN
13
MCD3_SDCD# MCD3_SDCD# 10
CARD_DETECT
nostuff MCD3_RSTN_MN 25 18 11
CLK3_FM48 EXTCLK SDWP
16
MCD3_SDWP MCD3_SDWP WRITE_PROTECT
SDCMD MCD3_SDCMD
6 26 R771 33 12
7
NC1 SDCLK MCD3_SDCLK 13
MNT1
S fid
NC2 MCD3_SDCLK_R_MN MNT2
1 MCD3_SDDATA0_MN
REXT
5 MCD3_REXT_MN MCD3_SDDATA1_MN
VS33P 3709-001492
29 MCD3_SDDATA2_MN
GND
0904-002453
C824 C836
3-in-1 Socket
R769 Support : SD/MMC/SDHC
330 0.022nF 0.022nF
50V 50V
nostuff Type : angle
o n B
C
A A
DESIGN DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP MULTICARD
BL Lee REV 1.0 2 IN 1 CARD BA41-01060A

April 11, 2009 10:05:58 AM PAGE 46 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
WLAN, 4mm
P3.3V P3.3V P3.3V P3.3V
D D
R417
10K C3641
1% 100nF C863
J505 10V 100nF
EDGE-MINIPCI-E-52P 10V
1 2
WAKE* P3.3V_1
3 4
RSVD_1 GND_1
5 6
RSVD_2 P1.5V_1
7 8
MIN3_CLKREQ# 9
CLKREQ* SIM_VCC_C1
10
GND_2 SIM_DATAIO_C7
11 12
CLK1_MINIPCIE# 13
REFCLK- SIM_CLK_C3
14 P3.3V P3.3V
CLK1_MINIPCIE 15
REFCLK+ SIM_RESET_C2
16
WLON_LED#
g
GND_3 SIM_VPP_C6
17 18 D 3
SIM_RSVD_C8 GND_4 Q547
19 20
21
SIM_RSVD_C4 W_DISABLE*
22 KBC3_RFOFF# C819 C817 C796 C818 C3640 G RHU002N06
23
GND_5 PERST*
24
PLT3_RST# 10000nF 10000nF KBC3_RFOFF#
n
100nF 100nF 100nF 1
PEX1_MINIRXN1 25
PERN0 P3.3V_AUX
26 C3898
6.3V 6.3V
S
PEX1_MINIRXP1 PERP0 GND_6 nostuff 2
27 28 0.1nF nostuff
GND_7 P1.5V_2
l
29 30 50V nostuff
GND_8 SMB_CLK
PEX1_MINITXN1 31
PETN0 SMB_DATA
32 Added by EMC
u
33 34
PEX1_MINITXP1 35
PETP0 GND_9
36
GND_10 USB_D- USB3_WIMAX-
a
37 38
39
RSVD_11 USB_D+
40 USB3_WIMAX+
RSVD_12 GND_11
41 42
s i
C 43
RSVD_13 LED_WWAN*
44 MIN3_LED_WWAN#1_MN C
RSVD_14 LED_WLAN* MIN3_LED_WLAN#1_MN Mini PCI Express Card
45 46 MIN3_LED_WPAN#1_MN
RSVD_15 LED_WPAN*
t
47 48 30.00 mm
M502 M501 RSVD_16 P1.5V_3
49 50
HEAD HEAD RSVD_17 GND_12
51 52
DIA DIA RSVD_18 P3.3V_2
50.95 mm
48.05 mm
LENGTH LENGTH
m
53 Top
n
BA61-01090A BA61-01090A MNT1
54
MNT2
Pin 1
HALFSIZE 3709-001498
FULLSIZE
a
Angle type
e
Odd Pins : Top side
PEM : WLAN minicard + Half minicard Even Pins : Bottom Side
S fid
HSDPA, 7mm
Bonn-E : stuff
P3.3V
SIM CARD CONN.
P3.3V Canne : nostuff P1.5V P3.3V P3.3V
Bonn-E : stuff
R47 Canne : nostuff
10K
C135 C136
n
R596 1%
100nF 10K 100nF
10V 10V J5
B J502 EDGE-SIM-8P-MNT B
MINICARD-52P C1 C5
SIM3_C1 C1 C5
o
1 2 C2 C6
3
WAKE* P3.3V_1
4 SIM3_C2 C3
C2 C6
C7 SIM3_C6
5
RSVD_1 GND_1
6
SIM3_C3 C3 C7 SIM3_C7
RSVD_2 P1.5V_1 P3.3V
7 8 C4 1
ITM3_CLKREQ# 9
CLKREQ* SIM_VCC_C1
10
SIM3_C1 SIM3_DETECT# C8
CD_U MNT1
2
11
GND_2 SIM_DATAIO_C7
12
SIM3_C7 CD_L MNT2
C
CLK1_MINIPCIE2# 13
REFCLK- SIM_CLK_C3
14 SIM3_C3 P3.3V 3709-001478
2
CLK1_MINIPCIE2 15
REFCLK+ SIM_RESET_C2
16
SIM3_C2
GND_3 SIM_VPP_C6 SIM3_C6 Type : angle C45
BAV99LT1
BAV99LT1
0.01nF
17 18
3
2
2
SIM_RSVD_C8 GND_4 0.5pF
19 20 KBC3_RFOFF#_R_MN R595 0 50V
D513
D516
SIM_RSVD_C4 W_DISABLE* KBC3_RFOFF#
BAV99LT1
BAV99LT1
BAV99LT1
BAV99LT1
21 22
GND_5 PERST* PLT3_RST#
1
23 24
3
PEX1_MINIRXN2 PERN0 P3.3V_AUX nostuff
25 26
D514
D517
D512
D515
PEX1_MINIRXP2 PERP0 GND_6 nostuff
27 28
1
nostuff
GND_7 P1.5V_2
1
29 30
GND_8 SMB_CLK
31 32 nostuff
PEX1_MINITXN2 33
PETN0 SMB_DATA
34 nostuff
PEX1_MINITXP2 35
PETP0 GND_9
36 nostuff HSDPA
GND_10 USB_D- USB3_MINIPCIE2- nostuff HSDPA
37 38 HSDPA
39
RSVD_11 USB_D+
40 USB3_MINIPCIE2+ HSDPA
RSVD_12 GND_11 C42 C43 C44 HSDPA
P3.3V 41 42 MIN3_LED_WWAN#2_MN 1000nF 0.01nF 0.01nF HSDPA
RSVD_13 LED_WWAN*
43 44 MIN3_LED_WLAN#2_MN 10% 0.5pF 0.5pF
RSVD_14 LED_WLAN*
45 46 Mini PCI Express Card 6.3V 50V 50V
47
RSVD_15 LED_WPAN*
48
SIM3_DETECT#
RSVD_16 P1.5V_3 30.00 mm
49 50
A C89
C581 C582 51
RSVD_17 GND_12
52
A
10000nF-X5R
100nF 100nF
RSVD_18 P3.3V_2
6.3V
10V 10V 53 M500 DESIGN DATE TITLE
50.95 mm
48.05 mm
MNT1
MNT2
54 HEAD
DIA
HSDPA HSDPA
HSDPA HSDPA
Top MS Yang 12/05/2008
BONN-E SAMSUNG
HSDPA CHECK DEV. STEP
LENGTH HSDPA ELECTRONICS
3709-001506 BA61-01103A|screw-118-2b-h0450 HSDPA
Pin 1 MK Kim MP MINI_PCIE_CONN
HSDPA APPROVAL REV PART NO.
Type : angle BL Lee REV 1.0 WLAN & HSDPA & SIM CARD BA41-01060A
Odd Pins : Top side
Even Pins : Bottom Side MODULE CODE LAST EDIT
April 11, 2009 10:05:58 AM PAGE 47 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D SATA I/F CONN D
SATA HDD CONN
n g l
MAIN TO SUB SATA ODD CONN
u
JHDD500
a
HDD-22P-SMD
S1
s i
C S2
GND1 P5.0V C
SAT1_HDD_TXP S3
TX+
SIGNAL
SAT1_HDD_TXN TX-
t
S4 J17
GND2 CONN-12P-FPC
S5
SAT1_HDD_RXN S6
RX-
SAT1_HDD_RXP S7
RX+ 1
GND3 2
m
C699 C434 C428 C697 C696
n
3
P1
P3.3V 3.3V_1 nostuff 100nF 10000nF-X5R 10000nF-X5R 100nF 100nF 4
P2
3.3V_2 nostuff 10V 10V 10V 10V 10V 5
P3 nostuff
P4
3.3V_3 nostuff SAT1_ODD_TXP 6
a
GND4 nostuff SAT1_ODD_TXN 7
e
P5
C799 C811 C814 P6
GND5 8
10000nF 100nF 100nF
P7
GND6 SAT1_ODD_RXN 9
POWER
6.3V 10V 10V

P8
5V_1 SAT1_ODD_RXP 10
5V_2 11
P9
S fid
nostuff 5V_3 12
nostuff
P10
GND7
nostuff P11 3708-002190
RESERVE
P12
P5.0V P13
GND8 Type : angle
12V_1
P14
12V_2
P15
12V_3
C776 C782 C790
100nF 10000nF 10000nF
C769 C767 M1
MNT1
100nF 100nF M2
10V 6.3V 6.3V MNT2
n
10V 10V
nostuff 3710-002788
B Type : angle B
Co
A A
DESIGN DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP SATA_DEVICES
BL Lee REV 1.0 HDD & ODD SUB CONNECTOR BA41-01060A

April 11, 2009 10:05:58 AM PAGE 48 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
MICOM RESET
EXCEPT AS AUTHORIZED BY SAMSUNG. KBC3_RCIN#
R652
100 Q523 D 3 P3.3V_AUX
P3.3V_MICOM 1203-002364 1% VDC RHU002N06
KBC3_RCIN#_R_MN P3.3V_MICOM G
RESET*
2 1
VDD
3 R654 S 2 R643
D P3.3V_MICOM P5.0V C663 GND
1 C638 THM3_STP#_Q_MN
D
100K R635 BSS84 4.7K
100nF TPS3809 100nF R632 47K
10V 25V Q526
U512 330K
nostuff THM3_STP#_QR_MN R641 3 2 THM3_STP#_R_MN
D S
3 47K G1
D C654 R642
GMT : 1203-005592 THM3_STP#_VDC_MN
Q521
RHU002N06
10nF 100K THM3_STP#
C681 C637 C671 G 25V 1%
100nF 100nF 100nF 1 10kohm pull-up to P3.3V_AUX
S should be at the thermal sensor side.
R637 2
150K
1% nostuff
nostuff
nostuff
g
nostuff
R667 R673 nostuff
10K 10K nostuff
1% 1% nostuff
KBC3_RCIN# P5.0V
KBC3_CHKPWRSW# KBC3_STBY#_MN
n
KBC3_MD
100
36
37
59
l
7
1
6
5
4
9
8
R657 10K 1%
KBC5_TCLK
u
NMI
RES*
RESO*
VCC_1
VCC_2
VCC_3
MD0
MD1
VCCB
VCL
STBY*
48 49 R662 10K 1%
KBC5_TPAD_CTRL# PA0 P40 KBC3_RSMRST# KBC5_TDATA
a
47 50
KBC5_LED_CTRL 31
PA1 P41
51 KBC3_SUSPWR
KBC5_TCLK 30
PA2 P42
52
KBC3_THERM_SMDATA P3.3V_MICOM
s i
C KBC5_TDATA 21
PA3 P43
53
KBC3_BKLTON C
KBC3_SCLED# 20
PA4 P44
54 KBC3_PWRBTN#
KBC3_NUMLED# PA5 P45 KBC3_VRON R675
t
11 55 4.7K
KBC3_CAPSLED# 10
PA6 P46
56 KBC3_BLCKPWRSW# KBC3_SMDATA#
PA7 P47 KBC3_CPURST# R674 4.7K
91 14
KBC3_SMCLK#
KBC3_EXTSMI# PB0 P50 KBC3_LED_ACIN#
m
90 13
KBC3_RUNSCI# KBC3_LED_CHARGE#
n
PB1 P51
81 12
KBC3_USBPWRON# 80
PB2 P52 KBC3_SMCLK#
KBC3_CHG4.2V 69
PB3
26
KBC3_RFOFF# 68
PB4 P60
27 VRM3_CPU_PWRGD
a
KBC3_LED_POWER# PB5 P61 LID3_SWITCH# P3.3V_MICOM
e
58 28
KBC3_PWRGD PB6 U10 P62 KBC3_PRECHG
57 29 C3911
KBC3_PWRON PB7 P63
32
KBC3_P5ALWON 0.1nF
KBC5_KSI(0:7) 0 79 H8S-2110B P64
33
KBC3_CHGEN 50V
P10 P65 nostuff R656
1 78 34 For ESD 300K P3.3V_MICOM
CHP3_SLPS3#
S fid
P11 P66
2 77 0903-001439 35 1%
3 76
P12 P67 PEX3_WAKE#
4 75
P13
38 8
KBC5_KSO(8:15) BAT3_DETECT#
P14 P70
5 74
P15 P71
39 9 C678 R665
6 73 40 10 100nF 10K
P16 P72
7 72
P17 P73
41 11 10V
R661 R659 1% KBC3_CHKPWRSW#
42 12 100K 10K
KBC5_KSO(0:7) 0 67
P74
43 13 1% 1%
P20 P75
1 66 44 14
P21 P76 D 3 C685
n
2 65 45 15
P22 P77 330nF
3 64 Q530
P23 P3.3V 10V
4 63 93 G RHU002N06
B 5 62
P24 P80
94
KBC3_WAKESCI# KBC3_BLCKPWRSW# B
P25 P81 KBC3_A20G 1
6 61 95 S 2
P26 P82 PCI3_CLKRUN#
o
7 60 96 KBC3_P3.3V_PU_R_MN R660
P27 P83
97 10K 1% KBC3_PWRSW#
LPC3_LAD(0:3) 0 82
P84
98
KBC3_TX P3.3V_MICOM
1 83
P30 P85
99
KBC3_RX
2 84
P31 P86 KBC3_THERM_SMCLK
P32 KBC3_P3.3VMICOM_PU_R_MN POWER SWITCH BLOCK WHILE MICOM UPDATE
3 85 25 R676 10K
C
P33 P90
86 24
LPC3_LFRAME# 87
P34 P91
23
KBC3_CHKPWRSW#
PLT3_RST# 88
P35 P92
22 ADT3_SEL#
CLK3_PCLKMICOM 89
P36 P93
19
KBC3_SPKMUTE J18
CHP3_SERIRQ P37 P94
18
CHP3_SUSSTAT# TP2000 HDR-4P-1R-SMD
CLK3_MICOM_XTALIN_MN
P95 CHP3_SLPS5#
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
2 17 1
CLK3_MICOM_EXTAL_MN 3
XTAL P96
16
CHP3_SLPS4# KBC3_MD 2
MODE0 KBC3_MD 1
EXTAL P97 KBC3_SMDATA# KBC3_TX 3
TX KBC3_TX 2
Y2 KBC3_RX RX KBC3_RX 3
4
GND 4
15
46
70
71
92
5
1
MNT1
2801-004665 6
MNT2
10MHz
C447 C448 3711-000456
0.018nF 0.018nF nostuff
Type : straight
MICOM Crisis Update

A A
Condition: P90=P91=P92=High(MICOM_P3V) DRAW DATE TITLE
MD0=MD1=Low(0V) MS Yang 12/05/2008

BONN-E SAMSUNG
Serial Port: P84 & P85 CHECK
MK Kim
DEV. STEP
MP MICOM
ELECTRONICS
BL Lee REV 1.0 MICOM_Renesas2110_100p BA41-01060A

April 11, 2009 10:05:58 AM PAGE 49 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
EXCEPT AS AUTHORIZED BY SAMSUNG. Micom Glue Logic TOUCHPAD LED
SI2315BDS-T1
D D
P5.0V_STB P3.3V_AUX P3.3V_LED
Q527
R645
3
2
200K
D
S
1%
1
G
C650
R639
30.1K
C672
KEYBOARD TOUCHPAD
330nF
1%
KBC5_LED_CTRL_Q_MN 100nF
10V
KBC5_LED_CTRL_QR_MN
KBC5_LED_CTRL_R_MN D 3
g
Q522
R640 10K 1%G RHU002N06
KBC5_LED_CTRL
1
P3.3V P5.0V R638 S 2
n
100K
1%
l
C602
1%
1%
1%
1%
1%
1%
1%
1%
nostuff when 2111b(144p) is used 100nF
u
10V
10K
10K
10K
10K
10K
10K
10K
10K
3708-002402
P3.3V_LED P3.3V_LED
a
1
KBC5_TDATA 2
s i
C TPD5_R_BUTTON# 3 C
TPD5_L_BUTTON# 4
R610
R611
R612
R613
R614
R615
R616
R617
R412 475 1% 1 2 R289 475 1% 1 2

KBC5_KSI(0:7) KBC5_TCLK 5
t
6
7
C606 MNT1 LED14 LED6
C603 0.01nF
C605 C604 8
MNT2
1nF 1nF 1nF LTST-C193TBKT-AC LTST-C193TBKT-AC
0.5pF
R409 R283
m
50V 50V 50V 50V 475 1% 1 2 475 1% 1 2
CONN-6P-FPC
n
J13
Type : angle LED10 LED1
LTST-C193TBKT-AC LTST-C193TBKT-AC
a e
J12 R413 475 1% 1 2 R281 475 1% 1 2
KBC5_KSO(0:15) FPC-KBD-25P
1 LED15 LED2
2 LTST-C193TBKT-AC LTST-C193TBKT-AC
S fid
3
R411 475 1% 1 2 R284 475 1% 1 2
4 TPD5_R_BUTTON#
5
2
6 LED12 LED3
BAT54C
8 KBC5_TPAD_CTRL#
R777 475 1% 1 2 R303 475 1% 1 2
3
D6
9
10 R633
1
11 100K nostuff LED13 LED4
1%
12 TPD5_L_BUTTON# nostuff LTST-C193TBKT-AC LTST-C193TBKT-AC
n
13
14
R416 475 1% 1 2 R310 475 1% 1 2
15
B 16
B
LED18 LED5
o
18
19 SW2 R414 475 1% 1 2 R306 475 1% 1 2
20 SW-TACT-4P
1 3
21 TPD5_R_BUTTON# TCH1_LED1_MN LED16 LED7
22 TCH1_LED2_MN
2 4 TCH1_LED3_MN LTST-C193TBKT-AC LTST-C193TBKT-AC
C
23 P5.0V TCH1_LED4_MN
24 TCH1_LED5_MN
R415 475 1% 1 2
3 TCH1_LED11_MN
KBC3_TX 25 TCH1_LED6_MN TCH1_LED12_MN
26 2 1 TCH1_LED7_MN TCH1_LED13_MN
MNT1 TCH1_LED8_MN LED17
27 TCH1_LED14_MN
MNT2 BAV99LT1 TCH1_LED9_MN LTST-C193TBKT-AC TCH1_LED15_MN
TCH1_LED16_MN
D9 R767 475 1% 1 2 TCH1_LED17_MN
3708-002166
Type : angle nostuff

LED11
LTST-C193TBKT-AC
MT5 MT9 CANNES BONN

RMNT-25-90-1PRMNT-25-90-1P
SW1
BA70-00601A
BA70-00601A
CONTACT-PLATE-EMI
EMI3
CONTACT-PLATE-EMI
EMI2
SW-TACT-4P
EMI
EMI
1 3
TPD5_L_BUTTON#
2 4
P5.0V
3
A 2 1
A
BAV99LT1 DESIGN DATE TITLE
D10
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
nostuff ELECTRONICS
Keyboard Mount Contact to Touchpad Contact to Touchpad MK Kim MP MICOM GLUE LOGIC
BL Lee REV 1.0 KETBOARD & TOUCHPAD BA41-01060A

April 11, 2009 10:05:58 AM PAGE 50 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D D
FUNCTION KEY LED ADAPTERIN/CHARGING LED
LED19
LTST-C193TBKT-AC
n g l
P3.3V
P3.3V_MICOM
BSS84
Q549
KBC3_LED_ACIN#_Q_MN
LED24
u
LTST-C195KGJRKT
R797 R795 475 1%
3
475 1 G 3
2
KBC3_NUMLED#
D
S
a
1%
1
KBC3_NUMLED#_LED_MN P3.3V_MICOM_LED_ACIN#_R_MN
2 R 4
1
G
R794 10K 1%
s i
C KBC3_LED_ACIN# C
LED20 KBC3_LED_ACIN#_R_MN
LTST-C193TBKT-AC BSS84
P3.3V_MICOM
t
Q548
R798 475 KBC3_LED_CHARGE#_Q_MN
KBC3_CAPSLED# R793 475 1%
3
1%
2
2
KBC3_CAPSLED#_LED_MN
D
S
P3.3V_MICOM_LED_CHARGE#_R_MN
1
G
n
R792 10K 1%
LED21 KBC3_LED_CHARGE#
LTST-C193TBKT-AC KBC3_LED_CHARGE#_R_MN
R799 475
a
KBC3_SCLED#
e
1%
2
KBC3_SCLED#_LED_MN P3.3V_AUX
LED22 U531 KBC3_LED_POWER#_U_MN

5 7SZ14FU
LTST-C193TBKT-AC
S fid
2 + 4 R802 475 1% 1 2
R800 475 KBC3_LED_POWER# -
CHP3_SATALED# 1% 3
2
CHP3_SATALED#_LED_MN
LED25
R803 LTST-C193TBKT-AC
1M
LED23 1%
KBC3_LED_POWER#_R_MN
LTST-C193TBKT-AC
R801 475 C859
WLON_LED#
n
1% 1000nF
2
WLON_LED#_LED_MN
6.3V
B B
Co
A A
DRAW DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP LED_SWITCH
BL Lee REV 1.0 LED_SWITCH BA41-01060A

April 11, 2009 10:05:58 AM PAGE 51 OF 67

4 3 2 1
4 3 2
SAMSUNG PROPRIETARY
USB + eSATA CONNECTOR USB Single connector
P5.0V_AUX_USB
D P5.0V_ALW P5.0V_AUX_USB D
C662 EC511
U7 C687 100uF C689
100nF
TPS2062ADRBR 100nF 16V 100nF
10V
2
IN GND
1 Need 2A Routing 10V AS 10V
R679 0 nostuff
8 7
OC1# OUT1
5 6 EC510 R681 0 J16
OC2# OUT2 nostuff
JACK-USB-4P
KBC3_USBPWRON#_R_MN C621 100uF C622 C623 nostuff
R649 0 3 R934 0 100nF 100nF 0.033nF
16V
KBC3_USBPWRON# EN1# 10V AS 10V 50V 1 4 USB3_P2-_B_MN
PWR
nostuff
g
4 9
USB3_P2- D-
EN2# T_GND USB3_P2+ USB3_P2+_B_MN
D+
GND
nostuff R190 0 1205-003683 nostuff
TPS1_P5.0VAUX_USBPWR1_MN nostuff 2 3 5
KBC5_P5ALWON# B27 6
MNT1
n
ACM2012-900-2P-T MNT2
7
MNT3
8
MNT4
l
R182 0
J14 3722-002767
R186 0
u
nostuff JACK-USB-ESATA-11P
nostuff 1
VBUS GND1
4 Type : angle
a
5
GND2
1 4 USB3_P0-_B_MN 2 8
USB3_P0- D- GND3
USB
3 11
s i
C USB3_P0+ USB3_P0+_B_MN
D+ GND4 C
SHORT559
for sleep in charge
t
2 3 R1005-SHORT SAT1_TXP4_R_MN 6
SAT1_ESATA_TXP SHORT560 R1005-SHORT SAT1_TXN4_R_MN 7
TXP
12 P5.0V_STB
B513
E-SATA
SAT1_ESATA_TXN TXN MNT1
13
ACM2012-900-2P-T MNT2
SHORT561 R1005-SHORT SAT1_RXN4_R_MN 9 14
SAT1_ESATA_RXN SHORT562 RXN MNT3
m
R1005-SHORT SAT1_RXP4_R_MN10 15
SAT1_ESATA_RXP
n
RXP MNT4
3722-002850 R280
200K
Type : angle 1%
USB SUB B’D CONNECTOR

P5.0V_ALW
a
S fid e KBC3_P5ALWON
G
1
D
S
3
2
Q27
RHU002N06
KBC5_P5ALWON#
n
C48 U4
100nF
B TPS2062ADRBR B
10V
2 1
IN GND
o
8
OC1# OUT1
7 TPS3_P5.0VAUX_USBPWR1_MN
LID SWITCH for Canne Bonn : nostuff
Canne : stuff
5 6 R46 0
OC2# OUT2
3 TPS3_P5.0AUX_USBPWR2_MN P3.3V
PLACE CLOSE TO USB SUB B’D Conenctor
C
KBC3_USBPWRON# EN1#
4 9
EN2# T_GND P3.3V
1205-003683
R928 C3908
20K 100nF
C33 R933 1% 10V J507
100nF 20K J7 HDR-4P-1R-SMD
10V 1% HDR-12P-SMD KBC3_PWRSW#
1
BONN 1 2
2 P3.3V_MICOM 3
LID3_SWITCH# 3
3 4
4
2 1 C3923 5
MNT1
1nF 6
USB3_P6- 5 BAV99LT1 50V
MNT2
USB3_P6+ 6 D502
7 3711-000456
USB3_P10- 8 nostuff
Type : straight CANNES
USB3_P10+ 9 CANNES
A 10 CANNES A
KBC3_PWRSW# R932 0
11
LID3_SWITCH# 12 DESIGN DATE TITLE
BONN
3711-000556
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
Type : angle ELECTRONICS
MK Kim MP USB_CONN
BL Lee REV 1.0 USB & eSATA BA41-01060A

April 11, 2009 10:05:58 AM PAGE 52 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
USB I/F Devices

D D
Bluetooth Interface CAMERA

P3.3V
g
P5.0V
J27
HDR-4P-1R-SMD
n
1
USB3_BLUETOOTH- 2
C813 C812 USB3_BLUETOOTH+ 3
l
100nF 100nF 4
C632 C633
10V 10V 5 100nF 100nF
MNT1
u
6 10V 10V
MNT2
a
3711-000456
J11
s i
C Type : straight HDR-6P-SMD C
1
t
1 4
USB3_CAMERA- USB3_CAMERA-_B_MN
2
USB3_CAMERA+_B_MN
3
4
USB3_CAMERA+ 5
m
2 3
n
6
7
B22 MNT1
8
ACM2012-900-2P-T MNT2
3711-002049
a e
Type : angle
S fid
Free Fall Sensor
P3.3V P3.3V
o n C822
10000nF-X5R
6.3V
C821
100nF
10V
B
16
15
14
GND_4
RESERVED_2
VDD
C
USING THE CLOCK AND DATA OF ICH U526
LIS331DL
1 13
VDD_IO GND_3
2 12
NC_1 GND_2
3 11
4
NC_2 INT1
10
FFS3_INT
SMB3_CLK
SDA_SDI_SDO
SCL_SPC RESERVED_1
5 9
GND_1 INT2
FFS3_INT2_MN
SDO
CS
P3.3V
1209-001876
6
7
8
R921 10K FFS

FFS
R922 10K FFS
SMB3_DATA FFS
FFS
A A
DESIGN DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP USB_DEVICES
BL Lee REV 1.0 BLUETOOTH & CAMERA BA41-01060A

April 11, 2009 10:05:58 AM PAGE 53 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D D
MDC connector
g
Internal : P1.5V_AUX P3.3V_AUX P3.3V_AUX
External : P3.3V_AUX
n
C857
l
100nF
10V
u
J30
a
14-D1
1 2
HDA3_MDC_SDO 3 4
s i
C HDA3_MDC_SDI1_R_MN 5 6 C
HDA3_MDC_SYNC 14-D1 R386 22
7 8
HDA3_MDC_SDI1 9 10
t
14-D2 14-D1
HDA3_MDC_RST# 14-D1 13
11 12 HDA3_MDC_BCLK
MNT1
14
MNT2
R739 R383 15
MNT3 C860
C856
m
10K 10K 16 R796
n
MNT4 10000nF
17 100nF 10K
MNT5 6.3V
18 10V
nostuff MNT6
nostuff nostuff
EMI1
3710-002133
a e
CONTACT-PLATE-EMI
SOCK-12P-2R-SMD
M4
EMI
HEAD
Type : straight DIA
LENGTH
S fid
BA61-00784A
MDC
MDC
MDC
J28
n
HDR-2P-SMD
J29
MNT2 B522 CIC21J601NE
B 4 HDR-2P-SMD B
MNT1 B523 CIC21J601NE
3 MDC1_CON1_B1_MN MDC1_CON2_B1_MN
2 1 MDC
o
1 2 MDC
MDC1_CON1_B2_MN MDC1_CON2_B2_MN 3 MDC
MNT1
3711-000541 4 MDC
C842 C843 MNT2
Type : angle 1nF 1nF
3711-000541 MDC
3KV
MDC to mainboard 3KV MDC
C
Type : angle MDC
MDC
Mainboard to RJ11 cable
MDC
MDC
A A
DRAW DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP MDC CONNECTOR
BL Lee REV 1.0 MDC CONNECTOR BA41-01060A


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
EXCEPT AS AUTHORIZED BY SAMSUNG. AD_DC VDC_ADPT CHARGER & POWER MANAGEMENT EMC request
BONN / CANNES Only VDC VDC_CHG
C500
100nF
J2 B3 Q5 Q502 25V
HDR-4P-1R HU-1M2012-121JT AO4435L AO4435L Q8
D CHGVR_DCJACK_JB_NS_MN
1 8 8
CHGVR_VDC_ADPT_RQ_NS_MN
1 R515 0.02 2402-001144 1 8 D
1 S1 D1 D1 S1 S1 D1
2 7 7 2 1W 2 7
2 S2 D2 D2 S2 1% S2 D2
R6 C12 3 6 6 3 R506 3 6
3 C4 S3 D3 D3 S3 EC500 C517 C28 S3 D3
4 C6 C7 100K 1000nF 4
G D4
5 5
D4 G
4 300K R34 R33 4
G D4
5
5 B4
100nF
10nF 1nF 1% 25V
1% 68uF 4700nF-X5R 100nF
MNT1 25V 2.2 22 25V 25V 25V
6 HU-1M2012-121JT 25V 50V AL
MNT2 AO4435L
nostuff CHRVR_AD_DC_RCQ_MN
CHGVR_SGATE_RRQ_MN
3711-007003 EMC request R5 R12 P3.3V_MICOM C35 100nF
Type : angle 100K 43.2K

1% 1% 25V
R8 BGATE
3
CHGVR_SGATE_RQ_MN
D
10K
EMI
G
g
1CHGVR_P3.3V_MICOM_RQ_MN
C17 C18 2 S Q6
100nF 100nF RHU002N06
25V 25V
VCHG=12.602V@2600 Cell ADT3_SEL#
n
VCHG=13.050V@2950 Cell
nostuff
IPRECHG=0.27A nostuff
l
ICHG=2.56A FOR 5200mAh & 4000mAh D 3
Q7 R18 R13
u
BSS84 0 0 Q9-1
G
AP4232GM
a
1 S
2 D1 7 8 J4
HU-1M2012-121JT
D2
R513 B501 BATT-CONN-7P
s i
C G
L505 0.02 CHGVR_VDC_CHG_BJ_NS_MN C
S
8.2uH 1W
2 1 SIQ1250-8R2PF 1% 7
t
6
CHGVR_PHASE_RL_MN
VREF BGATE VDC_ADPT VDC C41 D1 5 6 5
100nF D2 R17 R25 4
10 10
100nF 25V
nostuff 25V D508 3
4700nF-X5R
4700nF-X5R
4700nF-X5R
4700nF-X5R
m
CHGVR_BAT3_SMCLK#_CBJ_MN
CHGVR_PHASE_RC_MN
CHGVR_BAT3_SMDATA#_CBJ_MN
G
CHGVR_BAT3_DETECT#_CBJ_MN
470K 1%
B500
n
BAT54A 2
R68 R61 R56 R54 4 S
3 HU-1M2012-121JT
200K 300K 300K 300K CHGVR_CSIP_NS_MN
R32 R31
C38 1
25V
25V
25V
25V
1% 1% G_CHG
nostuff
1% 1% C32
2
1nF 22 22
1nF
a
50V 3711-007011
e
15.15V@1.264V 50V
C58 Type : angle
C514
R67 R63 10nF R51
CHGVR_SGATE_MN
R14
C15
C14
C19
C22
150K 30K 16V 27.4K C528 B504
1% 1% 1% U3 C36
1
1000nF BLM18PG181SN1
ISL6256AHRZ-T 47nF
25V Q9-2
S fid
19 20 CHGVR_CSIN_NS_MN 50V BAT3_DETECT#
CSIP CSIN AP4232GM
C503 nostuff
G_CHG G_CHG 18 17 0.1nF
G_CHG CHGVR_DCIN_NS_MN SGATE BGATE 50V
25
DCIN
C522 B503
CHGVR_ACSET_MN (1.26V) 27 R522 100nF BLM18PG181SN1
ACSET 4.7
CHGVR_DCSET_MN 28 25V
DCSET
14
CHGVR_BST_CHG_NS_MN BAT3_SMDATA#
C532 BOOT
R69 1000nF 15 CHGVR_BST_CHG_RC_NS_MN C502
G_CHG
CHGVR_VDDP_MN
UGATE 0.1nF nostuff
10K 25V R524 5.1 13 16CHGVR_TG_CHG_NS_MN
VDDP PHASE 50V
12CHGVR_PHASE_CHG_NS_MN
n
1% 1% 26 B502
1.024V@2.561A CHGVR_VDD_MN VDD LGATE
Q510 11CHGVR_BG_CHG_NS_MN BLM18PG181SN1
0.107V@0.268A PGND VREF ( 2.39V )
RHU002N06 CHGVR_CHLIM_RQ_MN CHGVR_CHLIM_MN 7
3 CHLIM BAT3_SMCLK#
B D CHGVR_VADJ_MN 9
VADJ CSOP
21 B
CHGVR_ACLIM_MN 8 22CHGVR_CSOP_MN C501
CHGVR_KBC3_PRECHG_RQ_MN ACLIM CSON
o
CHGVR_CSON_MN
G CHGVR_ICM_MN 5 0.1nF nostuff
KBC3_PRECHG VREF VREF VREF ICM
6 50V
R531 1 VREF
S 1
10K R532 2 EN CHGVR_EN_MN
475K
1% CHGVR_ICOMP_MN 3 2
ICOMP CELLS
CHGVR_VCOMP_MN 4 10 R65
C
R48 VCOMP GND
nostuff 24.3K R74 R77 1K
23 29 1% P3.3V_MICOM
G_CHG G_CHG 1% 10K 200K C66 C64 ACPRN THERM CELLS Cells N/B
1% 1% R66 6.8nF 24
CHGVR_DCPRN_MN
10nF DCPRN KBC3_CHGEN

CHGVR_VCOMP_RC_MN
CHGVR_ICM_RC_MN
100 50V 16V VDD 4

1% 1203-004471 C63
BAV99LT1
BAV99LT1
R53 1nF
2
R929 R528 200K
R70 R57 SHORT566 GND 3
470K 30K 30.1K 27.4K R75 50V
1% 1% 1% 1% 1% C70 R1005-SHORT
Float
100nF 10K 2
1%
3
D2
D1
25V G_CHG
CHGVR_VADJ_RQ_MN
D 3
1
M96 M92
G_CHG M96 M92 G_CHG G_CHG
CHGVR_KBC3_CHG4.2V_RQ_MN
G G_CHG G_CHG G_CHG G_CHG G_CHG
KBC3_CHG4.2V P3.3V_MICOM
R523 1
S 2
10K Q509
Low : 2.508V@4.350V(2950 Cell) R525 RHU002N06
475K R44 R10 100 1%
High : 1.205V@4.200V(2600 Cell) 1%
BAT3_SMDATA# KBC3_SMDATA#
20K
G_CHG 1% R9 100 1%
BAT3_SMCLK# KBC3_SMCLK#
A nostuff ADT3_SEL# A
G_CHG SHORT500 (ACTIVE LOW)
Adapter configuration INSTPAR DRAW DATE TITLE
60W / 3.03A / 96% 90W / 4.32A / 91.2%

CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
Value SEC Code Value SEC Code ELECTRONICS
MK Kim MP PWR_MV_Charger
Rtop 200K 2007-007334 10K 2007-007142 APPROVAL REV PART NO.
G_CHG CHARGER (ISL6256)
Rbot 27.4K 2007-007274 30.1K 2007-002910

4 3 2 1
COM-22C-015(1996.6.5) REV. 3 D:/Users/mobile39/mentor/BONN-E/BONN-E_mp10
4 3 2 1
SAMSUNG PROPRIETARY
P3.3V_AUX & P5.0V_AUX

D D
P5.0V_FILT
nostuff nostuff
R564 R557 C554

C566 R559 0.033nF
0.068nF
R568 0
0
43.2K 50V
50V 27.4K 1%
1%
VDC VDC
R555 R556
11.8K 100K
g
R563 1% 1%
11.8K
1%
G_P3.3V
EC530 C584 SYSVR_VFB2_MN SYSVR_VFB1_MN 5.09V @ HDMI EC533 EC503
100nF
C549
n
68uF G_P3.3V G_P3.3V 100nF 68uF 68uF
25V 25V 25V
25V 25V
AL AL AL
TONSEL VREF2
l
SYSVR_VREF2_MN
P5.0V_STB C534
5V / 3.3V : 280KHz / 430KHz
8
7
6
5
4
3
2
1
u
1nF 5 6 7 8
VO2
COMP2
VFB2
GND
VREF2
VFB1
COMP1
VO1
(4A) 50V D1 D2 D3 D4
a
P3.3V_AUX Q511
33 AP6680AGM
8 7 D1 PAD G_P3.3V P5.0V_ALW (6A)
Q515-1 9
s i
G
C D2 EN5 L507 C
L509 AP4232GM C563 10 32 4 3.9uH
3.9uH G 100nF R571 11
EN3 SKIPSEL
31 C74 S1 S2 S3
3.3 PGOOD2 TONSEL R78 SIQ1048-3R9
t
S 2 25V 12 30 G_P3.3V 100nF 1 2 3
SIQ1048-3R9
SYSVR_PHASE_P3.3V_NS_MN
1 SYSVR_BST_P3.3V_RC_NS_MN EN2 U505 PGOOD1 3.3 25V
SYSVR_BST_P3.3V_NS_MN 13 29 5 6 7 8
VBST2 TPS51120RHBR EN1 SYSVR_BST_P5.0V_RC_NS_MN
14 28 SYSVR_BST_P5.0V_NS_MN D1 D2 D3 D4
R95 R90
6 5 D1 SYSVR_TG_P3.3V_NS_MN DRVH2 1203-004687 VBST1
R132 R131 15 27 10 10
D2 LL2 DRVH1 SYSVR_TG_P5.0V_NS_MN EC507
C653
m
EC509 10 10 16 26
n
SYSVR_BG_P3.3V_NS_MN DRVL2 LL1 SYSVR_PHASE_P5.0V_NS_MN 330uF
330uF C629 G
DRVL1
25 G 100nF
6.3V
PGND2
PGND1
VREG3
VREG5
V5FILT
100nF S SYSVR_BG_P5.0V_NS_MN 10V
6.3V 3 4 4 SYSVR_PHASE_P5.0V_RC_MN 2409-001175
2409-001175 Q515-2 17 mohm
CS2
CS1
10V SYSVR_PHASE_P3.3V_RC_MN Q512 S1 S2 S3
VIN
17 mohm AP4232GM C87
C166 AP6680AGM 1 2 3
a
1nF
e
1nF
RdsOn 16.5mohm 50V
17
18
19
20
21
22
23
24
50V SYSVR_CS2_MN
RdsOn 30mohm
SYSVR_CS1_MN
S fid
R561 R538
P3.3V_MICOM 13K 10K P5.0V_STB
1% 1%
R79 C546 KBC3_P5ALWON

C555 P5.0V_FILT 6.3V C539
10000nF 5.1 1000nF
1% 2203-006090
6.3V 6.3V
1
2203-006852 10000nF-X5R
BAT54C
D510
C75
3
SYSVR_EN1_MN
P5.0V_ALW P5.0V_AUX 1000nF
P5.0V_ALW P5.0V_AUX Q524
D1 D2 D3 D4
B 6.3V B
1 2 5 6
AO6409L R530
2
47K
R648
o
0
4
5%
S
C649 G_P3.3V P5.0V OCP(Typ) : 8.75A

R647 0
3
G
R631 10nF P3.3V OCP(Typ) : 5.92A

nostuff 100K 16V
1% G_P3.3V R572
nostuff C677
C684 SYSVR_EN2_MN
C
P5.0V_ALW_RQ_P5.0V_AUX_MN 4700nF
100nF
KBC3_SUSPWR
D 3R634 6.3V
10V C564 10K
KBC3_SUSPWR_RCQ_P5.0V_AUX_MN
10K
P5.0V_ALW_RCQ_P5.0V_AUX_MN R567 100nF 1%
KBC3_SUSPWR 1% 150K 25V
G 1%
1 Q525
R669
1K C688
S 2 RHU002N06
1% 10nF G_P3.3V G_P3.3V P3.3V_MICOM
25V
nostuff
R85
100K
1%
AUX3_PWRGD
INSTPAR
SHORT2
A A
DRAW DATE TITLE
CHECK
MS Yang
DEV. STEP
01/09/2008
BONN-E SAMSUNG
ELECTRONICS
G_P3.3V MK Kim MP PWR_MV_3V_5V
BL Lee REV 1.0 P3.3V_AUX / P5.0V_AUX BA41-01060A


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
DDR2 Power
D D
VDC
EC516 EC514
g
C741
100nF 68uF 68uF
P5.0V_AUX P5.0V_STB 25V 25V
25V
AL AL
n
R299 R290
0 0 U16
5% 5% nostuff RT8207GQW
l
DDR2VR_VDDP_MN 15
VDDP
D1 7 8
u
C477 R276 D2
1000nF-X5R 5.1 Q541-1
21 DDR2VR_TG_P1.8V_NS_MN
a
25V 1% G
AP4232GM
UGATE P1.8V_AUX
DDR2VR_VDD_MN 14 2 S
1 L512
VDD
2.2uH
s i
C C476 20 DDR2VR_PHASE_P1.8V_NS_MN (4A) 1.825V C
R709 PHASE
VDC 1000nF-X5R 20K SIQ1048-2R2
R699 D1 5 6
t
25V 1% DDR2VR_BST_P1.8V_NS_MN C727 D2 R717 R712 2703-003232
P3.3V_AUX DDR2VR_CS_MN 16 22 10 10 EC520
CS BOOT C806
G 5% 5% 330uF
R270
G_DDR2 OCP=6.25A DDR2VR_BST_P1.8V_RC_NS_MN
3.3 5% 100nF 4 S
3
100nF
2.5V
19 DDR2VR_BG_P1.8V_NS_MN 25V 10V
m
R271 750K DDR2VR_PHASE_P1.8V_RC_MN 2409-001176
n
LGATE
10K 1% C756 ESR=15mohm
1% Q541-2 1nF
nostuff DDR2VR_TON_NS_MN AP4232GM
12 50V
VRM3_DDR_PWRGD TON
fs = 340KHz
a e
18
PGND
nostuff
R252 C457 C456
43.2K 1nF 100nF
13 1% 50V 10V
S fid
PGOOD
9 DDR2VR_FB_MN
FB
10 G_DDR2
KBC3_PWRON S3 R248 R930
KBC3_SUSPWR 43.2K 100K
R258 1% 1%
1K 1%
C472
10nF
R264 1K 50V DDR2VR_S5_MN 11
AUX3_PWRGD 1%
S5
8 G_DDR2 G_DDR2
VDDQ
n
SHORT569 C725 C726
C3902
0.1nF R1608-SHORT Skip Mode VLDOIN
23
10000nF-X5R
6.3V
100nF P0.9V
B 50V nostuff 10V B
nostuff
DDR2VR_MODE_MN 4 nostuff
Added by EMC MODE
o
24
VTT
2
C454 C452
VTTSNS 10000nF-X5R 10000nF-X5R
DDR2VR_DEM_MN 6
DEM 6.3V 6.3V
C
SHORT570 3 7 DDR2VR_NC1_MN
Tracking Discharge R1608-SHORT
GND NC1
1
VTTGND MEM1_VREF
17
NC2
25 DDR2VR_NC2_MN
PAD
5
VTTREF
C453
1203-005570 33nF
G_DDR2 G_DDR2
16V
G_DDR2
INSTPAR
SHORT3
A G_DDR2 A
DRAW DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP PWR_MEMORY
BL Lee REV 1.0 DDR2 POWER BA41-01060A


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
CHIPSET POWER(P1.5V & P1.05V)

D D
VDC
VDC VDC
C745 EC517 EC519

EC512 EC513 C701 100nF 68uF 68uF
68uF 68uF 100nF
C474 25V
25V 25V
25V 25V 1000nF-X5R AL AL
25V
AL AL 25V U17
g
[ near to IC ] MAX17020ETJ+ nostuff
5 6 7 8
8 7 6 D1 D2 D3 D4
6 D25 D1
D4 D3
IN
n
Q535 Q542
AP6680AGM G AP6680AGM P1.05V
P1.5V (6A) CHSETVR_TG_P1.5V_NS_MN 15 26CHSETVR_TG_P1.05V_NS_MN L511
G
DH1 DH2 4
1.8uH
l
L510 4 S1 S2 S3
SIQ1045-1R8PF
(6A)
CHSETVR_PHASE_P1.05V_NS_MN 1 2 3
2.2uH S3 S2 S1 25
LX2
u
3 2 1 CHSETVR_PHASE_P1.5V_NS_MN
16 5 6 7 8
CHSETVR_PHASE_P1.05V_RC_MN
LX1 C737 D1 D2 D3 D4
SIQ1048-2R2 8 7 R703 CHSETVR_BST_P1.05V_NS_MN R737 R743
6 D25 D1 C728 5%
a
R698 R693 D4 D3 CHSETVR_BST_P1.5V_NS_MN 24 10 10
BST2
CHSETVR_PHASE_P1.5V_RC_MN
10 10 17 CHSETVR_BST_P1.05V_RC_NS_MN EC518
EC515 BST1
23 R706 3.3
C731
s
100nF 25V
i
C C753 5% 5% CHSETVR_BST_P1.5V_RC_NS_MN
100nF 25V DL2
G
100nF 330uF C
330uF G 3.3 5% 18 CHSETVR_BG_P1.05V_NS_MN 4 2.5V
2.5V
100nF CHSETVR_BG_P1.5V_NS_MN DL1
22 S1 S2 S3
C771 25V
2409-001176
25V 4 PGND 1nF
t
2409-001176 C718 S3 S2 S1 1 2 3
3 2 1
Q536 50V
1nF Q543
AP6680AGM
50V AP6680AGM [ near to FET ]
9
[ near to FET ] BYP
m
30
n
OUT2
10
OUT1
P3.3V
a e
R260 R259 28
PG2
C470 100K 100K
0.022nF 1% 1% R250
50V 11 100K
FB1
P1.5V SET : 1.510V CHSETVR_FB1_MN 1%
S fid
13
nostuff R261 PG1
5 CHSETVR_RTC_MN VCCP3_PWRGD
43.2K RTC
1%
P2.0V_REF
C478
C490 1000nF-X5R
P5.0V_STB 1
G_P1.05V REF 6.3V
100nF
20 25V
SECFB
29CHSETVR_SKIP_MN G_P1.05V
n
19
VDD SKIP
7
CHSETVR_LDO_MN LDO
B R274
C479 C730 B
1000nF-X7R 4700nF-X7R P5.0V_VCC
47
o
P5.0V_VCC 6.3V 6.3V
5% P5.0V_VCC
8 D7
LDOREFIN
MMBD4148
3 G_P1.05V 1 3
VCC
P2.0V_REF C481 14
C
1000nF-X5R ON1
6.3V
R287
27 CHSETVR_ON_MN
ON2 KBC3_PWRON
R296 1K
15K CHSETVR_REFIN2_MN 32 Ton ; Open R286 1%
1% G_P1.05V REFIN2 C738
R1005-SHORT fs ; 400KHz / 300KHz 0 100nF
SHORT563 4 nostuff 5%
P1.05V Set : 1.053V ONLDO
2 CHSETVR_TON_MN
25V
CHSETVR_ONLDO_MN
TON
R294 R295
100K 20K G_P1.05V CHSETVR_ILIM1_R_MN CHSETVR_ILIM2_MN
1% 1% 12 31
ILIM1 ILIM2
R249 CHSETVR_ILIM1_MN CHSETVR_ILIM2_R_MN R285
200K
R251 R293 R307 0
1% 150K 21 33 150K 200K 5%
1% AGND PAD 1%
1%
G_P1.05V nostuff
I LIMIT = 11.5A 1203-005563
I LIMIT = 11.4A
G_P1.05V G_P1.05V G_P1.05V G_P1.05V G_P1.05V G_P1.05V
A A
DRAW DATE TITLE
SHORT505
INSTPAR
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP PWR_MV_Cantiga
G_P1.05V APPROVAL REV PART NO.
BL Lee REV 1.0 P1.5V_AUX, P1.05V BA41-01060A


4 3 2 1
COM-22C-015(1996.6.5) REV. 3 D:/Users/mobile39/mentor/BONN-E/BONN-E_mp10
4 3 2 1
SAMSUNG PROPRIETARY
CPU VRM [INTERSIL]

D D
VDC
P3.3V
C524 C526 EC504 EC501

100nF 100nF 15uF 15uF
25V 25V 25V 25V
CPU1_DPRSTP# 2409-001173
R84 499 1%
R81 0 5% CHP3_DPRSLPVR 2409-001173
VCCP3_PWRGD [Prodliger]
g
R80 0 Routing Recommendation
KBC3_VRON
5 should be met
nostuff D
- Hound tooth like
CPU1_VID(6) - GDN,VCC > 10VIA / pad
n
CPU1_VID(5) Keep away from Vphase Q503
CPU1_VID(4)
G AON6414L
4 CPU_CORE
CPU1_VID(3) Q507 L500
l
S1 S2 S3
C83 CPU1_VID(2) CPUVR_PHASE1_CPU_NS_MN 1 2 3 AON6710L 0.39uH
100nF CPU1_VID(1)
u
5 5 MPO104-R39
25V CPU1_VID(0)
1
4
D D EC2
R23 R27 R547 R536
Q504
a
R73 C56 10 10 R554 1 330uF
45 CPUVR_DPRSTP#_MN
1 EC3
47 CPUVR_CLK_EN#_MN
AON6710L 5% 2V
44 CPUVR_VR_ON_MN
5% 5% 3.3K 5%
P3.3V 5% AL 1000uF
s i
G G
2
3
C CPUVR_BST1_CPU_RC_NS_MN
3.3 220nF CPUVR_PHASE1_CPU_RC_MN nostuff nostuff
2.5V C
4 4
CPUVR_BST1_CPU_NS_MN
5% 25V S1 S2 S3 S1 S2 S3 C30 R539 C547
10K 220nF
t
1 2 3 1 2 3 1nF 1%
CPUVR_TG1_CPU_NS_MN
16V
50V
G_CPU 49
48
46
43
42
41
40
39
38
37
R92 R98
10K 499 C39
CPUVR_BG1_CPU_NS_MN
VRM_VSUM
EP
3V3
CLK_EN#
DPRSTP#
DPRSLPVR
VR_ON
VDI6
VDI5
VDI4
VDI3
VDI2
VDI1
VID0
m
1% 1% 1nF
VRM_ISEN1
n
50V
1 36 VRM_VCC_PRM
VRM3_CPU_PWRGD PGOOD BOOT1 nostuff VRM_ISEN2
2 35
CPU1_PSI# CPUVR_PMON_MN 3
PSI# UGATE1
34
a
CPUVR_RBIAS_R_MN
PMON PHASE1 P5.0V
e
R96 100K 1% R97 CPUVR_RBIAS_MN 4
RBIAS PGND1
33
47K 5% CPUVR_VR_TT#_MN 5 U5 32 R64
VR_TT# LGATE1
R105 4.99K R99 1%CPUVR_NTC_MN 6
NTC ISL6266AHRZ-T PVCC
31 CPUVR_PVCC_MN
1% CPUVR_NTC_R_MN
470K CPUVR_SOFT_MN 7 30 CPUVR_TG2_CPU_NS_MN
G_CPU SOFT LGATE2 1 VDC
C91 15nF 50V R566 CPUVR_OCSET_MN 8 1203-005009 29
VRM_VCC_PRM C62 C61
S fid
OCSET PGND2
10K 1% CPUVR_VW_MN 9 28
VW PHASE2 220nF 220nF
C98 CPUVR_COMP_MN 10
COMP UGATE2
27 CPUVR_BG2_CPU_NS_MN
16V 16V
4.7nF
R101 C95 CPUVR_FB_MN 11
FB BOOT2
26
DROOP
25V
C92 0.068nF CPUVR_FB2_RC_MN
12 25
VDIFF
VSUM
ISEN2
ISEN1
VSEN
CPUVR_BST2_CPU_RC_NS_MN
FB2 NC
VDD
RTN
50V R60 C51

DFB
VSS
2.2nF 50V
VIN
47 5% R93CPUVR_FB2_MN C525 C527 EC502 EC505

VO
CPUVR_FB_RC_MN
1K 1% 3.3 220nF
5% 25V
100nF 100nF 15uF 15uF
R100 R104 R103 C94 R94 25V 25V 25V 25V
13
14
15
16
17
18
19
20
21
22
23
24
CPUVR_BST2_CPU_NS_MN
8.2K 5% 100K 10K 0.1nF 2409-001173
1K CPUVR_VDIFF_MN
CPUVR_RTN_MN
1% 1%
CPUVR_DFB_MN
CPUVR_DROOP_MN
CPUVR_VIN_NS_MN
CPUVR_VDD_MN
50V 1% G_CPU
n
CPUVR_COMP_R_MN 2409-001173
R86 0 5% CPUVR_VSEN_MN
B CPU1_VCCSENSE 50V B
VRM_ISEN1 5
1nF D
VRM_ISEN2
o
C82
R83 0 5% Q506
CPU1_VSSSENSE
C76 C84 P5.0V
G AON6414L
0.33nF 0.33nF
C561 0.22nF 50V 4 Q508 L501
S1 S2 S3
50V 50V R562 R543 AON6710L 0.39uH
R560 1K 1% CPUVR_PHASE2_CPU_NS_MN 1 2 3
C
2.49K 1% 10 5 5 MPO104-R39
D D
1% R28 R24 R62 R529
C543 Q505 10 10 1
G_CPU 1000nF-X7R AON6710L R55 1
5% 5% 3.3K 5% 5%
6.3V G G
5% nostuff
C552 47nF 50V 4 4 CPUVR_PHASE2_CPU_RC_MN
S1 S2 S3 S1 S2 S3 C25 R71 C68
C553 220nF 16V 1 2 3 1 2 3 1nF 10K 220nF
50V
1% 16V
R553 10K 1% G_CPU
R552 C34 VRM_VSUM

1 2 2.21k 1% 1nF
VRM_VCC_PRM 50V VRM_ISEN2
VRM_VCC_PRM
C550
100nF TH500 CPUVR_VRM_VCC_PRM_RTH_MN nostuff VRM_ISEN1
10V NTCG163JF103HT VDC
Place near to L_Phase1
(1404-001152)
G_CPU
VRM_VSUM C545 R546
A 22nF
10 A
1%
50V
DRAW DATE TITLE
G_CPU SHORT502 CHECK

MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
INSTPAR ELECTRONICS
MK Kim MP PWR_CPU_MV_ISL6266
G_CPU BL Lee REV 1.0 CPUI VRM (IMVP6+) BA41-01060A

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D
Ext. GFX Core Power [Semtech] D
P3.3V P3.3V P5.0V VDC
R533
g
Q10 20K
1% EC5 EC4
EGFX_CORE P5.0V 2 S 1 BSS84 C93
15uF 15uF
G
100nF
25V
25V 25V
AL AL
n
M96
3 D C536
100nF
R72
EGFXVR_BST_GFX_RC_NS_MN
10V
R76 680K R58
C72 51.1K 1% 470K nostuff
u
10nF 1% 1% nostuff
2
nostuff
EGFXVR_PGOOD_MN
25V
VOUT Rising Time Adjustment
a
D3
C535 BAT54A Q11
3
0.47nF AON6414L
s i
C R526 0 50V U504 C
1
VCCP3_PWRGD 5 5
5%
SC471MLTRT D D
EGFX_CORE
t
nostuff EGFXVR_VOUT_MN 10 3
R527 G_EGFX G_EGFX VOUT VCC Q12
EGFXVR_EN_MN 12 11 R91
KBC3_PWRON EGFXVR_G0_MN 14
EN PGOOD 3.3 5% G G
AON6414L
10K 1% G0 EGFXVR_BST_GFX_NS_MN C85
C537 EGFXVR_G1_MN 15
G1 BST
2 4 4 L508 OCP ; 33.7A
m
3 1 100nF EGFXVR_D1_MN 7 16 100nF 25V S1 S2 S3 S1 S2 S3
0.39uH
n
EGFXVR_D0_MN 8
D1 DH EGFXVR_TG_GFX_NS_MN 1 2 3 1 2 3
10V 1
MMBD4148 D0 LX
EGFXVR_FB_MN 9
FB ILIM
13 R82 12.4K 1% MPO104-R39
D509 6 4EGFXVR_ILIM_GFX_NS_MN
EGFXVR_PHASE_GFX_NS_MN
RTN DL R136 R135 M96
17 5 EGFXVR_BG_GFX_NS_MN 5 5 10 10
a
THERM GND
e
D D 5% 5% EC506 EC534 EC6
1203-004943 C78 C586 330uF 330uF 330uF
R917 R535 R911 R550 1000nF-X7R Q22 EGFXVR_PHASE_GFX_RC_MN 100nF 2.5V 2.5V 2.5V
C538 2K OCP ; 33.7A AON6710L AL AL AL
3.01K 5.11K 6.8nF 22K 1%
6.3V G G C179 10V
1% 1% 4 4 1nF 2402-001316 2402-001316 2402-001316
S fid
50V 1% S1 S2 S3 S1 S2 S3 50V
M96 M92 M96 G_EGFX C181 1 2 3 1 2 3 M96 ESR=15mohm ESR=15mohm ESR=15mohm
0.27nF Q21 M96
R924 EGFXVR_D1_R_MN
50V AON6710L
2.21k nostuff
R542 10K 1%
EGFXVR_D0_D1_RC_MN
GFX3_VOLTID0 1%
R925 R534
14.7K 24.3K R544 R916 R549 C544
1% 1% 61.9K 0 9.09K 2.2nF
n
M96 M92
1% 1% 50V
R545 10K 1%
GFX3_VOLTID1 M92 M96 M96 nostuff
B M96 B
o
G_EGFX G_EGFX G_EGFX
R548 10K 1% RD0 RD1
GFX3_VOLTID2
SHORT1
nostuff INSTPAR
BOM Table
Power Table (by AMD Power Play)

Condition GFX3_VOLTID2 GFX3_VOLTID1 GFX3_VOLTID0
Spec
C M92-M2 LP
Calculated
GFX3_VOLTID2 GFX3_VOLTID1
G_EGFX
GFX3_VOLTID0
Spec
M96
Calculated Measured
nostuff
nostuff
nostuff
nostuff
nostuff
High Performance Reserved Reserved 1 0.95V 0.953V Reserved 1 1 1.15V 1.139V 1.1543V
A A
UVD Reserved Reserved 1 0.95V 0.953V Reserved 1 0 1.10V 1.073V 1.0865V
DESIGN DATE TITLE
Battery - Dual Display Reserved Reserved 1 0.95V 0.953V Reserved 0 1 1.00V 0.997V 1.0085V
MS Yang 12/05/2008
BONN-E SAMSUNG
Battery - Single Display Reserved Reserved 0 0.90V 0.908V Reserved 0 0 0.90V 0.904V 0.9133V CHECK DEV. STEP
ELECTRONICS
MK Kim MP GFX_POWER
BL Lee REV 1.0 EXT. GFX VDDC (SC471M) BA41-01060A

April 11, 2009 10:05:58 AM PAGE 60 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D P1.1V D
n g l
P1.1V(External Gfx)
u
P5.0V_ALW P1.1V
a
U507 L506
ISL8014IRZ-T 0.82uH
s i
C 1 14
C
VIN_1 LX_1 P1.1V_PHASE_P1.1V_NS_MN
C104 C103
t
2 15
22000nF-X5R 22000nF-X5R VIN_2 LX_2
C573 C105 C106
56-B1 60-C4 61-C4 62-B2 20% 20% R580 22000nF-X5R 22000nF-X5R
5% 6.3V 6.3V 3 100K 0.047nF 20% 20%
VDD
R575 47K 1% 50V 6.3V 6.3V
KBC3_PWRON
m n
P1.1V_PHASE_R_MN
R573 1K 1% P1.1V_EN_MN 5 12
VCCP3_PWRGD EN PGND_2
R579
nostuff
P3.3V C562 11 12.7K
47nF PGND_1
1%
a
FB Ref =0.8V
e
25V
R577 7
PG
10K
1% 8 R581
VFB P1.1V_VFB_MN
P1.1V_PWRGD 300K
S fid
P1.1V_SYNCH_MN 4 1%
SYNCH
9
SGND_1
6
P5.0V_ALW NC_1
10
SGND_2
13
NC_2
16 17
NC_3 EP
n
1203-005382
Burst mode : R569 nostuff & R570 stuff
Continuous mode : R569 stuff & R570 nostuff
B B
Co
A A
DRAW DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP PWR_MV_Switched
BL Lee REV 1.0 P1.1V BA41-01060A

April 11, 2009 10:05:58 AM PAGE 61 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
Switched Power
D D
Switched Power On (P3.3V) Switched Power On (P5.0V)

P5.0V_STB P12.0V_ALW P3.3V_AUX P3.3V
Q13
AP6680AGM
P5.0V_ALW P5.0V P5.0V_AUD
D1 D2 D3 D4
S1 S2 S3
5 6 7 8
1 2 3
g
R108
4
G
R107 470K SHORT554 INSTPAR
100K 1% Q50
1% AO4435L
n
P12.0V_ALW_RCQ_P3.3V_MN
SHORT555 INSTPAR
1 8
S1 D1
C112 2
S2 D2
7
SHORT556 INSTPAR
l
D 3 4700nF 3 6
Q17 S3 D3
10V R167 C287 4
G D4
5
u
G RHU002N06 C117 100K 10nF C315 C320
KBC3_PWRON_INV# 4.7nF 1% 50V 100nF 4700nF
1
25V
a
S 2 10V 10V
P5.0V_ALW_RQ_P5.0V_MN
D 3 P5.0V_ALW_RCQ_P5.0V_MN
R168
Q16 10K
s i
C G RHU002N06 D 3 1% C
KBC3_PWRON Q26
1
t
S 2 G RHU002N06
KBC3_PWRON
1
S 2
a m e n
Switched Power On (P1.8V)
P12.0V_ALW
S fid P1.8V_AUX P1.8V

P12.0V_ALW
n
B VDC P12.0V_ALW B
Q517
o
AP6680AGM
D1 D2 D3 D4
S1 S2 S3
5 6 7 8
1 2 3
R126 R129 R910

470K 200K C588 30.1K
1% 1% 4700nF-X5R 1% 3
4
G
P12.0V_ALW_RQ_P1.8V_MN
C
10V VDC_RCQZD_P12.0V_ALW_MN 1 Q518
P12.0V_ALW_RCQ_P1.8V_MN
MMBT3904
C610
3 1nF 2
3
D
Q23 50V
R113 0 RHU002N06
G C589 C594
1
P1.1V_PWRGD 6.8nF 10000nF
5% 1
D 3 S
50V 25V
2
Q19
R112 0 G RHU002N06 ZD500
VCCP3_PWRGD
5% 1 BZX84C12L
VCCP3_PWRGD_RQ_P1.8V_MN S 2
nostuff
A A
DRAW DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP PWR_MV_SWITCHED
BL Lee REV 1.0 SWITCHED POWER BA41-01060A

April 11, 2009 10:05:58 AM PAGE 62 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D
POWER DISCHARGER D
P5.0V_STB P5.0V_AUX P1.8V_AUX P3.3V_AUX
n g l
R655
100K
1%
DISCHG_P5.0V_STB_RQ_MN
R658
1K
1%
DISCHG_P5.0V_AUX_RQ_MN
R663
49.9
1%
R677
1K
u
R653
10K
D 3 D 3 D 3 D 3
Q528 Q529 Q551 Q531
a
1%
G RHU002N06 G RHU002N06 G RHU002N06 G RHU002N06
KBC3_SUSPWR
s
1 1 1 1
i
C S S S S
C
KBC3_SUSPWR_RQ_DISCHG_MN 2 2 2 2
m n t nostuff nostuff
nostuff
nostuff
nostuff
nostuff
nostuff
nostuff
nostuff
P3.3V
R678
10
DISCHG_P3.3V_RQ_MN
P3.3V_GFX
a
S fid
R931
10
e P5.0V
R680
1K
1%
DISCHG_P5.0V_RQ_MN
EGFX_CORE
R923
10
P1.8V
R752
49.9
1%
DISCHG_P1.8V_RQ_MN
P1.5V
R682
10
1%
DISCHG_P1.5V_RQ_MN
P1.1V
R747
10
1%
DISCHG_P1.1V_RQ_MN
P1.05V
R683
10
DISCHG_P1.05V_RQ_MN
KBC3_PWRON_INV#
G
1
D
S
3
2
Q532
RHU002N06 G
1
D
S
3
o n
Q553
RHU002N06 G
1
D
S
3
2
Q550
RHU002N06 G
1
D
S
3
2
Q552
RHU002N06 G
1
D
S
3
2
Q545
RHU002N06 G
1
D
S
3
2
Q533
RHU002N06 G
1
D
S
3
2
Q544
RHU002N06 G
1
D
S
3
2
Q534
RHU002N06
B
C
nostuff nostuff nostuff nostuff nostuff
nostuff nostuff nostuff nostuff nostuff
A A
DRAW DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP PWR_MV_DISCHARGER
BL Lee REV 1.0 DISCHARGING LOGIC BA41-01060A


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
2 USB PORT & POWER S/W SUB B’D

D D
P5.0V_USB_SUB
SUB TO MAIN USB CONN
EC1
C3 100uF C1 C2
100nF 16V 100nF 0.033nF
g
10V AS 10V 50V
P3.3V_SUB P5.0V_USB_SUB
nostuff
nostuff
J1
n
G_SUB JACK-8P-LED-MNT
1 C5 J3
PWR0
l
1 4 USB3_P6-_SUB_B_MN 2 100nF HDR-12P-1R-SMD
USB3_P6-_SUB USB3_P6+_SUB_B_MN 3
USB0- 10V
USB0+ 1
u
4
GND1 2
USB3_P6+_SUB G_SUB 3
a
2 3 5
PWR1 4
B1 USB3_P10-_SUB_B_MN 6
USB3_P10+_SUB_B_MN 7
USB1- USB3_P6-_SUB 5
ACM2012-900-2P-T
s i
C 8
USB1+ USB3_P6+_SUB 6 C
GND2 7
USB3_P10-_SUB 8
t
9
B2 10
MNT1 USB3_P10+_SUB 9
ACM2012-900-2P-T MNT2 10
1 4 11
USB3_P10-_SUB 12
MNT3 KBC3_PWRSW#_SUB 11
MNT4 LID3_SWITCH#_B_SUB 12
m n
3711-002046
USB3_P10+_SUB 2 3 3722-002601
Type : angle
Type : angle
a e
G_SUB
G_SUB
LID_SWITCH (Bonn only)

S fid Power ON LED
n
LTST-C193TBKT-AC MT2001 MT2002
LED500 LED1_P3.3V_PWON_MN RMNT-25-70-1P RMNT-25-70-1P
B P3.3V_SUB P3.3V_SUB B
R505 475 1%
o
2
U532
HED53XXU12 Put this LED located near PWRSW from ME recommedation
1 G_SUB
C3912 SUPPLY Power LED, Blue color
2
1000nF-X5R
3
OUTPUT LID3_SWITCH#_B_SUB
C
6.3V GND
1009-001046
G_SUB G_SUB
G_SUB
USB sub board mount hole
BONN
BONN Power Switch Button
Bonn : stuff
Canne : nostuff
KBC3_PWRSW#_SUB
1 2
SW500
SW-TACT-4P
A 3404-001311
A
3 4
DESIGN DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
G_SUB MK Kim MP SUB BOARD1
BL Lee REV 1.0 2 USB & POWER SW BA41-01060A

April 11, 2009 10:05:58 AM PAGE 64 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D
SATA ODD & LID SW SUB BOARD D
SATA ODD SUB BOARD LID SWITCH SUB BOARD (Canne only)
P5.0V_ODD
n g
SATA ODD CONN
l
J8
CDROM-SATA-13P
P3.3V_LID_SUB
u
U503
P2 HED53XXU12
P5V_1
a
P3 1
C54 C59 C60 C53 C55
P5V_2 C515 SUPPLY
2
100nF
10000nF-X5R 10000nF-X5R
100nF 100nF S2
1000nF-X5R
3
OUTPUT LID3_SWITCH#_SUB MT2009
s i
C 10V
6.3V 6.3V
10V 10V
SAT1_ODD_TXP_SUB S3
TX+ 6.3V GND RMNT-25-60-1P C
SAT1_ODD_TXN_SUB TX-
1009-001046
t
S5
nostuff SAT1_ODD_RXN_SUB S6
RX-
SAT1_ODD_RXP_SUB RX+
P1
G_ODD DP
m n
P4
MD G_LID_SUB
S1
GND_1
S4
a
GND_2 P3.3V_LID_SUB
e
S7
GND_3
P5
GND_4
P6
GND_5
J508
14 HDR-4P-SMD
S fid
MNT1
15
MNT2 1
2
3710-002635 3 LID3_SWITCH#_SUB G_LID_SUB
Type : angle 4
5
MNT1
6
G_ODD MNT2
3711-000922
Type : angle
n
G_LID_SUB
B B
SUB TO MAIN SATA ODD CONN
o
CANNES
CANNES
CANNES
Bonn : nostuff
C
P5.0V_ODD MT2008 MT2007 Cannes : stuff
RMNT-25-70-1P RMNT-25-70-1P
3708-002190
12
11
10
9
8
SAT1_ODD_TXP_SUB 7
SAT1_ODD_TXN_SUB 6
5
SAT1_ODD_RXN_SUB 4
SAT1_ODD_RXP_SUB 3
2
1 G_ODD G_ODD
CONN-12P-FPC
A J500 A
ODD sub board mount hole
G_ODD Type : angle
DRAW DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP SUB BOARD2
BL Lee REV 1.0 SATA ODD SUB BOARD BA41-01060A


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
Mainboard Mount ((30,80)x9), (30,90)x9), (25,70)x1))
P1.5V P1.5V P1.5V P1.5V P1.5V P1.5V P1.5V VDC VDC VDC P5.0V P5.0V P5.0V P5.0V P5.0V MT2 MT13 MT1 MT10 MT14
D RMNT-30-90-1P RMNT-30-90-1P RMNT-30-90-1P RMNT-30-90-1P RMNT-30-90-1P D
C3829 C3830 C3831 C3832 C3833 C3834 C3835 C3869 C3870 C3868 C3854 C3855 C3856 C3859 C3860
1nF 1nF 1nF 1nF 1nF 1nF 1nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF
50V 50V 50V 50V 50V 50V 50V 25V 25V 25V 10V 10V 10V 10V 10V
P5.0V P5.0V P3.3V P3.3V P3.3V P3.3V P3.3V P3.3V P3.3V P3.3V P5.0V_ALW P5.0V_ALW P5.0V_ALW
C3857 C3858 C3836 C3837 C3838 C3839 C3841 C3842 C3843 C3844 C3845 C3846 C3847
100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF
10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V MT15 MT8 MT11 MT12 MT504
g
RMNT-30-90-1P RMNT-30-80-1P RMNT-30-90-1P RMNT-30-90-1P RMNT-25-70-1P
CPU_CORE CPU_CORE
P5.0V_ALW P5.0V_ALW P5.0V_ALW P5.0V_ALW P5.0V_ALW P5.0V_ALW P3.3V_AUX P3.3V_AUX P3.3V_AUX P3.3V_AUX P3.3V_AUX P3.3V_AUX P3.3V_AUX
n
C509 C79
l
C3848 C3849 C3850 C3851 C3852 C3853 C3861 C3862 C3863 C3864 C3865 C3866 C3867 1nF 100nF
100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 50V 10V
u
10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V
s i a
C Add for EMC (Top), 2008.11.19
C
Add for EMC , 2009.01.06
Top : (30,80) x 9
t
Bot : (30,90) x 9
P3.3V P3.3V P3.3V P3.3V P3.3V P3.3V P3.3V P3.3V P3.3V P3.3V CPU_CORE P1.8V_AUX P1.8V_AUX P1.8V_AUX P1.8V_AUX P1.8V_AUX P1.8V_AUX P1.8V_AUX P0.9V P0.9V P0.9V
C519
1nF
50V
P3.3V
C455
1nF
50V
P3.3V P3.3V
C3369
1nF
50V
P3.3V
C243
1nF
50V
C922
1nF
50V
P3.3V
C698
1nF
50V
P3.3V P3.3V
C3828
1nF
50V
P3.3V
a m
C3399
1nF
50V
e n P3.3V
C73
1nF
50V
P3.3V
C371
1nF
50V
P1.05V
C510
1nF
50V
C498
1nF
50V
C914
1nF
50V
P3.3V_LED P3.3V_LED P3.3V_LED P3.3V_LED P3.3V_LED P3.3V_LED P3.3V_LED P3.3V_LED P3.3V_LED P3.3V_LED
C932
1nF
50V
C797
1nF
50V
C3787
1nF
50V
C3695
1nF
50V
C931
1nF
50V
C3557
1nF
50V
C450
1nF
50V
C471
1nF
50V
S fid
C494 C3718 C50 C107 C851 C585 C3370 C129 C451 C668 C645 C487 C830 C3171 C3311 C3694 C3414 C3193 C3758 C3592 C3627
1nF 1nF 1nF 1nF 1nF 1nF 1nF 1nF 1nF 1nF 1nF 1nF 1nF 1nF 1nF 1nF 1nF 1nF 1nF 1nF 1nF
50V 50V 50V 50V 50V 50V 50V 50V 50V 50V 50V 50V 50V 50V 50V 50V 50V 50V 50V 50V 50V nostuff
nostuff
nostuff
nostuff
Add for EMC (5th Layer), 2008.11.19 Add for EMC (Bottom), 2008.11.19
B
VDC VDC VDC VDC VDC VDC VDC VDC
o n VDC VDC VDC

CONTACT-PLATE-EMI
EMI13
CONTACT-PLATE-EMI
EMI4
P5.0V_STB P5.0V_STB P5.0V_STB P5.0V_STB P5.0V_STB P5.0V_STB P5.0V_STB P5.0V_STB P5.0V_STB
B
CONTACT-PLATE-EMI
EMI6
CONTACT-PLATE-EMI
EMI12
EMI
EMI
EMI
EMI
C854 C849 C858 C67 C37 C548 C26 C716 C743 C838 C3589
100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF C3884 C3876 C3877 C3878 C3879 C3880 C3881 C3882 C3883
25V 25V 25V 25V 25V 25V 25V 25V 25V 25V 25V 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF
C
25V 25V 25V 25V 25V 25V 25V 25V 25V
VDC VDC P5.0V_AUD P5.0V_AUD P5.0V_AUD P5.0V_AUD P5.0V_AUD P5.0V_AUD P5.0V_AUD P5.0V_AUD P3.3V_AUX
P3.3V_MICOM P3.3V_MICOM P3.3V_MICOM P3.3V_MICOM P3.3V_MICOM P3.3V_MICOM P3.3V_MICOM

C99 C3247 C855 C852 C853 C850 C3608 C827 C667 C929 C625
100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF
CONTACT-PLATE-EMI
EMI8
CONTACT-PLATE-EMI
EMI9
CONTACT-PLATE-EMI
EMI10
CONTACT-PLATE-EMI
EMI11
CONTACT-PLATE-EMI
EMI14
25V 25V 10V 10V 10V 10V 10V 10V 10V 10V 10V C3885 C3886 C3887 C3888 C3889 C3890 C3891
EMI
EMI
EMI
EMI
EMI
100nF 100nF 100nF 100nF 100nF 100nF 100nF
25V 25V 25V 25V 25V 25V 25V
P3.3V_AUX AD_DC VDC_ADPT VDC_CHG P3.3V P3.3V P3.3V CPU_CORE CPU_CORE
Add for EMC , 2009.02.02

C101 C13 C504 C511 C774 C894 C768 C10 C47 C805 C807 nostuff nostuff
100nF 100nF 100nF 100nF 1nF 1nF 1nF 1nF 100nF 1nF 1nF nostuff nostuff
10V 25V 25V 25V 50V 50V 50V 50V 10V 50V 50V nostuff
nostuff nostuff
nostuff nostuff
A P5.0V_ALW A
G_AUD G_AUD
Add for EMC , 2009.01.07
DRAW DATE TITLE
Add for EMC (Bottom), 2008.11.19

CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP ICT PORT
BL Lee REV 1.0 ICT PORT BA41-01060A

April 11, 2009 10:05:58 AM PAGE 66 OF 67

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D D
SIM3_C1 BAT3_SMCLK# KBC3_RSMRST# AUD3_DMIC_DATA1 P5.0V P1.05V_PEG
SIM3_C2 CHP3_GPIO18 KBC3_RUNSCI# AUD5_HP_O_RIGHT P5.0V P12.0V_ALW
SIM3_C3 CHP3_GPIO20 KBC3_SMDATA# AUD5_MIC1_RIGHT PRTC_BAT P12.0V_ALW
SIM3_C6 CHP3_SERIRQ KBC3_SPKMUTE AUD5_MIC2_RIGHT PRTC_BAT P12.0V_ALW
SIM3_C7 CHP3_SLPS4# KBC5_KSO(10) CHP3_ME_RTCRST# PRTC_BAT P12.0V_ALW
SPK5_L_P CHP3_SLPS5# KBC5_KSO(11) KBC3_BLCKPWRSW# PRTC_BAT P4.75V_AUD
SPK5_L_M CLK3_DBGLPC KBC5_KSO(12) KBC3_LED_POWER# P1.2V_LAN P4.75V_AUD
SPK5_R_P CPU1_DEFER# KBC5_KSO(13) KBC3_PWRON_INV# P1.2V_LAN P4.75V_AUD
SPK5_R_M CPU1_DPSLP# KBC5_KSO(14) KBC3_PWRSW#_SUB P1.2V_LAN P4.75V_AUD
CPU1_NMI CPU1_IGNNE# KBC5_KSO(15) AUD5_LINE_O_LEFT P1.2V_LAN P3.3V_MICOM
CPU1_TCK CPU1_VID(0) LID3_SWITCH# CHP3_SATACLKREQ# P1.5V_AUX P3.3V_MICOM
CPU1_TDI CPU1_VID(1) LPC3_LFRAME# KBC3_LED_CHARGE# P1.5V_AUX P3.3V_MICOM
g
CPU1_TMS CPU1_VID(2) MCD3_SDDATA0 KBC3_THERM_SMCLK P1.5V_AUX P3.3V_MICOM
CRT3_RED CPU1_VID(3) MCD3_SDDATA1 LID3_SWITCH#_SUB P1.5V_AUX P3.3V_AUX_EXP
FAN5_VDD CPU1_VID(4) MCD3_SDDATA2 VGA3_HDMI_HPD_LV P1.5V_EXP P3.3V_AUX_EXP
SMB3_CLK CPU1_VID(5) MCD3_SDDATA3 AUD5_LINE_O_RIGHT P1.5V_EXP P3.3V_AUX_EXP
SPI3_CLK CPU1_VID(6) MCH1_HXSWING KBC3_THERM_SMDATA P1.5V_EXP P3.3V_AUX_EXP
n
VRM_VSUM CRT3_DDCCLK MCH3_CLKREQ# AUD5_MIC1_VREF_LEFT P1.5V_EXP P5.0V_AUX_USB
ADT3_SEL# EXP3_CPUSB# MCH3_EXTTS0# AUD5_MIC1_VREF_RIGHT P1.8V_AUX P5.0V_AUX_USB
AUD3_SPKR EXP3_PERST# MCH3_EXTTS1# AD_DC P1.8V_AUX P5.0V_AUX_USB
l
CLK3_FM48 KBC3_BKLTON MIN3_CLKREQ# AD_DC P1.8V_AUX P5.0V_AUX_USB
CPU1_BNR# KBC3_PRECHG PCI3_CLKRUN# AD_DC P1.8V_AUX VDC
u
CPU1_INTR KBC3_PWRSW# SIM3_DETECT# AD_DC P1.8V_LAN VDC
CPU1_PSI# KBC3_RFOFF# AUD5_SENS_HP# CPU_CORE P1.8V_LAN VDC
a
CPU1_RS0# KBC3_SCLED# CHP3_CL_CLK_0 CPU_CORE P1.8V_LAN VDC
CPU1_RS1# KBC3_SMCLK# CHP3_DPRSLPVR CPU_CORE P1.8V_LAN VCC_CRT
s i
C CPU1_RS2# KBC3_SUSPWR CHP3_PM_SYNC# CPU_CORE P2.1V_REF VCC_CRT C
CPU1_SLP# KBC5_KSI(0) CHP3_SATALED# G_AUD P2.1V_REF VCC_CRT
CPU1_SMI# KBC5_KSI(1) CHP3_SUSSTAT# G_AUD P2.1V_REF VCC_CRT
t
CRT3_BLUE KBC5_KSI(2) HDA3_AUD_BCLK G_AUD P2.1V_REF VDC_CHG
KBC3_A20G KBC5_KSI(3) HDA3_AUD_RST# G_AUD P3.3V_EXP VDC_CHG
KBC5_KSI(4) HDA3_AUD_SDI0 G_CHG P3.3V_EXP VDC_CHG
KBC5_TCLK KBC5_KSI(5) HDA3_AUD_SYNC G_CHG P3.3V_EXP VDC_CHG
m n
MCD3_SDWP KBC5_KSI(6) HDA3_HDMI_SDO G_CHG P3.3V_EXP VDD_LED
SMB3_DATA KBC5_KSI(7) HDA3_MDC_BCLK G_CHG P3.3V_LED VDD_LED
SPI3_CS0# KBC5_KSO(0) HDA3_MDC_RST# G_CPU P3.3V_LED VDD_LED
SPI3_MISO KBC5_KSO(1) HDA3_MDC_SDI1 G_CPU P3.3V_LED VDD_LED
a
SPI3_MOSI KBC5_KSO(2) HDA3_MDC_SYNC G_CPU P3.3V_LED VDC_ADPT
e
THM3_STP# KBC5_KSO(3) ITP3_DBRESET# G_CPU P3.3V_MCD VDC_ADPT
VRM_ISEN1 KBC5_KSO(4) KBC3_CAPSLED# G_MIC P3.3V_MCD VDC_ADPT
VRM_ISEN2 KBC5_KSO(5) G_MIC P3.3V_MCD VDC_ADPT
WLON_LED# KBC5_KSO(6) KBC3_WAKESCI# G_MIC P3.3V_MCD
S fid
AUD3_SHDN# KBC5_KSO(7) KBC5_P5ALWON# G_MIC P3.3V_SUB
AUX3_PWRGD KBC5_KSO(8) LCD3_EDID_CLK G_ODD P3.3V_SUB
PLT3_RST# KBC5_KSO(9) MCH3_HDMI_CLK G_ODD P3.3V_SUB
CLK3_PWRGD LPC3_LAD(0) MCH3_ICHSYNC# G_ODD P3.3V_SUB
CLK3_USB48 LPC3_LAD(1) MCH3_LCDVDDON G_ODD P5.0V_ALW EGFX_BBP
CPU1_A20M# LPC3_LAD(2) PEG5_HDMI_CLK G_SUB P5.0V_ALW EGFX_CORE
CPU1_BPRI# LPC3_LAD(3) PLT3_RST_ORG# G_SUB P5.0V_ALW G_EGFX
CPU1_BREQ# MCH3_BKLTEN VGA5_HDMI_HPD G_SUB P5.0V_ALW G_P3.3V
CPU1_BSEL0 SMB3_ALERT# AUD3_DMIC_CLK1 G_SUB P5.0V_AMP P1.05V
CPU1_BSEL1 THM3_ALERT# AUD5_HP_O_LEFT G_DDR2 P5.0V_AMP P1.1V
n
CPU1_BSEL2 VCCP3_PWRGD AUD5_MIC1_LEFT G_DDR2 P5.0V_AMP P1.1V_DPE
CPU1_D#(0) VRM_VCC_PRM AUD5_MIC2_LEFT G_DDR2 P5.0V_AMP P1.8V
CPU1_DBSY# BAT3_DETECT# AUD5_MIC2_VREF G_DDR2 P5.0V_AUD P1.8V_A2VDDQ
B CPU1_DRDY# BAT3_SMDATA# AUD5_SENS_MIC# G_P1.05V P5.0V_AUD P1.8V_AVDD
B
CPU1_FERR# CHP3_BIOSWP# CHP3_BIOS_CRI# G_P1.05V P5.0V_AUD P1.8V_DPE
o
CPU1_HITM# CHP3_CPUSTP# CHP3_CL_DATA_0 G_P1.05V P5.0V_AUD P1.8V_VDDDI
CPU1_INIT# CHP3_PCISTP# CHP3_CL_RST_0# G_P1.05V P5.0V_AUX P3.3V_GFX
CPU1_LOCK# CHP3_RTCRST# CHP3_INTRUDER# LCD_VDD3V P5.0V_AUX
CPU1_TRDY# CLK1_DREFCLK CLK3_PCLKMICOM LCD_VDD3V P5.0V_AUX
CPU1_TRST# CPU1_CPURST# CPU3_THRMTRIP# LCD_VDD3V P5.0V_AUX
C
CRT3_GREEN CPU1_DPRSTP# HDA3_HDMI_BCLK LCD_VDD3V P5.0V_ODD
CRT3_HSYNC CPU1_STPCLK# HDA3_HDMI_RST# MEM1_VREF P5.0V_ODD
CRT3_VSYNC CPU2_THERMDA HDA3_HDMI_SDI2 MEM1_VREF P5.0V_ODD
EXP3_CPPE# CPU2_THERMDC HDA3_HDMI_SYNC MEM1_VREF P5.0V_ODD
KBC3_CHGEN CRT3_DDCDATA KBC3_CHKPWRSW# MEM1_VREF P5.0V_STB
KBC3_PWRGD EXP3_CLKREQ# KBC3_LED_ACIN# P0.9V P5.0V_STB
KBC3_PWRON FAN3_FDBACK# KBC3_USBPWRON# P0.9V P5.0V_STB
KBC5_TDATA HDA3_AUD_SDO LCD3_EDID_DATA P0.9V P5.0V_STB
LAN3_CTL12 HDA3_MDC_SDO MCH3_HDMI_DATA P0.9V P5.0V_VCC
MCD3_SDCD# ITM3_CLKREQ# PEG5_HDMI_DATA P1.5V P5.0V_VCC
MCD3_SDCLK KBC3_CPURST# TPD5_L_BUTTON# P1.5V P5.0V_VCC
MCD3_SDCMD KBC3_EXTSMI# TPD5_R_BUTTON# P1.5V P5.0V_VCC
MCH1_HVREF KBC3_NUMLED# VGA1_HDMI_HPD# P1.5V P1.05V_PEG
PEX3_WAKE# KBC3_P5ALWON VRM3_CPU_PWRGD P5.0V P1.05V_PEG
AUD3_GPIO1# KBC3_PWRBTN# VRM3_DDR_PWRGD P5.0V P1.05V_PEG
A A
DESIGN DATE TITLE
CHECK
MS Yang
DEV. STEP
12/05/2008
BONN-E SAMSUNG
ELECTRONICS
MK Kim MP TEST POINT
BL Lee REV 1.0 TEST POINT BA41-01060A

April 11, 2009 10:05:58 AM PAGE 67 OF 67

4 3 2 1

Samsung R518 - BONN-E - BONN-C BA41-01060 - REV 1.0 PDF

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Samsung R518 - BONN-E - BONN-C BA41-01060 - REV 1.0 PDF

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4 3 2 1

Revision : 1.0 Sheet 57. PWR_MV_Memory

April 11, 2009 10:05:58 AM PAGE 1 OF 67

PCIE x1 Lane 4 88E8057

BL Lee REV 1.0 BLOCK DIAGRAM BA41-01060A

undefined April 11, 2009 10:05:58 AM PAGE 2 OF 67

USB PORT Assign

Mini Card 2 (ROBSON or DVB-T)

See rev notes for more information.

BL Lee REV 1.0 BOARD INFO BA41-01060A

undefined April 11, 2009 10:05:58 AM PAGE 3 OF 67

Power On/Off Table by S-state

+V* (CORE) ON BL Lee REV 1.0 POWER DIAGRAM BA41-01060A

undefined April 11, 2009 10:05:58 AM PAGE 4 OF 67

POWER RAILS ANALYSIS

CPU CORE MICOM 3V

1.8V_AUX 3.79 A (TBD) (8 - 8.5 W )

1.0V-1.1V (EGFX CORE) 3.3V

Value by Datasheet/Application notes (Value by measurement) CHECK

BL Lee REV 1.0 POWER RAILS BA41-01060A

undefined April 11, 2009 10:05:58 AM PAGE 5 OF 67

KBC 15)VRM3_CPU_PWRGD 13) KBC3_VRON (Back-up)

6) MEM1_VREF 17) KBC3_PWRGD

2 10) P1.05V (IGFX_CORE) 10-1) P3.3V

10-1) P1.8V PCI 19) PCI3_RST*

BL Lee REV 1.0 POWER SEQUENCE BA41-01060A

undefined April 11, 2009 10:05:58 AM PAGE 6 OF 67

D 266 MHz CLK0_HOST_CPU/CPU* D

100 MHz (SRC 6) CLK1_MINIPCIE/PCIE*

100 MHz (SRC 3) CLK1_PCIEICH/ICH* LOM3_CLKREQ*

14.318 MHz DRAW DATE TITLE

BL Lee REV 1.0 CLOCK DIAGRAM BA41-01060A

undefined April 11, 2009 10:05:58 AM PAGE 7 OF 67

D P3.3V P1.5V P3.3V D

VSS_REF LCDCLK_27M CLK3_GFX_27M

CLK REQ DEVICE SRC PORT

undefined April 11, 2009 10:05:58 AM PAGE 8 OF 67

P5.0V P3.3V_AUX P3.3V P3.3V_AUX

g R509 Check if PU is doubled to Micom Side.

R29 93 degree C SMBUS Address 7Ah

Line Width = 20 mil

BL Lee REV 1.0 THERMAL SENSOR EMC2102 BA41-01060A

April 11, 2009 10:05:58 AM PAGE 9 OF 67

A24# FERR# CPU1_FERR# D21# D53#

MT6 MT7 MT3 MT4

BL Lee REV 1.0 PENRYN (1/3) BA41-01060A

undefined April 11, 2009 10:05:58 AM PAGE 10 OF 67

*Yonah Processor (2.33 GHz / 800 MHz : TBD)

GTLREF : Keep the Voltage divider within 0.5"

BSEL COMP0,2(COMP1,3) should be connected with Zo=27.4ohm(55ohm)

from each of the VCC/VSS test point vias.

BL Lee REV 1.0 PENRYN (2/3) BA41-01060A

undefined April 11, 2009 10:05:58 AM PAGE 11 OF 67

BL Lee REV 1.0 PENRYN (3/3) BA41-01060A

undefined April 11, 2009 10:05:58 AM PAGE 12 OF 67

HOST ADDRESS BUS

HOST DATA BUS

VTTLF_1 H_RS#_0 CPU1_RS0#

MCH1_VTTLF2_MN AB2 F12

*POCAFEB-12 Only (Remove in MP Model)

Low High CPU1_BSEL0

CFG(9) PEG Reversal (def.) Normal nostuff MS Yang 12/05/2008

BL Lee REV 1.0 CANTIGA (1/5) BA41-01060A