This article has been accepted for publication in a future issue of this journal, but has not been
fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/JESTPE.2019.2894007, IEEE Journal
of Emerging and Selected Topics in Power Electronics
IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. x, NO.x, xx 2019
Model Predictive Direct Power Control with
Fixed Switching Frequency and Computational
Amount Reduction
Bihua Hu, Student Member, IEEE, Longyun Kang, Member, IEEE, Junfeng Liu,
Jun Zeng, Member, IEEE，Shubiao Wang, Zhi Zhang
 reduction for current harmonic and simplicity of
Abstract—Model predictive direct power control (MPDPC) has
attracted significant attention due to its outstanding dynamic
response and high power factor. However, the variable switching
frequency makes the design of alternating current (AC) filter
more challenging, and the heavy computational burden limits the
application of MPDPC. This paper proposed a new cost function
and four steps MPDPC (FSMPDPC) scheme for T-type inverters.
The proposed cost function, can reduce the number of division
operations, and does not require calculating the duty cycles of all
vectors. Meanwhile, the four steps calculation process is divided
into 4 steps to reduce the number of cycle calculations. The first
three steps are assigned to adjust the active and reactive power,
and the neutral point (NP) voltage is balanced in the fourth step.
An experimental platform of a T-type inverter is established to
demonstrate the superiorities of the proposed FSMPDPC. The
results show that FSMPDPC improves the steady-state
performance of the T-type inverter with lower current total
harmonic distortion (THD) and lower ripples in the active and
reactive power. In addition, the proposed algorithm eases the
computational burden of the digital signal processor (DSP).
Index Terms—Computational amount. cost function. fixed
switching frequency. model predictive control. optimal switching
sequence.
I. INTRODUCTION
U sed as energy interfaces, the Grid-connected inverters play
a key role in distributed power generation systems, and the
three-level (3L) inverter is usually employed due to its
Manuscript received February 26, 2018; revised October 2, 2018; accepted
January 12, 2019. Date of publication ???; date of current version ???. This
work was supported by the Science and Technology Development Special
Foundation of Guangdong (grant number 2017B010120001). Recommended
for publication by Associate Editor ???. (Corresponding author:Longyun
Kang.)
B.Hu, L. Kang , J. Zeng ,and S.Wang are with the New Energy Research
Center, South China University of Technology, Guangzhou 510640, China
(e-mail: ephubihua2015@mail.scut.edu.cn; lykang@scut.edu.cn;
epwangshubiao@mail.scut.edu.cn ; junzeng@scut.edu.cn;).
L.Kang is also with Dongguan DRN New Energy CO,LTD, Dongguan
523772,Guangdong, China
J. Liu is with the School of Automation Science and Engineering, South
China University of Technology, Guangzhou 510640, China
(e-mail:jf.liu@connect.polyu.hk).
Z. Zhang is with the College of electronic engineering, Dongguan
University of technology,Dongguan, China (e-mail: zhangz@dgut.edu.cn).
Color versions of one or more of the figures in this paper are available online
at???.
Digital Object Identifier ???
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1
implementation [1-4].The typical 3L inverter includes the
diodes neutral point clamped (DNPC) inverter [1-2], active
neutral point clamped (ANPC) inverter and T-type neutral
point clamped (TNPC) inverter [3-5]. In this paper, the T-type
inverter with lower conduction loss and equal loss distribution
among the power devices is taken as an example to illustrate the
proposed algorithm [4-7].
From a control perspective, two control schemes are adopted
for grid-connected inverters: one scheme is the
voltage-oriented control (VOC) scheme constructed by the
outer voltage loop and interior current control loop [6-7], and
the other scheme is the direct power control (DPC) scheme
composed of the instantaneous active and reactive power
control loops. The DPC is widely adopted for its outstanding
robustness and simple control [8-9].
In conventional DPC, the switching state is selected from the
switch table determined by the instantaneous errors between
the reference and actual values of the active and reactive power
in each sampling period, which causes the switching frequency
to vary over a wide range [8-9]. The DPC approaches combined
with space vector modulation (DPC-SVM) have been proposed
to achieve fixed frequency control. The pulse-width
modulation (PWM) module generates gate signals with a fixed
frequency based on the command voltage derived from the
reference power [10-11]. However, the PWM modulator and
the computation time of each vector increase the complexity of
the control algorithms, especially for the T-type inverter.
Many MPC variants have been proposed to implement DPC
and improve the dynamic response of the grid-connected
inverter [12-18]. Based on the cost function, the model
predictive control (MPC) scheme selects the optimal switching
sequence (OSS) or vector to trace the reference power [12-18].
Furthermore, the cost function of MPC has been modified to
achieve multi-objective optimization, such as balancing the NP
voltage of the 3L inverter [15-17], decreasing the
common-mode voltage and minimizing the switching
frequency to reduce switching loss [16-18]. However, two
major shortcomings in MPC have been discovered: the heavy
amount of calculation and the variable switching frequency
[19-20].
Many approaches have been proposed to decrease the
computational cost of the MPC scheme [21-24]. In [21], MPC
based on VOC was applied to control 3L neutral-point-clamped
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of Emerging and Selected Topics in Power Electronics
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(NPC) inverter. With equivalent transformation and specialized II. PROPOSED ALGORITHM
sector distribution, the computational load of MPC was greatly In this section, the method of calculating the application time
reduced. However, this algorithm could not improve the of each switching state is introduced. The new cost function and
steady-state or dynamic performance of the inverter. In [22-23], the four steps model prediction are presented to select an OSS.
the low-complexity MPC (LC-MPC) was proposed for two
level inverter. Since the optimal vector of this algorithm was A. Application time calculation
selected without cycle calculation, the computational burden As shown in Fig. 1, the grid-connected system is constructed
was greatly eased. However, the LC-MPC was only suitable for of a T-type inverter. In the AC filter composed of inductance L
two-level inverter because it only considered the angle of and resistance R, the effect of L on the grid current is much
vectors and neglected their magnitude. In [24], a greater than that of R, thus the effect of R is neglected. In static
finite-control-set model predictive current control (FCS-MPCC) αβ coordinates, when the output voltage of T-type inverter is
scheme was used for five-phase inverter, and the eleven u(uα, uβ), the derivatives of active and reactive power are
reconstructed virtual voltage vectors were employed to [14-15]
minimize the time-consuming computation. This algorithm can  dP 3  u  e u  e 
only be used in the five-phase inverter, which limits its   e (  i )  e (   i ) 
applications.  dt 2  L L 
 , (1)
Some improved MPCs with fixed switching frequency in the 
 dQ  3 e ( u  e  i )  e (  u  e  
 dt 2      i ) 
3L inverter were given based on VOC [25-27]. In [25], a MPC  L L 
with OSS was applied to control the grid current of the
where (eα, eβ) and (iα, iβ) denote the grid phase voltage and
single-phase 3L inverter. This approach altered vectors by
current, respectively; P is the active power; Q is the reactive
changing a power switch state, which increased the robustness
power; ω is the angular velocity.
of the inverter. However, when this approach was used for
three-phase inverter, its heavy computational requirements
obstructed its implementation. In [26], a modulated model
predictive control (M2PC) was introduced to modulate the grid
current of the NPC 3L inverter. Compared to conventional
approaches, the steady-state performance of this algorithm was
improved. For example, the total harmonic distortion (THD) of
the grid current was lower than 2%. However, there were so
many division operations in the duty cycle calculation that the
computational burden of the DSP was aggravated. In [27], by Fig. 1. Topology of the grid-connected system
nullifying the derivative of the cost function of FS-MPC, a
synthesized vector with a minimized cost function was When the switching states of vi (i=1, 2, 3) with the
obtained. Owing to the introduction of three-level space vector application times ti (i=1, 2, 3) and the output voltage of T-type
modulation (SVM), the cycle calculation was avoided in this inverter ui (uαi, uβi) are utilized to control the power switches. In
algorithm. However, this algorithm abandoned the a sampling interval, equation (1) can be rewritten as [15]
conventional MPC’s superiority of multivariable control.  dP
 f  i
Here, the FSMPDPC is proposed to address the problems of  pi dt u  u i
the variable switching frequency and the heavy computational  for i  1,2,3. (2)
burden in MPC. The major contributions of FSMPDPC are  f  dQi u  u i


qi
dt
twofold: first, the control algorithm with fixed switching
frequency improves the steady-state performances of T-type According to [14], when the static error of the active and
inverter; second, the new cost function and the divided reactive power is the minimum, the application time of each
computational process reduce the required computing resources vector is calculated as
of the DSP.  ( f q 2  f q 3 ) E p  ( f p 3  f p 2 ) Eq  ( f p 2 f q 3  f p 3 f q 2 )Ts
The remainder of this paper is organized as follows. Section t1  ( f  f ) f  ( f  f ) f  ( f  f ) f
II introduces MPDPC with fixed frequency, including the  q2 q3 p1 q3 q1 p2 q1 q2 p3
 ( f q 3  f q1 ) E p  ( f p1  f p 3 ) Eq  ( f q1 f p 3  f q 3 f p1 )Ts
application time calculation, switching sequence selection,
 t2  , (3)
simplified cost function and stepwise model prediction.  ( f q 2  f q 3 ) f p1  ( f q 3  f q1 ) f p 2  ( f q1  f q 2 ) f p 3
FSMPDPC is summarized and its performance is analyzed in t  T  t  t
Section III. In Section IV, experiments are conducted to verify 3 s 1 2

the effectiveness and superiority of FSMPDPC. The 

conclusions are summarized in Section V. where Ep=Pref -P(k), Eq=Qref -Q(k), and Ts is the sampling
interval. Pref and Qref are the references of the active and
reactive power, respectively. P(k) and Q(k) are the active and
reactive power at sampling instant k, respectively.

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/JESTPE.2019.2894007, IEEE Journal
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B. Switching sequence C. Cost function simplification

In Fig. 1, the state of the each bridge leg can be defined as O,
P, and N based on its output voltage. In Fig. 2 and Table. I, the
states of three bridge legs then form the switching states of the
T-type inverter, which include six sectors. Each sector can be
divided into four subsectors. Each subsector can be further
divided into 2 switching sequences based on its effect on the NP
voltage. When the active power of the T-type inverter is
In Fig. 1, when the NP voltage is balance, the reference
voltage difference of the DC-link capacitors (C1 and C2) is zero.
The control objective of the control algorithm is choosing an
OSS to make the active and reactive power trace the reference
and balance the NP voltage. Therefore, the cost function J0 can
be expressed as [15-16]
3

positive, the P type sequence increases the NP voltage, and the
N-type sequence decreases the NP voltage. If the active power
is negative, the sequence has the opposite effect on the NP
voltage [28]. Therefore, the switching states of T-type inverter
make up 48 switching sequences
Fig. 2. Space vector diagram for 3L inverter
TABLE I
J 0  [( E p  f pi ti )2  ( Eq  f qiti )2 ]   ucp (k  1) , (6)
i 1
where λ is the weight factor.
If the cost function of (6) is incorporated into the proposed
algorithm, the reasons for huge amount of computation are as
follows: first, in a sampling interval, its cycle calculations are
48 and more than that of the MPDPC by 23[15-16]. Second,
during the 48-cycle calculation, this algorithm needs at least
96(48×2) division operations to calculate the application time
of all vectors. Third, since the cost function in (6) includes 3
vectors, the computational amount of the cost function is also
more than that of MPDPC [15-16].
A novel cost function without application time calculation is
given to reduce the times of division operation. The goal of
FSMPDPC is to select an OSS with the least deviations
between the output power and reference. When the switching
sequence is vi (i=1,2,3) and the application time of its switching
states are ti (i=1,2,3), the active and reactive power at sampling
instant k+1 is predicted as
 p 3

Subsector
UNITS FOR MAGNETIC PROPERTIES
Type Switching Sequence  P ( k  1)  P ( k )   f pi ti
P OOO-POO-PPO
 i 1

I  p 3

Q ( k  1)  Q ( k )   f qi ti .
N OOO-OON-ONN
P PNN-PON-POO
(7)
II
N PON-PNN-ONN  i 1
 3
Ts   ti
P PON-POO-PPO
III
N PON-OON-ONN
P PON-PPN-PPO  i 1
IV
N PPN-PON-OON When the OSS is PON-POO-PPO or PON-OON-ONN and
located in sector I, the angle of the phase A grid current is
When the switching state is altered, only one power device is calculated in between 0o and 90o [29], and the polarity of ia is
changed, which can reduce the switching loss and enhance the positive and that of ic is negative. According to Fig. 1 and (4),
stability of T-type inverter. When the switching state of the the POO and PPO increase the NP voltage, while the OON and
inverter is Siabc (Sia, Sib, Sic) and the application time is ti, the ONN decrease the NP voltage [28].Therefore, the
voltage difference between C1 and C2 is [15-16] PON-POO-PPO (v1, v2, v3) is P-type switching sequence and
duc 1 the PON-OON-ONN (v1, v3, v2)is N-type switching sequence.
 Siabc i abc ,
T
(4) With assumption that there is a vector ṽ with ( α β), when
dt C
it is used to control the T-type inverter, the active and reactive
where uc is the voltage difference between the DC-link
power at time instant k+1 is equal to Pref and Qref, respectively.
capacitors and uc=uc2-uc1; and Siabc are the switching states of
Its derivatives of active and reactive power can be expressed as
the T-type inverter, i.e., |Siabc|={|Sia|, |Sib|, |Sic|}T, and Six (x=a, b,
c)∈{-1, 0, 1}. iabc={ia, ib, ic} denotes the grid phase currents of  Pref  P(k ) dP(k )
 fp  
the grid connected system. C is the capacitance of C1 and C2.  Ts dt
 u  u u  u . (8)
 f  Qref  Q ( k )  dQ (k )
When the switching states S1, S2, and S3 with t1, t2, and t3 work
sequentially, at sampling instant k+1, the voltage difference  q
between two capacitors is predicted to be  Ts dt

1 3 According to (7-8), the active and reactive power static

ucp (k  1)  ti Siabc i abc  uc (k ).
T
(5) errors are
C i 1

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 3
J1  ( f p  f p )2  ( f q  f q )2 ,
 Pref  P (k  1)  f pTs   f pi ti
p (14)
 i 1
 3
(9) where
Q  Q p (k  1)  f T 


ref q s  f qi ti
 dP
i 1
 f
 p dt u  u
Substituting (1-2) into (9), equation (9) can be rewritten as  . (15)
[ Pref  P p (k  1)]2  [Qref  Q p (k  1)]2  f   dQ u  u


q
dt
3 3
9( e2  e2 )[(Tsu   u iti ) 2  (Tsu   u i ti ) 2 ] (10) Based on (14) and (6), the simplified cost function with the
 i 1
, i 1 NP voltage is
4 L2
J 2  ( f p  f p )2  ( f q  f q )2   ucp (k  1) . (16)
where ui (uαi, uβi) (i=1, 2, 3) denote the output voltage of T-type
inverter with vi (i=1,2,3). According to (10), if the application When the NP voltage is not considered, the computational
time of ti (i=1, 2, 3) calculated by (3) is lower than the Ts and amount of the cost function in (16) is one-third of (6) because
positive, the relationship between the ṽ and (v1, v2, v3) is given (16) only needs to calculate one vectors while (6) needs to
in Fig. 3 and the active and reactive power static errors can be calculate three vectors. Substituting (8) into (16) yields
eliminated. E E
J 2  ( f p  p )2  ( f q  q )2   ucp (k  1) . (17)
Ts Ts
Equation (17) can be rewritten as
J 2  ( E p  f pTs )2  ( Eq  f qTs )2  Ts2 ucp (k  1) . (18)
When (18) is used as the cost function, it still need 48 cycle
calculations and 96 division operations to obtain the OSS, for
the prediction of the DC-link capacitors voltage difference
includes the application time of the three switching states.
D. Four steps model prediction
Since the T-type inverter focuses on improving the
Fig. 3. Relationship between ṽ and (v1, v2, v3)
performance of the active and reactive power, the weight factor
λ is relatively small. Moreover, Equation (2) and (4) show that
the two different types of switching sequence have the same
Therefore, the OSS can be selected by searching the location
effect on the active and reactive power and the opposite effect
of ṽ. The location of ṽ can be gained by the distance between ṽ
on the NP voltage. Therefore, the predictive model equation of
and the center of triangle. For example, in Fig. 3, when the OSS
active and reactive power is used to search the subsector
is PON-POO-PPO or PON-OON-ONN, the shortest distance is
containing the OSS, and the suitable switching sequence is
l3 which is the distance between the ṽ and the center of
selected to balance the NP voltage. The process of the
subsector III in sector I in Fig. 2. The distance between ṽ and
conventional MPDPC is divided into two steps: subsector
the center of the ith triangle can be calculated by
selection and switching sequence selection. The cost function
li  [(u  u )2  (u  u )2 ], (11) of (18) can be divided into two cost functions.
The first cost function choosing the subsector is
where
J   ( E p  f pTs )2  ( Eq  f qTs )2 , (19)
 u i  u ( i 1)  u ( i  2)
 u  where
 3
 , (12)
u
u    i  u  ( i 1)  u ( i  2)  dP u i  u ( i 1)  u ( i  2)
 f p  u 



3  dt 3
 . (20)
where the output voltage of the T-type inverter with switching f dQ u i  u ( i 1)  u ( i  2)
u 
sequence (vi, vi+1, vi+2) is ui (uαi, uβi), ui+1 (uα(i+1), uβ(i+1)), and ui+2 

q
dt 3
(uα(i+2), uβ(i+2)). Therefore, the proposed cost function which
The second cost function for selecting the OSS is
makes the active and reactive power trace the reference is
defined as
1 3
9(e2  e2 )li2 J   uc (k  1)  ( ti Siabc iabc )  uc (k ) .
T

J1  (21)
2 C i 1
2L
(13)
9(e2  e2 )[(u  u )2  (u  u )2 ]
 .
2 L2
Substituting (1- 2) and (8) into (13), we obtain

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/JESTPE.2019.2894007, IEEE Journal
of Emerging and Selected Topics in Power Electronics
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Fig. 4. Flow diagram of the FSMPDPC
The second cost function can be developed to achieve
multi-objective optimization. For example, if the proposed
algorithm is utilized to achieve the common-mode voltage
reduction, the cost function of common-mode voltage with
multiplying weigh factor is incorporated into (21).
The process of choosing the subsector is also divided into 2
steps. As shown in Fig. 2, each sector includes one zero vector
and two long vectors, similar to a two-level space vector. In the
first step, the sector including the OSS is also obtained by the
distance between its center and ṽ. According to the cost
function (19) and the center vector, the sector including the
OSS is selected in the first step. Then, the four subsectors in the
chosen sector is substitute into (19) and (20) successively, and
when the cost function gets its minimum, the subsector with
OSS is searched.
III. SUMMARY AND ANALYSIS
Figure (4) presents the flow diagram of FSMPDPC for
summarizing the above analysis and discussion. First, one zero
vector v0 and two adjacent long vectors vli and vl(i+1) in each
sector are substituted into (20) and (19). When J´obtains its
minimum value, the number of the sector (called i0) is gained.
Second, the vectors (vj, vj+1, vj+2) of the four subsectors in the
sector obtained are also substituted into (20) and (19), and the
optimal subsector (called j0) is obtained after four cycle
computations. Third, the application time (t1, t2, and t3 or t'1, t'2,
and t'3) of each switching state located in subsector j0 of sector
i0 is determined. Fourth, based on the cost function of (21), the
OSS is selected to balance the NP voltage. As shown in Fig. 4,
only 10 cycle computations and 2 division operations are
needed to obtain the OSS and the application time of each
switching state.
As shown in Fig. 5, the MPDPC scheme chooses an optimal
switch state to make the active and reactive power trace the
reference in each sampling interval [14-16]. The active and
reactive power of MPDPC are expressed as Pm and Qm , and the
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5
selected switching state is vs1. Meanwhile, The Pf and Qf
represent the active and reactive power of FSMPDPC, and the
OSS of FSMPDPC is (v1,v2,v3). The FSMPDPC searches an
OSS and combines the switching states of OSS linearly with its
application time to regulate the active and reactive power. To
decrease the deviations of active power and reactive power
further, the T-type inverter with FSMPDPC is applied with the
5-segment switching state.
Fig. 5. Analysis of active and reactive power when the T-type inverter
runs in steady state
Then, the switching loss of both approaches is analyzed and
given as follow. Between two vicinity sampling intervals, the
power switch state changes of two algorithms are decided by
their cost function. In the FSMPDPC, the OSS is selected on a
basis of the cost function (21) and (19), and it is very similar to
that of the MPDPC. Therefore, the power switch state changes
of two control algorithm are similar between two vicinity
sampling intervals. During a sampling interval, table. I and Fig.
5 show that the state of power switch changes four times in the
FSMPDPC, but there is no power switch state alters in the
MPDPC. In a word, the switching frequency of FSMPDPC is
larger than that MPDPC. The increasing switching frequency
adds the switching energy loss of the power switches in T-type
inverter, implying that the energy conversion efficiency of
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of Emerging and Selected Topics in Power Electronics
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FSMPDPC is lower than that of MPDPC. The active and
reactive power deviations of FSMPDPC at time k+1 are
 3
 Pf | Pref  P(k )   f piti |
 i 1
 3
, (22)
 Q | Q  Q (k ) 


f ref i 1
f qiti |
where ΔPf and ΔQf are the active and reactive power deviation
of FSMPDPC, respectively. Substituting (3) into (22) yields
ΔPf=0 and ΔQf=0.
The active and reactive power deviations of MPDPC at time
k+1 are
Pm | Pref  P(k )  f ps1Ts |
 compensation algorithm to compensate for the adverse effect of
 , (23)
Qm | Qref  Q(k )  f qs1Ts |
 time k+2 is used to trace the reference power. This algorithm is
where ΔPm and ΔQm are the active and reactive power
deviations of MPDPC, respectively. The ripples of active and
reactive power can be regarded as their cumulative deviation in
the fundamental period. As shown in Fig. 5, ΔPf and ΔQf are
smaller than ΔPm and ΔQm, respectively. Therefore, the
FSMPDPC have smaller active and reactive power ripples than
the MPDPC.
IV. EXPERIMENT RESULTS
As shown in Fig.6, an experimental platform whose
parameters are given in Table II is established to test the
improvement in the steady state performance and the
computational amount reduction of FSMPDPC [15-16].
Furthermore, the experimental results of DPC-SVM in
reference [11] are also provided to verify the steady-state
performance improvement of FSMPDPC more strictly.
TABLE II
SYSTEM PARAMETERS
Parameter
Inductance of the AC filter(L)
DC-link capacitor(C)
DC-link voltage(Udc)
Grid phase voltage 220/√3V
Grid frequency
Weigh factor(λ)
Dead-time
The experimental platform is composed of controlling board,
sampling board, driver board, AC filter and main circuit board.
In the controlling board, the application time of each vector is
calculated using DSP (TMS320F28335), and CPLD
(EPM570T144C5) is used to decode the switching state
transmitted from TMS320F28335 into gate signals. The T-type
inverter is placed on main circuit board and its power switches
are insulated gate bipolar transistors (IGBTs), whose type is
IKW50N60T (Infineon technologies). The DC-link voltage is
set to 370 V. The root mean square (RMS) of the grid line
voltage after the Y/Δ isolation transformer is 220 V.
In practical applications, the MPC contains the delay time
the delay time [15-16,30-31]. Normally, the predictive power at
adopted in this paper.
A. Estimated amount of calculation
To estimate the computational time of the three algorithms,
an output pin is set as high level when the microchip of the grid
connected inverter is assigned to accomplish the control
algorithm. As shown in Fig. 7, the computational time of
MPDPC is 91 us and more than that of FSMPDPC by 24 μs.
The computational time of DPC-SVM is the least of three
algorithms, because the cycle computation is avoided.
Fig. 7. Required running time of three algorithms
Value
6mH To validate the computational amount reduction in
1000μF
370V FSMPDPC further, we assume that the active power reference
is 3.8kW and its sampling interval is reduced to 80 μs, i.e., the
50Hz sampling frequency is 12.5 kHz.
0. 1
3μs
In Fig. 8(a-b), when the sampling interval is lower than the
computational time of MPPC, the T-type inverter cannot
control the grid current and the active and reactive power. If the
sampling time is ignored in Fig. 8(c), then at the time instant kTs
or kTc (Tc is the computational time of MPPC in each sampling
interval), the sampling system is triggered and the DSP starts
accomplish the control algorithm.
In MPDPC, the active and reactive power at time instant
(k+1)Ts is predicted as[16-17]
 P p (k  1)  P(k )  f piTs
 p . (24)
Q (k  1)  Q(k )  f qiTs
Actually, the switching state is updated at time instant
(k+1)Tc, and the accurate predictive model of active and
reactive power are

Fig. 6. Experimental setup

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 P (k  Tc / Ts )  P(k )  f piTc
p

 p . (25)
Q (k  Tc / Ts )  Q(k )  f qi Tc
In Fig. 8(c), as time passes, when the Tc exceeds Ts, the
predictive model of active and reactive power of MPDPC in (24)
becomes more and more inaccuracy. At the sampling instant
k+4 in Fig.8(c), the instant time difference caused by the
sampling interval and the computational time is 4(Tc-Ts).
(a)

(b)
(a)
Fig. 9. Waveforms of FSMPDPC with 80 μs sample interval: (a) grid
voltage ea and current ia and (b) active and reactive power

(b)

(a)

(c)
Fig. 8. Waveforms of MPDPC with 80 μs sample interval: (a) grid
voltage ea and current ia, (b) active and reactive power and (c) analysis

When the control algorithm of the grid-connected inverter is

replaced by FSMPDPC, the active and reactive power of Fig. 9
trace the reference power with little ripples and the grid current
contains very little harmonics. Thus, the computational amount
is decreased by FSMPDPC and its computational time is less
than the sampling interval (80 μs).
Figure.10 proves that the computational time of the
DPC-SVM is less than 80 us. There are obvious ripples in
active and reactive power because the command voltages for
the SVM are derived from the grid current and voltage and their
harmonics are injected into the command voltage.
(b)
Fig. 10. Waveforms of DPC-SVM with 80 μs sample interval: (a) grid
voltage ea and current ia and (b) active and reactive power
B. Steady-state analysis
To test the effectiveness of harmonic suppression with
different approaches, the reference active power of T-type
inverter with 10 kHz sampling frequency is set to vary from 2.2
kW to 3.8 kW. The grid current THD of three algorithms with
different active power reference are measured by using a
Fluke435 and given in Fig. 11. The grid current THD of
FSMPDPC is slightly lower than that of DPC-SVM, and less
than that of the MPDPC by 1.4% ~2.6%.

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/JESTPE.2019.2894007, IEEE Journal
of Emerging and Selected Topics in Power Electronics
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Fig. 11. Current THD with the three approaches and different active (a)
power reference

To compare the waveforms of active and reactive power of

grid-tied inverter with the adoption of three algorithms, the
reference active and reactive power are set to 3.8 kW and 0
kVar, respectively. In Fig. 12, the active and reactive power
ripples of FSMPDPC are the least, while that of DPC-SVM are
the largest of all. Thus, the steady-state performance of active
and reactive power in FSMPDPC is more excellent than the
others. (b)
Fig. 13. Grid phase voltage ea and current ia in MPDPC: (a) grid phase
voltage and current and (b) grid current spectrum

(a)

(a)

(b)

(c)
Fig. 12. Waveforms of the active and reactive power with the three
approaches: (a) MPDPC,(b) DPC-SVM and (c) FSMPDPC
The waveforms of the grid phase voltage ea, current ia and
the grid current spectrum with MPDPC are exhibited in Fig. 13.
There are prominent distortions in the grid phase current ia,
which contains many even-order harmonics.
When the grid-connected inverter is controlled by the
DPC-SVM, the even-order and 3th harmonics of the grid current
is decreased remarkably. As shown in Fig. 14, the grid current
waveform is greatly improved and has a smaller distortion,
compared to Fig. 13.
(b)
Fig. 14. Grid phase voltage ea and current ia in DPC-SVM: (a) grid phase
voltage and current and (b) grid current spectrum
In Fig. 15, when the FSMPDPC is adopted, the grid phase
current ia is close to a pure sinusoidal wave, and its even-order
harmonics are almost eliminated, its current THD is 1.4% less
than that of the MPDPC. Comparing with the grid phase current
of DPC-SVM, the grid phase current’s 5th, 7th and 17th
harmonics are decreased clearly.
In 3L inverter, the NP voltage is a very important aspect to
evaluate the control algorithm, and the corresponding
waveforms are displayed in Fig. 16. As shown in Fig. 16, three
algorithms balance NP voltage successfully with little ripples.
Additionally, the max voltage ripple in the three algorithms is
approximately 4V. Therefore, in FSMPDPC, the adverse effect
of the four steps model prediction on NP voltage is negligible.

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power is 5ms, whereas the setting time of DPC-SVM and

FSMPDPC in Fig. 17(b) and(c) is 6 ms. Although the dynamic
response of FSMPDPC and DPC-SVM are slightly slower than
that of MPDPC, the impact on practical applications is very
small.

(a)

(a)

(b)
Fig. 15. Grid phase voltage ea and current ia in FSMPDPC: (a) grid phase
voltage and current and (b) grid current spectrum
(b)

(c)
Fig. 17. Dynamic response of active power with three approaches: (a)
MPDPC,(b)DPC-SVM and (c) FSMPDPC
(a)

(a)

(b)

(b)

(c)
Fig. 16. Waveforms of two DC-link capacitors voltage in three
algorithms :(a) MPDPC, (b) DPC-SVM and (c) FSMPDPC

C. Dynamic analysis (c)

Fig. 18. Dynamic response of the grid phase current with three
The power dynamic responses of the three algorithms are approaches: (a) MPDPC ,(b) DPC-SVM and (c) FSMPDPC
also tested by stepping the reference active power from 0 kW to
3.8 kW. In Fig. 17(a), the settling time of MPDPC the active

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/JESTPE.2019.2894007, IEEE Journal
of Emerging and Selected Topics in Power Electronics
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The dynamic responses of the grid phase current ia in the
three algorithms are also given in Fig. 18. In the three
algorithms, ia arrives at the steady state relatively quickly with
no current overshoot, and their settling time are all
approximately 3 ms.
Based on the experimental results, the validity of FSMPDPC
was verified. Comparing with MPDPC, the FSMPDPC not
only lowers the computational requirements by 26.67% but also
improves the steady-state performance, such as reducing
ripples of active and reactive power and decreasing the grid
current THD by 1.4% ~2.6%. For DPC-SVM, the amount of
calculation is less than that of FSMPDPC, whereas it has worse
steady state performance such as more grid current THD and
higher active and reactive power ripples.
V. CONCLUSION
This paper presents the FSMPDPC for the T-type inverter to
solve the problem of the variable switching frequency and huge
computational amount in MPDPC. In the FSMPDPC, a new
cost function and four steps model prediction are proposed to
ease the computational burden of the microchip. According to
the analysis and experimental results, the FSMPDPC is
characterized by the following superiorities. First, it eases the
heavy computational burden of MPDPC. Second, the steady
state performance of grid-connected inverter is improved by
FSMPDPC, such as reducing the ripples in active and reactive
power and decreasing the grid current THD.
Additionally, the proposed FSMPDPC provides a solution
for the multi-level (five levels, seven levels) inverter with fixed
switching frequency MPDPC troubled by heavy computational
burden.
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of Emerging and Selected Topics in Power Electronics
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Power Electron., vol. 6, no. 7, pp. 1390-1398, Aug. 2013, doi: Junfeng Liu received the M.S. degree in
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10.1109/TIE.2011.2157284. From 2005 to 2008, he was a
[31]. X. Xiao, Y. Zhang, J. Wang and H. Du, et al,“An improved model Development Engineer of Guangdong
predictive control scheme for the PWM rectifier-inverter system based on Nortel Network, Guangzhou, China. In
power-balancing mechanism.” IEEE trans. Ind. Electron., vol. 63, no.8,
2014, he joined the South China University of Technology,
pp. 5197-5208, Aug.2016,doi: 10.1109/TIE.2016.2558138
Guangzhou, where he was an Associated Professor at School of
Automation Science and Engineering. His research interests
include power electronics applications, nonlinear control, high
Bihua Hu (S’17) received his B.S. degree frequency power distribution system, and motion control
in Automation and M.S. degree in power system.
engineering respectively in 2011 and 2014
from Xiangtan University, Xiangtan,
China. He is studying for his Ph.D. degree Jun Zeng (M’11) received her Ph.D.
in Power Electronics and Power Drives at degree in control theory and control
the School of Electric Power, South China engineering from the South China
University of Technology, Guangzhou, University of Technology, Guangzhou,
China. His current research interests China in 2007. She is a professor in the
include energy storage, multilevel converters and the application Electric Power College of the South
of power electronics in renewable energy systems. China University of Technology,
Guangzhou, China. Her current research
interests include power electronics
applications, energy management and intelligence control in
Longyun Kang(M’12) received his B.S. distributed generation and integration of renewable energy to
degree in Physics from Yanbian smart grid.
University, China, in 1982, and his M.S.
and Ph.D. degrees in Electrical
Engineering from the Engineering Shubiao Wang was born in Jiangsu, China.
Department of Kyoto University, Japan, in He received his B.S. degree in electrical
1996 and 1999, respectively. engineering from Dalian Maritime
From 1999 to 2001, he was a University, Dalian, China, in 2015. He is
Researcher with the Department of currently working toward his M.S degree
Engineering, Tokyo Institute of Technology. From 2001 to 2006, in electrical engineering at the South
he was an Associate Professor with the Institute of Mechanical China University of Technology,
Engineering, Xi’an Jiaotong University. Since 2006, he has been Guangzhou, China. His primary research
with the School of Electric Power, South China University of interests include power electronics and
Technology, where he is currently a Professor. He supervises their applications in battery management systems.
seven Ph.D. students and serves as a Director of Guangdong Key
Laboratory of Clean Energy Technology. His current research
interests lie in the area of renewable energy and electric vehicles, Zhi Zhang received his B.S. degree in
including wind energy, solar energy conversion, hybrid energy Automation from Xiangtan University,
systems, and hybrid-drive technology of electric vehicles. China, in 2003, the M.S. degree in Power
Electronics and Power Drives from
Guangxi University, China, in 2007, and
the Ph.D. degree in Power Electronics and
Power Drives from South China
University of Technology, Guangzhou,
China, in 2010.
Currently, he is a senior engineer in the Department of
Electrical Engineering, Dongguan University of Technology,
China. His special field of research interests includes power
electric, electrical machine, new renewable energy, UPS system.

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