Proposal

Ø  Do the research

q  Study the problem, background, and related work

q  Flesh out a concrete research plan

Ø  One proposal/team, two pages

q  Team members and responsibilities

q  Description of project

q  Research plan and milestones

q  Responsibilities of each member

q  References

Ø  Written proposal due: 9/25th, 11:59pm

q  Email Sisu

1  
Proposal Presentation

Ø  10 min per group

q  including 3 min for questions

Ø  Your elevator pitch!

Ø  Email Sisu your slides by 11am on 9/25th

q  All use Sisu’s laptop à reduce context switches

2  
Real-Time Scheduling Theory

Chenyang  Lu  
Department  of  Computer  Science  and  Engineering  
Readings

Ø  Required: Hard Real-Time Computing Systems, G. Buttazzo.

q  Chapter 4 Periodic Task Scheduling

q  Chapter 5 (5.1-5.4) Fixed Priority Servers

q  Chapter 7 (7.1-7.3) Resource Access Protocols

Ø  Required: Real-Time Systems, Jane Liu.

q  Chapter 9 (9.1, 9.2, 9.4, 9.5.1) Multiprocessor Scheduling

Ø  Further reading (not required)

q  A Practitioner's Handbook for Real-Time Analysis: Guide to Rate
Monotonic Analysis for Real-Time Systems, Klein et al.

q  Deadline Scheduling for Real-Time Systems: EDF and Related Algorithms,
Stankovic et al.

Chenyang  Lu   4  
Real-Time Scheduling

Ø  What are the optimal scheduling algorithms?

Ø  How to assign priorities to processes?

Ø  Can a system meet all deadlines?

Chenyang  Lu   5  
Benefit of Scheduling Analysis

• Schedulability analysis reduces development time by 50%!

• Reduce wasted implementation/testing rounds

• Analysis time << testing

• More reduction expected for more complex systems

→ Quick exploration of design space!

VEST (UVA) Baseline (Boeing)

Design – one processor 40 Design – one processor 25
Implementation – one processor 75
Scheduling analysis - MUF × 1 Timing test × 30
Design - two processors 25 Design - two processors 90
Implementation – two processors 105
Scheduling analysis - DM/Offset √ 1 Timing test √ 20
“Implementation” 105
Total composition time 172 Total composition time 345

J.A.  Stankovic,  et  al.,  VEST:  An  Aspect-­‐Based  ComposiIon  Tool  for  Real-­‐Time  Systems,  RTAS  2003.    

Chenyang  Lu   6  
Consequence of Deadline Miss

Ø  Hard deadline

q  System fails if missed.

q  Goal: guarantee no deadline miss.

Ø  Soft deadline

q  User may notice, but system does not fail.

q  Goal: meet most deadlines most of the time.

Chenyang  Lu   7  
Comparison

Ø  General-purpose systems

q  Fairness to all tasks (no starvation)

q  Optimize throughput

q  Optimize average performance

Ø  Embedded systems

q  Meet all deadlines.

q  Fairness or throughput is not important

q  Hard real-time: worry about worst case performance

Chenyang  Lu   8  
Terminology

Ø  Task

q  Map to a process or thread

q  May be released multiple times

Ø  Job: an instance of a task

Ø  Periodic task

q  Ideal: inter-arrival time = period

q  General: inter-arrival time >= period

Ø  Aperiodic task

q  Inter-arrival time does not have a lower bound

Chenyang  Lu   9  
 Timing Parameters

Ø  Task Ti

q  Period Pi

q  Worst-case execution time Ci

q  Relative deadline Di

Ø  Job Jik

q  Release time: time when a job is ready

q  Response time Ri = finish time – release time

q  Absolute deadline = release time + Di

Ø  A job misses its deadline if

q  Response time Ri > Di

q  Finish time > absolute deadline

Chenyang  Lu   10  
 Example

Ø  P1 = D1 = 5, C1 = 2; P2 = D2 = 7, C2 = 4.

Chenyang  Lu   11  
Metrics

Ø  A task set is schedulable if all jobs meet their deadlines.

Ø  Optimal scheduling algorithm

q  If a task set is not schedulable under the optimal algorithm, it is
not schedulable under any other algorithms.

Ø  Overhead: Time required for scheduling.

Chenyang  Lu   12  
 SCHEDULING
SINGLE PROCESSOR

Chenyang  Lu   13  
Optimal Scheduling Algorithms

Ø  Rate Monotonic (RM)

q  Higher rate (1/period) à Higher priority

q  Optimal preemptive static priority scheduling algorithm

Ø  Earliest Deadline First (EDF)

q  Earlier absolute deadline à Higher priority

q  Optimal preemptive dynamic priority scheduling algorithm

Chenyang  Lu   14  
 Example

Ø  P1 = D1 = 5, C1 = 2; P2 = D2 = 7, C2 = 4.

Chenyang  Lu   15  
Assumptions

Ø  Single processor.

Ø  All tasks are periodic.

Ø  Zero context switch time.

Ø  Relative deadline = period.

Ø  No priority inversion.

Ø  RM and EDF have been extended to relax assumptions.

Chenyang  Lu   16  
 Utilization Bound

Ø  Utilization of a processor:

n
Ci

U =∑


i =1 Pi
q  n: number of tasks on the processor.

Ø  Utilization bound Ub: All tasks are guaranteed to be
schedulable if U ≤ Ub.

Ø  No scheduling algorithm can schedule a task set if U > 1

q  Ub ≤ 1

q  An algorithm is optimal if its Ub = 1

Chenyang  Lu   17  
 RM Utilization Bound

Ø  Ub(n) = n(21/n-1)

q  n: number of tasks

q  Ub(2) = 0.828

q  Ub(n) ≥ Ub(∞) = ln2 = 0.693

Ø  U ≤ Ub(n) is a sufficient condition, but not necessary.

Ø  Ub = 1 if all task periods are harmonic

q  Periods are multiples of each other

q  e.g., 1,10,100

Chenyang  Lu   18  
Properties of RM

Ø  RM may not guarantee schedulability even when CPU is
not fully utilized.

Ø  Low overhead: when the task set is fixed, the priority of a
task never changes.

Ø  Easy to implement on POSIX APIs.

Chenyang  Lu   19  
EDF Utilization Bound

Ø  Ub = 1

Ø  U ≤ 1: sufficient and necessary condition for schedulability.

Ø  Guarantees schedulability if CPU is not over-utilized.

Ø  Higher overhead than RM: task priority may change online.

Chenyang  Lu   20  
Assumptions

Ø  Single processor.

Ø  All tasks are periodic.

Ø  Zero context switch time.

Ø  Relative deadline = period.

Ø  No priority inversion.

Ø  What if relative deadline < period?

Chenyang  Lu   21  
Optimal Scheduling Algorithms
Relative Deadline < Period

Ø  Deadline Monotonic (DM)

q  Shorter relative deadline à Higher priority

q  Optimal preemptive static priority scheduling

Ø  Earliest Deadline First (EDF)

q  Earlier absolute deadline à Higher priority

q  Optimal preemptive dynamic priority scheduling algorithm

Chenyang  Lu   22  
 DM Analysis

Ø  Sufficient but pessimistic test

n
Ci 1/ n
∑ ≤ n (2 -1)
i =1 Di

Ø  Sufficient and necessary test: response time analysis

Chenyang  Lu   23  
 Response Time Analysis

Ø  Works for any fixed-priority preemptive scheduling algorithm.

Ø  Critical instant

q  results in a task’s longest response time.

q  when all higher-priority tasks are released at the same time.

Ø  Worst-case response time

q  Tasks are ordered by priority; T1 has highest priority

i −1
⎡ Ri ⎤
Ri = Ci + ∑ ⎢ ⎥C j
j =1 ⎢ Pj ⎥

Chenyang  Lu   24  
 Response Time Analysis

Tasks  are  ordered  by  priority;  T1  has  highest  priority  
for  (each  task  Tj)  {  
 I  =  0;  R  =  0;  
 while  (I  +  Cj  >  R)  {  
   R  =  I  +  Cj;  
   if  (R  >  Dj)  return  UNSCHEDULABLE;  
 
j-1 ⎡ R ⎤
  I = ∑ k=1 ⎢ ⎥Ck;
⎢ Pk ⎥
   
 }  
}  
return  SCHEDULABLE;  
Chenyang  Lu   25  
 Example

Ø  P1 = D1 = 5, C1 = 2; P2 = D2 = 7, C2 = 4.

Chenyang  Lu   26  
 EDF: Processor Demand Analysis

Ø  To start, assume Di = Pi

Ø  Processor demand in interval [0, L]: total time needed for
completing all jobs with deadlines no later than L.

n
⎢ L ⎥
CP (0, L) = ∑ ⎢ ⎥Ci
i =1 ⎣ Pi ⎦

Chenyang  Lu   27  
 Schedulable Condition

Ø  Theorem: A set of periodic tasks is schedulable by

EDF if and only if for all L ≥ 0:

n
⎢ L ⎥
L ≥ ∑ ⎢ ⎥Ci
i =1 ⎣ Pi ⎦

Ø  There is enough time to meet processor demand at

every time instant.

Chenyang  Lu   28  
 Busy Period Bp

Ø  Ended at the first time instant L when all the released tasks
are completed

Ø  W(L): Total execution time of all tasks released by L.

n
⎡ L ⎤
W ( L) = ∑ ⎢ ⎥Ci
i =1 ⎢ Pi ⎥

B p = min{L | W ( L) = L}

Chenyang  Lu   29  
Properties of Busy Period

Ø  CPU is fully utilized during a busy period.

Ø  The end of a busy period coincides with the beginning of
an idle time or the release of a periodic job.

Chenyang  Lu   30  
 Schedulable Condition

Ø  All tasks are schedulable if and only if

n
⎢ L ⎥
L ≥ ∑ ⎢ ⎥Ci
i =1 ⎣ Pi ⎦

at all task release times before min(Bp,H)

Chenyang  Lu   31  
Compute Busy Period

busy_period  
{  
H  =  lcm(P1,…,Pn);  /*  least  common  mulIple  */  
L  =  ∑Ci;  
L'  =  W(L);  
while  (L'  !=  L  and  L'  <=  H)  {  
 L  =  L';  
 L'  =  W(L);  
}  
if  (L'  <=  H)    
 Bp  =  L;    
else    
 Bp  =  INFINITY;  
}    

Chenyang  Lu   32  
 Processor Demand Test for EDF
Di < Pi

Ø  A set of periodic tasks with deadlines no more than than

periods is schedulable by EDF if and only if

⎡⎛ ⎢ L − Di ⎥ ⎞ ⎤
n
∀L ∈ D, L ≥ ∑ ⎢⎜ ⎢ ⎥ + 1⎟⎟ Ci ⎥
⎜
⎣⎝ ⎣ Pi ⎦ ⎠ ⎥⎦
i =1 ⎢

where D = {Di,k | Di,k = kPi+Di, Di,k ≤ min(Bp, H), 1≤i≤n, k≥0}.

Ø  Note: only need to test all deadlines before min(Bp,H).

Chenyang  Lu   33  
 Schedulability Test Revisited

D  =  P   D  <  P  
StaIc  Priority   RM   DM  
UIlizaIon  bound   Response  Ime  
Response  Ime  
 
Dynamic  Priority   EDF   EDF  
UIlizaIon  bound   Processor  demand  
 

Chenyang  Lu   34  
Assumptions

Ø  Single processor.

Ø  All tasks are periodic.

Ø  Zero context switch time.

Ø  Relative deadline = period.

Ø  No priority inversion.

Chenyang  Lu   35  
Questions

Ø  What causes priority inversion?

Ø  How to reduce priority inversion?

Ø  How to analyze schedulability?

Chenyang  Lu   36  
Priority Inversion

Ø  A low-priority task blocks a high-priority task.

Ø  Sources of priority inversion

q  Access shared resources guarded by semaphores.

q  Access non-preemptive subsystems, e.g., storage, networking.

Chenyang  Lu   37  
Semaphores

Ø  OS primitive for controlling access to critical regions.

q  Get access to semaphore S with wait(S).

q  Execute critical section to access shared resource.

q  Release semaphore with signal(S).

Ø  Mutex: at most one process can hold a mutex.

wait(mutex_info_bus);
Write data to info bus;
signal(mutex_info_bus);

Chenyang  Lu   38  
 Priority Inversion

critical section

T1 blocked!

1 1 1

4 4 4 4
0 2 4 6 8 10 12 14 16 18 20 22

Chenyang  Lu   39  
 Unbounded Priority Inversion

critical section
P(1) blocked by 4,2,3!

1 1 1

4 4 4 4 4
0 2 4 6 8 10 12 14 16 18 20 22

Chenyang  Lu   40  
What happened to Pathfinder?

Ø  …But  a  few  days  into  the  mission,  not  long  aler  Pathfinder  
started  gathering  meteorological  data,  the  spacecral  
began  experiencing  total  system  resets,  each  resulIng  in  
losses  of  data…    

Real-­‐World  (Out  of  This  World)  Story:  Priority  

inversion  almost  ruined  the  path  finder  mission  
on  MARS!  hpp://research.microsol.com/~mbj/  

Chenyang  Lu   41  
 Solution

Ø  The low-priority task inherits the priority of the blocked

high-priority task.

critical section
P(1) only blocked by 4

1 1 1
Inherit return to
priority 1! 3
priority 4!
2

4 4 4 4
0 2 4 6 8 10 12 14 16 18 20 22

Chenyang  Lu   42  
 Priority Inheritance Protocol (PIP)

Ø  When task Ti is blocked on a semaphore held by Tk

q  If prio(Tk) is lower than prio(Ti), prio(Ti) à Tk

Ø  When Tk releases a semaphore

q  If Tk no longer blocks any tasks, it returns to its normal priority.

q  If Tk still blocks other tasks, it inherits the highest priority of the
remaining tasks that it is blocking.

Ø  Priority Inheritance is transitive

q  T2 blocks T1 and inherits prio(T1)

q  T3 blocks T2 and inherits prio(T1)

Chenyang  Lu   43  
 How was Path Finder saved?

Ø  When  created,  a  VxWorks  mutex  object  accepts  a  boolean  parameter  
that  indicates  whether  priority  inheritance  should  be  performed  by  
the  mutex.    
Ø  The  mutex  in  question  had  been  initialized  with  the  parameter  
FALSE.  
Ø  VxWorks  contains  a  C  interpreter  intended  to  allow  developers  to  
type  in  C  expressions  and  functions  to  be  executed  on  the  Aly  during  
system  debugging.    
Ø  The  initialization  parameter  for  the  mutex  was  stored  in  global  
variables,  whose  addresses  were  in  symbol  tables  also  included  in  
the  launch  software,  and  available  to  the  C  interpreter.    
Ø  A  C  program  was  uploaded  to  the  spacecraft,  which  when  
interpreted,  changed  these  variables  from  FALSE  to  TRUE.    
Ø  No  more  system  resets  occurred.    

Chenyang  Lu   44  
Bounded Number of Blocking

Ø  Assumptions of analysis

q  Fixed priority scheduling

q  All semaphores are binary

q  All critical sections are properly nested

Ø  Task Ti can be blocked by at most min(m,n) times

q  m: number of distinct semaphores that can be used to block Ti

q  n: number of lower-priority tasks that can block Ti

Chenyang  Lu   45  
 Extended RMS Utilization Bound

Ø  A set of periodic tasks can be scheduled by RMS/PIP if

i
Ck Bi 1/ i
∀i, 1 ≤ i ≤ n, ∑ + ≤ i ( 2 − 1)
k =1 Pk Pi
q  Tasks are ordered by priorities (T1 has the highest priority).

q  Bi: the maximum time that task Ti can be blocked by a lower-
priority task.

Chenyang  Lu   46  
Extended Response Time Analysis

•  Consider the effect of blocking on response time:

i −1⎡ Ri ⎤
Ri = Ci + Bi + ∑ ⎢ ⎥C j
j =1 ⎢ Pj ⎥

•  The analysis becomes sufficient but not necessary.

Chenyang  Lu   47  
Priority Ceiling

Ø  C(Sk): Priority ceiling of a semaphore Sk

q  Highest priority among tasks requesting Sk.

Ø  A critical section guarded by Sk may block task Ti only if

C(Sk) is higher than prio(Ti)

Chenyang  Lu   48  
Compute Bi

Ø  Assumption: No nested critical sections.

/*  potenIal  blocking  by  other  tasks  */  
B1=0;  B2=0;  
for  each  Tj  with  priority  lower  than  Ti  {  
b1  =  longest  criIcal  secIon  in  Tj  that  can  block  Ti  
B1  =  B1  +  b1  
}  
/*  potenIal  blocking  by  semaphores  */  
for  each  semaphore  Sk  that  can  block  Ti  {  
b2  =  longest  criIcal  secIon  guarded  by  Sk  in  lower  priority  tasks  
B2  =  B2  +  b2  
}  
Return  min(B1,  B2)  

Chenyang  Lu   49  
Priority Ceiling Protocol

Ø  Priority ceiling of a processor: The highest priority ceiling
of all semaphores currently held

Ø  A task can acquire a resource only if

q  the resource is free, AND

q  it has a higher priority than the priority ceiling of the system

Ø  A task is blocked by at most one critical section.

Ø  Higher run-time overhead than PIP.

Chenyang  Lu   50  
Assumptions

Ø  Single processor.

Ø  All tasks are periodic.

Ø  Zero context switch time.

Ø  Relative deadline = period.

Ø  No priority inversion.

Chenyang  Lu   51  
Hybrid Task Set

Ø  Periodic tasks + aperiodic tasks

Ø  Problem: Arrival times of aperiodic tasks are unknown

Ø  Sporadic task with a hard deadline

q  Inter-arrival time must be lower bounded

q  Schedulability analysis: treated as a periodic task with period =
minimum inter-arrival time à can be very pessimistic.

Ø  Aperiodic task with a soft deadline

q  Possibly unbounded inter-arrival time

q  Maintain hard guarantees on periodic tasks

q  Reduce response time of aperiodic tasks

Chenyang  Lu   52  
Background Scheduling

Ø  Handle aperiodic requests with the lowest-priority task

Ø  Advantages

q  Simple

q  Aperiodic tasks usually has no impact on periodic tasks.

Ø  Disadvantage

q  Aperiodic tasks have very long response times when the utilization
of periodic tasks is high.

Ø  Acceptable only if

q  System is not busy

q  Aperiodic tasks can tolerate long delays

Chenyang  Lu   53  
Polling Server

Ø  A periodic task (server) serves aperiodic requests.

q  Period: Ps

q  Capacity: Cs

Ø  Released periodically at period Ps

Ø  Serves any pending aperiodic requests

Ø  Suspends itself until the end of the period if

q  it has used up its capacity, or

q  no aperiodic request is pending

Ø  Server capacity is replenished to Cs in the beginning of the
next period

Chenyang  Lu   54  
Example: Polling Server

Chenyang  Lu   55  
Schedulability

Ø  Polling server has the same impact on periodic tasks as a
periodic task.

q  n tasks with m servers: Up + Us ≤ Ub(n+m)

Ø  Disadvantage: If an aperiodic request “misses” the server,

it has to wait till the next period. à long response time.

Ø  Can have multiple servers (with different periods) for

different classes of aperiodic requests

Chenyang  Lu   56  
 Deferrable Server (DS)

Ø  DS preserves unused capacity till the end of the current

period à shorter response to aperiodic requests.

Ø  DS’s impact on periodic tasks differs from a periodic task.

Chenyang  Lu   57  
Example: Deferrable Server

Chenyang  Lu   58  
 RM Utilization Bound with DS

⎡⎛ U + 2 ⎞1/ n ⎤
Ø  Under RMS
U b = U s + n ⎢⎜⎜ s ⎟⎟ − 1⎥
⎢⎣⎝ 2U s + 1 ⎠ ⎥⎦

⎛ U s + 2 ⎞
Ø  As n à ∞:
U b = U s + ln⎜⎜ ⎟⎟
⎝ 2U s + 1 ⎠
q  When Us = 0.186, min Ub = 0.652

⎛ U s + 2 ⎞
Ø  System is schedulable if
U p ≤ ln⎜⎜ ⎟⎟
⎝ 2U s + 1 ⎠
Chenyang  Lu   59  
 DS: Middleware Implementation

Ø First DS implementation on top of priority-based OS (e.g., Linux)

Ø Server thread processes aperiodic events (2nd highest priority)

Ø Budget manager thread (highest priority) manages the budget and controls
the execution of server thread

Replenish Timer
High Priority
Budget
Manager
Thread
ACE Timer Queue
Aperiodic Events Budget Exhausted Timer
Server
Thread
Kokyu Dispatching Queue
Periodic Events
Dispatching
Thread
Kokyu Dispatching Queue
Periodic Events
Dispatching
Y. Zhang, C. Lu, C. Gill, P. Lardieri,
Thread G. Thaker, Middleware Support for
Kokyu Dispatching Queue Aperiodic Tasks in Distributed Real-
Low Priority
Time Systems, RTAS'07.

Chenyang  Lu   60  
Assumptions

Ø  Single processor.

Ø  All tasks are periodic.

Ø  Zero context switch time.

Ø  Relative deadline = period.

Ø  No priority inversion.

Chenyang  Lu   61  
Context Switch Time

Ø  RTOS usually has low context switch overhead.

Ø  Non-zero context switch time can still cause overruns in a
tight schedule.

q  Leave margin in your schedule.

Ø  Techniques exist to reduce number of context switches by
avoiding certain preemptions.

Chenyang  Lu   62  
Fix an Unschedulable System

Ø  Reduce task execution times.

Ø  Reduce blocking factors.

Ø  Get a faster processor.

Ø  Replace software components with hardware.

Ø  Multi-processor and distributed systems.

Chenyang  Lu   63  
Pointers

Ø  Hard Real-Time Computing Systems, G. Buttazzo.

q  Chapter 4 Periodic Task Scheduling

q  Chapter 5 (5.1-5.4) Fixed Priority Servers

q  Chapter 7 (7.1-7.3) Resource Access Protocols

Ø  Real-Time Systems, Jane Liu.

q  Chapter 9 (9.1, 9.2, 9.4, 9.5.1) Multiprocessor Scheduling

Ø  A Practitioner's Handbook for Real-Time Analysis: Guide to Rate

Monotonic Analysis for Real-Time Systems, Klein et al.

Ø  Deadline Scheduling for Real-Time Systems: EDF and Related

Algorithms, Stankovic et al.

Chenyang  Lu   64  
 SCHEDULING
MULTIPROCESSOR & DISTRIBUTED
SYSTEMS

Chenyang  Lu   65  
 Multiprocessor System

Ø  Tight coupling among processors.

Ø  Communicate through shared memory and on-board bus.

Ø  Scheduled by a common scheduler/OS.

q  Global scheduling

q  Partitioned scheduling

Ø  States of all processors available to each other.

Chenyang  Lu   66  
Distributed System

Ø  Loose coupling among processors

Ø  Each processor has its own scheduler

Ø  Costly to acquire states of other processors

Ø  Wide range of systems

q  Processor boards mounted on a VME bus

q  Automobile: hundreds of processors connected
through Control Area Networks (CANs)

q  Air traffic control system on a wide area network

Chenyang  Lu   67  
End-to-End Task Model

Ø  An (end-to-end) task is composed of multiple subtasks
running on multiple processors

q  Message, event, remote method invocation

Ø  Task = a chain/tree/graph of subtasks

q  Ti = {Ti,1, Ti,2, … , Ti,n(i)}

q  n(i): the number of subtasks of Ti

Ø  Precedence constraint: Job Ji,j cannot be released until Ji,j-1
has been completed.

Chenyang  Lu   68  
 Event Service

Ø  TAO: Open-source Real-Time CORBA middleware.

Ø  Event Channel (EC) dispatches events according to their priorities.

Ø  Gateway forwards events between processors.

EC EC EC

Gate Gate
way way

T1,1 T1,2 T1,3

Application Application Application

Processor 1 Processor 2 Processor 3

Chenyang  Lu   69  
 Inside an Event Channel

Replenish Timer
High Priority
Budget
Manager
Thread
ACE Timer Queue
Aperiodic Events Budget Exhausted Timer
Server
Thread
Kokyu Dispatching Queue
Periodic Events
Dispatching
Thread
Kokyu Dispatching Queue
Periodic Events
Dispatching
Y. Zhang, C. Lu, C. Gill, P. Lardieri,
Thread G. Thaker, Middleware Support for
Kokyu Dispatching Queue Aperiodic Tasks in Distributed Real-
Low Priority
Time Systems, RTAS'07.

Chenyang  Lu   70  
End-to-End Deadline

Ø  A task is subject to an end-to-end deadline.

Ø  Does not care about the response time of a subtask.

Ø  How to guarantee end-to-end deadlines in distributed

systems?

Chenyang  Lu   71  
End-to-End Scheduling

1.  Task allocation

2.  Synchronization protocol

3.  Subdeadline assignment

4.  Schedulability analysis

Chenyang  Lu   72  
Task Allocation

Ø  Map tasks to processors

Ø  Strategies

q  Offline, static allocation

q  Allocate a task when it arrives

q  Re-allocate (migrate) a task after it starts

Ø  NP-hard à heuristics needed

Chenyang  Lu   73  
Bin Packing

Ø  Pack subtasks to bins (processors) with limited capacity

q  Size of a subtask Ti,j: ui,j = Ci,j/Pi

q  Capacity of each bin: utilization bound

Ø  Goal: minimize the number of bins subject to the capacity
constraints

q  Ignore communication cost

q  Assume every subtask is periodic

Chenyang  Lu   74  
Bin-Packing Heuristics: First-Fit

Ø  Subtasks assigned in arbitrary order

Ø  To allocate a new subtask Ti,j

q  if Ti,j can be added to an existing processor Pl (1≤l≤k)
without exceeding its capacity

•  Allocate Ti,j to Pk

q  else

•  Add a new processor Pk+1 and allocate Ti,j to it.

Chenyang  Lu   75  
Performance Limit of First-Fit

Ø  Number of processors needed: m/m0 -> 1.7 as m0 -> ∞

q  m: number of processors needed under First-Fit

q  m0: minimum number of processors needed

Ø  First-Fit can always find a feasible allocation on m
processors if total subtask utilization ≤ m(21/2-1) = 0.414m

q  Assuming identical processors

Chenyang  Lu   76  
Minimize Communication Cost

Ø  Inter-subtask communication introduces overhead & delay

Ø  Minimize communication cost subject to processor
capacity constraints

q  Partition subtasks into groups

q  Allocate groups to processors

Chenyang  Lu   77  
End-to-End Scheduling

1.  Task allocation

2.  Synchronization protocol

3.  Subdeadline assignment

4.  Schedulability analysis

Chenyang  Lu   78  
Synchronization Requirements

Ø  Enable schedulability analysis

Ø  Bounded worst-case response time

Ø  Low overhead

Ø  Reduce jitter

Ø  Reduce average response time

Chenyang  Lu   79  
Greedy Protocol

Ø  Release job Ji,j;k as soon as Ji,j-1;k is completed

Ø  Subtasks may not be periodic under a greedy protocol

q  Difficult for schedulability analysis

q  High-priority tasks arrive early à long worst-case response time
for lower-priority tasks

q  Jitter can accumulate over multiple hops

Chenyang  Lu   80  
 Greedy Protocol Example

T1 (4,2) T2,2 (6,2)

P1 P2
T2,1 (6,2) T3 (6,3)

T1
2 4 6 8 10 12

T2,1
2 4 6 8 10 12
On P1
On P2

T2,2
T3
2 4 6 8 10 12 misses
Phase of T3 deadline
T3
2 4 6 8 10 12

Chenyang  Lu   81  
Critique of Greedy Protocol

Ø  Low overhead

Ø  Low average response time

Ø  High jitter

Ø  Difficult to analyze schedulability

Ø  Long worst-case response time

Chenyang  Lu   82  
 Phase-Modification Protocol (PMP)

Ø  Enforce periodic release based on the worst-case response times of

preceding subtasks.

Ø  Every job Ji,j;k is released at time

j −1
φi + (k − 1) Pi + ∑ l =1 Ri ,l
Ri,l: worst case response time of Til

q 
Ø  Require upper bounds on the response times of all subtasks.

Ø  Modified PMP (MPMP): Same as PMP except a subtask cannot be

released unless its predecessor has been completed.

Chenyang  Lu   83  
 MPMP Illustrated

T1 (4,2) T2,2 (6,2)

P1 P2
T2,1 (6,2) T3 (6,3)

T1
2 4 6 8 10 12
Synch signal
delayed
T2,1
2 4 6 8 10 12
On P1
On P2

T2,2
2 4 6 8 10 12

Phase of T3

T3
2 4 6 8 10 12

Chenyang  Lu   84  
Critique on MPMP

Ø  Enable schedulability analysis

Ø  Bounded worst-case response time

Ø  Low jitter

Ø  Does not require global clock synchronization

q  Indicate “ahead time” in sync message

Ø  Require upper bounds on the response times of all subtasks

Ø  Long average response time

Chenyang  Lu   85  
Release Guard

if CPU never idles since releasing Ji,j;k, release Ji,j;k+1 when

Ø  it receives a sync message from Ji,j;k, or

Ø  at time ri,j;k-1+Pi,

whichever is later



else, release Ji,j;k+1 when

Ø  receiving a sync message from Ji,j;k, or

Ø  when processor becomes idle,

whichever is later.

Improve average response time without affecting schedulability

Chenyang  Lu   86  
 Release Guard Illustrated

T1 (4,2) T2,2 (6,2)

P1 P2
T2,1 (6,2) T3 (6,3)

T1
2 4 6 8 10 12

T2,1
2 4 6 8 10 12
On P1
On P2 g2,2 = 0 g2,2 = 4+6=10 g2,2 = 9 g2,2 = 9+6=15

T2,2
2 4 6 8 10 12
Idle time
Phase of T3
detected
T3
2 4 6 8 10 12

Chenyang  Lu   87  
Non-Assumptions

ü  Do not require worst-case response times of all subtasks

ü  Do not require global clock synchronization

ü  Work best for loosely coupled system!

Chenyang  Lu   88  
Properties of Release Guard

Ø  Enable schedulability analysis

Ø  Bounded worst-case response time

Ø  Does not require global clock synchronization

Ø  Low jitter (if idle rule is not used)

Ø  Improved average response time (if idle rule is used)

Chenyang  Lu   89  
 RG: Middleware Implementation

If current time is earlier than the release guard Tg

Ø  EC I/O thread buffers the event in the release guard queue;

Ø  At Tg, RG thread removes the buffered event from queue and inserts it
into a dispatching lane

EC I/O Dispatching
Thread Thread

Y. Zhang, B. Thrall, S. Torri, C. Gill, C.

Lu, A Real-Time Performance
Comparison of Distributable Threads
and Event Channels, RTAS'05.

RG Thread

Chenyang  Lu   90  
 Score Board: Sync Protocols

Global  
  Analysis   WCRT   ART   Jiper  
State  
Greedy   Hard   H   L   N   H  

MPMP   Y   L   H   Y   L  

RG   Y   L   M/H   N   M/L  

if information about all tasks are available a priori

use RG or MPMP

else


use RG

Chenyang  Lu   91  
End-to-End Scheduling

1.  Task allocation

2.  Synchronization protocol

3.  Subdeadline assignment

4.  Schedulability analysis

Chenyang  Lu   92  
Subdeadline Assignment

Ø  Subdeadline à priority à response time

Ø  Optimal subdeadline assignment is NP-hard

q  Offline: heuristic search

q  Online: simpler heuristics

Chenyang  Lu   93  
Subdeadline Assignment

Ø  Notations

q  Relative deadline Di of task Ti

q  Relative subdeadline Dij of subtask Tij (1 ≤ j ≤ n(i))

Ø  Ultimate Deadline (UD): Dij = Di

q  But some subtasks must finish earlier than the end-to-end deadline!

Chenyang  Lu   94  
More Heuristics

Ø  Proportional Deadline (PD):

Cij
Dij = Di n (i )
∑ k =1
Cik
q  Assign slack proportionally to execution time

Ø  Normalized Proportional Deadline

CijU (Vi , j )
Dij = Di n (i )
∑ k =1
(CikU (Vi ,k ))

q  Assign more slack to subtasks on busier processors

Chenyang  Lu   95  
End-to-End Scheduling

1.  Task allocation

2.  Synchronization protocol

3.  Subdeadline assignment

4.  Schedulability analysis

Chenyang  Lu   96  
Critiques

Ø  1/2 page critiques of research papers

Ø  Submit by 10am before class

Ø  Back-of-envelop comments - NOT whole essays

Ø  Guidelines

q  http://www.cs.wustl.edu/~lu/cse521s/critique.html

Ø  Email Chengjie

q  wu@cse.wustl.edu

q  Subject: [Critique #1] Your Full Name

Ø  Critique #1 due on 10/2

q  The Design and Performance of a Real-time CORBA Event Service

97