515 ​9th International Conference on Electrical and Computer Engineering 20-22 December, 2016, Dhaka,

Bangladesh ​ A ​Modified PWM Technique to Improve

Total Harmonic Distortion of Multilevel Inverter
Shuvankar Podder/" Md Multan Biswas​2 ​and Md, Ziaur Rahman Khan​l
IDepartment of Electrical and Electronic Engineering, Bangladesh University of Engineering and Technology
Dhaka-1205, Bangladesh 2Department of Electrical Engineering, University of South Carolina Columbia, SC
29208, USA Email: *podder.shuvankar@gmail.com
Abstract-In ​this study, a modified carrier is proposed to generate PWM gating signal. Proposed PWM method

reduces ​total harmonic distortion (THD) of the output voltage of inverter up to 5.8% than the traditional

triangular carrier based PWM. Major harmonic components in output voltage are less in
Snl~ ​magnitude when proposed PWM technique is applied to inverter. ​Fundamental component of output

voltage is also higher in proposed PWM method for all modulation index and frequency ratio. Performance of

proposed modified carrier based PWM is evaluated by MA TLAB simulation for single phase 4-cells 9- levels

voc·d ​ Cell n
cascaded H-bridge MLI. Index
​ Terms- ​PWM, Multilevel inverter, THD. ​

~~~
I. INTRODUCTION Multilevel Inverter (MLI) is popular in medium and high voltage application due to its low
rating of switch, low ​dv/dt, ​low rating of output filter. Typical structures of MLI are diode clamped MLI, capacitor
clamp MLI and cascaded H- bridge MLI (CHBMLI) [1]. Most of the applications of CHBMLI involve reactive
power compensation, PV power conversion, UPS, MRI etc. Due to more switches, the control ofMLI is
sophisticated. Usually carrier based PWM and space vector PWM techniques (SVPWM) are used to control
MLI.
For CHBMLI, multi-carrier based sine- PWM (SPWM) is very popular. In SPWM, a set of triangular carrier
signals are compared with a reference signal. For m-Ievel inverter, (m-l) carrier signals are needed. Multicarrier
PWM technique can be categorized broadly in Level- shifted PWM (LS PWM) and Phase-shifted PWM (PS
PWM) depending on the arrangement of carrier signals. In conventional multicarrier LS-PWM, a set of
triangular carriers with same amplitude ​Aeand f​ requency ​ie a ​ re shifted along vertically. These set of carriers are
disposed in such a way so that the band they occupy are contiguous. The reference waveform is centred in the
middle of the carrier set when over-modulation is not considered. According to different methods of disposing
the carriers set, LS-PWM is of three types. These are In Phase Disposition (IPD), Alternative Phase Opposition
Disposition (AOPD) and Opposite Phase Disposition (OPD). In PS PWM all the triangular carriers have the
same frequency and amplitude but carriers are phase shifted [2].
Carrier based MLI are discussed more in [2-4]. In studies [5-6] SVPWM for MLI are discussed. Babaei et el
[7-8] introduces a novel MLI where look-up table is used to control MLI by FPGA. In this study, a new carrier
based PWM technique is proposed for CHBMLI. The proposed carrier based PWM reduces total harmonic
distortion (THD) and major harmonic components of the output voltage significantly. MATLAB simulation is
used to investigate the performance of proposed modified carrier based PWM.
978-1-5090-2963-1/16/$31.00 ©2016 IEEE
V​DCI ​+ ​VOl ​+ +​ ​V​DC2 ​V​02 ​I ​I I
(a) (b) Fig. I (a) H-bridge stmcture in a single cell. (b) General topology ofn-cells CHBMLI
II. CASCADED H-BRIDGE MULTILEVEL INVERTER Figure lea) shows the H-bridge structure. Multiple H-
bridges are connected in series in CHBMLI. Figure l(b) shows the general topology of n-cell CHBMLI. The
output voltage of the n-cell MLI is given by
If all the DC voltage sources in CHBMLI is V DC, then by controlling the switching devices of H-bridge cell, the
output voltage obtained are +nVDC, +(n-l)VDc, +(n-2)VDC , ...... +2VDC, +VDC, 0, - VDC, -2VDC, ..... ,
-(n-l)VDc, - nVDC' So for n-cell CHBMLI, maximum m-Ievel of output voltage can be obtained where
m =​ ​2n+l (2) In this study, 4 cells 9 levels CHBMLI is considered to compare the performance of proposed PWM
technique with the conventional technique.
III. TRADITIONAL LS-PWM Traditional triangular carriers based In Phase Disposed Level Shifted PWM (IPD
LS-PWM) is shown in figure 2. For 4 cells 9 levels CHBMLI, 8 triangular carriers are compared with the
sinusoidal reference signal to generate sine PWM signals. When the reference signal is greater than the carrier
signal then the active device corresponding to that carrier signal is switched on. In m-Ievels inverter, for
constant frequency carrier based LS-PWM, the amplitude modulation Ma and frequency ratio ​M ​= ​M​f ​are

defined as
Am (3) ​a ​(m - l)Ac
(4)
Fig 2. Sinusoidal reference signal and triangular carrier set (calTiers are in lPD mode) for 9-levels CHBMLl (M,=15 and Ma=O.9).
Where,Am, Ac are the amplitude of reference signal and carrier signal respectively and fm , fc are the
frequency of reference signal and carrier signal respectively.
IV. PROPOSED PWM TECHNIQUE In CHBMLI, the DC voltages of individual cells are added up to yield a
desired output voltage. The objective of MLI is to generate a output voltage that is similar to sine wave. The
more the output voltage is similar to sine wave, the less will be the calculated THD. Switching of the H-bridge
gives a time sampled DC voltage at the output of each cell. For 4-cells MLI, the output voltage Vo(t) can be
written as
Where, Tsw is the considered time, V​DC1 ​(t)-V​DC4 ​(t) are DC input voltage of individual cell and T​J​-T​4 ​are output
time of four cells within that considered time. In this study input voltage is V D​ C ​for each cell. These V ​ ​DCi ​Tj​
terms are called volt-sec output.
In conventional triangular carrier based SPWM, for a particular carrier frequency, the volt-sec output from a
H- bridge cell is fixed. If the duration of this volt-sec output can be made smaller, then the output of CHBMLI
becomes closer to the target AC voltage. For conventional triangular PWM, the volt-sec can be made smaller
by increasing carrier frequency.
0.002 0.004 0.006 0.008 0.01 0.012 0.014 0.016 0.018 0.02
Fig. 3 Proposed calTier signal (red colour). Two sets oflevel shifted triangulal' calTier (blue colour) are used to generate proposed calTier
signal. Two cycles of proposed modified carrier is displayed.
516
But it will be seen in next section that, increasing ​M​f ​does not improve THD after a certain level. To solve the
problem a modification in carrier is proposed.
The original triangular carrier signal of amplitude ​Ac i​ s divided into three equal parts. The modified carrier is
made symmetrical to minimize the harmonic [9]. Figure 3 shows the proposed carrier signal.
Figure 4 illustrates how proposed modified carriers improve output voltage. In T C​ I, ​desired output voltage is
sinusoidal and increasing (green colour). In the time T c], average output voltage is zero in figure 4(b) and
this is a finite value in figure 4(a). In figure 4(a), as +V​DC ​volt-sec output portion exists in the output voltage
during T c], the average output is finite here. So, in time T c], the waveform deviation of output voltage
obtained from traditional PWM is larger from the output voltage obtained from the proposed PWM. In time T
 volt-sec is + 2V ​DC ​one time and the rest is + V ​DC ​in figure 4(b) while output volt-sec is + 2V ​DC ​two
C2, ​output

times in figure 4(a). So, similarly, it can be shown that the waveform deviation of output voltage obtained
from proposed PWM is less than that obtained from traditional PWM. In time T​C3 , ​although the output voltage
is almost similar in figure 4(a) and 4(b), the output voltage from proposed PWM becomes more close to
desired AC voltage for higher carrier frequency. Thus the proposed PWM generates less deviated output
voltage from the target AC sinusoidal voltage and therefore reduce THD.
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2

0.1 ​0 0.002 0.004 0.006 0.008

​ ig. 4 (a) Sinusoidal reference (green colour), proposed calTier set (blue colour) and output voltage (red colour) for two-cells
0.01 ​Tel F
CHBMLI (M,=l0 and Ma=O.9).
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2

0.1 ​0 0.002 0.004 0.006 0.008 0.01 ​TCl

Fig. 4 (b) Sinusoidal reference (green colour), conventional triangulal' calTier set (blue colour) and output voltage (red colour) for two-cells
CHBMLl (M,=l0 and Ma=O.9)
v. ​SIMULATION RESULT ​Performance of proposed multi carrier PWM technique is compared with the conventional
triangular carrier PWM technique for a 4-cells 9 levels single phase CHBMLI. Performance is compared in terms
of
(1) Output voltage waveform (2)THD and (3) Harmonic spectrum. Figure 5(a) and 5(b) show the output voltage
comparison for conventional and proposed PWM. IPD LSPWM is considered here. In both cases, amplitude
modulation Ma =​ ​0.9 and frequency ratio M​f ​= ​2l. In figure 5(a), at proposed PWM, the volt-sec output at a particular
time is divided into smaller part than the volt-sec output in conventional PWM as shown in figure 5(b). Smaller
volt-sec output is desired to reduce THD.
Total harmonic distortion is the measurement of harmonics present in the particular signal. ​It ​is defined as the
ratio of sum of powers of all harmonic components to the power of the fundamental frequency. THD is expressed
as

vi ​+ ​vi +​ ​vi ​
THD ​= ​ vi
​ J​
+ ...... + v
(6)

Here ​Vn i​ s the root mean square (RMS) magnitude of the nth order harmonic component. Power contained in a
harmonic component is proportional to the square of the RMS magnitude of that component.
Figure 6(a) ​& ​6(b) show the THD comparison for proposed and conventional carrier based PWM where carriers
set are in IPD mode. Here two amplitude modulation are considered; Ma =​ ​0.85 and Ma =​ ​l. For these two Ma,

frequency modulation M​f ​is varied from 3 to 51 with triple harmonic. From
​ figure 6, it is evident that proposed
modified carrier based PWM gives better THD performance than conventional PWM for all M​f . ​THD of output
0.85 ​
voltage in both PWM techniques is lowest around M​f =​ ​9 in both cases ofMa =​ ​ and Ma ​= ​l. ​It ​is found from the
figures that at high M​f​, T
​ HD does not vary noticeably which is mentioned previously. THD can be reduced by

increasing Ma; though the maximum limit of Ma is 1. In MLI, THD can be reduced significantly by increasing the
number of level of output voltage. But increasing the number of level requires more complex control of inverter.
300

P' 200 ​
​ ~ ​100

·2 ​:::i! ​ .a ​"C <I>

​ ​
Cl ​ca ​0 ​-100 -200
-300
o
Output Voltage (At proposed PWM)
0.005 0.01
Time ​(5)
0.015 0.02
Fig. 5(a) Output voltage of 4-cells 9-levels CHBMLI at proposed PWM (Mf=21 and Ma=0.9)
517
0.02
Fig. 5(b) Output voltage of 4-cells 9-levels CHBMLI at traditional triangular carrier based PWM (Mf=21 and Ma =0.9)
So there exists a trade-off between the number of levels and desired THD of output voltage. IEEE standard for
the THD of output current from inverter is less than 5%. To meet this requirement, usually LCL second order filter
is used for grid connected inverter. In [10-11], design of LCL filter for grid connected inverter is discussed in
details.
14
13.5

~ ​13 ​::c ​C I- ​12.5 ​12

~​

Output Voltage (At traditional PWM)

300

P' 200
​ ​
~ ​100 ​.a ​·2 ​"C ​:::i! <I>
​ ​Cl ​ca ​0 ​-100 -200

-300 ​
o
0.005 0.01
Time ​(5)
0.015

---+-- ​
​
--+-- Triangular ​Proposed Carrier Carrier
​ ​
with with
​ ​M. M
​ ​1 1​ ​
​ a ​= = 11.5L---~----~----~----~----~----~----~--~ ​
o ​5 ​10 ​15 ​20 ​25 ​30 35 Frequency
​ ratio M ​f

Fig. 6(a) Comparison ofTHD of output voltage from a 4-cells CHBMLI at traditional PWM (blue colour) and proposed PWM (red colour)
with varying Mf(Ma =1)
17.5 ​17
16.5
~ ​16

i= C​ ​15.5 ​15
14.5
40
Fig. 6(b) Comparison ofTHD of output voltage from a 4-cells CHBMLI at traditional PWM (blue colour) and proposed PWM (red colour)
with varying Mf (Ma =0.85)
_ Triangular Carrier with Ma ​= ​0.85
_ Proposed Carrier with Ma ​= ​0.85

14L---~----~----~--~----~----~--~----~ ​
o ​5 ​10 ​15 ​20 ​25 ​30 35 ​40
Frequency Ratio, M ​f
518
Figure 7(a) and 7(b) show the harmonic spectra of output
TABLE I ​voltage for proposed and conventional PWM techniques. For
COMPARISON OF MAJOR HARMONIC COMPONENTS ​both case ​Ma =​ ​0.95 and ​Mf​ ​= ​2l. Input voltage of each cell is
Harmonics Traditional Proposed considered 100 V. Major harmonic components of output voltage obtained
from traditional triangular carrier based modulation and proposed modified carrier based modulation is shown
in table 1. From the table, it is evident that at proposed modified carrier based PWM; all major harmonics are
less in magnitude. Again magnitude of fundamental

Fundamental 3TQ (% of Fundamental) 5​th ​(% of Fundamental) ​i 1​ ​(% of Fundamental) 9​

​ (% of Fundamental)
th ​

380.1 385.3 0.452 0.295 0.767 0.400 ​1.289 1.381 0.75

​ 0.68
component is 1.4% higher in proposed technique. Harmonic component at carrier frequency has the
maximum amplitude. So position of largest harmonic can be made further from fundamental component by
increasing the carrier frequency. Here single phase CHBMLI is considered. In case of three phase inverter,
harmonic contents in output voltage become further less in magnitude. Magnitude of the fundamental
component can be increased if over-modulation is adapted [12-13]. In three phase inverter, fundamental
component can be increased up to 15% without over-modulation by adding a third harmonic voltage to the
reference sinusoidal signal [13]. Reduction of magnitude of all major harmonic components can lead to
reduce the rating of output LCL filter up to 10% [10].
Fundamental (50Hz) ​ = ​385.3 , ​THO= ​12.94%
VI. ​CONCLUSIONS ​A modified carrier signal is proposed to generate gating signal for CHBMLI. The proposed
modification in carrier signal results in less THD in output voltage than conventional method. Reduction in
THD makes output voltage near sinusoidal and so the size of output filter reduces. One limitation of proposed
PWM technique is that this method increases the switching frequency. The number of switching can be
reduced by varying the frequency of the carriers in different level of LS PWM carrier arrangement instead of
using constant frequency throughout the carrier band. But for constant frequency carrier set, this proposed
modulation technique provides superior performance in harmonic elimination task which is the prime concern
in this study. ​12 ​10
[1]

]i ​
-​ "tI ​LL I: ​"' ​I: ​Q) ​E :​ ::I ​0 ​8

[2]

6 [3]
​

~ ​0 ​::E "' ​Cl 4​ ​[4]

​

[5]
REFERENCES Rodriguez, J., Lai, J.-S., Zheng Peng, ​F.: ​'Multilevel inverters; a survey of topologies, controls, and applications', ​iEEE
Trans. indo Electronics. ​vo1.49, no. 4, pp.724-738, November 2002. ​L. ​M. Tolbert, and T. G. Habetler, "Novel multilevel inverter
carrier- based PWM method," ​IEEE Trans. Ind. Application., ​vol. 35, no. 5, pp.1098-1107,September/October 1999. B ​ . ​P. McGrath, D.
G. Holmes, "MulticalTier PWM strategies for multilevel invelters," ​IEEE Trans. Ind. Electronics., v​ ol. 49, no. 4, pp.858-867, August
2002. P. Palanivel S.S. Dash, "Analysis of THO and output voltage performance for cascaded multilevel inverter using carrier pulse
width modulation technique," ​iET Power Electron., ​vol. 4, Iss. 8, pp. 951- 958, 201 ​l. ​D. Zhao, V.S.S.P.K. Hari, G. Narayanan, and R.
o ​500 1000 1500 2000 2500 3000 3500 4000
Ayyanar," Space- Vector-Based hybrid pulsewidth modulation techniques for reduced ​
Freauencv {Hz}
harmonic distortion and switching loss," ​IEEE Tran.on Power Electronics, v​ ol. 25, no. 3, pp. 760-774, March 2010. Fig.7(a) Hmmonic
spectra of output voltage of4-cells CHBMLI at proposed PWM [6] (Mf=21, Ma=0.95, magnitude offundamental=385.3V THD=12.94%)
G. Nm'ayanan, D. Zhao, H. K ​ . ​KrishnamUlthy, R. Ayyanm', and V
​ . ​T. ​Ranganathan," Space vector based hybrid PWM techniques for
 ​ ol. 55, no. 4, pp. 1614-1627, April 2008.
reduced CUtTent ripple," ​IEEE Trans .on Industrial Electronics, V

8​
-​ 1ij6 ​I: ​Q) ​7 ​~ ​5 ​
.t4 "tI​ ​I: ​'0 ​~3

​ ​
::E2 Cl
​
"' Fundamental (50Hz) ​= ​380.1 , ​THO= 1
​ 5.2%

o L....lUIJUIJUIJUIJIllJIllJIllJlU. ​
o ​500 1000 1500 2000 2500
Freauencv {Hz}
Fig. 7(b) Hannonic spectra of output voltage of 4-cells CHBMLI at triangular calTier based PWM (Mf=21, Ma=0.95, magnitude
offundamental=380.1 V THD=15.2%)
[7]
E. Babaei, S. Alilu , S. ​L. ​A Karnik, "A New General Topology for Cascaded Multilevel Invelters With Reduced Number of Components
Based on Developed H-Bridge," ​iEEE Trans. on industrial Electronics, v​ ol.61 , no. 8, pp. 3932-3939, October, 2013. ​[8]
E. Babaei, "A cascade multilevel converter topology with reduced number of switches," ​iEEE Trans. Power Electron, ​vol. 23, no. 6, pp.
2657-2664, November 2008 ​[9]
Holmes D.G., Lipo T.A. (2003). "Pulse Width Modulation for Power ConveJters Principles and Practice." IEEE SeJ"ies on Power
Engineering, John Wiley & ​ ​Sons, Inc. [10]
Renzhong X ​ .; ​Lie X
​ .; ​Junjun Z.; Jie D., "Design and research on the LCL Filter in three-phase PV grid-connected inverters,"
international Journal oj' Computer and Electrical Engineering, ​vol. 5, No.3, June 2013 ​[11]
​ ​Zha, Y
F Liu, X ​ ​Zhou, S Duan, "Design and research on pm'mneleJ' of LCL filteJ' in three-phase grid-connected inveJteJ'" ​Power
Electronics and Motion Control Conference, 2 ​ 009. IPEMC '09. IEEE 6th InteJllational [12]
Ram6n CaceJ'es, Ivo Bm'bi, "A boost DC-AC conveJteJ': analysis,
300t
design, and experimentation" ​IEEE Trans. Power Electron, v​ ol. 14, no. 1, pp. 134-141,January 1999. [13]
A Elserougi, AS. Abdel-Khalik, A Massoud, S. Ahmed, "Studying the effect of over-modulation on the output voltage of three-phase
single-stage gt"id-connected boost inverter" ​Alexandria Engineering Journal, ​vol. 52, no. 3, pp. 347-358, SeptembeJ' 2013.