Provisional Grade History

Register No. 17MVD0018

Name PANKHANIA JIGAR JAYESHKUMAR
Program M.Tech. - VLSI Design
School SENSE - School of Electronics Engineering

Grade History
Course Credits Grade Result Declared Course Course
Sl.No Course Code Course Title Exam Month
Type On Option Distrib
ution

1 ECE5015 Digital IC Design ETP 4 B Nov-2017 11-Dec-2017 NIL PC

2 ECE5016 Analog IC Design ETL 4 B Nov-2017 11-Dec-2017 NIL PC

3 ECE5017 Digital Design with FPGA ETLP 4 A Nov-2017 11-Dec-2017 NIL PC

4 ECE5018 Physics of VLSI Devices TH 3 B Nov-2017 11-Dec-2017 NIL PC

Computer Aided Design

5 ECE5019 TH 3 A Nov-2017 11-Dec-2017 NIL PE
for VLSI

Advanced Computer
6 MAT5009 TH 3 A Nov-2017 11-Dec-2017 NIL UC
Arithmetic

Science, Engineering and

7 SET5001 PJT 2 A Nov-2017 19-Jan-2018 NIL UC
Technology Project - I

Essentials of Business
8 STS5001 SS 1 B Nov-2017 19-Dec-2017 NIL UC
Etiquettes

9 ECE5014 ASIC Design ETL 4 A Apr-2018 14-May-2018 NIL PC

Scripting Languages and

10 ECE5021 ETL 4 B Apr-2018 14-May-2018 NIL PE
Verification

Memory Design and

11 ECE5023 TH 3 B Apr-2018 09-May-2018 NIL PE
Testing

VLSI Testing and

12 ECE5029 TH 3 A Apr-2018 16-May-2018 NIL PE
Testability

13 ECE6025 Low Power IC Design ETP 3 A Apr-2018 14-May-2018 NIL PE

14 ECE6026 Mixed Signal IC Design ETP 3 A Apr-2018 14-May-2018 NIL PE

15 GER5001 Deutsch fuer Anfaenger TH 2 B Apr-2018 09-May-2018 NIL UC

Science, Engineering and

16 SET5002 PJT 2 A Apr-2018 19-May-2018 NIL UC
Technology Project - II

17 STS5002 Preparing for Industry SS 1 B Apr-2018 18-May-2018 NIL UC

18 ECE5024 IC Technology TH 3 C Jul-2018 12-Jul-2018 NIL PE

19 ECE5025 System-on-Chip Design TH 3 B Jul-2018 16-Jul-2018 NIL PE

20 ECE6099 Masters Thesis PJT 16 A Apr-2019 24-May-2019 NIL UC

N1 : Student fails to clear one or more components of a course

Note : eGenerated Doc - To be verified with Institution for Authenticity
Page 1 of 2 30-May-2019 15:05:56 PM
 Provisional Grade History
Register No. 17MVD0018
Name PANKHANIA JIGAR JAYESHKUMAR
Program M.Tech. - VLSI Design
School SENSE - School of Electronics Engineering

N2 : Student who has been debarred due to lack of attendance

N3 : Student who has been absent in the Final Assessment Test
N4 : Student debarred in Final Assessment Test due to indiscipline/malpractice

Curriculum Details
Curriculum Distribution Type Credits Required Credits Earned
Programme Core 19 19
University Core 27 27
Programme Elective 18 25
University Elective 6 0
Basket Course - 0
Total Credits 70 71

Basket Details
Basket Title Distribution Type Credits Required Credits Earned
Soft Skills M.Tech. UC 2 2
English and Foreign Language UC 2 2

CGPA Details
Credits Credits CGPA S Grades A Grades B Grades C Grades D Grades E Grades F Grades N Grades
Registered Earned
71 71 8.56 0 10 9 1 0 0 0 0

Note : eGenerated Doc - To be verified with Institution for Authenticity

Page 2 of 2 30-May-2019 15:05:56 PM