Beruflich Dokumente
Kultur Dokumente
Description Package
The SCM1200MF series are high voltage three-phase SCM (pin pitch: 1.27 mm, mold dimensions: 47 × 19 × 4.4 mm)
motor driver ICs in which transistors, pre-driver ICs
(MICs), and bootstrap circuits (diodes and resistors) are
highly integrated. These products can run on a
three-shunt current detection system and optimally
control the inverter systems of medium-capacity motors
that require universal input standards.
7
VB1
31 ● Refrigerator compressor motor
CBOOT1
8 HS1
LS2 30
● Air conditioner compressor motor
9
FO2
● Washing machine main motor
10 OCP2
LIN2 11 LIN2 V
● Fan motor
MIC2
HIN2
12 COM2
13 HIN2
29 M
● Pump motor
14 VCC2
Controller
28
15
VB2
16 HS2
CBOOT2 LS3
27
FO3
17
18 OCP3
LIN3 19 LIN3
MIC3 W 26
20 COM3
HIN3 21 HIN3
22 VCC3
VBB VDC
25
23
VB3
24 HS3
CBOOT3
A/D3
RO3
A/D2
RO3
A/D1
RO1
CO1 CO2 CO3
COM
RS3 RS2 RS1
CONTENTS
Description ------------------------------------------------------------------------------------------------------ 1
CONTENTS ---------------------------------------------------------------------------------------------------- 2
1. Absolute Maximum Ratings ----------------------------------------------------------------------------- 4
2. Recommended Operating Conditions ----------------------------------------------------------------- 5
3. Electrical Characteristics -------------------------------------------------------------------------------- 6
3.1. Characteristics of Control Parts------------------------------------------------------------------ 6
3.2. Bootstrap Diode Characteristics ----------------------------------------------------------------- 7
3.3. Thermal Resistance Characteristics ------------------------------------------------------------- 7
3.4. Transistor Characteristics ------------------------------------------------------------------------- 8
3.4.1. SCM1261MF ----------------------------------------------------------------------------------- 8
3.4.2. SCM1242MF ----------------------------------------------------------------------------------- 9
3.4.3. SCM1263MF ----------------------------------------------------------------------------------- 9
3.4.4. SCM1243MF --------------------------------------------------------------------------------- 10
3.4.5. SCM1265MF --------------------------------------------------------------------------------- 10
3.4.6. SCM1245MF --------------------------------------------------------------------------------- 11
3.4.7. SCM1256MF --------------------------------------------------------------------------------- 11
3.4.8. SCM1246MF --------------------------------------------------------------------------------- 12
4. Mechanical Characteristics --------------------------------------------------------------------------- 13
5. Insulation Distance -------------------------------------------------------------------------------------- 13
6. Truth Table ----------------------------------------------------------------------------------------------- 14
7. Block Diagram ------------------------------------------------------------------------------------------- 15
8. Pin-out Diagram ----------------------------------------------------------------------------------------- 16
9. Typical Applications ------------------------------------------------------------------------------------ 17
10. External Dimensions ------------------------------------------------------------------------------------ 19
10.1. LF2552----------------------------------------------------------------------------------------------- 19
10.2. LF2557 (Long Lead Type) ----------------------------------------------------------------------- 20
10.3. LF2558 (Wide Lead-Forming Type) ----------------------------------------------------------- 21
10.4. Recommended PCB Hole Size ------------------------------------------------------------------ 22
11. Marking Diagram --------------------------------------------------------------------------------------- 22
12. Functional Descriptions -------------------------------------------------------------------------------- 23
12.1. Turning On and Off the IC ---------------------------------------------------------------------- 23
12.2. Pin Descriptions ----------------------------------------------------------------------------------- 23
12.2.1. U, V, and W----------------------------------------------------------------------------------- 23
12.2.2. VB1, VB2, and VB3 ------------------------------------------------------------------------- 23
12.2.3. HS1, HS2, and HS3 ------------------------------------------------------------------------- 24
12.2.4. VCC1, VCC2, and VCC3 ------------------------------------------------------------------ 24
12.2.5. COM1, COM2, and COM3---------------------------------------------------------------- 24
12.2.6. HIN1, HIN2, HIN3, LIN1, LIN2, and LIN3 -------------------------------------------- 25
12.2.7. VBB -------------------------------------------------------------------------------------------- 25
12.2.8. LS1, LS2, and LS3 -------------------------------------------------------------------------- 26
12.2.9. OCP1, OCP2, and OCP3------------------------------------------------------------------- 26
12.2.10. FO1, FO2, and FO3 ------------------------------------------------------------------------- 26
12.3. Protection Functions ------------------------------------------------------------------------------ 27
12.3.1. Fault Signal Output ------------------------------------------------------------------------- 27
12.3.2. Shutdown Signal Input --------------------------------------------------------------------- 27
12.3.3. Undervoltage Lockout for Power Supply (UVLO) ----------------------------------- 28
12.3.4. Overcurrent Protection (OCP) ----------------------------------------------------------- 28
12.3.5. Simultaneous On-state Prevention ------------------------------------------------------- 30
12.3.6. Thermal Shutdown (TSD) ----------------------------------------------------------------- 30
(1)
Should be derated depending on an actual case temperature. See Section 15.4.
(2)
Refers to a case temperature measured during IC operation.
(3)
Refers to the junction temperature of each chip including its built-in controller ICs (MICs), transistors, and
freewheeling diodes.
(4)
Refers to voltage conditions to be applied between the case and all pins. All pins have to be shorted.
3. Electrical Characteristics
● Current polarities are defined as follows: a current flow going into the IC (sinking) is positive current (+); and a
current flow coming out of the IC (sourcing) is negative current (−).
● Unless specifically noted, TA = 25°C, VCC = 15 V.
(1)
Refers to a case temperature at the measurement point described in Figure 3-1, below.
(2)
Refers to steady-state thermal resistance between the junction of the built-in transistors and the case. For transient
thermal characteristics, see Section 15.1.
(3)
Refers to steady-state thermal resistance between the junction of the built-in freewheeling diodes and the case.
24 1
15 33
Measurement point
IN
trr
toff
ton
td(off) tf
td(on) tr
VDS 90% 90%
ID 10% 10%
3.4.1. SCM1261MF
Characteristics Symbol Conditions Min. Typ. Max. Unit
Collector-to-Emitter Leakage Current ICES VCE = 600 V, VIN = 0 V − − 1 mA
Collector-to-Emitter Saturation
VCE(SAT) IC = 10 A, VIN = 5 V - 1.7 2.2 V
Voltage
Emitter-to-Collector Diode Forward
VF IF = 10 A,VIN = 0 V - 1.7 2.2 V
Voltage
High-side Switching
Emitter-to-Collector Diode Reverse
trr − 85 − ns
Recovery Time
Turn-On Delay Time td(on) VDC = 300 V, IC = 10 A, − 700 − ns
inductive load,
Rise Time tr VIN = 0→5 V or 5→0 V, − 100 − ns
Turn-Off Delay Time td(off) Tj = 25°C − 1070 − ns
Fall Time tf − 90 − ns
Low-side Switching
Emitter-to-Collector Diode Reverse
trr − 105 − ns
Recovery Time
Turn-On Delay Time td(on) VDC = 300 V, IC = 10 A, − 710 − ns
inductive load,
Rise Time tr VIN = 0→5 V or 5→0 V, − 120 − ns
Turn-Off Delay Time td(off) Tj = 25°C − 1010 − ns
Fall Time tf − 95 − ns
3.4.2. SCM1242MF
Characteristics Symbol Conditions Min. Typ. Max. Unit
Collector-to-Emitter Leakage Current ICES VCE = 600 V, VIN = 0 V − − 1 mA
Collector-to-Emitter Saturation
VCE(SAT) IC = 15 A, VIN = 5 V - 1.7 2.2 V
Voltage
Emitter-to-Collector Diode Forward
VF IF = 15 A,VIN = 0 V - 1.75 2.2 V
Voltage
High-side Switching
Emitter-to-Collector Diode Reverse
trr − 80 − ns
Recovery Time
Turn-On Delay Time td(on) VDC = 300 V, IC = 15 A, − 700 − ns
inductive load,
Rise Time tr VIN = 0→5 V or 5→0 V, − 100 − ns
Turn-Off Delay Time td(off) Tj = 25°C − 1300 − ns
Fall Time tf − 90 − ns
Low-side Switching
Emitter-to-Collector Diode Reverse
trr − 90 − ns
Recovery Time
Turn-On Delay Time td(on) VDC = 300 V, IC = 15 A, − 700 − ns
inductive load,
Rise Time tr VIN = 0→5 V or 5→0 V, − 130 − ns
Turn-Off Delay Time td(off) Tj = 25°C − 1230 − ns
Fall Time tf − 90 − ns
3.4.3. SCM1263MF
Characteristics Symbol Conditions Min. Typ. Max. Unit
Collector-to-Emitter Leakage Current ICES VCE = 600 V, VIN = 0 V − − 1 mA
Collector-to-Emitter Saturation
VCE(SAT) IC = 15 A, VIN = 5 V - 1.7 2.2 V
Voltage
Emitter-to-Collector Diode Forward
VF IF = 15 A,VIN = 0 V - 1.75 2.2 V
Voltage
High-side Switching
Emitter-to-Collector Diode Reverse
trr − 80 − ns
Recovery Time
Turn-On Delay Time td(on) VDC = 300 V, IC = 15 A, − 700 − ns
inductive load,
Rise Time tr VIN = 0→5 V or 5→0 V, − 100 − ns
Turn-Off Delay Time td(off) Tj = 25°C − 1300 − ns
Fall Time tf − 90 − ns
Low-side Switching
Emitter-to-Collector Diode Reverse
trr − 90 − ns
Recovery Time
Turn-On Delay Time td(on) VDC = 300 V, IC = 15 A, − 700 − ns
inductive load,
Rise Time tr VIN = 0→5 V or 5→0 V, − 130 − ns
Turn-Off Delay Time td(off) Tj = 25°C − 1230 − ns
Fall Time tf − 90 − ns
3.4.4. SCM1243MF
Characteristics Symbol Conditions Min. Typ. Max. Unit
Collector-to-Emitter Leakage Current ICES VCE = 600 V, VIN = 0 V − − 1 mA
Collector-to-Emitter Saturation
VCE(SAT) IC = 15 A, VIN = 5 V - 1.7 2.2 V
Voltage
Emitter-to-Collector Diode Forward
VF IF = 15 A,VIN = 0 V - 1.75 2.2 V
Voltage
High-side Switching
Emitter-to-Collector Diode Reverse
trr − 70 − ns
Recovery Time
Turn-On Delay Time td(on) VDC = 300 V, IC = 15 A, − 600 − ns
inductive load,
Rise Time tr VIN = 0→5 V or 5→0 V, − 70 − ns
Turn-Off Delay Time td(off) Tj = 25°C − 620 − ns
Fall Time tf − 60 − ns
Low-side Switching
Emitter-to-Collector Diode Reverse
trr − 80 − ns
Recovery Time
Turn-On Delay Time td(on) VDC = 300 V, IC = 15 A, − 600 − ns
inductive load,
Rise Time tr VIN = 0→5 V or 5→0 V, − 100 − ns
Turn-Off Delay Time td(off) Tj = 25°C − 600 − ns
Fall Time tf − 70 − ns
3.4.5. SCM1265MF
Characteristics Symbol Conditions Min. Typ. Max. Unit
Collector-to-Emitter Leakage Current ICES VCE = 600 V, VIN = 0 V − − 1 mA
Collector-to-Emitter Saturation
VCE(SAT) IC = 20 A, VIN = 5 V - 1.7 2.2 V
Voltage
Emitter-to-Collector Diode Forward
VF IF = 20 A,VIN = 0 V - 1.9 2.4 V
Voltage
High-side Switching
Emitter-to-Collector Diode Reverse
trr − 80 − ns
Recovery Time
Turn-On Delay Time td(on) VDC = 300 V, IC = 20 A, − 780 − ns
inductive load,
Rise Time tr VIN = 0→5 V or 5→0 V, − 120 − ns
Turn-Off Delay Time td(off) Tj = 25°C − 1150 − ns
Fall Time tf − 90 − ns
Low-side Switching
Emitter-to-Collector Diode Reverse
trr − 85 − ns
Recovery Time
Turn-On Delay Time td(on) VDC = 300 V, IC = 20 A, − 810 − ns
inductive load,
Rise Time tr VIN = 0→5 V or 5→0 V, − 170 − ns
Turn-Off Delay Time td(off) Tj = 25°C − 1100 − ns
Fall Time tf − 90 − ns
3.4.6. SCM1245MF
Characteristics Symbol Conditions Min. Typ. Max. Unit
Collector-to-Emitter Leakage Current ICES VCE = 600 V, VIN = 0 V − − 1 mA
Collector-to-Emitter Saturation
VCE(SAT) IC = 20 A, VIN = 5 V - 1.7 2.2 V
Voltage
Emitter-to-Collector Diode Forward
VF IF = 20 A,VIN = 0 V - 1.9 2.4 V
Voltage
High-side Switching
Emitter-to-Collector Diode Reverse
trr − 75 − ns
Recovery Time
Turn-On Delay Time td(on) VDC = 300 V, IC = 20 A, − 695 − ns
inductive load,
Rise Time tr VIN = 0→5 V or 5→0 V, − 95 − ns
Turn-Off Delay Time td(off) Tj = 25°C − 675 − ns
Fall Time tf − 55 − ns
Low-side Switching
Emitter-to-Collector Diode Reverse
trr − 115 − ns
Recovery Time
Turn-On Delay Time td(on) VDC = 300 V, IC = 20 A, − 715 − ns
inductive load,
Rise Time tr VIN = 0→5 V or 5→0 V, − 135 − ns
Turn-Off Delay Time td(off) Tj = 25°C − 670 − ns
Fall Time tf − 50 − ns
3.4.7. SCM1256MF
Characteristics Symbol Conditions Min. Typ. Max. Unit
Collector-to-Emitter Leakage Current ICES VCE = 600 V, VIN = 0 V − − 1 mA
Collector-to-Emitter Saturation
VCE(SAT) IC = 30 A, VIN = 5 V - 1.7 2.2 V
Voltage
Emitter-to-Collector Diode Forward
VF IF = 30 A,VIN = 0 V - 1.9 2.4 V
Voltage
High-side Switching
Emitter-to-Collector Diode Reverse
trr − 70 − ns
Recovery Time
Turn-On Delay Time td(on) VDC = 300 V, IC = 30 A, − 760 − ns
inductive load,
Rise Time tr VIN = 0→5 V or 5→0 V, − 130 − ns
Turn-Off Delay Time td(off) Tj = 25°C − 1260 − ns
Fall Time tf − 90 − ns
Low-side Switching
Emitter-to-Collector Diode Reverse
trr − 80 − ns
Recovery Time
Turn-On Delay Time td(on) VDC = 300 V, IC = 30 A, − 770 − ns
inductive load,
Rise Time tr VIN = 0→5 V or 5→0 V, − 160 − ns
Turn-Off Delay Time td(off) Tj = 25°C − 1200 − ns
Fall Time tf − 90 − ns
3.4.8. SCM1246MF
Characteristics Symbol Conditions Min. Typ. Max. Unit
Collector-to-Emitter Leakage Current ICES VCE = 600 V, VIN = 0 V − − 1 mA
Collector-to-Emitter Saturation
VCE(SAT) IC = 30 A, VIN = 5 V - 1.7 2.2 V
Voltage
Emitter-to-Collector Diode Forward
VF IF = 30 A,VIN = 0 V - 1.9 2.4 V
Voltage
High-side Switching
Emitter-to-Collector Diode Reverse
trr − 60 − ns
Recovery Time
Turn-On Delay Time td(on) VDC = 300 V, IC = 30 A, − 660 − ns
inductive load,
Rise Time tr VIN = 0→5 V or 5→0 V, − 110 − ns
Turn-Off Delay Time td(off) Tj = 25°C − 700 − ns
Fall Time tf − 50 − ns
Low-side Switching
Emitter-to-Collector Diode Reverse
trr − 70 − ns
Recovery Time
Turn-On Delay Time td(on) VDC = 300 V, IC = 30 A, − 660 − ns
inductive load,
Rise Time tr VIN = 0→5 V or 5→0 V, − 150 − ns
Turn-Off Delay Time td(off) Tj = 25°C − 690 − ns
Fall Time tf − 50 − ns
4. Mechanical Characteristics
Characteristics Conditions Min. Typ. Max. Unit Remarks
Heatsink Mounting
See footnote below.* 0.588 - 0.784 N∙m
Screw Torque
Flatness of Heatsink
See Figure 4-1. 0 - 200 μm
Attachment Area
Package Weight - 11.8 - g
* When mounting a heatsink, it is recommended to use a metric screw of M3 and a plain washer of 7 mm (φ) together at
each end of it. See Section 13.2 for more details about screw tightening.
Heatsink
Measurement position
-+
-
+
Heatsink
5. Insulation Distance
Characteristics Conditions Min. Typ. Max. Unit Remarks
Clearance Between heatsink* and 2.0 - 2.5 mm
Creepage leads. See Figure 5-1. 3.86 - 4.26 mm
* Refers to when a heatsink to be mounted is flat. If your application requires a clearance exceeding the maximum
distance given above, use an alternative (e.g., a convex heatsink) that will meet the target requirement.
Creepage
Clearance
Heatsink
6. Truth Table
Table 6-1 is a truth table that provides the logic level definitions of operation modes.
In the case where HIN and LIN signals in each phase are high at the same time, the simultaneous on-state prevention
function sets both the high-side and low-side transistors off.
After recovering from a UVLO_VCC condition, the high-side and low-side transistors resume switching according to
the input logic levels of the next HIN and LIN signals (level-triggered).
After recovering from a UVLO_VB condition, the high-side transistors resume switching at the next rising edge of an
HIN signal (edge-triggered).
7. Block Diagram
MIC1
UVLO_VCC UVLO_VB
LS1 33
FO1
1
Drive HO1
2 OCP1 Level shift
circuit
3 LIN1 Input logic
4 COM1 U 32
Simultaneous TSD
5 HIN1 on state
prevention
6 VCC1 Drive LO1
circuit
OCP
31
7
VB1
8 HS1
MIC2
LS2 30
UVLO_VCC UVLO_VB
FO2
9
OCP2 Drive HO2
Level shift
10 circuit
11 LIN2 Input logic
V
12 COM2 29
Simultaneous TSD
13 HIN2 on state
prevention
14 VCC2 Drive LO2
OCP circuit
28
15
VB2
16 HS2
MIC3
LS3
UVLO_VCC UVLO_VB 27
FO3
17
Drive HO3
18 OCP3 Level shift
circuit
19 LIN3 Input logic
20 COM3
W
26
Simultaneous TSD
21 HIN3 on state
prevention
22 VCC3 Drive LO3
OCP circuit
VBB
25
23
VB3
24 HS3
8. Pin-out Diagram
1 Top view
24 1
33
24
25
25 33
9. Typical Applications
CR filters and Zener diodes should be added to your application as needed, so that you can: protect each pin against
surge voltages causing malfunctions; and avoid the IC being used under the conditions exceeding the absolute
maximum ratings, resulting in critical damage to itself. Then test all the pins thoroughly under actual operating
conditions to ensure that your application works flawlessly.
CVCC2 28
VB2 DBOOT2 RBOOT2
15
CBOOT2
16 HS2
CP2 LS3
27
FO3
17
18 OCP3
LIN3 19 LIN3
MIC3 W26
CLIN3 20 COM3
HIN3 21 HIN3
22 VCC3
CHIN3
VBB VDC
CVCC3 25
23
VB3 DBOOT3 RBOOT3
CBOOT3
24 HS3
CP3
RO3
A/D3 CS CDC
RO2
A/D2
RO1
A/D1
CO1 CO2 CO3
COM
DRS3 DRS2 DRS1 RS3 RS2 RS1
VCC VFO
U1 SCM1200MF Series
RFO LS1
33
FO1
INT 1
CFO
2 OCP1
LIN1 3 LIN1
MIC1
CLIN1 4 COM1 U 32
HIN1 5 HIN1
6 VCC1
CHIN1
DZ
CVCC1 31
VB1 DBOOT1 RBOOT1
7
CBOOT1
8 HS1
CP1 LS230
FO2
9
10 OCP2
LIN2 11 LIN2
MIC2 V
CLIN2 12 COM2 29 M
HIN2 13 HIN2
14 VCC2
Controller
CHIN2
CVCC2 28
VB2 DBOOT2 RBOOT2
15
CBOOT2
16 HS2
CP2 LS3
27
FO3
17
18 OCP3
LIN3 19 LIN3
MIC3 W26
CLIN3 20 COM3
HIN3 21 HIN3
22 VCC3
CHIN3
VBB VDC
CVCC3 25
23
VB3 DBOOT3 RBOOT3
CBOOT3
24 HS3
CP3
CS CDC
RO
A/D
CO
COM
DRS RS
10.1. LF2552
0.5 0.5
C C
8xP5.1=40.8
(2.6)
4.4 ±0.3
1.2 ±0.2
+0.5
47±0.3 A 2 0
(Measured at base of pins)
(5゚)
MAX1.2
17.25± 0.5
12.25± 0.5
19± 0.3
11.45± 0.5
15.95± 0.5
φ 3.2± 0.15
(5゚)
B
43.3±0.3 B
2.08±0.2
11.2±0.5
5xP1.27=6.35 5xP1.27=6.35 5xP1.27=6.35
+0.2
-0.1
+0.2
D 0.6 -0.1
(2.6)
0.5
-0.1
+0.2
+0.2
D 2
-0.1
0.5
C-C B-B
-0.1
+0.2
+0.2
-0.1
+0.2
0.5
0.5
D-D
(11.6)
A-A
(38.6)
Unit: mm
0.6 0.6
(0.65)
C C
(2.6)
8xP5.1=40.8
4.4 ±0.3
1.2 ±0.2
+0.2
2 0
47 ±0.3 A
(Measured at base of pins )
)
( 11°
MAX1.2
A
17.25± 0.6
12.25± 0.6
19± 0.3
11.45± 0.6
15.95± 0.6
Φ 3.2± 0.15
0~ 0.5
B
2.08 ±0.2
43.3 ±0.3 B (12°)
0~ 0.5
5xP1.27=6.35 5xP1.27=6.35 5xP1.27=6.35
14 ~14.8
2.57 1.27 3.24 1.27
+0.2
-0.1
+0.2
0.6 -0.1
(2.6)
0.5
0.5 -0.1
+0.2
+0.2
D 2
-0.1
C-C B-B
+0.2
0.5 -0.1
0.5 -0.1
+0.2
+0.2
0.7 -0.1 +0.2
1.2
-0.1
(11.5)
(38.5)
A-A D-D
Unit: mm
0.5 0.5
C C
8xP5.1=40.8
4.4 ±0.3
1.2 ±0.2
+0.5
47 ±0.3 A 2 0
(Measured at base of pins )
(5 °)
MAX1.2
(2°)
A
17.25± 0.5
14.75± 0.5
± 0.3
(13.6)
19
11.45± 0.5
15.95± 0.5
Φ 3.2± 0.15
(1)
B
(5 °)
43.3 ±0.3 B
2.08 ±0.2
11.2 ±0.5
5xP1.27=6.35 5xP1.27=6.35 5xP1.27=6.35
D 0.6 -0.1
(2.6)
+0.2
0.5 -0.1
+0.2
D 2
-0.1
C-C B-B
0.5 -0.1
+0.2
0.5 -0.1
+0.2
+0.2
0.7 +0.2
-0.1 1.2
-0.1
(11.6)
Unit: mm
φ1.1 φ1.4
25 33
Branding Area
24
1
25 33
Part Number
U1 VB1
12.2.1. U, V, and W 7
CP
CBOOT1
HS1
These pins are the outputs of the three phases, and DBOOT1 RBOOT1 8
serve as connection terminals to the three-phase motor. 31
VBB
The U, V, and W pins are internally connected to the VCC HO
6
HS1, HS2, and HS3 pins, respectively. VCC1
MIC1
32
4 U Mortor
COM1
LO CDC VDC
12.2.2. VB1, VB2, and VB3
LS1
These are the inputs of the high-side floating power 33
RS1
supplies for the individual phases.
Voltages across the VBx and HSx pins should be
Figure 12-1. Bootstrap circuit
maintained within the recommended range (i.e., the
Logic Supply Voltage, VBS) given in Section 2.
In each phase, a bootstrap capacitor, CBOOT, should be Figure 12-2 shows an internal level-shifting circuit
connected between the VBx and HSx pins. that produces high-side output signals, HOx. A high-side
For proper startup, turn on the low-side transistor first, output signal, HOx, begins to respond when an input
then charge the bootstrap capacitor, CBOOT, up to its signal, HINx, transits from low to high (rising edge) or
maximum capacity. high to low (falling edge). And a signal triggered on a
Satisfying the formulas below can provide optimal rising edge is called “Set”, whereas a signal triggered on
capacitance for the bootstrap capacitors, CBOOT. Note a falling edge is called “Reset”. Either of these two
that whichever resulting value is larger should be chosen signals, Set or Reset, is then transmitted to the high-side
in order to deal with capacitance tolerance and DC bias by the level-shifting circuit. Finally, the SR flip-flop
characteristics. circuit feeds an output signal, Q (i.e., HOx).
Figure 12-3 is a timing diagram describing how noise
or other detrimental effects will improperly influence the
level-shifting process. When a sharp voltage drop, which 12.2.4. VCC1, VCC2, and VCC3
is affected by noise, between the VBx and HSx pins
(also denoted as “VBx–HSx” in the tables in previous These are the logic supply pins for the built-in
sections), occurs after the Set signal generation, the next pre-driver ICs. The VCC1, VCC2, and VCC3 pins must
Reset signal cannot be sent to the SR flip-flop circuit. be externally connected on a PCB because they are not
And the state of the high-side output, HOx, stays logic internally connected. To prevent malfunction induced by
high (or “H”) because the SR flip-flop does not respond. supply ripples or other factors, put a 0.01 µF to 0.1 μF
With the HOx state being held high, the next LINx ceramic capacitor, CVCC, near other functional pins used
signal can still turn on the low-side transistor and cause for the same phase. To prevent damage caused by surge
a simultaneously-on condition which may result in voltages, put a 18 V to 20 V Zener diode, DZ, between
critical damage to the IC. the VCCx and COMx pins.
To protect the VBx pin against such noise effect, add Voltages to be applied between the VCCx and COMx
a bootstrap capacitor, CBOOT, in each phase. CBOOT pins should be regulated within the recommended
should be placed near the IC and connected between the operational range of VCC, given in Section 2.
VBx and HSx pins with a minimal length of traces. To
use an electrolytic capacitor, add a 0.01 µF to 0.1 µF
bypass capacitor, CP, in parallel near other functional 12.2.5. COM1, COM2, and COM3
pins used for the same phase.
These are the logic ground pins for the built-in
pre-driver ICs. For proper control, each of them must be
U1 VBx connected to the corresponding ground pin. The COM1,
COM2, and COM3 pins should be connected externally
on a PCB because they are not internally connected.
S Q HOx
Varying electric potential of ground can be a cause of
Set
R improper operations; therefore, each connection point of
Input Pulse HSx
these pins should be as close to the LSx pin as possible
HINx
logic generator Reset but separated from the power ground. Moreover,
extreme care should be taken when wiring so that
COMx
currents from the power ground do not affect the COMx
pin. To reduce noise effects, connect these pins closely
Figure 12-2. Internal level-shifting circuit to shunt resistors, RS, at a single-point ground (or, a star
ground) with traces of a minimal length (see Figure
12-4).
HINx U1
VDC
0 VBB 25
Set CS
4 COM1
0 CDC
0
Q Create a single-point ground
(a star ground) near shunt
0 OCP3 resistors, but keep it separate
Connect COM1,
OCP2 from the power ground.
COM2, and COM3
on a PCB. OCP1
Figure 12-3 Waveforms at VBx–HSx voltage drop
12.2.8. LS1, LS2, and LS3 resistor, RFO, has a too small resistance value, the FOx
pin voltage at fault signal output becomes high due to
These are emitter pins of the low-side IGBTs. The the on-resistance of a built-in MOSFET, QFO (Figure
LS1, LS2, and LS3 pins are connected to the shunt 12-8). Therefore, it is recommended to use a 1 kΩ to 22
resistors, RS. kΩ pull-up resistor when the low-level input threshold
When connecting shunt resistors to these pins, such as voltage of a microcontroller, VIL, is set to 1.0 V.
for current detection, trace lengths from the shunt To suppress noise, add a filter capacitor, CFO, near the
resistors to the IC should be as short as practicable. IC with minimizing a trace length between the FOx and
Otherwise, malfunctioning may occur because a longer COMx pins. Note that, however, this additional filtering
circuit trace increases its inductance and thus increases allows a delay time, tD(FO), to occur, as shown in Figure
its susceptibility to improper operations. 12-9. The delay time, tD(FO), is a period of time which
For applications where long PCB traces are required, starts when the IC receives a fault flag turning on the
add a fast recovery diode, DRS, between the LSx and internal MOSFET, QFO, and continues until when the
COMx pins in order to prevent the IC from FOx pin reaches its threshold voltage (VIL) of 1.0 V or
malfunctioning. below (put simply, until the time when the IC detects a
logic low state, “L”).
U1 Figure 12-11 shows how the delay time, tD(FO), and the
VBB 25 VDC
noise filter capacitor, CFO, are related.
CS
To avoid the repetition of Overcurrent Protection
DRS1 (OCP) activations, the external microcontroller must
4 COM1 RS1 CDC shut off any input signals to the IC within an OCP hold
LS1 33
DRS2 time, tP, which occurs after the MOSFET (QFO) turn-on.
12 COM2 RS2 tP is 15 μs where minimum values of temperature
LS2 30 characteristics are taken into account. (For more details,
DRS3
20 COM3 see Section 12.3.4.)
RS3
LS3 27 When VIL is set to 1.0 V, it is recommended to use a
0.001 μF to 0.01 μF noise filter capacitor, CFO, allowing
a sufficient margin to deal with variations in
characteristics.
Put a shunt resistor near
Add a Fast recovery diode the IC with a minimum
to a long trace. VFO
length to the LSx pin. U1 5V
RFO 1MΩ 3.0µs(typ.)
FOx 2kΩ
Figure 12-7. Connections to LS pin Blanking
INT filter
50Ω
Output SW turn-off
CFO
12.2.9. OCP1, OCP2, and OCP3 QFO
and QFO turn-on
QFO
12.2.10. FO1, FO2, and FO3 ON
Typ.
5
12.3.2. Shutdown Signal Input
Min.
The FO1, FO2, and FO3 pins also can be the input
pins of shutdown signals. When the FOx pin becomes
0
0.000 0.005 0.010 0.015 0.020 0.025
logic low, the high- and low-side transistors of each
phase turn off.
CFO (µF) The voltages and pulse widths of the shutdown signals
to be applied between the FOx and COMx pins are listed
Figure 12-11. Delay time, tD(FO) vs. filter capacitor, in Table 12-2.
CFO
Table 12-2. Shutdown signals
12.3. Protection Functions Parameter “H” Level Signal “L” Level Signal
Input
This section describes the various protection circuits 3 V < VIN< 5.5 V 0 V < VIN < 0.5 V
Voltage
provided in the SCM1200MF series.
Input
The protection circuits include: the undervoltage
Pulse ≥ 0.5 μs ≥ 0.5 μs
lockout for power supply (UVLO), the simultaneous
Width
on-state prevention function, the overcurrent protection
(OCP), and the thermal shutdown (TSD).
In Figure 12-12, FO1, FO2 and FO3 are all connected.
In case one or more of these protection circuits are
If an abnormal condition is detected by either one of the
activated, the FO pin outputs a fault signal and the
MICs, the high- and low-side transistors of all phases
external microcontroller stops all operations of the three
can be turned off at once.
phases. The external microcontroller can also shut down
the IC operations by inputting a fault signal to the FOx
pin. U1
INT FO1
In the following function descriptions, “HOx” denotes 1
a gate input signal on the high-side transistor; whereas
RFO
“LOx” denotes a gate input signal on the low-side 9 FO2
transistor (See also the diagrams in Section 7.).
“VBx–HSx” refers to the voltages between the VBx pin CFO FO3
17
and HSx pin.
VFO
4, 12, 20 COM
HINx HOx
0 0
VBS(ON) FOx
VBS(OFF)
0
UVLO release
0
HO restarts at
About 3µs
positive edge after Figure 12-14. UVLO_VCC operational waveforms
HOx UVLO_VB release.
0
12.3.4. Overcurrent Protection (OCP)
LOx
Figure 12-15 shows an internal circuit diagram of the
0 OCPx pin, and OCPx pin peripheral circuitry.
FOx No FO output at UVLO_VB. The OCPx pin detects overcurrents with input voltage
across external shunt resistor, RS. Since the OCPx pin is
internally pulled-down, the OCPx pin voltage increases
0
proportionally to a rise in the current running through
the shunt resistor.
Figure 12-13. Operational waveforms of UVLO_VB Figure 12-16 is a timing chart that represents
12.3.5. Simultaneous On-state Prevention When the temperature of the MIC increases to
TDH = 150 °C or more, the corresponding TSD circuit is
When both of the HINx and LINx pins receive logic activated. When the temperature decreases to
high signals at once, the high- and low-side transistors TDL = 120 °C or less, the shut-down condition is
turn on at the same time, allowing overcurrents to pass released and the transistors resume operating according
through. As a result, the switching transistors will be to input signals.
destroyed. In order to protect this event, the When the TSD circuits is being enabled, FOx pin
simultaneous on-state prevention circuit is built into becomes logic low and transmits fault signals.
each of the controller ICs. Note that incorrect command Note that junction temperatures of the output
input and noise interference are also largely responsible transistors themselves are not monitored. Do not use the
for such a simultaneous-on condition. TSD function as a prevention function against critical
When logic high signals are asserted on the HINx and damage to the output transistors.
LINx pins at once, as shown in Figure 12-17, this
function gets activated and turns the high- and low-side
transistors off.
Then, the FOx pin becomes a logic low state, and HINx
sends fault signals during this function activation.
After the IC comes out of the simultaneous On-state, 0
0 0
LINx FOx
0 0
About 0.8µs
HOx
Figure 12-18. TSD operational waveforms
0
About 0.8µs
LOx
FOx
MIC2 29 M
V Figure 13-2. Recommended application area for
thermal silicone grease
30
LS2
phase, and Figure 13-4 shows the low-side transistor 14. Calculating Power Losses and
(Q1L) in U phase. And all the pins that are not Estimating Junction Temperatures
represented in these figures are open.
Before conducting a measurement, be sure to isolate This section describes the procedures to: calculate
the ground of a measurement phase from those of other power losses in a switching transistor; and estimate
two phases. Then, in each of the two separated phases, junction temperatures. Note that the following
connect the LSx and COMx pins each other at the same descriptions are applicable to the SCM1200MF series,
potential, and leave them unused and floated. which is controlled by a three-phase sine-wave PWM
driving strategy.
U1
The total power losses in an IGBT can be obtained by
VBB
taking the sum of steady-state loss, PON, and switching
25
loss, PSW.
Q1H The following subsections contain the mathematical
V procedures to calculate power losses in an IGBT and its
MIC1
4 COM1 U 32
junction temperature.
Q1L
LS1
33
31 14.1. IGBT Steady-State Loss, PON
Q2H
The steady-state loss in an IGBT can be computed by
V
12 COM2
MIC2 29 using the VCE(SAT) vs. IC curves, shown in Section 15.3.1.
As shown in Figure 14-1, the following linear
Q2L
LS230
approximate equation can be obtained from the curves:
VCE(SAT) = α × IC + β. The slope and intercept of the
Q3H
linear approximate equation are used in Formula (4).
Table 14-1 lists the reference slopes and intercepts of
MIC3 W26
20 COM3 the linear approximate equation at a half of output
current, 0 to 0.5 × IO.
Q3L
LS3 The values calculated with the linear approximation
27
greatly differ at the point where IC is near zero. But in
dissipation calculation, the difference is regarded as an
error tolerance. Hence, the equation for the steady-state
Figure 13-3. Typical measurement circuit of high-side loss, PON, is:
transistor (Q1H) in U phase
U1
VBB
25
Q1H
4 COM1 MIC1 U 32
Q1L V (4)
LS1
33
31
Q2H
V
12 COM2 MIC2 29 Where:
VCE(SAT) is the collector-to-emitter saturation
Q2L
voltage of the IGBT in V,
LS230
IC is the collector current of the IGBT in A, and
Q3H
DT is the on-time duty cycle.
MIC3 W26
20 COM3
Q3L
LS3
27
M is the modulation index (0 to 1),
cosθ is the motor power factor (0 to 1),
IM is the effective motor current in A,
Figure 13-4. Typical measurement circuit of low-side α is the slope of the linear approximate equation in the
transistor (Q1L) in U phase VCE(SAT) vs. IC curve, and
β is the intercept of the linear approximate equation in 14.3. Estimating Junction Temperature of
the VCE(SAT) vs. IC curve. IGBT
The junction temperature of an IGBT, Tj, can be
2.5 VCC=15V
estimated with Formula (6), below:
125°C
2.0 y = 0.036x + 1.359
VCE(SAT) (V)
1.5 (6)
1.0
75°C Where
0.5 25°C
R(j-c)Q is the junction-to-case thermal resistance of the
y = 0.108x + 0.831 IGBT product (°C/W), and
0.0 TC is the case temperature (°C), measured at the point
0 1 2 3 4 5 6 7 8 9 10 shown in Figure 3-1.
IC (A)
(5)
where:
fc is the PWM carrier frequency in Hz,
VDC is the main power supply voltage in V (i.e., the
VBB pin input voltage),
EON(IM) is the turn-on loss at IM in J, and
EOFF(IM) is the turn-off loss at IM in J.
15.1.1. SCM1261MF
1.00
Ratio of Transient Thermal Resistance
0.10
0.01
1 10 100 1000 10000
Time (ms)
1.00
Ratio of Transient Thermal Resistance
0.10
0.01
1 10 100 1000 10000
Time (ms)
1.00
Ratio of Transient Thermal Resistance
0.10
0.01
1 10 100 1000 10000
Time (ms)
1.00
Ratio of Transient Thermal Resistance
0.10
0.01
1 10 100 1000 10000
Time (ms)
3.0
ICC(mA)
2.5 2.0 125°C
Min.
2.0 1.5 25°C
1.5 -30°C
1.0
1.0
0.5 0.5
0.0 0.0
-30 0 30 60 90 120 150 12 13 14 15 16 17 18 19 20
Tj (°C) VCC (V)
Figure 15-1. Logic Supply Current in three-phase Figure 15-2. Logic Supply Current in three-phase
operating, ICC vs. Tj operating, ICC vs. VCCx pin voltage, VCC
IBS (µA)
Min. Min.
100 100
50 50
0 0
-30 0 30 60 90 120 150 -30 0 30 60 90 120 150
Tj (°C) Tj (°C)
Figure 15-3. Logic Supply Current in single-phase Figure 15-4. Logic Supply Current in single-phase
operating (HINx = 0 V), IBS vs. Tj operating (HINx = 5 V), IBS vs. Tj
VB=15V IN=5V
180 400
350 Max.
160
140 300 Typ.
120 250
IBS (µA)
IIN (µA)
Figure 15-5. Logic Supply Current in single-phase Figure 15-6. Input Current at High Level (HINx or
operating (HINx = 0 V), IBS vs. VBx pin voltage, VB LINx) vs. Tj
2.6 2.0
2.4
1.8
2.2
2.0 1.6
Max.
VIH (V)
VIL (V)
1.8 1.4 Max.
Typ.
1.6 Typ.
Min. 1.2
1.4 Min.
1.2 1.0
1.0 0.8
-30 0 30 60 90 120 150 -30 0 30 60 90 120 150
Tj (°C) Tj (°C)
Figure 15-7. High Level Input Signal Threshold Figure 15-8. Low Level Input Signal Threshold
Voltage, VIH vs. Tj Voltage, VIL vs. Tj
600 800
High-side turn-on propagation
500 700
600 Max.
Max.
400
delay (µs)
500
delay (µs)
Typ. Typ.
300 400 Min.
Min.
300
200
200
100 100
0 0
-30 0 30 60 90 120 150 -30 0 30 60 90 120 150
Tj (°C) Tj (°C)
Figure 15-9. High-side turn-on propagation delay vs. Tj Figure 15-10. High-side turn-off propagation delay vs.
(from HINx to HOx) Tj (from HINx to HOx)
600
Low-side turn-on propagation
800
Low-side turn-off propagation
500 700
600 Max.
delay (µs)
400 Max.
delay (µs)
500
Typ.
300 Typ. 400
Min. 300 Min.
200
200
100 100
0 0
-30 0 30 60 90 120 150 -30 0 30 60 90 120 150
Tj (°C) Tj (°C)
Figure 15-11. Low-side turn-on propagation delay vs. Tj Figure 15-12. Low-side turn-off propagation delay vs.
(from LINx to LOx) Tj (from LINx to LOx)
500 500
450 450
400 400
350 350
tLIN(MIN) (ns)
tHIN(MIN) (ns)
300 300
Max. Max.
250 250
200 Typ. 200 Typ.
150 Min. 150 Min.
100 100
50 50
0 0
-30 0 30 60 90 120 150 -30 0 30 60 90 120 150
Tj (°C) Tj (°C)
Figure 15-13. Minimum transmittable pulse width for Figure 15-14. Minimum transmittable pulse width for
high-side switching, tHIN(MIN) vs. Tj low-side switching, tLIN(MIN) vs. Tj
Max.
VFOL (mV)
800
150 Typ.
600 Min.
100
400
200 50
0 0
0 200 400 600 800 1000 1200 -30 0 30 60 90 120 150
tHIN, tLIN (ns) Tj (°C)
Figure 15-15. Typical output pulse widths, tHO, tLO vs. Figure 15-16. FOx Pin Voltage in Normal Operation,
input pulse widths, tHIN, tLIN VFOL vs. Tj
12.50 12.0
11.8
12.25
11.6
12.00
11.4
11.75 11.2 Max.
VBS(ON) (V)
Max.
VBS(OFF) (V)
11.50 11.0
Typ. 10.8 Typ.
11.25
Min. 10.6 Min.
11.00
10.4
10.75 10.2
10.50 10.0
-30 0 30 60 90 120 150 -30 0 30 60 90 120 150
Tj (°C) Tj (°C)
Figure 15-17. Logic Operation Start Voltage, VBS(ON) vs. Figure 15-18. Logic Operation Stop Voltage, VBS(OFF)
Tj vs. Tj
12.50 12.0
12.25 11.8
11.6
12.00
11.4
VCC(OFF) (V)
11.75
VCC(ON) (V)
11.2 Max.
Max.
11.50 11.0
Typ. 10.8 Typ.
11.25
Min. 10.6
11.00 Min.
10.4
10.75 10.2
10.50 10.0
-30 0 30 60 90 120 150 -30 0 30 60 90 120 150
Tj (°C) Tj (°C)
Figure 15-19. Logic Operation Start Voltage, VCC(ON) vs. Figure 15-20. Logic Operation Stop Voltage, VCC(OFF) vs.
Tj Tj
5.0 4.5
UVLO_VCCフィルタ (µs)
4.5
UVLO_VBフィルタ (µs)
4.0
4.0
3.5 Max.
3.5
Max. 3.0
3.0
2.5 Typ.
2.5 Typ.
2.0 2.0
Min. 1.5 Min.
1.5
1.0 1.0
0.5 0.5
0.0 0.0
-30 0 30 60 90 120 150 -30 0 30 60 90 120 150
Tj (°C) Tj (°C)
Figure 15-21. UVLO_VB filtering time vs. Tj Figure 15-22. UVLO_VCC filtering time vs. Tj
540 4.0
530 3.5
520 3.0
tBK + tD (µs)
Max.
VTRIP (mV)
510 2.5
Max.
500 Typ. 2.0
490 1.5 Typ.
Min.
480 1.0 Min.
470 0.5
460 0.0
-30 0 30 60 90 120 150 -30 0 30 60 90 120 150
Tj (°C) Tj (°C)
Figure 15-23. Overcurrent Protection Threshold Voltage, Figure 15-24. Blanking Time, tBK + propagation delay,
VTRIP vs. Tj tD vs. Tj
50 1.4
45
25
Typ. Typ.
(µs)
20 0.6
15 Min. Min.
10 0.4
5 0.2
0
-30 0 30 60 90 120 150 0.0
-30 0 30 60 90 120 150
Tj (°C)
Tj (°C)
Figure 15-25. Overcurrent Protection Hold Time, tP vs. Figure 15-26. Filtering time of Simultaneous On-state
Tj Prevention Function vs. Tj
15.3.1.1. SCM1261M
VCC=15V 2.5
2.5
2.0 2.0
VCE(SAT) (V)
1.5 1.5
VF (V)
1.0 1.0
125°C
0.5 75°C
25°C 0.5 125°C
Figure 15-27. IGBT VCE(SAT) vs. IC Figure 15-28. Freewheeling diode VF vs. IF
VCC=15V
2.5 2.5
2.0 2.0
VCE(SAT) (V)
VF (V)
1.5 1.5
1.0 1.0
125°C 125°C
0.5 0.5
75°C 75°C
25°C 25°C
0.0 0.0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
IC (A) IF (A)
Figure 15-29. IGBT VCE(SAT) vs. IC Figure 15-30. Freewheeling diode VF vs. IF
2.5 2.5
2.0 2.0
VCE(SAT) (V)
1.5 1.5
VF (V)
1.0
1.0
125°C
125°C 0.5
0.5
75°C 25°C 75°C
25°C 0.0
0.0 0 2 4 6 8 10 12 14 16 18 20
0 2 4 6 8 10 12 14 16 18 20
IF (A)
IC (A)
Figure 15-31. IGBT VCE(SAT) vs. IC Figure 15-32. Freewheeling diode VF vs. IF
2.5
2.5
2.0 2.0
VCE(SAT) (V)
1.5 1.5
VF (V)
1.0 1.0
125°C 125°C
0.5 0.5
75°C 75°C
25°C 25°C
0.0 0.0
0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30
IC (A) IF (A)
Figure 15-33. IGBT VCE(SAT) vs. IC Figure 15-34. Freewheeling diode VF vs. IF
15.3.2.1. SCM1261MF
VB=15V VCC=15V
1200 1200
SCM1261MF
SCM1261MF
1000 1000 Turn-on
800 Turn-off 800
E (µJ)
600 600
E (µJ)
400 400
Turn-on Turn-off
200 200
0 0
0 2 4 6 8 10 12 14 16 18 20 0 2 4 6 8 10 12 14 16 18 20
IC (A) IC (A)
Figure 15-35. High-side switching loss (Tj = 25°C) Figure 15-36. Low-side switching loss (Tj = 25°C)
VB=15V VCC=15V
1200 1200
SCM12161MF
SCM1261MF
1000 Turn-on 1000 Turn-on
800 800
E (µJ)
E (µJ)
600 600
400
Turn-off 400
Turn-off
200 200
0 0
0 2 4 6 8 10 12 14 16 18 20 0 2 4 6 8 10 12 14 16 18 20
IC (A) IC (A)
Figure 15-37. High-side switching loss (Tj = 125°C) Figure 15-38. Low-side switching loss (Tj = 125°C)
15.3.2.2. SCM1242MF
SCM1242MF
800
SCM1242MF
700 700
600 600
Turn-off Turn-on
500 500
E (µJ)
E (µJ)
400 400
300 300
200 200 Turn-off
Turn-on
100 100
0 0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
IC (A) IC (A)
Figure 15-39 High-side switching loss (Tj = 25°C) Figure 15-40. Low-side switching loss (Tj = 25°C)
VB=15V VCC=15V
800 800
SCM1242MF
SCM1242MF
700 Turn-off 700 Turn-on
600 600
500 500
E (µJ)
E (µJ)
400 400
Turn-off
300 Turn-on 300
200 200
100 100
0 0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
IC (A) IC (A)
Figure 15-41. High-side switching loss (Tj = 125°C) Figure 15-42. Low-side switching loss (Tj = 125°C)
15.3.2.3. SCM1263MF
VB=15V VCC=15V
700 700
SCM1263MF
SCM1263MF
600 600
Turn-on
500 Turn-off 500
400 400
E (µJ)
E (µJ)
300 300
200 Turn-on 200
Turn-off
100 100
0 0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
IC (A) IC (A)
Figure 15-43 High-side switching loss (Tj = 25°C) Figure 15-44. Low-side switching loss (Tj = 25°C)
VB=15V VCC=15V
700 700
SCM12163MF
SCM1263MF
600 600
Turn-off Turn-on
500 500
400 400
E (µJ)
E (µJ)
300 300
Turn-on
200 200 Turn-off
100 100
0 0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
IC (A) IC (A)
Figure 15-45. High-side switching loss (Tj = 125°C) Figure 15-46. Low-side switching loss (Tj = 125°C)
15.3.2.4. SCM1243MF
VB=15V VCC=15V
600 600
SCM1243MF
SCM1243MF
500 500
E (µJ)
E (µJ)
300 300
200 200
100 100
Turn-off Turn-off
0 0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
IC (A) IC (A)
Figure 15-47 High-side switching loss (Tj = 25°C) Figure 15-48. Low-side switching loss (Tj = 25°C)
VB=15V VCC=15V
600 600
SCM1243MF
SCM1243MF
500 500 Turn-on
400 Turn-on 400
300 300
E (µJ)
E (µJ)
200 200
Turn-off Turn-off
100 100
0 0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
IC (A) IC (A)
Figure 15-49. High-side switching loss (Tj = 125°C) Figure 15-50. Low-side switching loss (Tj = 125°C)
15.3.2.5. SCM1265MF
VB=15V VCC=15V
1200 1200
SCM1265MF
SCM1265MF
1000 1000
Turn-on
800 Turn-on 800
E (µJ)
600 600
E (µJ)
400 400
0 0
0 2 4 6 8 10 12 14 16 18 20 0 2 4 6 8 10 12 14 16 18 20
IC (A) IC (A)
Figure 15-51 High-side switching loss (Tj = 25°C) Figure 15-52. Low-side switching loss (Tj = 25°C)
VB=15V VCC=15V
1200 1200
SCM12165MF
SCM1265MF
1000 1000 Turn-on
800 800
E (µJ)
E (µJ)
600 600
Turn-on
400 400
Turn-off
200 200
Turn-off
0 0
0 2 4 6 8 10 12 14 16 18 20 0 2 4 6 8 10 12 14 16 18 20
IC (A) IC (A)
Figure 15-53. High-side switching loss (Tj = 125°C) Figure 15-54. Low-side switching loss (Tj = 125°C)
15.3.2.6. SCM1245MF
VB=15V VCC=15V
1000 1000
SCM1245MF
SCM1245MF
800 800
Turn-on
600 Turn-on 600
E (µJ)
E (µJ)
400 400
200 200
Turn-off Turn-off
0 0
0 2 4 6 8 10 12 14 16 18 20 0 2 4 6 8 10 12 14 16 18 20
IC (A) IC (A)
Figure 15-55 High-side switching loss (Tj = 25°C) Figure 15-56. Low-side switching loss (Tj = 25°C)
VB=15V VCC=15V
1000 1000
SCM1245MF
SCM1245MF
800 800
Turn-on
Turn-on
600 600
E (µJ)
E (µJ)
400 400
Figure 15-57. High-side switching loss (Tj = 125°C) Figure 15-58. Low-side switching loss (Tj = 125°C)
15.3.2.7. SCM1256MF
VB=15V VCC=15V
1400 1400
SCM1256MF
SCM1256MF
1200 1200 Turn-off
E (µJ)
600 600
Turn-on
400 400
Turn-on
200 200
0 0
0 5 10 15 20 25 30 0 5 10 15 20 25 30
IC (A) IC (A)
Figure 15-59 High-side switching loss (Tj = 25°C) Figure 15-60. Low-side switching loss (Tj = 25°C)
VB=15V VCC=15V
1400 1800
SCM1256MF
SCM1256MF
1200 1600
Turn-off Turn-off
1400
1000
1200
800 1000
E (µJ)
E (µJ)
600 800
Turn-on 600 Turn-on
400
400
200 200
0 0
0 5 10 15 20 25 30 0 5 10 15 20 25 30
IC (A) IC (A)
Figure 15-61. High-side switching loss (Tj = 125°C) Figure 15-62. Low-side switching loss (Tj = 125°C)
15.3.2.8. SCM1246MF
VB=15V VCC=15V
1400 1400
SCM1246MF
SCM1246MF
1200 1200
1000 1000 Turn-on
E (µJ)
600 600
400 400
200 200 Turn-off
Turn-off
0 0
0 5 10 15 20 25 30 0 5 10 15 20 25 30
IC (A) IC (A)
Figure 15-63 High-side switching loss (Tj = 25°C) Figure 15-64. Low-side switching loss (Tj = 25°C)
VB=15V VCC=15V
1400 1400
SCM1246MF
SCM1246MF
1200 1200
Turn-on
1000 Turn-on 1000
800 800
E (µJ)
E (µJ)
600 600
400 400
Turn-off Turn-off
200 200
0 0
0 5 10 15 20 25 30 0 5 10 15 20 25 30
IC (A) IC (A)
Figure 15-65. High-side switching loss (Tj = 125°C) Figure 15-66. Low-side switching loss (Tj = 125°C)
Operating conditions: VBB pin input voltage (VDC) = 300 V, VCCx pin input voltage (VCC) = 15 V, modulation
index (M) = 0.9, motor power factor (cosθ) = 0.8, junction temperature (Tj) = 150°C.
15.4.1. SCM1261MF
fC = 2 kHz
10
Allowable Effective Current Curves (Arms)
2 SCM1261MF
0
25 50 75 100 125 150
TC (°C)
fC = 16 kHz
10
Allowable Effective Current Curves (Arms)
2 SCM1261MF
0
25 50 75 100 125 150
TC (°C)
fC = 2 kHz
15
Allowable Effective Current Curves (Arms)
10
SCM1242,63MF
SCM1243MF
0
25 50 75 100 125 150
TC (°C)
fC = 16 kHz
15
Allowable Effective Current Curves (Arms)
10
SCM1242,63MF
SCM1243MF
0
25 50 75 100 125 150
TC (°C)
fC = 2 kHz
20
Allowable Effective Current Curves (Arms)
15
10
5
SCM1265MF
SCM1245MF
0
25 50 75 100 125 150
TC (°C)
fC = 16 kHz
20
Allowable Effective Current Curves (Arms)
15
10
5
SCM1265MF
SCM1245MF
0
25 50 75 100 125 150
TC (°C)
fC = 2 kHz
30
Allowable Effective Current Curves (Arms)
25
20
15
10
SCM1256MF
5
SCM1246MF
0
25 50 75 100 125 150
TC (°C)
fC = 16 kHz
30
Allowable Effective Current Curves (Arms)
25
20
15
10
SCM1256MF
5
SCM1246MF
0
25 50 75 100 125 150
TC (°C)
15.5.1. SCM1261MF
200
150
Collector Current, IC(PEAK) (A)
100
0
0 1 2 3 4 5
250
200
Collector Current, IC(PEAK) (A)
150
100
Short Circuit SOA
50
0
0 1 2 3 4 5
300
250
Collector Current, IC(PEAK) (A)
200
150
50
0
0 1 2 3 4 5
Pulse width (µs)
400
350
300
Collector Current, IC(PEAK) (A)
250
200
150
Short Circuit SOA
100
50
0
0 1 2 3 4 5
Pulse width (µs)
LS1
33
FO1
1
R4 2 OCP1
C20
3 LIN1
4 COM1 U 32
5 HIN1
6 VCC1
C17
31
C14 VB1
7
8 HS1
C1 LS230
FO2
9
10 OCP2
11 LIN2 1
V
12 COM2 29 2
13 HIN2 3
14 VCC2
C18 SV4
28
C15 VB2
1 15
2 16 HS2
R5 C2 LS3
3 27
R6 FO3
4 17
R7
5 18 OCP3
R8
6 19 LIN3
R9 W26
7 20 COM3
R10
8 21 HIN3
9 22 VCC3
10
C19
VBB
C5
C6
C7
C8
C9
C10
25 1
SV2 C16 VB3
23
D5 24 HS3 2
C3
SV3
1
R13
2
R12 C21
3
R11
4
SV1
C12/RT
C25
R16
C24
R15
C23
R14
D3
D2
D1
R3
R2
R1
C11
C13
D4
C4
IMPORTANT NOTES
● All data, illustrations, graphs, tables and any other information included in this document as to Sanken’s products listed herein (the
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