Proceedings of India International Conference on Power Electronics 2006
Power Factor Improvement by Pulse Width Modulated Switched Single Capacitor
Md. Raju Ahmed
Electrical and Electronic Engineering Department
Dhaka University of Engineering and Technology
Gazipur, Bangladesh
raju97eee@yahoo.com
Abstract – Reactive power is recognized as an essential factor in
the design and good operation of power system. Real and
reactive power on a transmission line in an integrated network
is governed by the line impedance, voltage magnitudes, the
angle of differences at the line ends, and the role the line plays
in maintaining network stability under dynamic contingencies.
Reactive power compensation or control is essential part in a
power system to minimize power transmission loss, to maximize
power transmission capability, and to maintain the system
voltage within desired level. In this paper a new method is
proposed which improves the power factor automatically of
varying lagging loads to unity, using one single large shunt
capacitor instead of using a bank of switching capacitors.
Basically, this control scheme is a static power factor correction
method by continuous voltage or current control of a capacitor.
In this work the voltage across the capacitor is being changed
by a bi-directional switch to control the magnitude of
compensating capacitor current and thereby attaining unity
power factor. This system incorporates high-speed insulated
gate bipolar transistor switching technology. The gate signal of
the switching devices is generated by using a compact and
commercially available IC chip SG1524B.The scheme is simple
in this sense that it uses only one static bi-directional switch
controlled by an electronic control circuit that uses only analog
ICs and some discrete digital components.
Index Terms-Power factor correction, pulse width modulation,
single variable capacitor.
I. INTRODUCTION
Static power compensation is becoming one of the most
economic and effective solution to both traditional and new
problems in power transmission system. It is a well
established practice to use reactive power compensation to
control the magnitude of the voltage at a particular bus bar in
electric power system. In the past, synchronous condensers,
and mechanically switched capacitors, and saturated reactors
have been applied to control the system voltage in this
manner. Since the late 1960s, thyristor controlled reactor
(TCR) devices together with fixed capacitors (FCs) or
thyristor switched capacitors (TSCS) have been used to inject
or absorb reactive power. Solid state VAR compensators
using force-commutated converters [1] and based on force-
commutated voltage source [2]-[3] have been recently
discussed. In an ideal electrical system, the voltage and
frequency in the various points of power distribution must be
constant, presenting only the fundamental component and a
near unity power factor. In particular, these parameters must
be independent of the size and characteristics of the
consumer’s loads; this can be obtained only if these loads are
equipped with reactive power compensators to make the
212
M. J. Alam
Electrical and Electronic Engineering Department
Bangladesh University of Engineering and Technology
Dhaka, Bangladesh
mjalam@eee.buet.ac.bd
network independent from probable changes that appear in
the distribution points. Compensation of the load is one of
techniques for the controlling of reactive power, so to
improve the quality of the energy in the ac transmission
lines; this technique is generally used for the compensation
of individual or a group of loads. Power factor correction is
the capability of generating or absorbing reactive power to a
load without the use of the supply. The major industrial loads
have are inductive loads, hence the current tends to go
beyond the necessary value to active power absorption alone.
But active power is usually used for the power conversion,
and an excessive load current represents a loss for the
consumer, who not only pays for the over dimensioning of
the cable but also for the excessive power loss in the cables.
The electric companies do not want to transport the useless
reactive power of the alternators towards the loads, the
distribution network cannot be used at high efficiency, and
the voltage regulation in the various points becomes
complicated. The pricing used by these electric companies
almost always penalizes the low power factor of the clients;
hence the development of systems for power factor
improvement is necessary.
II. SWITCHED CAPACITOR
The wide range of variation in lagging VAR on the system
has caused the necessity for controlled compensation of the
reactive power to achieve desired power factor at all load
conditions. This is usually achieved by using switched
capacitors. Depending on the total VAR requirement, a
number of capacitors are used which can be switched into or
switched outgo the system individually. But in case of widely
fluctuating loads, the VAR of the load also varies over wide
limits. Thus a fixed capacitor bank may often lead to either
over-compensation or under-compensation resulting in lower
power factor in the AC power supply system. In this paper
instead of using a bank of capacitor a single large capacitor is
used. The compensating capacitive current depends on the
voltage across the capacitor. So by controlling the voltage
across the capacitor we can control the compensating current.
The voltage across the capacitor is controlled by a bi-
directional switch, which is continuously on/off by a pulse
width modulated (PWM) signal of moderately high
frequency. By controlling the duty cycle of the PWM signal
the magnitude of compensating capacitive current can be
controlled and thereby attaining the required power factor
correction.
Proceedings of India International Conference on Power Electronics 2006

III. PRINCIPLES OF OPERATION
For power factor correction the control scheme is involved
in detecting the power factor of the load and the magnitude
of the load current. The control circuit then provide an error
voltage, which is the product of load current and power
factor. This error voltage is the negative input of the error
amplifier of the IC chip SG1524B. The SG1524B is a voltage
regulating IC whose output frequency can be controlled by
controlling the value of RT and CT and duty cycle can be
controlled by controlling the input voltage of positive and
negative error amplifier. In this paper the operating
frequency of pulse width modulated signal is 4 KHz. The
positive input of the error amplifier is taken from the
reference voltage of the IC chip after voltage dividing, which
is constant. When the error voltage increase or decrease then
the duty cycle of the gate signal of IGBT decrease or increase
as a result the voltage across the capacitor decrease or
increase. So when the load current or load power factor
increase or decrease then the proposed control circuit
automatically control the voltage across the capacitor to
control the compensating capacitive current accordingly to
attain unity power factor. The high operating frequency
results in the smaller size of the filter capacitors and
inductors since generally the size of inductors and filter
capacitors is inversely proportional to the frequency.
Optocoupler is used to isolate the control or gate signal of
IGBT with respect to ground. In the proposed circuit an input
filter is used to smooth the input current waveforms. Fig. 1
shows the proposed circuit to attain unity power factor for
varying loads by pulse width modulated single capacitor.
IV. RESULTS OF PROPOSED POWER FACTOR
IMPROVEMENT CIRCUIT
Results of the proposed circuit for improve power factor
are shown in fig. 2. When load is varied from single 50+j31.4
Ω to four 50+j31.4 Ω the input power factor is unity as
shown figs. 5(a), (b), (c) and (d) respectively. When load is
50+j31.4 Ω, 50+j31.4 Ω and 50+j31.4 Ω, it is seen that input
power factor is also unity as shown figs. 2(e), (f) and (g)
respectively. The voltage across the capacitor corresponding
to the load of figs.2 (a), (b), (c) and (d) are shown in figs.
3(a), (b), (c), and (d) respectively. It is seen from fig.3 with
increase in load current i.e. the reactive component of load
current the voltage across the capacitor also increase in order
to increase the compensating capacitive current. Table I
summarizes the result of the proposed circuit to attain unity
power factor both for the variation of load power factor and
current.

D1 D2

Z1
gate
gate
IXGH10N60
L2
C2 100 800
U3
1mH
100u
XX
R1
emitter R9
50 D3 D4 0 15
10 R3
V1 .01 V4
VOFF = 0 L1 C1 C6 150k
VAMPL = 300 10k
FREQ = 50 100mH 10u 2u
L3
1mH
YY
R2

.01 emitter

100Hz 615 5000k

ABS 20Hz
1dB 50dB
10k 10k 6
1 3 0
V2 15Vdc
50k 15 F C
0 0 C4 VIN E S
RO
7 V 12
6 CT C_A 11
5 0 4000p
1 RT E_A
2 ERR- 13
1k ERR+ C_B
U1A 14
0 1 R13 4 E_B
100Hz CL+
3 10 5
2
10Hz 1 CL- P T
20k
1dB 50dB D M U
5 N O H
G C S
10 7486
R7 0
0 100k 8 9 1
XX 0
40k
R19 R15 R10
50 50 50 .001u
R21
.02
0 U2 SG1524B
L6 L5 L4 0
100mH 100mH 100mH

YY

Fig. 1. Proposed power factor correction circuit

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Proceedings of India International Conference on Power Electronics 2006

300V 10A 1
350V
2
8.0A
1 2

150V 5A 200V
4.0A

0V 0A
0V 0A

-150V -5A
-4.0A
-200V
>>
-300V -10A
300ms 320ms 340ms 360ms 380ms 400ms >>
-350V -8.0A
1 V(V1:+) 2 -I(V1) -I(R2) 200ms 220ms 240ms 260ms 280ms 300ms
Time 1 V(V1:+) 2 -I(V1) -I(R2)
Time

(a) (e)
350V 7.0A
300V 14A 1 2
1 2

175V 3.5A
150V 7A

0V 0A
0V 0A

-175V -3.5A
-150V -7A
>>
>>
-350V -7.0A
-300V -14A
300ms 320ms 340ms 360ms 380ms 400ms
300ms 320ms 340ms 360ms 380ms 400ms
1 V(V1:+) 2 -I(V1) -I(R2)
1 V(V1:+) 2 -I(V1) -I(R2)
Time
Time

(f)
(b)
350V 6.0A
1 2
300V 20A
1 2
175V 3.0A
150V 10A

0V 0A
0V 0A

-175V -3.0A
-150V -10A
>>
>> -350V -6.0A
-300V -20A 300ms 320ms 340ms 360ms 380ms 400ms
300ms 320ms 340ms 360ms 380ms 400ms 1 V(V1:+) 2 -I(V1) -I(R2)
1 V(V1:+) 2 -I(V1) -I(R2) Time
Time

(g)
(c)
Fig. 2. Input voltage, input current and load current waveforms for loads (a)
1
300V
2
26A 50+j31.5 Ω one load (b) 50+j31.5 Ω two load (c) 50+j31.5 Ω three load (d)
50+j31.5 Ω four load (e) 50+j47 Ω (f) 50+j63 Ω and (g) 50+j78.5 Ω, where
150V 13A V(V1:+) is input voltage, -I(V1) is input current and –I(R2) is load current.

150V
0V 0A

75V
-150V -13A

>>
0V
-300V -26A
300ms 320ms 340ms 360ms 380ms 400ms
1 V(V1:+) 2 -I(V1) -I(R2)
-75V
Time

-150V
300ms 320ms 340ms 360ms 380ms 400ms
V(C2:2,C2:1)
Time
(d)

(a)

214
Proceedings of India International Conference on Power Electronics 2006

200V
V. CONCLUSION
100V
In this paper, a solid state reactive power compensator has
0V been presented. The simulation results shown in fig. 2 shows
that the proposed circuit improves the power factor to unity
-100V for the variation of load power factor and load current. The
input current of the proposed circuit is sinusoidal. Our
-200V
300ms 320ms 340ms 360ms 380ms 400ms
proposed circuit is an attempt to suggest a simple controlled
V(C2:2,C2:1) compensating circuit for a medium voltage line. A reactive
Time
current component cancellation principle is proposed, which
is found to be very effective to improve power factor.
(b)
ACKNOWLEDGMENT
200V

The authors gratefully acknowledge the contribution of

100V
Professor M. A. Choudhury.
0V
REFERENCES
-100V

[1] E. Wanner, R. Mathys, and M. Hausler,“Compensation

-200V
300ms 320ms 340ms 360ms 380ms 400ms System for Industry,” Brow Boveri Review, Vol. 70, , Sept./
V(C2:2,C2:1)
Time
Oct. 1983, pp.330-340.
[2] L. Gyugi, “Reactive Power Generation and Controlby
Thyristor Circuits,” IEEE Trans. Industry Applications, Vol.
(c) IA-15, No.5, Sept./ Oct. 1979, pp. 521-532.
300V [3] L. Moran, P.D. Ziogas, and G. Joos,“A Solid-State High-
Performance Reactive Power Compensator,” IEEE Trans.
150V
Industry Applications, Vol. 29, No. 5, Sept./ Oct. 1993,
pp.969-978.
0V

[4] L. Gyugi, “Dynamic Compensation on Power

-150V Transmission Lines by Solid-State Synchronous Voltage
Sources,” IEEE Trans. Power Delivery, Vol. 8, No. 3, July
-300V
300ms 320ms 340ms 360ms 380ms 400ms 1993,
V(C2:2,C2:1)
Time [5] A. R. Prasad, Phoivos D. Zoigas abd Stefanos Manias,
“An Active Power Factor Correction Technique for Three-
Phase Diode Rectifier,” IEEE Trans. Power Electronics, Vol.
(d) 6, No. 1, Janu. 1991. pp.83-92.
Fig. 3. Voltage across shunt capacitor (a), (b), (c) and (d) corresponding to [6] Leopoldo Rossetto, Giorgio Siaazzi and Paolo Tenti,
the load of fig. 2 (a), (b), (c) and (d) respectively. “Boost PFC with 100-HZ Switching FrequencyProviding
Output VoltGE Stabilization and Compliance with EMC
TABLE I
Standards,” IEEE Trans. Industry Applications, Vol. 36, No.
RESULTS OF PROPOSED POWER FACTOR CORRECTION CIRCUIT
1. Janu./ Feb. 2000, pp.188-193.
Load No. of Load current Load Input Remarks [7] Slobodan Cûk, “Basics of Switched Mode Power
Loads (peak) [A] p.f. p.f. Conversion Topologies, Magnetics, and Control,” Modern
50+j32 Ω One 5.1 0.85 1 Unity Power Electronics: Evaluation, Technology, and
Two 10.2 0.85 1 power applications, Edited by B.K. Bose, IEEE Press, 1992, pp.
Three 15.3 0.85 1 factor 265-296.
Four 20.3 0.85 1 obtained
50+j47 Ω One 4.4 0.73 1
50+j63 Ω One 3.7 0.62 1
50+j79 Ω One 3.2 0.54 1

215