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set_clock_tree_references

Specifies the buffers, inverters, and clock gates to be used in


clock tree synthesis.

SYNTAX
status set_clock_tree_references
[-clock_trees clock_name_or_collection]
-references references
[-sizing_only]
[-delay_insertion_only]
[-boundary_cell_only]

ARGUMENTS
-clock_trees clock_name_or_collection
Specifies a list of clock domains to apply the references. By
default, the references apply to all clocks if you do not spec-
ify this option.

-references references
Specifies the list of buffers, inverters, and clock gates to
build clock trees.

-sizing_only
Limits the usage of specified references for cell sizing only.
This option is mandatory if clock gates such as ICGs, muxes, and
gates are specified as references.

-delay_insertion_only
Limits the usage of specified references for delay insertion
only.

-boundary_cell_only
Limits the usage of specified references for boundary cell
insertion only.

DESCRIPTION
The command specifies buffers, inverters, and clock gates to be used
for clock tree synthesis. Specifying several references allows the
clock tree synthesis engine more flexibility to build clock trees and
provides improved clock tree results.

If you do not specify the -clock_trees option, reference lists apply to


all clocks in the design. You can use the -clock_trees option to apply
reference lists on a per-clock basis. Reference lists specified with
the -clock_trees option override the reference lists without the
option.

You can specify clock gates as reference cells during optimization for
cell sizing. To size a gate, equivalent gates from reference lists are
used. If no equivalent gates are found, all gates from the target
library are available for cell sizing.

If you issue the -set_clock_tree_references command several times for


the same clock tree, the new references you specify are added to exist-
ing references for that clock tree. You can view the references of a
given clock tree by using the report_clock_trees command. To delete
references, use the reset_clock_tree_references command.

Multicorner-Multimode Support
This command has no dependency on scenario-specific information.

EXAMPLES
The following example uses library buffers for all clocks during clock
tree synthesis.
prompt> set_clock_tree_references -references buffer4x

The following example uses library buffers for clock CLK1 in the
design.
prompt> set_clock_tree_references -clock_trees CLK1 -references
buffer4x

The following example uses library buffers for clock CLK1 in the design
and limits its usage for delay insertion only
prompt> set_clock_tree_references -clock_trees CLK1 \
-references buffer4x -delay_insertion_only

The following example uses library gate AND2X2 and ANDX4 for clock CLK1
in the design. To size any AND2 gates in the CLK1 path, either AND2X2
or AND2X4 gate can be used. When clock gates such as ICGs, muxes and
gates are specified as references, -sizing_only option needs to be
specified.
prompt> set_clock_tree_references -clock_trees CLK1 \
-references "AND2X2 AND2X4" -sizing_only

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