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1 2 3 4 5 6 7 8

DC/DC
DRAM Power
1.8V, 0.9V
PG 43
TAHITI-INTEGRATED
+3V_SRC
A A
+5VSUS
1.5VSUS, 1.05V
PG 45
PG 44
CPU VR
AC/BATT
Dothan CLOCKS SYSTEM
PG 47 RESET CKT
PG 42 CONNECTOR
(478 Micro-FCPGA) PG 15 PG 39
BATT
RUN POWER PG 40
SELECTOR PG 3,4
SW
Panel Connector
PG 46 BATT PG 17
PG 41
CHARGER 4X133MHZ LVDS

B
POWER DC/DC sDVO SI1362
DVI
B
Alviso-GM PG 16
400/533 MHZ DDR II TVOUT S-Video
DDR2-SODIMM1
PG 18
PG 13,14
1257 PCBGA
400/533 MHZ DDR II VGA CRT
DDR2-SODIMM2 PG 5,6,7,8,9 PG 18
PG 13,14
USB2.0 (P5,P7)
2 Rear Ports PG 32
DMI interface
USB2.0 (P4,P6)
2 right Side PG 32
USB2.0 (P1)
PATA - HDD PATA 88SA8040 SATA
33MHz PCI DOCKING
PG 19 PG 19 CONNECTOR
ICH6-M
ATA 66/100 LAN (100/10) 1394 CONN CARDBUS PCMCIA MINI-PCI
Internal Media Bay 609 BGA Wireless LAN
PG 38
C
BCM4401 PCI4515 CON. C
CD-ROM PG 19 USB2.0 1 port(P0)
PG 22 PG 21 PG 21 PG 23
PG 35
AC97 PG 10,11,12
E-Switch I/O Board CONN
PI3L110Q
PG 32
LPC
PG 36
USB2.0 (P2) Bluetooth
PG 30
AUDIO MDC
PG 31,32 PG 24 SIO(Macallan 3)
256 Pins LBGA DOCK LPC
PG 25,26
S/PDIF to Audio RJ11 to Tip
X-Bus
DOCK Jacks DOCK Ring
D
PG 38 PG 34 PG 38 PG 24 D

PS/2 SWTICH & LED & FAN & THERMAL QUANTA


IO CONN
IrDA Keyboard Serial Parallel
Touchpad Flash Title
COMPUTER
PG 32 PG 31 Schematic Block Diagram1
PG 37 PG 26 PG 27 PG 28 PG 30 PG 29
Size Document Number R ev
Tahiti 1A

Date: 星期二, 三月 29, 2005 Sheet 1 of 49


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1 2 3 4 5 6 7 8

INDEX
Power & Ground
Pg# Description DNI LIST
Label Pg# Description Control Signal
1 Schematic Block Diagram 1
DC_IN+ AC ADAPTER (20V)
2 Front Page
PBATT+ MAIN BATTERY + (10~17V)
3-4 Dothan
A A
PWR_SRC MAIN POWER (10~20V)
5-9 Alviso
10-12 ICH6
13-14 DDRII SO-DIMM(200P)
VHCORE CPU CORE POWER (1.25/1.15V) RUNPWROK
15 Clock Generator
1.05V AGTL+ POWER (1.05V) I/O RUNPWROK
16 SI1362
17 LCD Conn. & SSP
+3VRUN SLP_S3# CTRLD POWER RUN_ON
18 CRT & TV Conn.
+3VSUS SLP_S5# CTRLD POWER SUS_ON
19 SATA & IDE Conn.
+5VALW 8051 POWER (5V)
20 PAD & Screw Hole
+5VRUN SLP_S3# CTRLD POWER RUN_ON
21 TI PIC4510
B B
+5VSUS SLP_S5# CTRLD POWER SUS_ON
22 CB/1394 CONN
+5VHDD HDD POWER (5V) HDDC_EN#
23 Mini PCI Conn.
+5VMOD MODULE POWER (5V) MODC_EN#
24 MDC Conn.
STRB#/5V EXTERNAL FDD POWER (5V) FDD/LPT#
25-26 SIO (LPC47N354)
+5VRUN FAN POWER (5V) FAN_OFF/ON#
27 Parallel Port
VDDA AUDIO ANALOG POWER (5V) RUN_ON
28 Serial Port
1_8VSUS RESUME WELL IN ICH
29 Flash ROM
1_8VRUN SLP_S3# CTRLD POWER
30 Touch Pad CONN.& Bluetooth CONN
+3VALW 8051 POWER (3V)
31 Switch Board Conn. & LED & IO Board
V1_5RUN ALVISO POWER Non-CPU I/O
C 32 FAN & Thermal C

33-34 Audio CODEC (STAC9751) & Phone Jack


GND ALL PAGES DIGITAL GROUND
35-36 LAN Interface

37 FIR COMBO CONN GND

38 MISCELLANEA
39 Docking Conn.

40 SYSTEM RESET/POWER GOOD


41-42 Battery Selector & Charger
43 CPU Power
44 1.8VSUS/0.9V
D 45 1.5V/1.05V D

46 D/D Power QUANTA


47 RUN Power Switch
Title
COMPUTER
Index, DNI, Power & Ground
48 RUN POWER SW
Size Document Number R ev
Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 2 of 49


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

VCCP
R29 27.4/F
R25 56 TCK 1 2
THERMTRIP# 1 2 TRST# 1 2
HD#[0..63]
U7A HD#[0..63] 5
R30 56 R28 680
HA#[3..31] IERR# 1 2
5 HA#[3..31]
HA#3 P4 A19 HD#0
HA#4 A3# D0# HD#1 R31 200
U4 A25
HA#5
HA#6
V3
A4#
A5#
Dothan D1#
D2# A22 HD#2
HD#3
CPUPWRGD 1 2
R3 A6# D3# B21
HA#7 V2 A24 HD#4
HA#8 A7# D4# HD#5
A
HA#9
W1
T4
A8# 1 OF 3 D5# B26
A21 HD#6 A
HA#10 A9# D6# HD#7 +3VRUN +3VALW
W2 A10# D7# B20
HA#11 Y4 C20 HD#8
HA#12 A11# D8# HD#9
Y1 A12# D9# B24
HA#13 U1 D24 HD#10
A13# D10#

2
HA#14 AA3 E24 HD#11
HA#15 A14# D11# HD#12 R22 R34
Y3 A15# D12# C26
HA#16 AA2 B23 HD#13 *1.5K_NC *330_NC
HA#17 A16# D13# HD#14 VCCP
AF4 A17# D14# E23
HA#18 AC4 C25 HD#15

1
HA#19 A18# D15# HD#16
AC7 A19# D16# H23 PROCHOT# 26

1
HA#20 AC3 G25 HD#17
A20# D17#

3
HA#21 AD3 L23 HD#18 R24
HA#22 A21# D18# HD#19
AE4 A22# D19# M26 56 2
HA#23 AD2 H24 HD#20
A23# D20#

3
HA#24 AB4 F25 HD#21 R23 Q12

1
HA#25 A24# REQUEST DATA D21# HD#22 CPU_PROCHOT# Q11 *RHU002N06_NC
AC6 A25# D22# G24 2 1 2
HA#26 AD5 PHASE PHASE J23 HD#23 *3904_NC
HA#27 A26# D23# HD#24 *330_NC
AE2 SIGNALS SIGNALS M23

1
HA#28 A27# D24# HD#25
AD6 A28# D25# J25
HA#29 AF3 L26 HD#26
HA#30 A29# D26# HD#27
AE1 A30# D27# N24
HA#31 HD#28
AF1 A31# D28# M25
H26 HD#29
Thermal Level Shift
D29# HD#30
D30# N25
K25 HD#31
D31# HD#32
5 HADSTB0# U3 ADSTB0# D32# Y26
HD#33
5 HADSTB1# AE5 ADSTB1# D33# AA24
T25 HD#34
ITP disable guidelines
D34# HD#35
B
D35# U23 Signal Resistor Value Connect To Resistor Placement B
R2 V23 HD#36
5 HREQ#0 REQ0# D36#
P3 R24 HD#37 TDI 150 ohm +/- 5% VTT Within 2.0" of the CPU
5 HREQ#1 REQ1# D37#
T2 R26 HD#38
5 HREQ#2 REQ2# D38#
P1 R23 HD#39 TMS 39 ohm +/- 5% VTT Within 2.0" of the CPU
5 HREQ#3 REQ3# D39#
T1 AA23 HD#40
5 HREQ#4 REQ4# D40#
U26 HD#41 TRST# 680 ohm +/- 5% GND Within 2.0" of the CPU
D41# HD#42
D42# V24
N2 ERROR U25 HD#43 TCK 27 ohm +/- 5% GND Within 2.0" of the CPU
5 ADS# ADS# D43#
SIGNALS V26 HD#44
D44# HD#45
D45# Y23 TDO Open VTT Within 2.0" of the CPU
AA26 HD#46
IERR# D46# HD#47
A4 IERR# D47# Y25 Note: Populate All NC component when
AB25 HD#48
N4
D48#
AC23 HD#49 ITP connector is populated.
5 HBREQ0# BREQ0# D49#
J3 ARBITRATION AB24 HD#50
5 BPRI# BPRI# D50#
L1 PHASE AC20 HD#51
5 BNR# BNR# D51#
J2 SIGNALS AC22 HD#52 VCCP VCCP
5 HLOCK# LOCK# D52#
AC25 HD#53
D53# HD#54
5 HIT# K3 HIT# D54# AD23
K4 SNOOP PHASE AE22 HD#55
5 HITM# HITM# D55#

1
1

1
1
L4 SIGNALS AF23 HD#56
5 DEFER# DEFER# D56#
AD24 HD#57 R236 R238 R239 R240
BPM0# D57# HD#58 54.9/F 54.9/F 39.2/F 150
C8 BPM0# D58# AF20
BPM1# B8 RESPONSE AE21 HD#59
BPM2# BPM1# PHASE D59# HD#60 JITP2 VCCP +3VSUS
A9 AD21

2
2

2
2
BPM3# BPM2# D60# HD#61
C9 SIGNALS AF25
BPM3# D61# HD#62
5 HTRDY# M3 TRDY# D62# AF22
H1 AF26 HD#63 TDI 1 27
5 RS#0 RS0# D63# TDI VTT0

1
K1 TMS 2 28
5 RS#1 RS1# TMS VTT1

2
C C
L2 TCK 5 26 C359 R234
5 RS#2 RS2# TCK VTAP
TDO 1 2 7 150
A20M# TRST# R237 *22.6/F_NC3 TDO *.1U_10V_NC
10 A20M# C2 C23 HDSTBN0# 5

1
FERR# A20M# PC DSTBN0# TRST#
10 FERR# D3 C22 HDSTBP0# 5

2
IGNNE# FERR# COMPATIBILITY DSTBP0#
10 IGNNE# A3 IGNNE# DSTBN1# K24 HDSTBN1# 5
CPUPWRGD E4 SIGNALS L24 CPURST# 1 2 12 25 DBR#
10 CPUPWRGD PWRGOOD DSTBP1# HDSTBP1# 5
SMI# B4 W25 R235 *22.6/F_NC RESET# DBR#
24
10 SMI# SMI# DSTBN2# HDSTBN2# 5 DBA#
DSTBP2# W24 HDSTBP2# 5
TCK A13 AE24 TCK 11
TCK DSTBN3# HDSTBN3# 5 FBO
TDO A12 DIAGNOSTIC AE25
TDO DSTBP3# HDSTBP3# 5
TDI C12 & TEST
TMS TDI BPM0#
C11 SIGNALS 15 HCLK_ITP# 8 23
TRST# TMS BCLKN BPM0# BPM1#
B13 TRST# DINV0# D25 HDBI0# 5 15 HCLK_ITP 9 BCLKP BPM1# 21
T11 PAD A16 J26 19 BPM2#
ITP_CLK0 DINV1# HDBI1# 5 BPM2#
T7 PAD A15 T24 10 17 BPM3#
ITP_CLK1 DINV2# HDBI2# 5 GND0 BPM3#
PREQ# B10 AD20 14 15 PR DY#
PREQ# DINV3# HDBI3# 5 GND1 BPM4#
PR DY# A10 16 13 PREQ#
DBR# PRDY# GND2 BPM5#
39 DBR# A7 DBR# DBSY# M2 DBSY# 5 18 GND3
DRDY# H2 DRDY# 5 20 GND4 NC0 4
10 INTR D1 LINT0 22 GND5 NC1 6
D4 EXECUTION
10 NMI LINT1
STPCLK# C6 CONTROL B14
10 STPCLK# STPCLK# BCLK1 HCLK_CPU# 15
CPUSLP# A6 SIGNALS B15
5,10 CPUSLP# SLP# BCLK0 HCLK_CPU 15
DPSLP# B7 *ITP700_NC
10 DPSLP# DPSLP#
G1
10 DPRSTP#

31 THERMDA
THERMDA B18
DPRSTP#

THERMDA INIT# B5 CPUINIT#


CPUINIT# 10
ITP DEBUG PORT
THERMDC A18
31 THERMDC THERMDC
G1: NC for B11 CPURST#
RESET# CPURST# 5
D Dothan and THERMTRIP# C17 D
31 THERMTRIP# THERMTRIP#
DPRSTP# for THERMAL DIODE C19
DPWR# DPWR# 5
CPU_PROCHOT# B17
Yonah PROCHOT#
QUANTA
Dothan Processor

Title
COMPUTER
Dothan Processor (HOST)

Size Document Number R ev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 3 of 49


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

COMP0 VCCP
COMP1 U7B VCCP
COMP2 U7C
COMP3
Z0 = 55 ohm, 25 mils COMP0 P25 A2 W23
COMP0 VSS00 VSS120
2

2
COMP1 P26 A5 D10 W26
R20 R19 R211 R212 R16
spacing for switching COMP2 COMP1 VSS01 VCCP0 VSS121
AB2 COMP2 VSS02 A8 D12 VCCP1 VSS122 Y2
27.4/F 54.9/F 27.4/F 54.9/F 1K/F signals COMP3 AB1 A11 D14 Y5
COMP3 VSS03 VCCP2 VSS123
A14 D16 Y21
Dothan VSS04
A17 E11
VCCP3
Dothan
VSS124
Y24
1

1
A
GTLREF0 AD26 VSS05 VCCP4 VSS125 A
GTLREF0 VSS06 A20 E13 VCCP5 VSS126 AA1
2 OF 3 VSS07 A23 E15 VCCP6 VSS127 AA4

2
R15 TEST1 C5
VSS08 A26
B3
F10
F12
VCCP7 3 OF 3 VSS128 AA6
AA8
T9 PAD TEST1 VSS09 VCCP8 VSS129
18mils Trace Width of COMP0,2 2K/F T47 PAD TEST2 F23 B6 F14 AA10
TEST2 VSS10 VCCP9 VSS130
5mils Trace Width of COMP1,3 VSS11 B9 F16 VCCP10 AA12
B12 K6 POWER, GROUND AND NC VSS131 AA14

1
VSS12 VCCP11 VSS132
T10 PAD B2 NC1 VSS13 B16 L5 VCCP12 VSS133 AA16
VSS14 B19 L21 VCCP13 VSS134 AA18
T8 PAD C3 RSVD2 VSS15 B22 M6 VCCP14 VSS135 AA20
T2 PAD AF7 RSVD3 VSS16 B25 M22 VCCP15 VSS136 AA22
T5 PAD AC1 POWER, C1 N5 AA25
RSVD4 GROUND, VSS17 VCCP16 VSS137
T6 PAD E26 RSVD5 VSS18 C4 N21 VCCP17 VSS138 AB3
RESERVED C7 P6 AB5
CPU_VCCA VSS19 VCCP18 VSS139
SIGNALS C10 P22 AB7
VSS20 VCCP19 VSS140
AC26 VCCA3 VSS21 C13 R5 VCCP20 VSS141 AB9

1
C42 C41 N1 C15 R21 AB11
VCCA2 VSS22 SELPSB2_CLK VCCP21 VSS142
B1 VCCA1 VSS23 C18 6,15 SELPSB2_CLK T6 VCCP22 VSS143 AB13
.01U 10U_4V 2 1 CPU_VCCA F26 C21 SELPSB1_CLK T22 AB15
2 +1_5VRUN 6,15 SELPSB1_CLK

2
VCCA0 VSS24 VCCP23 VSS144
VSS25 C24 U21 VCCP24 VSS145 AB17
R21 0_0603 VHCORE D2 AB19
VSS26 VSS146
VSS27 D5 P23 VCCQ0 VSS147 AB21
D6 VCC00 VSS28 D7 W4 VCCQ1 VSS148 AB23
D8 VCC01 VSS29 D9 VSS149 AB26
D18 VCC02 VSS30 D11 VSS150 AC2
D20 VCC03 VSS31 D13 42 CPU_VID0 E2 VID0 VSS151 AC5
D22 VCC04 VSS32 D15 42 CPU_VID1 F2 VID1 VSS152 AC8
E5 VCC05 VSS33 D17 42 CPU_VID2 F3 VID2 VSS153 AC10
VHCORE VHCORE
B
E7
E9
VCC06
VCC07
VSS34
VSS35
D19
D21
42
42
CPU_VID3
CPU_VID4
G3
G4
VID3
VID4
VID VSS154
VSS155
AC12
AC14 B
E17 VCC08 VSS36 D23 42 CPU_VID5 H4 VID5 VSS156 AC16
E19 VCC09 VSS37 D26 VSS157 AC18
E21 VCC10 VSS38 E3 VSS158 AC21
F6 VCC11 VSS39 E6 VSS159 AC24
1

1
C328 C287 C334 C290 C286 C31 C302 C288 C284 C281 F8 E8 AD1
VCC12 VSS40 VSS160
F18 VCC13 VSS41 E10 Differential ProbeT3 PAD AE7 VCCSENSE VSS161 AD4
10U_4V 10U_4V 10U_4V 10U_4V 10U_4V 10U_4V 10U_4V 10U_4V 10U_4V 10U_4V F20 E12 Test Using T4 PAD AF6 AD7
2

2
VCC14 VSS42 VSSSENSE VSS162
F22 VCC15 VSS43 E14 VSS163 AD9
G5 VCC16 VSS44 E16 VSS164 AD11
G21 E18 0 AD13
VCC17 VSS45 SELPSB2_CLK R26 VSS165
H6 VCC18 VSS46 E20 1 2 BSEL0 C16 BSEL0 VSS166 AD15
VHCORE VHCORE H22 E22 SELPSB1_CLK 1 2 BSEL1 C14 AD17
VCC19 VSS47 R27 0 BSEL1 VSS167
J5 VCC20 VSS48 E25 VSS168 AD19
J21 F1 R32 *0_NC AD22
VCC21 VSS49 VSS169
K22 VCC22 VSS50 F4 PSI 2 1 E1 PSI VSS170 AD25
1

C280 C34 C310 C307 C329 C335 C26 C285 C333 C308 U5 F5 AE3
VCC23 VSS51 VSS171

2
V6 VCC24 VSS52 F7 R6 VSS100 VSS172 AE6
10U_4V 10U_4V 10U_4V 10U_4V 10U_4V 10U_4V 10U_4V 10U_4V 10U_4V 10U_4V V22 F9 R33 R22 AE8
2

VCC25 VSS53 *0_NC VSS101 VSS173


W5 VCC26 VSS54 F11 R25 VSS102 VSS174 AE10
W21 VCC27 VSS55 F13 T3 VSS103 VSS175 AE12
Y6 F15 11,15,42 STP_CPU# T5 AE14

1
VCC28 VSS56 VSS104 VSS176
Y22 VCC29 VSS57 F17 T21 VSS105 VSS177 AE16
VHCORE VHCORE AA5 F19 T23 AE18
VCC30 VSS58 VSS106 VSS178
AA7 VCC31 VSS59 F21 NO PSI (Power Saving T26 VSS107 VSS179 AE20
AA9 VCC32 VSS60 F24 Indicator ) U2 VSS108 VSS180 AE23
AA11 VCC33 VSS61 G2 U6 VSS109 VSS181 AE26
1

C291 C309 C278 C283 C336 C332 C330 C289 C304 C306 AA13 G6 U22 AF2
VCC34 VSS62 VSS110 VSS182
AA15 VCC35 VSS63 G22 U24 VSS111 VSS183 AF5
10U_4V 10U_4V 10U_4V 10U_4V 10U_4V 10U_4V 10U_4V 10U_4V 10U_4V 10U_4V AA17 G23 DothanA DothanB V1 AF9
2

C VCC36 VSS64 VSS112 VSS184 C


AA19 VCC37 VSS65 G26 V4 VSS113 VSS185 AF11
AA21 VCC38 VSS66 H3 V5 VSS114 VSS186 AF13
AB6 VCC39 VSS67 H5 R26 NC Install V21 VSS115 VSS187 AF15
AB8 VCC40 VSS68 H21 V25 VSS116 VSS188 AF17
VHCORE AB10 H25 W3 AF19
VCC41 VSS69 VSS117 VSS189
AB12 VCC42 VSS70 J1 W6 VSS118 VSS190 AF21
AB14 VCC43 VSS71 J4 W22 VSS119 VSS191 AF24
AB16 VCC44 VSS72 J6
2

C279 C331 C303 C282 C305 AB18 J22


VCC45 VSS73
AB20 VCC46 VSS74 J24
10U_4V 10U_4V 10U_4V 10U_4V 10U_4V AB22 K2 Dothan Processor
1

VCC47 VSS75
AC9 VCC48 VSS76 K5
AC11 VCC49 VSS77 K21
AC13 VCC50 VSS78 K23
AC15 K26
VHCORE AC17
VCC51
VCC52
VSS79
VSS80 L3
AC19 L6
Total caps = 1670 uF > 1430 uF (Intel Recommendation) AD8
VCC53
VCC54
VSS81
VSS82 L22
AD10 L25
ESR = 9m ohm/4 // 5m ohm/35 ---> = 0.1343m ohm AD12
VCC55
VCC56
VSS83
VSS84 M1
AD14 VCC57 VSS85 M4
AD16 VCC58 VSS86 M5
AD18 VCC59 VSS87 M21
VCCP AE9 M24
VCCP VCC60 VSS88
AE11 VCC61 VSS89 N3
AE13 VCC62 VSS90 N6
AE15 VCC63 VSS91 N22
AE17 VCC64 VSS92 N23
1

C314 C325 C322 C315 C321 C313 C317 C316 C323 C324 AE19 N26
C43 VCC65 VSS93
D + AF8 VCC66 VSS94 P2 D
150U/6.3V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V AF10 P5
2

VCC67 VSS95
AF12 P21
2

VCC68 VSS96
AF14
AF16
AF18
VCC69
VCC70
VSS97
VSS98
P24
R1
R4
QUANTA
VCC71 VSS99

Title
COMPUTER
C, mF---------ESR, mW-----------ESL, nH Dothan Processor Dothan Processor (POWER)

1 x 150 mF-----42 mW (typ) / 2--------2.5 nH / 12 Size Document Number R ev


10 x 0.1 mF----16 mW (typ) / 10-------0.6 nH / 10 Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 4 of 49


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

U11A
HXRCOMP HD#[0..63] HA#[3..31]
3 HD#[0..63] HA#[3..31] 3
One pulled-down HD#0 E4 G9 HA#3
HD0# HA3#
1

HD#1 E1 C9 HA#4
R44 resistor per pin. HD#2 F4
HD1# HA4#
E9 HA#5
A
HD#3 HD2# HA5# HA#6 A
24.9/F Trace should be H7 HD3# HA6# B7
HD#4 E2 A10 HA#7
10-mil wide with HD#5 F1
HD4# HA7#
F9 HA#8
2

HD#6 HD5# HA8# HA#9


20-mil spacing. E3 HD6# HA9# D8
HD#7 D3 B10 HA#10
HD#8 HD7# HA10# HA#11
K7 HD8# HA11# E10
HD#9 F2 G10 HA#12
VCCP HD#10 HD9# HA12# HA#13
J7 HD10# HA13# D9
HD#11 J8 E11 HA#14
HD#12 HD11# HA14# HA#15
H6 HD12# HA15# F10
1

HD#13 F3 G11 HA#16


R43 HD#14 HD13# HA16# HA#17
K8 HD14# HA17# G13
54.9/F HD#15 H5 C10 HA#18
HD#16 HD15# HA18# HA#19
H1 HD16# HA19# C11
HD#17 H2 D11 HA#20
2

HXSCOMP HD#18 HD17# HA20# HA#21


K5 HD18# HA21# C12
HD#19 K6 B13 HA#22
HD#20 HD19# HA22# HA#23
J4 HD20# HA23# A12
VCCP HD#21 G3 F12 HA#24 VCCP
HD#22 HD21# HA24# HA#25
H3 HD22# HA25# G12
HD#23 J1 E12 HA#26
HD#24 HD23# HA26# HA#27
L5 HD24# HA27# C13
1

Signal voltage HD#25 K4 B11 HA#28


HD25# HA28#

2
R48 HD#26 J5 D13 HA#29
221/F level = HD#27 P7
HD26# HA29#
A13 HA#30 R284
HD#28 HD27# HA30# HA#31
0.3125*VCCP. L7 HD28# HA31# F13 100/F
HD#29 J3
2

HXSWING C1a=0.1 µF. C1b=0.1 HD#30 P5


HD29#
F8 ADS# 3

1
HD#31 HD30# HADS#
µF.Trace should be L3 HD31# HADSTB0# B9 HADSTB0# 3 Signal voltage level = 2/3 of
1

B HD#32 U7 E13 B
10-mil wide with HD32# HADSTB1# HADSTB1# 3 VCCP. One 0.1 µF decoupling
2

R50 C72 HD#33 V6 J11 HVREF


HD#34 HD33# HVREF
100/F 20-mil spacing.. R6 HD34# HBNR# A5 BNR# 3 capacitor should be placed 100
.1U_10V HD#35 R5 D5 BPRI# 3
1

HD35# HBPRI# mils or less from GMCH pin.

1
HD#36 P3 E7 HBREQ0# 3
2

HD36# BREQ0#

1
HOST
HD#37 T8 H10 C381 R276
HD37# HCPURST# CPURST# 3
HD#38 R7 .1U_10V 200/F
HD#39 HD38#
R8

2
HD#40 HD39#
U8

2
H YRCOMP HD#41 HD40#
R4 HD41# HCLKINN AB1 HCLK_MCH# 15
HD#42 T4 AB2
HD42# HCLKINP HCLK_MCH 15
One pulled-down HD#43 T5 HD43#
1

HD#44 R1 C6
resistor per pin. HD44# HDBSY# DBSY# 3
R63 HD#45 T3 E6
HD45# HDEFER# DEFER# 3
Trace should be HD#46
24.9/F
HD#47
V8
U6
HD46# HDINV#0 H8
K3
HDBI0# 3 Concern about HVREF
10-mil wide with HD47# HDINV#1 HDBI1# 3
HD#48 W6 T7 HDBI2# 3 Trace Length & Width
2

HD#49 HD48# HDINV#2


20-mil spacing. U3 HD49# HDINV#3 U5 HDBI3# 3
HD#50 V5 G6
HD50# HDPWR# DPWR# 3
HD#51 W8 F7
HD51# HDRDY# DRDY# 3
HD#52 W7 G4
HD52# HDSTBN0# HDSTBN0# 3
HD#53 U2 K1
HD53# HDSTBN1# HDSTBN1# 3
VCCP HD#54 U1 R3
HD54# HDSTBN2# HDSTBN2# 3
HD#55 Y5 V3
HD55# HDSTBN3# HDSTBN3# 3
HD#56 Y2 G5
HD56# HDSTBP0# HDSTBP0# 3
1

HD#57 V4 K2
HD57# HDSTBP1# HDSTBP1# 3
R51 HD#58 Y7 R2
HD58# HDSTBP2# HDSTBP2# 3
54.9/F HD#59 W1 W4
HD59# HDSTBP3# HDSTBP3# 3
HD#60 W3 F6 T77
HD#61 HD60# HEDRDY# PAD
Y3 D4 HIT# 3
2

C
HYSCOMP HD#62 HD61# HHIT# C
Y6 HD62# HHITM# D6 HITM# 3
HD#63 W2 B3
HD63# HLOCK# HLOCK# 3
A11 T15
VCCP HXRCOMP HPCREQ# PAD
C1 HXRCOMP HREQ0# A7 HREQ#0 3
HXSCOMP C2 D7
HXSCOMP HREQ1# HREQ#1 3
HXSWING D1 B8
HXSWING HREQ2# HREQ#2 3
H YRCOMP T1 C7
HYRCOMP HREQ3# HREQ#3 3
1

Signal voltage HYSCOMP L1 A8


HYSCOMP HREQ4# HREQ#4 3
R53 HYSW ING P1 A4
level = HYSWING HRS0# RS#0 3
221/F HRS1# C5 RS#1 3
0.3125*VCCP. B4 R37
HRS2# RS#2 3
G8 HCPUSLP#_GMCH 1 2 CPUSLP# 3,10
2

HYSW ING C1a=0.1 µF. C1b=0.1 HCPUSLP#


B5
HTRDY# HTRDY# 3
µF.Trace should be 0
1

10-mil wide with


2

R56 C82 ALVISO


100/F 20-mil spacing..
.1U_10V
Do not install R37 for Dothan-A and
1

install for Dothan-B


2

Concern about Trace Length and Width

D D

QUANTA
Title
COMPUTER
Alviso (Host)

Size Document Number R ev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 5 of 49


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

CFG6
CFG[2:0]

1
VCCP
001=FSB533 R254
010=FSB800 2.2K

1
101=FSB400
R286 Low=DDR2 VCC3G_PCIE

2
10K
High=DDR1 U11F R268 24.9/F
U11C VCC3G_PCIE_R 1
16 SDVO_CTRLDATA H24 D36 2

2
SDVOCTRL_DATA EXP_COMPI

MISC
AA31 G16 CFG0 H25 D34
11 DMI_TXN0 DMIRXN0 CFG0 16 SDVO_CTRLCLK SDVOCTRL_CLK EXP_ICOMPO
AB35 H13 SELPSB1_CLK AB29
11 DMI_TXN1 DMIRXN1 CFG1 SELPSB1_CLK 4,15 15 CLK_MCH_3GPLL# GCLKN
AC31 G14 SELPSB2_CLK AC29 E30
11 DMI_TXN2 DMIRXN2 CFG2 SELPSB2_CLK 4,15 15 CLK_MCH_3GPLL GCLKP EXP_RXN0
AD35 F16 CFG3 T66 PAD F34
A 11 DMI_TXN3 DMIRXN3 CFG3 EXP_RXN1 SDVOB_INT- 16 A
F15 CFG4 T68 PAD G30
CFG4 CFG5 EXP_RXN2
CFG5 G15 18,38 TV_COMP A15 TVDAC_A EXP_RXN3 H34

1
Y31 E16 CFG6 C16 J30
11 DMI_TXP0 DMIRXP0 CFG6 T59 PAD 18,38 TV_Y/G TVDAC_B EXP_RXN4
AA35 D17 CFG7 R273 A17 K34
11 DMI_TXP1 DMIRXP1 CFG7 T53 PAD 18,38 TV_C/R TVDAC_C EXP_RXN5

TV
AB31 J16 CFG8 *2.2K_NC 1 2 J18 L30
11 DMI_TXP2 DMIRXP2 CFG8 T74 PAD TV_REFSET EXP_RXN6
AC35 D15 CFG9 B15 M34
11 DMI_TXP3 DMIRXP3 CFG9 TV_IRTNA EXP_RXN7
E15 CFG10 R241 150/F R277 B16 N30

2
CFG10 CFG11 4.99K/F TV_IRTNB EXP_RXN8
CFG11 D14 1 2 B17 TV_IRTNC EXP_RXN9 P34
AA33 E14 CFG12 R248 150/F R30
11 DMI_RXN0 DMITXN0 CFG12 T48 PAD EXP_RXN10
AB37 H12 CFG13 Low=DMIx2 1 2 T34
11 DMI_RXN1 DMITXN1 CFG13 T67 PAD EXP_RXN11
AC33 C14 CFG14 High=DMIx4 R243 150/F U30
11 DMI_RXN2 DMITXN2 CFG14 T49 PAD EXP_RXN12
AD37 H15 CFG15 1 2 V34

DMI
11 DMI_RXN3 DMITXN3 CFG15 T71 PAD EXP_RXN13
J15 CFG16 W30
CFG16 T75 PAD EXP_RXN14
H14 CFG17 +2.5VRUN E24 Y34
CFG17 18 CLK_DDC2 DDCCLK EXP_RXN15
Y33 G22 CFG18 R269 *1K_NC E23
11 DMI_RXP0 DMITXP0 CFG18 18 DAT_DDC2 DDCDATA
AA37 G23 CFG19 R271 *1K_NC R267 *150/F_NC E21 D30
11 DMI_RXP1 DMITXP1 CFG19 18,38 VGA_BLU BLUE EXP_RXP0
AB33 D23 CFG20 1 2 D21 E34

CFG/RSVD
11 DMI_RXP2 DMITXP2 CFG20 T138 BLUE# EXP_RXP1 SDVOB_INT+ 16
AC37 G25 PAD R251 *150/F_NC C20 F30
11 DMI_RXP3 DMITXP3 RSVD21 18,38 VGA_GRN GREEN EXP_RXP2

VGA
RSVD22 G24 1 2 B20 GREEN# EXP_RXP3 G34
J17 R242 *150/F_NC A19 H30
RSVD23 18,38 VGA_RED RED EXP_RXP4
AM33 A31 1 2 B19 J34

PCI-EXPRESS GRAPHICS
13 CLK_SDRAM0 SM_CK0 RSVD24 RED# EXP_RXP5
AL1 A30 R275 1 2 39 H21 K30
13 CLK_SDRAM1 SM_CK1 RSVD25 18 VGAVSYNC VSYNC EXP_RXP6
PAD T94 CLK_SDRAM2 AE11 D26 VCCP R274 1 2 39 G21 L34
SM_CK2 RSVD26 18 VGAHSYNC HSYNC EXP_RXP7
13 CLK_SDRAM3 AJ34 SM_CK3 RSVD27 D25 1 2 J20 REFSET EXP_RXP8 M30
13 CLK_SDRAM4 AF6 SM_CK4 EXP_RXP9 N34
CLK_SDRAM5 AC10 R285 P30
PAD T89 SM_CK5 EXP_RXP10

2
255/F R34
R49 EXP_RXP11
13 CLK_SDRAM0# AN33 SM_CK0# EXP_RXP12 T30
AK1 U34
DDR MUXING

13 CLK_SDRAM1# SM_CK1# EXP_RXP13


B CLK_SDRAM2# AE10 56 E25 V30 B
PAD T90 SM_CK2# 25 BIA_PWM LBKLT_CTRL EXP_RXP14
13 CLK_SDRAM3# AJ33 17 FPBACK F25 W34

1
SM_CK3# LBKLT_EN EXP_RXP15
13 CLK_SDRAM4# AF5 SM_CK4# C23 LCTLA_CLK
PAD T91 CLK_SDRAM5# AD10 C22 E32 SDVOB_R-_C
SM_CK5# LCTLB_DATA EXP_TXN0 SDVOB_G-_C
BM_BUSY# J23 PM_BMBUSY# 11 17 DDC_CLK F23 LDDC_CLK EXP_TXN1 F36
CKE0 AP21 J21 PM_EXTTS#0 F22 G32 SDVOB_B-_C
13,14 CKE0 SM_CKE0 EXT_TS0# 17 DDC_DATA LDDC_DATA EXP_TXN2
CKE1 AM21 H22 PM_EXTTS#1 F26 H36 SDVOB_CLK-_C
13,14 CKE1 SM_CKE1 EXT_TS1# 17,26 FPVCC LVDD_EN EXP_TXN3

LVDS
CKE2 AH21 F5 1 2 C33 J32
13,14 CKE2 SM_CKE2 THRMTRIP# THERMTRIP_GMCH# 31 LIBG EXP_TXN4
CKE3 AK21 AD30 C31 K36
PM

13,14 CKE3 SM_CKE3 PWROK IMVP_PWRGD 11,39,42 LVBG EXP_TXN5


AE29 PLTRST#_R 1 2 R247 F28 L32
SM_CS0# RSTIN# R312 100 PLTRST# 10,11,16,19,25 1.5K/F LVREFH EXP_TXN6
13,14 SM_CS0# AN16 SM_CS0# F27 LVREFL EXP_TXN7 M36
SM_CS1# AM14 A24 DOT96# REFCLK/SSCLK N32
13,14 SM_CS1# SM_CS1# DREF_CLKN DOT96# 15 EXP_TXN8
SM_CS2# AH15 A23 DOT96 B30 P36
13,14 SM_CS2# SM_CS2# DREF_CLKP DOT96 15 17 TXLCLKOUT- LACLKN EXP_TXN9
SM_CS3# AG16 C37 DREFSSCLK#_R B29 R32
LCK

13,14 SM_CS3# SM_CS3# DREF_SSCLKN 17 TXLCLKOUT+ LACLKP EXP_TXN10


D37 DREFSSCLK_R C25 T36
M_OCDCOMP0 DREF_SSCLKP LBCLKN EXP_TXN11
AF22 SM_OCDCOMP0 C24 LBCLKP EXP_TXN12 U32
M_OCDCOMP1 AF16 AP37 TP_NC1 T40 PAD V36
SM_OCDCOMP1 NC1 TP_NC2 EXP_TXN13
NC2 AN37 T39 PAD 17 TXLOUT0- B34 LADATAN0 EXP_TXN14 W32
1

AP14 AP36 TP_NC3 T42 PAD B33 Y36


13,14 M_ODT0 SM_ODT0 NC3 17 TXLOUT1- LADATAN1 EXP_TXN15
AL15 AP2 TP_NC4 T98 PAD B32
13,14 M_ODT1 SM_ODT1 NC4 17 TXLOUT2- LADATAN2
R315 AM11 AP1 TP_NC5 T41 PAD D32 SDVOB_R+_C
13,14 M_ODT2 SM_ODT2 NC5 EXP_TXP0
R314 AN10 AN1 TP_NC6 T97 PAD A34 E36 SDVOB_G+_C
13,14 M_ODT3 SM_ODT3 NC6 17 TXLOUT0+ LADATAP0 EXP_TXP1
*40.2/F_NC B1 TP_NC7 T16 PAD A33 F32 SDVOB_B+_C
17 TXLOUT1+
2

M_RCOMPN NC7 TP_NC8 LADATAP1 EXP_TXP2 SDVOB_CLK+_C


AK10 A2 T17 PAD B31 G36
NC

SMRCOMPN NC8 17 TXLOUT2+ LADATAP2 EXP_TXP3


M_RCOMPP AK11 B37 TP_NC9 T12 PAD H32
SMRCOMPP NC9 TP_NC10 EXP_TXP4
SMDDR_VREF AF37 SMVREF0 NC10 A36 T14 PAD C29 LBDATAN0 EXP_TXP5 J36
*40.2/F_NC AD1 A37 TP_NC11 T13 PAD D28 K32
SMXSLEW SMVREF1 NC11 LBDATAN1 EXP_TXP6
AE27 SMXSLEWIN C27 LBDATAN2 EXP_TXP7 L36
AE28 SMXSLEWOUT EXP_TXP8 M32
SMYSLEW AF9 C28 N36
C SMYSLEWIN LBDATAP0 EXP_TXP9 C
AF10 SMYSLEWOUT D27 LBDATAP1 EXP_TXP10 P32
C26 LBDATAP2 EXP_TXP11 R36
ALVISO EXP_TXP12 T32
EXP_TXP13 U36
SMDDR_VREF RP2 V32
DREFSSCLK#_R EXP_TXP14
1 2 DREFSSCLK# 17 EXP_TXP15 W36
DREFSSCLK_R 3 4 DREFSSCLK 17
ALVISO
1

*4P2R-S-0_NC
C714 C715
.1U_10V .1U_10V RP12
2

DREFSSCLK#_R 3 4 SDVOB_R-_C C67 1 2 .1U_10V


DOT100#_SS 15 SDVOB_R- 16
Place these 2 Caps near DREFSSCLK_R 1 2 SDVOB_G-_C C49 1 2 .1U_10V
DOT100_SS 15 SDVOB_G- 16
Alviso SMVREF pins. SDVOB_B-_C C69 1 2 .1U_10V
SDVOB_B- 16
4P2R-S-0 SDVOB_CLK-_C C51 1 2 .1U_10V
SDVOB_CLK- 16
SDVOB_R+_C C66 1 2 .1U_10V
SDVOB_R+ 16
SDVOB_G+_C C48 1 2 .1U_10V
SDVOB_G+ 16
Populate RP2 if using CK-SSCD. SDVOB_B+_C C68 1 2 .1U_10V
SDVOB_B+ 16
+1_8VSUS SDVOB_CLK+_C C50 1 2 .1U_10V
Populate Rp12 if using CK410M +2.5VRUN
SDVOB_CLK+ 16
R282 10K
1

1 2 PM_EXTTS#0
R326
80.6/F R283 10K
1 2 PM_EXTTS#1 SDVO Output
2

M_RCOMPN

D M_RCOMPP For Memory throttling D


1

R318
80.6/F QUANTA
External Thermal Sensor Input COMPUTER
2

Title
Alviso (VGA,DMI)
On-Die OCD driver Size
CustomDocument Number R ev
compensation (DDR2 only) Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 6 of 49


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

A A

13 R_A_MD[0..63] U11B 13 R_B_MD[0..63] U11G


R_A_MD0 AG35 AK15 R_A_BS0# R_B_MD0 AE31 AJ15 R_B_BS0#
SADQ0 SA_BS0# R_A_BS0# 13,14 SBDQ0 SB_BS0# R_B_BS0# 13,14
R_A_MD1 AH35 AK16 R_A_BS1# R_B_MD1 AE32 AG17 R_B_BS1#
SADQ1 SA_BS1# R_A_BS1# 13,14 SBDQ1 SB_BS1# R_B_BS1# 13,14
R_A_MD2 AL35 AL21 R_A_BS2# R_B_MD2 AG32 AG21 R_B_BS2#
SADQ2 SA_BS2# R_A_BS2# 13,14 SBDQ2 SB_BS2# R_B_BS2# 13,14
R_A_MD3 AL37 R_B_MD3 AG36
SADQ3 R_A_DM[0..7] 13 SBDQ3 R_B_DM[0..7] 13
R_A_MD4 AH36 AJ37 R_A_DM0 R_B_MD4 AE34 AF32 R_B_DM0
R_A_MD5 SADQ4 SA_DM0 R_A_DM1 R_B_MD5 SBDQ4 SB_DM0 R_B_DM1
AJ35 SADQ5 SA_DM1 AP35 AE33 SBDQ5 SB_DM1 AK34
R_A_MD6 AK37 AL29 R_A_DM2 R_B_MD6 AF31 AK27 R_B_DM2
R_A_MD7 SADQ6 SA_DM2 R_A_DM3 R_B_MD7 SBDQ6 SB_DM2 R_B_DM3
AL34 SADQ7 SA_DM3 AP24 AF30 SBDQ7 SB_DM3 AK24
R_A_MD8 AM36 AP9 R_A_DM4 R_B_MD8 AH33 AJ10 R_B_DM4
R_A_MD9 SADQ8 SA_DM4 R_A_DM5 R_B_MD9 SBDQ8 SB_DM4 R_B_DM5
AN35 SADQ9 SA_DM5 AP4 AH32 SBDQ9 SB_DM5 AK5
R_A_MD10 AP32 AJ2 R_A_DM6 R_B_MD10 AK31 AE7 R_B_DM6
R_A_MD11 SADQ10 SA_DM6 R_A_DM7 R_B_MD11 SBDQ10 SB_DM6 R_B_DM7
AM31 SADQ11 SA_DM7 AD3 AG30 SBDQ11 SB_DM7 AB7
R_A_MD12 AM34 R_B_MD12 AG34
SADQ12 R_A_DQS[0..7] 13 SBDQ12 R_B_DQS[0..7] 13
R_A_MD13 AM35 AK36 R_A_DQS0 R_B_MD13 AG33 AF34 R_B_DQS0
R_A_MD14 SADQ13 SA_DQS0 R_A_DQS1 R_B_MD14 SBDQ13 SB_DQS0 R_B_DQS1
AL32 SADQ14 SA_DQS1 AP33 AH31 SBDQ14 SB_DQS1 AK32
R_A_MD15 AM32 AN29 R_A_DQS2 R_B_MD15 AJ31 AJ28 R_B_DQS2
R_A_MD16 SADQ15 SA_DQS2 R_A_DQS3 R_B_MD16 SBDQ15 SB_DQS2 R_B_DQS3
AN31 SADQ16 SA_DQS3 AP23 AK30 SBDQ16 SB_DQS3 AK23
R_A_MD17 AP31 AM8 R_A_DQS4 R_B_MD17 AJ30 AM10 R_B_DQS4
R_A_MD18 SADQ17 SA_DQS4 R_A_DQS5 R_B_MD18 SBDQ17 SB_DQS4 R_B_DQS5
AN28 SADQ18 SA_DQS5 AM4 AH29 SBDQ18 SB_DQS5 AH6
R_A_MD19 AP28 AJ1 R_A_DQS6 R_B_MD19 AH28 AF8 R_B_DQS6
R_A_MD20 SADQ19 SA_DQS6 R_A_DQS7 R_B_MD20 SBDQ19 SB_DQS6 R_B_DQS7
AL30 SADQ20 SA_DQS7 AE5 AK29 SBDQ20 SB_DQS7 AB4
B R_A_MD21 AM30 R_B_MD21 AH30 B
SADQ21 R_A_DQS#[0..7] 13 SBDQ21 R_B_DQS#[0..7] 13
R_A_MD22 AM28 AK35 R_A_DQS#0 R_B_MD22 AH27 AF35 R_B_DQS#0
R_A_MD23 SADQ22 SA_DQS0# R_A_DQS#1 R_B_MD23 SBDQ22 SB_DQS0# R_B_DQS#1
AL28 SADQ23 SA_DQS1# AP34 AG28 SBDQ23 SB_DQS1# AK33
R_A_MD24 AP27 AN30 R_A_DQS#2 R_B_MD24 AF24 AK28 R_B_DQS#2
R_A_MD25 SADQ24 SA_DQS2# R_A_DQS#3 R_B_MD25 SBDQ24 SB_DQS2# R_B_DQS#3
AM27 SADQ25 SA_DQS3# AN23 AG23 SBDQ25 SB_DQS3# AJ23
R_A_MD26 AM23 AN8 R_A_DQS#4 R_B_MD26 AJ22 AL10 R_B_DQS#4
DDR SYSTEM MEMORY A

R_A_MD27 SADQ26 SA_DQS4# R_A_DQS#5 R_B_MD27 SBDQ26 SB_DQS4# R_B_DQS#5

DDR SYSTEM MEMORY B


AM22 SADQ27 SA_DQS5# AM5 AK22 SBDQ27 SB_DQS5# AH7
R_A_MD28 AL23 AH1 R_A_DQS#6 R_B_MD28 AH24 AF7 R_B_DQS#6
R_A_MD29 SADQ28 SA_DQS6# R_A_DQS#7 R_B_MD29 SBDQ28 SB_DQS6# R_B_DQS#7
AM24 SADQ29 SA_DQS7# AE4 AH23 SBDQ29 SB_DQS7# AB5
R_A_MD30 AN22 R_B_MD30 AG22
SADQ30 R_A_MA[0..13] 13,14 SBDQ30 R_B_MA[0..13] 13,14
R_A_MD31 AP22 AL17 R_A_MA0 R_B_MD31 AJ21 AH17 R_B_MA0
R_A_MD32 SADQ31 SA_MA0 R_A_MA1 R_B_MD32 SBDQ31 SB_MA0 R_B_MA1
AM9 SADQ32 SA_MA1 AP17 AG10 SBDQ32 SB_MA1 AK17
R_A_MD33 AL9 AP18 R_A_MA2 R_B_MD33 AG9 AH18 R_B_MA2
R_A_MD34 SADQ33 SA_MA2 R_A_MA3 R_B_MD34 SBDQ33 SB_MA2 R_B_MA3
AL6 SADQ34 SA_MA3 AM17 AG8 SBDQ34 SB_MA3 AJ18
R_A_MD35 AP7 AN18 R_A_MA4 R_B_MD35 AH8 AK18 R_B_MA4
R_A_MD36 SADQ35 SA_MA4 R_A_MA5 R_B_MD36 SBDQ35 SB_MA4 R_B_MA5
AP11 SADQ36 SA_MA5 AM18 AH11 SBDQ36 SB_MA5 AJ19
R_A_MD37 AP10 AL19 R_A_MA6 R_B_MD37 AH10 AK19 R_B_MA6
R_A_MD38 SADQ37 SA_MA6 R_A_MA7 R_B_MD38 SBDQ37 SB_MA6 R_B_MA7
AL7 SADQ38 SA_MA7 AP20 AJ9 SBDQ38 SB_MA7 AH19
R_A_MD39 AM7 AM19 R_A_MA8 R_B_MD39 AK9 AJ20 R_B_MA8
R_A_MD40 SADQ39 SA_MA8 R_A_MA9 R_B_MD40 SBDQ39 SB_MA8 R_B_MA9
AN5 SADQ40 SA_MA9 AL20 AJ7 SBDQ40 SB_MA9 AH20
R_A_MD41 AN6 AM16 R_A_MA10 R_B_MD41 AK6 AJ16 R_B_MA10
R_A_MD42 SADQ41 SA_MA10 R_A_MA11 R_B_MD42 SBDQ41 SB_MA10 R_B_MA11
AN3 SADQ42 SA_MA11 AN20 AJ4 SBDQ42 SB_MA11 AG18
R_A_MD43 AP3 AM20 R_A_MA12 R_B_MD43 AH5 AG20 R_B_MA12
R_A_MD44 SADQ43 SA_MA12 R_A_MA13 R_B_MD44 SBDQ43 SB_MA12 R_B_MA13
AP6 SADQ44 SA_MA13 AM15 AK8 SBDQ44 SB_MA13 AG15
R_A_MD45 AM6 R_B_MD45 AJ8
R_A_MD46 SADQ45 SBDQ45
AL4 SADQ46 SA_CAS# AN15 R_A_SCASA# R_A_SCASA# 13,14
R_B_MD46 AJ5 SBDQ46 SB_CAS# AH14 R_B_SCASA# R_B_SCASA# 13,14
R_A_MD47 AM3 AP16 R_A_SRASA# R_B_MD47 AK4 AK14 R_B_SRASA#
SADQ47 SA_RAS# R_A_SRASA# 13,14 SBDQ47 SB_RAS# R_B_SRASA# 13,14
R_A_MD48 AK2 AF29 R_B_MD48 AG5 AF15
R_A_MD49 SADQ48 SA_RCVENIN# PAD R_B_MD49 SBDQ48 SB_RCVENIN# PAD
AK3 SADQ49 SA_RCVENOUT# AF28 T123 AG4 SBDQ49 SB_RCVENOUT# AF14 T124
R_A_MD50 AG2 AP15 R_A_BMWEA# R_B_MD50 AD8 AH16 R_B_BMWEA#
C SADQ50 SA_WE# R_A_BMWEA# 13,14 SBDQ50 SB_WE# R_B_BMWEA# 13,14 C
R_A_MD51 AG1 R_B_MD51 AD9
R_A_MD52 SADQ51 R_B_MD52 SBDQ51
AL3 SADQ52 AH4 SBDQ52
R_A_MD53 AM2 R_B_MD53 AG6
R_A_MD54 SADQ53 R_B_MD54 SBDQ53
AH3 SADQ54 AE8 SBDQ54
R_A_MD55 AG3 R_B_MD55 AD7
R_A_MD56 SADQ55 R_B_MD56 SBDQ55
AF3 SADQ56 AC5 SBDQ56
R_A_MD57 AE3 R_B_MD57 AB8
R_A_MD58 SADQ57 R_B_MD58 SBDQ57
AD6 SADQ58 AB6 SBDQ58
R_A_MD59 AC4 R_B_MD59 AA8
R_A_MD60 SADQ59 R_B_MD60 SBDQ59
AF2 SADQ60 AC8 SBDQ60
R_A_MD61 AF1 R_B_MD61 AC7
R_A_MD62 SADQ61 R_B_MD62 SBDQ61
AD4 SADQ62 AA4 SBDQ62
R_A_MD63 AD5 R_B_MD63 AA5
SADQ63 SBDQ63

ALVISO ALVISO

D D

QUANTA
Title
COMPUTER
Alviso (DDR)

Size Document Number R ev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 7 of 49


1 2 3 4 5 6 7 8
5 4 3 2 1

VCCP T29 F17 VCC_TVDACA_R R219 0 L29


VCC0 VCCA_TVDACA0 VCC_TVDACA_R VCC_TVDACA
R29 VCC1 VCCA_TVDACA1 E17 1 2 2 1 +3VRUN
N29 D18 VCC_TVDACB_R BLM18PG181SN1
VCC2 VCCA_TVDACB0

1
M29 C18 3 1 C339
VCC3 VCCA_TVDACB1 VCC_TVDACC_R C338
K29 VCC4 VCCA_TVDACC0 F18

1
J29 E18 C340 .022U .1U_10V

2
C393 C385 C388 C55 C78 C56 VCC5 VCCA_TVDACC1 *22nF_3P_NC
V28 VCC6
.1U_10V .1U_10V .1U_10V 10U_4V 10U_4V 10U_4V U28 H18 VCC_TVBG_R

2
VCC7 VCCA_TVBG VSS_TVBG
T28 VCC8 VSSA_TVBG G18
R28 R39 0 L14
VCC9 VCCD_TVDAC_R VCC_TVDACB_R VCC_TVDACB
P28 VCC10 VCCD_TVDAC D19 1 2 2 1 +3VRUN
N28 H17 VCCQ_TVDAC_R BLM18PG181SN1
VCC11 VCCDQ_TVDAC

1
M28 3 1 C65
VCC12 C52
D
L28 VCC13 VCCD_LVDS0 B26 +1_5VRUN D
K28 B25 C62 .022U .1U_10V

2
VCC14 VCCD_LVDS1

1
J28 A25 *22nF_3P_NC
VCC15 VCCD_LVDS2 C363 C45
H28 VCC16
G28 A35 .1U_10V 10U_4V

2
VCC17 VCCA_LVDS R226 0 L30
V27 VCC18
U27 B22 VCC_TVDACC_R 1 2 VCC_TVDACC 2 1 +3VRUN
VCC19 VCCHV0 BLM18PG181SN1
T27 VCC20 VCCHV1 B21

1
R27 A21 +2.5VRUN 3 1 C344
VCC21 VCCHV2 C343
P27 VCC22

1
+1_5VRUN N27 AM37 C355 C351 .022U .1U_10V

2
VCC23 VCCSM0 C367 *22nF_3P_NC
M27 VCC24 VCCSM1 AH37
L27 AP29 .01U .1U_10V

2
VCC25 VCCSM2 R36 0 L13
K27 VCC26 VCCSM3 AD28
J27 AD27 VCC_TVBG_R 1 2 VCC_TVBG 2 1 +3VRUN
VCC27 VCCSM4 BLM18PG181SN1
H27 VCC28 VCCSM5 AC27

1
K26 AP26 +2.5VRUN 3 1 C46 C716
VCC29 VCCSM6 C47
H26 VCC30 VCCSM7 AN26

1
K25 AM26 C58 .022U .1U_10V 2.2U_6.3V

2
VCC31 VCCSM8 C361 C53 VSS_TVBG *22nF_3P_NC
J25 VCC32 VCCSM9 AL26
L12 K24 U11H AK26 .1U_10V 10U_4V

2
VCCA_DPLLA VCC33 ALVISO VCCSM10
2 1 K23 VCC34 VCCSM11 AJ26
10uH K22 AH26
VCC35 VCCSM12
1

K21 VCC36 VCCSM13 AG26


1

C366 + C44 W20 AF26 R35 10


.1U_10V 470U_4V VCC37 VCCSM14
U20 VCC38 VCCSM15 AE26 2 1 +3VRUN
T20 AP25 C425 .1U_10V R227 0
2

VCC39 VCCSM16 V1.8_DDR_CAP1 VCCD_TVDAC_R VCCD_TVDAC


K20 VCC40 VCCSM17 AN25 1 2 1 2

1
V19 AM25

POWER
VCC41 VCCSM18

1
U19 AL25 C415 .1U_10V 3 1 C347 D6
L16 VCC42 VCCSM19 V1.8_DDR_CAP2 C342
C K19 VCC43 VCCSM20 AK25 1 2 RB751V C
2 1 VCCA_DPLLB W18 AJ25 C352 .022U .1U_10V

2
10uH VCC44 VCCSM21 C428 .1U_10V *22nF_3P_NC
V18 AH25

2
VCC45 VCCSM22
1

T18 AG25 V1.8_DDR_CAP5 1 2


VCC46 VCCSM23
1

C368 + C341 K18 AF25 R38 0 L15


.1U_10V 470U_4V VCC47 VCCSM24 VCCQ_TVDAC_R VCCQ_TVDAC
K17 VCC48 VCCSM25 AE25 1 2 2 1 +1_5VRUN
AE24 BLM18PG181SN1
2

VCCSM26

1
AC2 AE23 3 1 C64
VCCH_MPLL1 VCCSM27 C63
AC1 VCCH_MPLL0 VCCSM28 AE22
B23 AE21 C61 .022U .1U_10V

2
VCCA_DPLLA VCCSM29 +1_8VSUS *22nF_3P_NC
C35 VCCA_DPLLB VCCSM30 AE20
VCCA_HPLL AA1 AE19
VCCA_HPLL VCCSM31
AA2 VCCA_MPLL VCCSM32 AE18
VCCSM33 AE17
ALL PLL POWER VCCA_CRTDAC_R F19 AE16
VCCA_CRTDAC0 VCCSM34

1
Needs To Have E19 VCCA_CRTDAC1 VCCSM35 AE15
G19 AE14 C107 C106 Note: Choose the Inductor with Low-DC loss and
L18 Clear Power(No VSSA_CRTDAC VCCSM36 10U_4V 10U_4V
AP13

2
2 1 Any Noise) H20
VCCSM37
AN13 High-Impedance at over 100MHz to isolate
BLM11A121S VCC_SYNC VCCSM38
VCCSM39 AM13 SSN/SN(Switch Noise) from other aggressor .
1

K13 VTT0 VCCSM40 AL13


1

C88 + C86 J13 AK13


.1U_10V 150U_2V_L VTT1 VCCSM41 L20
K12 VTT2 VCCSM42 AJ13
W11 AH13 Note: All VCCSM pins VCC_DDRDLL 2 1 +1_5VRUN
2

VTT3 VCCSM43 BLM18PG330SN1


V11 VTT4 VCCSM44 AG13 shorted internally.

1
U11 VTT5 VCCSM45 AF13

1
T11 AE13 + C110
L19 VTT6 VCCSM46 100U C412
R11 VTT7 VCCSM47 AP12
2 1 VCCA_MPLL P11 AN12 .1U_10V

2
BLM11A121S VTT8 VCCSM48
N11 VTT9 VCCSM49 AM12
1

B B
M11 AL12 VCC3G_PCIE
VTT10 VCCSM50
1

C90 + C96 L11 AK12 L34


.1U_10V 150U_2V_L VTT11 VCCSM51 VCC3G_PCIE
K11 VTT12 VCCSM52 AJ12 Note: All VCCSM pins 2 1 +1_5VRUN

1
W10 AH12 shorted internally. BLM18PG330SN1
2

VTT13 VCCSM53

1
V10 AG12 + C74
VTT14 VCCSM54 C76 C77 150U_2V_L
U10 VTT15 VCCSM55 AF12
T10 AE12 10U_4V 10U_4V

2
VTT16 VCCSM56 C422 .1U_10V
R10 VTT17 VCCSM57 AD11
L31 R231 0 P10 AC11 1 2
VCCA_CRTDAC VTT18 VCCSM58 R278 L33
+2.5VRUN 2 1 1 2 N10 VTT19 VCCSM59 AB11
BLM18PG181SN1 M10 AB10 C423 .1U_10V VCCA_3GPLL 1 2 VCCA_3GPLL_R 2 1 +1_5VRUN
VTT20 VCCSM60
1

VCCP D16 R230 10 C345 C346 3 1 K10 AB9 1 2 BLM18PG181SN1


VTT21 VCCSM61
1

1
2 1 2 1 C723 .1U_10V .022U J10 AP8 V1.8_DDR_CAP6 0.5/F
C353 VTT22 VCCSM62 V1.8_DDR_CAP3 C91 .1U_10V C408 C376
Y9 AM1
2

*10U_4V_NC *22nF_3P_NC VTT23 VCCSM63 V1.8_DDR_CAP4 .1U_10V 10U_4V


RB751V W9 AE1 1 2
2

2
VTT24 VCCSM64
U9 VTT25
R9 VTT26 VCCTX_LVDS0 B28 +2.5VRUN
P9 VTT27 VCCTX_LVDS1 A28

1
N9 A27 VCCA_3GBG +2.5VRUN
+2.5VRUN VTT28 VCCTX_LVDS2 C373 C57
M9 VTT29

1
L9 AF20 VCC_DDRDLL .1U_10V 4.7U_10V_0805

2
VTT30 VCCA_SM0 C354
J9 VTT31 VCCA_SM1 AP19
N8 AF19 .1U_10V

2
VTT32 VCCA_SM2
1

C380 VCCP M8 AF18 VSSA_3GBG


.1U_10V VTT33 VCCA_SM3
N7 VTT34
M7 AE37 VCC3G_PCIE
2

VTT35 VCC3G0
N6 VTT36 VCC3G1 W37
C60 .47U_10V M6 U37
VCCP_GMCH_CAP1 VTT37 VCC3G2
1 2 A6 VTT38 VCC3G3 R37
A 1.05V(VTT - FSB POWER SUPPLY) N5 VTT39 VCC3G4 N37 A
M5 VTT40 VCC3G5 L37
VCCP N4 J37 ALL PLL POWER
VTT41 VCC3G6
C59
1
.47U_10V
2
M4
N3
M3
VTT42
VTT43 VCCA_3GPLL0 Y29
Y28
VCCA_3GPLL Needs To Have
Clear Power(No
QUANTA
VTT44 VCCA_3GPLL1
1

C409
2.2U_6.3V
C54
4.7U_10V_0805 C84 .22U_10V VCCP_GMCH_CAP2
N2
M2
VTT45
VTT46
VCCA_3GPLL2 Y27

VCCA_3GBG
Any Noise)
Title
COMPUTER
B2 F37
2

VCCP_GMCH_CAP3 VTT47 VCCA_3GBG VSSA_3GBG Alviso (Power)


1 2 V1 VTT48 VSSA_3GBG G37
N1 VTT49
C73 .22U_10V M1 Size Document Number R ev
VCCP_GMCH_CAP4 VTT50 Tahiti(DM3L) 1A
1 2 G1 VTT51
Date: 星期二, 三月 29, 2005 Sheet 8 of 49
5 4 3 2 1
A
B
C
D
VSSALVDS B36

B24 VSS135 VSS271 Y1


D24 VSS134 VSS270 D2
F24 VSS133 VSS269 G2
J24 J2

5
5

VSS132 VSS268
AG24 VSS131 VSS267 AL24
AJ24 VSS130 VSS266 AN24
E27 VSS129 VSS265 A26
G27 VSS128 VSS264 E26
W27 VSS127 VSS263 G26
L17 VCC_NCTF78 VSS_NCTF68 Y12 AA27 VSS126 VSS262 J26
M17 VCC_NCTF77 VSS_NCTF67 AA12 AB27 VSS125 VSS261 B27
N17 VCC_NCTF76 VSS_NCTF66 Y13 AF27 VSS124 VSS260 L2
P17 VCC_NCTF75 VSS_NCTF65 AA13 AG27 VSS123 VSS259 P2
T17 VCC_NCTF74 VSS_NCTF64 L14 AJ27 VSS122 VSS258 T2
U17 VCC_NCTF73 VSS_NCTF63 M14 AL27 VSS121 VSS257 V2
V17 VCC_NCTF72 VSS_NCTF62 N14 AN27 VSS120 VSS256 AD2
W17 VCC_NCTF71 VSS_NCTF61 P14 E28 VSS119 VSS255 AE2
L18 VCC_NCTF70 VSS_NCTF60 R14 W28 VSS118 VSS254 AH2
M18 VCC_NCTF69 VSS_NCTF59 T14 AA28 VSS117 VSS253 AL2
N18 VCC_NCTF68 VSS_NCTF58 U14 AB28 VSS116 VSS252 AN2
P18 VCC_NCTF67 VSS_NCTF57 V14 AC28 VSS115 VSS251 A3
R18 VCC_NCTF66 VSS_NCTF56 W14 A29 VSS114 VSS250 C3
Y18 VCC_NCTF65 VSS_NCTF55 Y14 D29 VSS113 VSS249 AA3
L19 VCC_NCTF64 VSS_NCTF54 AA14 E29 VSS112 VSS248 AB3
M19 VCC_NCTF63 VSS_NCTF53 AB14 F29 VSS111 VSS247 AC3
N19 VCC_NCTF62 VSS_NCTF52 L15 G29 VSS110 VSS246 AJ3
P19 VCC_NCTF61 VSS_NCTF51 M15 H29 VSS109 VSS245 C4
R19 VCC_NCTF60 VSS_NCTF50 N15 L29 VSS108 VSS244 H4
Y19 VCC_NCTF59 VSS_NCTF49 P15 P29 VSS107 VSS243 L4
L20 VCC_NCTF58 VSS_NCTF48 R15 U29 VSS106 VSS242 P4
M20 VCC_NCTF57 VSS_NCTF47 T15 V29 VSS105 VSS241 U4
N20 VCC_NCTF56 VSS_NCTF46 U15 W29 VSS104 VSS240 Y4
P20 VCC_NCTF55 VSS_NCTF45 V15 AA29 VSS103 VSS239 AF4
R20 VCC_NCTF54 VSS_NCTF44 W15 AD29 VSS102 VSS238 AN4
Y20 VCC_NCTF53 VSS_NCTF43 Y15 AG29 VSS101 VSS237 E5

4
4

L21 VCC_NCTF52 VSS_NCTF42 AA15 AJ29 VSS100 VSS236 W5


M21 VCC_NCTF51 VSS_NCTF41 AB15 AM29 VSS99 VSS235 AL5
N21 VCC_NCTF50 VSS_NCTF40 L16 C30 VSS98 VSS234 AP5
P21 VCC_NCTF49 VSS_NCTF39 M16 Y30 VSS97 VSS233 B6
T21 VCC_NCTF48 VSS_NCTF38 N16 AA30 VSS96 VSS232 J6
U21 VCC_NCTF47 VSS_NCTF37 P16 AB30 VSS95 VSS231 L6
V21 VCC_NCTF46 VSS_NCTF36 R16 AC30 VSS94 VSS230 P6
W21 VCC_NCTF45 VSS_NCTF35 T16 AE30 VSS93 VSS229 T6
L22 VCC_NCTF44 VSS_NCTF34 U16 AP30 VSS92 VSS228 AA6
M22 VCC_NCTF43 VSS_NCTF33 V16 D31 VSS91 VSS227 AC6
N22 VCC_NCTF42 VSS_NCTF32 W16 E31 VSS90 VSS226 AE6
P22 VCC_NCTF41 VSS_NCTF31 Y16 F31 VSS89 VSS225 AJ6
R22 VCC_NCTF40 VSS_NCTF30 AA16 G31 VSS88 VSS224 G7
T22 VCC_NCTF39 VSS_NCTF29 AB16 H31 VSS87 VSS223 V7
U22 VCC_NCTF38 VSS_NCTF28 R17 J31 VSS86 VSS222 AA7
V22 Y17 K31 AG7

U11D
VCC_NCTF37 VSS_NCTF27 VSS85 VSS221
W22 AA17 L31 AK7

ALVISO
VCC_NCTF36 VSS_NCTF26 VSS84 VSS220
L23 VCC_NCTF35 VSS_NCTF25 AB17 M31 VSS83 VSS219 AN7
M23 VCC_NCTF34 VSS_NCTF24 AA18 N31 VSS82 VSS218 C8
N23 VCC_NCTF33 VSS_NCTF23 AB18 P31 VSS81 VSS217 E8
P23 VCC_NCTF32 VSS_NCTF22 AA19 R31 VSS80 VSS216 L8
R23 AB19 T31 P8

NCTF
VCC_NCTF31 VSS_NCTF21 VSS79 VSS215
T23 VCC_NCTF30 VSS_NCTF20 AA20 U31 VSS78 VSS214 Y8
U23 AB20 V31 AL8
U11E

VCC_NCTF29 VSS_NCTF19 VSS77 VSS213


V23 R21 W31 A9
ALVISO

VCC_NCTF28 VSS_NCTF18 VSS76 VSS212


W23 VCC_NCTF27 VSS_NCTF17 Y21 AD31 VSS75 VSS211 H9
L24 VCC_NCTF26 VSS_NCTF16 AA21 AG31 VSS74 VSS210 K9
M24 VCC_NCTF25 VSS_NCTF15 AB21 AL31 VSS73 VSS209 T9
N24 VCC_NCTF24 VSS_NCTF14 Y22 A32 VSS72 VSS208 V9
VSS

P24 VCC_NCTF23 VSS_NCTF13 AA22 C32 VSS71 VSS207 AA9


R24 VCC_NCTF22 VSS_NCTF12 AB22 Y32 VSS70 VSS206 AC9
T24 Y23 AA32 AE9

3
3

VCC_NCTF21 VSS_NCTF11 VSS69 VSS205


U24 VCC_NCTF20 VSS_NCTF10 AA23 AB32 VSS68 VSS204 AH9
V24 VCC_NCTF19 VSS_NCTF9 AB23 AC32 VSS67 VSS203 AN9
W24 VCC_NCTF18 VSS_NCTF8 Y24 AD32 VSS66 VSS202 D10
L25 VCC_NCTF17 VSS_NCTF7 AA24 AJ32 VSS65 VSS201 L10
M25 VCC_NCTF16 VSS_NCTF6 AB24 AN32 VSS64 VSS200 Y10
N25 VCC_NCTF15 VSS_NCTF5 Y25 D33 VSS63 VSS199 AA10
P25 VCC_NCTF14 VSS_NCTF4 AA25 E33 VSS62 VSS198 F11
R25 VCC_NCTF13 VSS_NCTF3 AB25 F33 VSS61 VSS197 H11
T25 VCC_NCTF12 VSS_NCTF2 Y26 G33 VSS60 VSS196 Y11
U25 VCC_NCTF11 VSS_NCTF1 AA26 H33 VSS59 VSS195 AA11
V25 VCC_NCTF10 VSS_NCTF0 AB26 J33 VSS58 VSS194 AF11
W25 VCC_NCTF9 K33 VSS57 VSS193 AG11
L26 VCC_NCTF8 L33 VSS56 VSS192 AJ11
M26 VCC_NCTF7 M33 VSS55 VSS191 AL11
N26 VCC_NCTF6 N33 VSS54 VSS190 AN11
P26 VCC_NCTF5 P33 VSS53 VSS189 B12
R26 VCC_NCTF4 VTT_NCTF17 L12 R33 VSS52 VSS188 D12
T26 VCC_NCTF3 VTT_NCTF16 M12 T33 VSS51 VSS187 J12
U26 VCC_NCTF2 VTT_NCTF15 N12 U33 VSS50 VSS186 A14
V26 VCC_NCTF1 VTT_NCTF14 P12 V33 VSS49 VSS185 B14
W26 VCC_NCTF0 VTT_NCTF13 R12 W33 VSS48 VSS184 F14
VTT_NCTF12 T12 AD33 VSS47 VSS183 J14
VCCP

AB12 VCCSM_NCTF31 VTT_NCTF11 U12 AF33 VSS46 VSS182 K14


AC12 VCCSM_NCTF30 VTT_NCTF10 V12 AL33 VSS45 VSS181 AG14
AD12 VCCSM_NCTF29 VTT_NCTF9 W12 C34 VSS44 VSS180 AJ14
AB13 VCCSM_NCTF28 VTT_NCTF8 L13 AA34 VSS43 VSS179 AL14
AC13 VCCSM_NCTF27 VTT_NCTF7 M13 AB34 VSS42 VSS178 AN14
AD13 VCCSM_NCTF26 VTT_NCTF6 N13 AC34 VSS41 VSS177 C15
AC14 VCCSM_NCTF25 VTT_NCTF5 P13 AD34 VSS40 VSS176 K15
AD14 VCCSM_NCTF24 VTT_NCTF4 R13 AH34 VSS39 VSS175 A16
AC15 VCCSM_NCTF23 VTT_NCTF3 T13 AN34 VSS38 VSS174 D16

2
2

AD15 VCCSM_NCTF22 VTT_NCTF2 U13 B35 VSS37 VSS173 H16


AC16 VCCSM_NCTF21 VTT_NCTF1 V13 D35 VSS36 VSS172 K16
AD16 VCCSM_NCTF20 VTT_NCTF0 W13 E35 VSS35 VSS171 AL16
VCCP

AC17 VCCSM_NCTF19 F35 VSS34 VSS170 C17


AD17 VCCSM_NCTF18 G35 VSS33 VSS169 G17
AC18 VCCSM_NCTF17 H35 VSS32 VSS168 AF17
AD18 VCCSM_NCTF16 J35 VSS31 VSS167 AJ17
AC19 VCCSM_NCTF15 K35 VSS30 VSS166 AN17
AD19 VCCSM_NCTF14 L35 VSS29 VSS165 A18
AC20 VCCSM_NCTF13 M35 VSS28 VSS164 B18
AD20 VCCSM_NCTF12 N35 VSS27 VSS163 U18
AC21 VCCSM_NCTF11 P35 VSS26 VSS162 AL18
AD21 VCCSM_NCTF10 R35 VSS25 VSS161 C19
Title

Size

AC22 T35 H19


Date:

VCCSM_NCTF9 VSS24 VSS160


AD22 VCCSM_NCTF8 U35 VSS23 VSS159 J19
AC23 VCCSM_NCTF7 V35 VSS22 VSS158 T19
AD23 VCCSM_NCTF6 W35 VSS21 VSS157 W19
AC24 VCCSM_NCTF5 Y35 VSS20 VSS156 AG19
AD24 VCCSM_NCTF4 AE35 VSS19 VSS155 AN19
AC25 VCCSM_NCTF3 C36 VSS18 VSS154 A20
Tahiti(DM3L)

AD25 VCCSM_NCTF2 AA36 VSS17 VSS153 D20


AC26 VCCSM_NCTF1 AB36 VSS16 VSS152 E20
AD26 VCCSM_NCTF0 AC36 VSS15 VSS151 F20
Document Number
Alviso (VSS,NCTF)

AD36 G20
星期二, 三月 29, 2005

VSS14 VSS150
AE36 V20
+1_8VSUS

VSS13 VSS149
AF36 VSS12 VSS148 AK20
AJ36 VSS11 VSS147 C21
solder Joint Characteristic

AL36 VSS10 VSS146 F21


AN36 VSS9 VSS145 AF21
QUANTA

E37 VSS8 VSS144 AN21


All NCTF Pin is to enchance the

H37 A22
of the Die to package interface.
Thermal Expansion (CTE) mismatch

VSS7 VSS143
K37 D22
1
1

VSS6 VSS142
M37 E22
COMPUTER

VSS5 VSS141
P37 J22
Sheet

VSS4 VSS140
T37 VSS3 VSS139 AH22
V37 VSS2 VSS138 AL22
Y37 H23
9

VSS1 VSS137
AG37 VSS0 VSS136 AF23
of
49
R ev
1A
A
B
C
D
1 2 3 4 5 6 7 8
C228 15P
2 1 CLK_32KX1
VCCRTC

2
2

1
R150
32.768KHZ 10M +3VRUN
PCI Pullups RP9
W2
U16A 6 5

1
REQ3# 7 4 IRD Y#
C222 15P Y1 P2 8 3 DEVSEL#
RTCX1 LAD0 LAD0/FWH0 25 11 ICH6_GPI7
2 1 CLK_32KX2 Y2 N3 SERIRQ 9 2 PERR#
RTCX2 LAD1/FB1 LAD1/FWH1 25 11,21,25 SERIRQ

RTC
R154 20K/F N5 10 1 IRQ14
LAD2/FB2 LAD2/FWH2 25 +3VRUN
RTC_RST#

LPC
AA2 RTCRST# LAD3/FB3 N4 LAD3/FWH3 25
N6 LPC_DRQ0#
LDRQ0# LPC_DRQ0# 26 10P8R-8.2K

1
SM_INTRUDER# AA3 P4 LPC_DRQ1#
A 31 SM_INTRUDER# INTRUDER# LDRQ1#/GPI41 LPC_DRQ1# 25 A
AA5 P3 VCCP
INTVRMEN LFRAME# LFRAME#/FWH4 25
R153 C227 DPRSTP# 1 2
100K 1U_10V
R125 *56_NC
2 3 NMI AF25 NMI CPUPWRGD/GPO49 AG25 CPUPWRGD 3 VCCP
SM_INTRUDER# AF23 AE22
3 A20M# A20M# INIT3_3V#
3 FERR# 1 2R_FERR# AF24 FERR# THRMTRIP# AE23 THERMTRIP#_ICH 1 R130 2 Install R399 for Dothan-A and don't
R127 56 AG26 AG27 75 install for Dothan-B
3
3
IGNNE#
INTR AG24
IGNNE#
INTR
CPU SMI#
STPCLK# AE26
SMI# 3
STPCLK# 3
AF27 AE27 R_CPUSLP# 1 2
3 CPUINIT# INIT# CPUSLP# CPUSLP# 3,5
AD23 AD27 *0_NC R399
PDD[0..15] 25 RCIN# RCIN# DPSLP#/TP[2] DPSLP# 3
19 PDD[0..15] 26 GATEA20 AF22 A20GATE DPRSLP#/TP[4] AE24 1 2 DPRSTP# 3
*0_NC R126
PDDREQ Install R126 for Dothan-B and don't
19 PDDREQ
PDIOW# install for Dothan-A
19 PDIOW#
PDIOR# AD0 E2 J6
19 PDIOR# AD0 C/BE0# C/BE0# 21,23,35
PIO RDY AD1 E5 H6
19 PIORDY AD1 C/BE1# C/BE1# 21,23,35
PDDACK# AD2 C2 G4
19 PDDACK# AD2 C/BE2# C/BE2# 21,23,35
IRQ14 AD3 F5 G2 +3VRUN PCI Pullups
19 IRQ14 AD3 C/BE3# C/BE3# 21,23,35
PDA1 AD4 F3 +3VRUN
19 PDA1 AD4 RP33
PDA0 AD5 E9 J3
19 PDA0 AD5 FRAME# FRAME# 21,23,35

2
PDCS1# AD6 F2 A3 FRAME# 6 5
19 PDCS1# AD6 IRDY# IRDY# 21,23,35
PDA2 AD7 D6 J2 R501 TR DY# 7 4 SERR#
19 PDA2 AD7 TRDY# TRDY# 21,23,35
PDCS3# AD8 E6 C3 *10K_NC PLOCK# 8 3 REQ5#
19 PDCS3# AD8 DEVSEL# DEVSEL# 21,23,35
AD9 D3 J1 REQ1# 9 2 REQ4#
AD9 STOP# STOP# 21,23,35
AD10 A2 E1 10 1
PCI PAR 21,23,35 +3VRUN

1
AD11 AD10 PAR
D2 AD11 SERR# G5 SERR# 21,23,35
AD12 D5 E3 LAMP_STAT
AD12 PERR# PERR# 21,23,35 10P8R-8.2K
+3VSUS AD13 PLOCK# PCI Pullups
B
Reset Circuit C215 AD14
H3
B4
AD13 PLOCK# C5 PLOCK#
+3VRUN B
AD14 RP34
(NB/PCI/PCIE) 2 1 AD15
AD16
J5 AD15 REQ0# L5 REQ0#
REQ1# PIRQD#
K2 AD16 REQ1# B5 REQ1# 21 6 5
.047U AD17 K5 M5 REQ2# REQ1 : Card Bus PIRQA# 7 4 PIRQC#
AD17 REQ2#
5

AD18 REQ3# REQ2# PIRQB#


U17 D4 AD18 REQ3# B8 REQ3# 23 REQ3 : MINI PCI 8 3
AD19 REQ4# REQ0#
2 L6 AD19 REQ4#/GPI40 F7 REQ4# 35 REQ4 : BCM4401 LAN 9 2
4 AD20 G3 E8 REQ5# 10 1 STOP#
6,11,16,19,25 PLTRST# AD20 REQ5#/GPI1 +3VRUN
1 PLTRST#_1 AD21 H4 B7 LAMP_STAT
AD21 REQ6#/GPI0 LAMP_STAT 17
AD22 H2 AD22 10P8R-8.2K
7SH32 AD23 H5 C1
AD24 AD23 GNT0# GNT1#
B3 AD24 GNT1# B6 GNT1# 21 R421 NP boot from FWH,
AD25 M6 F1 populate boot from +3VRUN
AD26 AD25 GNT2# GNT3# RP7
B2 AD26 GNT3# C8 GNT3# 23 MiniPCI.
AD27 K6 E7 GNT4# ICH_GPIO2 7 8
AD27 GNT4#/GPO48 GNT4# 35
AD28 K3 F6 1 2 ICH_GPIO3 5 6
AD29 AD28 GNT5#/GPO17 R421 *1K_NC ICH_GPIO4
A5 AD29 GNT6#/GPO16 D8 3 4
AD30 L1 ICH_GPIO5 1 2
AD31 AD30 PIRQA#
21,23,35 AD[0..31] K4 AD31 PIRQA# N2 PIRQA#
L2 PIRQB# 8P4R-8.2K VCCP
PIRQB# PIRQB# 23
M1 PIRQC# FERR# 1 2
PIRQC# PIRQC# 21,35
P6 L3 PIRQD#
25 ICH_PME# PME# PIRQD# PIRQD# 21,23
G6 D9 ICH_GPIO2 R128 56
15 PCLK_ICH PCICLK PIRQE#/GPI2
PCIRST# R2 C7 ICH_GPIO3
21,23,35 PCIRST# PCIRST# PIRQF#/GPI3
PLTRST#_1 R5 C6 ICH_GPIO4
PLTRST# PIRQG#/GPI4
2

AF19 M3 ICH_GPIO5
21,23,25,35 CLKRUN# CLKRUN#/GPIO32 PIRQH#/GPI5
R422 2 1
+3VRUN
*33_NC
R133 10K PDD0 AD14 AC19 SATA_LED# 32
2 1

PDD1 DD0 SATALED#


C
AF15 DD1 C
PDD2 AF14 AE3 SATA_RXN0_C
C546 PDD3 DD2 SATA0_RXN SATA_RXP0_C
AD12 DD3 SATA0_RXP AD3
*18P_NC PDD4 AE14 AG2 SATA_TXN0_C
1

PDD5 DD4 SATA0_TXN SATA_TXP0_C


AC11 DD5 SATA0_TXP AF2 Distance between the ICH-6 M and cap
IDE

PDD6 AD11 SATA


PDD7 AB11
DD6
AD7 on the "P" signal should be identical
PDD8 DD7 SATA2_RXN
AC-Terminator AE13 DD8 SATA2_RXP AC7 distance between the ICH-6 M and cap
PDD9 AF13 AF6 PAD T45
PDD10 AB12
DD9 SATA2_TXN
AG6
on the "N" signal for same pair.
X1,X2 Docking DD10 SATA2_TXP PAD T44
PDD11 AB13
PDD12 DD11
IAC_SYNC Port X Line R144 AC13 DD12 SATA_CLKN AC2 CLK_PCIE_SATA# 15
PDD13 AE15 AC1 SATA_RXN0_C
DD13 SATA_CLKP CLK_PCIE_SATA 15 SATA_RXN0_C 19
1 1X2,2X1 STUFF PDD14 AG15
PDD15 DD14 R412 24.9/F
AD13 DD15 SATARBIAS# AG11
0 4X1 UNSTUFF AF11 SATABIAS 1 2 SATA_RXP0_C
SATARBIAS SATA_RXP0_C 19
PDCS1# AD16
PDCS3# AE17 DCS1#
DCS3#
Place within 500mils of ICH6 ball
+3VRUN PDA0 AC16 C226 3900P
PDA1 DA0 SATA_TXN0_C
AB17 DA1 ACZ_BIT_CLK C10 IAC_BITCLK_ICH 33 1 2 SATA_TXN0 19
PDA2 AC17 B9 IAC_SYNC
AC-97/
AZALIA

PDIOR# AE16 DA2 ACZ_SYNC


DIOR# ACZ_RST# A10 IAC_RESET# C225 3900P
2

PDIOW# AC14 SATA_TXP0_C 1 2


DIOW# SATA_TXP0 19
R144 PIO RDY AF16 F11
IORDY ACZ_SDIN0 IAC_SDATAIN0 33
*1K_NC IRQ14 AB16 F10

R143 39
PDDREQ AB14
PDDACK# AB15
IDEIRQ
DDREQ
ACZ_SDIN1
ACZ_SDIN2 B10
C9 IAC_SDATAO
IAC_SDATAIN1 24
PAD T43 SATA
1

DDACK# ACZ_SDO
24 IAC_SYNC_MDC 2 1

IAC_SYNC ICH6-M
D IAC_BITCLK_ICH D

33 IAC_SYNC_AUDIO 2 1
2

R140 39 R138 39
R142 39 R135 2 1 IAC_SDATAO_MDC 24 2 1 IAC_RESET#_MDC 24
QUANTA
1

C214 *47_NC
22P C216 IAC_SDATAO IAC_RESET#
*10P_NC R141 39 R136 39
COMPUTER
2

2 1

2 1 IAC_SDATAO_AUDIO 33 2 1 IAC_RESET#_AUDIO 33 Title


1

C209 ICH6-M (CPU,PCI,IDE,SATA,AC97)


*22P_NC C212 C213 C211 C210
1

*10P_NC 10P *10P_NC *10P_NC Size Document Number R ev


AC97-MDC & AUDIO
2

Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 10 of 49


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

CLK48_USB

1
R124
10

1 2

C200 U16B
10P
2

A RP31 A
19 USB_VD0+ D21 USBP0P USBP1P B20 USB_VD1+ 38
For USB FDD C21 A20 To Dock OC0# 6 5 +3VSUS
19 USB_VD0- USBP0N USBP1N USB_VD1- 38
OC0# C27 B27 OC1# OC3# 7 4 OC4#
OC0# OC1# OC1# OC5#
AC terminator For Bluetooth 30
30 USB_VD2+ C19
D19
USBP2P USBP3P B18
A18
USB_VD3+ 21
Cardbus-USB card OC2#
8
9
3
2 OC7#
USB_VD2-
OC2# B26
USBP2N
OC2#
USB USBP3N
OC3# C26 OC3#
USB_VD3- 21
+3VSUS 10 1 OC6#
32 USB_VD4+ D17 USBP4P USBP5P A16 USB_VD5+ 32
+3VSUS E17 B16
32 USB_VD4- USBP4N USBP5N USB_VD5- 32 10P8R-10K
OC4# C23 D23 OC5#
RP36 To IO/B 32 OC4#
D15
OC4#/GPI9 OC5#/GPI10
B14
OC5# 32 To IO/B
32 USB_VD6+ USBP6P USBP7P USB_VD7+ 32
7 8 PDAT_SMB C15 A14
32 USB_VD6- USBP6N USBP7N USB_VD7- 32
5 6 PCLK_SMB OC6# C25 C24 OC7#
32 OC6# OC6#/GPI14 OC7#/GPI15 OC7# 32
3 4 SMB_LINK_ALERT# B22 R129 22.6/F
SMBALERT# CLK48_USB USBRBIAS USBRBIAS
1 2 15 CLK48_USB A27 CLK48 USBRBIAS# A22 2 1

8P4R-2.2K T25 Y25 DMI_RXN2 6 Place within 500mils


6 DMI_RXN0 DMI0_RXN DMI2_RXN
6 DMI_RXP0 T24 DMI0_RXP DMI2_RXP Y24 DMI_RXP2 6 of ICH-6
+3VSUS R27 W27
6
6
DMI_TXN0
DMI_TXP0 R26
DMI0_TXN
DMI0_TXP
DMI DMI2_TXN
DMI2_TXP W26
DMI_TXN2
DMI_TXP2
6
6
RP35
7 8 ICH _RI# V25 AB24 DMI_RXN3 6
6 DMI_RXN1 DMI1_RXN DMI3_RXN
5 6 SYS_RESET# 6 DMI_RXP1 V24 AB23 DMI_RXP3 6
BATLOW# DMI1_RXP DMI3_RXP
3 4 6 DMI_TXN1 U27 DMI1_TXN DMI3_TXN AA27 DMI_TXN3 6 Place within 500mils
1 2 6 DMI_TXP1 U26 DMI1_TXP DMI3_TXP AA26 DMI_TXP3 6 of ICH-6
8P4R-10K AD25 F24 R396 24.9/F
15 CLK_PCIE_ICH# DMI_CLKN DMI_ZCOMP
AC25 F23 DMI_COMP 2 1
15 CLK_PCIE_ICH DMI_CLKP DMI_IRCOMP +1_5VRUN
H25 HSIN0 HSIN2 M25
B H24 M24 B
G27
HSIP0
HSON0
PCI-EXPRESS HSIP2
HSON2 L27
G26 HSOP0 HSOP2 L26
R415 680
K25 P24 ICH_PCIE_WAKE# 1 2
HSIN1 HSIN3
K24 HSIP1 HSIP3 P23
R132 8.2K J27 N27 R424 10K
THRM# HSON1 HSON3 SMLINK0 +3VSUS
+3VRUN 1 2 J26 HSOP1 HSOP3 N26 1 2

Y4 W4 SMLINK0 R416 10K


15 PCLK_SMB SMBCLK SMLINK0
W5 U6 SMLINK1 SMLINK1 1 2
R152 10K 15 PDAT_SMB SMBALERT# W6
SMBDATA SM&SMI
SMBALERT#/GPI11
SMLINK1
LINKALERET# Y5 SMB_LINK_ALERT#
1 2 ICH_PWROK R131 10K
1 2 SUSPWROK MCH_SYNC# 1 2 +3VRUN
ICH _RI# T2 T4
RI# SLP_S3# SLP_S3# 25
R151 10K THRM# AC20 T5
25 THRM# THRM# SLP_S4# PAD T99
ICH_PWROK AA1 T6
31,39 ICH_PWROK PWROK SLP_S5# SLP_S5# 25
AE20
42 DPRSLPVR
BATLOW# V2
DPRSLPVR/TP1
BATLOW#/TP0
PM SYS_RESET# U2 SYS_RESET#
2

25 PWRBTN# U1 PWRBTN# WAKE# U5 ICH_PCIE_WAKE# 25


R503 SUSPWROK Y3 AG21 MCH_SYNC#
21,31,39 SUSPWROK RSMRST# MCH_SYNC#
100K IMVP_PWRGD AF21
6,39,42 IMVP_PWRGD VRMPWRGD
6 PM_BMBUSY# AD19 BM_BUSY#/GPIO6 STP_PCI#/GPO18 AC21 STP_PCI# 15
T103 PAD W3 AD22 STP_CPU# 4,15,42
1

SUS_STAT#/LPCPD# STP_CPU#/GPO20
T100 PAD V6 SUSCLK SERIRQ AB20 SERIRQ 10,21,25

15 14M_ICH E10 CLK14 GPIO25 P5 PAD T101


33 SPKR F8 SPKR SATA0GP/GPIO26 AF17
2

10 ICH6_GPI7 AE19 GPI7 GPIO27 R3 PAD T102


EXT_SMI# R1 T3
C
R405
25
25
EXT_SMI#
EXT_WAK#
EXT_WAK# M2
GPI8
GPI12
MISC&GPIO GPIO28
SATA1GP/GPIO29 AE18
PAD T104 C

*33_NC EXT_SCI# R6 AF18


25 EXT_SCI# GPI13 SATA2GP/GPIO30
AB21 AG18
2 1

GPO19 SATA3GP/GPIO31
AD20 GPO21

1
C525 T146 PAD AD21 AF20
GPO23 GPIO33 UAI_8040 19
V3 AC18 R407
GPIO24 GPIO34 UAO_8040 19
*10P_NC 33
1

E12 PAD T125

2
LAN_RXD0
T126 PAD D12 EE_CS LAN_RXD1 E11 PAD T127
B12 C13
T128 PAD
T130 PAD D11
EE_SHCLK
EE_DOUT
LAN LAN_RXD2
LAN_TXD0 C12
PAD
PAD
T129
T131
T132 PAD F13 EE_DIN LAN_TXD1 C11 PAD T133
LAN_TXD2 E13 PAD T134
V5 PLTRST# PLTRST# 6,10,16,19,25
LAN_RST#
LAN_CLK F12 PAD T136
LAN_RSTSYNC B11 PAD T137
AC5 RSVD1 RSVD6 AD9
AD5 AF8
AF4
RSVD2
RSVD3
RESERVED RSVD7
RSVD8 AG8
AG4 RSVD4 RSVD9 U3
AC9 RSVD5

ICH6-M

D D

QUANTA
Title
COMPUTER
ICH6-M (USB,DMI,LPC)

Size Document Number R ev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 11 of 49


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

L21
+1_5V_PCIE U16C U16D
+1_5VRUN 1 2 +1_5VRUN

2
BLM41P600SPG + C202
AA22 C516 C204 AA19 C201 C205 C547 C522 C515 A1 G1
C199 VCC1_5_1 VCC1_5_79 VSS001 VSS087
AA23 VCC1_5_2 VCC1_5_80 AA20 A12 VSS002 VSS088 G12
150U_2V .1U_10V .1U_10V .1U_10V AA24 AA21 .1U_10V .1U_10V .1U_10V .1U_10V .01U A15 G21

1
VCC1_5_3 VCC1_5_81 VSS003 VSS089
AA25 VCC1_5_4 VCC1_5_82 L11 A19 VSS004 VSS090 G7
AB25 VCC1_5_5 VCC1_5_83 L12 A21 VSS005 VSS091 G9
AB26 VCC1_5_6 VCC1_5_84 L14 A23 VSS006 VSS092 H23
AB27 VCC1_5_7 VCC1_5_85 L16 A26 VSS007 VSS093 H26
R146 *10_NC F25 L17 A4 H27
VCC1_5_8 VCC1_5_86 VSS008 VSS094
+5VSUS 1 2 F26 VCC1_5_9 VCC1_5_87 M11 A7 VSS009 VSS095 J23
F27 VCC1_5_10 VCC1_5_88 M17 A9 VSS010 VSS096 J24
A
G22 VCC1_5_11 VCC1_5_89 P11 AA11 VSS011 VSS097 J25 A
R145 100 G23 P17 AA13 J4
VCC1_5_12 VCC1_5_90 VSS012 VSS098
+5VRUN 1 2 G24 VCC1_5_13 VCC1_5_91 T11 AA16 VSS013 VSS099 K1
G25 T17 AA4 K23
H21
VCC1_5_14
VCC1_5_15
VCC VCC1_5_92
VCC1_5_93 U11 AB1
VSS014
VSS015
VSS100
VSS101 K26
D10 H22 U12 AB10 K27
V5REF VCC1_5_16 VCC1_5_94 VSS016 VSS102
+3VRUN 2 1 J21 VCC1_5_17 VCC1_5_95 U14 AB19 VSS017 VSS103 K7
J22 VCC1_5_18 VCC1_5_96 U16 AB2 VSS018 VSS104 L13
RB751V K21 U17 +3_3V_PCI AB7 L15
VCC1_5_19 VCC1_5_97 VSS019 VSS105
2

2
C218 C219 K22 F9 AB9 L23
.1U_10V .1U_10V VCC1_5_20 VCC1_5_98 VSS020 VSS106
L21 VCC1_5_21 +3VRUN AC10 VSS021 VSS107 L24
L22 A6 AC12 L25
1

1 VCC1_5_22 VCC3_3_2 VSS022 VSS108

2
M21 B1 C540 C539 C528 AC22 M12
VCC1_5_23 VCC3_3_3 VSS023 VSS109
M22 VCC1_5_24 VCC3_3_4 E4 AC23 VSS024 VSS110 M13
N21 H1 .1U_10V .1U_10V .1U_10V AC24 M14
GND

1
R406 *10_NC VCC1_5_25 VCC3_3_5 VSS025 VSS111
N22 VCC1_5_26 VCC3_3_6 H7 AC26 VSS026 VSS112 M15
+5VALW 1 2 N23 VCC1_5_27 VCC3_3_7 J7 AC3 VSS027 VSS113 M16
N24 VCC1_5_28 VCC3_3_8 L4 AC6 VSS028 VSS114 M23
N25 VCC1_5_29 VCC3_3_9 L7 AD1 VSS029 VSS115 M26
R404 10 P21 M7 AD10 M27
VCC1_5_30 VCC3_3_10 VSS030 VSS116
+5VSUS 1 2 P25 VCC1_5_31 VCC3_3_11 P1 +3_3V_ICH AD15 VSS031 VSS117 M4
P26 VCC1_5_32 AD18 VSS032 VSS118 N1
P27 VCC1_5_33 VCC3_3_12 AA12 +3VRUN AD2 VSS033 VSS119 N11
D17 R21 AA14 AD24 N12
VCC1_5_34 VCC3_3_13 VSS034 VSS120

2
2 1 V5REF_SUS R22 AA15 C220 C523 AD6 N13
+3VSUS VCC1_5_35 VCC3_3_14 VSS035 VSS121
T21 VCC1_5_36 VCC3_3_15 AA17 AE10 VSS036 VSS122 N14
RB751V T22 AC15 .1U_10V .1U_10V AE11 N15

1
VCC1_5_37 VCC3_3_16 VSS037 VSS123
2

C512 C511 U21 AD17 AE12 N16


.1U_10V .1U_10V VCC1_5_38 VCC3_3_17 VSS038 VSS124
U22 VCC1_5_39 VCC3_3_18 AG13 AE2 VSS039 VSS125 N17
V21 AG16 AE21 N7
1

VCC1_5_40 VCC3_3_19 VSS040 VSS126


B V22 VCC1_5_41 VCC3_3_20 AG19 +1_5VSUS AE25 VSS041 VSS127 P12 B
W21 VCC1_5_42 VCC3_3_21 AA10 AE6 VSS042 VSS128 P13

2
W22 C541 AE7 P14
VCC1_5_43 VSS043 VSS129
Sequence : Reference Volatge ---> Core Volatge Y21 VCC1_5_44 AF1 VSS044 VSS130 P15
Y22 G19 .1U_10V AF10 P16

1
VCC1_5_45 VCCSUS1_5_1 VSS045 VSS131
AF12 VSS046 VSS132 P22
+1_5VRUN AA6 VCC1_5_46 VCCSUS1_5_2 R7 +1_5VSUS AF26 VSS047 VSS133 R11
AB4 VCC1_5_47 VCCSUS1_5_3 U7 AF3 VSS048 VSS134 R12
2

2
C544 AB5 C517 C542 AF7 R13
VCC1_5_48 VSS049 VSS135
+1_5V_SATA_RX AB6 VCC1_5_49 VCC1_5_67 G8 +1_5VRUN AG1 VSS050 VSS136 R14
.1U_10V AC4 .1U_10V .1U_10V AG12 R15
1

1
VCC1_5_50 VSS051 VSS137
AD4 VCC1_5_51 VCC1_5_68 D24 AG14 VSS052 VSS138 R16
AE4 VCC1_5_52 VCC1_5_69 D25 AG17 VSS053 VSS139 R17
+1_5VRUN AE5 D26 AG20 R23
R395 1R VCC1_5_53 VCC1_5_70 VSS054 VSS140
AF5 VCC1_5_54 VCC1_5_71 D27 AG22 VSS055 VSS141 R24
1 2 +1_5V_SATA_TX AG5 VCC1_5_55 VCC1_5_72 E20 +1_5VRUN AG3 VSS056 VSS142 R25
VCC1_5_73 E21 AG7 VSS057 VSS143 R4

2
R394 L42 C550 C538
+1_5VRUN AA7 VCC1_5_56 VCC1_5_74 E22 B13 VSS058 VSS144 T1
1 2 2 1 AA8 VCC1_5_57 VCC1_5_75 E23 B15 VSS059 VSS145 T12
2

C536 AA9 E24 .1U_10V .1U_10V B19 T13

1
1R BLM11A121S VCC1_5_58 VCC1_5_76 VSS060 VSS146
AB8 VCC1_5_59 VCC1_5_77 F20 B21 VSS061 VSS147 T14
2

C203 C496 .1U_10V AC8 G20 B23 T15


1

VCC1_5_60 VCC1_5_78 VSS062 VSS148


AD8 VCC1_5_61 B24 VSS063 VSS149 T16
10U_4V .01U AE8 P7 B25 T23
+2.5VRUN
1

VCC1_5_62 VCC2_5_2 VSS064 VSS150


AE9 VCC1_5_63 VCC2_5_4 AB18 C14 VSS065 VSS151 T26

2
AF9 C518 C18 T27
VCC1_5_64 VSS066 VSS152
AG9 VCC1_5_65 C20 VSS067 VSS153 T7
+3VRUN +1_5VRUN A8 .1U_10V C22 U13

1
VCCDMIPLL V5REF1 V5REF VSS068 VSS154
AC27 VCCDMIPLL V5REF2 AA18 C4 VSS069 VSS155 U15
C
E26 VCC3_3_1 D1 VSS070 VSS156 U23 C
F21 V5REF_SUS D10 U24
V5REF_SUS VSS071 VSS157
2

C497 AE1 D13 U25


VCCSATAPLL VSS072 VSS158
+3VRUN AG10 VCC3_3_22 VCCUSBPLL A25 +1_5VRUN D14 VSS073 VSS159 V23
2

.1U_10V C521 A24 +3VSUS D18 V26


1

VCCSUS3_3_20 VSS074 VSS160


2

2
C208 A13 C217 D20 V27
VCCLAN3_3/VCCSUS3_3_1 VSS075 VSS161
.1U_10V F14 AB3 VCCRTC 2 C207 D22 V4
1

.1U_10V VCCLAN3_3/VCCSUS3_3_2 VCCRTC .01U VSS076 VSS162


G13 D7 W1
1

1
VCCLAN3_3/VCCSUS3_3_3 .1U_10V VSS077 VSS163
G14 E14 W23
1

VCCLAN3_3/VCCSUS3_3_4 VSS078 VSS164


VCCLAN1_5/VCCSUS1_5_1 G10 +1_5VRUN E15 VSS079 VSS165 W24
+3VRUN A11 VCCSUS3_3_1 VCCLAN1_5/VCCSUS1_5_2 G11 E18 VSS080 VSS166 W25
U4 VCCSUS3_3_2 E19 VSS081 VSS167 W7
2

C535 C529 V1 AB22 E25 Y23


VCCSUS3_3_3 V_CPU_IO1 VCCP VSS082 VSS168
V7 VCCSUS3_3_4 V_CPU_IO2 AD26 F17 VSS083 VSS169 Y26
.1U_10V .1U_10V W2 AG23 F19 Y27
1

VCCSUS3_3_5 V_CPU_IO3 VSS084 VSS170


Y7 VCCSUS3_3_6 F22 VSS085 VSS171 Y6
2

C16 C206 F4 E27


VCCSUS3_3_13 VSS086 VSS172
A17 VCCSUS3_3_7 VCCSUS3_3_14 D16
B17 E16 .1U_10V
+3VSUS
1

VCCSUS3_3_8 VCCSUS3_3_15
C17 VCCSUS3_3_9 VCCSUS3_3_16 F15 ICH6-M
2

C524 F18 F16


VCCSUS3_3_10 VCCSUS3_3_17
G17 VCCSUS3_3_11 VCCSUS3_3_18 G15
.1U_10V G18 G16
1

VCCSUS3_3_12 VCCSUS3_3_19

ICH6-M

+3VSUS VCCRTC
2

C520 C543
D D
.1U_10V .1U_10V
1

C553

.1U_10V QUANTA
1

3.3V Can drop to 2.0V


min. in G3 state) Title
COMPUTER
ICH6-M (POWER&GND)

Size Document Number R ev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 12 of 49


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+1_8VSUS SMDDR_VREF +1_8VSUS +1_8VSUS SMDDR_VREF +1_8VSUS


R_A_DM[0..7] 7 R_B_DM[0..7] 7
+1_8VSUS
R_A_MD[0..63] 7 R_B_MD[0..63] 7
SMDDR_VREF SMDDR_VREF
R_A_DQS[0..7] 7 R_B_DQS[0..7] 7
R_A_DQS#[0..7] 7 R_B_DQS#[0..7] 7 Place these Caps near So-Dimm1.
R_A_MA[0..13] 7,14 R_B_MA[0..13] 7,14

1
JDIM1 JDIM2 C662 C663 C664 C665 C666
1 VREF VSS46 2 1 VREF VSS46 2
3 4 R_A_MD4 3 4 R_B_MD4 2.2U_6.3V 2.2U_6.3V 2.2U_6.3V 2.2U_6.3V 2.2U_6.3V

2
R_A_MD0 VSS47 DQ4 R_A_MD5 R_B_MD0 VSS47 DQ4 R_B_MD5
5 DQ0 DQ5 6 5 DQ0 DQ5 6
R_A_MD1 7 8 R_B_MD1 7 8
DQ1 VSS15 R_A_DM0 DQ1 VSS15 R_B_DM0
9 VSS37 DM0 10 9 VSS37 DM0 10
R_A_DQS#0 11 12 R_B_DQS#0 11 12 +1_8VSUS
R_A_DQS0 DQS#0 VSS5 R_A_MD6 R_B_DQS0 DQS#0 VSS5 R_B_MD6
A
13 DQS0 DQ6 14 13 DQS0 DQ6 14 Place these Caps near So-Dimm1. A
15 16 R_A_MD7 15 16 R_B_MD7
R_A_MD2 VSS48 DQ7 R_B_MD2 VSS48 DQ7
17 DQ2 VSS16 18 17 DQ2 VSS16 18
R_A_MD3 19 20 R_A_MD12 R_B_MD3 19 20 R_B_MD12
DQ3 DQ12 DQ3 DQ12

1
21 22 R_A_MD13 21 22 R_B_MD13 C667 C668 C669 C670
R_A_MD8 VSS38 DQ13 R_B_MD8 VSS38 DQ13
23 DQ8 VSS17 24 23 DQ8 VSS17 24
R_A_MD9 25 26 R_A_DM1 R_B_MD9 25 26 R_B_DM1 .1U_10V .1U_10V .1U_10V .1U_10V

2
DQ9 DM1 DQ9 DM1
27 VSS49 VSS53 28 27 VSS49 VSS53 28
R_A_DQS#1 29 30 CLK_SDRAM0 R_B_DQS#1 29 30 CLK_SDRAM3
DQS#1 CK0 CLK_SDRAM0 6 DQS#1 CK0 CLK_SDRAM3 6
R_A_DQS1 31 32 CLK_SDRAM0# R_B_DQS1 31 32 CLK_SDRAM3#
DQS1 CK0# CLK_SDRAM0# 6 DQS1 CK0# CLK_SDRAM3# 6
33 VSS39 VSS41 34 33 VSS39 VSS41 34
R_A_MD10 35 36 R_A_MD14 R_B_MD10 35 36 R_B_MD14 SMDDR_VREF +3VRUN
R_A_MD11 DQ10 DQ14 R_A_MD15 R_B_MD11 DQ10 DQ14 R_B_MD15
37 DQ11 DQ15 38 37 DQ11 DQ15 38
39 VSS50 VSS54 40 39 VSS50 VSS54 40

1
41 42 41 42 C671 C672 C673 C674

PC4800 DDR2 SDRAM

PC4800 DDR2 SDRAM


R_A_MD16 VSS18 VSS20 R_A_MD20 R_B_MD16 VSS18 VSS20 R_B_MD20
43 DQ16 DQ20 44 43 DQ16 DQ20 44
R_A_MD17 45 46 R_A_MD21 R_B_MD17 45 46 R_B_MD21 .1U_10V 2.2U_6.3V 2.2U_6.3V .1U_10V

2
DQ17 DQ21 DQ17 DQ21
47 VSS1 VSS6 48 47 VSS1 VSS6 48
R_A_DQS#2 49 50 R_B_DQS#2 49 50
R_A_DQS2 DQS#2 NC3 R_A_DM2 R_B_DQS2 DQS#2 NC3 R_B_DM2
51 DQS2 DM2 52 51 DQS2 DM2 52
SO-DIMM (200P)

SO-DIMM (200P)
53 VSS19 VSS21 54 53 VSS19 VSS21 54
R_A_MD18 R_A_MD22 R_B_MD18 R_B_MD22
R_A_MD19
55
57
DQ18 DQ22 56
58 R_A_MD23 R_B_MD19
55
57
DQ18 DQ22 56
58 R_B_MD23
Place these Caps near So-Dimm1.
DQ19 DQ23 DQ19 DQ23
R_A_MD24
59
61
VSS22 VSS24 60
62 R_A_MD28 R_B_MD24
59
61
VSS22 VSS24 60
62 R_B_MD28
No Vias Between the Trace of
DQ24 DQ28 DQ24 DQ28
R_A_MD25 63
65
DQ25 DQ29 64
66
R_A_MD29 R_B_MD25 63
65
DQ25 DQ29 64
66
R_B_MD29 PIN to CAP.
R_A_DM3 VSS23 VSS25 R_A_DQS#3 R_B_DM3 VSS23 VSS25 R_B_DQS#3
67 DM3 DQS#3 68 67 DM3 DQS#3 68
69 70 R_A_DQS3 69 70 R_B_DQS3
NC4 DQS3 NC4 DQS3
B 71 VSS9 VSS10 72 71 VSS9 VSS10 72 B
R_A_MD26 73 74 R_A_MD30 R_B_MD26 73 74 R_B_MD30
R_A_MD27 DQ26 DQ30 R_A_MD31 R_B_MD27 DQ26 DQ30 R_B_MD31
75 DQ27 DQ31 76 75 DQ27 DQ31 76
77 VSS4 VSS8 78 77 VSS4 VSS8 78
CKE0 79 80 CKE1 CKE2 79 80 CKE3
6,14 CKE0 CKE0 CKE1 CKE1 6,14 6,14 CKE2 CKE0 CKE1 CKE3 6,14
81 VDD7 VDD8 82 81 VDD7 VDD8 82
83 NC1 A15 84 83 NC1 A15 84
R_A_BS2# 85 86 R_B_BS2# 85 86
7,14 R_A_BS2# A16_BA2 A14 7,14 R_B_BS2# A16_BA2 A14
87 VDD9 VDD11 88 87 VDD9 VDD11 88
R_A_MA12 89 90 R_A_MA11 R_B_MA12 89 90 R_B_MA11
R_A_MA9 A12 A11 R_A_MA7 R_B_MA9 A12 A11 R_B_MA7
91 A9 A7 92 91 A9 A7 92
R_A_MA8 93 94 R_A_MA6 R_B_MA8 93 94 R_B_MA6
A8 A6 A8 A6
95 VDD5 VDD4 96 95 VDD5 VDD4 96
R_A_MA5 97 98 R_A_MA4 R_B_MA5 97 98 R_B_MA4
R_A_MA3 A5 A4 R_A_MA2 R_B_MA3 A5 A4 R_B_MA2
99 A3 A2 100 99 A3 A2 100
R_A_MA1 101 102 R_A_MA0 R_B_MA1 101 102 R_B_MA0
A1 A0 A1 A0
103 VDD10 VDD12 104 103 VDD10 VDD12 104
R_A_MA10 105 106 R_A_BS1# R_B_MA10 105 106 R_B_BS1# +1_8VSUS
A10/AP BA1 R_A_BS1# 7,14 A10/AP BA1 R_B_BS1# 7,14
R_A_BS0# 107 108 R_A_SRASA# R_B_BS0# 107 108 R_B_SRASA#
7,14 R_A_BS0# BA0 RAS# R_A_SRASA# 7,14 7,14 R_B_BS0# BA0 RAS# R_B_SRASA# 7,14
R_A_BMWEA# 109 110 SM_CS0# R_B_BMWEA# 109 110 SM_CS2# Place these Caps near So-Dimm2.
7,14 R_A_BMWEA# WE# S0# SM_CS0# 6,14 7,14 R_B_BMWEA# WE# S0# SM_CS2# 6,14
111 VDD2 VDD1 112 111 VDD2 VDD1 112
R_A_SCASA# 113 114 M_ODT0 R_B_SCASA# 113 114 M_ODT2
7,14 R_A_SCASA# CAS# ODT0 M_ODT0 6,14 7,14 R_B_SCASA# CAS# ODT0 M_ODT2 6,14

1
SM_CS1# 115 116 R_A_MA13 SM_CS3# 115 116 R_B_MA13 C675 C676 C677 C678 C679
6,14 SM_CS1# S1# A13 6,14 SM_CS3# S1# A13
117 VDD3 VDD6 118 117 VDD3 VDD6 118
M_ODT1 119 120 M_ODT3 119 120 2.2U_6.3V 2.2U_6.3V 2.2U_6.3V 2.2U_6.3V 2.2U_6.3V
6,14 M_ODT1 6,14 M_ODT3

2
ODT1 NC2 ODT1 NC2
121 VSS11 VSS12 122 121 VSS11 VSS12 122
R_A_MD32 123 124 R_A_MD36 R_B_MD32 123 124 R_B_MD36
R_A_MD33 DQ32 DQ36 R_A_MD37 R_B_MD33 DQ32 DQ36 R_B_MD37
125 DQ33 DQ37 126 125 DQ33 DQ37 126
127 VSS26 VSS28 128 127 VSS26 VSS28 128
R_A_DQS#4 129 130 R_A_DM4 R_B_DQS#4 129 130 R_B_DM4 +1_8VSUS
C
R_A_DQS4 DQS#4 DM4 R_B_DQS4 DQS#4 DM4 C
131 DQS4 VSS42 132 131 DQS4 VSS42 132 Place these Caps near So-Dimm2.
133 134 R_A_MD38 133 134 R_B_MD38
R_A_MD34 VSS2 DQ38 R_A_MD39 R_B_MD34 VSS2 DQ38 R_B_MD39
135 DQ34 DQ39 136 135 DQ34 DQ39 136
R_A_MD35 137 138 R_B_MD35 137 138
DQ35 VSS55 DQ35 VSS55

1
139 140 R_A_MD44 139 140 R_B_MD44 C680 C681 C682 C683
R_A_MD40 VSS27 DQ44 R_A_MD45 R_B_MD40 VSS27 DQ44 R_B_MD45
141 DQ40 DQ45 142 141 DQ40 DQ45 142
R_A_MD41 143 144 R_B_MD41 143 144 .1U_10V .1U_10V .1U_10V .1U_10V

2
DQ41 VSS43 R_A_DQS#5 DQ41 VSS43 R_B_DQS#5
145 VSS29 DQS#5 146 145 VSS29 DQS#5 146
R_A_DM5 147 148 R_A_DQS5 R_B_DM5 147 148 R_B_DQS5
DM5 DQS5 DM5 DQS5
149 VSS51 VSS56 150 149 VSS51 VSS56 150
R_A_MD42 151 152 R_A_MD46 R_B_MD42 151 152 R_B_MD46
R_A_MD43 DQ42 DQ46 R_A_MD47 R_B_MD43 DQ42 DQ46 R_B_MD47 SMDDR_VREF +3VRUN
153 DQ43 DQ47 154 153 DQ43 DQ47 154
155 VSS40 VSS44 156 155 VSS40 VSS44 156
R_A_MD48 157 158 R_A_MD52 R_B_MD48 157 158 R_B_MD52
R_A_MD49 DQ48 DQ52 R_A_MD53 R_B_MD49 DQ48 DQ52 R_B_MD53
159 DQ49 DQ53 160 159 DQ49 DQ53 160

1
161 162 161 162 C684 C685 C686 C687
VSS52 VSS57 CLK_SDRAM1 VSS52 VSS57 CLK_SDRAM4
163 NCTEST CK1 164 CLK_SDRAM1 6 163 NCTEST CK1 164 CLK_SDRAM4 6
165 166 CLK_SDRAM1# 165 166 CLK_SDRAM4# .1U_10V 2.2U_6.3V 2.2U_6.3V .1U_10V
CLK_SDRAM1# 6 CLK_SDRAM4# 6

2
R_A_DQS#6 VSS30 CK1# R_B_DQS#6 VSS30 CK1#
167 DQS#6 VSS45 168 167 DQS#6 VSS45 168
R_A_DQS6 169 170 R_A_DM6 R_B_DQS6 169 170 R_B_DM6
DQS6 DM6 DQS6 DM6
171 VSS31 VSS32 172 171 VSS31 VSS32 172
R_A_MD50 173 174 R_A_MD54 R_B_MD50 173 174 R_B_MD54
R_A_MD51 DQ50 DQ54 R_A_MD55 R_B_MD51 DQ50 DQ54 R_B_MD55
175
177
DQ51 DQ55 176
178
175
177
DQ51 DQ55 176
178
Place these Caps near So-Dimm2.
R_A_MD56 VSS33 VSS35 R_A_MD60 R_B_MD56 VSS33 VSS35 R_B_MD60
R_A_MD57
179
181
DQ56 DQ60 180
182 R_A_MD61 R_B_MD57
179
181
DQ56 DQ60 180
182 R_B_MD61
No Vias Between the Trace of
DQ57 DQ61 DQ57 DQ61
R_A_DM7
183
185
VSS3 VSS7 184
186 R_A_DQS#7 R_B_DM7
183
185
VSS3 VSS7 184
186 R_B_DQS#7
PIN to CAP.
DM7 DQS#7 R_A_DQS7 DM7 DQS#7 R_B_DQS7
187 VSS34 DQS7 188 187 VSS34 DQS7 188
D R_A_MD58 189 190 R_B_MD58 189 190 D
R_A_MD59 DQ58 VSS36 R_A_MD62 R_B_MD59 DQ58 VSS36 R_B_MD62
191 DQ59 DQ62 192 191 DQ59 DQ62 192
193 194 R_A_MD63 193 194 R_B_MD63
CGDAT_SMB VSS14 DQ63 CGDAT_SMB VSS14 DQ63
CGCLK_SMB
195
197
199
SDA
SCL
VSS13
SA0
196
198
200
15,17 CGDAT_SMB
15,17 CGCLK_SMB
CGCLK_SMB
195
197
199
SDA
SCL
VSS13
SA0
196
198
200
QUANTA
+3VRUN VDD(SPD) SA1 +3VRUN VDD(SPD) SA1
2

PC4800 DDR2 R466


10K
R467
10K
PC4800 DDR2_R R468
10K
R469
10K Title
COMPUTER
System DRAM Expansion (200P-DDR_SODIMM X 2)
CLOCK 0,1,2 CLOCK 3,4,5
1

Size Document Number R ev


CKE 0,1 CKE 2,3 +3VRUN SMbus address A4 Tahiti(DM3L) 1A
SMbus address A0 Date: 星期二, 三月 29, 2005 Sheet 13 of 49
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

DDRII DUAL CHANNEL A,B.


A
DDRII A CHANNEL DDRII B CHANNEL A

R_A_MA[0..13] 7,13 R_B_MA[0..13] 7,13

SMDDR_VTERM SMDDR_VTERM
No Vias Between the Trace of PIN to CAP. No Vias Between the Trace of PIN to CAP.
1

1
C688 C689 C690 C691 C692 C693 C694 C695 C696 C697 C698 C699 C700 C701 C702 C703 C704 C705 C706 C707 C708 C709 C710 C711 C712 C713

.1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V
2

2
Layout note: Place 1 cap close to every 1 R-pack terminated to SMDDR_VTERM. Layout note: Place 1 cap close to every 1 R-pack terminated to SMDDR_VTERM.

R_A_MA7 2 1 7,13 R_B_SRASA# R_B_SRASA# 2 1


R_A_MA11 RP41 4 3 4P2R-S-56 R_B_BS1# RP42 4 3 4P2R-S-56
7,13 R_B_BS1#
R_A_MA4 2 1 R_B_MA12 2 1
R_A_MA6 RP43 4 3 4P2R-S-56 R_B_MA9 RP44 4 3 4P2R-S-56
7,13 R_A_SRASA# R_A_SRASA# 2 1 R_B_MA8 2 1
R_A_BS1# RP45 4 3 4P2R-S-56 R_B_MA5 RP46 4 3 4P2R-S-56
7,13 R_A_BS1#
B B
SMDDR_VTERM SMDDR_VTERM

R_A_MA13 2 1 R_B_MA3 2 1
M_ODT0 RP47 4 3 4P2R-S-56 R_B_MA1 RP48 4 3 4P2R-S-56
6,13 M_ODT0
R_A_BS2# 2 1 R_B_MA10 2 1
7,13 R_A_BS2#
R_A_MA12 RP49 4 3 4P2R-S-56 R_B_BS0# RP50 4 3 4P2R-S-56
7,13 R_B_BS0#
R_A_MA9 2 1 R_B_BMWEA# 2 1
7,13 R_B_BMWEA#
R_A_MA8 RP51 4 3 4P2R-S-56 SM_CS3# RP52 4 3 4P2R-S-56
6,13 SM_CS3#
R_A_MA5 2 1 R_B_MA7 2 1
R_A_MA3 RP53 4 3 4P2R-S-56 R_B_MA11 RP54 4 3 4P2R-S-56

SMDDR_VTERM SMDDR_VTERM

R_A_MA10 2 1 R_B_MA4 2 1
R_A_BS0# RP55 4 3 4P2R-S-56 R_B_MA6 RP56 4 3 4P2R-S-56
7,13 R_A_BS0#
R_A_BMWEA# 2 1 R_B_MA0 2 1
7,13 R_A_BMWEA#
R_A_SCASA# RP57 4 3 4P2R-S-56 R_B_MA2 RP58 4 3 4P2R-S-56
7,13 R_A_SCASA#
R_A_MA0 2 1 R_B_MA13 2 1
R_A_MA2 RP59 4 3 4P2R-S-56 M_ODT2 RP60 4 3 4P2R-S-56
6,13 M_ODT2
SMDDR_VTERM SMDDR_VTERM

R470 56 R471 56
R_A_MA1 1 2 R_B_BS2# 1 2
7,13 R_B_BS2#
SMDDR_VTERM SMDDR_VTERM

R472 56 R473 56
C C
M_ODT1 1 2 M_ODT3 1 2
6,13 M_ODT1 6,13 M_ODT3
SMDDR_VTERM SMDDR_VTERM

R474 56 R475 56
CKE0 1 2 CKE2 1 2
6,13 CKE0 6,13 CKE2
R476 56 R477 56
CKE1 1 2 CKE3 1 2
6,13 CKE1 6,13 CKE3
SMDDR_VTERM SMDDR_VTERM
R478 56
R479 56 SM_CS2# 1 2
6,13 SM_CS2#
SM_CS0# 1 2
6,13 SM_CS0#
R480 56
R481 56 R_B_SCASA# 1 2
7,13 R_B_SCASA#
SM_CS1# 1 2
6,13 SM_CS1#
SMDDR_VTERM
SMDDR_VTERM

D D

QUANTA
Title
COMPUTER
DDR RES.ARRAY

Size Document Number R ev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 14 of 49


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

FSC FSB FSA CPU SRC PCI Place these termination to


1 0 1 100 100 33 close CK410M. Cause those
0 0 1 133 100 33 Pin-out is for Current-Mode.
0 1 1 166 100 33
0 1 0 200 100 33 R333 1 2 49.9/F
0 0 0 266 100 33 R332 1 2 49.9/F
R339 24
1 0 0 333 100 33 C448 27P VDDA_CR R335 1 2 49.9/F 1 2
A CLK_SSC_IN 17 A
2 1 XIN R334 1 2 49.9/F
1 1 0 400 100 33 R340 24

1
R331 1 2 49.9/F 1 2 14M_SIO 26
Y3 U30 R330 1 2 49.9/F

37

38
1 1 1 RSVD 100 33 R341 24
14.318MHZ 50 52 14M_REF 1 2

VDDA

VSSA
14M_ICH 11

2
C451 27P XTAL_IN REF

1
2 1 XOUT 49 44 R_HCLK_MCH 4 3 RP24
XTAL_OUT CPU0 HCLK_MCH 5
R368 *10K_NC R358 10K 43 R_HCLK_MCH# 2 1 C429 C430
CPU0# HCLK_MCH# 5
1 2 SELPSB0_CLK 1 2 +3VRUN
4P2R-S-33 *10P_NC *10P_NC

2
CLK_EN# 10 41 R_HCLK_CPU 4 3 RP23
17,42 CLK_EN# VTT_PWRGD#/PD# CPU1 HCLK_CPU 3
R351 *0_NC R350 *0_NC VCCP 55 40 R_HCLK_CPU# 2 1
11 STP_PCI# PCI_STOP# CPU1# HCLK_CPU# 3
1 2 SELPSB1_CLK 1 2 4,11,42 STP_CPU# 54 CPU_STOP#
4P2R-S-33
36 R_HCLK_ITP 4 3 RP22
CPU2_ITP/SRC7 HCLK_ITP 3
R337 *0_NC R342 *10K_NC 35 R_HCLK_ITP# 2 1
CPU2#_ITP/SRC7# HCLK_ITP# 3
1 2 SELPSB2_CLK 1 2 SMbus address D2 4P2R-S-33
CGCLK_SMB 46 CK-410M 33
R367 33 CGDAT_SMB SCLK SRC6
Depop R337 for Dothan-B 47 SDATA SRC6# 32
11 CLK48_USB 1 2
SELPSB0_CLK 12 31 R_MCH_3GPLL 4 3 RP21
FSA/USB_48 SRC5 CLK_MCH_3GPLL 6
SELPSB1_CLK 16 30 R_MCH_3GPLL# 2 1
4,6 SELPSB1_CLK FSB/TEST_MODE SRC5# CLK_MCH_3GPLL# 6
SELPSB2_CLK 53 4P2R-S-33
4,6 SELPSB2_CLK FSC/TEST_SEL
26 R_PCIE_SATA 2 1 RP26
SRC4 CLK_PCIE_SATA 10
VDDREF_CR 48 27 R_PCIE_SATA# 4 3
VDD_REF SRC4# CLK_PCIE_SATA# 10
CLKVDD 42 4P2R-S-33
VDD_CPU R_PCIE_ICH
SRC3 24 2 1 RP27 CLK_PCIE_ICH 11
CLKVDD1 1 25 R_PCIE_ICH# 4 3
VDD_PCI_1 SRC3# CLK_PCIE_ICH# 11
7 4P2R-S-33
VDD_PCI_2
SRC2 22
B CLKVDD 21 23 B
L36 VDD_SRC0 SRC2# RP28
28 VDD_SRC1
+3VRUN 1 2 CLKVDD 34 19 R_DOT100_SS 2 1 DOT100_SS
VDD_SRC2 SRC1 DOT100_SS 6
ACB2012L-120 20 R_DOT100#_SS 4 3 DOT100#_SS
SRC1# DOT100#_SS 6
1

1 2 0 o h m s @ 100Mhz C434 C454 C455 C436 C421 VDD48_CR 11


R338 475/F VDD_48 4P2R-S-33
SRC0 17
.047U .047U .047U .047U 4.7U_10V_0805 1 2 I REF 39 18
2

IREF SRC0#
Iref=5mA, Ioh=4*Iref 5 R_PCLK_PCM R353 1 2 39
PCI5 PCLK_PCM 21
4 R_PCLK_SIO R354 1 2 39
PCI4 PCLK_SIO 26
RP29 3 R_PCLK_DOCK R355 1 2 39

GND_PCI_1
GND_PCI_2
PCI3 PCLK_DOCK 38

GND_SRC
GND_CPU
GND_REF
4 3 R_DOT96 14 56 R_PCLK_MINI R343 1 2 39
6 DOT96 DOT96 PCI2 PCLK_MINI 23

GND_48
R346 2.2 2 1 R_DOT96# 15 9 R_PCLK_ICH R352 1 2 39
6 DOT96# DOT96# PCIF1 PCLK_ICH 10
1 2 VDDA_CR 8 R_PCLK_LAN R492 1 2 39
PCIF0/ITP_EN PCLK_LAN 35
4P2R-S-33
1

C435 C446

2
13
51
2
6
29
45
.047U 4.7U_10V_0805 ICS954201/CY28411 R357
2

250mA ( MAX. ) *10K_NC

1
L37
2 1 CLKVDD1 +3VRUN
+3VRUN
ACB2012L-120
1 2 0 o h m s @ 100Mhz
1

C457 C458 C459

.047U .047U 4.7U_10V_0805


2

C C
CLK_MCH_3GPLL R329 1 2 49.9/F
CLK_MCH_3GPLL# R328 1 2 49.9/F

R356 2.2 +3VRUN CLK_PCIE_SATA R360 1 2 49.9/F


1 2 VDD48_CR CLK_PCIE_SATA# R359 1 2 49.9/F

SMBus
1

C456 C460 CLK_PCIE_ICH R362 1 2 49.9/F


2 CLK_PCIE_ICH# R361 1 2 49.9/F
.047U 4.7U_10V_0805 4
2

RP25
4P2R-S-10K
DOT96 R366 1 2 49.9/F
2

R336 1R DOT96# R365 1 2 49.9/F


1
3

1 2 VDDREF_CR
3 1 CGDAT_SMB DOT100_SS R364 1 2 49.9/F
11 PDAT_SMB CGDAT_SMB 13,17
1

C437 DOT100#_SS R363 1 2 49.9/F


.047U
Q37 2N7002
2

+3VRUN Place these termination to


Split Power Plane to avoid SSN/SN.
close CK410M. Cause those
Pin-out is for Current-Mode.
2

3 1 CGCLK_SMB
11 PCLK_SMB CGCLK_SMB 13,17
D D
Q36 2N7002

These are for backdrive issue


QUANTA
Title
COMPUTER
CLOCK GENERATOR

Size Document Number R ev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 15 of 49


1 2 3 4 5 6 7 8
5 4 3 2 1

Placed this Bypass


capacitor close to
OVCC. +3VRUN

1
C29 C295 .1U_10V
.1U_10V C32 INT- 1 2 SDVOB_INT- 6
10U_6.3V

2
R195 5.6K
1 2 SDVO_CTRLCLK
D +2.5VRUN D
C293 .1U_10V
R202 5.6K INT+ 1 2
6 SDVOB_R+ SDVOB_INT+ 6
+2.5VRUN 1 2 SDVO_CTRLDATA
6 SDVOB_R-
R186 2.2K
6 SDVOB_G+
+5VRUN 2 1 DVI_SDAT
6 SDVOB_G-
R193 2.2K
6 SDVOB_B+
+5VRUN 2 1 DVI_SCLK
6 SDVOB_B-

6 SDVOB_CLK+
6 SDVOB_CLK-
L8
BLM11A601S
+3VRUN 1 2 DVI_SPVCC

1
C35 C40
.1U_10V 10U_6.3V

48
47
46
45
44
43
42
41
40
39
38
37
U5

SPVCC
SDVOB_CLK-

SDVOB_B-
SDVOB_CLK+
SGND2

SDVOB_B+

SDVOB_G-

SDVOB_R-
SVCC2

SDVOB_G+
SGND1

SDVOB_R+
R12 R11
*1K_NC 1K
+3VRUN 1 2 1 2
L26 L9
BLM11A601S +3VRUN BLM18PG181SN1
+3VRUN 1 2 DVI_PVCC1 1 36 DVI_SVCC 1 2 +1_8VRUN
OVCC SVCC1 EXT_RES
C
6,10,11,19,25 PLTRST# 2 RESET# EXT_RES 35 C
1

1
3 SPGND VCC3 34
C21 C262 4 33 INT- C33 C37 C36
6 SDVO_CTRLDATA SDSDA SDVOB_INT-
.1U_10V 10U_6.3V 5 32 INT+ .1U_10V .1U_10V 10U_6.3V
6 SDVO_CTRLCLK
2

2
SDSCL SDVOB_INT+
6 A1 GND2 31
7 GND1 TEST 30
38 DVI_SCLK 8 SCLDDC HTPLG 29 2 1 DVI_DETECT 38
38 DVI_SDAT 9 SDADCC VCC2 28
L28 10 27 R482 10K
BLM11A601S VCC1 PGND2
11 PVCC1 PVCC2 26
+1_8VRUN 1 2 DVI_VCC 12 25 R13 1K
AGND EXT_SWING EXT_RES 2

AGND1

AGND2
1

AVCC1

AVCC2
1

2
TXC+

TX0+

TX1+

TX2+
TXC-

TX0-

TX1-

TX2-
C23 C24 C296 C25 R8
.1U_10V .1U_10V 10U_6.3V .1U_10V 100
2

SI1362

13
14
15
16
17
18
19
20
21
22
23
24
L7

1
BLM11A601S
DVI_AVCC 1 2 +3VRUN
L27

1
BLM11A601S
+3VRUN 1 2 DVI_PVCC2 C18 C19 C17
.1U_10V .1U_10V 10U_6.3V

2
1

38 DVI_CLK-
C22 C267
38 DVI_CLK+
.1U_10V 10U_6.3V
2

38 DVI_TX0-
38 DVI_TX0+

B 38 DVI_TX1- B
38 DVI_TX1+

38 DVI_TX2-
38 DVI_TX2+

DVI_TX0+ R190 1 2 110/F C273 1 2 .1U_10V DVI_TX0-


DVI_TX1+ R182 1 2 110/F C263 1 2 .1U_10V DVI_TX1-
DVI_TX2+ R189 1 2 110/F C272 1 2 .1U_10V DVI_TX2-
DVI_CLK+ R183 1 2 110/F C264 1 2 .1U_10V DVI_CLK-

Put these 4 Resistors and 4


Capacitors close to the TX pin of
SDVO device

A A

QUANTA
Title
COMPUTER
SIL 1362 DVI

Size Document Number R ev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 16 of 49


5 4 3 2 1
5 4 3 2 1

15V +3VRUN LCDVCC


Q20 J3
FDC653N 1770302-1
6 INV_PWR_SRC
30 15 LCDVCC

2
5 4 R498
R187 0 29 14 VEDID_PWR
2 10 LAMP_STAT 2 1 28 13 +3VRUN
330K 1 DDC_DATA_V
27 12 PBAT_SMBDAT 26,41,47

2
+3VRUN +3VALW C266 C271 DDC_CLK_V
26 11 PBAT_SMBCLK 26,41,47
R14 FPBACK_C
25 LCD_TST

3
47_0805 22U .01U 25 10
+5VALW

1
24 9

1
LCDVCC_ON
R17 R18 23 8 C724 C725

1
22 7

2
*47K_NC 47K C277 47P 47P
6 TXLOUT0- TXLOUT1- 6

2
D 21 6 D
6 TXLOUT0+ 20 5 TXLOUT1+ 6

3
.01U

1
Q21 Q8 19 4
2 2 6 TXLOUT2- 18 3 TXLCLKOUT- 6
2N7002 2N7002
6 TXLOUT2+ 17 2 TXLCLKOUT+ 6
Q9 3

1
BSS138 16 1

2 LCDVCC
6,26 FPVCC
+3VRUN
1

1
C38 C39 C274
Panel Core Power .1U_10V .047U .1U_10V

2
Back Light Enable +3VRUN
controller C311
INV_PWR_SRC

1 2
Q26
LCD CONN
.047U AO6405
5

U23 PW R_SRC +5VALW

1
2 C297 C298
6 FPBACK
4 FPBACK_C 6 D15
1 4 5 .1U_50V .1U_50V 1
25 FPBACK_EN

2
C 2 C
7SH08 1 3 PBAT_SMBCLK

2
C301

1
.1U_50V 2
R214

3
+3VRUN 100K DA204U
+2.5VRUN +2.5VRUN

2
2

INV_PWR_SRC_ON +5VALW
2

R191

1
R208 2.2K D14
2.2K R213 1
2

47K
1

3 PBAT_SMBDAT
1

1 3 DDC_CLK_V
6 DDC_CLK

2
INV_PWR_SRC_ON_R 2

3
Q24 DA204U
+2.5VRUN BSS138 +3VRUN 2 +3VRUN
+2.5VRUN Q27 Diode Terminator/ ESD Protector

1
2

Slave Adress : 58H 2N7002


R209 R201
2.2K 2.2K
2
1

1 3 DDC_DATA_V
6 DDC_DATA

Q25
B
BSS138
I2C Bus B

L17
*BLM21B331SB_NC +3VRUN
SSCD_VDD 1 2
2

R54 C71 C75


*10K_NC *.1U_10V_NC *10U_6.3V_NC
2

U8
1

15 CLK_SSC_IN 1 CLKIN VDDA 16


VDD 9
SSC_S3 2 RP3
SSC_S2 S3 R_DREFSSCLK
3 S2 CLKOUT 12 4 3 DREFSSCLK 6
SSC_S1 4 11 R_DREFSSCLK# 2 1
S1 CLKOUT# DREFSSCLK# 6
2

7 14 *4P2R-S-33_NC
13,15 CGCLK_SMB SCLK IREF
R60 R61 R62 8
13,15 CGDAT_SMB SDATA
2

*10K_NC *10K_NC *10K_NC 13


VSSIREF R46 R47
15,42 CLK_EN# 5 PWRDWN VSS 10
2

2 1 6 15 *49.9/F_NC *49.9/F_NC
33 14M_AC97
1

R55 *33_NC REFOUT/SELVSSA R45


*475/F_NC
1

CLK_SSC_IN *MK1493-05GT_NC
1
1

A R58 A
*33_NC

QUANTA
1 2

R59
C83 0
33 14M_AC97 CLK_SSC_IN 15
*10P_NC
COMPUTER
Spread
2

Title
LCD CONN&CK-SSCD

spectrum(LVDS) Size Document Number


Tahiti(DM3L)
R ev
1A

Date: 星期二, 三月 29, 2005 Sheet 17 of 49


5 4 3 2 1
A B C D E

+5VRUN

2
+2.5VRUN
D2
RB500V-40
1

1
L22

1
1 2 JVGA_R 2 1 C239 3 VGA_RED
4 6,38 VGA_RED D11 4
BLM18BB470SN1D C2 .01U

2
*.1U_NC
38 M_SEN# 2
L23
JVGA_G CRT_VCC
6,38 VGA_GRN 1 2 DA204U
BLM18BB470SN1D
6
L24
11
1 2 JVGA_B 1
6,38 VGA_BLU
BLM18BB470SN1D 7 +2.5VRUN

1
T46 PAD 12

1
R161 R160 R159 C244 C243 C242 C233 C235 C236 2
75/F 75/F 75/F 8 1

1
4.7P 4.7P 4.7P *4.7P_NC*4.7P_NC*4.7P_NC 13

2
CRT_VCC 3 C238 3 VGA_GRN

2
D12
9

2
*.1U_NC
14 2
CRT_VCC +2.5VRUN JVGA_NC 4
10 DA204U

3
1
15
C4 AHCT1G125DCH +2.5VRUN RP10 5

1
3
2 1
4P2R-S-2.2K
JVGA2
5

.1U_10V RP11
U2 4P2R-S-2.2K +2.5VRUN DS01A91-WL36

4
2
2
Q3 <VENDOR> +2.5VRUN
2 4 BSS138
6 VGAHSYNC

2
4
6 DAT_DDC2 1 3 DOCK_DAT_DDC2 38
1

1
Q2
3

3 BSS138 C240 3 VGA_BLU 3


R2 D13
6 CLK_DDC2 1 3 DOCK_CLK_DDC2 38

2
1K L2 *.1U_NC
2
1 2 JVGA_HS
5

R494 0 BLM11A121S
DA204U
1

U3 1 2 HSYNC 38
L3
2 4 1 2 JVGA_VS
6 VGAVSYNC
BLM11A121S
R495 0

1
1 2 C7 C6
VSYNC 38
3

AHCT1G125DCH C237 C234 C3 C5


10P 10P *10P_NC *10P_NC 10P 10P

2
Level Shift
CRT ESD Protector

+3VRUN
CT_0310: Change L4~L6 from 1.8UH to BLM18BD151SN1. CLOSE TO JTV1
Change C8~C13 from 82P to 6P to follow Azada design.
1
2 2
L4 3
TV_C/R 1 2
6,38 TV_C/R
BLM18BD151SN1 2
1

R3 C13 C9 D3
150/F 6pF 6pF *DA204U_NC
2

2
2

JTV2
L6
6,38 TV_Y/G TV_Y/G 1 2 TV_Y/G_L 4
BLM18BD151SN1 1
1

5
1

R4 C11 C10 2
150/F 6pF 6pF TV_COMP_L 7
3
2

TV_C/R_L 6
2

L5 SUYIN_35134A-06T1
TV_COMP 1 2
6,38 TV_COMP
BLM18BD151SN1
1

R5 C12 C8 +3VRUN +3VRUN


150/F 6pF 6pF
2

1 1
2

1 1
3 3

D4 D5
2
QUANTA
TV-OUT *DA204U_NC *DA204U_NC

Title
COMPUTER
CRT&TV CONN

Size Document Number R ev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 18 of 49


A B C D E
1 2 3 4 5 6 7 8

+3VRUN +1_8VRUN

C223 3900P B_PDDREQ R413 1 2 5.6K

1
SATA_RXP0_C 1 2 SATA_RXP0 C466 C509 C508 C491
10 SATA_RXP0_C
.1U_10V .047U .1U_10V .047U B_IDE1RST_R# PIN HEADER TYPE RP8
C224 3900P B_IOCS16# 1 2

2
SATA_RXN0_C 1 2 SATA_RXN0 R390 33 JIDE3 B_IRQ14 3 4
10 SATA_RXN0_C
1 2 IDE1RST#
B_PDD7 1 2 B_PDD8 4P2R-S-10K
B_PDD6 3 4 B_PDD9
U33 B_PDD5 5 6 B_PDD10
SATA_RXP0 B_PDD0 B_PDD4 7 8 B_PDD11
A 32 TX_P H_DD[0] 62 9 10 A
SATA_RXN0 31 64 B_PDD1 +3VRUN B_PDD3 B_PDD12
TX_M H_DD[1] B_PDD2 B_PDD2 11 12 B_PDD13
10 SATA_TXP0 27 RX_P H_DD[2] 2 13 14
10 SATA_TXN0 28 5 B_PDD3 B_PDD1 B_PDD14
RX_M H_DD[3] 15 16

2
7 B_PDD4 B_PDD0 B_PDD15
R377 1 H_DD[4] 17 18
11 UAO_8040 2 0 45 UAO H_DD[5] 11 B_PDD5 R417
19 20
R376 1 2 0 43 13 B_PDD6 B_PDDREQ
11 UAI_8040
6,10,11,16,25 PLTRST# 17
UAI H_DD[6]
15 B_PDD7 4.7K B_PDIOW# 21 22 HDD CONN. SCREWS
RST_N H_DD[7] B_PDD8 B_PDIOR# 23 24 R414 470
14

1
R370 *10K_NC H_DD[8] B_PDD9 B_PIORDY 25 26 CSEL1 1
+3VRUN 1 2 33 T0 H_DD[9] 12 27 28 2
R371 1 2 *10K_NC 34 10 B_PDD10 B_PDDACK#
R372 *10K_NC T1 H_DD[10] B_PDD11 B_IRQ14 29 30 B_IOCS16# JS3 JS4
+3VRUN 1 2 35 T2 H_DD[11] 6 31 32 R147
+3VRUN R373 1 2 10K 36 3 B_PDD12 B_PDA1 HDD_P34 1 2
T3 H_DD[12] B_PDD13 B_PDA0 33 34 B_PDA2
37 T4 H_DD[13] 1 35 36
R374 1 2 10K 38 63 B_PDD14 B_PDCS1# B_PDCS3# *10K_NC
R375 1 T5 H_DD[14] 37 38
+3VRUN 2 10K 39 T6 H_DD[15] 61 B_PDD15 HDD_P39
39 40
HDD_SCREW HDD_SCREW
40 T7 41 42 +5VSATA

2
50 B_PDA0
H_DA[0] B_PDA1 R149 43 44
18 CNFG0 H_DA[1] 51
R400 1 2 10K 19 49 B_PDA2 *510_NC
8040_VAA CNFG1 H_DA[2]
20 CNFG2
48 B_PDCS1# SUYIN_200055 CT_0315: Change JIDE3 HDD connector's footprint from

1
H_CS_N0
1

+3VRUN R398 1 2 *10K_NC 21 47 B_PDCS3# HDD-200043FB044G513ZL-44P to HDD-200043FB044GX13ZL-44P


C483 ATAIOSEL H_CS_N1
4 VDDIO1 +5VSATA
2.2U_6.3V +3VRUN 44 58 B_PDIOR#
2

VDDIO2 H_DIOR_N/H_DMARDY_N/H_STROBE

1
9 59 B_PDIOW# C230 C231 C571
8040_VSS VDD1 H_DIOW_N/H_STOP B_PIORDY .1U_10V 1nF 10U_10V
+1_8VRUN 41 VDD2 H_IORDY/H_DSTROBE/H_DDMARDY_N 55
L39 56 54 B_PDDACK#

2
8040_VAA VDD3 H_DMACK_N B_PDDREQ
+3VRUN 2 1 24 VAA1 H_DMAQ 60
BLM11A121S 29 53 B_IRQ14 +3VRUN
B VAA2 H_INTRQ B
1

16 B_IDE1RST_R#
C486 C485 H_RESET_N R385 1
H_IOCS16_N 52 2 10K
.1U_10V .1U_10V 46 R378 1 2 10K
HDD CONN
2

8040_VSS H_PDIAG_N
R384
23 XTLOUT ISET 26 2 1
*27P_NC 8 12.1K/F
C490 GND1
GND2 42
1 2 XTALO_HD 57
GND3
VSS1 25
22 30 8040_VSS
X3 R386 XTLIN/OSC VSS2
*25MHz_NC *1M_NC 88SA8040
*27P_NC
C495 DEVICE CONFIGURATION
1 2 XTALI_HD Pin Name Pin# Settings
R397 0 T7 40 NC JMOD2
1 2 T6 39 1/NC 1 2 INT_MOD_IN1# +5VMOD
T5 38 0 +5VMOD 1 2
3 3 4 4
T4 37 NC 5 6
T3 36 1/NC 5 6
7 7 8 8

1
L44 Y4 T2 35 1/NC 9 10 C319 C318
OSC_25MHZ_VCC OSC_25MHZ T1 34 0/NC R215 9 10 C312
+3VRUN 2 1 4 VCC OUT 3 11 11 12 12
BLM11A121S T0 33 1/NC 13 14 10U_10V .1U .1U
25,26 SATA_DET#

2
8040_VSS CNFG[2:0] 20.19.18 NC.0.NC 100K 13 14
1 2 1 OE VSS 2 15 15 16 16
ATAIOSEL 21 1/NC 17 18

1
R403 10K H_PDIAG_N 46 0 USB_VD0+ 17 18
11 USB_VD0+ 19 19 20 20
1

25MHz_Q H_IOCS16_N 52 1/NC USB_VD0- 21 22


11 USB_VD0- 21 22
C507 C506 <tolerance> 23 24
10U_6.3V .1U_10V DASP# 23 24 PDCS3#
C 25 26 C
2

PDCS1# 25 26 PDA2
27 27 28 28
8040_VSS 29 30 PDA0
PDIAG# 29 30 PDA1
31 32
SATA TO PATA SWITCH IRQ14
PDDACK#
33
35
31
33
35
32
34
36
34
36 CSEL2
2 1 PIORDY 37 38 PDIOR#
+3VRUN 37 38
R218 4.7K 39 40 PDIOW#
PDDREQ 39 40 PDD15
41 41 42 42
+5VRUN +5VSATA R217 470 PDD0 43 44
R436 43 44
2 1 CSEL2 PDD14 45 45 46 46 PDD1
1 2 PDD13 47 48 PDD2
+5VSUS 47 48 PDD12
49 49 50 50
0_0805 Q29 +5VMOD PDD3 51 52 PDD11
FDC653N PDD4 51 52
53 53 54 54
PDD10 55 56 PDD5
+5VSUS +5VSATA PDD9 55 56 PDD6
6 57 57 58 58
5 4 59 60 PDD8
Q15 PDD7 59 60 R220 2 56
2 61 61 62 62 1 IDERST_MOD 25
1

*AO6402_NC 1 63 64
63 64 USB/IDE# 25
1

6 C337 PDDREQ 65 66
10 PDDREQ 65 66
1

5 4 1U_16V C320 PDIOW# 67 68 INT_MOD_IN2#


10 PDIOW# MODPRES# 25
2

67 68
1

2 4.7U_10V_1206 C327 PDIOR#


10 PDIOR#
2

1 + C229 .01U PIORDY


10 PIORDY
2

100U/6.3V R216 100K PDDACK# JAE-WM1F068N1F-68P-RDV R225 10K


CC3528
10 PDDACK#
15V 2 1 IRQ14 1 2
10 IRQ14 +3VRUN
3

15V PDA1
10 PDA1
3

PDA0 R221 100K


10 PDA0
R148 *100K_NC C326 PDCS1# USB/IDE# 1 2
10 PDCS1# +3VRUN
D 2 1 .01U PDA2 D
10 PDA2
2

47K PDCS3#
25 MODC_EN# 2 10 PDCS3#
3

C221

*.01U_NC 47K QUANTA


2

47K
25 HDDC_EN# 2
Q28
10 PDD[0..15]
PDD[0..15]
COMPUTER
1

DTC144EUA
Title
47K
IDE (HDD&CD_ROM

POWER SWITCH
Q14
MEDIA BAY
1

*DTC144EUA_NC Size Document Number Rev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 19 of 49


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

PV21 PV22 H16 H18 H23


PV9 PV19 PV20 PV3

2
PAD138X98 PAD138X98 1 h-c315d126p2-4 1 h-c315d126p2-4 1 h-c315d126p2-4
PAD138X98 PAD197X98 PAD197X98 PAD197X98

5 3 5 3 5 3

GND

GND
GND

GND

GND

GND

1
1

4
A A

H17 H21

2
+3VSUS +3VSUS 1 h-c315d126p2-4 1 h-c315d126p2-4

5 3 5 3

C465 C531 C116 C111

1
PV12 PV16 PV15
2200P 2200P 2200P 2200P
PAD197X98 PAD197X98 PAD197X98

4
GND

GND

GND

H2 H22
+3VRUN +3VRUN H19 H14

2
1 h-c315d126p2-4 1 h-c315d126p2-4
1

2
Stitching caps 1 h-c315d126p2-4 1 H-C315I166D126P2

5 3 5 3
5 3

PV7 PV13 PV14 PV2 PV8


B B

4
PAD197X98 PAD197X98 PAD197X98 PAD197X98 PAD197X98 PV23

4
*PAD138X98_NC
GND

GND

GND

GND

GND

H8

GND

2
+5VSUS 1 h-c236d126p2-4
1

5 3

C14

1
2200P

2
PV5 PV17 PV4

4
PAD138X98 PAD138X98 PAD197X98

+3VRUN
Stitching caps
GND

GND

GND
1

C C

CT_0314:Change PV17 from PAD197x98


to PAD138x98 small size. H13 H12 H20 H15
2

2
1 h-c236d110p2-4 1 h-c236d110p2-4 1 h-c315d118p2-4 1 h-c354d126p2

H3 H5 H6 H11 H10
5 3 5 3 5 3 5 3
h-tc177bc63d63pt h-c315d102p2 h-c315d102p2 h-c315d102p2 h-c315d102p2
1

4
H7
H24 H4
2

JS2 1 h-c236d126p2-4
2

h-tc236bc118d63p2 1 h-c256d126p2-4

D 5 3 D
MDC_NUT 5 3
1

JS2 is mounted on H24(BOT). QUANTA


COMPUTER
4

Title
SCREW PAD

Size Document Number Rev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 20 of 49


1 2 3 4 5 6 7 8
8 7 6 5 4 3 2 1

REG1.5
+3VSUS VPPCB VCCCB +5VSUS +3VSUS

TPS_CLOCK
TPS_LATCH
TPS_DATA
VPPCB CON2
1

1
C426 C438 C440 C431 C433 C432 C427 C443 C444 C439 PCI-1CA41501-T1-TH
C407 C445 C89 C87 C442 C441

1
1U_10V 1U_10V .1U .1U .1U .1U 1nF 1nF 1nF 1nF C453 C418 .1U .1U .1U 4.7U_10V_0805 .1U 4.7U_10V_0805 1 69
2

2
CAD0 GND GND
2 D3-CAD0 GND 70
.1U .1U CAD1 3 71

2
+3VSUS CAD3 D4-CAD1 GND
4 D5-CAD3 GND 72
CAD5 5

REG1.5
CAD7 D6-CAD5
6 D7-CAD7
D R322 CC/BE0# 7 D
CAD9 CE1#-CC/BE0#
2 1 8 A10-CAD9
+5VSUS +5VSUS CAD11 9
0_0603 CAD12 OE#-CAD11
10

P10

K19
F14
F12
A11-CAD12

L14
J14

C9
U14A CAD14

P6
P8

B9

A9

K1

K2
F9
F6
L6
J6
U12 11 A9-CAD14
CC/BE1# 12
CPAR A8-CC/BE1#
1 24 13

SLATCH/VPP_PGM
CORE_VCC0
CORE_VCC1
CORE_VCC2
CORE_VCC3
CORE_VCC4
CORE_VCC5
CORE_VCC6
CORE_VCC7
CORE_VCC8
CORE_VCC9
CORE_VCC10

SDATA/VCC5#

SCLK/VCC3#

1.5V1
1.5V2

VR_EN#
5V_0 NC CPERR# A13-CPAR
2 5V_1 NC 23 14 A14-CPERR#
A15 TPS_DATA 3 22 CGNT# 15
SKT_VCC0 VCCCB DATA NC WE/PGM-CGNT#
J19 TPS_CLOCK 4 21 CINT# 16
SKT_VCC1 TPS_LATCH CLOCK SHDN# RDY/BSY-IRQ/CIN
5 LATCH 12V_1 20 VCCCB 17 VCC
6 NC NC 19
+3VSUS P1 C10 CAD31 7 18 18
PCI_VCC0 CAD31 CAD30 12V_0 NC +3VSUS CCLK VPP1
W8 PCI_VCC1 CAD30 A10 VPPCB 8 AVPP/AVCORE NC 17 19 A16-CCLK
F11 CAD29 9 16 CIR DY# 20
10,23,35 AD[0..31] CAD29 VCCCB AVCC0 NC A15-CIRDY#
AD31 M1 E11 CAD28 10 15 CC/BE2# 21
AD30 AD31 CAD28 CAD27 AVCC1 OC# CAD18 A12-CC/BE2#
M2 AD30 CAD27 C11 11 GND NC 14 22 A7-CAD18
AD29 M3 B13 CAD26 12 13 CAD20 23
AD28 AD29 CAD26 CAD25 11,31,39 SUSPWROK RESET# 3.3VIN CAD21 A6-CAD20
M6 AD28 CAD25 C13 24 A5-CAD21
AD27 M5 A14 CAD24 TPS2220A (PWP) CAD22 25
AD26 AD27 CAD24 CAD23 CAD23 A4-CAD22
N1 AD26 CAD23 B14 26 A3-CAD23
AD25 N2 B15 CAD22 CAD24 27
AD24 AD25 CAD22 CAD21 CAD25 A2-CAD24
N3 AD24 CAD21 E14 28 A1-CAD25
AD23 P3 A16 CAD20 CAD26 29
AD22 AD23 CAD20 CAD19 +3VSUS CAD27 A0-CAD26
R1 AD22 CAD19 D19 30 D0-CAD27
AD21 R2 E17 CAD18 CAD29 31
AD20 AD21 CAD18 CAD17 RSVD/D2 D1-CAD29
P5 AD20 CAD17 F15 32 D2-RFU
AD19 R3 H19 CAD16 CCLKRUN# 33
AD18 AD19 CAD16 CAD15 WP/IOIS16-CCLKR
T1 AD18 CAD15 J17 U15 34 GND
C AD17 T2 J15 CAD14 C
AD17 CAD14

1
AD16 W4 J18 CAD13 8 35
AD15 AD16 CAD13 CAD12 VCC C102 CCD1# GND
W7 AD15 CAD12 K15 36 CD1#-CCD1#
AD14 R8 K17 CAD11 USB_EN_CARD 1 .1U CAD2 37

2
AD13 AD14 CAD11 CAD10 1OE CAD13 CAD4 D11-CAD2
U8 AD13 CAD10 K18 11 USB_VD3+ 2 1A 1B 3 38 D12-CAD4
AD12 V8 L15 CAD9 CAD6 39
AD11 AD12 CAD9 CAD8 RSVD/D14 D13-CAD6
W9 AD11 CAD8 L18 7 2OE 40 D14-RFU
AD10 V9 L19 CAD7 5 6 CAD15 CAD8 41
AD10 CAD7 11 USB_VD3- 2A 2B D15-CAD8
AD9 U9 M17 CAD6 CAD10 42
AD8 AD9 CAD6 CAD5 CVS1# CE2#-CAD10
R9 AD8 CAD5 M18 GND 4 43 VS1#/RFSH-CVS1
AD7 V10 N19 CAD4 CAD13 44
AD6 AD7 CAD4 CAD3 SN74CB3Q3306APW CAD15 RSVD-CAD13
AD5
U10
R10
AD6
AD5
TI PCI4515- 1 of 2 CAD3
CAD2
M15
N17 CAD2 CAD16
45
46
RSVD-CAD15
A17-CAD16
AD4 W11 N18 CAD1 RSVD/A18 47
AD3 AD4 CAD1 CAD0 CBLOCK# A18-RFU
V11 AD3 CAD0 P19 48 A19-CBLOCK#
AD2 U11 CSTOP# 49
AD1 AD2 CDEVSEL# A20-CSTOP#
P11 AD1 CLK_48 F1 50 A21-CDEVSEL#
AD0 R11 R345 51
AD0 CCCLK VCC
CCLK F18 1 2 CCLK

2
P2 E19 CFRAME# 33 52
10,23,35 C/BE3# C/BE3# CFRAME# VPP2/VPP2
U5 F17 CIR DY# R317 C TRDY# 53
10,23,35 C/BE2# C/BE2# CIRDY# A22-CTRDY#
V7 G15 C TRDY# 0 CFRAME# 54
10,23,35 C/BE1# C/BE1# CTRDY# A23-CFRAME#
W10 F19 CDEVSEL# CAD17 55
10,23,35 C/BE0# C/BE0# CDEVSEL# A24-CAD17
G18 CSTOP# CAD19 56

1
AD17 CSTOP# A25-CAD19
1 R321 2 100 IDSEL N5 IDSEL CPAR H14 CPAR CVS2# 57 VS2#/RSVD-CVS2
L1 G19 CPERR# CRST# 58
15 PCLK_PCM PCI_CLK CPERR# RESET-CRST
U6 C12 CSERR# CSERR# 59
10,23,35 DEVSEL# DEVSEL# CSERR# WAIT#-CSERR#
R6 C14 CREQ# CREQ# 60
10,23,35 FRAME# FRAME# CREQ# RSVD-CREQ#
V5 G17 CGNT# CC/BE3# 61
B 10,23,35 IRDY# IRDY# CGNT# REG#-CC/BE3# B
W5 E12 CINT# CAUDIO# 62
10,23,35 TRDY# TRDY# CINT# BVD2/SP-CAUDIO#
V6 H15 CBLOCK# CSTSCHNG 63
10,23,35 STOP# STOP# CBLOCK# BVD1-STSCHG
U7 A11 CCLKRUN# CAD28 64
10,23,35 PAR PAR CCLKRUN# D8-CAD28
R7 C15 CRST# CAD30 65
10,23,35 PERR# PERR# CRST# D9-CAD30
W6 B10 RSVD/D2 CAD31 66
10,23,35 SERR# SERR# R2_D2 D10-CAD31
L3 M19 RSVD/D14 CCD2# 67
10 REQ1# REQ# R2_D14 CD2#-CCD2#
L2 H17 RSVD/A18 68
10 GNT1# GNT# R2_A18 GND
K3 A13 CVS1#
10,23,35 PCIRST# PCI_RST# CVS1
K5 B16 CVS2#
25 CBUS_GRST# GRST# CVS2
N15 CCD1#
CCD1# CCD2#
H3 B11
33 PCM_SPK#
23,25,26,35 PCI_PME# L5
SPKR_OUT#
RI_OUT#/PME#
CCD2#
CAUDIO
CSTSCHG
B12
A12
CAUDIO#
CSTSCHNG
CardBus Slot
J3 E13 CC/BE3#
10,23,25,35 CLKRUN# MF6 (CLKRUN#) CC/BE3#
J2 E18 CC/BE2#
MF5 CC/BE2# CC/BE1#
J1 MF4 (RI_OUT#) CC/BE1# H18
H1 L17 CC/BE0#
10,11,25 SERIRQ MF3 (SIRQ#) CC/BE0#
H2 R323 10K
MF2 (INTC#) +3VSUS
H5 J5 2 1 +3VSUS 1394 Code
10,35 PIRQC# MF1 (INTB#) SUSPEND#
G1 E10 USB_EN_CARD C97
SC_RST#

10,23 PIRQD# MF0 (INTA#) USB_EN


SC_VCC

currently
SC_RFU
SC_CD#
SC_FCB

SC_CLK
GND10
GND11
GND12
GND13
GND14
GND15
TEST0
TEST1
TEST2
TEST3

SC_IO
2

GND0
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9

G2 1394SCL integrate in
SCL

3
1
R327 G3 1394SDA *.1U_NC
100K SDA RP5 system BIOS
PCI4515
H6
K6
N6
P7
P9
M14
K14
G14
F13
F10
F7
R17
U13
U14
U18
R14
P12
U12
V12
W12
F3
E3
D1
F5
E1
E2
G6

U13
1

1 8 *4P2R-S-2.7K_NC
A0 VCC
2

4
2
A1 1394SCL
A 3 A2 SCL 6 A
R320 *33_NC 5 1394SDA
R69 SDA
PCLK_PCM 1 2

3
1
2

*10K_NC
1 7 WC
*24C02LM_NC
GND 4
RP20 QUANTA
4P2R-S-220
1

C419
*10P_NC
SOIC8-6-1_27

Title
COMPUTER
2

4
2 TI_PCI7515

Size Document Number Rev


1394 EEPROM Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 21 of 49


8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

CT_0217: Change C450


from 10U_4V to 10U_10V.
+3VSUS
VCC_PLL
D D
L38 BLM15AG700SN1

1
C450 C452
C449
10U_10V 0.001uF_0402 1U_10V VDPLL_15

1
+3VSUS C727
.1U_10V

2
U14B VCC_PLL
AVD1 P13
AVD2 P14
AVD3 U15
VDPLL_33 U19
P15 R348
VDPLL_15
T18
R0

R1 T19
6.34K/F
TPBIAS0
1394 CONN

1
R13 TPBIAS0 C108 R75 R76
TPBIAS0 L10
V14 TPA0P 1U_10V 56.2/F 56.2/F PLW3216S900SQ2T1

2
TPA0+ TPA0N <PN> J4
TPA0- W14
TPA0P 3 3 4 4 F_TPA0P
V13 TPB0P
C
TPB0+ TPB0N +3VSUS TPA0N F_TPA0N
TPB0- W13 2 2 1 1 C
4 A1+
P17 PHY_TEST_MA 4.7K R347 3
PHY_TEST_MA A1-
2 B1+
1 B1-
TPB0P 2 2 1 1 F_TPB0P

TPB0N 3 3 4 4 F_TPB0N

TI PCI4515- 2 of 2 L11
PLW3216S900SQ2T1 TYCO_IEEE1394
R12 CPS <PN>
CPS R72 R74
CNA P18
56.2/F 56.2/F
R18 X0 C113 12pF_0402
XO TPB0

1
X2 C103 R73
5.11K/F
24.576MHZ 220pF
<PN>

2
R19 X1 C114 12pF_0402
XI

B B

Layout and design guidelines for the 1394 signals:

1. The differential impedance of the twisted pair signals (i.e. TPA0+/TPA0- and
TPB0+/TPB0- should nominally be 110 Ohm. Verification by TDR per the 1394 Base Test
TPBIAS1 W17 Specification is recommended. The differential through impedance looking into the
V16
connector with all components installed must be 90 - 130 Ohms.
TPA1+
TPA1- W16

V15
2 Propagation delay of the differential pairs should be minimized. The skew of the
TPB1+
TPB1- W15 differential signals must be less than 100 ps as measured per the 1394 Base Test
Specification.
PCI4515
3. Jitter of the twisted pairs must be less than 150 ps as measured by the 1394 Base
Test Specification. Jitter can be minimized by appropriate decoupling and filtering
of the PLL Vcc as implemented in these reference schematics.

A A

QUANTA
Title
COMPUTER
TI_PCI7611_1394 & CONN

Size Document Number Rev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 22 of 49


8 7 6 5 4 3 2 1
1 2 3 4 5 6 7 8

PCLK_MINI
15 PCLK_MINI
+3VRUN

1
RP13

1
R290 C386 C400 C416 C395 C377 LED_WLAN24_ON 1 2
*33_NC LED_WLAN5_ON 3 4
*.1U_10V_NC *.047U_NC *.1U_10V_NC *.047U_NC *4.7U_10V_0805_NC

2
4P2R-S-100K

1 2
A A
C392
AD[0..31] 10,21,35
*15P_NC

AC-Terminator J8
1 TIP RING 2

+3VRUN
+3VRUN 3 4 +3VRUN
8PMJ-3 8PMJ-1 U25
5 8PMJ-6 8PMJ-2 6

5
7 8 7SH32
8PMJ-7 8PMJ-4
9 8PMJ-8 8PMJ-5 10 2
11 12 LED_WLAN24_ON 4
LED1_GRNP LED2_YELP LAN_R_ON 32
13 14 LED_WLAN5_ON 1
26,30 HW _RADIO_DIS# LED1_GRNN LED2_YELN
15 CHSGND RESERVED3 16
10,21 PIRQD# 17 INTB# 5V_2 18 +5VRUN
19 3.3V_1 INTA# 20 PIRQB# 10
21 USBD+ USBD- 22
23 GND0 3.3VAUX1 24 +3V_LAN
PCLK_MINI 25 26
CLK RST# PCIRST# 10,21,35
27 GND1 3.3V_5 28
10 REQ3# 29 REQ# GNT# 30 GNT3# 10
31 3.3V_2 GND9 32
AD31 33 34 PCI_PME#
AD31 PME# PCI_PME# 21,25,26,35
AD29 35 36
AD29 BT_ACTIVE COEX1_BT_ACTIVE 30
37 38 AD30
GND2 AD30

1
AD27 39 40
AD25 AD27 3.3V_6 AD28 R302
41 AD25 AD28 42
B 43 44 AD26 *10K_NC B
30 COEX2_WLAN_ACTIVE WLAN_ACTIVE AD26
C/BE3# 45 46 AD24 R309 100
10,21,35 C/BE3# C/BE3# AD24
AD23 47 48 MINI_IDSEL 2 1 AD19

2
AD23 IDSEL
49 GND3 GND10 50
AD21 51 52 AD22
AD19 AD21 AD22 AD20
53 AD19 AD20 54
55 56 PAR
GND4 PAR PAR 10,21,35
AD17 57 58 AD18
C/BE2# AD17 AD18 AD16
10,21,35 C/BE2# 59 C/BE2# AD16 60
IRD Y# 61 62
10,21,35 IRDY# IRDY# GND11
63 64 FRAME#
3.3V_3 FRAME# FRAME# 10,21,35
CLKRUN# 65 66 TR DY#
10,21,25,35 CLKRUN# CLKRUN# TRDY# TRDY# 10,21,35
SERR# 67 68 STOP#
10,21,35 SERR# SERR# STOP# STOP# 10,21,35
69 GND5 3.3V_7 70
PERR# 71 72 DEVSEL#
10,21,35 PERR# PERR# DEVSEL# DEVSEL# 10,21,35
C/BE1# 73 74
10,21,35 C/BE1# C/BE1# GND12
AD14 75 76 AD15
AD14 AD15 AD13
77 GND6 AD13 78
AD12 79 80 AD11
AD10 AD12 AD11
81 AD10 GND13 82
83 84 AD9
AD8 GND7 AD9 C/BE0#
85 AD8 C/BE0# 86 C/BE0# 10,21,35
AD7 87 88
AD7 3.3V_8 AD6
89 3.3V_4 AD6 90
AD5 91 92 AD4
AD5 AD4 AD2
93 RESERVED1 AD2 94
AD3 95 96 AD0
AD3 AD0
+5VRUN 97 5V_1 RESERVED5 98
AD1 99 100
AD1 RESERVED6
C
101 GND8 GND14 102 C
103 AC_SYNC M66EN 104
105 AC_SDATA_IN AC_SDATA_OUT 106
107 AC_BIT_CLK AC_CODEC_ID0# 108
109 AC_CODEC_ID1# AC_RESET# 110
111 112 DEBUG_OUT
MOD_AUDIO_MON RESERVED7 DEBUG_OUT 25
113 AUDIO_GND1 GND15 114
115 SYS_AUDIO_OUT SYS_AUDIO_IN 116
117 SYS_AUDIO_OUT GND SYS_AUDIO_IN GND 118
119 120 R349 10K
DEBUG_ENABLE AUDIO_GND2 AUDIO_GND3
25,26 DEBUG_ENABLE 121 RESERVED2 MPCIACT# 122 1 2 +3VSUS
123 VCC5A 3.3VAUX2 124 +3V_LAN
MINI-PCI_AMP

D D

QUANTA
Title
COMPUTER
MINI-PCI &MDC

Size Document Number R ev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 23 of 49


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+3VSUS
A A

2
C552 C554
.01U 2.2U_10V

1
JS1

J9 MDC_NUT
1 GND1 Reserved1 2
10 IAC_SDATAO_MDC 3 IAC_SDATO Reserved2 4
5 6
10 IAC_SYNC_MDC
1 2
7
9
GND2
IAC_SYNC
MDC 3.3V
GND3 8
10
+3VSUS

10 IAC_SDATAIN1 IAC_SDATAIN GND4


R430 33 11 12 IAC_BITCLK_MDC
10 IAC_RESET#_MDC IAC_RESET# IAC_BITCLK IAC_BITCLK_MDC 33

1
New MDC R426
1

C561 *33_NC
*10P_NC

1 2
2

C558
*10P_NC

2
B Keep the space 40mil between Tip/Ring. JMODEM1 B
TIP 1
38 TIP 1
R ING 2
38 RING 2
3
MDC CONN. 4
5
3
4
5
C256 C255
53398-0590
300P_1808_3KV 300P_1808_3KV

CC1808 CC1808

TIP & RING To Docking and MDC CONN.

C C

D D

QUANTA
Title
COMPUTER
MDC CONN.

Size Document Number R ev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 24 of 49


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+3VRUN
+3VRUN

+3VALW

2
R261

3
1
100K
R291 10K RP14
ATF_INT# USIO2A
1 2

1
4P2R-S-100K
L2
LPC47N354 LRESET# PLTRST# 6,10,11,16,19

4
2
D_SERIRQ
MACALLEN III DLDRQ1# R2
T2
D_DLDRQ1# 38
D_CLKRUN#
A DLFRAME# D_LFRAME# 38 A
N2 D_LAD0
DLAD0 D_LAD0 38
P1 D_LAD1
DLAD1 D_LAD1 38
D_LAD2
JDEBUG2 F13
1 OF 2 DOCK LPC DLAD2 P2
N3 D_LAD3
D_LAD2 38
21 CBUS_GRST# SGPIO30 DLAD3 D_LAD3 38
D_SERIRQ
DEBUG_ENABLE
33,34 HP_NB_SENSE F14
E16
SGPIO31 256 - LBGA DSER_IRQ R4
T3 D_CLKRUN#
D_SERIRQ 38
1 43,44,46 RUN_ON_D SGPIO32 DCLKRUN# D_CLKRUN# 38
DEBUG_OUT E15
2 36,45 AUX_EN SGPIO33
3 T140 E12 SGPIO34 LDRQ1# R3 LPC_DRQ1# 10
PAD
*MOLEX-53398-0390_NC
32,45 USB_EN# E13
D16
SGPIO35 LPC LFRAME# N4
M3
LFRAME#/FWH4 10
19 MODPRES# SGPIO36 LAD0 LAD0/FWH0 10
19 USB/IDE# D15 SGPIO37 LAD1 R1 LAD1/FWH1 10
LAD2 T1 LAD2/FWH2 10
11 EXT_SMI# C16
B16
SGPIO40 8051 LAD3 P3
T4
LAD3/FWH3 10
11 EXT_SCI# SGPIO41 SER_IRQ SERIRQ 10,11,21 +RTC_PWR3_3V VCCRTC
11 EXT_WAK# C15
A16
SGPIO42 GPIO CLKRUN# P5 CLKRUN# 10,21,23,35
10 RCIN# SGPIO43
33 NB_MUTE D14 SGPIO44

2
33 BEEP C14 SGPIO45
DEBUG_ENABLE C13 B1 R259 R260
23,26 DEBUG_ENABLE SGPIO46 GPIOA0 T26 PAD
DEBUG_OUT B14 D4 *100K_NC 100K
23 DEBUG_OUT SGPIO47 GPIOA1 T72 PAD
GPIOA2 C1 T30 PAD
T5 E3 BIA_PWM 6

1
T141 PAD LGPIO50 GPIOA3/WINDMON R258 0
+3VALW 11 SLP_S3# N6 LGPIO51
PCI_PME# L6 F5 1 2
21,23,26,35 PCI_PME# LGPIO52 POWER_SW_IN# POWER_SW# 31,32
ATF_INT# R6 F4
R64 31 ATF_INT# LGPIO53 ACAV_IN ACAV_IN 40,41
11 SLP_S5# T6 LGPIO54 ALWON F6 ALWON 45 Dash Board Power Bottom

1
1 2 LCD_TST 33 SPDIF_SHDN L7 F2 C374
LGPIO55 TESTA T25 PAD
LCD_CL#_SIO P7 1U_10V
LGPIO56
26,38 DOCK_SIO_ALERT# N7

2
*10K_NC LGPIO57
B B

11 ICH_PCIE_WAKE# A15 LGPIO60


27,39,46 RUN_ON D13 LGPIO61
10 ICH_PME# A14 LGPIO62
C12 +3VRUN
11 THRM# LGPIO63
39,45,46 SUS_ON B13 LGPIO64 RXD K1 RXD0 27
11 PWRBTN# A13 LGPIO65 LPC TXD K5 TXD0 27

2
19,26 SATA_DET# D12 LGPIO66 nRTS K4 RTS0# 27
R493
31 5V_CAL_SIO# F11 LGPIO67 GPIO nCTS K3 CTS0# 27
B12
COM1 nDTR K6
K2
DTR0# 27 10K
PW R_SRC 17 LCD_TST LGPIO70 nDSR DSR0# 27
19 IDERST_MOD A12 L1 DCD0# 27

1
R57 10K +RTC_PWR3_3V LGPIO71 nDCD
17 FPBACK_EN C11 LGPIO72
1 2 D11 B10 RI0#
T85 PAD LGPIO73 nRI RI0# 27
U9 MAX1615 E11
T83 PAD LGPIO74 +3VALW
1 IN OUT 3 T36 A11 LGPIO75
PAD
5/3# 4 19 MODC_EN# F10 LGPIO76 IRMODE
19 HDDC_EN# C10 LGPIO77 GPIO10 H15 IRMODE 37
1

1
C81 C79 5 2 K14 IRRX
SHDN GND IRRX IRRX 37
1

C80 IRTX R298


.1U_50V 1U_25V 1U_10V
IR IRTX M4 IRTX 37
100K
2

D9
2

2 1

2
H7 R299 0
OUTD3/nACK ACK# 28
RB751V VCCRTC J4 1 2 LCD_CL#_SIO
GPIOB2/nSLCTIN SLCT_IN# 28 32 LID_CL#
GPIOB1/nINIT J5 INIT# 28
R52 1K D8 J7
GPIOB2/nALF AFD# 28

1
33 RBAT_3V 2 1 VCCRTC_D 2 1 E2 K7 C394
VCC0/BAT GPIOB0/nSTROBE STRB# 28
.1U_10V
LPT OUTD2/BUSY G1 BUSY 28
2

RB751V C85 G5 PE 28

2
C
.1U_10V OUTD1/PE C
OUTD0/SLCT F1 SLCT 28
J6 ERROR# 28
1

OUTD4/nERROR PD0
GPIOC0/PD0 J1 LID SWITCH
PD1
M7
VCC GPIOC1/PD1 H2
H1 PD2
+3VALW VCC1_1 GPIOC2/PD2 PD3
R13 VCC1_2 GPIOC3/PD3 H3
1

C729 C730 C731 C383 C405 C391 C378 C406 C410 C401 C411 L11 H4 PD4
4.7U_10V_0805 VCC1_3 GPIOC4/PD4 PD5
H12 VCC1_4 GPIOC5/PD5 H5
10U_10V 10U_10V *10U_10V_NC .1U_10V .047U .047U .047U .1U_10V .047U .047U PD6
E14 H6
2

VCC1_5 GPIOC6/PD6 PD7


B11 VCC1_6 GPIOC7/PD7 H8
B7 P D[0..7]
VCC1_7 PD[0..7] 28
A1 VCC1_8 VSS1 C2
VSS2 G4
VSS3 J3
VSS4 N1

G2
GND VSS5 N5
T10
+3VRUN VCC2_1 VSS6
M2 VCC2_2 VSS7 R15
1

CT_0310: Adding C729~C730 2x10U C382 C389 C379 C398 P4 J11


Caps to fix rebooting issue of reflash. 4.7U_10V_0805 VCC2_3 VSS8
J2 VCC2_4 VSS9 G14
.047U .047U .1U_10V B15
2

VSS10
R5 VCC2/PLL VSS11 G9
VSS12 B6
P6 L32
VSS/PLL RAGND 1
AGND F3 2
BLM11A121S
L35 LPC47N354
1 2 VCC_SIO_PLL
+3VRUN BLM11A121S
D D
1

C387
.1U_10V
QUANTA
2

Title
COMPUTER
Ultra I/O Controller LPC47N354

Size Document Number R ev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 25 of 49


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

BID3 BID2 BID1 BID0


+3VSUS +5VALW +3VALW 0 Board Revision
0 0 0 0 PROTO1
0 0 0 1 PROTO1.5
0 0 1 0 PROTO2.0
0 0 1 1 PROTO3.0
0 1 0 0 QT
W3

2
0 1 0 1 RAMP1
CLK_32KX2_SMC 1 4 CLK_32KX1_SMC R304 R293 R297
*4.7K_NC 100K 4.7K +3VRUN
2 3

1
1

1
A A
C356 C371
15P 32.768KHZ 15P USIO2B
CLK_32KX1_SMC E1 R310 10K
2

2
XTAL1

2
CLK_32KX2_SMC D1 L10 KAH_PGM# 1 2
XTAL2 LPC47N354 FPGM
TEST_PIN K12 PAD T82 R272 R292 R301 R287
A9 R257 10K *10K_NC 10K *10K_NC *10K_NC
36,38 DOCKED IN0 EC_XOSEL
T34 PAD B9
B8
IN1 MACALLEN III XOSEL E4
J12
2 1
38 DOCK_SMB_INT#

1
IN2 nEC_SCI R306 10K
6,17 FPVCC A8 IN3 +3VALW BID0
47 SBAT_ALARM# C8
D8
IN5 2 OF 2 SYSOPT0 K15
K16
1 2
BID1
40,47 SBAT_PRES# IN6 SYSOPT1
E8 J9 BID2
47 PBAT_PRES# IN7 nBAT_LED BAT1_LED# 32

1
BID3
31 THERMTRIP_SIO H13
H11
GPIO0 256 - LBGA LDRQ0# M6
J10
LPC_DRQ0# 10
R288
3 PROCHOT# GPIO1 nPWR_LED BAT2_LED# 32

2
H10 *10K_NC
T142 PAD GPIO2
G10 D7 R279 R289 R296 R280
T80 PAD KSO16 G13 GPIO3 OUT0 EEPROM_WC 29 10K *10K_NC 10K 10K
C7 DOCK_PWR_EN 38

2
GPIO7 OUT1
32 CAP_LED# J14 GPIO8 OUT2 F7 HW _RADIO_DIS# 23,30
32 NUM_LED# J16 A6 LAN_LOW_PWR# 35

1
GPIO9 OUT3
32 SRL_LED# G11 GPIO17 OUT4 E6 CHG_PBATT 40
40 CHG_SBATT F15 GPIO20 OUT5 D6 SBAT_LOW 40
Integrted GX PS_ID F12 C6 PAD T147
47 PS_ID GPIO21 OUT6
A5 GPIO82/FAN_TACH3 OUT7 E7 PAD T144 Board ID
T33 PAD A7 PAD T145
BID0 OUT8 T56 PAD
B5 GPIO84 OUT9 G7
BID1 E5 G8 CT_0217: Pop R296,R280,R292 10K, Depop R301,R287,R289 10K.
GPIO85 OUT10 BREATH_LED# 32
2

R497 BID2 D5 F8
GPIO86 OUT11 FAN1_PWM 31
+5VRUN BID3
10K
A4
B4
GPIO87 MISC K13 RP17 4P2R-S-10K
47 PS_ID_DISABLE# GPIO90 PWRGD RUNPWROK 39,42
B C5 D2 VCC1_PWROK SBAT_SMBDAT 1 2 B
T143 PAD GPIO91 VCC1RST# VCC1_PWROK 29 +3VALW
Integrted GX A3 L5 SBAT_SMBCLK 3 4
RESET_OUT# 39
1

GPIO92 nRESET_OUT
T24 PAD A2 GPIO93
14.7K R255 2

14.7K R256 2

14.7K R263 2

14.7K R262 2

D9 PBAT_SMBDAT 3 4
AB1A_DATA DAT_SMB 29,31
C3 C9 PBAT_SMBCLK 1 2
T70 PAD GPIO96 AB1A_CLK CLK_SMB 29,31
T69 PAD D3 GPIO97 AB1B_DATA F9 DOCK_SMB_DAT 38
RP16 4P2R-S-4.7K
T79 PAD D10
E10
MSCLK GPIO AB1B_CLK E9
H16
DOCK_SMB_CLK 38
T81 PAD MSDAT GPIO11 SBAT_SMBDAT 47
H14 RP15
GPIO12 SBAT_SMBCLK 47
38 CLK_SM1 G6 EMCLK GPIO13 J15 PBAT_SMBDAT 17,41,47 3 4 +5VALW
38 DAT_SM1 G3 EMDAT GPIO14 J13 PBAT_SMBCLK 17,41,47 1 2
GPIO15 A10 FAN1_TACH 31
B3 H9 4P2R-S-10K
30 CLK_SM2 GPIO94/IMCLK GPIO16 PAD T78
30 DAT_SM2 C4 GPIO95/IMDAT GPIO19 F16 GATEA20 10

38 CLK_KBD M1 KCLK PCI_CLK L3 PCLK_SIO 15


38 DAT_KBD M5 KDAT NC_32KHZ JKB2
G15
CLOCK GPIO83/32KHZ_OUT B2
L4
PAD T23
KSO10
47 PBAT_ALARM# GPIO6 CLOCKI 14M_SIO 15 1
KSO15 G12 KSO11
KSO14 GPIO5 SIO_FA0 2 KSO9
G16 GPIO4 FA0 N12 3
KSO13 R7 T13 SIO_FA1 KSO14
KSO13 FA1 4

1
KSO12 T7 P12 SIO_FA2 KSO13
KSO11 KSO12 FA2 SIO_FA3 R264 R265 5 KSO15
K8 KSO11 FA3 T14 6
KSO10 J8 T15 SIO_FA4 33 *33_NC KSO16
KSO9 KSO10 FA4 SIO_FA5 7 KSO12
L8 KSO9 FA5 R16 8
KSO8 M8 N13 SIO_FA6 KSO0

2
KSO7 KSO8 FA6 SIO_FA7 9 KSO2
N8 KSO7 FA7 P16 10
KSO6 P8 M14 SIO_FA8 KSO1
KSO6 FA8 26 11

1
+3VALW KSO5 SIO_FA9 C369 C370 KSO3
C
KSO4
T8
R8
KSO5 K/B FA9 N15
N16 SIO_FA10 22P *22P_NC 27 12 KSO8 C

KSO3 KSO4 FA10 SIO_FA11 28 13 KSO6


R9 M13

2
KSO3 FA11 29 14
1

KSO2 T9 L12 SIO_FA12 KSO7


R313 KSO1 KSO2 FA12 SIO_FA13 30 15 KSO4
P9 KSO1 FA13 M15 16
10K KSO0 N9 M16 SIO_FA14 KSO5
KSO0 FA14 SIO_FA15 17 KSI0
FA15 L14 18
KSI7 M9 L13 SIO_FA16 KSI3
2

CHG_SBATT KSI6 KSI7 FA16 SIO_FA17 19 KSI1


L9 KSI6 FA17 L15 20
KSI5 SIO_FA18 KSI5
KSI4
K9
K10
KSI5 FLASH FA18 L16
K11 SIO_FA19 SIO_FA[0..19] 21 KSI2
KSI4 FA19 SIO_FA[0..19] 29 22
KSI3 M10 R14 KSI4
KSI2 KSI3 FA20 PAD T37 23 KSI6
R10 KSI2 FA21 T16 24
KSI1 N10 P13 PAD T38 KSI7
KSI0 KSI1 FA22 PAD T86 25
SIO_FD[0..7]
P10 KSI0
P14
Keyboard JAE_FK1S030W52
29 SIO_FD[0..7] nFRD FRD# 29
SIO_FD0
SIO_FD1
T11 FD0 nFWR N14 FWR# 29 CONN
R11 FD1 nFCS P15 FCS# 29
SIO_FD2 M11
SIO_FD3 FD2
N11 FD3
SIO_FD4 P11
SIO_FD5 FD4 +3VALW
T12 FD5
SIO_FD6 R12
SIO_FD7 FD6
M12 RP18
FD7 PCI_PME#
10 1 PCI_PME# 21,23,25,35
PBAT_ALARM# 9 2 SATA_DET#
SATA_DET# 19,25
LPC47N354 8 3 DOCK_SIO_ALERT#
DOCK_SIO_ALERT# 25,38
7 4 DEBUG_ENABLE
DEBUG_ENABLE 23,25
6 5 +3VALW
D 10P8R-4.7K D

KSI7 100P CAPS CLOSE TO JKB1


8
CP3
7 KSI6 8
CP4
7 KSI1 8
CP5
7 KSO4 8
CP6
7 KSO3 8
CP7
7 KSO12 8
CP8
7 KSO14
QUANTA
1

C397
*100P_NC
6
4
5
3
KSI4
KSI2
KSI5
6
4
5
3
KSI3
KSI0
KSO5
6
4
5
3
KSO7
KSO6
KSO8
6
4
5
3
KSO1
KSO2
KSO0
6
4
5
3
KSO16
KSO15
KSO13
6
4
5
3
KSO9
KSO11
KSO10 Title
COMPUTER
2 1 2 1 2 1 2 1 2 1 2 1
2

Ultra I/O Controller LPC47N254(GPIO/KB/MISC/FLASH)


*8P4C-100P_NC *8P4C-100P_NC *8P4C-100P_NC *8P4C-100P_NC *8P4C-100P_NC *8P4C-100P_NC
Size Document Number R ev
Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 26 of 49


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+5VSUS
JCOM1
SERIAL PORT
5
RI0 L53 1 2 BLM11A121S 9

1
C628 DTR0 L54 1 2 BLM11A121S 4
A A
.1U_10V CTS0 L55 1 2 BLM11A121S 8
TXD0# L56 1 2 BLM11A121S 3

2
RTS0 L57 1 2 BLM11A121S 7
RXD0# L58 1 2 BLM11A121S 2
C629 .1U_50V U39 DSR0 L59 1 2 BLM11A121S 6
1 2 28 26 DCD0 L60 1 2 BLM11A121S 1
C1+ VCC DS0019-D2
24 C630 .47U_0805 <VENDOR>
C631 .47U_0805 C1-
V+ 27 1 2

1
1 2 1 C632 C633 C634 C635 C636 C637 C638 C639
C2+ C640 .47U_0805
2 3 1 2 270P 270P 270P 270P 270P 270P 270P 270P

2
C2- V-
14 9 TXD0#
25 TXD0 T1IN T1OUT
13 10 RTS0
25 RTS0# T2IN T2OUT
12 11 DTR0
25 DTR0# T3IN T3OUT

DCD0 R2OUTB 20 Place them close to serial port


4 R1IN R1OUT 19 DCD0# 25
RI0 5 18
R2IN R2OUT RI0# 25
RXD0# 6 17
R3IN R3OUT RXD0 25
CTS0 7 16
R4IN R4OUT CTS0# 25
DSR0 8 15
R5IN R5OUT DSR0# 25

25,39,46 RUN_ON 22 FORCEOFF INVILID 21 PAD T122


+5VSUS 23 FORCEON GND 25

MAX3243(TI)/ICL3243E

B B

If MAX3243 pin 22 tied to RUN_ON,then it can not support Ring Out

C C

D D

QUANTA
Title
COMPUTER
SERIAL PORT & USB

Size Document Number R ev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 27 of 49


1 2 3 4 5 6 7 8
A B C D E

4 4

VCCLPTPP

VCCLPTPP
+5VRUN
RP39
2

1
RP40 C641
1 10
D18 1 10 2 9 *.1U_10V_NC
RB751V 2 9 3 8 RV4

2
3 8 4 7 *VZ0603M260APT_NC

2
4 7 5 6
1

5 6

1
10P8R-4.7K
1

1
C642
10P8R-4.7K
.1U_10V RV5

1
C643 C644 C645 C646 C647 RV6 *VZ0603M260APT_NC
2

2
270P 270P 270P 270P 270P *VZ0603M260APT_NC

2
1

1
R448

2
C648 C649 C650 C651
*1.5K/F_NC 270P 270P 270P 270P

2
JLPT1
R449 2 1 10 STRB#_R 1
25 STRB#
3 25 AFD# R450 2 1 10 AFD#_R 14 3
PD0 R451 2 1 10 PD0_R 2
25 ERROR# R452 2 1 10 ERROR#_R 15
PD1 R453 2 1 10 PD1_R 3
25 INIT# R454 2 1 10 INIT#_R 16
PD2 R455 2 1 10 PD2_R 4
25 SLCT_IN# R456 2 1 10 SLCT_IN#_R 17
PD3 R457 2 1 10 PD3_R 5
18
PD4 R458 2 1 10 PD4_R 6
19
PD5 R459 2 1 10 PD5_R 7
20
PD6 R460 2 1 10 PD6_R 8
21
PD7 R461 2 1 10 PD7_R 9
22
25 ACK# R462 2 1 10 ACK#_R 10
23
25 BUSY R463 2 1 10 BUS Y_R 11
24
25 PE R464 2 1 10 PE_R 12
25
25 SLCT R465 2 1 10 SLCT_R 13

DS01A91-WL36-TR

1
C652 C653 C654 C655
270P 270P 270P 270P

2
1

1
2 2
C656 C657 C658 C659 VCCLPTPP VCCLPTPP
270P 270P 270P 270P
P D[0..7]
PD[0..7] 25

1
C660

1
C661
*.1U_10V_NC

2
*.1U_10V_NC

2
RV7 RV8

2
*VZ0603M260APT_NC *VZ0603M260APT_NC

1
RV9 RV10
*VZ0603M260APT_NC *VZ0603M260APT_NC

2
1 1

QUANTA
Title
COMPUTER
PARALLEL CONN.

Size Document Number R ev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 28 of 49


A B C D E
A B C D E

4 BIOS FLASH MEMORY 4

8Mbit (1M Byte),ISN'T PLCC TYPE


SIO_FA[0..19] U10 SIO_FD[0..7]
26 SIO_FA[0..19] SIO_FD[0..7] 26
SIO_FA0 21 25 SIO_FD0
SIO_FA1 A0 D0 SIO_FD1
20 A1 D1 26
SIO_FA2 19 27 SIO_FD2
SIO_FA3 A2 D2 SIO_FD3
18 A3 D3 28
SIO_FA4 17 32 SIO_FD4
SIO_FA5 A4 D4 SIO_FD5
16 A5 D5 33
SIO_FA6 15 34 SIO_FD6
SIO_FA7 A6 D6 SIO_FD7
14 A7 D7 35
SIO_FA8 8
SIO_FA9 A8 VCC1_PWROK
7 A9 RESET#/NC 10 VCC1_PWROK 26
SIO_FA10 36 12
SIO_FA11 A10 RY/BY#/NC
6 A11 NC1 29
SIO_FA12 5 38 T64 PAD
SIO_FA13 A12 NC2 +3VALW
4 A13 NC3 11
SIO_FA14 3
SIO_FA15 A14
2 A15 VCC 31
SIO_FA16 1 30
A16 VCC

1
SIO_FA17 40 C95 C94
SIO_FA18 A17 .1U_10V .047U
13 A18
3 SIO_FA19 37 3

2
A19
GND 23
FCS# 22 39
26 FCS# CE# GND
FRD# 24
26 FRD# OE#
FWR# 9
26 FWR# WE#

ST Micro M29W008AB/AMD-29LV081B/SST39VF080

AMD :Pin 10 is RESET# ; Pin12 is RY/BY#


SST :Pin10,12 are NC
1.AMD-29LV081B require MAX 500nS Tready for it's hardware
reset.And MAX6326_UR29 has >100mS reset timing.So we can tie
it's reset# pin to +3VALW directly.
2.SIO has internal 20 mS delay of VCC1_PWROK

+3VALW +3VALW
2 2

1
3
C101
.047U RP6
+3VALW
1

4P2R-S-4.7K
UPW2
1 8 2
4
A0 VCC EEPROM_WC
2 A1 WC 7 EEPROM_WC 26
3 6 CLK_SMB
A2 SCL CLK_SMB 26,31
4 5 DAT_SMB
GND SDA DAT_SMB 26,31
NM24C05U
SMbus address A2

User Password

1 1

QUANTA
Title
COMPUTER
FLASH

Size Document Number R ev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 29 of 49


A B C D E
1 2 3 4 5 6 7 8

A Touch Pad +5VRUN A

1
3
RP19

4P2R-S-10K
JP4
1

2
4
R324 0 1
2 2
1 2 CLK_SM2_R 3
26 CLK_SM2 3
4 4
1 2 DAT_SM2_R 5
26 DAT_SM2 5
R325 0 6 6
7 7
+5VRUN TPVCC 8 8
R70
1 2 TPVCC Molex-528080890-8P
2
4
6
8

0_0805
CP2
8P4C-10P

1
C98 C99
.047U
1
3
5
7

.1U_10V

2
B B

+3VRUN

Bluetooth
1

R423
0_0805
2

J10
1 GND Activity LED 2 WPAN_RADIO_ON 32
3 3.3V(Logic) COEX2 4 COEX2_WLAN_ACTIVE 23
23,26 HW _RADIO_DIS# 5 Radio Enable/Disable# COEX1 6 COEX1_BT_ACTIVE 23
PAD T105 7 RSVD USB- 8 USB_VD2- 11
11 USB_VD2+ 9 USB+ GND 10
C C
1

C556 BM10B-SRSS-10P-R
.1U_10V R429
10K
2

D D

QUANTA
Title
COMPUTER
TOUCH PAD & BULE TOOTH

Size Document Number R ev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 30 of 49


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

FAN Controller & FAN CONN. 15V


+5VRUN +3VRUN
C384
1 2

2
U26A .1U_50V

1
2
5
6
R252 120K LM358 R40
26 FAN1_PWM 2 1 3 Q13 10K
1 3 FDC653N
2

1
A A

1
C375

4
.22U_0805 FAN1_TACH 26
C372

2
2 1 FAN1
2200P J5
1 2 VCCFAN1
R41 1
2

3
78.7K/F
3

1
R42 C70
120K 22U MOLEX-53398-0390
D7

2
1
DAN202U

2
RT2:
1. Mitsubishi 1% 0603 10K ohm@25 degree C. P/N: TH11-3h103FT
+3VSUS
ATF_INT# 25 2. Panasonic 1% 0603 10K ohm @25 degree C. P/N:ERTJ1VG103FA
1

+5VSUS
R295 RT2 should be placed between NB and SO-DIMM on BOT side.
B 100K 3 THERMDA B

2
R232
2

ICH_PWROK# 3 THERMDC U24 2.21K/F


3

26,29 DAT_SMB DAT_SMB 1 +5VSUS

1 1
Q34 R222 49.9/F CLK_SMB 2 THDAT_SMB
11,39 ICH_PWROK 2 26,29 CLK_SMB THCLK_SMB ATF_INT# 9
1 2 R253 1K RT2
2N7002 +3VSUS
1 2 13 TH11-3H103FT
1

SMBADDRSEL
1

2
C350 THERMDA

1
.1U_10V C360 18 R246
REM_DIODE2_P
2200P 17 23 6N300_VCP t 10Kohm 10K
2

THERMDC REM_DIODE2_N VCP @25

2
U201_VCC degree
4

1
+3VSUS

1
VCCRTC C348 C
11,21,39 SUSPWROK 1 2 11 VSUS_PWRGD

3
R250 1K 2200P
10 2 5V_CAL_SIO# 25

2
R229 1K +RTC_PWR3V
RESSERVED 16
ICH_PWROK# 1 2 5 Q32

1
+3V_PWROK#
1

Notes: C365 +3VSUS 2N7002


.1U_10V 21
25,32 POWER_SW# POWER_SW# Place under CPU
Vset=(Tp-75)/16
2

THERMTRIP1# 6 19 REM_DIODE1_N
Where Tp=75 to THERMTRIP1# REM_DIODE1_N
20 REM_DIODE1_P
REM_DIODE1_P
1

1
106 degree C THERMTRIP2# 7 THERMTRIP2#
1

1
R223 R233 10K +3VALW C357 2 Q10
Set trip point=90 degree c C364 43K/F 1 2 8 THERMTRIP3# THERMTRIP_SIO 15 2200P 3904
.1U_10V 24
Vset = (90-75)/16= 0.9375 V
2

3
THERM_STP#

2
22
2

VSET R244
C
14 HW_LOCK# C
Guardian temp-tolerance= +/-3 degree C 3 VSS INTRUDER# 12 100K Put 2200P close to Guardian.
1

R224

1
1

10K/F C349 R249 EMC6N300


2200P 1K THERMTRIP_SIO 26
2

THERM_STP# 45
2

SM_INTRUDER# 10

GUARDIAN IC
+3VSUS
+3VSUS

1
1

R245
R228 8.2K
8.2K

2
THERMTRIP2#
2

THERMTRIP1# VCCP
VCCP Q31 3
Q30 R266 2.2K
3

1
D R270 2.2K 1 2 2 C362 D
1

1 2 2 C358 *.1U_10V_NC
*.1U_10V_NC 3904
1

2
3904
QUANTA
2
1

6 THERMTRIP_GMCH#
3 THERMTRIP#

Title
COMPUTER
CPU THERMTRIP Place C358 close to Guardian NB THERMTRIP Place C362 close to Guardian FAN & THERMAL

Size Document Number R ev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 31 of 49


1 2 3 4 5 6 7 8
A B C D E

SW2
+3VRUN
25 LID_CL# 1
2
3
4

1
Q6
4 4
SPPB53V
47K

10 SATA_LED# 2
10K
DTA114YUA
LID SWITCH

3
HDD_LED
HDD_LED 38
HDD LED

+5VALW +5VALW
+3VRUN

1
Q4 Q5
R156
150 DTA114YUA DTA114YUA
47K 47K

26 BAT1_LED# 2 26 BAT2_LED# 2
2
3 10K 10K
R157 10K
WPAN_RADIO_ON 1 2 2 Q16
30 WPAN_RADIO_ON

3
3904
3 BAT1_LED BAT2_LED 3
1

WPAN_RADIO_ON_T BATTERY 1,2 LED


WIRELESS/BLUETOOTH LED

+3VSUS
5

U4

2 4 BREATH_PWRLED
26 BREATH_LED#
J6
7SH04 50 49 +5VSUS
3

50 49
48 48 47 47
46 45 C232
46 45
44 44 43 43 .1U
+3V_LAN 42 41
42 41
40 40 39 39
38 38 37 37
BREATH LED BREATH_PWRLED 34 33 HDD_LED
34 33 BAT1_LED
32 32 31 31
30 29 BAT2_LED
30 29
2 35,38 LAN_ACTLED# 28 28 27 27 2
35,38 100M_LINK# 26 26 25 25 USB_VD4- 11
35,38 10M_LINK# 24 24 23 23 USB_VD4+ 11
11 OC4# 22 22 21 21
11 OC6# 20 20 19 19 USB_VD6+ 11
11 OC5# 18 18 17 17 USB_VD6- 11

11 OC7# 14 14 13 13 USB_EN# 25,45


12 12 11 11
J2 TXOP_A 10 9 USB_VD5+ 11
36 TXOP_A 10 9
TXON_A 8 7
+3VRUN 1 36 TXON_A 8 7 USB_VD5- 11
2 6 6 5 5
CAP_LED# RXIP_A 4 3
26 CAP_LED# 3 36 RXIP_A 4 3 USB_VD7+ 11
POWER_SW# RXIN_A 2 1
25,31 POWER_SW# 4 36 RXIN_A 2 1 USB_VD7- 11
NUM_LED#
26 NUM_LED# 5
SRL_LED# 6 Foxconn-QT8B0501-1111
26 SRL_LED# 7
WPAN_RADIO_ON_T 8

LAN_R_ON
9
10 MB TO I/O-BOARD CONN
23 LAN_R_ON 11
12
13
14
15
16
17
18
19
20
1 1
2-1612037-0-20P-AMP
DASH BOARD CONN
QUANTA
Title
COMPUTER
SWITCH & LED

Size Document Number R ev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 32 of 49


A B C D E
1 2 3 4 5 6 7 8

5VLDO VDDA
+3VRUN VDDA +5VSUS
Headphone Power U32
L41 BLM11A601S 5 1
Vout Vin

1
1 2
4 R439
BYP 4.7K

1
C557 C578 C487 C488 C728 2 3
GND EN MIC_SENSE 34
.047U .1U_10V .1U_10V 2.2U_10V C489

2
2.2U_10V 1U_10V TPS793475

1
C501 C502 C494 VCCA_U39
1U_10V

2
.1U_10V .047U C582

2
A A
1U_16V

1
U38

5
L40
1 2 +3VRUNF 6 R438 10K C574 .1U_10V
25 BEEP
BLM11A601S 1 4 R_PC_SPKRIN 2 1 1 2 PC_SPKRIN
11 SPKR
21 PCM_SPK# 3

1
C484 C467 C562 SPK_SHUTDOWN#

1
2.2U_10V .047U .1U_10V C572

2
NC7SZ386 R437 *1nF_NC

2
8.2K

2
1

1
C565 C560

1
AC97_REF U37 1000P_NPO 1000P_NPO

25
38
43
34
BEEP Controller Circuit

1
9

2
JACK SENSE0
DVDD1
DVDD2

AVDD1
AVDD2

N/C1
AC97_REF PC_SPKRIN 12 35 SPKR_L
PC_BEEP LINE_OUT_L SPKR_R
LINE_OUT_R 36
13 PHONE
BYPASS_GND 14 37
C583 .1U_10V AUX_L MONO_OUT
15 AUX_R
1 2 22 MIC2 CID0 45
CID1 46
42 +5VSUS
AVSS2
C580 2.2U_10V
BYPASS_GND 18 1 2
GAINO GAIN1 AV
CD_L C576 .1U_10V
19 CD_C AC97VREFI
0 0 6dB
20 CD_R VREF 27 1 2

1
B C581 .22U_0805 C573 *.1U_10V_NC 0 1 10dB C500 C526 C504 C503 B
NB_MICIN 2 1 C_NB_MICIN 21 28 AC97_REF 1 2 .1U_10V .047U
34 NB_MICIN MIC1 VREFOUT 10U_10V
1 0 15.6dB .1U_10V JSPK2 53398-0790

2
C564 1000P_NPO
29 AFLT1 1 2 1 1 21.6dB 8 9
AFLT1 8 9

1
2
3
4
5
6
7
C559 1000P_NPO
C579 .1U_10V 30 AFLT2 1 2 R369

1
2
3
4
5
6
7
BYPASS_GND AFLT2
1 2 23 LINE_IN_L 25 RBAT_3V 2 1
N/C2 31
C567 .1U_10V +5VSUS 0_0603
24 32 CAP2 1 2 U34
LINE_IN_R CAP2
6 18 INT_SPK_R1
PVDD1 ROUT+ INT_SPK_R2
15 PVDD2 ROUT- 14
11 C534 .047U_16 16
10 IAC_RESET#_AUDIO RESET# VDD
5 SPKR_L 1 2 4 INT_SPK_L1
10 IAC_SDATAO_AUDIO SDATA_OUT LOUT+
IAC_BITCLK 6 39 C498 .047U_16 C_SPKR_L 5 8 INT_SPK_L2
BIT_CLK HP_OUT_L HP_SPK_L 34 LIN- LOUT-
2 1 R_IAC_SDATAIN08 SPKR_R 1 2 C_SPKR_R 17
10 IAC_SDATAIN0 SDATA_IN RIN-
R435 33 10 41 C527 .47U_10V 19
10 IAC_SYNC_AUDIO SYNC HP_OUT_R HP_SPK_R 34 SHUTDOWN
1 2 9 LIN+

C461

C462

C463

C464
BYPASS_GND C533 .47U_10V
JACK SENSE1

VIDEO_L 16 7 RIN+ NC 12
3 XTL_OUT VIDEO_R 17 1 2 GND5 27

2
HP_COMM

2 47 EAPD C532 .47U_10V 10 1


17 14M_AC97 XTL_IN EAPD BYPASS GND1
2 1 AMP_BYPASS 11
DVSS1
DVSS2

AVSS1

GND2
1

*100P_NC

*100P_NC

*100P_NC

*100P_NC
48 AUDIO_G0 2 13
N/C3

SPDIF 38

1
R431 SPDIF AUDIO_G1 GAIN0 GND3
3 GAIN1 GND4 20
*10_NC

2
TPA6017A2/FAN7031/LM4874
4
7

26
40
44
33

STAC9753A R428
1 2

10K +3VSUS
C
C563 AUDIO AMP. C
2

*10P_NC
SPDIF_SHDN 25
1

2
2

R425 R427
0
100K
1

1
R434 39 +3VRUNF SPK_SHUTDOWN#
10 IAC_BITCLK_ICH 2 1
R432 39 IAC_BITCLK
1

2 1 C726
24 IAC_BITCLK_MDC

3
Q41
2

3
C569 C566 *.1U_10V_NC EAPD 2
2

25,34 HP_NB_SENSE 2 25 NB_MUTE 2


*10P_NC *10P_NC 47K Q38
2
1

1
Q39 Q40 2N7002

1
1

2N7002 2N7002
R500 47K
*DTC144EUA_NC
*10K_NC
1
2

RP32 R409 *1K_NC


4 3 AUDIO_G0 2 1
+5VSUS AUDIO_G1
2 1 2 1
R410 1K
4P2R-S-100K

D D

QUANTA
Title
COMPUTER
AC97 CODEC/AMP

Size Document Number R ev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 33 of 49


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

5VLDO

1
R408

1.3K
+5VRUN

2
VDDA_EXT_MIC

1
C513 C519

1
1nF
4.7U_10V_0805 L45

2
A 10K A
BLM11A121S R502

2
MIC_SENSE 33

2
R402
1.2K
CON3
R401 100/F 1

1
1 2 L43 EXT_MIC+ 2
33 NB_MICIN
BLM11A121S
EXT_MIC_VDDA
6
3
MONO MIC

1
C505 4
1nF 5

2
C499 C510 7

1
8
12
470P 470P 9
LINE OUT

2
10
11

SUYIN-RC142A-12G2

HP_NB_SENSE
HP_NB_SENSE 25,33
B B

R418
1 2 +3VRUN

100K

C555 1U_16V
1 2 U35 L46 BLM11A121S
33 HP_SPK_L
HP_SPK_L1 13 9 HP_SPK_L2 1 2 HP_SPK_L3
HP_SPK_R1 INL OUTL HP_SPK_R2
33 HP_SPK_R 1 2 15 INR OUTR 11
4 1 2 HP_SPK_R3
C551 1U_16V NC1 L47 BLM11A121S
NC2 6
HP_NB_SENSE 14 8
SHDNR NC3

1
18 12 C537 C530
C548 1U_16V SHDNL NC4 470P 470P
NC5 16
1 2 1 20 R420 0

2
C1P NC6
3 C1N SVDD 10 2 1 +3VRUN
PVDD 19

1
5 PVSS PGND 2
7 17 C545 R419 *0_NC
SVSS SGND 1U_16V 2 1 VDDA
MAX4411 2
1

C549
1U_16V
C C
2

Headphone Audio Amp.

D D

QUANTA
Title
COMPUTER
AUDIO HEADPHONE CONN

Size Document Number R ev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 34 of 49


1 2 3 4 5 6 7 8
5 4 3 2 1

LAN-BCM4401KFB(10/100M) BCM4401--10/100

+3V_LAN
+1P8V_LAN
Close to power pins
+3V_LAN +1P8V_LAN
1

1
C584 C585 C586 C587 C588 C589 C590 C591 C592 C593 C594 C595 C596 C597 C598 C599 C600 C606

10U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V 10U_10V
2

2
D D

114

115
125

106

112
0.1U*12 pcs

25
56

19
30
40
52

79
94

65

96
97

91
92

17
44
U1

7
VESD
VESD
VESD

VDDIO
VDDIO
VDDIO
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI

XTAL_AVDD

REGULATOR_AVDD
REGULATOR_AVDD

REGULATOR_VOUT1
REGULATOR_VOUT2

VDDCORE
VDDCORE
VDDCORE
L48
BLM11A601S +3V_LAN
10,21,23 AD[0..31]
AD31 122 75 10M_LINK# 1 2
PCI_AD31 LINK_LED10# 10M_LINK# 32,38
AD30 123 76 100M_LINK#
PCI_AD30 LINK_LED100# 100M_LINK# 32,38
AD29 124 77 ACTLED#
PCI_AD29 ACT_LED# LAN_ACTLED# 32,38

1
AD28 126 78 C610 C611
PCI_AD28 COL_LED# T121
AD27 127
AD26 PCI_AD27 .1U_10V .1U_10V
ID Select : AD16 128

2
AD25 PCI_AD26 +1P8V_LAN
1 PCI_AD25
Interrupt Pin : PIRQC# AD24 3 69
AD23 PCI_AD24 EPHY_BIAS_AVDD L50
6 PCI_AD23
Request indicate : REQ4# AD22 8 57 1 2
AD21 PCI_AD22 EPHY_AVDD L49 BLM11A601S
9 PCI_AD21
Grant indicate : GNT4# AD20 10 64 1 2 +1P8V_LAN
PCI_AD20 EPHY_PLLVDD

1
AD19 11 BLM11A601S C613
AD18 PCI_AD19
14 PCI_AD18

1
AD17 15 C717 C718 .1U_10V

2
AD16 PCI_AD17
16 PCI_AD16 EPHY_VREF 71
AD15 33 72 R440 1.21K/F 1000P_NPO 2.2U_6.3V

2
AD14 PCI_AD15 EPHY_VDAC
34 PCI_AD14 EPHY_TESTMODE 88
AD13 36
C AD12 PCI_AD13 C
37 PCI_AD12 EPHY_TDP 62 TXOP 36
AD11 38 61
PCI_AD11 EPHY_TDN TXON 36
AD10 39 59
PCI_AD10 EPHY_RDP RXIP 36
AD9 41 60
PCI_AD9 EPHY_RDN RXIN 36
AD8 42 PCI_AD8

1
AD7 45 104
AD6
AD5
48
49
PCI_AD7
PCI_AD6
PCI_AD5
BCM4401KQL NC
NC
NC
105
103
R483 R484 R485 R486

AD4 50 108 49.9/F 49.9/F 49.9/F 49.9/F


AD3 PCI_AD4 NC
51 102
128P QFP

2
AD2 PCI_AD3 NC
53 PCI_AD2 NC 109
AD1 54 110 +3V_LAN
PCI_AD1 NC

1
AD0 55 107 C614 C615
PCI_AD0 NC R487
C/BE3# 4 87 2 1 .1U_10V .1U_10V
10,21,23 C/BE3#

2
C/BE2# PCI_CBE_L3 GPIO2/VAUXAVAIL 1K
10,21,23 C/BE2# 18 PCI_CBE_L2 GPIO1 86 T106
C/BE1# 32 85
10,21,23 C/BE1# PCI_CBE_L1 GPIO0 T107
C/BE0# 43
10,21,23 C/BE0# PCI_CBE_L0 +3V_LAN
FRAME# 20 90
10,21,23 FRAME# PCI_FRAME_L BOOTROM_SCL T108
IR DY#
10,21,23 IRDY#
TRD Y#
21
23
PCI_IRDY_L BOOTROM_SDA 93 T109 U41
10,21,23 TRDY# PCI_TRDY_L
DEVSEL# 26 98 SPROM_CS 1 8
10,21,23 DEVSEL# PCI_DEVSEL_L SPROM_CS CS VCC

1
STOP# 27 95 SPROM_CLK 2 7 C616
10,21,23 STOP# PCI_STOP_L SPROM_CLK SK NC
PERR# 28 101 SPROM_DOUT 3 6
10,21,23 PERR# PCI_PERR_L SPROM_DOUT DI ORG .1U_10V
SERR# 29 99 SPROM_DIN 4 5 Note: BCM4401 requires
10,21,23 SERR#

2
PAR PCI_SERR_L SPROM_DIN DO GND
10,21,23 PAR 31 PCI_PAR
10,21 PIRQC#
PIRQC# 116 R442 0 4*AT93C46 16-bit R/W data width
PCI_INT_L
EXT_POR_L 89 1 2 LAN_LOW_PWR# 26
PCIRST# 117
10,21,23 PCIRST# PCI_RST_L
PCLK_LAN 118 83 Note: The BCM4401 has weak internal pulldown resistors on
B 15 PCLK_LAN PCI_CLK JTAG_TDP B
GNT4# 119 80
10 GNT4# PCI_GNT_L JTAG_TCK the following signals:
REQ4# 121 82
10 REQ4# PCI_REQ_L JTAG_TDI
R444 PCI_PME# 113 73 SPROM_CS, SPROM_CLK, SPROM_DOUT, SPROM_DIN.
21,23,25,26 PCI_PME# PCI_PME_L JTAG_TRST_L
*33_NC AD16 R488 1 100 2 PIDSEL 5 81
PCI_IDSEL JTAG_TMS
10,21,23,25 CLKRUN# 1 2 22 PCI_CLKRUN_L
R489 *0_NC

EPHY_BIAS_AVSS
67 XTAL_IN
1

EPHY_PLLGND
EPHY_AGND
C619 Note: EXT_POR_L has a internl pull up.
XTAL_AVSS
66 XTAL_OUT
1

*22P_NC
2

R490
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
1

4.7K
2

200
BCM4401
12
46
111
100
84
2
24
74
13
47
120
35

68
70
58
63

R491
2

Y5

Note: Pop R489 depop R490 when CLKRUN# is required 2 1


Pop R490 depop R489 when CLKRUN# is not required
1

C719
C720
27P 27P
2

25MHz_FSX
+/-30PPM

A A

QUANTA
Title
COMPUTER
BCM4401 100/10 LAN

Size Document Number R ev


Tahiti(DM3L) 1A

Date: 星期二, T月 29, 2005 Sheet 35 of 49


5 4 3 2 1
A B C D E

+3V_LAN

C268 .1U
4 4

16
1 R166 2 TXOP_L 4 2 TXOP_A

VCC
35 TXOP 1Y 1A TXOP_A 32
12nH 5% 3 DOCK_TDP
1B DOCK_TDP 38
1 R167 2 TXON_L 7 5 TXON_A
35 TXON 2Y 2A TXON_A 32
12nH 5% 6 DOCK_TDN
2B DOCK_TDN 38
1 R200 2 RXIP_L 9 11 RXIP_A
35 RXIP 3Y 3A RXIP_A 32
5.6nH 5% 10 DOCK_RDP
3B DOCK_RDP 38
1 R199 2 RXIN_L 12 14 RXIN_A
35 RXIN 4Y 4A RXIN_A 32
5.6nH 5% 13 DOCK_RDN
4B DOCK_RDN 38
8 GND A/B 1 DOCKED 26,38
G 15

U19 R196 10K

PI3L110Q

3
10/100LAN_E-SWITCH 3

+3V_SRC
PQ49 +3V_LAN
SI3456DV
+3V_SRC 6
5 4
PWR_SRC 2
1

1
PC126 PC127
4.7U .1U_10V

3
1

2
PR142 PR143
100K 100K
2 2
2

2
3

2 1
PR144
PQ50 470K
1
3

RHU002N06
2 PR145
25,45 AUX_EN
2

PQ51 200K
RHU002N06
1

1
LAN POWER 1

QUANTA
Title
COMPUTER
LAN SWITCH/LAN POWER

Size Document Number R ev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 36 of 49


A B C D E
1 2 3 4 5 6 7 8

A A

+3VRUN

Note : Total require 1/4W, ~3.6 ohm

R79 2_1206
1 2 IR_LEDA

1
B C112 C100 B
1U_16V .1U_10V

1
2

2
R71
10_0805

Total require 1/8W U31 TFDU6102F

2
1 IREDA
2 IREDC
IRTX 3
25 IRTX TXD
IRRX 4
25 IRRX RXD
IRMODE 5
25 IRMODE SD/MODE
FIR _VCC 6 VCC
7 MODE

1
8 GND

1
R78 C104 C109 R77 NC
10K 4.7U_10V_0805 10K
*.1U_10V_NC 9

2
2

2
IR Detector

C C

D D

QUANTA
Title
COMPUTER
FIR

Size Document Number R ev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 37 of 49


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

J7B
DOCK_PWR_SRC +DC_IN

J7A
VGA DOCK_DET# S137 S137 S205 S205 DOCK_DET#
6,18 VGA_GRN S138 S138 S206 S206 DOCK_DAT_DDC2 18
P1 V1+ V5+ P5 S139 S139 S207 S207 DOCK_CLK_DDC2 18
P2 V2+ V6+ P6 6,18 VGA_BLU S140 S140 S208 S208
P3 V3+ V7+ P7 S141 S141 S209 S209 HSYNC 18
P4 V4+ V8+ P8 25 D_LAD1 S142
S143
S142 S210 S210
S211
VSYNC 18 VGA
S1 S1 S69 S69 M_SEN# 18
VGA LPC 25
25
D_LAD2
D_LAD3 S144
S143
S144
S211
S212 S212 D_CLKRUN# 25
S2 S2 S70 S70 VGA_RED 6,18 S145 S145 S213 S213 D_LAD0 25
S3 S71 S146 S214
A
DVI 16
16
DVI_CLK-
DVI_CLK+ S4
S3
S4
S71
S72 S72 S147
S146
S147
S214
S215 S215
DOCK_SIO_ALERT# 25,26
LPC A
S5 S5 S73 S73 D_SERIRQ 25 S148 S148 S216 S216
S6 S6 S74 S74 S149 S149 S217 S217
+3VRUN +3VRUN DVI_T- S7 S75 S150 S218
DVI_T+ S8
S7
S8
S75
S76 S76 LPC +DC_IN
S151
S150
S151
S218
S9 S9 S77 S77 D_DLDRQ1# 25 S152 S152 S220 S220
1

S10 S10 S78 S78 D_LFRAME# 25 S153 S153


R174 R175 DVI_T+ S11 S79 S154 S222
10K 22K DVI_T- S11 S79 S154 S222
S12 S12 S80 S80 S155 S155 S223 S223
S13 S13 S81 S81 DVI_SCLK 16 S156 S156 S224 S224
S82 DVI_SDAT 16 S157 S225
2

S82 S157 S225

2
S15 S83 C241 C245 S158 S226
47 DOCK_PSID S15 S83 DVI_DETECT 16 S158 S226
DVI_T+ DVI_T- S84 .1U_50V 1nF S159 S227
S84 S159 S227
S17 S85 S160 S228

1
S17 S85 S160 S228
1

DVI_T+ S18 S86 S161 S229


R173
22K
R176
10K
DVI_T- S19
S18
S19
S86
S87 S87 DVI S162
S161
S162
S229
S230 S230
S20 S20 S88 S88 S163 S163 S231 S231
S21 S21 S89 S89 S164 S164 S232 S232
S22 S90 S165 S233
2

16 DVI_TX2+ S22 S90 S165 S233


16 DVI_TX2- S23 S23 S91 S91 S166 S166 S234 S234
S24 S24 S92 S92 S167 S167 S235 S235
S25 S25 S93 S93 S168 S168 S236 S236
16 DVI_TX1+ S26 S26 S94 S94 S169 S169 S237 S237
S27 S95 S170 S238
16 DVI_TX1-
S28
S27 S95
S96 S-VIDEO S171
S170 S238
S239
S29
S28
S29
S96
S97 S97 6,18 TV_C/R S172
S171
S172
S239
S240 S240 S-VIDEO
16 DVI_TX0+ S30 S30 S98 S98 S173 S173 S241 S241 TV_COMP 6,18
16 DVI_TX0- S31 S31 S99 S99 S174 S174 S242 S242
S32 S100 S175 S243
S33
S32
S33
S100
S101 S101 SPDIF 33 SPDIF
S176
S175
S176
S243
S244 S244
TV_Y/G 6,18
B S34 S34 S102 S102 32,35 10M_LINK# S177 S177 S245 S245 B
PCLK_DOCK S35 S103 S178 S246
15 PCLK_DOCK
S36
S35
S36
S103
S104 S104 USB 32,35 100M_LINK#
DOCK_OWNS_PCI
S179
S178
S179
S246
S247 S247
LAN_ACTLED# 32,35
S37 S37 S105 S105 USB_VD1- 11 S180 S180 S248 S248 HDD_LED 32
S38 S38 S106 S106 USB_VD1+ 11 S181 S181
S39 S107 S182 S250
SMBUS 26 DOCK_SMB_CLK
26 DOCK_SMB_DAT S40
S39
S40
S107
S108 S108 DOCK_SMB_INT# 26 S183
S182
S183
S250

26 CLK_SM1 S41 S41 S109 S109 CLK_KBD 26 S184 S184 S252 S252
26 DAT_SM1 S42 S42 S110 S110 DAT_KBD 26 S185 S185 S253 S253
S43 S43 S111 S111 S186 S186 S254 S254
S112 C249 .01U S187 S255
S45 S45
S112
S113 S113 SMBUS 1
C251
2
.01U
S188
S187
S188
S255
S256 S256
S114 S114 S189 S189 S257 S257
PCLK_DOCK S47 S115 1 2 S190 S258
S47 S115 S190 S258
S48 S48 S116 S116 S259 S259
S49 S117 +3V_LAN
S49 S117
1

S50 S118 +3V_LAN S193


R169 S50 S118 C250 .1U_50V 36 DOCK_RDN S193
S51 S51 S119 S119 36 DOCK_RDP S194 S194
*22_NC S52 S120 2 1 S195
S52 S120 36 DOCK_TDN S195
S53 S53 S121 S121 36 DOCK_TDP S196 S196
S54 S122 2 1
1 2

S54 S122
S55
C248
*18P_NC
S55 C252 .1U_50V LAN
S125 S125
S126
2

S126 R171
S127
AC-Terminator
S127
S128 S128
R172
1 2 MODEM
24 TIP M204 M204
1 2 100/F
C C
100/F AMP-1473681-280P
SMBUS ADDRESS :
M136 +3VALW
DOCK/APR Microprocessor -- 74H M136 RING 24
+5VALW
DOCK USB/IDE Interface(FX2) -- 72H AMP-1473681-280P
MODEM

1
DOCK SMbus Battery 16h Charger 12h IDE I/F 70h D-BAY R162

1
10K
72h SIO 48h R155
10K

3 2
Q7
DOCKED 26,36
FDS4435 DOCK_PWR_SRC

2
8 DOCK_PWR_SRC C16 C15 DOCK_DET# 2 Q17
1 7 1 2 1 2 DTC144EUA
PWR_SRC
2 6
3 5 .1U_50V 1nF

1
1
1

C20 R7
.47U_0805 100K
4
2

R6 100K
2

1 2 Docking Detect Circuit


+3VSUS
Place it close
to Docking CONN
5

U18
3

D DOCKED 2 D
4 2
26 DOCK_PWR_EN 1
2

Q18
QUANTA
1

7SH08 R163 2N7002


100K
R158
1
*0_NC
2 COMPUTER
1

Title
Docking Station Conn.
DOCKING POWER SWITCH
Size Document Number R ev
Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 38 of 49


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+3VSUS
SYSTEM POWEROK(ICH_PWROK) to SB
C390 .047U
to generate PCIRST#/PLTRST#
1 2 Circuit
A A

5
U27
6,11,42 IMVP_PWRGD 2 U28D
4 12
26 RESET_OUT# 1 11 ICH_PWROK ICH_PWROK 11,31
3 DBR# 13
7SH08
74AHC08

+3VRUN

1
R305
Keep Away from high speed buses 100K
+3VSUS

2
C403 .1U_10V
1 2

1
C399

14
B B
U28A
.01U 1

2
3
2
+3VSUS
74AHC08
C402 U28B
1 2 4
6 RUNPWROK 26,42
.047U 5
5

74AHC08
25,27,46 RUN_ON 2
4
42,44 VCCP_PWRGD 1

U29
7SH08
RUNPWROK Circuit

C C
+3VALW +3VSUS SUSPWROK 11,21,31
+1_5VSUS
1
1

R294
R300 *330_NC
R303 100K
20K/F U28C
2

1.5VSUS_PWRGD 9
2

8
3

SUSPWROK_B 10
2 Q35
2N7002 74AHC08
1
3

2 Q33
3904
1

C396 R311 0
1U_10V 2 1
44 1.5V_PWRGD

+3VSUS
C721
1 2

.047U
5

D
43,44 1.8V_PWRGD 2 D
4
25,45,46 SUS_ON 1
U42
7SH08 QUANTA
SUSPWROK Circuit
R496 *0_NC Title
COMPUTER
2 1 SYSTEM RESET/POWER GOOD

Size Document Number R ev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 39 of 49


1 2 3 4 5 6 7 8
1 2 3 4 5

PD5
ES3DB

2 1

DC_IN+ discharge path PQ7


A FDS4435 A

8
7 1
SDC_IN+ 6 2
5 3

4
PR40 100K PR38 240K
AC_D1 1 2 AC_D2 1 2

3
25,41 ACAV_IN 2
PQ28A PQ9 PD20
FDS6975 PQ29B 2N7002 ES3DB

1
FDS6975 2 1

7 1 CHG_SBAT 3 5
V_CHG
8 6 PQ29A
FDS6975

4
7 1 PWR_SRC
PR45 10K PR46 100K 8
47 SBATT+
CHG_SBAT_N 1 2 1 2

2
3

PC44 .1U_50V 2
B 2 PQ11 2 1 B
26 CHG_SBATT
2N7002 3 SBAT_G
1
1

2
CHG_SBATT_N 1
R65
*100K_NC PR44
PD8 470K
RB715F
2

1
CHG_PBATT_N

PC46 .1U_50V
1

2 1
2 PQ13
26 CHG_PBATT
2N7002 PR51 10K PR50 100K
47 PBATT+
3
1

CHG_PBAT_N 1 2 1 2

4
R122 PQ15A
*100K_NC FDS6975
4

3 5 PD13
6 2 6 1 7 ES3DB
2

V_CHG CHG_PBAT PBAT_D


5 3 1 7 8 2 1
8 PQ15B
FDS6975

2
PQ28B PQ14 5 3

2
FDS6975 Si9435DY 1 2 PBA-DC1 6
C PR59 C

2
470K PR56

4
PR61 47K PR55 2
2 470K 10K

1
PBATT+ 3 PBAT_G

1
1

1
PQ18
To change swap battery's voltage from 9.6V to 7.5V PR58 47K 8 2N7002 PR109

3
1 2 3 PU5A PD25 470K
+ PB_DC RB715F
1 2
2

2
SBATT+ PR64 - LM393

1
2
CT_0315: Change PR64 from 1M to 1 2
4

147K/F, PR65 from 49.9K/F to PR57


24.9K/F, PR68 from 24.9K/F to 147K/F 470K
PBATT+
49.9K/F per Power.

1
2
1

PC69 1 2 +3VALW
1

*.1U_50V_NC PR65
24.9K/F PC66 PR60 100K
2

.1U_50V
1

PD14
8

PR63 10K/F 2
1 2 5 PU5B
+
7 3
+5VALW 1 2 6
D D
2

- LM393 PBA-DC
1
PR62
4

PQ20 PR68 100K


QUANTA
5

PU6 2N7002 49.9K/F RB715F


3

26 SBAT_LOW 2
1

26,47 SBAT_PRES# 1
4 2 +5VALW
Title
COMPUTER
1

BATTERY SELECTOR
7SH32
Size Document Number Rev
Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 40 of 49


1 2 3 4 5
1 2 3 4 5

SDC_IN+

PR36 .01
DC_IN+ 1 2
A A

4
+ PC31 CSSP1 CSSN1
4.7U_25V_0805

1
2

1
PR90 PR89
PR88 0 0
4.7/F_0603

2
CSSP CSSN

1
PC128 PC129

1
Reserved PC91 *.1U_50V_NC *.1U_50V_NC

2
1
for offset 1U_25V

2
PR37
365K

31

29

28
PU9 SDC_IN+

PDS

CSSP

CSSN
2
DCI N1 1 SDC_IN+
PR42 49.9K/F DCIN
INT 16
2 1 27 PC93 1U
SRC

1
PC90 2 LDO 2 1 PC37 PC34 PC33 PC32
LDO PQ10 2200P .1U_50V 10U_25V_1206 10U_25V_1206
1 2 25 DHIV

3
2
1
PC39 .01U .1U_50V AO4407

2
2 1 AC IN 3 PR91
ACIN 33/F 4
CCS 6 V_CHG
CCS PC92 .1U
B B

2
CCI 7 24 DLOCH 2 1 PL4 PR43

5
6
7
8
PR94 10K CCI DLOV 8.2uH-SIQH125 .01
CCV1 1 2 CCV 8 CHG_LX CHG_CS
2 1
CCV

1
26 DHI PC130
DHI

5
6
7
8
DAC 11

3
DAC *.1U_50V_NC

12

1
CHVREF 4 23 DLO 4 PQ52
REF DLO

1
Connect GND side of PC112 , PR146 PC43 + PC42 + PC101 + PC100
2

1
PC114 , PC116 , PC119 , to *0_0603_NC .1U_50V *10U_25V_NC
GND through 1 via. PC95 PC96 PC97 PC99 PC94 AO4704

1
2
3

2
CSIN1
CSIP1
.01U .01U .01U .1U_50V 1U_10V 17
1

2
I.C
PGND 22
V_CHG 19 BATT
Adress : 12H PR92 0
21 CSIP 1 2 10U_25V_1206 10U_25V_1206 Reserved for 4
CSIP PR93 0
+5VALW 12 VDD cell battery
20 CS IN 1 2 reduce ripple
CSIN
1

PC98 T87 PAD and noise


SCL 15 PBAT_SMBCLK 17,26,47
1U_10V
2

MAX1535B 14 T88 PAD


SDA

1
13 PBAT_SMBDAT 17,26,47 PC131 PC132
LDO THM
32 9 VMAX 1 2 CHVREF *.1U_50V_NC *.1U_50V_NC

2
ACOK VMAX
1

GND1

GND2

PR41 PR96

IMAX
PDL

1
10K 31.6K/F

C PR95 C
2

18

30

10
PR98 280K/F 182K/F
25,40 ACAV_IN
IMAX 1 2 CHVREF

2
1
1

PC138 PR39
1

*.1U_50V_NC 16.2K/F
PR97
2

75K/F
2

CT_0314: Reserved a PC138 0.1U Cap for RC delay.

D D

QUANTA
Title
COMPUTER
Battery Charger

Size Document Number Rev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 41 of 49


1 2 3 4 5
1 2 3 4 5

+5VRUN

2
PR1 PC4 PD2
10 1U_10V RB751V

VH_VCC
+3VRUN +3VRUN

1
A PWR_SRC A
PC5 BST1_VCORE
1U_10V

2
PR19 PR17 PR18

1
10K 2.21K/F 10K PWR_SRC PR4
PU2 1_0603 PC21 PC22 + PC23 + PC24 + PC25 + PC26
MAX1907 10U_25V_1206

10

30
1

1
PR20 0 2200P .1U_50V

2
36 34

VCC

VDD
39,44 VCCP_PWRGD SYSPOK V+ PC3
DELAY_IMVP_PWRGD 37 31 BST1 .1U_50V
6,11,39 IMVP_PWRGD IMVP_OK BST 10U_25V_1206 10U_25V_1206

5
6
7
8
9
CLK_EN# 38 10U_25V_1206
15,17 CLK_EN# CLK_EN
PQ2
33 DH_VCORE 4 TPCA8005-H
CPU_VID0 DH
4 CPU_VID0 26 D0
SOIC8-9P
IMVP_PWRGD CPU_VID1 25 VHCORE
4 CPU_VID1 D1
CPU_VID2 24 PL2
4 CPU_VID2

1
2
3
CPU_VID3 D2 0.6UH/30A PR3 1mR
4 CPU_VID3 23 D3
CPU_VID4 22 32 LX_VCORE LSense+1 2
4 CPU_VID4 D4 LX
CPU_VID5 21
4 CPU_VID5 D5
1

5
6
7
8
9

5
6
7
8
9
PC137

4
1
.1U_50V 1907_S0 4 S0

1
1907_S1 5 29 DL_VCORE 4 4
2

S1 DL

1
1907_S2 6 PC2 PC83 PC84 PC85 PC86 PC134 PC135 PC136
S2

1
PC1 PQ3 PQ4 PD3 + + + + *.1U_10V_NC

1 2
CT_0217: Add PBOOT_B0 1 PR16 *0_NC Si7336ADP Si7336ADP RB051L-40 *1000P_0805_NC *2200P_NC

1
2
3

1
2
3

2
PBOOT_B1 B0 VH_VCC *.01U_NC
2 40 SOIC8-9P SOIC8-9P

2
PC137 .1U_0603 PBOOT_B2 3
B1 TON PR2
B2 *.01U_NC *0_0805_NC
PR7 0
B RUNPWROK B
26,39 RUNPWROK 7 11

2
SHDN GND
STP_CPU# 20 28 470U_2V 470U_2V 470U_2V *470U_2V_NC
4,11,15 STP_CPU# DPSLP PGND
9mOhm 9mOhm 9mOhm 9mOhm
17 OA+ PR5 750/F OAP_FB 7343 7343 7343 7343
DPRSLPVR OA+
11 DPRSLPVR 35 SUS PC6
POSC POSC POSC POSC CH747RY8800
*470P_NC
VCORE_REF 8
PR9 301K/F REF
OA- 16 OA- PR6 1K/F OAN_FB Limited Current Point =28.5A
PC10 27
.22U_10V DD PC14 100P
1

PR13 49.9K/F
PR157 9 15 VH_FB
*0_NC ILIM FB PR15 1.5K/F
PC12 100P
18 CSP_FB PR8 200/F
2

CSP
+3VRUN PC7
39 1000P
TIME CSN_FB PR10 200/F
19
NEG
POS

PR155 *15K/F_NC CSN VH_VCC


CC

PU8A 2 1
*7WZ14_NC PR152 0
12

13

14
5

VH_FB VH_VCC 1907_S0


3

PQ23
1 6 2 *2N7002_NC PR12 1.24K/F
PC8 PR11 0
PR85 PR86 PR87 1907_S1
1

VH_VCC
1

PR158 270P 0 0 *0_NC


PR154 2 1 PR14
*0_NC 100K/F PR153 *0_NC
C PU8B *36.5K/F_NC PR81 *0_NC 1907_S2 C
*7WZ14_NC VCORE_REF PBOOT_B0 VH_VCC
PBOOT VOLTAGE
2

2
3

PQ24 PR156 PR150 *0_NC SETTING UP ON The C4 mode voltage is 0.748V


3 4 2 *2N7002_NC 30.1K/F PBOOT_B1
1.212V
PR151 0 C4(Deeper sleep)
1

PBOOT_B2 VHCORE Voltage 0.748V 0.716V


CLK_EN#
PR82 PR83 PR84 PR9 0 NC
D5 D4 D3 D2 D1 D0 Output D5 D4 D3 D2 D1 D0 Output *0_NC *0_NC *0_NC
1 0 0 0 0 0 1.196V 0 0 0 0 0 0 1.708V
1 0 0 0 0 1 1.180V 0 0 0 0 0 1 1.692V PR11 0 0
1 0 0 0 1 0 1.164V 0 0 0 0 1 0 1.676V
1 0 0 0 1 1 1.148V 0 0 0 0 1 1 1.660V
1 0 0 1 0 0 1.132V 0 0 0 1 0 0 1.644V PR13 NC NC
CT_0105: Change PU8 1 0 0 1 0 1 1.116V 0 0 0 1 0 1 1.628V
1 0 0 1 1 0 1.100V 0 0 0 1 1 0 1.612V
footprint from SC70-6 to 1 0 0 1 1 1 1.084V 0 0 0 1 1 1 1.596V
SC70-2_1-65-6P 1 0 1 0 0 0 1.068V 0 0 1 0 0 0 1.580V
1 0 1 0 0 1 1.052V 0 0 1 0 0 1 1.564V
1 0 1 0 1 0 1.036V 0 0 1 0 1 0 1.548V
1 0 1 0 1 1 1.020V 0 0 1 0 1 1 1.532V
1 0 1 1 0 0 1.004V 0 0 1 1 0 0 1.516V
1 0 1 1 0 1 0.988V 0 0 1 1 0 1 1.500V
1 0 1 1 1 0 0.972V 0 0 1 1 1 0 1.484V
1 0 1 1 1 1 0.956V 0 0 1 1 1 1 1.468V
1 1 0 0 0 0 0.940V 0 1 0 0 0 0 1.452V
1 1 0 0 0 1 0.924V 0 1 0 0 0 1 1.436V
1 1 0 0 1 0 0.908V 0 1 0 0 1 0 1.420V
1 1 0 0 1 1 0.892V 0 1 0 0 1 1 1.404V
D 1 1 0 1 0 0 0.876V 0 1 0 1 0 0 1.388V D
1 1 0 1 0 1 0.860V 0 1 0 1 0 1 1.372V
1 1 0 1 1 0 0.844V 0 1 0 1 1 0 1.356V
1 1 0 1 1 1 0.828V 0 1 0 1 1 1 1.340V
1 1 1 0 0 0 0.812V 0 1 1 0 0 0 1.324V
1
1
1
1
1
1
0
0
0
1
1
0
0.796V
0.780V
0
0
1
1
1
1
0
0
0
1
1
0
1.308V
1.292V
QUANTA
1
1
1
1
1
1
1
1
1
0
1
1
1
0
0
1
0
1
0.764V
0.748V
0.732V
0
0
0
1
1
1
1
1
1
0
1
1
1
0
0
1
0
1
1.276V
1.260V
1.244V Title
COMPUTER
1 1 1 1 1 0 0.716V 0 1 1 1 1 0 1.228V CPU POWER
1 1 1 1 1 1 0.700V 0 1 1 1 1 1 1.212V
Size Document Number Rev
DM3B 1A

Date: 星期二, 三月 29, 2005 Sheet 42 of 49


1 2 3 4 5
5 4 3 2 1

D D
+5VSUS

PWR_SRC

1
PR111
CT_1126: The current limit set up
3.3/F_0603 10uA X PR53 / PQ16 Rds ON(6mOhm) = Current limit

1
+ PC67 + PC65

2
VCC_2.5V
10U_25V_1206 10U_25V_1206
8.5A Current limit

1
PC59 PR53
4.7U_10V_0805 5.11K/F +3VSUS

2
PC58
1000P

2
1 2

1
PC63 PC62
PU4 PR110

14

15
+1_8VSUS .1U_50V 2200P TPS51116 100K

V5IN

CS
PC57 .1U_50V PR52 0
1 2 1.8BST 20 VBST

8
7
6
5
C CT_0217: Remove PGOOD 13 1.8V_PWRGD 39,44 C
PR115 0
JP6,JP7 short jumpers. 4 DH_1 2 1 1.8V_DH 19
DRVH
PL5 PQ17 12
S5 SUSPWROK_5V 44,45
1.5UH_SIL104R-1R5_10A/8.1 mohm IRF7413Z

3
2
1
1 2 1.8V_LX 18 11
LL S3 RUN_ON_D 25,44,46

8
7
6
5
VLDOIN 1 +1_5VRUN
1

PC56 PC48 PC52 PR54


150U/6.3V .1U 150U/6.3V 3.3/F_0603 4 1.8_DL 17 DRVL

1
PC55
2

SJ3 18mOhm 18mOhm PQ16 10U_4V

12
1

2 1 PC60 FDS6676S

3
2
1

2
2 1 PR106 1000P 16 PGND VTTGND 3
*2K/F_NC 2

2
Jump20X10 6 PC54 PC47 PC51 PC49
1.8V_OUT MODE .1U
9
2

PR108 0 VDDQSNS 10U_4V 10U_4V 10U_4V

1
1 2 1.8V_FB 10 2 0.9V
+5VSUS VDDQSET VTT SMDDR_VTERM
1

+5VSUS 4
VTTSNS

VTTREF
PR107 8
*10K/F_NC COMP

GND
CT_0217: Remove JP5 short jumper.
B B
2

5
SMDDR_VREF

1
PC53
0.033U

A A

QUANTA
Title
COMPUTER
1.8V,0.9V

Size Document Number R ev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 43 of 49


5 4 3 2 1
1 2 3 4 5

+5VSUS
PR122 20
1_5_VCC
PWR_SRC
PC112 PC113
2.2U_10V 2.2U_10V

2
PC114 + PC116 PC115
A A
10U_25V_1206 .1U_50V PD27 PW R_SRC
5.0A 2200P RB751V PU10

2
MAX1844EEP

16

13
Current

1.5-BST
1
PR123
Limit 14

VDD
V+
VCC

6
PQ41B 0 1.5V_BST_R 18 PR124 *0_NC +3VSUS
D1 D1 AO4824 BST 1_5_REF
UVP 9
4 1.5V_DH 20 DH PR121 *0_NC
CT_0217: Remove JP12 short jumper. 1G

1
+1_5VSUS S1 15 1_5_VCC
PL9 PC111 TON PR118

3
3.8UH_SIL104R-3R8_6A/13mohm .1U_50V PR116 0 100K

2
1.5V_LX 19 3
LX SHDN SUSPWROK_5V 43,45
PR147

8
PQ41A 1 *0_NC
CS 1.8V_PWRGD 39,43
1

D1 D1 AO4824 10 1.5V_PWRGD
PGOOD 1.5V_PWRGD 39
1

PC106 + PC109 + PC108 2 1.5V_DL 12


PD26 .1U *150U/2V_NC 220U/6.3V_ESR25 DL 1_5_REF
1G REF 8
RB551V-30 CC7343 CC7343 S1
2

18mOhm 25mOhm 11
2

1
GND

1
PR117 PR114
10K/F 100K/F PC107
1.5V_OUT 6 .22U_10V

2
OUT 1_5_LIM
7

LATCH
1.5V_FB ILIM
5

SKIP
OVP
FB
PR113
100K/F

17
PR112
B 20K/F B
PR119 *0_NC
1_5_VCC

PR120
0

PR31 +5VRUN
20
1_05_VCC
PWR_SRC
PC28 PC29
2.2U_10V 2.2U_10V

1
PC35 PC36 PC89 PC88

1
PD4 .1U_50V 2200P + 10U_25V_1206 + 10U_25V_1206
PWR_SRC RB751V
PU3

2
MAX1844EEP
13

16

8.6A Current Limit


1

14 PR27 0 VCCP-BST
VDD

V+

VCC

5
6
7
8
C C
+3VRUN PR34 *0_NC 18 VCCP-BST1
1_05_REF BST
9 UVP PQ6
20 1.05V_DH 4 IRF7413Z
PR35 *0_NC DH VCCP
1

1_05_VCC 15 PC27
PR33 TON .1U_50V PL3

1
2
3
100K PR26 0 1.5UH_SIL104R-1R5_10A/8.1 mohm
2

3 19 1.05V_LX 1 2
25,43,46 RUN_ON_D SHDN LX
5
6
7
CS 1 8

1
39,42 VCCP_PWRGD 10 PGOOD PQ8

1
12 1.05V_DL 4 FDS6676S + PD7
DL
1

1_05_REF 8 C722 PC38 PC41 + PC40 RB551V-30 CT_0217: Remove


1_05_REF REF *.047U_NC 150U/2V .1U 150U/2V
JP2,JP3 short jumpers.

2
1

2
11 CC7343 CC7343
2

1
2
3

2
PC30 PR32 GND PR29 18mOhm 18mOhm
.22U_10V 100K/F 1K/F
2

6 1.05V_OUT
1_05_LIM 7 OUT
LATCH

1
ILIM 1.05V_FB
5
SKIP

OVP

FB
1

PR30
17

34.8K/F PR28
20K/F
2

PR24 *0_NC
1_05_VCC

D D
PR25
0

QUANTA
Title
COMPUTER
1.5V,1.05V

Size Document Number R ev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 44 of 49


1 2 3 4 5
1 2 3 4 5

PWR_SRC
A A

1
PC119 PC123
+ 10U_25V_1206 + 10U_25V_1206 PR73 PR72
10_0805 10_0805

2
VCC +5VALW

PR76 47_0603

PC74 Place these CAPs

1
4.7U_10V_0805
close to FETs

2
PC72 PC71 + PC79
.1U_50V 1U_10V PD15 PD18

2
RB751V RB751V

1
+3VSUS PC110 PC125
Place these CAPs

1
4.7U_10V_0805 4.7U_25V_0805 PC124 2200P
close to FETs

1
PC117 .1U_50V

2
1 2 PC118 2200P BST_3 BST_5 CT_0217: Remove
.1U_50V
JP8,JP9 short jumpers

2
PQ40 PU7 MAX1999
4

AO6408 PQ21B

5
1999_V+ 20 18 PC78 AO4824
3VSUS_ON V+ LDO5 PR79 .1U_50V D1 D1
3 3VSUS_ON 46 PQ19B
AO4824 VCC 17 14 BST5 1 2 4 +5VSUS
VCC BST5

6
4.7/F G1
D1 D1 1 16 DH5 S1 PL6
6
5
2
1

PC68 .1U_50V PR67 4.7/F N.C. DH5 3.8UH_SIL104R-3R8_6A/13mohm


4

3
1G 1 2 BST3 28 15 LX5
BST3 LX5
B S1 B

7
+3V_SRC PL7 DH3 26 19 DL5

3
3.8UH_SIL104R-3R8_6A/13mohm DH3 DL5 D1 D1 PQ21A
LX3 27 21 5V_OUT 2 AO4824 PC61 + PC64
LX3 OUT5

1
G1 .1U 220U/6.3V_ESR25
1

DL3 24 9 FB5 S1 PR75 CC7343


DL3 FB5
7

8
PR148 10 PRO# *_NC

1
PC77 PC82 PR71 1.5R D1 D1 3V_OUT PRO
22 OUT3
+ .1U *_NC 2 11 ILIM5 REF

2
FB3 ILIM5 ILIM3
CT_0217: Remove 1G 7 5
2

1 2

PC133 FB3 ILIM3 REF


JP10,JP11 short jumpers S1 PQ19A REF 8
AO4824 1999_ON3 3 13 TON
1

ON3 TON
1

4700P ON5 4 23
ON5 GND

1
SHDN
220U/6.3V_ESR25 PR70 2

SKIP
2

PGOOD

1
CC7343 0 CT_1125: Add PR148, 25 PC73
LDO3 1U_10V +3V_SRC PR74
PC133 Per EMI

2
0
2

12

6
DL5

2
+RTC_PWR3_3V PR127
100K PC76 PC75
PC122 .1U .1U .1U
15V_C 15V_A

2
SUSPWROK_5V 43,44

3
PU11 PR69 2K/F
7SH32 1 2 PD17
25,39,46 SUS_ON
5

PD16 BAT54S
2

AUX_EN 2 BAT54S
25,36 AUX_EN
4 PR66
THERM_STP# 31
SUS_ON1 240K 15V 15V_B +5VSUS

1 2

1
C C

PR136 1K
1

2 1 PWR_SRC VCC PC80 PC81


ALWON 25
.1U_50V .1U

2
PR159 *0_0603_NC 1999SKIP
2 1

1
PR140
REF VCC 200K

1
+3VALW 3 1 MAX1999_LDO3

2
1
PC120 PRO#
1

PQ54 .1U_50V PR126


PR78
1

FDN304P PR160 200K

2
PC139 PC140 VCC 1 2 1999SKIP

2
1

3
PC70 1M .22U_10V 4.7U_10V_0805
2

PR137 PR135 PR139 *4.7U_10V_0805 PRO1 2 PQ43


2

63.4K/F 63.4K/F *0_NC 100K 2N7002

1
PQ53

1
1

1
ILIM5 PR125
2

PR161 2 100K
25,32 USB_EN#
ILIM3
51K PR77
1

2
TON 2N7002 *0_NC
2

2
1

PR138 PR130 PR141


D 49.9K/F 49.9K/F 0 D
CT_0314: Pop PR78 and PQ53. Leave PR77 N.C.
CT_0321: Add PC139, PC140, PR160, PR161, PQ54 for
2

soft start of +3VALW.


CT_0329: Depop PC70 4.7U. Change PC140 from .22U to 4.7U.
QUANTA
Title
COMPUTER
3VALW,5V,3V, power on

Size Document Number R ev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 45 of 49


1 2 3 4 5
1 2 3 4 5

+5VSUS PQ42
+5VALW 15V FDC653N +5VRUN

6
5 4 PWR_SRC +1_5VSUS +1_8VSUS

1
2
R387 R388 1

1
100K 100K C575
4.7U_10V_0805 PR131 PR128 PR129

3
A 100K 47_0805 47_0805 A

2
ON_RUN1

1
PQ36 C492 PQ47 ON_3VSUS
RUN_ON_5V# 2 2N7002 R389 DTC144EUA

3
.022U_0603 240K

2
1

3
25,39,45 SUS_ON 2

2
3
2 2
25,27,39 RUN_ON 2
PQ35 PQ45 PQ46

1
2N7002 2N7002 2N7002

1
+1_5VSUS PQ39
AO6408 +1_5VRUN

6
5 4
2 PWR_SRC

1
1 C514
4.7U_10V_0805

1
3

1
PR134
PR132 240K
200K

2
3VSUS_ON 45

1
B PQ12 2 B
+1_8VSUS PC121 PR133
FDC653N +1_8VRUN PQ44 .01U 470K

2
2N7002
6
5 4
2
1

1
C105
1U_10V
Turn On +3VSUS from +3VSRC

2
RUN POWER Controlled by RUN_ON
+3VRUN

+3V_SRC PQ48 15V


FDC653N +3VRUN
+5VALW 15V CT_0315: Change C493 U26B

1
2
5
6
from 470P to 4700 to fix 6 PR99 10K/F LM358
Soft start of +3VRUN. 5 4 1_05_REF 1 2 2.5V-REF1 5
1

2 7 2.5V-DRV 3 PQ27

1
R393 R391 1 2.5V-FB1 6 FDC653N

1
100K 100K PC102 PR100

1
C577 .01U 10K/F
3

4
4.7U_10V_0805
2

2
2

2
ON_RUN2 PC104
2 1
C
1 A (Max) C
3

PQ37
1

RUN_OND1 2 2N7002 C493 R392 47P


4700P *470K_NC 2 1 +2.5VRUN
1

1
PR102
2
3

PR101 15K/F

1
2 10K/F PC103 PC105
25,43,44 RUN_ON_D
PQ38 .1U 10U_6.3V
2N7002
1

2
RUN POWER Controlled by
RUN_ON_D (Delay from RUN_ON) +2.5VRUN

+5VRUN +3VRUN +2.5VRUN +1_5VRUN SMDDR_VTERM


1

1
R379 R380 R381 R382 R383
*1K_NC *47_NC *1K_NC *1K_NC *1K_NC
3 2

3 2

3 2

3 2

3 2

PQ30 PQ31 PQ32 PQ33 PQ34


D *2N7002_NC *2N7002_NC *2N7002_NC *2N7002_NC *2N7002_NC D
RUN_ON_5V# 2 2 2 2 2

QUANTA
1

Title
COMPUTER
RUN POWER SW

Size Document Number Rev


Reserve discharge path Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 46 of 49


1 2 3 4 5
1 2 3 4 5

+3VALW

PD12 PD11 PD10

2
DA204U DA204U DA204U +3VALW

A A
PC45 .1U_50V
1 2

1
3

3
PR48
JABT2 10K
SBATT+ 40
1 RP4
BATT1+ 4P2R-S-100
2
Adress : 16H

2
BATT2+
SMB_CLK 3 4 3 SBAT_SMBCLK 26
SMB_DAT 4 2 1 SBAT_SMBDAT 26
BATT_PRES# 5 1 2 SBAT_PRES# 26,40
6 PR49 100
SYSPRES#
BATT_VOLT 7 1 2
8 PR47 100 +3VALW
BATT1-
BATT2- 9

2
PD9
SUYIN-20175A-09G1 DA204U

3
SBAT_ALARM# 26

B B

+3VALW

+3VALW
1

2
PD24 PD23 PD22
DA204U DA204U DA204U
PC50 .1U_50V
1 2

1
3

3
PR104 +5VALW
JABT3 10K
PBATT+ 40
1 RP30
BATT1+ 4P2R-S-100 +3VALW
2
Adress : 16H

2
BATT2+

1
SMB_CLK 3 2 1 PBAT_SMBCLK 17,26,41
4 4 3 PD19
SMB_DAT PBAT_SMBDAT 17,26,41
BATT_PRES# 5 1 2 PBAT_PRES# 26 BAT54S

1
6 PR105 100
SYSPRES# PR80
BATT_VOLT 7 1 2 +3VALW
8 PR103 100 2.2K

3
BATT1-
BATT2- 9
1

PD21 PQ22

2
DA204U 2N7002
SUYIN-20175A-09G1 R499
DOCK_PSID 3 1 1 2
38 DOCK_PSID PS_ID 26
C C
100
3

1
+5VALW +5VALW

2
R164
PBAT_ALARM# 26
100K/F

2
PD28 R281

2
BAT54 10K

1
2 Q19

2
PL8
DOCK_PSID 3904
1 2 PS_ID_DISABLE# 26

1
1
BLM11B102S PQ5
FDS4435 R165
JDCIN2 +DC_IN DC_IN+
POWER_JACK 15K/F
8
1 7

2
1 FL2 2 6
3 5
2

2 D CIN+ 2 3
1

1 4 + PC17
3 PC18 PR21 PC20 PC19 4.7U_25V_0805
1

DCI N- .47U_0805 240K .01U_0603 PR22 .1U_50V


2

CM1922 <Limit VOL>


9
8
7
6
5
4

5.6K_0603
2
1

Q49_G

RV2 RV3 PR23


D VZ0603M260APT VZ0603M260APT 1 2 D
2

100K

QUANTA
Title
COMPUTER
DCIN,BATT CONNECTOR

Size Document Number Rev


Tahiti(DM3L) 1A

Date: 星期二, 三月 29, 2005 Sheet 47 of 49


1 2 3 4 5

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