5 4 3 2 1

D D

LKB-ADDs, Plus Schematic

REV : A02
C C

@ : Depop Component for All

1@ : Pop Component for Lindbergh Series
2@ : Pop Component for Kapalua series
3@ : Depop Component for Lindbergh Plus series
4@ : Pop Component for Lindbergh Plus series

B B

DDQ12/LA1901 Schematic with Capture CIS and Function field

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uFCPGA Banias
01-02-2004

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A A

REV: 3.0

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DELL CONFIDENTIAL/PROPRIETARY

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Compal Electronics, Inc.

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Title
Cover Sheet

in
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Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901

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Date: Wednesday, January 07, 2004 Sheet 1 of 59
5 4 3 2 1
 5 4 3 2 1

Compal confidential
Block Diagram
D
Banias D

ADM1032 Thermal sensor

page 13
uFCPGA CPU
page 7,8,9

Fan Control
page 13
HA#(3..31) HD#(0..63)
System Bus Memory
400MHz
CRT CONN.
BUS(DDR)
& TV-OUT 2.5V 100 / 133 / 166MHz
VGA page 17
ODEM-2 PC1600 / PC2100 / PC2700 SO-DIMM X2
BANK 0, 1, 2, 3 page 14,15
Board MCH-M
AGP4X(1.5V) Clock Generator
593 FC-BGA
AGP CONN. page CK408
10,11,12
C page 6 C

page 16

HUB Link
DOCKING MINI PCI 1.8V DC IN page
66MHz 42
DOCKING BUFFER 266MB/S
PORTPAGE 33 PAGE 32 page 31
BATT page
USB 3.3V 24.576MHz AC-LINK 43
PCI BUS IN
ICH4-M MDC
3.3V ATA100 page 26
421 BGA 1.2V/1.8V page
IDSEL:AD20 3.3V 33MHz ATA100 44
(PIRQA/B#,GNT#2,REQ#2) AC97
page Codec
LAN CardBus Controller 18,19,20,21 ATA100 1.5V/1.05V(+VCCP)
B STAC9750 B
page 23
BCM5705M PCI7510 / 4510 page 45

BCM4410page HDD
27 page 29

CDROM AMP& Phone 1.25V/2.5V page

page 19 46
Transformer Slot 0 LPC BUS USB Jack
1394, Smart 3.3V 33MHz
page 28 USB page 24
card page30 FDDpage 22 VCORE
page30
USBPORT 0 BACK page 47
RJ45 X BUS Macallen 48MHz / 480Mb
page 28 USBPORT 1
LPC to X-BUS BT 5V/3.3V
& Super I/O USB2.0 USBPORT 2
page BACK page 48

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USBPORT 3
SST39VF080 34,35
page 22 DOG

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page 25 USBPORT 4
CHARGER

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page 36 COM LPT page 26
MOD page

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A
USBPORT 5 49,50 A

page 33

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page 37 page 37 DOCK

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DELL CONFIDENTIAL/PROPRIETARY

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Touch Pad Int.KBD Compal Electronics, Inc.

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page 36 Title
page 36

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Block Diagram
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 2 of 59
5 4 3 2 1
 5 4 3 2 1

D D

PM TABLE USB TABLE

C
+5VRUN C

+3VRUN PCI TABLE

USB PORT# DESTINATION
power +3VALW +3VSUS +1.8VRUN
plane +5VALW +5VSUS +1.5VRUN
PCI DEVICE IDSEL REQ#/GNT# PIRQ
+2.5V_MEM +1.2VRUN
+1.5VSUS +VCC_CORE
0 BACK
State
+VCCP
CARD BUS AD17 1 D,C
+12V 1 BLUETOOTH
S0 ON ON ON
LAN AD16 4 C 2 BACK
S1 ON ON ON
DOCK AD24 0 B 3 DOG
S3 ON ON OFF

S5 S4/AC ON OFF OFF

MINI PCI AD19 3 D,B(NP) 4 MOD
B
S5 S4/AC don't exist OFF OFF OFF VGA A,B(NP) DOCK B
5

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A A

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DELL CONFIDENTIAL/PROPRIETARY

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Compal Electronics, Inc.

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Title

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Index and Config.
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 3 of 59
5 4 3 2 1
 5 4 3 2 1

RBAT

D D

ADAPTER +RTC_PWR +5VALW +5VSUS

+RTCSRC
PWR_SRC
+3.3VRTC +3VALW +3VSUS

BATTERY
DOCK _PWR_SRC

C C

SUSPWROK_5V

SUSPWROK_5V
SUS_ON

SUS_ON

RUNPWROK

RUNPWROK

EN_12V
+5VSUS +3VSRC +2.5VMEMP +VCCP +VCC_CORE +1.5VSUS +12V

PJP8,PJP10

ENAB_1.25V

RUN_ON
B B

RUN_ON RUN_ON
SUSPWROK_5V

+5VHDD +5VMOD +5VRUN VDDA +3VRUN V3P3LAN +3VSUS +2.5V_MEM V_1P25V_DDR_VTT +1.5VRUN
RUNPWROK

RUN_ON

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A A
+1.2VRUN +1.8VRUN

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DELL CONFIDENTIAL/PROPRIETARY

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Compal Electronics, Inc.

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Title

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Power Rail
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 4 of 59
5 4 3 2 1
 5 4 3 2 1

+3VRUN
ICH_SMBCLK CK_SCLK
7002
D
+3VSUS CLK GEN. D

ICH4 ICH_SMBDATA CK_SDATA

7002

DIMM0 DIMM1 LAN_SMBCLK

7002 7002
LOM
LAN_SMBDATA
7002 7002

CLK_SMB V_3P3_LAN
7002

DAT_SMB +3VALW MPCI

7002
C C

24C05 ADM1032 DH PORT

DOCK_SMB_CLK
SIO DOCK_SMB_DAT +5VALW DOCKING

Macallen
SBAT_SMBCLK
SBAT_SMBDAT +5VALW 2'nd
BATTERY
B B

VGA

PBAT_SMBCLK
1'nd
PBAT_SMBDAT +5VALW BATTERY

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A A

CHARGER

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DELL CONFIDENTIAL/PROPRIETARY

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Compal Electronics, Inc.

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Title

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SMBUS TOPOLOGY
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 5 of 59
5 4 3 2 1
 5 4 3 2 1

Place near each pin

+3VRUN CK_VDD_MAIN W>40 mil
+3VRUN CK_VDD_MAIN
1 2

100K_0402_5%~L

100K_0402_5%~L
2 1 1 1 1

1
L33 C89 C94 C91 C87 C85
BLM21PG600SN1D_0805~L

R57

R61
10U_1206_6.3V7K~L 0.1U_0402_10V6K~L 0.1U_0402_10V6K~L 0.1U_0402_10V6K~L 0.1U_0402_10V6K~L
1 2 2 2 2

2
ICH_SMBDATA 1 3 CK_SDATA

S
D <<14,15,19,31>> ICH_SMBDATA D
Q6
2N7002_SOT23~L
1 1 1 1

G
2
C88 C92 C83 C82
+3VRUN
0.1U_0402_10V6K~L 0.1U_0402_10V6K~L 0.1U_0402_10V6K~L 0.1U_0402_10V6K~L
2 2 2 2

2
Q8

G
2N7002_SOT23~L
ICH_SMBCLK 1 3 CK_SCLK
<<14,15,19,31>> ICH_SMBCLK

S
U8

D 1
VDD_REF PCICLK_F0
5
8
VDD_PCI
1 14
VDD_PCI PCICLK_F1
6
19
VDD_3V66 PCICLK_F2 R88 2 CK_33M_ICHPCI
G 2 3 S 32
VDD_3V66 PCICLK_F2
7 1
33_0402_5%~L
CK_33M_ICHPCI <<18>>
46
VDD_CPU
50
W=20 mils VDD_CPU
2N7002 37
VDD_48MHZ
L29 10
BLM11A601S_0603~L PCICLK0
1 2 CLK_VDD_CORE 26 11 PCICLK1 1 R83 2 CK_33M_SIOPCI
+3VRUN VDD_CORE PCICLK1 CK_33M_SIOPCI <<35>>
33_0402_5%~L
12 PCICLK2 1 R81 2 CK_33M_LANPCI
PCICLK2 CK_33M_LANPCI <<27>>
1 1 33_0402_5%~L
C81 C80 13 PCICLK3 1 R79 2 CK_33M_DOCKPCI
PCICLK3 CK_33M_DOCKPCI <<32>>
33_0402_5%~L
10U_1206_6.3V7K~L 0.1U_0402_16V4Z~L 16
C 2 2 PCICLK4 C
17 PCICLK5 1 R72 2 CK_33M_CBPCI
PCICLK5 CK_33M_CBPCI <<29>>
27 33_0402_5%~L
GND_CORE 18 PCICLK6 R68 2 CK_33M_MINIPCI
1
CK408 PCICLK6 33_0402_5%~L
CK_33M_MINIPCI <<31>>

Rev 1.1
H_STP_CPU# 53 52 CK_CPU0 1 R93 2 CK_BCLK
<<20,47>> H_STP_CPU# CPU_STOP# CPUCLKT0 CK_BCLK <<7>>
33_0402_5%~L
1 R92 2
H_STP_PCI# 34 49.9_0402_1%~L
<<20>> H_STP_PCI# PCI_STOP#
CK_VTT_PG# 28 51 CK_CPU0# 1 R87 2 CK_BCLK#
<<38>> CK_VTT_PG# VTT_PWRGD# CPUCLKC0 CK_BCLK# <<7>>
33_0402_5%~L
ICH_SLP_S1# 25 1 R86 2
<<20>> ICH_SLP_S1# PWR_DWN# 49.9_0402_1%~L

CK_VDD_MAIN CK_SCLK 30 49 CK_CPU1 1 R85 2 CK_ITP

SCLK CPUCLKT1 CK_ITP <<7>>
33_0402_5%~L
CK_SDATA 29 1 R84 2
SDATA 49.9_0402_1%~L
1

R76
48 CK_CPU1# 1 R82 2 CK_ITP#
CPUCLKC1 CK_ITP# <<7>>
10K_0402_5%~L 33_0402_5%~L
1 R80 2
+3VRUN +3VRUN +3VRUN 49.9_0402_1%~L
2

MULT0 43
MULT0 CK_CPU2 R78 2 CK_HCLK
45 1 CK_HCLK <<10>>
CPUCLKT2
2

Please closely pin42 33_0402_5%~L

2

R69 1 R77 2
R96 R95 R65 1K_0402_5%~L 49.9_0402_1%~L
B 1K_0402_5%~L 1K_0402_5%~L 1K_0402_5%~L @ 1 R67 2 CLKIREF 42 B
@ @ 475_0603_1%~L IREF CK_CPU2# R71 2 CK_HCLK#
44 1
1

CPUCLKC2 CK_HCLK# <<10>>

33_0402_5%~L
1

1 R70 2
CLKSEL0 54 49.9_0402_1%~L
SEL0 Place near CK408
CLKSEL1 55
SEL1 CLKREF R99 2 CK_14M_ICH
56 1 CK_14M_ICH <<19>>
C90 CLKSEL2 40 REF 33_0402_5%~L
@ 10P_0402_50V8J~L SEL2
2

2 1 CK_XTAL_OUT 3 33 1 R98 2 CK_14M_SIO

XTAL_OUT 3V66_0/DRCG CK_14M_SIO <<35>>
2M_0603_5%~L
R91 R90 R66 10_0402_5%~L
1

1K_0402_5%~L 1K_0402_5%~L 1K_0402_5%~L

1

@ 38 CLK48M_OUT1 1 R59 2 CK_48M_SCR

48MHZ_DOT CK_48M_SCR <<29>>
R89

X1 33_0402_5%~L
1

C93 14.31818MHz_20P_1BX14318CC1A~L 39 CLK48M_OUT0 1 R62 2 CK_48M_ICH

48MHZ_USB CK_48M_ICH <<19>>
@ 10P_0402_50V8J~L 33_0402_5%~L
2

2 1 CK_XTAL_IN 2
XTAL_IN R551 2 CK_14M_CODEC
35 1 CK_14M_CODEC <<23>>
3V66_1/VCH_CLK 10_0402_5%~L
S2 S1 S0 CPU 3V66[0..4] 3V66_5/66IN 4
GND_REF 66MHZ_IN/3V66_5
24 06/18/2003 Item 129
9
GND_PCI CLK66M_OUT0 R64 2 CK_66M_ICH
1 0 0 66 66IN 66 Input Place crystal within 15
GND_PCI 66MHZ_OUT0/3V66_2
21 1 CK_66M_ICH <<19>>
20 33_0402_5%~L
500 mils of CK408 GND_3V66
1 0 1 100 66IN 66 Input 31
GND_3V66 CLK66M_OUT2 R63 2 CK_66M_MCH
36 22 1 CK_66M_MCH <<10>>
GND_48MHZ 66MHZ_OUT1/3V66_3 33_0402_5%~L
1 1 0 200 66IN 66 Input 41
GND_IREF
47
GND_CPU CLK66M_OUT3 R60 2 CK_66M_AGP
1 1 1 133 66IN 66 Input 23 1 CK_66M_AGP <<16>>
66MHZ_OUT2/3V66_4 33_0402_5%~L
0 0 0 66 66 66 Input CY28346ZCT_TSSOP56~D
A A
0 0 1 100 66 66 Input
0 1 0 200 66 66 Input
0 1 1 133 66 66 Input
DELL CONFIDENTIAL/PROPRIETARY
Mid 0 0 Hi-z Hi-z Hi-z Compal Electronics, Inc.
Title
Mid 0 1 TCLK/2 TCLK/2 TCLK/2
Clock Generator
Mid 1 0 Reserve Reserve Reserve Size Document Number Rev
3.0
Mid 1 1 Reserve Reserve Reserve DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 6 of 59
5 4 3 2 1
 5 4 3 2 1

<<10>> H_A#[3..31] H_D#[0..63] <<10>> need double check this power plane
JCPUA

H_A#3 H_D#0 +VCCP

29
P4 A19
H_A#4 U4
A3#
A4#
Banias D0#
D1#
A25 H_D#1 JITP +3VSUS
H_A#5 V3 A22 H_D#2 R743

GND6
H_A#6 A5# D2# H_D#3 150_0603_1%~L
R3 B21 28
H_A#7 A6# D3# H_D#4 VTT1 ITP_DBRESET#
V2 A24 27 1 2
H_A#8 A7# D4# H_D#5 VTT0
W1 B26 26
H_A#9 A8# D5# H_D#6 ITP_DBRESET# VTAP
T4 A21 25
H_A#10 A9# D6# H_D#7 DBR# +VCCP
W2 B20 24
H_A#11 A10# D7# H_D#8 ITP_BPM#0 DBA# R622
Y4 C20 23
H_A#12 A11# D8# H_D#9 BPM0# 54.9_0603_1%~L
D Y1 B24 22 D
H_A#13 A12# D9# H_D#10 ITP_BPM#1 GND5 ITP_TDO
U1 D24 21 1 2
H_A#14 AA3 A13# D10# E24 H_D#11 20 BPM1# R623
H_A#15 A14# D11# H_D#12 ITP_BPM#2 GND4 54.9_0603_1%~L
Y3 C26 19
H_A#16 A15# D12# H_D#13 BPM2# H_RESET#
AA2 B23 18 1 2
H_A#17 AF4 A16# D13# E23 H_D#14 ITP_BPM#3 17 GND3
H_A#18 A17# D14# H_D#15 BPM3#
AC4 C25 16
H_A#19 A18# D15# H_D#16 ITP_BPM#4 GND2 +VCCP R618
AC7 H23 15
H_A#20 AC3 A19# D16# G25 H_D#17 R621 14 BPM4# 39.2_0603_1%~L
H_A#21 A20# D17# H_D#18 22.6_0603_1%~L ITP_BPM#5 GND1 ITP_TMS
AD3 L23 13 1 2
H_A#22 A21# D18# H_D#19 H_RESET# BPM5# R619
AE4 M26 1 2 12
H_A#23 A22# D19# H_D#20 ITP_TCK RESET# 150_0603_1%~L
AD2 H24 11
H_A#24 AB4 A23# D20# F25 H_D#21 10 FBO ITP_TDI
1 2
H_A#25 A24# D21# H_D#22 R620 CK_ITP_R GND0 This shall place near CPU
AC6
A25#
ADDR GROUP DATA GROUP D22#
G24 9
BCLKP
H_A#26 AD5 J23 H_D#23 22.6_0603_1%~L CK_ITP_R# 8 R615
H_A#27 AE2 A26# D23# M23 H_D#24 ITP_TDO 1 2 7 BCLKN 680_0603_5%~L
H_A#28 A27# D24# H_D#25 TDO ITP_TRST#
AD6 J25 6 1 2
H_A#29 AF3 A28# D25# L26 H_D#26 ITP_TCK 5 NC2 R617
H_A#30 A29# D26# H_D#27 TCK 27.4_0603_1%~L
AE1 N24 4
H_A#31 A30# D27# H_D#28 ITP_TRST# NC1 ITP_TCK
AF1 M25 3 1 2
<<10>> H_REQ#[0..4] A31# D28# H_D#29 ITP_TMS TRST#
H26 2
D29# TMS

GND7
H_REQ#0 R2 N25 H_D#30 ITP_TDI 1
H_REQ#1 REQ0# D30# H_D#31 TDI
P3 K25
H_REQ#2 REQ1# D31# H_D#32
T2 Y26
RN11 H_REQ#3 REQ2# D32# H_D#33 MOLEX_52435-2891_28P~L
P1 AA24

30
0_4P2R_0402_5%~L H_REQ#4 REQ3# D33# H_D#34
T1 T25 @
REQ4# D34# H_D#35
U23
CK_ITP_R# H_ADSTB#0 D35# H_D#36
4 1 <<10>> H_ADSTB#0 U3 V23
CK_ITP_R H_ADSTB#1 ADSTB0# D36# H_D#37 +VCCP
3 2 <<10>> H_ADSTB#1 AE5 R24
ADSTB1# D37# H_D#38
R26
D38# H_D#39
R23 1
RN10 1 4 CPU_CK_ITP A16 D39# AA23 H_D#40 C914
<<6>> CK_ITP 0_4P2R_0402_5%~L 2 3 CPU_CK_ITP# A15 ITP_CLK0 D40# H_D#41
U26
<<6>> CK_ITP# @ ITP_CLK1 D41# H_D#42 0.1U_0603_25V7M~L
V24
CK_BCLK D42# H_D#43 2
<<6>> CK_BCLK B15 U25
CK_BCLK# B14 BCLK0 D43# V26 H_D#44
<<6>> CK_BCLK# BCLK1 HOST CLK D44#
Y23 H_D#45
D45# H_D#46
AA26
C D46# Y25 H_D#47 C
H_ADS# D47# H_D#48
N2 AB25
<<10>> H_ADS# H_BNR# ADS# D48# H_D#49
<<10>> H_BNR# L1 AC23
H_BPRI# J3 BNR# D49# AB24 H_D#50
<<10>> H_BPRI# BPRI# D50#
H_BR0# N4 AC20 H_D#51
<<10>> H_BR0# BR0# D51#
H_DEFER# L4 AC22 H_D#52
<<10>> H_DEFER# H_DRDY# DEFER# D52# H_D#53
<<10>> H_DRDY# H2 AC25
R624 H_HIT# DRDY# D53# H_D#54
K3 AD23
<<10>> H_HIT# HIT# D54#
56_0603_5%~L H_HITM# K4 CONTROL GROUP AE22 H_D#55
<<10>> H_HITM# HITM# D55#
1 2 H_IERR# A4 AF23 H_D#56
+VCCP H_LOCK# IERR# D56# H_D#57
<<10>> H_LOCK# J2 AD24
H_RESET# B11 LOCK# D57# AF20 H_D#58
<<10>> H_RESET# RESET# D58#
AE21 H_D#59
D59# AD21 H_D#60
<<10>> H_RS#[0..2] H_RS#0 D60# H_D#61
H1 AF25
H_RS#1 RS0# D61# H_D#62
K1 AF22
H_RS#2 L2 RS1# D62# AF26 H_D#63
H_TRDY# RS2# D63#
M3
<<10>> H_TRDY# TRDY#
D25 H_DINV#0 <<10>>
DINV0#
J26 H_DINV#1 <<10>>
ITP_BPM#0 C8 DINV1# T24
BPM0# DINV2# H_DINV#2 <<10>>
ITP_BPM#1 B8 AD20
BPM1# DINV3# H_DINV#3 <<10>>
ITP_BPM#2 A9
ITP_BPM#3 BPM2#
C9
BPM3# H_DSTBN#[0..3] <<10>>
C23 H_DSTBN#0
ITP_DBRESET# A7 DSTBN0# K24 H_DSTBN#1
<<38>> ITP_DBRESET# H_DBSY# DBR# DSTBN1# H_DSTBN#2
M2 W25
<<10>> H_DBSY# DBSY# DSTBN2#
H_DPSLP# B7 AE24 H_DSTBN#3
<<11,18>> H_DPSLP# DPSLP# DSTBN3# H_DSTBP#[0..3] <<10>>
C19 C22 H_DSTBP#0
<<11>> H_DPWR# ITP_BPM#4 DPWR# DSTBP0# H_DSTBP#1
A10 L24
ITP_BPM#5 PRDY# DSTBP1# H_DSTBP#2
B10 MISC W24
PREQ# DSTBP2# H_DSTBP#3
B17 AE25
<<18>> H_PROCHOT# PROCHOT# DSTBP3#
E4
<<18>> H_PWRGOOD H_CPUSLP# PWRGOOD
<<18>> H_CPUSLP# A6
ITP_TCK SLP#
A13
R632 ITP_TDI C12 TCK
B TDI B
@ 1K_0603_5%~L ITP_TDO A12 C2 H_A20M#
TDO A20M# H_A20M# <<18>>
2 1 TEST1 C5 D3 H_FERR#
TEST1 FERR# H_FERR# <<18>>
Those two shall be 1 2 TEST2 F23 A3 H_IGNNE#
TEST2 IGNNE# H_IGNNE# <<18>>
pop per intel doc. R633 ITP_TMS C11 B5 H_INIT#
TMS INIT# H_INIT# <<18>>
@ 1K_0402_5%~D ITP_TRST# B13 D1 H_INTR
TRST# LINT0 H_INTR <<18>>
D4 H_NMI
LINT1 H_NMI <<18>>
LEGACY CPU
THERMAL C6 H_STPCLK#
STPCLK# H_STPCLK# <<18>>
H_THERMDA B18 B4 H_SMI#
<<13>> H_THERMDA H_THERMDC THERMDA DIODE SMI# H_SMI# <<18>>
A18
<<13>> H_THERMDC THERMDC
<<20,38>> H_THERMTRIP#
C17
THERMTRIP#

AMP_1473129-1~L

Placed near CPU

C450
@ 2.2P_0402_50V8C~L
CK_BCLK 2 1

C452
@ 2.2P_0402_50V8C~L
CK_BCLK# 2 1

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
Banias Processor in mFCPGA479
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION
Size OF Document
R&D Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
C 3.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 7 of 59
5 4 3 2 1
 5 4 3 2 1

+VCC_CORE
R634 JCPUB JCPUC
@ 54.9_0402_1%
1 2 VCCSENSE AE7 A2 F20 T26
+1.8VS_PROC VSSSENSE VCCSENSE VSS VCC VSS
1 2 AF6 A5 F22 U2
R635 VSSSENSE VSS VCC VSS
A8 G5 U6
PJP11 @ 54.9_0402_1% VSS VCC VSS
A11 G21 U22
+1.8VRUN
2 1 VSS VCC VSS
F26 A14 H6 U24
VCCA0 VSS VCC VSS
B1 A17 H22 V1
PAD-OPEN 2x2m VCCA1 VSS VCC VSS
N1 A20 J5 V4
VCCA2 VSS A23 VCC VSS
SHORT AC26 J21 V5
VCCA3 VSS A26 VCC VSS
K22 V21
VSS VCC VSS
D P23 B3 U5 V25 D
+VCCP VCCQ0 VSS B6 VCC VSS
W4 V6 W3
VCCQ1 VSS B9 V22 VCC VSS W6
VSS VCC VSS
B12 W5 W22
+1.5VRUN
PJP16 D10
VCCP
Banias VSS B16
VSS B19
W21
VCC
VCC
VSS
VSS
W23
2 1 D12 Y6 W26
D14
VCCP
VCCP
VSS
B22
VSS B25
Y22
VCC
VCC
Banias VSS
VSS
Y2
PAD-OPEN 2x2m D16 AA5 Y5
E11 VCCP VSS C1 AA7 VCC VSS Y21
OPEN VCCP VSS C4 VCC VSS
E13 AA9 Y24
VCCP VSS VCC VSS
E15 C7 AA11 AA1
VCCP VSS C10 VCC VSS
F10 AA13 AA4
F12 VCCP VSS C13 AA15 VCC VSS AA6
VCCP VSS VCC VSS
F14 C15 AA17 AA8
VCCP VSS C18 VCC VSS
F16 AA19 AA10
K6 VCCP VSS C21 AA21 VCC VSS AA12
VCCP POWER, GROUNG,
VSS RESERVED SIGNALS AND NC VCC VSS
L5 C24 AB6 AA14
L21 VCCP VSS D2 AB8 VCC VSS AA16
VCCP VSS D5 VCC VSS
M6 AB10 AA18
VCCP VSS D7 VCC VSS
M22 AB12 AA20
VCCP VSS VCC VSS
N5 D9 AB14 AA22
VCCP VSS D11 VCC VSS
N21 AB16 POWER, GROUND AA25
VCCP VSS D13 VCC VSS
P6 AB18 AB3
VCCP VSS VCC VSS
P22 D15 AB20 AB5
VCCP VSS D17 VCC VSS
R5 AB22 AB7
VCCP VSS D19 VCC VSS
R21 AC9 AB9
VCCP VSS VCC VSS
T6 D21 AC11 AB11
VCCP VSS D23 VCC VSS
T22 AC13 AB13
U21 VCCP VSS D26 AC15 VCC VSS AB15
VCCP VSS E3 VCC VSS
AC17 AB17
VSS VCC VSS
E6 AC19 AB19
D6 VSS E8 AD8 VCC VSS AB21
+VCC_CORE VCC VSS E10 VCC VSS
D8 AD10 AB23
VCC VSS VCC VSS
D18 E12 AD12 AB26
VCC VSS E14 VCC VSS
D20 AD14 AC2
D22 VCC VSS E16 AD16 VCC VSS AC5
VCC VSS VCC VSS
E5 E18 AD18 AC8
VCC VSS E20 VCC VSS
E7 AE9 AC10
C E9 VCC VSS E22 AE11 VCC VSS AC12 C
VCC VSS E25 VCC VSS
E17 AE13 AC14
VCC VSS VCC VSS
E19 F1 AE15 AC16
E21 VCC VSS F4 AE17 VCC VSS AC18
VCC VSS F5 VCC VSS
F6 AE19 AC21
+VCCP VCC VSS VCC VSS
F8 F7 AF8 AC24
VCC VSS F9 VCC VSS
F18 AF10 AD1
VCC VSS F11 VCC VSS
R_A AF12 AD4
VSS VCC VSS
1

F13 AF14 AD7

VSS F15 VCC VSS
not use in power side E1 AF16 AD9
R50 PSI# VSS F17 VCC VSS
AF18 AD11
V_CPU_GTLREF 1K_0603_1%~L H_VID0 E2 VSS F19 VCC VSS AD13
H_VID1 VID0 VSS VSS
F2 F21 AD15
2

H_VID2 F3 VID1 VSS F24 VSS AD17

H_VID3 VID2 VSS G2 VSS
G3 AD19
H_VID4 VID3 VSS VSS
R_B G4 G6 AD22
1

H_VID5 H4 VID4 VSS G22 M4 VSS AD25

VID5 VSS G23 VSS VSS
M5 AE3
R51 VSS VSS VSS
G26 M21 AE6
2K_0603_1%~L AD26 VSS H3 M24 VSS VSS AE8
V_CPU_GTLREF GTLREF0 VSS H5 VSS VSS
E26 N3 AE10
2

G1 GTLREF1 VSS H21 N6 VSS VSS AE12

GTLREF2 VSS VSS VSS
AC1 H25 N22 AE14
GTLREF3 VSS J1 N23 VSS VSS AE16
VSS J4 VSS VSS
N26 AE18
COMP0 VSS VSS VSS
P25 J6 P2 AE20
COMP1 P26 COMP0 VSS J22 P5 VSS VSS AE23
COMP2 COMP1 VSS J24 VSS VSS
AB2 P21 AE26
COMP3 COMP2 VSS VSS VSS
AB1 K2 P24 AF2
COMP3 VSS K5 VSS VSS
R1 AF5
VSS K21 VSS VSS
R4 AF9
R639 @ 1K_0402 VSS K23 VSS VSS
B2 R6 AF11
R640 @ 1K_0402 RSVD VSS VSS VSS
AF7 K26 R22 AF13
R641 @ 1K_0402 C14 RSVD VSS L3 R25 VSS VSS AF15
RSVD VSS L6 VSS VSS
27.4_0603_1%~L

54.9_0603_1%~L

27.4_0603_1%~L

54.9_0603_1%~L

R642 @ 1K_0402 C3 T3 AF17

RSVD VSS VSS VSS
L22 T5 AF19
R643 @ 1K_0402 VSS L25 VSS VSS
C16 T21 AF21
1

TEST3 VSS M1 T23 VSS VSS AF24

B VSS VSS VSS B
R644

R645

R646

R647

AMP_1473129-1~L AMP_1473129-1~L
2

Resistor placed within +3VSUS

0.5" of CPU pin.Trace
should be at least 25
@ 10K_8P4R_1206_5%~L

miles away from any

other toggling signal. For test only ,Cmos output
5
6
7
8

@ 10K_0402_5%
1

@ 10K_0402_5%
1
CPU Voltage ID
R333

R746
RN9

4
3
2
1

2
H_VID0 2 1 VID0
VID0 <<47>>
R341 0_0402_5%~L
H_VID1 2 1 VID1
VID1 <<47>>
R337 0_0402_5%~L
H_VID2 2 1 VID2
VID2 <<47>>
R338 0_0402_5%~L
H_VID3 2 1 VID3
VID3 <<47>>
R339 0_0402_5%~L
H_VID4 2 1 VID4
VID4 <<47>>
R340 0_0402_5%~L
H_VID5 2 1 VID5
VID5 <<47>>
R747 0_0402_5%~L

A B_VID6 B_VID4 B_VID3 B_VID2 B_VID1 B_VID5 A

OPEN OPEN OPEN OPEN OPEN OPEN
2

2
2

DELL CONFIDENTIAL/PROPRIETARY
1

Compal Electronics, Inc.

1

OPEN OPEN OPEN OPEN OPEN OPEN Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Banias
R&D Processor in mFCPGA479
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Size Document Number Rev
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C 3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 8 of 59
5 4 3 2 1
 5 4 3 2 1

+VCC_CORE +VCC_CORE

1 1 1 1 1 1 1 1 1 1
C415 C386 C412 C406 C395 C925 C926 C927 C928 C929
10U_1206_6.3V7K~L 10U_1206_6.3V7K~L 10U_1206_6.3V7K~L 10U_1206_6.3V7K~L 10U_1206_6.3V7K~L 10U_1206_6.3V7K~L 10U_1206_6.3V7K~L 10U_1206_6.3V7K~L 10U_1206_6.3V7K~L 10U_1206_6.3V7K~L
2 2 2 2 2 2 2 2 2 2

D +VCC_CORE +VCC_CORE D

1 1 1 1 1 1 1 1 1 1
C403 C418 C413 C378 C405 C427 C379 C373 C438 C377
10U_1206_6.3V7K~L 10U_1206_6.3V7K~L 10U_1206_6.3V7K~L 10U_1206_6.3V7K~L 10U_1206_6.3V7K~L 10U_1206_6.3V7K~L 10U_1206_6.3V7K~L 10U_1206_6.3V7K~L 10U_1206_6.3V7K~L 10U_1206_6.3V7K~L
2 2 2 2 2 2 2 2 2 2

+VCC_CORE +VCC_CORE

1 1 1 1 1 1 1 1 1 1
C404 C440 C396 C387 C439 C441 C394 C372 C374 C426
10U_1206_6.3V7K~L 10U_1206_6.3V7K~L 10U_1206_6.3V7K~L 10U_1206_6.3V7K~L 10U_1206_6.3V7K~L 10U_1206_6.3V7K~L 10U_1206_6.3V7K~L 10U_1206_6.3V7K~L 10U_1206_6.3V7K~L 10U_1206_6.3V7K~L
2 2 2 2 2 2 2 2 2 2

+VCC_CORE

X7R
1 1 1 1 1
10uF 1206 X5R -> 85 High Frequence Decoupling
C376 C414 C445 C398 C444
10U_1206_6.3V7K~L 10U_1206_6.3V7K~L 10U_1206_6.3V7K~L 10U_1206_6.3V7K~L 10U_1206_6.3V7K~L degree
2 2 2 2 2

C C

+VCC_CORE

1 1 1 1 1 1
C50 C49 C57 C56 C61 C60
0.22U_0603_10V7M~L 0.22U_0603_10V7M~L 0.22U_0603_10V7M~L 0.22U_0603_10V7M~L 0.22U_0603_10V7M~L 0.22U_0603_10V7M~L
2 @ 2 @ 2 @ 2 @ 2 @ 2 @
+VCC_CORE

B B
220U_D2_2VM~D

220U_D2_2VM~D

220U_D2_2VM~D

220U_D2_2VM~D
1 1 1 1
C941

C942

C943

C944
+ + + +

+VCC_CORE
2 2 2 2

1 1 1 1 1 1
+ C671 + C672 + C673 + C674 + C675 + C678
220U_D2_2VM~D 220U_D2_2VM~D 220U_D2_2VM~D 220U_D2_2VM~D 220U_D2_2VM~D 220U_D2_2VM~D 9mOhm 9mOhm 9mOhm 9mOhm
@ @ @ @ @ @ 7343 7343 7343 7343
2 2 2 2 2 2
PS CAP PS CAP PS CAP PS CAP

+1.8VS_PROC

1 1 1 1 1 1 1 1
C723 C724 C725 C726 C727 C728 C729 C730
0.1U_0402_16V4Z~L 0.1U_0402_16V4Z~L 0.1U_0402_16V4Z~L 0.1U_0402_16V4Z~L 10U_1206_10V4Z~L 10U_1206_10V4Z~L 10U_1206_10V4Z~L 10U_1206_10V4Z~L
2 2 2 2 2 2 2 2

A A
+VCCP

1 1
1 1 1 1 1 1 1 1 1 1
+ +
C731 C910 C732 C733 C734 C735 C736 C737 C738 C739 C740 C741
150U_D2_4VK~D 150U_D_6.3VM_R55~D 0.1U_0402_16V4Z~L 0.1U_0402_16V4Z~L 0.1U_0402_16V4Z~L 0.1U_0402_16V4Z~L 0.1U_0402_16V4Z~L 0.1U_0402_16V4Z~L 0.1U_0402_16V4Z~L 0.1U_0402_16V4Z~L 0.1U_0402_16V4Z~L 0.1U_0402_16V4Z~L
2 2 @ 2 2 2 2 2 2 2 2 2 2 DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
CPU Bypass

Size Document Number Rev

C DDQ12/11/01 with LA-1901 3.0

Date: Wednesday, January 07, 2004 Sheet 9 of 59

5 4 3 2 1
 5 4 3 2 1

U68B

U68A <<16>> G_AD[0..31]

G_AD0 R27
GAD0
Odem HI_0
P25 HUB_HL0
HUB_HL[0..10] <<18>>

G_AD1 R28 P24 HUB_HL1

<<7>> H_A#[3..31]
H_A#3 U6
HA#3
Odem HD#0
AA2 H_D#0
H_D#[0..63] <<7>>
G_AD2
G_AD3
T25
R25
GAD1
GAD2
GAD3
HI_1
HI_2
HI_3
N27
P23
HUB_HL2
HUB_HL3
H_A#4 T5 AB5 H_D#1 G_AD4 T26 M26 HUB_HL4
H_A#5 HA#4 HD#1 H_D#2 G_AD5 GAD4 HI_4 HUB_HL5
D R2 AA5 T27 M25 D
H_A#6 HA#5 HD#2 H_D#3 G_AD6 GAD5 HI_5 HUB_HL6
U3 AB3 U27 L28
H_A#7 R3 HA#6 HD#3 AB4 H_D#4 G_AD7 U28 GAD6 HI_6 L27 HUB_HL7
H_A#8 HA#7 HD#4 H_D#5 G_AD8 GAD7 HI_7 HUB_HL8
P7 AC5 V26 M27
H_A#9 T3
HA#8
HA#9
HD#5
HD#6
AA3 H_D#6 G_AD9 V27
GAD8
GAD9
HUB HI_8
HI_9
N28 HUB_HL9
H_A#10 P4 AA6 H_D#7 G_AD10 T23 M24 HUB_HL10
H_A#11 HA#10 HD#7 H_D#8 G_AD11 GAD10 HI_10
P3 AE3 U23
H_A#12 HA#11 HD#8 H_D#9 G_AD12 GAD11 HUB_HLSTRB
P5 AB7 T24 N25 HUB_HLSTRB <<18>>
H_A#13 R6 HA#12 HD#9 AE5 H_D#10 G_AD13 U24 GAD12 HI_STB N24 HUB_HLSTRB#
HA#13 HD#10 GAD13 HI_STB# HUB_HLSTRB# <<18>>
H_A#14 N2 AF3 H_D#11 G_AD14 U25
H_A#15 HA#14 HD#11 H_D#12 G_AD15 GAD14 HUB_RCOMP
N5 AC6 V24 P27 1 2 +1.8VRUN
H_A#16 HA#15 HD#12 H_D#13 G_AD16 GAD15 HLRCOMP R648
N3 AC3 Y27
H_A#17 J3 HA#16 HD#13 AF4 H_D#14 G_AD17 Y26 GAD16 P26 HL_REF 36.5_0603_1%~L
H_A#18 HA#17 HD#14 H_D#15 G_AD18 GAD17 HI_REF
M3 AE2 AA28
HA#18 HD#15 GAD18

0.01U_0402_16V7K~D
H_A#19 M4 AG4 H_D#16 G_AD19 AB25 1
H_A#20 M5 HA#19 HD#16 AG2 H_D#17 G_AD20 AB27 GAD19
HA#20 HD#17 GAD20

C742
H_A#21 L5 AE7 H_D#18 G_AD21 AA27
H_A#22 K3 HA#21 HD#18 AE8 H_D#19 G_AD22 AB26 GAD21 AB9
H_A#23 HA#22 HD#19 H_D#20 G_AD23 GAD22 VSS91 2
J2 AH2 Y23 AD10
H_A#24 HA#23 HD#20 H_D#21 G_AD24 GAD23 VSS92
N6 AC7 AB23 AF9
H_A#25 HA#24 HD#21 H_D#22 G_AD25 GAD24 VSS93
L6 AG3 AA24 AJ9
H_A#26 HA#25 HD#22 H_D#23 G_AD26 GAD25 VSS94
L2 AD7 AA25 A7
H_A#27 HA#26 HD#23 H_D#24 G_AD27 GAD26 VSS95 +1.8VRUN
K5 AH7 AB24 F8
H_A#28 HA#27 HD#24 H_D#25 G_AD28 GAD27 VSS96
L3 AE6 AC25 J7
H_A#29 HA#28 HD#25 H_D#26 +VCCP G_AD29 GAD28 VSS97
L7 AC8 AC24 L8
H_A#30 HA#29 HD#26 H_D#27 G_AD30 GAD29 VSS98
K4 AG8 AC22 N8
H_A#31 HA#30 HD#27 H_D#28 G_AD31 GAD30 VSS99
J5 AG7 AD24 R8
HOST 2

1
HA#31 HD#28 H_D#29 GAD31 VSS100
AH3 1 <<16>> G_C/BE#[0..3] U8
HD#29 AF8 H_D#30 R649 VSS101 W8 C468
HD#30 H_D#31 C743 301_0402_1%~D G_C/BE#0 VSS102 @470P_0402_50V7K~L
AH5 V25 AA8
<<7>> H_REQ#[0..4] H_REQ#0 HD#31 H_D#32 0.01U_0402_16V7K~D G_C/BE#1 GCBE#0 VSS103 1
U2 AC11 V23 AD8

HLREF_TERMH
H_REQ#1 T7 HREQ#0 HD#32 AC12 H_D#33 H_SWNG1 2 G_C/BE#2 Y25 GCBE#1 VSS104 AF7

2
1
H_REQ#2 HREQ#1 HD#33 H_D#34 G_C/BE#3 GCBE#2 VSS105
R7 AE9 AA23 AJ7
H_REQ#3 HREQ#2 HD#34 H_D#35 R650 GCBE#3 VSS106
U5 AC10 D5

1
H_REQ#4 HREQ#3 HD#35 H_D#36 150_0402_1%~D VSS107
T4 AE10 F6
HREQ#4 HD#36
HD#37
AD9 H_D#37
<<16>> G_FRAME#
G_FRAME# Y24
GFRAME#
AGP VSS108
VSS109
H6 R412
AG9 H_D#38 G_DEVSEL# W28 K6

2
HD#38 <<16>> G_DEVSEL# GDEVSEL# VSS110
H_ADSTB#0 R5 AC9 H_D#39 G_IRDY# W27 M6 150_0402_1%~D
<<7>> H_ADSTB#0 <<16>> G_IRDY#

2
C H_ADSTB#1 N7 HADSTB#0 HD#39 AE12 H_D#40 G_TRDY# W24 GIRDY# VSS111 P6 C
<<7>> H_ADSTB#1 <<16>> G_TRDY#

2
HADSTB#1 HD#40 H_D#41 +VCCP G_STOP# GTRDY# VSS112 R413
AF10 W23 T6 R_C
HD#41 <<16>> G_STOP# GSTOP# VSS113
AG11 H_D#42 G_PAR W25 V6 @ 56.2_0402_1%
HD#42 <<16>> G_PAR GPAR VSS114
K8 AG10 H_D#43 G_REQ# AG24 Y6
<<16>> G_REQ#

1
<<6>> CK_HCLK# BCLK# HD#43 H_D#44 G_GNT# GREQ# VSS115
J8 AH11 AH25 AB6
1
GND

1
<<6>> CK_HCLK BCLK HD#44 H_D#45 R652 <<16>> G_GNT# GGNT# VSS116 HL_REF
AG12 AD6
HD#45 H_D#46 C744 301_0402_1%~D VSS117
AE13 AF5
H_ADS# HD#46 H_D#47 0.01U_0402_16V7K~D VSS118
U7 AF12 AJ5
<<7>> H_ADS# ADS# HD#47 VSS119

2
H_TRDY# V4 AG13 H_D#48 H_SWNG0 2 G_AD_STB0 R24 A3

12
<<7>> H_TRDY# HTRDY# HD#48 <<16>> G_AD_STB0 AD_STB0 VSS120
H_DRDY# W2 AH13 H_D#49 G_AD_STB0# R23 J4 R415
<<7>> H_DRDY# DRDY# HD#49 <<16>> G_AD_STB0# AD_STB#0 VSS121
H_DEFER# Y4 AC14 H_D#50 R653 G_AD_STB1 AC27 L4
<<7>> H_DEFER# <<16>> G_AD_STB1

1
H_HITM# Y3 DEFER# HD#50 AF14 H_D#51 150_0402_1%~D G_AD_STB1# AC28 AD_STB1 VSS122 N4 0_0402_5%~L
<<7>> H_HITM# HITM# HD#51 <<16>> G_AD_STB1# AD_STB#1 VSS123
H_HIT# Y5 AG14 H_D#52 R4 R414

HLREF_TERML 1
<<7>> H_HIT# HIT# HD#52 <<16>> G_SBA[0..7] VSS124
H_LOCK# W3 AE14 H_D#53 U4
<<7>> H_LOCK#

2
H_BR0# HLOCK# HD#53 H_D#54 G_SBA0 VSS125 150_0402_1%~D
V7 AG15 AH28 W4
<<7>> H_BR0# BR0# HD#54 SBA0 VSS126
H_BNR# V3 AG16 H_D#55 G_SBA1 AH27 AA4

2
<<7>> H_BNR# BNR# HD#55 SBA1 VSS127
H_BPRI# Y7 AG17 H_D#56 G_SBA2 AG28 AC4
<<7>> H_BPRI# BPRI# HD#56 SBA2 VSS128
H_DBSY# V5 AH15 H_D#57 G_SBA3 AG27 AE4 R_D
<<7>> H_DBSY# DBSY# HD#57 SBA3 VSS129
H_RS#0 W7 AC17 H_D#58 G_SBA4 AE28 AJ3
H_RS#1 W5 RS#0 HD#58 AF16 H_D#59 +VCCP G_SBA5 AE27 SBA4 VSS130 E1
RS#1 HD#59 SBA5 VSS131 1
H_RS#2 W6 AE15 H_D#60 G_SBA6 AE24 J1
RS#2 HD#60 AH17 H_D#61 G_SBA7 AE25 SBA6 VSS132 L1 C470
HD#61 SBA7 VSS133
1
<<7>> H_RS#[0..2] H_D#62 0.01U_0402_25V7K~L
AD17 N1
HD#62 AE16 H_D#63 R656 VSS134 R1 2
HD#63 49.9_0603_1%~L G_SB_STB VSS135
AF27 U1
<<16>> G_SB_STB SB_STB VSS136
H_RESET# AE17 G_SB_STB# AF26 W1
<<7>> H_RESET# CPURST# <<16>> G_SB_STB# SB_STB# VSS137
M7 MCH_GTLREF AA1
2
1

HVREF0 G_RBF# VSS138

P8 1 1 1 AE22 AC1
<<7>> H_DSTBN#[0..3] HVREF1 <<16>> G_RBF# RBF# VSS139
AA9 R657 G_WBF# AE23 AE1
HVREF2 <<16>> G_WBF# WBF# VSS140
H_DSTBN#0 AD4 AB12 C745 C747 100_0603_1%~L G_PIPE# AF22 AG1
HDSTBN#0 HVREF3 <<16>> G_PIPE# PIPE# VSS141
H_DSTBN#1 AF6 AB16 220P_0603_50V8J~L 1U_0603_6.3V6M~D
H_DSTBN#2 HDSTBN#1 HVREF4 2 2 2
AD11
2

H_DSTBN#3 HDSTBN#2 G_ST0 R658

<<7>> H_DSTBP#[0..3] AC15 AG25
H_DSTBP#0 AD3 HDSTBN#3 C746 <<16>> G_ST0 G_ST1 AF24 ST0 36.5_0603_1%~L
H_DSTBP#1 HDSTBP#0 220P_0603_50V8J~L <<16>> G_ST1 G_ST2 ST1 AGP_RCOMP
AG6 AG26 AD25 1 2
H_DSTBP#2 HDSTBP#1 <<16>> G_ST2 ST2 GRCOMP
AE11 AD13 H_SWNG1 AA21 VREFGC <<16>>
H_DSTBP#3 HDSTBP#2 HSWNG1 AGPREF
AC16 AA7 H_SWNG0 <<6>> CK_66M_MCH
CK_66M_MCH P22
AD5 HDSTBP#3 HSWNG0 66IN
B <<7>> H_DINV#0 DBI#0 1 B
AG5 AC13 H_RCOMP1
<<7>> H_DINV#1 DBI#1 HRCOMP1
AH9 AC2 H_RCOMP0 C748
<<7>> H_DINV#2
2

DBI#2 HRCOMP0 CK_66M_MCH 0.1U_0603_16V7K~L

<<7>> H_DINV#3 AD15
DBI#3 R660 R661 2

1
27.4_0603_1%~L 27.4_0603_1%~L RG8294300M_FCBGA593
R662
RG8294300M_FCBGA593 @ 22_0402_5%~L
1

2
1
+1.5VRUN C749
@10P_0402_50V8J~L
2
1

R418

1K_0603_1%
Placed near MCH
2

C380 R_M
@ 2.2P_0402_50V8C~L
CK_HCLK 2 1

C381
@ 2.2P_0402_50V8C~L
VREFCG <<16>>
CK_HCLK# 2 1
0_0402_5%~L
1
R416
2

R417
@
VREFGC <<16>>
1K_0603_1%
1

A A
R_N

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc. Compal Electronics, Inc.
Title
Odem(1 of 3)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C 3.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS DDQ12/11/01 with LA-1901
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, January 07, 2004 Sheet 10 of 59
5 4 3 2 1
 5 4 3 2 1

D U68C D

<<14,15>> DDR_MA[0..12]
DDR_MA0 E12
SMA0
Odem SDQ0
G28 DDR_D45
DDR_D[0..63] <<14>>
All of thsoe schematic shall be changed to DDR_MA1 F17 F27 DDR_D46
un-pop DDR_MA2 SMA1 SDQ1 DDR_D44
E16 C28
DDR_MA3 G17 SMA2 SDQ2 E28 DDR_D41
DDR_MA4 SMA3 SDQ3 DDR_D47
G18 H25
DDR_MA5 SMA4 SDQ4 DDR_D42
E18 G27
NEED CHECK THIS POWER DDR_MA6 SMA5 SDQ5 DDR_D43
F19 F25
PLANE DDR_MA7 G20 SMA6 SDQ6 B28 DDR_D40
DDR_MA8 SMA7 SDQ7 DDR_D39
G19 E27
+2.5V_MEM DDR_MA9 SMA8 SDQ8 DDR_D37
F21 C27
T281 DDR_MA10 F13 SMA9 SDQ9 B25 DDR_D36
PAD DDR_MA11 SMA10 SDQ10 DDR_D33
E20 C25

1
NEED CHECK THIS POWER +12V DDR_MA12 G21 SMA11 SDQ11 B27 DDR_D32
R664 SMA12 SDQ12 DDR_D38
PLANE G22 D27
@ 10K_0603_1%~L RSVD2 SDQ13 DDR_D34
D26
<<14>> DDR_DS[0..8] SDQ14
8
U69A E25 DDR_D35
@ LM358M_SO8~L DDR_DS5 SDQ15 DDR_D49
F26 D24
P MEMORY

2
DDR_DS4 SDQS0 SDQ16 DDR_D53
3 C26 E23
DDR_VREF_MCH IN+ DDR_DS6 SDQS1 SDQ17 DDR_D51
1 1 C23 C22

1
OUT DDR_DS7 SDQS2 SDQ18 DDR_D55
1 2 B19 E21
IN- R666 C750 DDR_DS3 SDQS3 SDQ19 DDR_D50
D12 C24
SDQS4 SDQ20
G

C751 @ 10K_0603_1%~L @ 0.1U_0603_16V7K~L DDR_DS2 C8 B23 DDR_D48

@ 10U_1206_10V4Z 2 DDR_DS1 SDQS5 SDQ21 DDR_D54
C5 D22
4

2 DDR_DS0 E3 SDQS6 SDQ22 B21 DDR_D52

2
DDR_DS8 SDQS7 SDQ23 DDR_D56
E15 C21
SDQS8 SDQ24 DDR_D60
D20
SDQ25 C19 DDR_D58
DDR_WE# SDQ26 DDR_D63
G11 D18
<<14,15>> DDR_WE# SWE# SDQ27
DDR_RAS# F11 C20 DDR_D57
<<14,15>> DDR_RAS# SRAS# SDQ28
DDR_CAS# G8 E19 DDR_D61
<<14,15>> DDR_CAS# SCAS# SDQ29
R760 C18 DDR_D62
@ 0_0402_5%~D SDQ30 DDR_D59
E17
CK_DDR_CK0 SDQ31 DDR_D27
1 2 <<14>> CK_DDR_CK0 J25 E13
C CK_DDR_CK0# K25 SCK0 SDQ32 C12 DDR_D30 C
<<14>> CK_DDR_CK0# SCK#0 SDQ33
CK_DDR_CK1 G5 B11 DDR_D29
<<14>> CK_DDR_CK1 SCK1 SDQ34
CK_DDR_CK1# F5 C10 DDR_D24
<<14>> CK_DDR_CK1# SCK#1 SDQ35
CK_DDR_CK2 G24 B13 DDR_D31
<<14>> CK_DDR_CK2 SCK2 SDQ36
CK_DDR_CK2# E24 C13 DDR_D26
<<14>> CK_DDR_CK2# SCK#2 SDQ37
CK_DDR_CK3 G25 C11 DDR_D25
<<15>> CK_DDR_CK3 SCK3 SDQ38
CK_DDR_CK3# J24 D10 DDR_D28
<<15>> CK_DDR_CK3# SCK#3 SDQ39
CK_DDR_CK4 G6 E10 DDR_D22
<<15>> CK_DDR_CK4 SCK4 SDQ40
CK_DDR_CK4# G7 C9 DDR_D18
<<15>> CK_DDR_CK4# SCK#4 SDQ41
CK_DDR_CK5 K23 D8 DDR_D17
<<15>> CK_DDR_CK5 SCK5 SDQ42
CK_DDR_CK5# J23 E8 DDR_D21
<<15>> CK_DDR_CK5# SCK#5 SDQ43 E11 DDR_D23
SDQ44 DDR_D19
B9
DDR_CKE0_DIMM0 G23 SDQ45 B7 DDR_D20
<<14>> DDR_CKE0_DIMM0 SCKE0 SDQ46
DDR_CKE1_DIMM0 E22 C7 DDR_D16
<<14>> DDR_CKE1_DIMM0 SCKE1 SDQ47
DDR_CKE2_DIMM1 H23 C6 DDR_D11
<<15>> DDR_CKE2_DIMM1 SCKE2 SDQ48
DDR_CKE3_DIMM1 F23 D6 DDR_D15
<<15>> DDR_CKE3_DIMM1 SCKE3 SDQ49
D4 DDR_D12
SDQ50 DDR_D8
B3
SDQ51 E6 DDR_D10
SDQ52 DDR_D14
B5
DDR_CS0_DIMM0# E9 SDQ53 C4 DDR_D13
<<14>> DDR_CS0_DIMM0# SCS#0 SDQ54
DDR_CS1_DIMM0# F7 E4 DDR_D9
<<14>> DDR_CS1_DIMM0# SCS#1 SDQ55
DDR_CS2_DIMM1# F9 C3 DDR_D7
<<15>> DDR_CS2_DIMM1# SCS#2 SDQ56
DDR_CS3_DIMM1# E7 D3 DDR_D6
<<15>> DDR_CS3_DIMM1# SCS#3 SDQ57
F4 DDR_D5
R748 SDQ58 F3 DDR_D0
0_0603_5%~L DDR_BS0 SDQ59 DDR_D3
G12 B2
<<14,15>> DDR_BS0 SBS0 SDQ60
DDR_BS1 G13 C2 DDR_D2
<<14,15,46>> V_DDR_MCH_REF <<14,15>> DDR_BS1 SBS1 SDQ61
E2 DDR_D1
SDQ62 DDR_D4
G4 DDR_CB[0..7] <<14>>
DDR_VREF_MCH SDQ63 DDR_CB2
C16
SDQ64 DDR_CB6
D16
0.1U_0603_16V7K~L SDQ65

0.1U_0603_16V7K~L
J9 B15 DDR_CB5
V_1P25V_DDR_VTT R667 SMVREF0 SDQ66 DDR_CB0
1 1 J21 C14
SMVREF1 SDQ67
C752

C753
30.1_0603_1%~L B17 DDR_CB3
1 2 DDR_RCOMP SDQ68 DDR_CB7
J28 C17
SMRCOMP SDQ69 DDR_CB1
B 2 2 1 100mils SDQ70
C15 B
G15 D14 DDR_CB4
C754 RCVENIN# SDQ71
0.1U_0603_16V7K~L M_RCV# G14
2 RCVENOUT# T282
T5 V8 J27 PAD
<<7,18>> H_DPSLP# DPSLP# RSTIN# PCIRST_1# <<18,27>>
PAD Y8 H27
<<7>> H_DPWR# DPWR# RSVD1
AD26 H26 MCH_TEST# 1 2 +1.5VRUN
NC0 TESTIN#
AD27
T6 NC1 R668
PAD @ 4.7K_0603_5%~L

RG82855PM_FCBGA593

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
Odem(2 of 3)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C 3.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS DDQ12/11/01 with LA-1901
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, January 07, 2004 Sheet 11 of 59
5 4 3 2 1
 5 4 3 2 1

+1.5VRUN

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D
10U_1206_10V4Z~L

10U_1206_10V4Z~L
150U_D2_4VK~D
U68D 1
1 1 1 1 1 1 1 1

C779

C780

C781

C782

C783

C784

C786

C787
+
Odem

C785
R29 E29
+1.5VRUN VCCAGP0 VSS0 @ 2 @ 2 @ 2 2 2 2 2 2 2
W29 J29
VCCAGP1 VSS1
AC29 N29
VCCAGP2 VSS2
AG29 U29
VCCAGP3 VSS3
U26 AA29
VCCAGP4 VSS4 +1.2VRUN
AA26 AE29

0.22U_0603_10V7K~L
VCCAGP5 VSS5

0.022U_0402_16V7K~D
150U_D2_4VK~D

150U_D2_4VK~D

2.2U_0805_16VFZ~L
AE26 A27

0.047U_0603_25V7M~L
VCCAGP6 VSS6

0.015U_0402_16V7K~D

0.01U_0603_50V7K~L
AJ25 K27
VCCAGP7 VSS7
AD23 AJ27 1 1
VCCAGP8 VSS8

C789
D AF23 E26 1 1 1 1 1 1 D
VCCAGP9 VSS9

C788

C790

C791

C792

C793

C794

C795
R22 G26 + +
U22 VCCAGP10 VSS10 J26
VCCAGP11 VSS11 @
W22 L26
VCCAGP12 VSS12 2 2 2 2 2 2 2 2
AA22 R26
AB21 VCCAGP13 VSS13 W26
VCCAGP14 VSS14
AD21 AC26
VCCAGP15 VSS15
AF25
VSS16 A23 +1.8VRUN
VSS17

10U_1206_10V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L
F24
VSS18

0.1U_0402_16V4Z~L
L24
VSS19
P17 M23 1 1 1 1
+1.2VRUN VCC0 VSS20

C775

C776

C777

C778
N16 AC23
VCC1 VSS21
P15 AH23
VCC2 VSS22
R16 D21
T15 VCC3 VSS23 H21 @ 2 @ 2 2 2
VCC4 VSS24
U16 J22
N14 VCC5 VSS25 L22
VCC6 VSS26
P13 N22
VCC7 VSS27
R14 T22
VCC8 VSS28
U14 V22
VCC9 VSS29
Y22
VSS30
AB22
VSS31
+1.8VRUN L29 AC21
VCCHL0 VSS32 +VCCP
L25 AD22
VCCHL1 VSS33
N26 AF21
VCCHL2 VSS34

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L
150U_D_6.3VM_R55~D
N23 AG22
VCCHL3 VSS35
M22 AH21 1
VCCHL4 VSS36 A19
VSS37 1 1 1 1 1 1 1 1

C796

C797

C798

C799

C800

C801

C802

C803

C804
F20 +
VSS38
H19
+VCCP AG23
VCCP0
POWER GND VSS39
VSS40
AB19
AJ23 AC20 2 2 2 2 2 2 2 2 2
VCCP1 VSS41
AE21 AD19
VCCP2 VSS42
AG21 AE20
AJ21 VCCP3 VSS43 AF19
VCCP4 VSS44
AB20 AG20
VCCP5 VSS45
AC19 AH19
C AD20 VCCP6 VSS46 D17 C
VCCP7 VSS47
AE19 H17
VCCP8 VSS48
AF20 N17
AG19 VCCP9 VSS49 R17
VCCP10 VSS50 +2.5V_MEM
AJ19 U17
VCCP11 VSS51
AB18 AB17
VCCP12 VSS52
AD18 AC18
VCCP13 VSS53
AF18 AE18 1 1
VCCP14 VSS54
AB14 AF17
VCCP15 VSS55 C930 C931
AB10 AG18
VCCP16 VSS56 22U_1206_10V4Z~D 22U_1206_10V4Z~D
M8 AJ17
T8 VCCP17 VSS57 A15 2 2
VCCP18 VSS58
AB8 F15
VCCP19 VSS59 H15
VSS60
N15
VSS61
+2.5V_MEM C29 P16
G29 VCCSM0 VSS62 R15
VCCSM1 VSS63
A25 T16
VCCSM2 VSS64
D25 U15
K26 VCCSM3 VSS65 AB15 +2.5V_MEM
VCCSM4 VSS66
D23 AD16
H24 VCCSM5 VSS67 AF15
VCCSM6 VSS68
K24 AJ15
L23 VCCSM7 VSS69 D13
VCCSM8 VSS70
A21 E14
VCCSM9 VSS71
F22 H13
0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L
H22 VCCSM10 VSS72 N13
VCCSM11 VSS73
K22 P14 1
VCCSM12 VSS74
D19 R13
VCCSM13 VSS75 +
H20
VCCSM14 VSS76
T14 1 @ 1 1 @ 1 1 @ 1 1 @ 1 @ 1 1 1 1 @ 1 1 @ 1 1 @ 1 1 1 1 @ 1 1 1 1 1 @ C78
A17 U13 150U_D_6.3VM_R55~D
VCCSM15 VSS77 @
F18 AB13
VCCSM16 VSS78 2
H18 AD14
VCCSM17 VSS79 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
C407

C462

C363

C466

C420

C388

C358

C460

C455

C449

C391

C397

C421

C422

C410

C351

C350

C401

C451

C366

C360

C383

C457

C382

C392
D15 AF13
VCCSM18 VSS80
F16 AJ13
VCCSM19 VSS81
H16 A11
VCCSM20 VSS82
A13 F12
F14 VCCSM21 VSS83 H11
B VCCSM22 VSS84 B
H14 AB11
VCCSM23 VSS85
D11 AD12
VCCSM24 VSS86
H12 AF11
VCCSM25 VSS87
A9 AJ11
VCCSM26 VSS88
F10 D9
VCCSM27 VSS89
H10 H9
VCCSM28 VSS90
D7
VCCSM29
H8
VCCSM30
0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L
K7 G16 V_1P25V_DDR_VTT
VCCSM31 RSVD3 V_1P25V_DDR_VTT
A5 G10
VCCSM32 RSVD4

10U_1206_6.3V7K

10U_1206_6.3V7K
E5 G9 1 1 1 1 1 1 1 1 1 1 1 1

1
VCCSM33 RSVD5
H5 H7
VCCSM34 RSVD6 0402

C557

C190
J6 G2
C1 VCCSM35 RSVD7 G3 internal pull up

2
VCCSM36 RSVD8 2 2 2 2 2 2 2 2 2 2 2 2
C537

C538

C516

C547

C552

C553

C544

C524

C545

C546

C536

C535
+1.8VRUN
one .01uf and 10 G1
VCCSM37 RSVD9
H3
R669
uf each two pins @ 10K_0402_5%~L
T17 H4 1 2 +2.5V_MEM
VCCGA ETS#
0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L
1

T13
VCCHA R670
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
C919 C806 @ 1K_0402_5%~L

10U_1206_10V4Z~L 0.01U_0402_16V7K~L RG8294300M_FCBGA593

2

2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
C532

C510

C533

C534

C517

C518

C551

C550

C549

C548

C523

C555

C522

C521
0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L
+3VRUN
1 1 1 1 1 1 1 1 1 1 1 1 1 1
C +1.2VRUN

R773
3

2 2 2 2 2 2 2 2 2 2 2 2 2 2
C519

C520

C502

C512

C514

C513

C515

C539

C540

C541

C542

C543

C530

C531
@ 220_0402_5%
1 1 2 2 Q86
@ 2SA1036K_SOT23
2

A A
1

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L
MMBT3904_SOT23 R774
MMBT3906_SOT23 @ 470_0402_5% 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1
1

2 Q87
@ MMBT3904_SOT23~D
2 3
2

2 2 2 2 2 2 2 2 2 2 2 2 2 2
C525

C503

C501

C554

C500

C499

C160

C564

C192

C563

C526

C527

C528

C529
3

R775
DELL CONFIDENTIAL/PROPRIETARY
B E @ 470_0402_5%
Compal Electronics, Inc.
Odem 1.5V Rail Leakage
1

Title
Transistoe Current Issue Solution
Odem(3 of 3)
illustration THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Rev
C 3.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS DDQ12/11/01 with LA-1901
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, January 07, 2004 Sheet 12 of 59
5 4 3 2 1
 5 4 3 2 1

FAN1 Control and Tachometer

+12V

0.1U_0402_16V4Z~L
C 1
+5VRUN +3VRUN
1 B E 2 3

C121
+5VRUN
Q15

1
SI3456DV-T1_TSOP6~L
2
2222 SYMBOL(SOT23-NEW)

1
2
5
6

2
R130 U49B R117
D 100K_0402_5%~L LM358M_SO8~L D R110 10K_0402_5%~L D

P
1 2 FAN1VREF 5 G 10K_0402_5%~L

2
<<35>> FAN1_PWM IN+ 7 FAN1_ON 3
OUT FAN1_TACH <<35>>

1U_0805_10V6K~L
FAN1_VFB 6 S

1
IN- R109
1

4
G

1
0.47U_1206_16V7K~L
C128
1K_0402_5%~L
1 1 2 FAN1TACH_ON 2 Q11

4
2

C476
PMBT2222_SOT23~L

3
C127
@ 2200P_0603_50V7K~L 2
1 2

R129
FAN1
100K_0402_5%~L JFAN1
2 1 FAN1_VOUT
1

150K_0603_5%~L
1 FAN1_TACH_FB
2

1
+ C479 3
R128

D9 FOX_BP26037-H1R~L
RB751V_SOD323~L 100U_D_10VM~L
2
1

2
+3VRUN

C +12V +5VRUN +5VRUN C

1
R174

1
2
5
6

2
R437 U49A 10K_0402_5%~L
100K_0402_5%~L LM358M_SO8~L D Q17 R163

P
1 2 FAN2VREF 3 G 10K_0402_5%~L

2
<<35>> FAN2_PWM IN+ 1 FAN2_ON 3
OUT FAN2_TACH <<35>>
1U_0805_10V6K~L

FAN2_VFB 2 S SI3456DV-T1_TSOP6~D

1
IN-

0.47U_1206_16V7K~L
1 R168

4
G

1
C478

1K_0402_5%~L Q18
1 1 2 FAN2TACH_ON 2

C472
PMBT2222_SOT23~L
2

3
C110
@ 2200P_0603_50V7K~L 2
1 2

R436 FAN2_TACH_FB
FAN2_TACH_FB <<16>>
100K_0402_5%~L
2 1 FAN2_5V
FAN2_5V <<16>>
150K_0603_5%~L

1
2

1
+ C495
FAN2
R435

D10 100U_D_10VM~L
RB751V_SOD323~L
2
1

B B

+3VALW +3VRUN

CPU Temperature Sensor +3VALW

H_THERMDA
<<7>> H_THERMDA

0.1U_0402_16V4Z~L
2200P_0603_50V7K

@ 10K_0402_5%~L
2

2
10K_0402_5%~L
2

2
2.2K_0603_5%

2.2K_0603_5%
1

R33

C36

R41
C44

R43

R42

1
U5
2

1
2 1
1

D+ VDD1
H_THERMDC 3 6
<<7>> H_THERMDC D- ALERT ATF_INT# <<34>>
CLK_SMB 8 4 ADM1032_THERM#
<<25,35,36>> CLK_SMB SCLK THERM
DAT_SMB 7 5
<<25,35,36>> DAT_SMB SDATA GND

ADM1032AR_SOP-8
06/18/2003 Item 128

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
ITP Debug CONN. & FAN
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 13 of 59
5 4 3 2 1
 5 4 3 2 1

+2.5V_MEM +2.5V_MEM C114

Layout Note: 0.1U_0402_16V4Z~L
<<11>> DDR_D[0..63]
Place these resistor 2 1
closely DIMM0,all JDIM1
<<11>> DDR_CB[0..7] trace length<750 mil 1 2 V_DDR_MCH_REF
VREF VREF V_DDR_MCH_REF <<11,15,46>>
3 4
DDR_D0_R 5 VSS VSS 6 DDR_D4_R
<<11>> DDR_DS[0..8] DQ0 DQ4 2
DDR_D1_R 7 8 DDR_D5_R
DQ1 DQ5 C98
9 10
DDR_DS0_R VDD VDD 0.1U_0402_16V4Z~L
11 12
RN20 RN29 DDR_D2_R 13 DQS0 DM0 14 DDR_D6_R 1
D DDR_CB4 DDR_CB4_R DDR_D57 DDR_D57_R DQ2 DQ6 DDR_D0_R D
1 4 1 4 15 16 DDR_D0_R <<15>>
DDR_CB0 DDR_CB0_R DDR_D60 DDR_D60_R DDR_D3_R VSS VSS DDR_D7_R DDR_D1_R
2 3 2 3 17 18 DDR_D1_R <<15>>
10_4P2R_0402_5%~L 10_4P2R_0402_5%~L DDR_D8_R 19 DQ3 DQ7 20 DDR_D12_R DDR_D2_R
DQ8 DQ12 DDR_D2_R <<15>>
RN40 RN55 21 22 DDR_D3_R
VDD VDD DDR_D3_R <<15>>
DDR_D31 1 4 DDR_D31_R DDR_D56 1 4 DDR_D56_R DDR_D9_R 23 24 DDR_D13_R DDR_D4_R
DQ9 DQ13 DDR_D4_R <<15>>
DDR_D27 2 3 DDR_D27_R DDR_D55 2 3 DDR_D55_R DDR_DS1_R 25 26 DDR_D5_R
DQS1 DM1 DDR_D5_R <<15>>
10_4P2R_0402_5%~L 10_4P2R_0402_5%~L Layout Note: 27 28 DDR_D6_R
VSS VSS DDR_D6_R <<15>>
RN19 RN28 Place these resistor DDR_D10_R 29 30 DDR_D14_R DDR_D7_R
DQ10 DQ14 DDR_D7_R <<15>>
DDR_D30 1 4 DDR_D30_R DDR_D51 1 4 DDR_D51_R DDR_D11_R 31 32 DDR_D15_R DDR_D8_R
DDR_D26 DDR_D26_R DDR_D54 DDR_D54_R closely DIMM0,all DQ11 DQ15 DDR_D9_R
DDR_D8_R <<15>>
2 3 2 3 33 34 DDR_D9_R <<15>>
10_4P2R_0402_5%~L 10_4P2R_0402_5%~L trace length CK_DDR_CK1 VDD VDD DDR_D10_R
<<11>> CK_DDR_CK1 35 36 DDR_D10_R <<15>>
Max=1.3" CK_DDR_CK1# CK0 VDD DDR_D11_R
RN39 RN54 <<11>> CK_DDR_CK1# 37 38 DDR_D11_R <<15>>
DDR_DS3 1 4 DDR_DS3_R DDR_D50 1 4 DDR_D50_R 39 CK0# VSS 40 DDR_D12_R
VSS VSS DDR_D12_R <<15>>
DDR_D29 2 3 DDR_D29_R DDR_DS6 2 3 DDR_DS6_R DDR_D13_R
DDR_D13_R <<15>>
10_4P2R_0402_5%~L 10_4P2R_0402_5%~L DDR_D14_R
DDR_D14_R <<15>>
RN18 RN27 DDR_D16_R 41 42 DDR_D20_R DDR_D15_R
DQ16 DQ20 DDR_D15_R <<15>>
DDR_D25 1 4 DDR_D25_R DDR_D53 1 4 DDR_D53_R DDR_D17_R 43 44 DDR_D21_R DDR_D16_R
DQ17 DQ21 DDR_D16_R <<15>>
DDR_D28 2 3 DDR_D28_R DDR_D49 2 3 DDR_D49_R V_1P25V_DDR_VTT 45 46 DDR_D17_R
VDD VDD DDR_D17_R <<15>>
10_4P2R_0402_5%~L 10_4P2R_0402_5%~L DDR_DS2_R 47 48 DDR_D18_R
DQS2 DM2 DDR_D18_R <<15>>
RN38 RN53 DDR_D18_R 49 50 DDR_D22_R DDR_D19_R
DQ18 DQ22 DDR_D19_R <<15>>
DDR_D24 1 4 DDR_D24_R DDR_D52 1 4 DDR_D52_R RN75 51 52 DDR_D20_R
VSS VSS DDR_D20_R <<15>>
DDR_D23 2 3 DDR_D23_R DDR_D48 2 3 DDR_D48_R 4 1 DDR_CKE0_DIMM0 DDR_D19_R 53 54 DDR_D23_R DDR_D21_R
DQ19 DQ23 DDR_D21_R <<15>>
10_4P2R_0402_5%~L 10_4P2R_0402_5%~L 3 2 DDR_CKE1_DIMM0 DDR_D24_R 55 56 DDR_D28_R DDR_D22_R
DQ24 DQ28 DDR_D22_R <<15>>
RN17 RN52 57 58 DDR_D23_R
VDD VDD DDR_D23_R <<15>>
DDR_D19 1 4 DDR_D19_R DDR_D47 1 4 DDR_D47_R 56_4P2R_0402_5%~L DDR_D25_R 59 60 DDR_D29_R DDR_D24_R
DQ25 DQ29 DDR_D24_R <<15>>
DDR_D22 2 3 DDR_D22_R DDR_D43 2 3 DDR_D43_R RN81 DDR_DS3_R 61 62 DDR_D25_R
DQS3 DM3 DDR_D25_R <<15>>
10_4P2R_0402_5%~L 10_4P2R_0402_5%~L 3 2 DDR_CS0_DIMM0# 63 64 DDR_D26_R
VSS VSS DDR_D26_R <<15>>
RN37 RN26 4 1 DDR_CS1_DIMM0# DDR_D26_R 65 66 DDR_D30_R DDR_D27_R
DQ26 DQ30 DDR_D27_R <<15>>
DDR_D18 1 4 DDR_D18_R DDR_D46 1 4 DDR_D46_R DDR_D27_R 67 68 DDR_D31_R DDR_D28_R
DQ27 DQ31 DDR_D28_R <<15>>
DDR_DS2 2 3 DDR_DS2_R DDR_D42 2 3 DDR_D42_R 56_4P2R_0402_5%~L 69 70 DDR_D29_R
VDD VDD DDR_D29_R <<15>>
10_4P2R_0402_5%~L 10_4P2R_0402_5%~L DDR_CB0_R 71 72 DDR_CB4_R DDR_D30_R
CB0 CB4 DDR_D30_R <<15>>
RN16 RN51 DDR_CB1_R 73 74 DDR_CB5_R DDR_D31_R
C CB1 CB5 DDR_D31_R <<15>> C
DDR_D21 1 4 DDR_D21_R DDR_DS5 1 4 DDR_DS5_R 75 76 DDR_D32_R
VSS VSS DDR_D32_R <<15>>
DDR_D17 2 3 DDR_D17_R DDR_D45 2 3 DDR_D45_R DDR_DS8_R 77 78 DDR_D33_R
DQS8 DM8 DDR_D33_R <<15>>
10_4P2R_0402_5%~L 10_4P2R_0402_5%~L DDR_CB2_R 79 80 DDR_CB6_R DDR_D34_R
CB2 CB6 DDR_D34_R <<15>>
RN36 RN25 81 82 DDR_D35_R
VDD VDD DDR_D35_R <<15>>
DDR_D20 1 4 DDR_D20_R DDR_D41 1 4 DDR_D41_R DDR_CB3_R 83 84 DDR_CB7_R DDR_D36_R
CB3 CB7 DDR_D36_R <<15>>
DDR_D16 2 3 DDR_D16_R DDR_D44 2 3 DDR_D44_R 85 86 DDR_D37_R
DU DU/RESET# DDR_D37_R <<15>>
10_4P2R_0402_5%~L 10_4P2R_0402_5%~L 87 88 DDR_D38_R
VSS VSS DDR_D38_R <<15>>
RN35 RN50 CK_DDR_CK2 89 90 DDR_D39_R
<<11>> CK_DDR_CK2 CK2 VSS DDR_D39_R <<15>>
DDR_D15 1 4 DDR_D15_R DDR_D40 1 4 DDR_D40_R CK_DDR_CK2# 91 92 DDR_D40_R
<<11>> CK_DDR_CK2# CK2# VDD DDR_D40_R <<15>>
DDR_D11 2 3 DDR_D11_R DDR_D39 2 3 DDR_D39_R 93 94 DDR_D41_R
VDD VDD DDR_D41_R <<15>>
10_4P2R_0402_5%~L 10_4P2R_0402_5%~L DDR_CKE1_DIMM0 95 96 DDR_CKE0_DIMM0 DDR_D42_R
<<11>> DDR_CKE1_DIMM0 CKE1 CKE0 DDR_CKE0_DIMM0 <<11>> DDR_D42_R <<15>>
RN15 RN24 97 98 DDR_D43_R
DU/A13 DU/BA2 DDR_D43_R <<15>>
DDR_D14 1 4 DDR_D14_R DDR_D35 1 4 DDR_D35_R DDR_MA12_R 99 100 DDR_MA11_R DDR_D44_R
A12 A11 DDR_D44_R <<15>>
DDR_D10 2 3 DDR_D10_R DDR_D38 2 3 DDR_D38_R DDR_MA9_R 101 102 DDR_MA8_R DDR_D45_R
A9 A8 DDR_D45_R <<15>>
10_4P2R_0402_5%~L 10_4P2R_0402_5%~L 103 104 DDR_D46_R
VSS VSS DDR_D46_R <<15>>
RN34 RN49 DDR_MA7_R 105 106 DDR_MA6_R DDR_D47_R
A7 A6 DDR_D47_R <<15>>
DDR_DS1 1 4 DDR_DS1_R DDR_D34 1 4 DDR_D34_R DDR_MA5_R 107 108 DDR_MA4_R DDR_D48_R
A5 A4 DDR_D48_R <<15>>
DDR_D13 2 3 DDR_D13_R DDR_DS4 2 3 DDR_DS4_R DDR_MA3_R 109 110 DDR_MA2_R DDR_D49_R
A3 A2 DDR_D49_R <<15>>
10_4P2R_0402_5%~L 10_4P2R_0402_5%~L DDR_MA1_R 111 112 DDR_MA0_R DDR_D50_R
A1 A0 DDR_D50_R <<15>>
RN14 RN23 113 114 DDR_D51_R
VDD VDD DDR_D51_R <<15>>
DDR_D9 1 4 DDR_D9_R DDR_D37 1 4 DDR_D37_R DDR_MA10_R 115 116 DDR_BS1_R DDR_D52_R
A10/AP BA1 DDR_D52_R <<15>>
DDR_D12 2 3 DDR_D12_R DDR_D33 2 3 DDR_D33_R DDR_BS0_R 117 118 DDR_RAS_R# DDR_D53_R
BA0 RAS# DDR_D53_R <<15>>
10_4P2R_0402_5%~L 10_4P2R_0402_5%~L DDR_WE_R# 119 120 DDR_CAS_R# DDR_D54_R
WE# CAS# DDR_D54_R <<15>>
RN33 RN48 DDR_CS0_DIMM0# 121 122 DDR_CS1_DIMM0# DDR_D55_R
<<11>> DDR_CS0_DIMM0# S0# S1# DDR_CS1_DIMM0# <<11>> DDR_D55_R <<15>>
DDR_D8 1 4 DDR_D8_R DDR_D36 1 4 DDR_D36_R 123 124 DDR_D56_R
DU DU DDR_D56_R <<15>>
DDR_D7 2 3 DDR_D7_R DDR_D32 2 3 DDR_D32_R 125 126 DDR_D57_R
<<11,15>> DDR_MA[0..12] VSS VSS DDR_D57_R <<15>>
10_4P2R_0402_5%~L 10_4P2R_0402_5%~L DDR_D32_R 127 128 DDR_D36_R DDR_D58_R
DQ32 DQ36 DDR_D58_R <<15>>
RN13 DDR_D33_R 129 130 DDR_D37_R DDR_D59_R
DQ33 DQ37 DDR_D59_R <<15>>
DDR_D3 1 4 DDR_D3_R 131 132 DDR_D60_R
VDD VDD DDR_D60_R <<15>>
DDR_D6 2 3 DDR_D6_R DDR_DS4_R 133 134 DDR_D61_R
DQS4 DM4 DDR_D61_R <<15>>
10_4P2R_0402_5%~L DDR_D34_R 135 136 DDR_D38_R DDR_D62_R
DQ34 DQ38 DDR_D62_R <<15>>
RN32 RN61 137 138 DDR_D63_R
B VSS VSS DDR_D63_R <<15>> B
DDR_D2 1 4 DDR_D2_R DDR_BS0 1 4 DDR_BS0_R DDR_D35_R 139 140 DDR_D39_R
<<11,15>> DDR_BS0 DQ35 DQ39
DDR_DS0 2 3 DDR_DS0_R DDR_WE# 2 3 DDR_WE_R# DDR_D40_R 141 142 DDR_D44_R
<<11,15>> DDR_WE# DQ40 DQ44
10_4P2R_0402_5%~L 10_4P2R_0402_5%~L 143 144
RN12 RN47 DDR_D41_R VDD VDD DDR_D45_R
145 146
DDR_D5 DDR_D5_R DDR_CAS# DDR_CAS_R# DDR_DS5_R DQ41 DQ45
1 4 <<11,15>> DDR_CAS# 1 4 147 148
DDR_D1 2 3 DDR_D1_R DDR_RAS# 2 3 DDR_RAS_R# 149 DQS5 DM5 150 DDR_CB0_R
<<11,15>> DDR_RAS# VSS VSS DDR_CB0_R <<15>>
10_4P2R_0402_5%~L 10_4P2R_0402_5%~L DDR_D42_R 151 152 DDR_D46_R DDR_CB1_R
DQ42 DQ46 DDR_CB1_R <<15>>
RN31 RN46 DDR_D43_R 153 154 DDR_D47_R DDR_CB2_R
DQ43 DQ47 DDR_CB2_R <<15>>
DDR_D4 1 4 DDR_D4_R DDR_BS1 1 4 DDR_BS1_R 155 156 DDR_CB3_R
<<11,15>> DDR_BS1 VDD VDD DDR_CB3_R <<15>>
DDR_D0 2 3 DDR_D0_R DDR_MA0 2 3 DDR_MA0_R 157 158 CK_DDR_CK0# DDR_CB4_R
VDD CK1# CK_DDR_CK0# <<11>> DDR_CB4_R <<15>>
10_4P2R_0402_5%~L 10_4P2R_0402_5%~L 159 160 CK_DDR_CK0 DDR_CB5_R
VSS CK1 CK_DDR_CK0 <<11>> DDR_CB5_R <<15>>
RN22 RN60 161 162 DDR_CB6_R
VSS VSS DDR_CB6_R <<15>>
DDR_CB7 1 4 DDR_CB7_R DDR_MA1 1 4 DDR_MA1_R DDR_D48_R 163 164 DDR_D52_R DDR_CB7_R
DQ48 DQ52 DDR_CB7_R <<15>>
DDR_CB3 2 3 DDR_CB3_R DDR_MA10 2 3 DDR_MA10_R DDR_D49_R 165 166 DDR_D53_R
10_4P2R_0402_5%~L 10_4P2R_0402_5%~L DQ49 DQ53
167 168
RN42 Layout Note: RN45 DDR_DS6_R 169 VDD VDD 170
DDR_CB6 DDR_CB6_R DDR_MA2 DDR_MA2_R DDR_D50_R DQS6 DM6 DDR_D54_R
1 4 Place these resistor 1 4 171 172
DDR_MA4 DDR_MA4_R DQ50 DQ54
2 3 2 3 173 174
10_4P2R_0402_5%~L closely DIMM0,all 10_4P2R_0402_5%~L DDR_D51_R 175
VSS VSS
176 DDR_D55_R DDR_DS0_R
trace length<750 mil DQ51 DQ55 DDR_DS0_R <<15>>
RN21 RN62 DDR_D56_R 177 178 DDR_D60_R DDR_DS1_R
DQ56 DQ60 DDR_DS1_R <<15>>
DDR_CB2 1 4 DDR_CB2_R DDR_MA5 1 4 DDR_MA5_R 179 180 DDR_DS2_R
VDD VDD DDR_DS2_R <<15>>
DDR_DS8 2 3 DDR_DS8_R DDR_MA3 2 3 DDR_MA3_R DDR_D57_R 181 182 DDR_D61_R DDR_DS3_R
DQ57 DQ61 DDR_DS3_R <<15>>
10_4P2R_0402_5%~L 10_4P2R_0402_5%~L DDR_DS7_R 183 184 DDR_DS4_R
DQS7 DM7 DDR_DS4_R <<15>>
RN41 RN44 185 186 DDR_DS5_R
VSS VSS DDR_DS5_R <<15>>
DDR_CB5 1 4 DDR_CB5_R DDR_MA6 1 4 DDR_MA6_R DDR_D58_R 187 188 DDR_D62_R DDR_DS6_R
DQ58 DQ62 DDR_DS6_R <<15>>
DDR_CB1 2 3 DDR_CB1_R DDR_MA8 2 3 DDR_MA8_R DDR_D59_R 189 190 DDR_D63_R DDR_DS7_R
DQ59 DQ63 DDR_DS7_R <<15>>
10_4P2R_0402_5%~L 10_4P2R_0402_5%~L 191 192 DDR_DS8_R
VDD VDD DDR_DS8_R <<15>>
RN57 RN59 ICH_SMBDATA 193 194
<<6,15,19,31>> ICH_SMBDATA SDA SA0
DDR_D63 1 4 DDR_D63_R DDR_MA9 1 4 DDR_MA9_R ICH_SMBCLK 195 196
<<6,15,19,31>> ICH_SMBCLK SCL SA1
DDR_D59 2 3 DDR_D59_R DDR_MA7 2 3 DDR_MA7_R 197 198
10_4P2R_0402_5%~L 10_4P2R_0402_5%~L +3VSUS VDD_SPD SA2
199 200
RN30 RN43 VDD_ID DU
A DDR_D62 1 4 DDR_D62_R DDR_MA11 1 4 DDR_MA11_R A
DDR_D58 2 3 DDR_D58_R 2 3 AMP_1565917-1~L
10_4P2R_0402_5%~L 10_4P2R_0402_5%~L +2.5V_MEM
RN56 RN58
DDR_DS7 1 4 DDR_DS7_R 1 4
R119
DIMM0
DDR_D61 2 3 DDR_D61_R DDR_MA12 2 3 DDR_MA12_R 1 2 DIMM0_ID
10_4P2R_0402_5%~L 10_4P2R_0402_5%~L STANDARD DELL CONFIDENTIAL/PROPRIETARY
10K_0402_5%~L
Compal Electronics, Inc.
Title

DDR-SODIMM SLOT1
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 14 of 59
5 4 3 2 1
 5 4 3 2 1

Layout Note: +2.5V_MEM +2.5V_MEM C165

Place these resistors 0.1U_0402_16V4Z~L Layout Note:
closely DIMM1,all 2 1 Place CAP
trace length<=800 mil JDIM2 near SOIDIMM
1 2 V_DDR_MCH_REF One .1uF cap per power pin.
VREF VREF V_DDR_MCH_REF <<11,14,46>>
3 4 Place each cap close to
DDR_D0_R VSS VSS DDR_D4_R
5 6 2 pin.
DDR_D1_R DQ0 DQ4 DDR_D5_R
<<11,14>> DDR_MA[0..12] 7 8
DQ1 DQ5 C141 +2.5V_MEM
9 10
V_1P25V_DDR_VTT DDR_DS0_R 11 VDD VDD 12 0.1U_0402_16V4Z~L
D DDR_D2_R DQS0 DM0 DDR_D6_R 1 D
13 14
DQ2 DQ6
15 16
DDR_D0_R DDR_D3_R 17 VSS VSS 18 DDR_D7_R
<<14>> DDR_D0_R DQ3 DQ7

10U_1206_6.3V7K~L

10U_1206_6.3V7K~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

1000P_0402_50V7K~L

1000P_0402_50V7K~L

1000P_0402_50V7K~L

1000P_0402_50V7K~L
DDR_D1_R RN88 RN80 DDR_D8_R 19 20 DDR_D12_R
<<14>> DDR_D1_R DQ8 DQ12
DDR_D2_R DDR_D63_R 1 4 4 1 DDR_CAS# 21 22
<<14>> DDR_D2_R VDD VDD
DDR_D3_R DDR_D59_R 2 3 3 2 DDR_WE# DDR_D9_R 23 24 DDR_D13_R 1 1 1 1 1 1 1 1 1 1
<<14>> DDR_D3_R DQ9 DQ13
DDR_D4_R 56_4P2R_0402_5%~L 56_4P2R_0402_5%~L DDR_DS1_R 25 26
<<14>> DDR_D4_R DQS1 DM1
DDR_D5_R RN115 RN106 27 28
<<14>> DDR_D5_R VSS VSS
DDR_D6_R DDR_D62_R 1 4 4 1 DDR_RAS# DDR_D10_R 29 30 DDR_D14_R
<<14>> DDR_D6_R DQ10 DQ14 2 2 2 2 2 2 2 2 2 2
DDR_D7_R DDR_D58_R 2 3 3 2 DDR_BS0 DDR_D11_R 31 32 DDR_D15_R
<<14>> DDR_D7_R DQ11 DQ15

C153

C143

C173

C147

C166

C168

C148

C174

C164

C100
DDR_D8_R 56_4P2R_0402_5%~L 56_4P2R_0402_5%~L 33 34
<<14>> DDR_D8_R VDD VDD
DDR_D9_R RN87 RN79 CK_DDR_CK4 35 36
<<14>> DDR_D9_R <<11>> CK_DDR_CK4 CK0 VDD
DDR_D10_R DDR_DS7_R 1 4 4 1 DDR_BS1 CK_DDR_CK4# 37 38
<<14>> DDR_D10_R <<11>> CK_DDR_CK4# CK0# VSS
DDR_D11_R DDR_D61_R 2 3 3 2 DDR_MA10 39 40
<<14>> DDR_D11_R VSS VSS
DDR_D12_R 56_4P2R_0402_5%~L 56_4P2R_0402_5%~L
<<14>> DDR_D12_R
DDR_D13_R RN114 RN105 +2.5V_MEM
<<14>> DDR_D13_R
DDR_D14_R DDR_D57_R 1 4 4 1 DDR_MA0 DDR_D16_R 41 42 DDR_D20_R
<<14>> DDR_D14_R DQ16 DQ20
DDR_D15_R DDR_D60_R 2 3 3 2 DDR_MA1 DDR_D17_R 43 44 DDR_D21_R
<<14>> DDR_D15_R DQ17 DQ21
DDR_D16_R 56_4P2R_0402_5%~L 56_4P2R_0402_5%~L 45 46
<<14>> DDR_D16_R VDD VDD
DDR_D17_R RN86 RN78 DDR_DS2_R 47 48
<<14>> DDR_D17_R DQS2 DM2
DDR_D18_R DDR_D56_R 1 4 4 1 DDR_MA2 DDR_D18_R 49 50 DDR_D22_R
<<14>> DDR_D18_R DQ18 DQ22

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

1000P_0402_50V7K~L

1000P_0402_50V7K~L

1000P_0402_50V7K~L

1000P_0402_50V7K~L
DDR_D19_R DDR_D55_R 2 3 3 2 DDR_MA3 51 52
<<14>> DDR_D19_R VSS VSS

0.1U_0402_16V4Z~L
DDR_D20_R 56_4P2R_0402_5%~L 56_4P2R_0402_5%~L DDR_D19_R 53 54 DDR_D23_R
<<14>> DDR_D20_R DQ19 DQ23
DDR_D21_R RN113 RN104 DDR_D24_R 55 56 DDR_D28_R 1 1 1 1 1 1 1 1
<<14>> DDR_D21_R DQ24 DQ28
DDR_D22_R DDR_D51_R 1 4 4 1 DDR_MA4 57 58
<<14>> DDR_D22_R VDD VDD
DDR_D23_R DDR_D54_R 2 3 3 2 DDR_MA5 DDR_D25_R 59 60 DDR_D29_R
<<14>> DDR_D23_R DQ25 DQ29
DDR_D24_R 56_4P2R_0402_5%~L 56_4P2R_0402_5%~L DDR_DS3_R 61 62
<<14>> DDR_D24_R DQS3 DM3 2 2 2 2 2 2 2 2
DDR_D25_R RN85 RN77 63 64
<<14>> DDR_D25_R VSS VSS

C145

C167

C118

C138

C146

C144

C115

C116
DDR_D26_R DDR_D50_R 1 4 4 1 DDR_MA6 DDR_D26_R 65 66 DDR_D30_R
<<14>> DDR_D26_R DQ26 DQ30
DDR_D27_R DDR_DS6_R 2 3 3 2 DDR_MA7 DDR_D27_R 67 68 DDR_D31_R
<<14>> DDR_D27_R DQ27 DQ31
DDR_D28_R 56_4P2R_0402_5%~L 56_4P2R_0402_5%~L 69 70
<<14>> DDR_D28_R VDD VDD
DDR_D29_R RN112 RN103 DDR_CB0_R 71 72 DDR_CB4_R
C <<14>> DDR_D29_R CB0 CB4 C
DDR_D30_R DDR_D53_R 1 4 4 1 DDR_MA8 DDR_CB1_R 73 74 DDR_CB5_R
<<14>> DDR_D30_R CB1 CB5
DDR_D31_R DDR_D49_R 2 3 3 2 DDR_MA9 75 76 +2.5V_MEM
<<14>> DDR_D31_R VSS VSS
DDR_D32_R 56_4P2R_0402_5%~L 56_4P2R_0402_5%~L DDR_DS8_R 77 78
<<14>> DDR_D32_R DQS8 DM8
DDR_D33_R RN84 RN76 DDR_CB2_R 79 80 DDR_CB6_R
<<14>> DDR_D33_R CB2 CB6
DDR_D34_R DDR_D52_R 1 4 4 1 DDR_MA11 81 82
<<14>> DDR_D34_R VDD VDD
DDR_D35_R DDR_D48_R 2 3 3 2 DDR_MA12 DDR_CB3_R 83 84 DDR_CB7_R
<<14>> DDR_D35_R CB3 CB7

1000P_0402_50V7K~L

1000P_0402_50V7K~L

1000P_0402_50V7K~L

1000P_0402_50V7K~L
DDR_D36_R 56_4P2R_0402_5%~L 56_4P2R_0402_5%~L 85 86
<<14>> DDR_D36_R DU DU/RESET#

10U_1206_6.3V7K~L

10U_1206_6.3V7K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L

0.1U_0402_10V6K~L
DDR_D37_R RN111 RN101 87 88
<<14>> DDR_D37_R VSS VSS
DDR_D38_R DDR_D47_R 1 4 4 1 DDR_CB7_R CK_DDR_CK5 89 90 1 1 1 1 1 1 1 1 1 1
<<14>> DDR_D38_R <<11>> CK_DDR_CK5 CK2 VSS
DDR_D39_R DDR_D43_R 2 3 3 2 DDR_CB3_R CK_DDR_CK5# 91 92
<<14>> DDR_D39_R <<11>> CK_DDR_CK5# CK2# VDD
DDR_D40_R 56_4P2R_0402_5%~L 56_4P2R_0402_5%~L 93 94
<<14>> DDR_D40_R VDD VDD
DDR_D41_R RN93 RN74 DDR_CKE3_DIMM1 95 96 DDR_CKE2_DIMM1
<<14>> DDR_D41_R <<11>> DDR_CKE3_DIMM1 CKE1 CKE0 DDR_CKE2_DIMM1 <<11>> 2 2 2 2 2 2 2 2 2 2
DDR_D42_R DDR_D9_R 1 4 4 1 97 98
<<14>> DDR_D42_R DU/A13 DU/BA2

C99

C142

C163

C151

C107

C119

C137

C117

C154

C150
DDR_D43_R DDR_D12_R 2 3 3 2 DDR_CB6_R DDR_MA12 99 100 DDR_MA11
<<14>> DDR_D43_R A12 A11
DDR_D44_R 56_4P2R_0402_5%~L 56_4P2R_0402_5%~L DDR_MA9 101 102 DDR_MA8
<<14>> DDR_D44_R A9 A8
DDR_D45_R RN65 RN100 103 104
<<14>> DDR_D45_R VSS VSS
DDR_D46_R DDR_D8_R 1 4 4 1 DDR_CB2_R DDR_MA7 105 106 DDR_MA6
<<14>> DDR_D46_R A7 A6
DDR_D47_R DDR_D7_R 2 3 3 2 DDR_DS8_R DDR_MA5 107 108 DDR_MA4
<<14>> DDR_D47_R A5 A4
DDR_D48_R 56_4P2R_0402_5%~L 56_4P2R_0402_5%~L DDR_MA3 109 110 DDR_MA2 +2.5V_MEM
<<14>> DDR_D48_R A3 A2
DDR_D49_R RN90 RN73 DDR_MA1 111 112 DDR_MA0
<<14>> DDR_D49_R A1 A0
DDR_D50_R DDR_D46_R 1 4 4 1 DDR_CB5_R 113 114
<<14>> DDR_D50_R VDD VDD
DDR_D51_R DDR_D42_R 2 3 3 2 DDR_CB1_R DDR_MA10 115 116 DDR_BS1
<<14>> DDR_D51_R A10/AP BA1
DDR_D52_R 56_4P2R_0402_5%~L 56_4P2R_0402_5%~L DDR_BS0 117 118 DDR_RAS#
<<14>> DDR_D52_R BA0 RAS#
DDR_D53_R RN116 RN99 DDR_WE# 119 120 DDR_CAS#
<<14>> DDR_D53_R WE# CAS#

1000P_0402_50V7K~L

1000P_0402_50V7K~L

1000P_0402_50V7K~L

1000P_0402_50V7K~L

1000P_0402_50V7K~L

1000P_0402_50V7K~L

1000P_0402_50V7K~L

1000P_0402_50V7K~L
DDR_D54_R DDR_DS5_R 1 4 4 1 DDR_CB4_R DDR_CS2_DIMM1# 121 122 DDR_CS3_DIMM1#
<<14>> DDR_D54_R <<11>> DDR_CS2_DIMM1# S0# S1# DDR_CS3_DIMM1# <<11>>
DDR_D55_R DDR_D45_R 2 3 3 2 DDR_CB0_R 123 124
<<14>> DDR_D55_R DU DU
DDR_D56_R 56_4P2R_0402_5%~L 56_4P2R_0402_5%~L 125 126 1 1 1 1 1 1 1 1
<<14>> DDR_D56_R VSS VSS
DDR_D57_R RN89 RN72 DDR_D32_R 127 128 DDR_D36_R
<<14>> DDR_D57_R DQ32 DQ36
DDR_D58_R DDR_D41_R 1 4 4 1 DDR_D31_R DDR_D33_R 129 130 DDR_D37_R
<<14>> DDR_D58_R DQ33 DQ37
DDR_D59_R DDR_D44_R 2 3 3 2 DDR_D27_R 131 132
<<14>> DDR_D59_R VDD VDD 2 2 2 2 2 2 2 2
DDR_D60_R 56_4P2R_0402_5%~L 56_4P2R_0402_5%~L DDR_DS4_R 133 134
<<14>> DDR_D60_R DQS4 DM4

C109

C105

C111

C102

C106

C103

C149

C101
DDR_D61_R RN110 RN98 DDR_D34_R 135 136 DDR_D38_R
B <<14>> DDR_D61_R DQ34 DQ38 B
DDR_D62_R DDR_D40_R 1 4 4 1 DDR_D30_R 137 138
<<14>> DDR_D62_R VSS VSS
DDR_D63_R DDR_D39_R 2 3 3 2 DDR_D26_R DDR_D35_R 139 140 DDR_D39_R
<<14>> DDR_D63_R DQ35 DQ39
56_4P2R_0402_5%~L 56_4P2R_0402_5%~L DDR_D40_R 141 142 DDR_D44_R
RN83 RN71
DQ40 DQ44
143 144
DDR_D35_R DDR_DS3_R DDR_D41_R VDD VDD DDR_D45_R
1 4 4 1 145 146
DDR_D38_R 2 3 3 2 DDR_D29_R DDR_DS5_R 147 DQ41 DQ45 148
DDR_CB0_R 56_4P2R_0402_5%~L 56_4P2R_0402_5%~L DQS5 DM5
<<14>> DDR_CB0_R 149 150 Layout Note:
DDR_CB1_R DDR_D42_R VSS VSS DDR_D46_R
<<14>> DDR_CB1_R RN109 RN97 151 152 Place these resistor
DDR_CB2_R DDR_D34_R 1 4 4 1 DDR_D25_R DDR_D43_R 153 DQ42 DQ46 154 DDR_D47_R
<<14>> DDR_CB2_R DQ43 DQ47 closely DIMM1,all
DDR_CB3_R DDR_DS4_R 2 3 3 2 DDR_D28_R 155 156 Place by pin197 of each SODIMM
<<14>> DDR_CB3_R VDD VDD trace length
DDR_CB4_R 56_4P2R_0402_5%~L 56_4P2R_0402_5%~L 157 158 CK_DDR_CK3#
<<14>> DDR_CB4_R VDD CK1# CK_DDR_CK3# <<11>>
DDR_CB5_R RN82 RN70 159 160 CK_DDR_CK3 Max=1.3"
<<14>> DDR_CB5_R VSS CK1 CK_DDR_CK3 <<11>>
DDR_CB6_R DDR_D37_R 1 4 4 1 DDR_D24_R 161 162 +3VSUS
<<14>> DDR_CB6_R VSS VSS
DDR_CB7_R DDR_D33_R 2 3 3 2 DDR_D23_R DDR_D48_R 163 164 DDR_D52_R
<<14>> DDR_CB7_R DQ48 DQ52
56_4P2R_0402_5%~L 56_4P2R_0402_5%~L DDR_D49_R 165 166 DDR_D53_R
RN108 RN96 167 DQ49 DQ53 168
DDR_D36_R DDR_D19_R DDR_DS6_R VDD VDD
1 4 4 1 169 170
DDR_D32_R DDR_D22_R DDR_D50_R DQS6 DM6 DDR_D54_R
2 3 3 2 171 172 V_1P25V_DDR_VTT
56_4P2R_0402_5%~L 56_4P2R_0402_5%~L DQ50 DQ54
173 174
DDR_DS0_R DDR_D51_R VSS VSS DDR_D55_R
<<14>> DDR_DS0_R RN92 RN69 175 176 1 1
DDR_DS1_R DDR_D3_R DDR_D18_R DDR_D56_R DQ51 DQ55 DDR_D60_R RN102 C156 C122
<<14>> DDR_DS1_R 1 4 4 1 177 178
DDR_DS2_R DDR_D6_R DDR_DS2_R DQ56 DQ60 DDR_CKE2_DIMM1
<<14>> DDR_DS2_R 2 3 3 2 179 180 1 4
VDD VDD

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L
DDR_DS3_R 56_4P2R_0402_5%~L DDR_D57_R 181 182 DDR_D61_R DDR_CKE3_DIMM1 2 3
<<14>> DDR_DS3_R DQ57 DQ61 2 2
DDR_DS4_R 56_4P2R_0402_5%~L RN64 RN95 DDR_DS7_R 183 184
<<14>> DDR_DS4_R DQS7 DM7
DDR_DS5_R DDR_D2_R 1 4 4 1 DDR_D21_R 185 186 56_4P2R_0402_5%~L
<<14>> DDR_DS5_R VSS VSS
DDR_DS6_R DDR_DS0_R 2 3 3 2 DDR_D17_R DDR_D58_R 187 188 DDR_D62_R RN107
<<14>> DDR_DS6_R DQ58 DQ62
DDR_DS7_R 56_4P2R_0402_5%~L 56_4P2R_0402_5%~L DDR_D59_R 189 190 DDR_D63_R DDR_CS2_DIMM1# 2 3
<<14>> DDR_DS7_R DQ59 DQ63
DDR_DS8_R RN91 RN68 191 192 DDR_CS3_DIMM1# 1 4
<<14>> DDR_DS8_R VDD VDD
DDR_D5_R 1 4 4 1 DDR_D20_R ICH_SMBDATA 193 194
<<6,14,19,31>> ICH_SMBDATA SDA SA0 +3VSUS
DDR_D1_R 2 3 3 2 DDR_D16_R ICH_SMBCLK 195 196 56_4P2R_0402_5%~L
<<6,14,19,31>> ICH_SMBCLK SCL SA1
56_4P2R_0402_5%~L 56_4P2R_0402_5%~L 197 198
+3VSUS VDD_SPD SA2
RN63 RN67 199 200
A DDR_BS0 DDR_D4_R DDR_D15_R VDD_ID DU A
<<11,14>> DDR_BS0 1 4 4 1
DDR_BS1 DDR_D0_R 2 3 3 2 DDR_D11_R
<<11,14>> DDR_BS1
DDR_WE# 56_4P2R_0402_5%~L 56_4P2R_0402_5%~L AMP_1565918-1~L
<<11,14>> DDR_WE# +2.5V_MEM
DDR_CAS# RN66 RN94 +2.5V_MEM
<<11,14>> DDR_CAS#
DDR_RAS# DDR_DS1_R 1 4 4 1 DDR_D14_R
<<11,14>> DDR_RAS# R151
DDR_D13_R 2 3 3 2 DDR_D10_R
56_4P2R_0402_5%~L 56_4P2R_0402_5%~L 1 2 DIMM1_ID DIMM1 1 1 1 1
DELL CONFIDENTIAL/PROPRIETARY
REVERSE C933 + C934 + C935 + @ C936 +
Compal Electronics, Inc.
10K_0402_5%~L 150U_D2_4VK~D Title
@
2
150U_D2_4VK~D
2
150U_D_6.3VM_R55~D
2
150U_D_6.3VM_R55~D
2 DDR-SODIMM SLOT2
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 15 of 59
5 4 3 2 1
 5 4 3 2 1

Q56
PWR_SRC G_PWR_SRC
SI4435DY_SO8~L
<<10>> G_AD[0..31]
1 8
<<10>> G_C/BE#[0..3] 2 7
3 6
JVID
5

0.1U_0603_25V7M~L

0.1U_0603_25V7M~L
<<10>> G_SBA[0..7]

GPWR_SRC_ON 4
100K_0603_5%~D
2 2

C28
D CK_66M_AGP D
<<6>> CK_66M_AGP

C668

R571
G_REQ# 1 2
<<10>> G_REQ# 1 2
G_ST0 DVI_TX0+ 3 4 DVI_TX4+
<<10>> G_ST0 <<33>> DVI_TX0+ 3 4 DVI_TX4+ <<33>> 1 1
G_ST1 5 6
<<10>> G_ST1 G_ST2 DVI_TX0- 5 6 DVI_TX4-
7 8 DVI_TX4- <<33>>
<<10>> G_ST2 <<33>> DVI_TX0- 7 8
9 10
DVI_TX1+ 9 10 DVI_TX5+
11 12 DVI_TX5+ <<33>>
+1.5VRUN <<33>> DVI_TX1+ 11 12
13 14
DVI_TX1- 13 14 DVI_TX5-
<<33>> DVI_TX1- 15 16 DVI_TX5- <<33>>
R134 @ 10K_0402_5% 15 16
17 18
G_AD_STB0 DVI_TX2+ 17 18 DVI_CLK+
2 1 19 20 DVI_CLK+ <<33>>
<<33>> DVI_TX2+ 19 20

1
21 22
R122 @ 10K_0402_5% DVI_TX2- 23 21 22 24 DVI_CLK- R196
<<33>> DVI_TX2- 23 24 DVI_CLK- <<33>>
2 1 G_AD_STB1 25 26 100K_0402_5%~L
DVI_TX3+ 25 26 DVI_SCLK
27 28 DVI_SCLK <<33>>
R106 @ 10K_0402_5% <<33>> DVI_TX3+ 27 28
29 30

AGP_PWRON# 2
G_SB_STB T250 DVI_TX3- 29 30 DVI_SDAT
2 1 <<33>> DVI_TX3-
31 32 DVI_SDAT <<33>>
PAD 31 32
33 34
AGP8X_DET_CG 33 34 DVI_DETECT
35 36 DVI_DETECT <<33>>
35 36

100K_0402_5%~L
AGP8X_DET_GC 37 38
37 38 +3VRUN

1
R131 @ 10K_0402_5% T251 PCI_PIRQB# 39 40 PCI_PIRQA#
PCI_PIRQA# <<18>>
2 1 G_AD_STB0# PAD <<18,31,32>> PCI_PIRQB#
41
39 40
42 FAN2_TACH_FB
41 42 FAN2_TACH_FB <<13>>

R15
CK_66M_AGP 43 44 FAN2_5V
43 44 FAN2_5V <<13>>
R121 @ 10K_0402_5% 45 46
45 46

1
G_AD_STB1# G_REQ# D
2 1 47 48

2
47 48 +1.5VRUN
G_ST0 49 50 G_ST1 2 Q73
49 50 <<34,37,40,44,48>> RUN_ON
R107 @ 10K_0402_5% ST1 ST2 G_ST2 51 52 G 2N7002_SOT23~L
G_SB_STB# 51 52 G_SBA0
2 1 53 54 S

3
G_SB_STB 53 54 G_SBA1 +3VSUS
X 1 DDR 55
55 56
56
G_SB_STB# 57 58 G_SBA3
57 58 U48
0 X TEST 59
59 60
60
G_SBA2 61 62 G_SBA5 @ TC7SH32FU_SSOP5

5
C G_SBA4 61 62 G_SBA7 C
1 X 400 Mhz BPSB 63
63 64
64
G_SBA6 65 66 G_DEVSEL# 2 SYS_SUSPEND
+1.5VRUN 65 66 SYS_SUSPEND <<34,42>>
RUNPWROK 67 68 AGP_RST# 4
<<35,38,44,45,47>> RUNPWROK 67 68
69 70 G_PIPE# 1 PCIRST_AGP#
+1.5VRUN 69 70 PCIRST_AGP# <<18>>
71 72
71 72
2 1 R103 G_ST0 R655 G_IRDY# 73 74 G_RBF#

3
73 74 G_RBF# <<10>>
@ 10K_0402_5% @ 1K_0402_5%~L G_TRDY# 75 76 G_WBF#
75 76 G_WBF# <<10>>
2 1 R104 G_ST1 1 2 G_STOP# 77 78 G_FRAME#
1K_0402_5%~L G_C/BE#3 77 78 G_AD30 R431
79 80
79 80
2 1 R101 G_ST2 81 82 0_0402_5%~L
1K_0402_5%~L G_AD31 83 81 82 84 G_AD28 2 1
83 84
2 1 R434 G_FRAME# G_AD29 85 86 G_AD26
@ 10K_0402_5% 85 86
87 88
2 1 R114 G_IRDY# G_AD_STB1# 89 87 88 90 G_AD24 Shielding Ground Pin
@ 10K_0402_5% G_AD_STB1 89 90 G_AD22
91 92
91 92
2 1 R116 G_TRDY# 93 94
@ 10K_0402_5% G_AD27 95
93 94
96 G_AD20 9,10
2 1 R108 G_DEVSEL# G_AD25 97 95 96 98 G_AD18
@ 10K_0402_5% G_C/BE#2 99
97 98
100 G_AD23 33,34
99 100
2 1 R120 G_STOP# 101 102
@ 10K_0402_5% T252 G_AD21 103
101 102
104 G_AD17 T253 59,60
103 104
2 1 R442 G_PAR PAD G_AD19 105 106 G_AD16 PAD
87,88
@ 10K_0402_5%~L DBI_HI 105 106 DBI_LO
107 108
2 1 R112 G_PIPE# 109 107 108 110 G_AGPBUSY#
@ 10K_0402_5%~L
<<10>> VREFCG
+1.5VRUN VREFCG 111
109 110
112 VREFGC_R 1 2
G_AGPBUSY#
VREFGC
<<20>>
<<10>>
113,114
111 112
2 1 R115 G_WBF# 113 114 R124
141,142
@ 10K_0402_5% G_AD15 113 114 G_C/BE#1 0_0402_5%~L
1 115 116
2 1 R432 G_RBF# G_AD13 115 116 G_AD14
117 118
@ 10K_0402_5% C123 119
117 118
120
167,168
0.1U_0402_16V4Z~L 119 120
2 1 R100 G_REQ# G_AD11 121 122 G_AD12
@ 10K_0402_5% 2 G_AD9 123 121 122 124 G_AD10 191,192
123 124
2 1 R441 G_GNT# G_AD7 125 126 G_AD8
B @ 10K_0402_5%~L 125 126 B
127 128
G_AD_STB0# 127 128 G_AD6
129 130
G_AD_STB0 129 130 G_AD4
131 132
131 132
133 134
G_AD5 133 134 G_AD2
135 136
G_AD3 137 135 136 138 G_AD0 +3VRUN
G_AD1 137 138 G_C/BE#0
139 140
139 140

@ 10K_0402_5%
141 142

2
143 141 142 144 G_PAR
143 144

R150
G_AD_STB0 VSYNC 145 146 G_GNT#
<<10>> G_AD_STB0 145 146
G_AD_STB0# 147 148
<<10>> G_AD_STB0# 147 148 +1.5VRUN
G_AD_STB1 HSYNC 149 150
<<10>> G_AD_STB1 149 150
G_AD_STB1# 151 152 GC_BL_SUSPEND R157

1
<<10>> G_AD_STB1# 151 152 GC_BL_SUSPEND <<34>>
G_SB_STB VGA_RED 153 154 0_0402_5%~L
<<10>> G_SB_STB 153 154 +3VSUS
G_SB_STB# 155 156 STP_AGP_R# 1 2
<<10>> G_SB_STB# 155 156 STP_AGP# <<20>>
VGA_GRN 157 158
157 158
159 160
G_FRAME# VGA_BLU 159 160 M_SEN#
<<10>> G_FRAME# 161 162 M_SEN# <<17,33>>
G_DEVSEL# 161 162 DAT_DDC2
<<10>> G_DEVSEL# 163 164
G_IRDY# TV_Y 163 164 CLK_DDC2
<<10>> G_IRDY# 165 166
G_TRDY# 165 166
<<10>> G_TRDY# 167 168
G_STOP# TV_C 167 168 M_ID2#
<<10>> G_STOP# 169 170 M_ID2# <<17>>
G_PAR 169 170 SBAT_SMBDAT
<<10>> G_PAR 171 172 SBAT_SMBDAT <<35,43>>
G_REQ# T276 TV_CVBS 171 172 SBAT_SMBCLK
<<10>> G_REQ# 173 174 SBAT_SMBCLK <<35,43>>
G_GNT# PAD 173 174
<<10>> G_GNT# 175 176
G_PIPE# TVDAC4 175 176
<<10>> G_PIPE# 177 178 +3VRUN
177 178
179 180
ICH_SUS_STAT# 179 180
<<20>> ICH_SUS_STAT# 181 182 +1.5VRUN
181 182

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L
+5VSUS 183 184
183 184 +12V
TV_Y 185 186 FPVCC
<<17,33>> TV_Y 185 186 FPVCC <<35>>
187 188 +5VRUN 1 1 1 1 1 1
187 188
0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

C96
C104

C159
TV_C 189 190
<<17,33>> TV_C G_PWR_SRC 189 190 +3VRUN

C179

C492

C125
A 191 192 A
191 192
0.1U_0603_25V7M~L

0.1U_0603_25V7M~L

0.1U_0603_25V7M~L

0.1U_0603_25V7M~L

0.1U_0603_25V7M~L
0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L
TV_CVBS 193 194
<<17,33>> TV_CVBS 193 194 G_PWR_SRC 2 2 2 2 2 2

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L
1 1 2 2 2 2 195 196
195 196
C508

C506

C511

C186

C558

C494

197 198 1 2 1 1 1 1
197 198

C95
C505

C509

C556

C182

C498
199
199 200
200 +5VALW CLOSE
DAT_DDC2 201 202
<<17,33>> DAT_DDC2 CLK_DDC2 2 2 1 1 1 1 201 202 TO PIN
<<17,33>> CLK_DDC2 2 1 2 2 2 2
HSYNC FOX_QT00200A-6120L~L
<<17,33>> HSYNC
VSYNC Compal Electronics, Inc.
<<17,33>> VSYNC
VGA_RED Title
<<17,33>> VGA_RED VGA_GRN
<<17,33>> VGA_GRN VGA_BLU VGA Daughter Board
<<17,33>> VGA_BLU Size Document Number Rev
3.0
DELL CONFIDENTIAL/PROPRIETARY DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 16 of 59
5 4 3 2 1
 5 4 3 2 1

L3
1.8UH_MLF1608A1R8K_10%_0603~L
1 2 D70 D1 D2
<<16,33>> TV_C

82P_0402_50V8J~L

82P_0402_50V8J~L
@ DDA204U @ DDA204U @ DDA204U

1
75_0402_1%~L
CLOSE TO JTV1 1

1
1

C7
R3

C6
+3VRUN
2
2

3
JSVID
L2 2
1.8UH_MLF1608A1R8K_10%_0603~L SVIDEO_C 4
1 2 SVIDEO_CVBS 6
<<16,33>> TV_CVBS
7

82P_0402_50V8J~L

82P_0402_50V8J~L
75_0402_1%~L
D 5 D

1
1 1 SVIDEO_Y 3
1

R2

C4

C5
8
9
2 2

2
FOX_MH11777-WRUR6~L
+5VRUN

0.1U_0402_16V4Z~L
L1 Overlap L126 & L57 for Pop Option
1.8UH_MLF1608A1R8K_10%_0603~L
<<16,33>> TV_Y 1 2 2
82P_0402_50V8J~L

82P_0402_50V8J~L

C349
1
75_0402_1%~L

1 1 SPDIF_SHDN
SPDIF_SHDN <<23,34>>
L126
1
R1

C2

C3
1 2

1
2 2 3@ U39 @ BLM11A121S_0603
2

SN74AHCT1G125DCKR_SC70-5~L C290

OE#
P
0.01U_0402_16V7K~L L57 3@
SPDIF 2 4 SP_DIF 2 1 SP_DIFB 2 1 SP_DIF_C 4 5 SP_DIF_D
<<23>> SPDIF A Y

1
110_0603_1%~L
3@ R347 3@ 3@

G
220_0603_1%~L

R311
+5VRUN 3@ 1 8 SP_DIF_E

3
TA08F010_4P~D

0.1U_0402_16V4Z~L
1

2
2
C14

C354
300P_1808_3000V8K~L
2 @
1
C C

1
U40 D4 D5 D6
SN74AHCT1G125DCKR_SC70-5~L

OE#
P
@ DDA204U @ DDA204U @ DDA204U
SPDIF 2 4 SPDIF_DOCK
<<23>> SPDIF A Y SPDIF_DOCK <<33>>

1
G
+3VSUS

3
+5VRUN

CRT_VCC
L5

RB751V_SOD323~L
BLM11B600SB_0603~D

2
VGA_RED 1 2
<<16,33>> VGA_RED
L104

D3
BLM11B600SB_0603~D
VGA_GRN 1 2
<<16,33>> VGA_GRN
L105

1
BLM11B600SB_0603~D
VGA_BLU 1 2 +3VSUS
<<16,33>> VGA_BLU

0.01U_0402_16V7K~L
75_0402_1%~L

75_0402_1%~L

75_0402_1%~L

10K_0402_5%~L
22P_0402_50V8J

22P_0402_50V8J

22P_0402_50V8J

1 1 1
1

1
1
C17

C660

C289

C10 C11 C661

R303

R304
R14

10P_0402_50V8J~D 10P_0402_50V8J~D 10P_0402_50V8J~D

C9

R7
2

2 @ 2 @ 2 @
2
2

2
JVGA

B
12/19 6
B
@ @ @ 11
<<16,33>> M_SEN# RED 1
7 16
CRT_VCC DAT_DDC2 12 17
GREEN 2
8
JVGA_HS 13 18
02/06 BLUE 3 19
CRT_VCC 9
Item 100 JVGA_VS 14
M_ID2# 4
1

2
<<16>> M_ID2#
2.2K_0603_5%~L

2.2K_0603_5%~L
10
1K_0402_5%~L

1K_0402_5%~L

Evaluate Package 1 CLK_DDC2 15

R16

5
@

@
R6

R4

R5

C16
0.1U_0402_16V4Z~L FOX_DS01A91-WL37~L
2

<<16,33>> DAT_DDC2
<<16,33>> CLK_DDC2
L4
DDA204U BLM11A121S_0603~L
<<16,33>> HSYNC 1 2
L19
K1 A2 BLM11A121S_0603~L
<<16,33>> VSYNC 1 2
22P_0402_50V8J~L

22P_0402_50V8J~L

22P_0402_50V8J~L

22P_0402_50V8J~L

1 1 1 1
C15

C13

C12

C39

A1 K2
A 2 2 2 2 A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
TV_OUT and CRT
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 17 of 59
5 4 3 2 1
 5 4 3 2 1

+3VRUN Hub interface Layout:

Route signal with 5/15

8.2K_8P4R_1206_5%~L
trace/space,<< 8 inchs

1
1
2
3
4
R490 Signal must match +/- 0.1" of HL_STB/STB# signals.
RN118
8.2K_0402_5%~L U59A

<<27,29,31,32>> PCI_AD[0..31]
ICH4

2
8 CLKRUN# AB23 A20M# R491 2 1 0_0402_5%~L H_A20M#
7
6
5
A20M# H_A20M# <<7>>
PCI_DEVSEL# PCI_AD31 P4 W21 IGNNE# R488 2 1 0_0402_5%~L H_IGNNE#
AD31 IGNNE# H_IGNNE# <<7>>
PCI_STOP# PCI_AD30 D2 AA21 FERR# R485 2 1 56_0402_5%~D H_FERR#
AD30 FERR# H_FERR# <<7>>
PCI_TRDY# PCI_AD29 R1 V22 ICH4_INIT# R504 2 1 0_0402_5%~L H_INIT#
AD29 INIT# H_INIT# <<7>>
PCI_FRAME# PCI_AD28 D3 AB22 INTR R487 2 1 0_0402_5%~L H_INTR R749
H_INTR <<7>>

CPU INTERFACE
PCI_AD27 AD28 INTR NMI R492 0_0402_5%~L H_NMI 56_0603_5%~L
P2 V21 2 1 H_NMI <<7>>
+3VRUN PCI_AD26 AD27 NMI SMI# R502 0_0402_5%~L H_SMI# H_FERR#
E1 W23 2 1 H_SMI# <<7>> 2 1
PCI_AD25 AD26 SMI# STPCLK# R507 0_0402_5%~L H_STPCLK# +VCCP
P1 V23 2 1
H_STPCLK# <<7>>
AD25 STPCLK#
8.2K_8P4R_1206_5%~L

PCI_AD24 E2 U22 SIO_RCIN# R404

D SIO_RCIN# <<34>> D
1

PCI_AD23 AD24 RCIN# SIO_A20GATE 332_0603_1%~L

M5 Y22 SIO_A20GATE <<35>>
1
2
3
4

R277 PCI_AD22 E4 AD23 A20GATE Y23 CPUPWRGD R499 2 1 0_0402_5%~L H_PWRGOOD H_PWRGOOD 2 1
AD22 CPUPWRGD H_PWRGOOD <<7>>
RN117

8.2K_0402_5%~L PCI_AD21 N3 U21 CPUSLP# R495 2 1 0_0402_5%~L H_CPUSLP#

AD21 CPUSLP# H_CPUSLP# <<7>>
PCI_AD20 E3 U23 DPSLP# R512 2 1 0_0402_5%~L H_DPSLP#
AD20 DPSLP# H_DPSLP# <<7,11>>
PCI_AD19 N2
2

AD19 HUB_HL[0..10] <<10>>

PCI INTERFACE
PCI_GNTA# PCI_AD18 E5 L19 HUB_HL0
8
7
6
5

PCI_IRDY# PCI_AD17 AD18 HI0 HUB_HL1

N1 L20
PCI_AD16 F4 AD17 HI1 M19 HUB_HL2
PCI_SERR# PCI_AD15 AD16 HI2 HUB_HL3
F5 M21
PCI_PERR# PCI_AD14 AD15 HI3 HUB_HL4
L3 P19
PCI_AD13 AD14 HI4 HUB_HL5
H2 R19
+3VRUN PCI_AD12 L2 AD13 HI5 T20 HUB_HL6 +3VRUN
AD12 HI6

HUB LINK
PCI_AD11 G4 R20 HUB_HL7
AD11 HI7
8.2K_8P4R_1206_5%~L

PCI_AD10 L1 P23 HUB_HL8 C939 VCCHI

1

PCI_AD9 G2 AD10 HI8 L22 HUB_HL9 0.01U_0402_16V7K~L

AD9 HI9
1
2
3
4

R525 PCI_AD8 K2 N22 HUB_HL10 2 1 R246

8.2K_0402_5%~L PCI_AD7 J5 AD8 HI10 K21 @ 1K_0402_5%~L
AD7 HI11
RN6

PCI_AD6 H4 1 2
PCI_AD5 AD6 ICH_HITERM
J4 R22
2

PCI_PLOCK# PCI_AD4 AD5 HI_VSWING HUB_HLSTRB R247 RN119

G5 P21
8
7
6
5

HUB_HLSTRB <<10>>

1
2
3
4
PCI_REQ0# PCI_AD3 AD4 HI_STB#/HI_STBF HUB_HLSTRB# 36.5_0603_1%~L 10K_8P4R_1206_5%~L
K1 N20 HUB_HLSTRB# <<10>>
PCI_REQB# PCI_AD2 AD3 HI_STB/HI_STBS ICH_HICOMP
H3 R23 1 2
PCI_PIRQB# PCI_AD1 AD2 HICOMP
J3 M23
PCI_PIRQA# PCI_AD0 AD1 HIREF
H5 2 1
AD0

8
7
6
5
+3VRUN D5 PCI_PIRQA# C244
PIRQA# PCI_PIRQA# <<16>>
C2 PCI_PIRQB# 0.01U_0402_16V7K~L
PIRQB# PCI_PIRQB# <<16,31,32>>
8.2K_8P4R_1206_5%~L

PCI_C_BE3# N4 B4 PCI_PIRQC#
<<27,29,31,32>> PCI_C_BE3# PCI_PIRQC# <<27,29>>
1
2
3
4

PCI_C_BE2# C/BE3# PIRQC# PCI_PIRQD#

M4 A3

INTERRUPT INTERFACE
<<27,29,31,32>> PCI_C_BE2# C/BE2# PIRQD# PCI_PIRQD# <<29,31>>
RN121

PCI_C_BE1# K4 C8 ICH_GPIO2_PIRQE#
<<27,29,31,32>> PCI_C_BE1# C/BE1# PIRQE#/GPIO2
PCI_C_BE0# J2 D7 ICH_GPIO3_PIRQF#
<<27,29,31,32>> PCI_C_BE0# C/BE0# PIRQF#/GPIO3
C3 ICH_GPIO4_PIRQG#
R508 PIRQG#/GPIO4 ICH_GPIO5_PIRQH#
C4
8
7
6
5

PCI_PIRQD# @ 10K_0402_5% PIRQH#/GPIO5

PCI_PIRQC# 2 1
PCI_REQ2# +3VSUS ICH_PME#
<<34>> ICH_PME# W2
PME# +1.8VRUN
C +3VRUN C
AC2
<<27,29,31,34>> CLKRUN# CLKRUN#/GPIO24
J22 IRQ_SERIRQ
IRQ_SERIRQ <<29,34>>
10K_0402_5%~L

10K_0402_5%~L

10K_0402_5%~L
1

SERIRQ

1
R542

R301

R543

PCI_DEVSEL# M3 K20 H_PICD1 R254 2 1 10K_0402_5%~L

<<27,29,31,32>> PCI_DEVSEL# DEVSEL# APICD1
H19 H_PICD0 R262 2 1 10K_0402_5%~L R251
APICD0
PCI_FRAME# F1 J19 NC_ICH_APIC R258 2 1 0_0402_5%~L 150_0603_1%~L
2

<<27,29,31,32,33>> PCI_FRAME# FRAME# APICCLK

PCI_TRDY# F2

2
<<27,29,31,32>> PCI_TRDY# TRDY#
PCI_IRDY# L5
<<27,29,31,32,33>> PCI_IRDY# IRDY#
PCI_REQ4# PCI_STOP# F3 B1 PCI_REQ0# ICH_HITERM
+3VRUN <<27,29,31,32>> PCI_STOP# STOP# REQ0# PCI_REQ0# <<32>>
PCI_PAR G1 A2 PCI_REQ1# T223
<<27,29,31,32>> PCI_PAR PAR REQ1# PCI_REQ1# <<29>>
PCI_REQ1# PCI_PERR# L4 B3 PCI_REQ2# PAD
<<27,29,31,32>> PCI_PERR#

1
PERR# REQ2# C7 PCI_REQ3#
REQ3# PCI_REQ3# <<31>> 2
PCI_REQ3# PCI_PLOCK# M2 B6 PCI_REQ4# R249 C238
<<32>> PCI_PLOCK# PLOCK# REQ4# PCI_REQ4# <<27>>
PCI_SERR# K5
<<27,29,31,32>> PCI_SERR#
2

SERR# 150_0603_1%~L 0.01U_0402_25V7K~L

+3VRUN R546 1

2
10K_0402_5%~L
10K_0402_5%~L

PCI_PCIRST# U5 C1 PCI_GNT0#
PCI_GNT0# <<32,33>>
10K_0402_5%~L

10K_0402_5%~L
1

PCIRST# GNT0# PCI_GNT1# T224

E6 PCI_GNT1# <<29>> Place near ICH
1

GNT1#
R471

A7 PCI_GNT2# PAD
GNT2#
R259

R469

ICH4_PINB5 B5 B7 PCI_GNT3#
REQA#/GPIO0 GNT3# PCI_GNT3# <<31>>
PCI_REQB# A6 D6 PCI_GNT4#
<<29>> PCI_REQB# REQB#/REQ5#/GPIO1 GNT4# PCI_GNT4# <<27>>
PCI_GNTA# E8
2

PCI_GNTB# GNTA#/GPIO16
C5
<<29>> PCI_GNTB# CK_33M_ICHPCI GNTB#/GNT5#/GPIO17
<<6>> CK_33M_ICHPCI P5
IDE_IRQ15 PCICLK
IDE_IRQ15 <<19,22>>
IDE_IRQ14
IDE_IRQ14 <<19>>
IRQ_SERIRQ
IRQ_SERIRQ <<29,34>>
FW82801DBM_BGA421_ADQ00~L
2

R250
@ 10_0402_5% +3VRUN
B
C213 B
0.1U_0402_16V4Z~L
1

+3VSUS 2 1 330_0603_5%~L
1
CLK_ICH_TERM
14

Level shifter
R544

U25A R559
PCI_PCIRST# 1 74VHC08MTC_TSSOP14~L 33_0402_5%~L
P

IN1 PCIRSTB1# PCIRST_1#

3 1 2
2

OUT PCIRST_1# <<11,27>>

2 H_PROCHOT_SIO#
H_PROCHOT_SIO# <<35>>
G

IN2 R769
33_0402_5%~L R547
7

1 2 PCIRST_AGP# 56_0402_5%~L
PCIRST_AGP# <<16>>
2 PROCHOT_SFTON 1 2 +VCCP
Q72
1

C241 MMBT3904_SOT23~L R745

3

U25B R558 @ 8.2P_0402_50V8J 56_0603_5%~L

4 74VHC08MTC_TSSOP14~L 33_0402_5%~L 1 2 +VCCP
2

IN1 PCIRSTB2# PCIRST_SIO#

6 1 2
OUT PCIRST_SIO# <<34>>
5
IN2 H_PROCHOT#
H_PROCHOT# <<7>>

U25C R560
9 74VHC08MTC_TSSOP14~L 33_0402_5%~L
IN1 PCIRSTB3# PCIRST_DOCK#
8 1 2 PCIRST_DOCK# <<32>>
OUT
10
IN2

U25D R561
12 74VHC08MTC_TSSOP14~L 33_0402_5%~L
IN1 PCIRSTB4# PCIRST_2#
11 1 2 PCIRST_2# <<29,31>>
OUT
13
IN2

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
ICH4(1/4)
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 18 of 59
5 4 3 2 1
 5 4 3 2 1

JHDD
+3VSUS IDE_RST_HDD_5V
<<20>> IDE_RST_HDD_5V IDE_PDD7 1 2 IDE_PDD8
IDE_PDD6 3 4 IDE_PDD9
IDE_PDD5 5 6 IDE_PDD10
IDE_PDD4 7 8 IDE_PDD11
IDE_PDD3 9 10 IDE_PDD12
11 12

10K_0402_5%~L

0_0402_5%~L
6.8K_0603_5%~L

6.8K_0603_5%~L
IDE_PDD2 IDE_PDD13
13 14

1
0_0402_5%~L
IDE_PDD1 IDE_PDD14
+5VHDD 15 16

R503

R245

R475

R501

R483
IDE_PDD0 IDE_PDD15
17 18
RPDDREQ 19 20
IDE_PDIOW# 21 22 R257

2
23 24

1
IDE_PDIOR# 470_0603_5%~L
U59B IDE_PDIORDY 25 26 IDE_CSEL_PRI 2 1
D R537 IDE_PDDACK# 27 28 D

<<6,14,15,31>> ICH_SMBDATA
ICH_SMBDATA
ICH_SMBCLK
AB4
AC4 SMBDATA ICH4 PDCS1#
Y13
AB14
IDE_PDCS1#
IDE_PDCS3#
1K_0402_5%~D IDE_IRQ14
IDE_PDA1
29
31
30
32 ATA_66_PRI/PDIAG
T32
PAD

2
<<6,14,15,31>> ICH_SMBCLK USB2P0_SMI# SMBCLK PDCS3# IDE_PDA0 33 34 IDE_PDA2
AA5
RTC_ICH R216 SMBALERT#/GPIO11 IDE_PDA2 IDE_PDCS1# 35 36 IDE_PDCS3#
W13
PDA2 37 38

SM INTERFACE
100K_0402_5%~D AB13 IDE_PDA1 PIDEACT#
ICH_THERM_PWRDN# PDA1 IDE_PDA0 <<39>> PIDEACT# 39 40
1 2 W6 AA13
R486 INTRUDER# PDA0 +5VHDD 41 42 +5VHDD
43 44

4.7U_1206_16V6K~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L
+3VSUS 4.7K_0402_5%~L Y11 IDE_PDD15
<<38>> ICH_THERM_PWRDN# PDD15
2 1 ICH_SMLINK0 AC3 W11 IDE_PDD14 MH1
SMLINK0 PDD14 IDE_PDD13 MH1
W10 MH2 1 2 2
PDD13 MH2

C630

C632

C637
2 1 ICH_SMLINK1 AB1 AB10 IDE_PDD12 MH3
R496 SMLINK1 PDD12 W9 IDE_PDD11 MH3 MH4
PDD11 MH4

@
4.7K_0402_5%~L AC9 IDE_PDD10
+3VRUN PDD10 IDE_PDD9 FOX_HH99227-S1~L 2 1 1
<<34>> LPC_LAD[0..3] Y9
PDD9 AB9 IDE_PDD8

IDE INTERFACE
PDD8

LPC INTERFACE
R513 LPC_LAD0 T2 AA8 IDE_PDD7
LAD0/FWH0 PDD7
@

10K_0402_5% LPC_LAD1 R4 Y8 IDE_PDD6

LPC_LDRQ0# LPC_LAD2 LAD1/FWH1 PDD6 IDE_PDD5
1 2 T4 AB8
LPC_LAD3 LAD2/FWH2 PDD5 IDE_PDD4
U2 AA7
R516 LAD3/FWH3 PDD4 IDE_PDD3
AA10
PDD3
@

10K_0402_5% LPC_LFRAME# T5 Y10 IDE_PDD2

1 2 LPC_LDRQ1#
<<34>> LPC_LFRAME# LFRAME#/FWH4 PDD2 AC11 IDE_PDD1 Top View
LPC_LDRQ0# PDD1 IDE_PDD0
U3 AB11
<<35>> LPC_LDRQ0# LPC_LDRQ1# LDRQ0# PDD0
U4
<<34>> LPC_LDRQ1# LDRQ1#
SPKR H23 Y12 IDE_PDDACK#
<<24>> SPKR SPKR PDDACK# IDE_PDDREQ
AA11
USBRBIAS PDDREQ IDE_PDIOR#
2 1 A23 AC12
B23 USBRBIAS PDIOR# W12 IDE_PDIOW#
Note: R540 USBRBIAS# PDIOW# IDE_PDIORDY 2
AB12
R540=22.6_1% for B0(QB63 part) 22.6_0603_1%~L PIORDY
C C
USBP0+ C20 AA19 IDE_IRQ15 1
<<25>> USBP0+ USBP0P IRQ15 IDE_IRQ15 <<18,22>>

USB INTERFACE
USBP0- D20 AC13 IDE_IRQ14
<<25>> USBP0- USBP0N IRQ14 IDE_IRQ14 <<18>>
USBP1+ A21
<<25>> USBP1+ USBP1P
USBP1- B21
<<25>> USBP1- USBP1N
USBP2+ C18 AB21 IDE_SDCS1#
<<25>> USBP2+
USBP2- D18
USBP2P SDCS1#
AC22 IDE_SDCS3#
IDE_SDCS1# <<22>> 44
<<25>> USBP2- USBP2N SDCS3# IDE_SDCS3# <<22>>
USBP3+ A19
<<25>> USBP3+
USBP3- B19
USBP3P
AC21 IDE_SDA2
IDE_SDA[0..2] <<22>> 43
<<25>> USBP3- USBP3N SDA2
USBP4+ C16 AC20 IDE_SDA1
<<22>> USB_OC4# <<25>> USBP4+ USBP4P SDA1
USBP4- D16 AA20 IDE_SDA0
<<25>> USB_OC3# <<25>> USBP4- USBP4N SDA0
USBP5+ A17
<<25>> USB_OC2# <<25>> USBP5+ USBP5P
USBP5- B17
<<25>> USB_OC0# <<25>> USBP5- USBP5N IDE_SDD[0..15] <<22>>
Y17 IDE_SDD15
SDD15 IDE_SDD14
AA17
RN120 SDD14 IDE_SDD13
Y16
10K_8P4R_1206_5%~L SDD13
AB16 IDE_SDD12 HH99
SDD12 Y15 IDE_SDD11
USB_OC0# SDD11 IDE_SDD10
+5VSUS
5 4 B15 AA15
USB_OC1# OC0# SDD10 IDE_SDD9
6 3 C14 AC15
USB_OC2# OC1# SDD9 IDE_SDD8 +3VRUN
7 2 A15 Y14
USB_OC3# OC2# SDD8 IDE_SDD7 R470
USB_OC IS 5V 8 1 B14
OC3# SDD7
AA14
R296 USB_OC4# A14 W14 IDE_SDD6 4.7K_0402_5%~L
TOLERANT 2 1 10K_0402_5%~L D14 OC4# SDD6 AB15 IDE_SDD5 IDE_PDIORDY 2 1
R538 10K_0402_5%~L USB_OC5# OC5# SDD5 IDE_SDD4
2 1 W15
SDD4 IDE_SDD3 R472
AC16
ICH_RTCRST# SDD3 IDE_SDD2 4.7K_0402_5%~L
<<21>> RTC_RST 1 2 W7 W16
R227 R225 RTCRST# SDD2 IDE_SDD1 IDE_SDIORDY
AB17 2 1
8.2K_0603_5%~L 10M_0603_5%~L SDD1 IDE_SDD0
W17
ICH_VBIAS SDD0 R233
1 2
<<21>> ICH_VBIAS 0_0402_5%~L
CMOS_CLR C586 AB19 IDE_SDDACK# IDE_PDDREQ 1 2 RPDDREQ
B SDDACK# IDE_SDDACK# <<22>> B
SHORT PADS 12P_0603_50V8J~D AB18 IDE_SDDREQ
ICH_RTCX1 SDDREQ IDE_SDIOR# R474
2 1 AC7 Y18 IDE_SDIOR# <<22>>
RTCX1 SDIOR# IDE_SDIOW# 0_0402_5%~L
AA18 IDE_SDIOW# <<22>>
SDIOW#
10M_0603_5%~L

X5 AC19 IDE_SDIORDY IDE_SDDREQ 1 2 RSDDREQ

SIORDY IDE_SDIORDY <<22>> RSDDREQ <<22>>
1

1 2 32.768KHZ_12.5P_MC-306~L
1 2

33P_0603_50V8J~L

33P_0603_50V8J~L
R467

Package
2

9.6X4.06 mm 2 2
C13 ICH_AC_RST_R# 2 1
AC_RST# ICH_AC_RST# <<23,26>>
1

C222

C587
R300 33_0402_5%~L
2

C581 C9 ICH_AC_SYNC_R 2 1
AC_SYNC ICH_AC_SYNC <<23,26>> 1 1
AC LINK

C220 12P_0603_50V8J~D R298 33_0402_5%~L

2.2U_0805_16VFZ~L 2 1 ICH_RTCX2 AC6
RTCX2 ICH_AC_SDOUT_R
1 2 D9 2 1 ICH_AC_SDOUT <<23,26>>
AC_SDOUT R299 33_0402_5%~L
01/07
D13 ICH_AC_SDIN0
Item 92 AC_SDIN0 ICH_AC_SDIN0 <<23>>
CK_14M_ICH J23 R302
<<6>> CK_14M_ICH CLK14

@
A13 ICH_AC_SDIN1 1K_0402_5%
AC_SDIN1 ICH_AC_SDIN1 <<26>>
ICH_AC_SDOUT 1 2 +3VRUN
CK_48M_ICH F19 B13
<<6>> CK_48M_ICH CLK48 AC_SDIN2 ICH_AC_BITCLK
B8 ICH_AC_BITCLK <<23>>
CK_66M_ICH AC_BIT_CLK ICH_AC_SDIN0
<<6>> CK_66M_ICH T21
CLK66
2
2

2
@10_0402_5%

@10_0402_5%

@10_0402_5%

R294 ICH_AC_SDIN1

@ 10K_0402_5%

@ 10K_0402_5%

@ 10K_0402_5%
@

FW82801DBM_BGA421_ADQ00~L 10_0402_5%

1
R260

R265

R248

R539

R295

R293
1
CK_14M_ICH_TERM 1

CK_48M_ICH_TERM 1

ICH_AC_BITCLK_TERM
CK_66M_ICH_TERM

2
A A
@ 4.7P_0402_50V8C

@ 4.7P_0402_50V8C

DELL CONFIDENTIAL/PROPRIETARY
@10P_0402_50V8J

Compal Electronics, Inc.

2

2
C257

C270

C233

C283 Title
10P_0402_50V8J
ICH4(2/4)
1

Size Document Number Rev

3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 19 of 59
5 4 3 2 1
 5 4 3 2 1

+3VSUS +3VRUN

10K_0402_5%~L

10K_0402_5%~L

10K_0402_5%~L

10K_0402_5%~L
1

1
U59C R751

R132

R476
0_0603_5%~L

R239

R493
+3VSUS Y5 LAN_RST# 1 2

U26 ICH4 LAN_RST#

2
@ TC7SH86FU_SSOP5 A10
LAN_RXD0

5
B10
LAN_TXD0

PM INTERFACE
CBS_RI# 1 A9
<<29>> CBS_RI# LAN_RXD1
4 ICH_RI# Y1 C10
D RI0# RI# LAN_TXD1 D
<<34,37>> RI0# 2 A11
LAN_RXD2

LAN INTERFACE
ICH_BATLOW# AB2 A12
BATLOW#/TP0 LAN_TXD2

3
SIO_THRM# V1 B11
<<34>> SIO_THRM# THRM# LAN_RSTSYNC
+3VRUN +VCCP +3VRUN C11 +3VRUN
LAN_CLK

10K_0402_5%~L

10K_0402_5%~L
R541

1
1K_0402_5%
D11 NC_EE_DIN PAD T42 @ 1K_0402_5%
EE_DIN

R241

R744

R750
G_AGPBUSY# R2 A8 NC_EE_DOUT 2 1
<<16>> G_AGPBUSY# AGPBUSY#/GPIO6 EE_DOUT
D10 NC_EE_CS PAD T43
10/18
STP_AGP# EE_CS NC_EE_SHCLK PAD T44
<<16>> STP_AGP#
T3 C12
C3_STAT#/GPIO21 EE_SHCLK R627
1

2
GMUXSEL J21 10K_0402_5%~D
@ SSMUXSEL/GPIO23
H_CPUPERF# Y20
CPUPERF#/GPIO22
H_STP_CPU# W19 R3 SB_GPIO7
<<6,47>> H_STP_CPU# STP_CPU#/GPIO20 GPIO7
H_STP_PCI# Y21 V4 SIO_EXT_SMI#
<<6>> H_STP_PCI# STP_PCI#/GPIO18 GPIO8 SIO_EXT_SMI# <<34>>
V5 SIO_EXT_RTE#
GPIO12 SIO_EXT_RTE# <<34>>
DPRSLPVR V20
<<47>> DPRSLPVR DPRSLPVR SIO_EXT_SCI#
W3 SIO_EXT_SCI# <<34>>
GPIO13
100K_0402_5%~D

SLP_S1_G# W18
1

SLP_S1#/GPIO19 V2 IEEE1394_PWREN PAD T277

GPIO25 +3VRUN 12/20 Item 86
R460

SIO_SLP_S3# Y4 01/20 Item 94

<<34>> SIO_SLP_S3# SLP_S3#

10K_0402_5%~L

10K_0402_5%~L

10K_0402_5%~L

10K_0402_5%~L
W1 NC_ICH_GPIO27 PAD T244 02/17 Item 104
GPIO27

2
Y2 03/18 Item 114
SLP_S4# W4 NC_ICH_GPIO28 PAD T225
05/29, Item 123 05/29 Item 124
2

GPIO28

R286

R278

R280

R266
SIO_SLP_S5# AA2 06/13 Item 126
<<34>> SIO_SLP_S5# SLP_S5# ICH_USB_ACT# PAD T211
J20 07/29 Item 133
C GPIO32 C
01/07 Item 148

1
G22 ICH_GPIO33 PAD T212
ICH_PWRGD GPIO33 @ @ @

GPIO
<<38>> ICH_PWRGD AB6
PWROK BID0 R287
F20 1 2 10K_0402_5%~L
ICH_VGATE GPIO34
<<38>> ICH_VGATE V19
VGATE/VRMPWRGD
G20 BID1 R279 1 2 10K_0402_5%~L
+3VSUS +VCCP GPIO35 @
ICH_SUS_STAT# AB3 F21 BID2 R281 1 2 10K_0402_5%~L
<<16>> ICH_SUS_STAT# T155 SUS_STAT#/LPCPD# GPIO36
PAD ICH_SUSCLK AA4 H20 BID3 R267 1 2 10K_0402_5%~L
SUSCLK GPIO37
10K_0402_5%~L
2

2
56_0402_5%~L

SIO_PWRBTN# AA1 F23 ICH_GPIO38 PAD T213

<<34>> SIO_PWRBTN# PWRBTN# GPIO38
R505

R237

H22 ICH_GPIO39 PAD T214

SUSPWROK GPIO39
<<38,44>> SUSPWROK AA6
RSMRST#
G23 ICH_GPIO40 PAD T215
1

GPIO40
Y3 H21 ICH_GPIO41 PAD T216
SYS_RESET# GPIO41
R238 F22 ICH_GPIO42 PAD T217
56_0402_5%~D GPIO42
1 2 THRMTRIP# W20 E23 ICH_GPIO43 PAD T218
<<7,38>> H_THERMTRIP# THRMTRIP# GPIO43
R213
100K_0402_5%~D

100K_0402_5%~D

0.1U_0402_10V6K~D

@ 0_0402_5%~L
1

1 1 2
R242

R243

FW82801DBM_BGA421_ADQ00~L
C46

+3VSUS
2
2

1
B B
C214
0.047U_0402_16V4M~L
2

+5VHDD
U24

5
TC7SH08FU_SSOP5~L
2

SLP_S1_G# 1

P
IN1 ICH_SLP_S1#
4 ICH_SLP_S1# <<6>>
SIO_SLP_S3# O
2

G
R523 R518 IN2
0_0402_5%~L @ 1K_0603_5%
1

3
1 2

IDE_RST_HDD 3 1 IDE_RST_HDD_5V
<<34>> IDE_RST_HDD IDE_RST_HDD_5V <<19>>
Q65
@ MMBT3904_SOT23
BID3 BID2 BID1 BID0 REV
2

R529
@ 10K_0402_5% +5VMOD
1 2 IDE_RST_MOD_SFTON
+3VRUN
2

0 0 0 0 X00
R511 R515
0_0402_5%~L @ 1K_0603_5%
0 0 0 1 X01
1

1 2

A IDE_RST_MOD 3 1 A
<<34>> IDE_RST_MOD
Q64
IDE_RST_MOD_5V <<22>>
0 0 1 0 A00
@ MMBT3904_SOT23
2

R500
@ 10K_0402_5%
1 2 IDE_RST_MOD_SFTON
0 0 1 1 A01 DELL CONFIDENTIAL/PROPRIETARY
+3VRUN
Compal Electronics, Inc.
0 1 0 0 A02 Title
ICH4(3/4)
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 20 of 59
5 4 3 2 1
 5 4 3 2 1

+1.5VRUN +3VRUN

C585 @ C617 @
150U _D2_6.3VM~D 10U_1206_6.3V7K~L
U59D

+
1 2 1 2
ICH_VBIAS Y6 B12
<<19>> ICH_VBIAS VBIAS VSS_20
B16
VSS_21 C582 C624 @
B18
E12 VSS_22 B20 10U_1206_6.3V7K~L 10U_1206_6.3V7K~L
+1.5VSUS
E13
E20
VCCSUS1_5_1
VCCSUS1_5_2
VCCSUS1_5_3
ICH4 VSS_23
VSS_24
VSS_25
B22
B9
1 2 1 2

F14 C15
G18 VCCSUS1_5_4 VSS_26 C17 C583 C631 @
D VCCSUS1_5_5 VSS_27 10U_1206_6.3V7K~L 10U_1206_6.3V7K~L D
R6 C19
VCCSUS1_5_6 VSS_28
T6 C21 1 2 1 2
+5VRUN +3VRUN
U6 VCCSUS1_5_7 VSS_29 C23
VCCSUS1_5_8 VSS_30
C6
VSS_31 C252 C665
D1

2
E11 VSS_32 D12 0.047U_0402_16V4M~L 0.047U_0402_16V4M~L
R256 D16 +3VSUS VCCSUS3_3_1 VSS_33
F10 D15 2 1 1 2
VCCSUS3_3_2 VSS_34
F15 D17
1K_0402_5%~L RB751V_SOD323~L VCCSUS3_3_3 VSS_35
F16 D19
VCCSUS3_3_4 VSS_36 C231 C227
F17 D21
1

1
VCCSUS3_3_5 VSS_37 0.047U_0402_16V4M~L 0.047U_0402_16V4M~L
F18 D23
ICH_V5REF_RUN VCCSUS3_3_6 VSS_38
K14 D4 2 1 1 2
V7 VCCSUS3_3_7 VSS_39 D8
2 2 VCCSUS3_3_8 VSS_40

2
C254 C260 C916 V8 D22
1U_0805_10V6K~L 0.1U_0402_16V4Z~L 0.1U_0402_16V4Z~L VCCSUS3_3_9 VSS_41 C236 C235 @
V9 E10
VCCSUS3_3_10 VSS_42 E14 0.047U_0402_16V4M~L 0.047U_0402_16V4M~L
@

1
1 1 VSS_43
F6 E16 2 1 1 2
+5VSUS +3VSUS +1.5VSUS VCCLAN1_5_1/VCCSUS1_5_9 VSS_44
F7 E17
VCCLAN1_5_2/VCCSUS1_5_10 VSS_45
+3VSUS E9 E18
VCCLAN3_3_1/VCCSUS3_3_11 VSS_46 C251 C242
F9 E19
VCCLAN3_3_2/VCCSUS3_3_12 VSS_47
2

E21 0.047U_0402_16V4M~L 0.047U_0402_16V4M~L

R297 D28 VSS_48
E22 2 1 1 2
1K_0402_5%~L RB751V_SOD323~L VSS_49 F8
VSS_50
E7 G19
V5REF_1 VSS_51 C229 C250
V6 G21
1

ICH_V5REF_SUS E15 V5REF_2 VSS_52 G3 0.047U_0402_16V4M~L 0.047U_0402_16V4M~L

POWER & GND

V5REF_SUS VSS_53
2 2 G6 2 1 1 2
VSS_54
2

C285 C284 C917 H1

1U_0805_10V6K~L 0.1U_0402_16V4Z~L 0.1U_0402_16V4Z~L VSS_55
+VCCP AA23 J6
P14 V_CPU_IO_1 VSS_56 K11 C232 C255 @
@
1

1 1 L78 V_CPU_IO_2 VSS_57 0.047U_0402_16V4M~L 0.047U_0402_16V4M~L

U18 K13
BLM11A601S_0603~L V_CPU_IO_3 VSS_58
K19 2 1 1 2
C 1 2 ICH4_VCCPLL C22 VSS_59 K23 C
depop when +1.5VRUN VCCPLL VSS_60

0.01U_0402_16V7K~D
K3
Bridge_battery +1.5VRUN VSS_61
0.1U_0402_16V4Z~L
L10 C277
K10 VSS_62 L11 0.047U_0402_16V4M~L
installed 2 1 VCC1_5_1 VSS_63
K12 L12 1 2
+3.3VRTC VCC1_5_2 VSS_64
C621

C937 K18 L13

VCC1_5_3 VSS_65
K22 L14
1 2 P10 VCC1_5_4 VSS_66 L21 C253
VCC1_5_5 VSS_67 0.047U_0402_16V4M~L
T18 M1
R801 4@ R802 4@ VCCHI VCC1_5_6 VSS_68
U19 M11 1 2
D76 200_0603_5%~L 200_0603_5%~L V14 VCC1_5_7 VSS_69 M12
COINBAT_CHG COINBAT_CHGA VCC1_5_8 VSS_70
1 2 1 2 1 2 M13
4@ VSS_71
L23 M20
L43 M14 VCCHI_1 VSS_72 M22 +3VSUS +1.5VSUS
RB751V_SOD323~L BLM21PG600SN1D_0805~L VCCHI_2 VSS_73
P18 N10
VCCHI_3 VSS_74 C264 C234
1 2 T22 N11
+1.8VRUN VCCHI_4 VSS_75 0.047U_0402_16V4M~L 0.047U_0402_16V4M~L
N12
BATT1 VCC_RTC AB5 VSS_76 N13 1 2 1 2
coin battery VCCRTC VSS_77
VSS_78
N14
1U_0603_6.3V6M~L

1 2 +3VRUN N19
source and 1 A5
VCC3_3_1
VSS_79
VSS_80
N21 C266 C265
C217

AC17 N23 0.047U_0402_16V4M~L 0.047U_0402_16V4M~L

VCC3_3_2 VSS_81
ML1220T13RE its charge +3VSUS 2
AC8
B2 VCC3_3_3
VCC3_3_4
VSS_82
VSS_83
N5
P11
1 2 1 2

4@ H18 P13
circuit D15
H6
J1
VCC3_3_5
VCC3_3_6
VSS_84
VSS_85
P20
P22
C226
0.047U_0402_16V4M~L
C263
0.047U_0402_16V4M~L
VCC3_3_7 VSS_86
J18 P3 1 2 1 2
VCC3_3_8 VSS_87
K6 R18
RTC_RST VCC3_3_9 VSS_88
2 3 M10 R21
<<19>> RTC_RST VCC3_3_10 VSS_89 C267 C666
P12 R5
VCC3_3_11 VSS_90 0.047U_0402_16V4M~L 0.047U_0402_16V4M~L
P6 T1
B VCC3_3_12 VSS_91 B
U1 T19 1 2 1 2
D14 BAT54C_SOT23~L VCC3_3_13 VSS_92
V10 T23
1

R803 4@ RTC_ICH RB751V_SOD323~L R218 C938 VCC3_3_14 VSS_93

V16 U20
0_0402_5%~L 1K_0402_5%~L 0.1U_0402_16V4Z~L VCC3_3_15 VSS_94 C638 @ C667 @
V18 V15
RTC_OUT VCC3_3_16 VSS_95
1 2 RTC_ICH 2 1 1 2 2 1 V17 10U_1206_6.3V7K~L 0.047U_0402_16V4M~L
VSS_96 V3 1 2 1 2
VSS_97
1

W22
R226 VSS_98
A1 W5
+3.3VRTC @ 22M_0603_5% A16 VSS_1 VSS_99 W8 C258 @
R215 C218 VSS_2 VSS_100 10U_1206_6.3V7K~L
A18 Y19
R804 1K_0402_5%~L 0.047U_0603_25V7M~L VSS_3 VSS_101
A20 Y7 1 2
2

Z2101 1 ICH_VBIAS VSS_4 VSS_102

1 2 1 2 2 A22
VSS_5 VCCHI
A4
3@ 0_0402_5%~L VSS_6 +VCCP
AA12
C221 @ VSS_7 C246
AA16
2200P_0603_50V7K AA22 VSS_8 10U_1206_6.3V7K~L
VSS_9
1

1 2 AA3 1 2 C237 @
VCCHI R224 VSS_10 0.047U_0402_16V4M~L
2 AA9
@ 2.4M_0603_1% VSS_11
AB20 1 2
C216 VSS_12 C240 @
AB7
C228 1U_0805_10V6K~L VSS_13 0.047U_0402_16V4M~L
AC1
2

0.047U_0402_16V4M~L 1 VSS_14 C230 @

AC10 1 2
VSS_15 0.047U_0402_16V4M~L
1 2 AC14
VSS_16
AC18 1 2
VSS_17 C256 @
AC23
C247 VSS_18 0.047U_0402_16V4M~L
AC5
0.047U_0402_16V4M~L VSS_19 C225
1 2
1 2 FW82801DBM_BGA421_ADQ00~L 0.047U_0402_16V4M~L
RTC source pop 1 2

option(backward C239 @
0.047U_0402_16V4M~L
A
compatible) 1 2
BAT54C
A

C243 @
0.047U_0402_16V4M~L K2 K1
1 2
1 DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
A2
2 3 A1 Title
ICH4(4/4)
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 21 of 59
5 4 3 2 1
 5 4 3 2 1

<<19>> IDE_SDD[0..15]

IDE_SDD0
IDE_SDD1
IDE_SDD2 +5VMOD
IDE_SDD3
IDE_SDD4 JMOD1

71

69

72
IDE_SDD5
IDE_SDD6

G
M1
IDE_SDD7
IDE_SDD8 1
IDE_SDD9 1
2
2

4.7U_1206_16V6K~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L
IDE_SDD10 3
D IDE_SDD11 3 D
4 1 1 1 1
IDE_SDD12 4
5
5

C69

C73

C74

C72
IDE_SDD13 6
IDE_SDD14 6
7
IDE_SDD15 7 2 2 2 2
8
8 9
9
<<19>> IDE_SDA[0..2] 10
10
11
IDE_SDA0 11
12
IDE_SDA1 12 SATA_DET#
13 SATA_DET# <<34>>
IDE_SDA2 13
14
14 MOD_PIN15
15 1 R54 2 USB_OC4#
USB_OC4# <<19>>
IDE_SDCS1# 16 15
<<19>> IDE_SDCS1# 16
IDE_SDCS3# 17 @ 0_0402_5%
<<19>> IDE_SDCS3# 17
18
18 19 USBP4_D+
19 USBP4_D+ <<25>>
IDE_SDDACK# 20
<<19>> IDE_SDDACK# 20 USBP4_D-
21 USBP4_D- <<25>>
IDE_SDIOR# 21
<<19>> IDE_SDIOR# 22
IDE_SDIOW# 22
<<19>> IDE_SDIOW# 23
IDE_SDIORDY 23
24
<<19>> IDE_SDIORDY 24
25
IDE_SDCS3# 26 25
26 IDE_SDCS1#
27
IDE_SDA2 27
28
INT_CD_R 28 29
<<23>> INT_CD_R IDE_SDA0 29
30
30
31
INT_CD_L IDE_SDA1 31
<<23>> INT_CD_L 32
32 33 IDE_IRQ15
33
34
34 IDE_SDDACK#
35
C IDE_IRQ15 CSEL2 36 35 C
<<18,19>> IDE_IRQ15 36 IDE_SDIORDY
37
IDE_SDIOR# 37
38
38
470_0603_5%~L

BAY_MODPRES# 39
<<34>> BAY_MODPRES# 39
2

IDE_SDIOW# 40
40 RSDDREQ
41
41
R75

RSDDREQ IDE_SDD15 42
<<19>> RSDDREQ 42 43 IDE_SDD0
43
44
1
1

IDE_SDIORDY 44 IDE_SDD14
45
<<19>> IDE_SDIORDY IDE_SDD1 45
46
46 IDE_SDD13
47
IDE_SDD2 47
48
48 49
IDE_SDD12 49
50
50 IDE_SDD3
51
IDE_SDD11 52
51 2
52 53 IDE_SDD4
53
54
54 IDE_SDD10
55
IDE_SDD5 55
56
56
57 IDE_SDD9 3
IDE_SDD6 57
58
58 59
R102 IDE_SDD8 60
59 6
0_0402_5%~L 60
61 IDE_SDD7 4
IDE_RST_MOD_5V MOD_RST 61
<<20>> IDE_RST_MOD_5V 1 2 62
62
63
USB_IDE# 63
<<34>> USB_IDE#
64
64 INT_CD_R
65
R105 CD_AUDIORET 66 65 INT_CD_R <<23>> 5
<<23>> CD_AUDIORET 66
100K_0402_5%~L 67 INT_CD_L
67 INT_CD_L <<23>>

WF1F068N1A
B 1 2 1 2 BAY_MODPRES# 68 B
+3VALW +3VALW 68

47P_0402_50V8J~L
47P_0402_50V8J~L
R111
M2
G

100K_0402_5%~L 1 1

C108
C693 R629 R630
73

70

74

C97
JAE_WM1F068N1A~L 10K_0402_5%~D 10K_0402_5%~D
@ 0.1U_0402_16V4Z~D @ @
2 2

10/18

TOP VIEW

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
DVD MODULE
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 22 of 59
5 4 3 2 1
 5 4 3 2 1

VDDA
+5VSUS
U62 VDDA=4.75V
1 5
IN OUT

102K_0603_1%~D
0.01U_0402_16V7K~L
0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

2.2U_0805_16VFZ~L
1U_0805_10V6K~L
2
GND

R792
1 1 2 1 1

C651

C647

C643

C648

C649
AUDIO_AVDD_ON 3 4 TPS793475_BYPASS @
<<35>> AUDIO_AVDD_ON EN BYPASS

0.1U_0402_16V4Z~L
TPS793475DBVR_SOT23-5~L
2 2 1 2 2

280K_0603_0.1%~D
1

C645

R793
D D
2 @

+3VRUN L79
BLM31A260SPT_1206~L
W=30 mil AUDIO_AVCC 1 2 VDDA

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

2.2U_0805_16VFZ~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L
2 2 2 2 2

C281

C282

C280

C646

C641
1 1 1 1 1

25
38
1
9
U60

DVDD1
DVDD2

AVDD1
AVDD2
ICH_AC_RST# 11 23
<<19,26>> ICH_AC_RST# RESET# LINE_IN_L
R763 ICH_AC_SYNC 10
<<19,26>> ICH_AC_SYNC SYNC
33_0402_5%~L ICH_AC_SDOUT 5
<<19,26>> ICH_AC_SDOUT SDATA_OUT
<<19>> ICH_AC_BITCLK
1 2 24
R284 LINE_IN_R C635 1U_0805_10V6K~L
06/18/2003 Item 130 49.9_0402_1%~L 18 CD_L 1 2
CD_L INT_CD_L <<22>>
1 2 R_ICH_AC_BITCLK 6
<<26>> MDC_AC_BITCLK BIT_CLK C639 1U_0805_10V6K~L
R285 19 CD_COMM 1 2 CD_AUDIORET
C CD_C CD_AUDIORET <<22>> C
33_0402_5%~L
1 2 R_ICH_AC_SDIN0 8 C640 1U_0805_10V6K~L
<<19>> ICH_AC_SDIN0 SDATA_IN
27P_0603_50V8J

27P_0603_50V8J

20 CD_R 1 2
CD_R INT_CD_R <<22>>
C273

C274

C653 1000P_0402_50V7K~L
1 2 AFLT1 29 14
C654
1
1000P_0402_50V7K~L
2 AFLT2 30
AFLT1 STAC9750 AUX_L

C650 @ 0.1U_0603_16V7K AFLT2 C642

15
@ @ VREFOUT AUX_R 0.22U_0603_10V7M~L
1 2 28
VREFOUT 21 CNB_MICIN 1 2
MIC1 NB_MICIN <<24>>
AC97VREFI 27
VREF
22
MIC2
2.2U_0805_16VFZ~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

CAP2 32 16
CAP2 VIDEO_L
2 2 2 SPK_SHUTDOWN# 43 17
<<24>> SPK_SHUTDOWN# GPIO0/NC VIDEO_R
C658

C652

C655

C278 R292
SPDIF_SHDN 44 @ 0.033U_0603_25V7M @ 51K_0603_1%
1 1 1 <<17,34>> SPDIF_SHDN GPIO1/NC
13 9750_PHONE 1 2 9750_MDM_PHONE 2 1
PHONE MDM_MONO_PHONE <<26>>

0.033U_0603_25V7M
SPDIF 48
<<17>> SPDIF SPDIF 12 9750_NC 1 2
EAPD PC_BEEP
47
<<24>> EAPD EAPD

2
51K_0603_1%
C644

2
C279

R291
0.1U_0402_16V4Z~L
1

31 39 HP_OUT_L
NC/BPCFG HP_OUT_L HP_OUT_L <<24>>
ICH_AC_SDOUT

1
R764

1
10K_0402_5%~L
40 HP_COMM 1 2 C636 @ @
2

HP_COMM
2

B 33 1U_0805_10V7K~D B
R264 NC/FLTIN
@ 47_0402_5%
41 HP_OUT_R
HP_OUT_R HP_OUT_R <<24>>
1

37
MONO_OUT
ICH_AC_SDOUT_TERM

R553 34
@ 1K_0402_5%~D NC/FLTOUT
22P for
46
Crystal Only CID1
45 35 AUD_LINE_OUT_L <<24>>
C622 R552 CID0 LOUT_L
0_0402_5%~D XTL_24M+ @ 1K_0402_5%~D 3 2
XTL_OUT
2

C656
1000P_0402_50V7K~L
IN1 IN2

X7 1
@ 24.576 MHz_20P_1BX24576CC1A~L
C262 C616 PACKAGE : 8X4.5X1.5mm
@ 22P_0402_50V8J @ 22P_0402_50V8J~L
1

1 2 XTL_24M- 2 36
DVSS1
DVSS2

AVSS1
AVSS2

XTL_IN LOUT_R AUD_LINE_OUT_R <<24>>

2
STAC9750_TQFP48~L C657
4
7

26
42

1000P_0402_50V7K~L
C560 1
<<6>> CK_14M_CODEC 0_0402_5%~D

0.01uF for
14.318MHz
A A
Freq. Only
Pin46 Pin45 Pin3
CLOCK SOURCE CID1 CID0 XTL_OUT
14.318 MHz OPEN OPEN GND DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
27 MHz OPEN 1K GND Title
48 MHz 1K OPEN GND AC97
Size Document Number Rev
24.576 MHz 1K 1K GND
DDQ12/11/01 with LA-1901 3.0

Date: Wednesday, January 07, 2004 Sheet 23 of 59

5 4 3 2 1
 5 4 3 2 1

VDDA +3VALW

VDDA

2
L77 R519

2
100K_0402_5%~L
R532 BLM11A121S_0603~L
1K_0402_5%~L

1
1
AMPVCC <<34>> HP_NB_SENSE

1
1U_0805_10V6K~L
D R_INT_MIC+ D
2 2

2
1K_0402_5%~L
2 C248 C249

2
C623
2.2U_0805_16VFZ~L 0.1U_0402_16V4Z~L R252
1 1

R533
100K_0402_5%~L

1
1
C275
0.1U_0402_16V4Z~L

12

10
9
U28 JAUDIO
INT_MIC- 1 2 C_INT_MIC- 5 4 L46
<<39>> INT_MIC- INT_MIC- VSUP BLM11A121S_0603~L
INT_MIC+ 1 2 C_INT_MIC+ 6 3 EXT_MIC_BIAS 2 1 EXTMIC_BIAS
<<39>> INT_MIC+ INT_MIC+ EXT_MIC_BIAS
A2
C276 7 2 A6
GND OUT NB_MICIN <<23>>

2
0.1U_0402_16V4Z~L A1
R288 8 1 EXT_MIC_PLUG 2 1 EXTMIC_PLUG A3
1K_0402_5%~L EXT_MIC_IN MIC_SELECT L44
CMAMP110M_MSOP8~L BLM11A121S_0603~L A4

1
R_INT_MIC- C259 L45 A5
1U_0805_10V6K~L

0.1U_0402_16V4Z~L BLM11A121S_0603~L

2
1K_0402_5%~L
2 C_EXT_MIC+ 1 2 EMICIN+ 2 1 EMICIN B2
C271

R290
B6

100P_0603_50V8J~L

100P_0603_50V8J~L

100P_0603_50V8J~L
B1
2 2 2 B3
1

C947

C580
1

C579
B4

VDDA 1 1 1 B5
EPCOS
C C
5 4
2

11

8
L76
BLM11A121S_0603~L
C594 L73
220U_D3L_6.3VM_R55~L BLM11A121S_0603~L FOX_JA83333-2S2-TR~L
HP_OUT_L HP_SPK_L1 HP_SPK_L2

+
1 2 2 1
1

<<23>> HP_OUT_L
Z2401
HP_OUT_R HP_SPK_R1 HP_SPK_R2

+
<<23>> HP_OUT_R 1 2 2 1
L74
U57 1
1 2 3 C604 BLM11A121S_0603~L 2 2
5

SN74AHCT1G86DCKR_SC70-5~L C612 220U_D3L_6.3VM_R55~L C595 C584

1 0.1U_0402_16V4Z~L
P

<<19>> SPKR A 100P_0603_50V8J~L

4 100P_0603_50V8J~L
2
Y 2 single gate TTL +5VRUN TRACE 1 1
<<34>> BEEP B
G

L75
WIDTH>25MIL
3

R530 C618 BLM21PG600SN1D_0805~L

1 10K_0402_5%~L 0.1U_0402_16V4Z~L 1 2 TPA0312VDD
P

10U_1206_16V4Z~L
4 Z2403 1 2 Z2404 1 2
Y

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L
Z2402 2
<<29>> CBS_SPK B LINE OUT
G

U56 1 1 1 1
2

C627

C613

C625

C626
SN74AHCT1G86DCKR_SC70-5~L C619
3

R521 R531 @1000P_0402_50V7K

43K_0402_5%~L 8.2K_0402_5%~L
1

2 2 2 2
2
1

change
value

19

18
7
B U58 JSPK B
TRACE>15 mil 60mil single end connection near JACK MOLEX_53398-0690~L

VDD

PVDD2
PVDD1

7
AUD_LINE_OUT_R 2 1 RLINEIN 23
<<23>> AUD_LINE_OUT_R RLINEIN
9 INT_SPK_L2 TRACE>15 mil 1

7
C628 LOUT- INT_SPK_L1 1
20 4 2
0.1U_0402_16V4Z~L RHPIN LOUT+ 16 INT_SPK_R2 3 2
RIN+ ROUT- INT_SPK_R1 3
8 21 4
RIN ROUT+ 4
5
6 5
<<42>> RBAT 6

8
LIN+ 10 15
LIN SE/BTL#

8
6 17 VDDA
TRACE>15 mil LHPIN HP/LINE# R526
AUD_LINE_OUT_L 2 1 LLINEIN 5 @100K_0402_5%
<<23>> AUD_LINE_OUT_L LLINEIN
3 GAIN1 2 1
C614 GAIN1 2 GAIN0 2 1
+3VRUN 0.1U_0402_16V4Z~L PC_BEEPIN GAIN0 R527
14
PC-BEEP AMPBYPASS 100K_0402_5%~L
11

1
BYPASS
22
SHUTDOWN#
2

2
GND1
GND2
GND3
GND4
R545 C615 R522 R528
100K_0402_5%~L 0.47U_1206_16V7K~L @1K_0402_5% 1K_0402_5%~L
0.1U_0402_16V4Z~L

2
1
0.1U_0402_16V4Z~L

TPA0312PWP_TSSOP24~L
1

1
12
13
24
SPK_SHUTDOWN# 2 2
<<23>> SPK_SHUTDOWN#
C611

C610
1

D D D

<<23>> EAPD 2 Q71

<<34>> HP_NB_SENSE 2 2 1 1 GAIN0 GAIN1 AV
Q70 <<34>> NB_MUTE INT_SPK_L1
G
2N7002_SOT23~L
G
2N7002_SOT23~L
G
INT_SPK_L2
0 0 6dB
S S S
3

Q68 INT_SPK_R1
A 2N7002_SOT23~L INT_SPK_R2
0 1 10dB A

1 0 15.6dB
D17 D18 D20 D19
1 1 21.6dB
1

1
@DDA204U @DDA204U @DDA204U @DDA204U

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
2

3
AMP and PHONE JACK
+5VRUN Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 24 of 59
5 4 3 2 1
 5 4 3 2 1

@ L21
DLW21SN900SQ2_0805~L PLACE CHOKE
USBP0_D- L58
<<19>> USBP0- 1
1 2
2 NEAR BLM21PG600SN1D_0805~L

USBP0_D+
CONNECTOR USBP0_PWR
1 2 USB PORT# DESTINATION
<<19>> USBP0+ 4 3
4 3

0.1U_0402_16V4Z~L
150U_D_6.3VM_R55~D
R348 1
0_0402_5%~L C22 C21 1

C304

C302
1 2 @ 47P_0402_50V8J @ 47P_0402_50V8J +

06/18/03 R349 JUSB

0 BACK
0_0402_5%~L 2 2 USB2P0_VCC A1
Item 127 1 2 L59 USBP0_D- A2
A_VCC
BLM21PG600SN1D_0805~L USBP0_D+ A3 A_D-
D @ L41
DLW21SN900SQ2_0805~L
1 2 USBP0_GND A4
A_D+
A_GND 1 BT D

1 2 USBP1_D+ 1 2 USBP2_VCC B1
<<19>> USBP1+ 1 2 USBP1_D+ <<26>> B_VCC
USBP2_PWR L60 USBP2_D- B2
B_D-

0.1U_0402_16V4Z~L
BLM21PG600SN1D_0805~L USBP2_D+

150U_D_6.3VM_R55~D
B3
<<19>> USBP1- 4
4 R350 3
3 USBP1_D-
USBP1_D- <<26>> 1 USBP2_GND B4 B_D+
B_GND 2 BACK
1

C300

C301
0_0402_5%~L C169 C161 + 9
@ 47P_0402_50V8J @ 47P_0402_50V8J G1
1 2 10

R351 2 2
11
12
G2
G3 3 DOG
0_0402_5%~L G4
1 2 FOX_UB11123-8Z1-TR~L
1 2
@ L22
DLW21SN900SQ2_0805~L
L62
BLM21PG600SN1D_0805~L
4 MOD
1 2 USBP2_D-
<<19>> USBP2- 1 2 L63
2@ BLM21PG600SN1D_0805
4 3 USBP2_D+
<<19>> USBP2+ 4 R352 3
0_0402_5%~L
USBP3_PWR

1
5 DOCK
1 2 C24 C23
@ 47P_0402_50V8J @ 47P_0402_50V8J C329 + C321 JDOG
R353 150U_D_6.3VM_R55~D 0.1U_0402_16V4Z USBP3_VCC 1
0_0402_5%~L 2@ 2@ USBP3_D- 2 T1
2 USBP3_D+ T2 DH_SMBDAT
1 2 3
USBP3_GND T3
4
T4

2
@ L23 L61
DLW21SN900SQ2_0805 2@ BLM21PG600SN1D_0805 DH_PORT_PWRSRC 5
USBP3_D- DH_SMBDAT PWR_SRC
<<19>> USBP3- 1 2 6
1 2 DH_MOD_PRES# SMB_DATA D30
7
C <<35>> DH_MOD_PRES# DH_SMBCLK SMB_ALERT 2@ PACDN042 C
8 1
USBP3_D+ SMB_CLK
<<19>> USBP3+ 4 3 9
4 R354 3 GND2
2@ 0_0402_5%~L C26 C25 10
@ 47P_0402_50V8J @ 47P_0402_50V8J SHILD1
1 2 11
SHILD2
12

3
R355 SHILD3 DH_SMBCLK
13
2@ 0_0402_5%~L 14 SHILD4
SHILD5
1 2

@ L28
DLW21SN900SQ2_0805~L 2@ FCI_57489-1020B_9P
1 2 USBP4_D-
<<19>> USBP4- 1 2 USBP4_D- <<22>>
+5VSUS

4 3 USBP4_D+
<<19>> USBP4+ 4 3 USBP4_D+ <<22>>
R356 +5VSUS

2
0_0402_5%~L
1 2 C79 C75 R372 DAT_SMB 1 3 Q41 DH_SMBDAT

S
<<13,35,36>> DAT_SMB
@ 47P_0402_50V8J @ 47P_0402_50V8J 10K_0402_5% 2N7002_SOT23

2
R357 2@ 2@
0_0402_5%~L R373

G
1

2
1 2 10K_0402_5%
2@ DH_SMBENAB

2
@ L13

G
1
DLW21SN900SQ2_0805~L D Q40
1 2 USBP5_D- DH_POWER_EN# 2 2N7002_SOT23 CLK_SMB 1 3 Q42 DH_SMBCLK
<<19>> USBP5- 1 2 USBP5_D- <<33>> <<13,35,36>> CLK_SMB
G 2@ 2N7002_SOT23

S
S 2@

3
4 3 USBP5_D+
<<19>> USBP5+ 4 3 USBP5_D+ <<33>>
R358

1
B 0_0402_5%~L D Q39 B
1 2 C18 C19 DH_POWER_EN 2 2N7002_SOT23
@ 47P_0402_50V8J @ 47P_0402_50V8J G 2@ PWR_SRC
R359 S

3
0_0402_5%~L
1 2

2
R27

FDS4435_SO8~D
100K_0402_5%
2@
+5VSUS

3
2
1

2@
Q1
U70 Z2501 4
2 7 USBP0_PWR
IN OUT1

2@ 100K_0402_5%~D
6 F1
OUT2 USBP2_PWR L25

1
0.022U_0603_50V4Z~D
2@ 1.8A_33VDC_SMD185~D

5
6
7
8
3 DH_PWRSRC 1 2 DH_FUSE_PWRSRC 1 2 DH_PORT_PWRSRC
EN1#

R25
USB_EN# 4
EN2# 1
10/29 MURATA BLM31PG500SNI_1206~D
+3VRUN
C940

8 USB_OC0# change to F2 2@

1
OC1# USB_OC2# C30
1 5
PLACE overlap with U4 GNDA OC2# 2 100K

100K_0402_5%

10K_0402_5%
2@ 0.1U_0805_50V7M

1
RAY_RUE250

2
2
TPS2042_SO-8

Z2502
@

R32

R35
+5VSUS 1@
2@

Q2

2
D1
2@ 2N7002_SOT23 2@ DH_PWRSRC_OC
DH_PWRSRC_OC <<34>>

1@ 10K_0402_5%
U4 2 2@
DH_POWER_EN <<34>>

1
2 15 G

1
IN1 OUT1 USBP0_PWR D Q3
6 14 S
3

IN2 OUT2 USBP2_PWR

R403
A 11 2 1 DH_PWR_OC# 2 2N7002_SOT23 A
USB_EN# OUT3 USBP3_PWR 2@
<<34>> USB_EN# 3 G
EN1+# USB_OC0# R37
4 16 S

2
EN2+# OC1# USB_OC0# <<19>>
2 1 USBEN3# 7 13 USB_OC2# 2@ 100K_0402_5%
EN3+# OC2# USB_OC2# <<19>>
1 1 12 USB_OC3#
OC3# USB_OC3# <<19>>
C330 C331 R790 2@ 0_0402_5%
0.1U_0402_10V6K~L 10U_1206_16V4Z~L DELL CONFIDENTIAL/PROPRIETARY
2 2
2 1 8
Compal Electronics, Inc.
<<34>> DH_USBPWR_EN# NC0
1 9 Title
R791 @ 0_0402_5% GNDA NC1
5 10
GNDB NC2 USB 2.0
TPS2043AD_SO16~L Size Document Number Rev
2@ 3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 25 of 59
5 4 3 2 1
 5 4 3 2 1

TOP view

D D

+3VSUS

1
C669
0.1U_0402_16V4Z~L 10
2

FOX_HS6210_10P

JBT
10
<<39>> BT_ACTIVE 9
COEX2_WLAN_ACTIVE 8
<<31>> COEX2_WLAN_ACTIVE 7
T280 HW_RADIO_DIS#
<<31,35>> HW_RADIO_DIS# 6 12
COEX1_BT_ACTIVE PAD
<<31>> COEX1_BT_ACTIVE 5 11
COEX3
USBP1_D- 4
<<25>> USBP1_D- 3
USBP1_D+
<<25>> USBP1_D+ 2
1

10K_0402_5%~D
1
JST_SM10B-SRSS-TB~D

R765
Place near BT
C C

2
12/19 Item 82

+3VSUS

7/28 Changed to NP
by Dell's require
JMDC
R219

4.7U_1206_16V6K~L

0.1U_0402_16V4Z~L
@ 0_0402_5%~L 2 1
MDC_PHONE AUDIO_PWDN MONO_OUT/PC_BEEP
<<23>> MDM_MONO_PHONE 1 2 4 3 1 1
MONO_PHONE AGND

C588

C589
6 5
1

C215 8 RESERVED AUXA_RIGHT 7

@ 1000P_0603_50V7K GND AUXA_LEFT
10 9
R220 +5V CD_GND 2 2
12 11
2

10K_0402_5%~L RESERVED CD_RIGHT

14 13
Z2602 RESERVED CD_LEFT
1 2 16 15
+3VSUS
18
PRIMARY_DN GND
17
W=20 mil
20 RESERVED 3.3Vaux 19
R235 RESERVED GND
<<19,23>> ICH_AC_SYNC 22 21
33_0402_5%~L AC97_SYNC 3.3Vmain
24 23 ICH_AC_SDOUT <<19,23>>
MDC_SDIN AC97_SDATA_IN1 AC97_SDATA_OUT
<<19>> ICH_AC_SDIN1 1 2 26 25 ICH_AC_RST# <<19,23>>
AC97_SDATA_IN0 AC97_RESET#
28 27
GND GND Z2604
30 29
AC97_BITCLK AC97_MSTRCLK
1

1
7/28 Changed to NP R234

2
0_0402_5%~L
C223 @ 10K_0402_5% FOX_QT8A0301-3011~L
by Dell's require

R489
B 1@22P_0402_50V8J~L R484 B
2 @ 10_0402_5%
2

1
<<23>> MDC_AC_BITCLK

ICH_AC_SDOUT_MDCTERM
2

R236
@ 10_0402_5%
1
MDC_AC_BITCLK_TERM

C590
@ 10P_0402_50V8J

C224
@ 10P_0402_50V8J

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

BT PORT and MDC

Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 26 of 59
5 4 3 2 1
 5 4 3 2 1

V_2P5_LAN

0.1U_0402_16V4Z~L
4.7U_0805_6.3V6K~D
+3VSRC BCP69 2 2
Q33
C

C292

C310
SI3456DV-T1_TSOP6~L
L67
2

D
6 BLM31A260SPT_1206~L 1 1

S
5 4 VAUX_LAN 1 2 V_3P3_LAN Q37
2
B C E

3
10U_1206_6.3V7K~D

10U_1206_6.3V7K~D

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L
1 2@ BCP69_SOT-223
V_1P2_LAN
G
2 2 2 2 2 2 2 2 1 4 3 LAN_CTRL_1P2V 1
3

C393

C368

C296

C337

C309

C316

C295

C294
<<40>> ENAB_3VLAN
D 1 1 1 1 1 1 1 1 D

2
4

10U_1206_6.3V7K~D

10U_1206_6.3V7K~D

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L
L64
BLM11A601S_0603~L 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
1 2 V_1P2_PLLVDD_PHY
V_1P2_LAN

C346

C352

C323

C356

C311

C314

C319

C307

C325

C318

C326

C320

C317

C312

C328

C322
0.1U_0402_16V4Z~L
2.2U_0805_16VFZ~L

V_3P3_LAN
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

0.1U_0402_16V4Z~L
10U_1206_6.3V7K~D
2 1
C340

C313

2 2
+3V_LOM_PCI

C339

C297
1 2

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L
Q46

3
2@ BCP69_SOT-223 1 1
2 2 2 2 2 2

C303
C45

C37

C38
C299

C298
LAN_CTRL_2P5V 1
L66
BLM11A601S_0603~L 1 1 1 1 1 1
1 2 V_1P2_PLLVDD_MAC

2
4
V_1P2_LAN V_2P5_LAN
0.1U_0402_16V4Z~L
2.2U_0805_16VFZ~L

10U_1206_6.3V7K~D

10U_1206_6.3V7K~D

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L
2 1 2 2 2 2 2
C344

C324

C355

C342

C305

C361

C315
1 2 1 1 1 1 1

@ @

<<18,29,31,32>> PCI_AD[0..31]
U1A V_3P3_LAN
PCI_AD31 B8 E13 LAN_TX3+
AD31 TRD3+ LAN_TX3+ <<28>>
PCI_AD30 A8 E14 LAN_TX3-
C AD30 TRD3- LAN_TX3- <<28>> C
PCI_AD29 C7 D13 LAN_TX2+
AD29 TRD2+ LAN_TX2+ <<28>>
PCI_AD28 C6 D14 LAN_TX2-
AD28 TRD2- LAN_TX2- <<28>>

2@ 0.1U_0402_16V4Z~L
PCI_AD27 B6 C13 LAN_RX1+
AD27 TRD1+ LAN_RX1+ <<28>>

10K_0402_5%~L

2@ 1K_0402_5%
2@ 4.7K_0402_5%~L
PCI_AD26 B5 C14 LAN_RX1-
AD26 TRD1- LAN_RX1- <<28>>

1
PCI_AD25 A5 B13 LAN_TX0+ V_1P2_LAN
AD25 TRD0+ LAN_TX0+ <<28>> 1

R396

R548

R370
PCI_AD24 B4 B14 LAN_TX0-
AD24 TRD0- LAN_TX0- <<28>>

C448
PCI_AD23 B2
PCI_AD22 B1 AD23
PCI_AD21 AD22 2
C1 B9

2
PCI_AD20 AD21 REGSUP12 LAN_CTRL_1P2V V_2P5_LAN U1B
D3 B10
PCI_AD19 D2 AD20 REGCTL12 A9
PCI_AD18 AD19 REGSEN12 V_1P2_LAN
D1 E12 B7
PCI_AD17 AD18 VDDC_E12 VSS_B7
E3 B11 H5 D4
PCI_AD16 AD17 REGSUP25 V_3P3_LAN VDDC_H5 VSS_D4
K1 C11 LAN_CTRL_2P5V H6 D5 POP
PCI_AD15 AD16 REGCTL25 VDDC_H6 VSS_D5
L2 C10 H7 D6
PCI_AD14 L1
AD15 REGSEN25 V_2P5_LAN
H8
VDDC_H7 VSS_D6
D7 5702/5705
PCI_AD13 AD14 VDDC_H8 VSS_D7 U47
M3 P1 +3V_LOM_PCI J5 D8
PCI_AD12 M2 AD13 VESD1 G2 J6 VDDC_J5 VSS_D8 D9 8 1
PCI_AD11 AD12 VESD2 VDDC_J6 VSS_D9 LAN_EEPROM_W VCC A0
M1 A1 J7 E2 7 2
PCI_AD10 AD11 VESD3 VDDC_J7 VSS_E2 LAN_EECLK_SPROM_CLK WP A1
N2 J8 E5 6 3
PCI_AD9 AD10 VDDC_J8 VSS_E5 SCL NC
N3 P10 LAN_EEDATA_SPROM_CS J9 E6 LAN_EEDATA_SPROM_CS 5 4
PCI_AD8 AD9 EEDATA VDDC_J9 VSS_E6 SDA GND
P3 M10 LAN_EECLK_SPROM_CLK J10 E7
PCI_AD7 AD8 EECLK T232 VDDC_J10 VSS_E7 2@ AT24C256N-10SC_SO8
N4 K5 E8
PCI_AD6 P4 AD7 H12 LAN_GPIO0 PAD K6 VDDC_K5 VSS_E8 E9
PCI_AD5 AD6 GPIO0 VDDC_K6 VSS_E9
M5 K13 LAN_EEPROM_W K7 F5
PCI_AD4 AD5 GPIO1 V_3P3_LAN +3VRUN VDDC_K7 VSS_F5
N5 J13 LAN_GPIO2 K8 F6
PCI_AD3 AD4 GPIO2 T254 VDDC_K8 VSS_F6
P5 K9 F7
PCI_AD2 AD3 PAD VDDC_K9 VSS_F7
P6 K10 F8
PCI_AD1 AD2 VDDC_K10 VSS_F8
M7 L5 F9
AD1 VDDC_L5 VSS_F9

1@BLM11A601S_0603

2@BLM11A601S_0603
PCI_AD0 N7 L10 F10
AD0 G13 LINK_10# M14 VDDC_L10 VSS_F10 G4
BCM5705M LINKLEDB LINK_10# <<28>> VDDC_M14 VSS_G4 If using 93C46 4K ROM depop R548

L109

L110
H13 LINK_100# N14 G5
B
Pop BCM4401 for
SPD100LEDB
G12 DOCK_LED_1000#
LINK_100# <<28>>
DOCK_LED_1000# <<28,33>> P8
VDDC_N14 BCM5705M VSS_G5
G6 B
PCI_C_BE3# SPD1000LEDB LAN_ACT# VDDC_P8 VSS_G6
<<18,29,31,32>> PCI_C_BE3# C4 G14 LAN_ACT# <<28,33>> P12 Pop BCM4401 VSS_G7 G7
PCI_C_BE2# CBE3 Lindbergh 2 TRAFFICLEDB VDDC_P12
<<18,29,31,32>> PCI_C_BE2# F3 P13 G8
PCI_C_BE1# CBE2 VDDC_P13 for LindberghVSS_G8
<<18,29,31,32>> PCI_C_BE1# L3 P14 G9 POP
PCI_C_BE0# CBE1 VDDC_P14 VSS_G9
<<18,29,31,32>> PCI_C_BE0# M4 H14 V_1P2_PLLVDD_PHY 2 G10 02/17/03 V_3P3_LAN
CBE0 PLLVDD2 V_1P2_PLLVDD_MAC VSS_G10
R315 NC
P7
VSS_H9
H9
K2 Item 106
U43
4401
100_0603_5%~L LAN_SMBCLK VSS_K2 LAN_EEDATA_SPROM_CS
LAN_SMBCLK <<31>> +3V_LOM_PCI A7 L6 1 8
PCI_AD16 1 2 LAN_IDSEL A4 C12 LAN_SMBDATA B3 VDDIO-PCI_A7 VSS_L6 L9 LAN_EECLK_SPROM_CLK 2 CS VCC 7 1@
IDSEL TCK LAN_SMBDATA <<31>> VDDIO-PCI_B3 VSS_L9 SK NC

10U_1206_6.3V7K~D
PCI_FRAME# F2 D12 C5 M6 LAN_SPROM_DOUT 3 6 Z2702
<<18,29,31,32,33>> PCI_FRAME# FRAME TDI VDDIO-PCI_C5 VSS_M6 DI NC/ORG

10K_0402_5%~L
PCI_IRDY# F1 B12 R322 2 E1 M12 LAN_SPROM_DIN 4 5
<<18,29,31,32,33>> PCI_IRDY#

1
IRDY TDO VDDIO-PCI_E1 VSS_M12 DO GND

C662
PCI_TRDY# G3 A12 4.7K_0402_1%~L E4 M13
<<18,29,31,32>> PCI_TRDY# TRDY TMS VDDIO-PCI_E4 VSS_M13

R388
PCI_DEVSEL# H3 D11 LAN_TRST# 2 1 G1 N1
<<18,29,31,32>> PCI_DEVSEL# DEVSEL TRST VDDIO-PCI_G1 VSS_N1
PCI_STOP# H1 K3 N12 1@ AT93C46-10SI27
<<18,29,31,32>> PCI_STOP# STOP 1 VDDIO-PCI_K3 VSS_N12
PCI_PERR# J2 L4 N13
<<18,29,31,32>> PCI_PERR# PCI_SERR# PERR VDDIO-PCI_L4 VSS_N13
A2 N6

2
<<18,29,31,32>> PCI_SERR# PCI_PAR SERR VDDIO-PCI_N6 L106
<<18,29,31,32>> PCI_PAR J1 P2
CK_33M_LANPCI PAR V_2P5_LAN VDDIO-PCI_P2 BLM11A601S_0603~L
<<6>> CK_33M_LANPCI A3
PCI_CLK

2@ 0.1U_0402_16V4Z~L
R334 K14 F12 AVDD1P2 1 2 1@
V_2P5_LAN VDDP_K14 AVDDL_F12 V_1P2_LAN

0.01U_0402_16V7K~L
J14 0_0603_5%~L L13 F13
XTALVDD XTALO VDDP_L13 AVDDL_F13 AVDD2P5
N10 1 2 P11 F14 1 2 V_2P5_LAN 2
XTALO VDDP_P11 AVDD_F14

1U_0805_10V6K~L
PCI_PIRQC# H2 N11 XTALI X3 A13 L107
<<18,29>> PCI_PIRQC# INTA XTALI AVDD_A13

C390
PCIRST_1# C2 25MHz_20P_1BX25000CK1A~L A11 2 2 BLM11A601S_0603~L
<<11,18>> PCIRST_1# PCI_RST V_3P3_LAN VDDIO_A11
PCI_GNT4# J3 2 2 1 2 F11 2@
<<18>> PCI_GNT4# GNT VDDIO_F11 1

C663

C664
PCI_REQ4# C3 G11 K12
<<18>> PCI_REQ4# REQ SO
SI
E10 C345 C353 11/8 L12
VDDIO_K12
VDDIO_L12 1 1
E11 22P_0402_50V8J~L 22P_0402_50V8J~L R217
R316 SCLK 1 1 0_0402_5%
H11 C8
2@ 4.7K_0402_5%~L CS 5705M_CLOCKRUN CSTSCHG
<<18,29,31,34>> CLKRUN# 1 2 H4 L11
LAN_AUXPWR CLKRUN NC_L11
2 1 J12 H10 L14 Pop 5705
V_3P3_LAN VAUXPRSNT LAN_BIAS L108 NC_H10 NC_L14 R549
F4 A14 J4 M8
R317 SYS_PME# M66EN BIASVDD LAN_RDAC BLM11A601S_0603~L NC_J4 NC_M8 2@ 0_0603_5%
A6 D10 K4 M9
A 1@ 1K_0402_5%~D PME RDAC NC_K4 NC_M9 5705M_LOWPWR A
1 2 V_2P5_LAN J11 M11 1 2 LAN_LOW_PWR <<35>>
NC_J11 LOW_POWER
2 1 K11 N8
NC_K11 NC_N8 NC_LAN_N9 R368 1
2 L7 N9 2 1@ 0_0603_5% LAN_SPROM_DOUT
A10 LAN_SMBCLK L8 NC_L7 NC_N9 P9 NC_LAN_P9 1 2 LAN_SPROM_DIN
SMB_CLK LAN_SMBDATA
PLACE C293 NC_L8 NC_P9 R367 1@ 0_0603_5%
C9
SMB_DATA TOGETHER 1000P_0402_50V7K~L BCM5705M_FBGA196~D
1 POP 4401
1.15K_0603_1%

2@
<<29,31,32,34>> SYS_PME#
1

BCM5705M_FBGA196~D Q44
Compal Electronics, Inc.
1

D
R318

R17 C20 2@ 06/05 @ 2N7002_SOT23

@ 10_0402_5% @ 8.2P_0402_50V8J R318 2 DOCKED <<28,33,35>>
Title
CK_33M_LANPCI 2 1 CLK_82540_TERM 1 2 Item 125 G
for 4401 :1.18K R382 ETHERNET
S
DELL CONFIDENTIAL/PROPRIETARY
2

@ 30.69K_0402_1% Size Document Number Rev

for 5705M:1.15K LAN_RDAC_B 1 2 3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, Sheet
2004 27 of 59
5 4 3 2 1
 5 4 3 2 1
L65
V_3P3_LAN BLM11A601S_0603~L
1 2 LAN_SW_VCC
1 1
C308 C306
V_2P5_LAN
0.047U_0402_16V4M~L 0.047U_0402_16V4M~L
2 2

R326 1 2 49.9_0603_1% LAN_TX0- 0 ohm for 4401 U30

R324 1 2 49.9_0603_1% LAN_TX0+ DOCKED 24 1
V_2P5_LAN R323 49.9_0603_1% LAN_RX1- <<27,33,35>> DOCKED SEL VDD0
1 2 6
R319 49.9_0603_1% LAN_RX1+ VDD1
1 2 12
R325 49.9_0603_1% 2@ LAN_TX2- LAN_TX0- LAN_TX0-R VDD2
1 2 <<27>> LAN_TX0- 2 1 2 19
R330 49.9_0603_1% 2@ LAN_TX2+ R776 15NH_MLK1005S15NJ_5%_0402 A0 VDD3
1 2 36
D R331 49.9_0603_1% 2@ LAN_TX3- LAN_TX0+ LAN_TX0+R VDD4 D
1 2 <<27>> LAN_TX0+ 2 1 4
A1
2

R332 1 2 49.9_0603_1% 2@ LAN_TX3+ R777 15NH_MLK1005S15NJ_5%_0402 48 SW_LAN_TX-

R335 LAN_RX1- LAN_RX1-R 0B1 DOCK_LAN_TX-
<<27>> LAN_RX1-
2 1 8 45 DOCK_LAN_TX- <<33>>
0_0402_5% R778 15NH_MLK1005S15NJ_5%_0402 A2 0B2 SW_LAN_TX+
47
POP K LAN_RX1+ LAN_RX1+R 1B1 DOCK_LAN_TX+
2 1 10 44 DOCK_LAN_TX+ <<33>>
<<27>> LAN_RX1+ R779 15NH_MLK1005S15NJ_5%_0402 A3 1B2 SW_LAN_RX-
10/100M magnetic (H1238/HB914-4-LP)for 4401 42
1

LAN_TX2- LAN_TX2-R 2B1 DOCK_LAN_RX-

<<27>> LAN_TX2- 2 1 15 39
1G magnetic (H5015T/GB1G04-T)for 5705 R780 2@ 15NH_MLK1005S15NJ_5%_0402 A4 2B2 SW_LAN_RX+ DOCK_LAN_RX- <<33>>
41
L24 LAN_TX2+ LAN_TX2+R 3B1 DOCK_LAN_RX+
<<27>> LAN_TX2+ 2 1 17 38 DOCK_LAN_RX+ <<33>>
TRM_CT Z2805 R781 2@ 15NH_MLK1005S15NJ_5%_0402 A5 3B2 SW_LAN_TX2-
1 24 35
1:1 LAN_TX3- LAN_TX3-R 4B1 DOCK_LAN_TX2-
<<27>> LAN_TX3- 2 1 21 32 DOCK_LAN_TX2- <<33>>
R782 2@ 15NH_MLK1005S15NJ_5%_0402 A6 4B2 SW_LAN_TX2+
34
LAN_TX3+ 2 1 LAN_TX3+R 23 5B1 31 DOCK_LAN_TX2+
<<27>> LAN_TX3+ A7 5B2 DOCK_LAN_TX2+ <<33>>
SW_LAN_TX3- 2 23 NB_LAN_TX3- R783 2@ 15NH_MLK1005S15NJ_5%_0402 29 SW_LAN_TX3-
6B1
0.01U_0402_16V7K~L

Need to as close 26 DOCK_LAN_TX3-

6B2 DOCK_LAN_TX3- <<33>>
FROM NIC 28 SW_LAN_TX3+
PI3L301A pins as 7B1 DOCK_LAN_TX3+
2 3 25 DOCK_LAN_TX3+ <<33>>
GND1 7B2
C335

possible 5
GND2
2@

7 22
GND3 GND11
9 27 TO TO
1 GND4 GND12
11 30
13
GND5 GND13
33 RJ45 DOCK
LAN ANALOG 14 GND6 GND14 37
NC GND15
SW_LAN_TX3+ 3 22 NB_LAN_TX3+
SWITCH 16
18
GND8 GND16
40
43
20 GND9 GND17 46
GND10 GND18
T1 T5 1: TO DOCK
DOCKED PI3L301BA_TSSOP48~D
4 21 Z2806 0: TO RJ45
1:1

C SW_LAN_TX2- 5 20 NB_LAN_TX2- R364 C

0.01U_0402_16V7K~L

10K_0402_5%~L
2 2 1 JLOM
V_3P3_LAN LAN_ACTLED_YEL#
V_3P3_LAN 18 17
18 YEL
C333

2@

06/18/2003 Item 131&132 15 LED_10_GRN#

GRN

2
1 16
2
D75 R374 14 LED_100_ORG#
150_0603_5%~L ORG
BAT54A_SOT23~L 1 1 2 LAN_ACTLED_YEL# NB_LAN_TX+ 1
P1_1

1
SW_LAN_TX2+ NB_LAN_TX2+ D NB_LAN_TX-
6 19 2 19
Q36 NB_LAN_RX+ P1_2 MH1
<<31>> WLAN_LED_ACTIVITY 2 3 20
2N7002_SOT23~L V_3P3_LAN NB_LAN_TX2+ P1_3 MH2
T2 T6 G 4
P1_4 MH3
21

1
10K_0402_5%~D
S NB_LAN_TX2- 5

3
Z2807 NB_LAN_RX- P1_5
7 18 6

3
P1_6

R400
1:1 NB_LAN_TX3+ 7

1
NB_LAN_TX3- 8 P1_7 12
R369 P1_8 12
13

2
SW_LAN_RX- NB_LAN_RX- 10K_0402_5%~L SHG1
8 17
0.01U_0402_16V7K~L

2 RJ45/LED
<<27,33>> LAN_ACT# RJ_TIP 11

2
P2_1
C332

RJ_RING 10
P2_2
1 <<27>> LINK_10# RJ11
V_3P3_LAN FOX_JM34F23-SBM4~D

1
USE SBM3 ON X01 BOARD,CHANGE TO SBM4 ON X02

1
D72
RB495D_SOT23 R371
SW_LAN_RX+ 9 16 NB_LAN_RX+ 10K_0402_5%~L

B B
T3 T7

2
10 15 Z2808
<<27>> LINK_100#
1:1
V_3P3_LAN

SW_LAN_TX- 11 14 NB_LAN_TX-
0.01U_0402_16V7K~L

1
C334

R375 DOCK_LED_1000#
DOCK_LED_1000# <<27,33>>

1
10K_0402_5% D71
D73 2@ 2@ RB495D_SOT23
1 RB495D_SOT23
3

2
1
2
2

3
R574 R575
SW_LAN_TX+ 12 13 NB_LAN_TX+ 10K_0402_5%~L 200_0603_5%~L
1 2 1 2 LED_100_ORG#
V_3P3_LAN
T4 T8

1
GB1G04-T
Q74
R591 DTC144EKA_SOT23~L
10K_0402_5%~L DOCK_LED_100#
47K DOCK_LED_100# <<33>>
2 1 N16919818 2 DTC144EKA
<<31>> LED_WLAN5_RADIOSTATE

47K
1 DOCK_LED_10#
C DOCK_LED_10# <<33>>

3
2 3
1

A JPH_RJ R576 B E R577 A

RJ_TIP 1 R401 10K_0402_5%~L 200_0603_5%~L
1
75_0402_5%~DR785

75_0402_5%~DR786

75_0402_5%~DR787

75_0402_5%~DR788

RJ_RING 2 10K_0402_5%~D 1 2 1 2 LED_10_GRN#

2 V_3P3_LAN
6 1 2
2

6
7 R402
7

1
5
5 10K_0402_5%~D Q75 DELL CONFIDENTIAL/PROPRIETARY
JST_SM05B-SRSS-TB~D R592 1 2 DTC144EKA_SOT23~L
C1 10K_0402_5%~L Compal Electronics, Inc.
N16919274 47K
1000P_1808_3KV7K~L 2 1 2 Title
GND 1 2
<<31,34>> LED_WLAN24_RADIOSTATE
LAN TRANSFOMER
CHASIS 47K Size Document Number Rev
3.0
3
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 28 of 59
5 4 3 2 1
 5 4 3 2 1

<<18,27,31,32>> PCI_AD[0..31] Remove R756

CBS_CAD[0..31] <<30>>
U11A 8/12 Changed by
PCI_AD31 J5 E8 CBS_CAD31 +3V_CBSD
PCI_AD30 AD31 CAD31/D10 CBS_CAD30 +3V_CBSD +3V_CBSA Dell's Require
J6 C8
PCI_AD29 AD30 CAD30/D9 CBS_CAD29
K2 B8
PCI_AD28 AD29 CAD29/D1 CBS_CAD28 R179 U11B
K3 E9
PCI_AD27 AD28 CAD28/D8 CBS_CAD27 1K_0402_5%~L
K5 F9 G1
PCI_AD26 AD27 CAD27/D0 CBS_CAD26 PHY_CPS VCC
K6 F11 2 1 P10 M1
AD26 CAD26/A0 CPS VCC

2
0_0402_5%

0_0402_5%

0_0402_5%
PCI_AD25 L2 E11 CBS_CAD25 R126 R1
AD25 CAD25/A1 VCC

R147

R158

R171
PCI_AD24 L3 C11 CBS_CAD24 10K_0402_5%~L W8
PCI_AD23 AD24 CAD24/A2 CBS_CAD23 PHY_CNA VCC
M2 A12 1 2 P17 L19
PCI_AD22 AD23 CAD23/A3 CBS_CAD22 CNA VCC
M3 C12 H19
PCI_AD21 AD22 CAD22/A4 CBS_CAD21 VCC
M6 E12 E19

1
PCI_AD20 M5 AD21 CAD21/A5 C13 CBS_CAD20 @ @ @ VCC A13
D PCI_AD19
PCI_AD18
N2
N3
AD20
AD19
Pop PCI4510 for
PCI7510 CAD20/A6
CAD19/A25
A14
E13
CBS_CAD19
CBS_CAD18
CBS_PC0
CBS_PC1
V10
W10
PC0
VCC
VCC
A8
A5
D

PCI_AD17 N6 AD18 CAD18/A7 B14 CBS_CAD17 CBS_PC2 P9 PC1 VCC

PCI_AD16
PCI_AD15
P1
R6
AD17
AD16
Lindbergh 2 CAD17/A24
CAD16/A17
F18
G17
CBS_CAD16
CBS_CAD15 R145 PCI4510_R0 W13
PC2
PCI7510
Pop PCI4510 for G14
CBS_VCC

2
AD15 CAD15/IOWR# R0 VCCCB

0_0402_5%~L

0_0402_5%~L

0_0402_5%~L
PCI_AD14 P7 F19 CBS_CAD14 @ 1M_0603_5% A11
AD14 CAD14/A9 Lindbergh 2 VCCCB

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L
R144

R152

R164
PCI_AD13 V5 G18 CBS_CAD13 1 2 PCI4510_R1 V13 1 1
AD13 CAD13/IORD# R1

C132

C176
PCI_AD12 U6 H15 CBS_CAD12 L1
PCI_AD11 AD12 CAD12/A11 CBS_CAD11 VCCP
V6 H14 1 2 W5
PCI_AD10 AD11 CAD11/OE# CBS_CAD10 R141 VCCP
R7 H17

1
PCI_AD9 AD10 CAD10/CE2# CBS_CAD9 6.34K_0805_0.5%~L 2 2
P8 H18 G2 +1.8V_CBSD
PCI_AD8 AD9 CAD9/A10 CBS_CAD8 IEEE1394_TPA0P VR_PORT
U7 J14 <<30>> IEEE1394_TPA0P V12 L18
PCI_AD7 W7 AD8 CAD8/D15 J17 CBS_CAD7 TPA0P VR_PORT
PCI_AD6 AD7 CAD7/D7 CBS_CAD6 IEEE1394_TPA0N This shall be output
R8 K14 <<30>> IEEE1394_TPA0N W12
PCI_AD5 AD6 CAD6/D13 CBS_CAD5 R142 TPA0N +3V_CBSD
U8 J19 E6 CBS_VCCD0# <<30>>
PCI_AD4 V8 AD5 CAD5/D6 K17 CBS_CAD4 @ 1K_0402_5% VD1/VCCD0
B5 CBS_VCCD1# <<30>>
PCI_AD3 AD4 CAD4/D12 CBS_CAD3 IEEE1394_TPA1P VD0/VCCD1
W9 K15 2 1 V15
AD3 CAD3/D5 TPA1P

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L
PCI_AD2 V9 L14 CBS_CAD2 2 2
AD2 CAD2/D11

C181

C202
PCI_AD1 U9 K18 CBS_CAD1 2 1 IEEE1394_TPA1N W15 A4
AD1 CAD1/D4 TPA1N VD3/VPPD0 CBS_VPPD0 <<30>>
PCI_AD0 R9 L15 CBS_CAD0 R149 C5
AD0 CAD0/D3 VD2/VPPD1 CBS_VPPD1 <<30>>
@ 1K_0402_5%
IEEE1394_TPB0P V11 1 1
<<30>> IEEE1394_TPB0P TPB0P
B11 CBS_CC/BE3# IEEE1394_TPB0N W11 E1
CC/BE3/REG# CBS_CC/BE3# <<30>> <<30>> IEEE1394_TPB0N TPB0N GND
PCI_C_BE3# L6 C14 CBS_CC/BE2# K1
<<18,27,31,32>> PCI_C_BE3# C/BE3 CC/BE2/A12 CBS_CC/BE2# <<30>> GND
PCI_C_BE2# P2 G15 CBS_CC/BE1# 2 R160
1 IEEE1394_TPB1P V14 N1
<<18,27,31,32>> PCI_C_BE2# C/BE2 CC/BE1/A8 CBS_CC/BE1# <<30>> TPB1P GND
PCI_C_BE1# U5 J15 CBS_CC/BE0# 1K_0402_5%~L W6 R183 +3V_CBSD
<<18,27,31,32>> PCI_C_BE1# C/BE1 CC/BE0/CE1# CBS_CC/BE0# <<30>> GND
PCI_C_BE0# V7 2 R155
1 IEEE1394_TPB1N W14 P19 @ 10K_0402_5%
<<18,27,31,32>> PCI_C_BE0# C/BE0 TPB1N GND
B13 CBS_CRST# 1K_0402_5%~L K19 2 1
CRST/RESET CBS_CRST# <<30>> GND
B15 CBS_CFRAME# IEEE1394_TPBIAS0 U12 G19
CFRAME/A23 CBS_CFRAME# <<30>> <<30>> IEEE1394_TPBIAS0 TPBIAS0 GND
F13 CBS_CIRDY# A15 R181
CIRDY/A15 CBS_CIRDY# <<30>> IEEE1394_TPBIAS1 GND
E14 CBS_CTRDY# 2 R139
1 U15 A10 0_0402_5%~L
C CTRDY/A22 CBS_CTRDY# <<30>> TPBIAS1 GND C
PCI_PAR W4 A16 CBS_CDEVSEL# @ 1K_0402_5% A7 2 1
<<18,27,31,32>> PCI_PAR PAR CDEVSEL/A21 CBS_CDEVSEL# <<30>> GND
E17 CBS_CSTOP#
CSTOP/A20 CBS_CSTOP# <<30>>
F15 CBS_CPERR# 2 1 R191
CPERR/A14 CBS_CPERR# <<30>>
E10 CBS_CSERR# H5 1V8_VR_EN# 10K_0402_5%~L
CSERR/WAIT# CBS_CSERR# <<30>> VR_EN
F14 CBS_CPAR C670 2 1
CPAR/A13 CBS_CPAR <<30>> +3V_CBSD
PCI_DEVSEL# R2 B12 CBS_CREQ# 1U_0805_10V6K~L R11
<<18,27,31,32>> PCI_DEVSEL# DEVSEL CREQ/INPACK# CBS_CREQ# <<30>> +3V_CBSA ANALOGVCC
PCI_FRAME# N5 D19 CBS_CGNT# R137 U13 G3 TI_SUSPEND#_INTERNAL 2 1
<<18,27,31,32,33>> PCI_FRAME# FRAME CGNT/WE# CBS_CGNT# <<30>> ANALOGVCC SUSPEND TI_SUSPEND# <<35>>
PCI_GNT1# J1 C15 CBS_CCLK_INTERNAL 2 1 CBS_CCLK U14
<<18>> PCI_GNT1# GNT CCLK/A16 CBS_CCLK <<30>> ANALOGVCC
47_0603_5%~L D11
PCI_IRDY# P3 A9 CBS_CSTSCHNG U11 @ RB751V_SOD323~L
<<18,27,31,32,33>> PCI_IRDY# IRDY CSTSCHG/BVD1 CBS_CSTSCHNG <<30>> CBS_CCD1# <<30>> ANALOGGND

0_0402_5%~L

0_0402_5%~L
PCI_PERR# R3 B9 CBS_CCLKRUN# R12 J3 SYS_PME#
<<18,27,31,32>> PCI_PERR# PERR CCLKRUN/WP CBS_CCLKRUN# <<30>> CBS_CCD2# <<30>> ANALOGGND RI_OUT/PME SYS_PME# <<27,31,32,34>>

2
PCI_REQ1# J2 R13
<<18>> PCI_REQ1# REQ ANALOGGND

R123

R175
PCI_SERR# T1 E18 CBS_CBLOCK# E2 CBS_SPK
<<18,27,31,32>> PCI_SERR# SERR CBLOCK/A19 CBS_CBLOCK# <<30>> SPKROUT CBS_SPK <<24>>
PCI_STOP# P5 C10 CBS_CINT# P15
<<18,27,31,32>> PCI_STOP# STOP CINT/READY CBS_CINT# <<30>> +3V_CBSA VDPLL
PCI_TRDY# P6 F5 PCI_PIRQD#
<<18,27,31,32>> PCI_TRDY# TRDY MFUNC0 PCI_PIRQD# <<18,31>>
PCIRST_2# H3 F10 CBS_CAUDIO G6 PCI_PIRQC#

1
<<18,31>> PCIRST_2# PCIRST CAUDIO/BVD2 CBS_CAUDIO <<30>> MFUNC1 PCI_PIRQC# <<18,27>>
C9 CBS_CCD2#_INTERNAL F3 PCI_REQB#
CCD2/CD2# MFUNC2 PCI_REQB# <<18>>
CBS_GRST# H2 L17 CBS_CCD1#_INTERNAL F2 IRQ_SERIRQ
<<34>> CBS_GRST# GRST CCD1/CD1# MFUNC3 IRQ_SERIRQ <<18,34>>
N14 G5 CBS_RI#
VSPLL/RSVD MFUNC4 CBS_RI# <<20>>
R187 100_0603_5%~L F12 CBS_CVS2 C129 F1 PCI_GNTB# +3V_CBSD
CVS2/VS2# CBS_CVS2 <<30>> MFUNC5 PCI_GNTB# <<18>>
PCI_AD17 1 2 CBS_IDSEL L5 B10 CBS_CVS1 0.1U_0402_10V6K~L FILTER0 T19 H6 CBS_MFUNC6 1 2
IDSEL CVS1/VS1# CBS_CVS1 <<30>> FILTER0 MFUNC6

270P_0603_50V7K

270P_0603_50V7K
1 2 FILTER1 R17 R578 R184 10K_0402_5%~L
CBS_RSVD/D2 FILTER1
F8 CBS_RSVD/D2 <<30>> 2 1 CLKRUN# <<18,27,31,34>>
H1 CRSVD/D2 F17 CBS_RSVD/A18 N15 @ 0_0402_5%
<<6>> CK_33M_CBPCI PCICLK CRSVD/A18 CBS_RSVD/A18 <<30>> RSVD
2

J18 CBS_RSVD/D14 E3 CBS_SCL

CRSVD/D14 CBS_RSVD/D14 <<30>> SCL

2
R188 M14 D1 CBS_SDA +3V_CBSD
RSVD SDA

C120

C183
10_0402_5% N17
@ PCI7510GHK_PBGA209~D RSVD PHY_TEST_MA
N18 P18 2 1

1
2@ SCR_IF_GPIO5 RSVD PHY_TEST_MA R127 4.7K_0402_5%~L
N19
1

@ @ <<30>> SCR_IF_GPIO5 SC_GPIO5 CBS_TEST0

M15 U10 2 1
SCR_IF_GPIO4 M17 RSVD SKT_SEL0 R161 200_0603_5%~L
<<30>> SCR_IF_GPIO4 SC_GPIO6
SCR_IF_GPIO3 M18 R10 CBS_TEST1 2 1
CK33M_CBS_TERM

B <<30>> SCR_IF_GPIO3 SC_GPIO1 SKT_SEL1 B

SCR_IF_GPIO2 M19 R169 200_0603_5%~L
<<30>> SCR_IF_GPIO2 SC_GPIO0
F6 CK_48M_SCR
CLK_48 CK_48M_SCR <<6>>
SCR_DETECT B7
<<30>> SCR_DETECT SC_CD

2
+3VSUS +3V_CBSA SCR_IF_RST C7
L36 <<30>> SCR_IF_RST SCR_IF_CLK SC_RST PCI4510XI R178
<<30>> SCR_IF_CLK F7 R18
BLM21A601SPT_0805~L SCR_IF_DATA A6 SC_CLK XI 10_0402_5%
<<30>> SCR_IF_DATA SC_DATA
1 2 SCR_IF_PWR B6 @
<<30>> SCR_IF_PWR SC_GPIO3
0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

SCR_IF_GPIO0 E7

1
<<30>> SCR_IF_GPIO0 SC_GPIO2
10U_0805_10V4M~L

SCR_IF_GPIO1 C6 R19 PCI4510XO

<<30>> SCR_IF_GPIO1 SC_GPIO4 XO

CK48M_CBS_TERM
2 2 1 2 2
C139

C152

C162

C175

C170

PCI7510GHK_PBGA209~D X2
2

C204 2@ 24.576MHz_16P_1BG24576CKIA~L
4.7P_0402_50V8C 1 2
@ 1 1 2 1 1
1

22P_0402_50V8J~D

22P_0402_50V8J~D
1 1

C136

C130
+1.8V_CBSD 2 2

2
C185
L37 +3V_CBSD 4.7P_0402_50V8C
BLM21A601SPT_0805~L @

1
0.1U_0402_16V4Z

0.1U_0402_16V4Z
1 2
+3VSUS
0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

0.047U_0402_16V4M~L

1
10U_0805_10V4M~L

10U_0805_10V4M~L

C197

C134
0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

1 1 1 1 1 1 1 1 1 1

2
C191

C180

C126

C199

C135

C133

C131

C172

C178

C198

R189 R190 +3V_CBSD

220_0603_5%~D @ 2.7K_0603_5%~L
2 2 2 2 2 2 2 2 2 2 2 1 CBS_SCL 2 1
A 2 1 CBS_SDA 2 1 A
R198
220_0603_5%~D R194
@ 2.7K_0603_5%~L

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PCMCIA Controller
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 29 of 59
5 4 3 2 1
 5 4 3 2 1

JCBUS
80 40
CBS_CCD2# 80 40 CBS_CCLKRUN#
79 39
CBS_CAD31 79 39 CBS_RSVD/D2
78 38
CBS_CAD30 78 38 CBS_CAD29
77 37
CBS_CAD28 77 37 CBS_CAD27
76 36
CBS_CSTSCHNG 76 36 CBS_CAD26
75 35
+3VSUS 75 35 CBS_CAD25
74 34
CBS_CAUDIO 74 34 CBS_CAD24
73 33
R579 CBS_CC/BE3# 73 33 SCR_DETECT_C
72 32 SCR_DETECT_C <<35>>
10K_0402_5%~L CBS_CREQ# 71 72 32 31 CBS_CAD23
71 31

2@ 0.1U_0402_16V4Z~D
2 1 SCR_IF_GPIO0 +5VSUS CBS_CSERR# 70 30 CBS_CAD22
70 30 SCR_VCC_C
69 29
R580 R444 CBS_CRST# 69 29 CBS_CAD21
68 28
10K_0402_5%~L @ 0_0402_5% CBS_CVS2 67 68 28 27 CBS_CAD20
67 27 1
D R135 2 1 SCR_IF_GPIO1 1 2 SCR_VPP_PIN66 66 26 SCR_RST_C D
66 26

C189
T247 @ 0_0402_5% CBS_CAD19 65 25 CBS_CAD18
PAD NC_SCR_C4 SCR_C4_C R581 CBS_CAD17 65 25 CBS_CC/BE2#
2 1 64 24
10K_0402_5%~L SCR_DATA_C 64 24 SCR_CLK_C 2
63 23
63 23

2@100P_0402_50V8K~D
2 1 SCR_IF_GPIO2 CBS_CFRAME# 62 22 CBS_CIRDY#
R162 CBS_CTRDY# 61 62 22 21 CBS_CCLK
1 61 21

C184
T248 @ 0_0402_5% R582 SCR_C8_C 60 20 SCR_C4_C
PAD NC_SCR_C8 SCR_C8_C 10K_0402_5%~L 60 20
2 1 CBS_VPP 59 19 CBS_VPP
SCR_IF_GPIO3 59 19
2 1 CBS_VCC 58 18 CBS_VCC
2 CBS_CDEVSEL# 58 18 CBS_CINT#
57 17
R170 R583 CBS_CSTOP# 57 17 CBS_CGNT#
56 16
@ 0_0402_5% 10K_0402_5%~L CBS_CBLOCK# 56 16 CBS_CPERR#
55 15
SCR_DETECT 2 1 SCR_DETECT_C 2 1 SCR_IF_GPIO4 CBS_RSVD/A18 54 55 15 14 CBS_CPAR
<<29>> SCR_DETECT CBS_CAD16 54 14 CBS_CC/BE1#
53 13
R584 R569 CBS_CAD15 53 13 CBS_CAD14
52 12
10K_0402_5%~L 0_0603_5%~L CBS_CAD13 51 52 12 11 CBS_CAD12
51 11
1

2 1 SCR_IF_GPIO5 1 2 CAGE50_GND 50 10 CAGE10_GND

50 10

1
R586 CBS_CVS1 49 9 CBS_CAD11
10K_0402_5%~D R585 CBS_CAD10 49 9 CBS_CAD9 R570
48 8
10K_0402_5%~L CBS_CAD8 48 8 CBS_CC/BE0# 0_0603_5%
47 7
SCR_IF_PWR CBS_RSVD/D14 47 7 CBS_CAD7 @
2 1 46 6
2

CBS_CAD6 46 6 CBS_CAD5
45 5

2
CBS_CAD4 44 45 5 4 CBS_CAD3
CBS_CAD2 44 4 CBS_CAD1
43 3
CBS_CCD1# 43 3 CBS_CAD0
42 2
41 42 2 1
41 1

<<29>> IEEE1394_TPBIAS0 81 82
81 82
83 84
+3VSUS 85 83 84 86
85 86

1U_0805_10V6K~L
1

1
56.2_0603_1%~L

56.2_0603_1%~L
U13 L72 2 FCI_61082-081001~L
C SCR_IF_GPIO2 1 20 22U_LQH43MN220J01K_2OHM_1812 C
<<29>> SCR_IF_GPIO2 A0 VBAT

R427

R428

C474
SCR_IF_GPIO3 2 19 LOUT_H 1 2 J1394
<<29>> SCR_IF_GPIO3 A1 LOUT_H
SCR_IF_GPIO0 3 18 LOUT_L 2@ L68 8
<<29>> SCR_IF_GPIO0 PGM LOUT_L 1 SGND4
SCR_IF_PWR 4 17 5 4 7

2
<<29>> SCR_IF_PWR PWR_ON PWR_GND 5 4 SGND3
SCR_IF_GPIO1 5 16 6
<<29>> SCR_IF_GPIO1 STATUS GROUND SGND2
SCR_IF_GPIO5 6 15 SCR_VCC_C 5
<<29>> SCR_IF_GPIO5 CS CRD_VCC SGND1
SCR_IF_RST 7 14 SCR_DATA_C 6 3
<<29>> SCR_IF_RST RESET CRD_IO 6 3
SCR_IF_DATA 8 13 SCR_CLK_C IEEE1394_TPA0P 7 2 TPA0+ 4
<<29>> SCR_IF_DATA I/O CRD_CLK <<29>> IEEE1394_TPA0P 7 2 TPA0- 4
SCR_IF_GPIO4 9 12 SCR_RST_C IEEE1394_TPA0N 3
<<29>> SCR_IF_GPIO4 INT CRD_RST <<29>> IEEE1394_TPA0N TPB0+ 3
SCR_IF_CLK 10 11 SCR_DETECT_C IEEE1394_TPB0P 2
<<29>> SCR_IF_CLK CLOCK_IN CRD_DET <<29>> IEEE1394_TPB0P TPB0- 2
IEEE1394_TPB0N 8 1 1
<<29>> IEEE1394_TPB0N 8 1 1
2@ NCN6000_TSSOP-20

56.2_0603_1%~L

56.2_0603_1%~L
857CM-0009~L FOX_UV31413-K8~L

2
R587

R429

R430
@ 0_0402_5%
1 2
+3VSUS R588
@ 0_0402_5%

1
SCR_VCC_C SCR_RST_C SCR_CLK_C 1 2
2@470P_0402_50V7K~D
2@ 0.1U_0402_16V4Z

SCR_VCC_C Z3008 R589

270P_0603_50V7K~L
2@ 10K_0402_5%

2@ 56P_0402_50V8J
2@ 4.7U_1206_16V6K~D

4.7U_0805_10V4Z~D

@ 0_0402_5%
1

2@ 22K_0402_5%

2@ 22K_0402_5%

5.1K_0805_5%~L
2@ 10U_1206_6.3V7K

2@ 0.1U_0402_16V4Z

1 1 1 1 2
1

2
R448

C158

2 R590
1

R12

R26
C569

C206

C203

C177

C945

C171

C473

R433
@ 0_0402_5%
1 2
2

2 2 2
2

1
2

1
@
CBS_CAD[0..31] <<29>>
B CBS_CAD31 B
CBS_CAD30
Place near NCN6000 Place near connector CBS_CAD29
CBS_CAD28
CBS_CAD27
CBS_CCLK CBS_CAD26
CBS_CCLK <<29>>
CBS_CC/BE3# CBS_CAD25
CBS_CC/BE3# <<29>>
L71 CBS_CC/BE2# CBS_CAD24
CBS_CC/BE2# <<29>>
1000P_0402_50V7K~L
0.1U_0402_16V4Z~L

BLM31A260SPT_1206~L CBS_CC/BE1# CBS_CAD23

CBS_CC/BE1# <<29>>
10U_1206_6.3V7K~L

TPS2211VCC 1 2 CBS_CC/BE0# CBS_CAD22

CBS_VCC CBS_CC/BE0# <<29>>
CBS_CAD21
1 1 1 CBS_CRST# CBS_CAD20
CBS_CRST# <<29>>
C485

C486

1 CBS_CFRAME# CBS_CAD19
CBS_CFRAME# <<29>>
C490

U51 C507 CBS_CIRDY# CBS_CAD18

CBS_CIRDY# <<29>>
TPS2211ADBR_SSOP16~L 4.7U_1206_16V6K~L CBS_CTRDY# CBS_CAD17
2 2 2 CBS_CTRDY# <<29>>
13 CBS_CDEVSEL# CBS_CAD16
AVCC1 2 CBS_CDEVSEL# <<29>>
12 CBS_CSTOP# CBS_CAD15
AVCC2 CBS_CSTOP# <<29>>
4.7U_1206_16V6K~L

0.1U_0402_16V4Z~L

9 11 CBS_CPERR# CBS_CAD14
+12V 12V AVCC3 CBS_CPERR# <<29>>
1 CBS_CSERR# CBS_CAD13
CBS_VPP CBS_CSERR# <<29>>
C559 1 1 CBS_CPAR CBS_CAD12
CBS_CPAR <<29>>
C562

C487

0.1U_0402_16V4Z~L CBS_CREQ# CBS_CAD11

CBS_CREQ# <<29>>
SHDN# VPPD1 VPPD0 CBS_VPP CBS_CAD10
2 10 CBS_CGNT# CBS_CAD9
AVPP 2 2 CBS_CGNT# <<29>>
1 0 0 CBS_CSTSCHNG CBS_CAD8
CBS_CSTSCHNG <<29>>
5 CBS_CCLKRUN# CBS_CAD7
+5VSUS 5V_1 CBS_CCLKRUN# <<29>>
1 6 1 0 1 CBS_CBLOCK# CBS_CAD6
5V_2 CBS_CBLOCK# <<29>>
C567 CBS_CINT# CBS_CAD5
CBS_CINT# <<29>>
0.1U_0402_16V4Z~L 1 CBS_VCCD0# 1 1 0 CBS_CAUDIO CBS_CAD4
VCCD0# CBS_VCCD0# <<29>> CBS_CAUDIO <<29>>
2 CBS_VCCD1# CBS_CVS2 CBS_CAD3
2 VCCD1# CBS_VCCD1# <<29>> CBS_CVS2 <<29>>
15 CBS_VPPD0 1 1 1 CBS_CVS1 CBS_CAD2
VPPD0 CBS_VPPD0 <<29>> CBS_CVS1 <<29>>
14 CBS_VPPD1 CBS_CAD1
VPPD1 CBS_VPPD1 <<29>>
AVPP:150mA 0 X X CBS_CAD0
A 3 CBS_RSVD/D14 A
+3VSUS 3.3V_1 CBS_RSVD/D14 <<29>>
1 4 8 CBS_RSVD/D2
SHDN#

3.3V_2 OC# CBS_RSVD/D2 <<29>>

C566 SHDN# VCCD1# VCCD0# CBS_VCC CBS_RSVD/A18
GND

CBS_RSVD/A18 <<29>>
0.1U_0402_16V4Z~L

2 1 0 0
CBS_CCD1#
DELL CONFIDENTIAL/PROPRIETARY
7

16

CBS_CCD1# <<29>>
1 0 1 CBS_CCD2#
CBS_CCD2# <<29>> Compal Electronics, Inc.
1 1 0 Title
SUSPWROK_5V <<40,45,46>>
1 1 1 CardBus Socket
Size Document Number Rev
AVCC:1A 0 X X 3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 30 of 59
5 4 3 2 1
 5 4 3 2 1

<<18,27,29,32>> PCI_AD[0..31]
+3VRUN +3VRUN
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4 JPCI
PCI_AD5 1 2
PCI_AD6 TIP RING
PCI_AD7
PCI_AD8 3 4
PCI_AD9 8PMJ-3 8PMJ-1
5 6
PCI_AD10 8PMJ-6 8PMJ-2
7 8
PCI_AD11 9 8PMJ-7 8PMJ-4 10
D PCI_AD12 WLAN_LED_ACTIVITY 8PMJ-8 8PMJ-5 LED_WLAN24_RADIOSTATE D
11 12 LED_WLAN24_RADIOSTATE <<28,34>>
PCI_AD13 <<28>> WLAN_LED_ACTIVITY HW_RADIO_DIS# LED1_GRNP LED2_YELP LED_WLAN5_RADIOSTATE
<<26,35>> HW_RADIO_DIS#
13 14 LED_WLAN5_RADIOSTATE <<28>>
PCI_AD14 15 LED1_GRNN LED2_YELN 16
PCI_AD15 PCI_PIRQD# CHSGND RESERVED
17 18 +5VRUN
PCI_AD16 <<18,29>> PCI_PIRQD# INTB# 5V PCI_PIRQB#
19 20 PCI_PIRQB# <<16,18,32>>
PCI_AD17 21 3.3V INTA# 22
PCI_AD18 RESERVED RESERVED
23 24 V_3P3_LAN
PCI_AD19 CK_33M_MINIPCI GROUND 3.3VAUX PCIRST_2#
<<6>> CK_33M_MINIPCI 25 26 PCIRST_2# <<18,29>>
PCI_AD20 CLK RST#
27 28 2 2
PCI_AD21 PCI_REQ3# GROUND 3.3V PCI_GNT3# C140 C483
29 30 PCI_GNT3# <<18>>
PCI_AD22 <<18>> PCI_REQ3# REQ# GNT# 0.1U_0402_16V4Z~L 0.1U_0402_16V4Z~L
31 32
PCI_AD23 PCI_AD31 3.3V GROUND SYS_PME#
33 34 SYS_PME# <<27,29,32,34>>
PCI_AD24 PCI_AD29 35 AD31 PME# 36 R766 1 2 1 1
AD29 RESERVED COEX1_BT_ACTIVE <<26>>
PCI_AD25 37 38 1@0_0402_5%~D PCI_AD30 R767
PCI_AD26 R768 PCI_AD27 GROUND AD30 1@10K_0402_5%~D
39 40
PCI_AD27 @ 0_0402_5%~D PCI_AD25 41 AD27 3.3V 42 PCI_AD28 2 1
PCI_AD28 AD25 AD28 PCI_AD26
<<26>> COEX2_WLAN_ACTIVE 1 2 43 44
PCI_AD29 PCI_C_BE3# RESERVED AD26 PCI_AD24
<<18,27,29,32>> PCI_C_BE3# 45 46
PCI_AD30 PCI_AD23 C/BE3# AD24 MINIDSEL PCI_AD19
47 48 1 2
PCI_AD31 AD23 IDSEL
49 50
PCI_AD21 GROUND GROUND PCI_AD22 R447
51 52
PCI_AD19 AD21 AD22 PCI_AD20 100_0603_5%~L
53 54
CK_33M_MINIPCI 55 AD19 AD20 56 PCI_PAR
GROUND PAR PCI_PAR <<18,27,29,32>>
PCI_AD17 57 58 PCI_AD18
AD17 AD18
2

PCI_C_BE2# 59 60 PCI_AD16
<<18,27,29,32>> PCI_C_BE2# C/BE2# AD16
R443 PCI_IRDY# 61 62
<<18,27,29,32,33>> PCI_IRDY# IRDY# GROUND
10_0402_5% 63 64 PCI_FRAME#
3.3V FRAME# PCI_FRAME# <<18,27,29,32,33>>
@ CLKRUN# 65 66 PCI_TRDY#
<<18,27,29,34>> CLKRUN# CLKRUN# TRDY# PCI_TRDY# <<18,27,29,32>>
PCI_SERR# 67 68 PCI_STOP#
1

<<18,27,29,32>> PCI_SERR# SERR# STOP# PCI_STOP# <<18,27,29,32>>

69 70
PCI_PERR# GROUND 3.3V PCI_DEVSEL#
<<18,27,29,32>> PCI_PERR# 71 72 PCI_DEVSEL# <<18,27,29,32>>
PCI_C_BE1# PERR# DEVSEL#
73 74
CK_33M_MINPCI_TERM

C <<18,27,29,32>> PCI_C_BE1# C/BE1# GROUND C

PCI_AD14 75 76 PCI_AD15
AD14 AD15 PCI_AD13
77 78
PCI_AD12 GROUND AD13 PCI_AD11
79 80
PCI_AD10 81 AD12 AD11 82
AD10 GROUND PCI_AD9
83 84
PCI_AD8 GROUND AD9 PCI_C_BE0#
85 86 PCI_C_BE0# <<18,27,29,32>>
PCI_AD7 AD8 C/BE0#
87 88
89 AD7 3.3V 90 PCI_AD6
PCI_AD5 3.3V AD6 PCI_AD4
91 92
AD5 AD4 PCI_AD2
93 94
PCI_AD3 95 RESERVED AD2 96 PCI_AD0
AD3 AD0 LAN_SMBCLK
97 98
+5VRUN 5V RESERVED
2

C493 PCI_AD1 99 100 LAN_SMBDATA R200

4.7P_0402_50V8C 101 AD1 RESERVED 102 1K_0402_5%~L
@ GROUND GROUND MPCI_M66EN
103 104 2 1
1

AC_SYNC M66EN
105 106
AC_SDATA_IN AC_SDATA_OUT
107 108 MPCI_M66EN <<34>>
109 AC_BIT_CLK AC_CODEC_ID0# 110
AC_CODEC_ID1# AC_RESET#
111 112
MOD_AUDIO_MON RESERVED
113 114
AUDIO_GND GROUND
115 116
SYS_AUDIO_OUT SYS_AUDIO_IN R201
117 118
SYS_AUDIO_OUT GND SYS_AUDIO_IN GND 10K_0402_5%~L
119 120
121 AUDIO_GND AUDIO_GND 122 MPCIACT# 1 2
RESERVED MCPIACT# +3VSUS
123 124 V_3P3_LAN
VCC5A 3.3VAUX
AMP_1318644-1~L
2
C209
0.1U_0402_16V4Z~L
1
B B

V_3P3_LAN

2
R601 R602
10K_0402_5%~L 10K_0402_5%~L

1
S

ICH_SMBDATA 3 1 NIC_MINI_SMBDAT 1 3 LAN_SMBDATA

D

S
<<6,14,15,19>> ICH_SMBDATA LAN_SMBDATA <<27>>
Q59 Q49
2N7002_SOT23~L 2N7002_SOT23~L
+3VSUS
G

G
2

2
2

2
G

Q47
ICH_SMBCLK 3 1 NIC_MINI_SMBCLK 1 3 2N7002_SOT23~L LAN_SMBCLK
<<6,14,15,19>> ICH_SMBCLK LAN_SMBCLK <<27>>
Q60
S

2N7002_SOT23~L
A A
+3VRUN

2
C491
2
C496
2
C565
2
C574
2
C497
2
C568
2
C572
2
C488
2
C504 DELL CONFIDENTIAL/PROPRIETARY
0.047U_0402_16V4M~L 0.047U_0402_16V4M~L 0.047U_0402_16V4M~L 0.047U_0402_16V4M~L 0.047U_0402_16V4M~L 0.047U_0402_16V4M~L 0.047U_0402_16V4M~L 0.047U_0402_16V4M~L 0.047U_0402_16V4M~L
Compal Electronics, Inc.
1 1 1 1 1 1 1 1 1 Title
MINIPCI
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 31 of 59
5 4 3 2 1
 5 4 3 2 1

+5VRUN

D24 D23
RB751V_SOD323~L RB751V_SOD323~L
2 1 +5V_QDOCK1 2 1 +5V_QDOCK
1

1
C40 C43
U34 2@ 0.1U_0402_16V4Z~L R38 0.1U_0402_16V4Z~L
QUIETE# 39 40 1 2 1K_0402_5%~L
OE1 VCC2 2
29 30
OE2 VCC1

2
PCI_AD31 2 38 DOCK_AD31 U33
D PCI_AD30 A0 B0 DOCK_AD30 D
3 37 20
PCI_AD29 A1 B1 DOCK_AD29 VCC
4 36
PCI_AD28 5 A2 B2 35 DOCK_AD28 PCI_REQ0# 2 18 DOCK_REQ0#
PCI_AD27 A3 B3 DOCK_AD27 <<18>> PCI_REQ0# PCI_GNT0# A0 B0 DOCK_GNT0#
6 34 <<18,33>> PCI_GNT0# 3 17
PCI_AD26 A4 B4 DOCK_AD26 SYS_PME# A1 B1 DOCK_SPME#
7 33 <<27,29,31,34>> SYS_PME# 4 16
PCI_AD25 8 A5 B5 32 DOCK_AD25 PCI_AD24 5 A2 B2 15 DOCK_PCI_IDSEL
PCI_AD24 A6 B6 DOCK_AD24 PCI_PLOCK# A3 B3 DOCK_LOCK#
9 31 <<18>> PCI_PLOCK# 6 14
A7 B7 A4 B4 R39
7 13
PCI_AD23 DOCK_AD23 PCIRST_DOCK# A5 B5 DOCK_PCIRST# 0_0402_5%~L
12 28 <<18>> PCIRST_DOCK# 8 12
PCI_AD22 A8 B8 DOCK_AD22 CK_33M_DOCKPCI A6 B6 DOCK33M
13 27 <<6>> CK_33M_DOCKPCI 9 11 1 2 DOCK_CLK_SPCI <<33>>
PCI_AD21 A9 B9 DOCK_AD21 A7 B7
14 26
PCI_AD20 A10 B10 DOCK_AD20 QBUFEN#
15 25 <<35>> QBUFEN# 19 10
PCI_AD19 16 A11 B11 24 DOCK_AD19 OE# GND
PCI_AD18 A12 B12 DOCK_AD18
17 23 DOCK_AD[0..31] <<33>>
PCI_AD17 A13 B13 DOCK_AD17 QS3245_QSOP20~L
18 22

1
PCI_AD16 19 A14 B14 21 DOCK_AD16
A15 B15 DOCK_AD0
1 10 R40 DOCK_AD1
NC1 GND1 33_0402_5% DOCK_AD2
11 20
NC2 GND2 @ DOCK_AD3

2
DOCK_AD4
QS32X245Q2_QVSOP40~L DOCK_AD5
2@ DOCK_AD6
DOCK_AD7

CK_33M_DOCKPCI_TERM
C659 DOCK_AD8
U36 2@ 0.1U_0402_16V4Z~L DOCK_AD9
39 40 1 2 DOCK_AD10
OE1 VCC2 DOCK_AD11
29 30
OE2 VCC1 DOCK_AD12
C PCI_AD15 2 38 DOCK_AD15 DOCK_AD13 C
PCI_AD14 A0 B0 DOCK_AD14 DOCK_AD14
3 37
PCI_AD13 A1 B1 DOCK_AD13 DOCK_AD15
4 36
PCI_AD12 5 A2 B2 35 DOCK_AD12
A3 B3

1
PCI_AD11 6 34 DOCK_AD11 C42
PCI_AD10 A4 B4 DOCK_AD10 22P_0402_50V8J
7 33
PCI_AD8 A5 B5 DOCK_AD8 @ DOCK_AD16
8 32

2
PCI_AD9 9 A6 B6 31 DOCK_AD9 DOCK_AD17
A7 B7 DOCK_AD18
PCI_AD7 12 28 DOCK_AD7 DOCK_AD19
PCI_AD6 13 A8 B8 27 DOCK_AD6 DOCK_AD20
PCI_AD5 A9 B9 DOCK_AD5 DOCK_AD21
14 26
PCI_AD4 A10 B10 DOCK_AD4 DOCK_AD22
15 25
PCI_AD3 16 A11 B11 24 DOCK_AD3 DOCK_AD23
PCI_AD2 A12 B12 DOCK_AD2
17 23
PCI_AD1 A13 B13 DOCK_AD1
18 22
PCI_AD0 A14 B14 DOCK_AD0
19 21
A15 B15 DOCK_AD24
1 10 DOCK_AD25
NC1 GND1 DOCK_AD26
11 20
NC2 GND2 DOCK_AD27
<<18,27,29,31>> PCI_AD[0..31]
DOCK_AD28
QS32X245Q2_QVSOP40~L DOCK_AD29
2@ DOCK_AD30
DOCK_AD31

DOCK_C_BE0#
DOCK_C_BE0# <<33>>
DOCK_C_BE1#
DOCK_C_BE1# <<33>>
C41 DOCK_C_BE2#
DOCK_C_BE2# <<33>>
U35 0.1U_0402_16V4Z~L DOCK_C_BE3#
DOCK_C_BE3# <<33>>
39 40 1 2
OE1 VCC2
29 30
B OE2 VCC1 DOCK_DEVSEL# B
DOCK_DEVSEL# <<33>>
PCI_C_BE0# 2 38 DOCK_C_BE0# DOCK_STOP#
<<18,27,29,31>> PCI_C_BE0# A0 B0 DOCK_STOP# <<33>>
PCI_C_BE1# 3 37 DOCK_C_BE1#
<<18,27,29,31>> PCI_C_BE1# A1 B1
PCI_C_BE2# 4 36 DOCK_C_BE2# DOCK_PIRQB#
<<18,27,29,31>> PCI_C_BE2# A2 B2 DOCK_PIRQB# <<33>>
PCI_C_BE3# 5 35 DOCK_C_BE3#
<<18,27,29,31>> PCI_C_BE3# A3 B3
PCI_DEVSEL# 6 34 DOCK_DEVSEL# DOCK_FRAME#
<<18,27,29,31>> PCI_DEVSEL# A4 B4 DOCK_FRAME# <<33>>
PCI_STOP# 7 33 DOCK_STOP# DOCK_SERR#
<<18,27,29,31>> PCI_STOP# A5 B5 DOCK_SERR# <<33>>
8 32 DOCK_IRDY#
A6 B6 DOCK_IRDY# <<33>>
PCI_PIRQB# 9 31 DOCK_PIRQB# DOCK_PERR#
<<16,18,31>> PCI_PIRQB# A7 B7 DOCK_PERR# <<33>>
+3VRUN DOCK_TRDY#
DOCK_TRDY# <<33>>
PCI_FRAME# 12 28 DOCK_FRAME# DOCK_PAR
<<18,27,29,31,33>> PCI_FRAME# A8 B8 DOCK_PAR <<33>>
PCI_PAR 13 27 DOCK_PAR
<<18,27,29,31>> PCI_PAR A9 B9
PCI_IRDY# 14 26 DOCK_IRDY#
<<18,27,29,31,33>> PCI_IRDY# A10 B10
PCI_PERR# 15 25 DOCK_PERR# 1
<<18,27,29,31>> PCI_PERR# A11 B11
2
PCI_TRDY# 16 24 DOCK_TRDY# C31
<<18,27,29,31>> PCI_TRDY# A12 B12
PCI_SERR# 17 23 DOCK_SERR# 0.1U_0402_16V4Z~L
<<18,27,29,31>> PCI_SERR# A13 B13
18 22 R36 2@ DOCK_REQ0#
A14 B14 2 DOCK_REQ0# <<33>>
19 21 100K_0402_5%~L DOCK_GNT0#
A15 B15 DOCK_GNT0# <<33>>
2@ DOCK_SPME#
DOCK_SPME# <<33>>
1

5
1 10 U3
NC1 GND1 2@ TC7SH32FU_SSOP5~L DOCK_LOCK#
11 20

P
NC2 GND2 DOCK_LOCK# <<33>>
DOCK_PCI_EN# 1
<<33>> DOCK_PCI_EN# INB
4 QUIETE# DOCK_PCIRST#
OUTY DOCK_PCIRST# <<33>>
QS32X245Q2_QVSOP40~L QBUFEN# 2
<<35>> QBUFEN# INA
2@
G

DOCK_PCI_IDSEL
DOCK_PCI_IDSEL <<33>>
3

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
DOCKING BUFFER
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 32 of 59
5 4 3 2 1
 5 4 3 2 1

DOCK_PWR_SRC
JDOCKA JDOCKB JDOCKC
1 69 DOCK_DET# 137 205 DOCK_DET# P1 P5 DOCK_DC_IN
S1 S69 M_SEN# <<16,17>> S137 S205 P1 P5 DOCK_DC_IN <<42>>
2 70 VGA_RED VGA_GRN 138 206
S2 S70 S138 S206 DAT_DDC2 <<16,17>>
<<16>> DVI_CLK- 3 71 139 207 CLK_DDC2 <<16,17>> P2 P6
4 S3 S71 72 VGA_BLU 140 S139 S207 208 P2 P6
<<16>> DVI_CLK+ S4 S72 S140 S208
5 73 141 209 HSYNC P3 P7
S5 S73 D_SERIRQ <<34>> S141 S209 P3 P7
6 74 D_LAD1 142 210 VSYNC
S6 S74 DOCK_PCI_IDSEL <<32>> <<34>> D_LAD1 S142 S210

2
7 75 D_LAD2 143 211 P4 P8 C291
<<16>> DVI_TX4- S7 S75 <<34>> D_LAD2 S143 S211 P4 P8

0.1U_0805_50V7M~L
8 76 D_LAD3 144 212 0.1U_0805_50V7M~L
D <<16>> DVI_TX4+ S8 S76 <<34>> D_LAD3 S144 S212 D_CLKRUN# <<34>> D
9 77 145 213 D_LAD0

1
S9 S77 D_DLRQ1# <<34>> S145 S213 D_LAD0 <<34>>
10 78 DOCK_AD1 146 214 DOCK_SIO_ALERT# MH1 MH2
D_LFRAME# <<34>> DOCK_SIO_ALERT# <<34>>

2
S10 S78 S146 S214 MH1 MH2

C341
11 79 DOCK_AD0 147 215
<<16>> DVI_TX3+ S11 S79 S147 S215
12 80 148 216 DOCK_AD2 MH5 MH7
<<16>> DVI_TX3- S12 S80 S148 S216 SHLD1 SHLD3
13 81 DOCK_AD3 149 217 DOCK_AD5

1
S13 S81 DVI_SCLK <<16>> S149 S217
82 DOCK_AD4 150 218 DOCK_AD6 MH6 MH8
S82 DVI_SDAT <<16>> S150 S218 SHLD2 SHLD4
15 83 DOCK_AD7 151
<<42>> PS_ID S15 S83 DVI_DETECT <<16>> S151
84 DOCK_AD8 152 220 MH9 MH11
S84 DOCK_C_BE0# DOCK_AD9 S152 S220 SHLD5 SHLD7
17 85 DOCK_C_BE0# <<32>> 153
S17 S85 DOCK_AD10 S153 DOCK_AD12
<<16>> DVI_TX5+ 18 86 154 222 MH10 MH12
S18 S86 DOCK_AD11 S154 S222 DOCK_AD13 SHLD6 SHLD8
<<16>> DVI_TX5- 19 87 155 223
S19 S87 DOCK_AD14 S155 S223 DOCK_C_BE1# PWR_SRC
20 88 156 224 DOCK_C_BE1# <<32>>
21 S20 S88 89 DOCK_AD15 157 S156 S224 225
S21 S89 <<32>> DOCK_PAR S157 S225 DOCK_PERR#
<<16>> DVI_TX2+ 22 90 158 226 DOCK_PERR# <<32>> MH3 MH4
S22 S90 <<32>> DOCK_SERR# S158 S226 DOCK_STOP# MH3 MH4
<<16>> DVI_TX2- 23 91 159 227 DOCK_STOP# <<32>> MH13 MH14
S23 S91 <<32>> DOCK_LOCK# S159 S227 DOCK_TRDY# MH13 MH14
24 92 DOCK_DEVSEL# <<32>> 160 228 DOCK_TRDY# <<32>> MH15 MH16
S24 S92 S160 S228 MH15 MH16 C336
25 93 DOCK_IRDY# <<32>> <<32>> DOCK_FRAME# 161 229 +
S25 S93 DOCK_C_BE2# S161 S229 DOCK_AD17 22uF_35V_10%
<<16>> DVI_TX1+ 26 94 <<32>> DOCK_C_BE2# 162 230
S26 S94 DOCK_AD16 S162 S230 DOCK_AD18 AMP_1473681~L @
<<16>> DVI_TX1- 27 95 163 231
S27 S95 DOCK_AD19 S163 S231 DOCK_AD21
28 96 164 232
S28 S96 DOCK_AD20 DOCK_AD22 S164 S232
29 97 165 233
S29 S97 DOCK_AD23 S165 S233 DOCK_C_BE3#
<<16>> DVI_TX0+ 30 98 166 234 DOCK_C_BE3# <<32>>
31 S30 S98 99 DOCK_AD24 167 S166 S234 235 DOCK_AD25
<<16>> DVI_TX0- S31 S99 S167 S235
32 100 DOCK_AD27 168 236 DOCK_AD26
S32 S100 DOCK_AD28 DOCK_AD29 S168 S236 DOCK_AD0
33 101 169 237
DOCK_AD31 34 S33 S101 102 DOCK_AD30 170 S169 S237 238 DOCK_REQ0# DOCK_AD1
S34 S102 <<32>> DOCK_SPME# S170 S238 DOCK_REQ0# <<32>>
35 103 171 239 DOCK_PCIRST# DOCK_AD2
<<32>> DOCK_CLK_SPCI S35 S103 DOCK_GNT0# <<32>> S171 S239 DOCK_PCIRST# <<32>>
36 104 TV_C 172 240 DOCK_AD3
<<32>> DOCK_PIRQB# S36 S104 USBP5_D- S172 S240 TV_CVBS DOCK_AD4
37 105 USBP5_D- <<25>> 173 241
38 S37 S105 106 USBP5_D+ 174 S173 S241 242 DOCK_AD5
S38 S106 USBP5_D+ <<25>> <<32>> DOCK_PCI_EN# S174 S242
39 107 SPDIF_DOCK 175 243 TV_Y DOCK_AD6
<<35>> DOCK_SMB_CLK S39 S107 <<17>> SPDIF_DOCK S175 S243 DOCK_AD7
<<35>> DOCK_SMB_DAT 40 108 DOCK_SMB_INT# <<35>> 176 244
C 41 S40 S108 109 DOCK_LED_10# 177 S176 S244 245 DOCK_LED_1000# DOCK_AD8 C
<<35>> CLK_SM1 S41 S109 CLK_KBD <<35>> <<28>> DOCK_LED_10# S177 S245 DOCK_LED_1000# <<27,28>>
42 110 DOCK_LED_100# 178 246 LAN_ACT# DOCK_AD9
<<35>> DAT_SM1 S42 S110 DAT_KBD <<35>> <<28>> DOCK_LED_100# S178 S246 LAN_ACT# <<27,28>>
43 111 179 247 DOCK_AD10
S43 S111 S179 S247
112 V_2P5_LAN +3VRUN 2 1 DOCK_OWNS_PCI 180 248 R_PIDEACT
R_PIDEACT <<39>>
DOCK_AD11
S112 R34 S180 S248 DOCK_AD12
45 113 181
S45 S113 0_0603_5%~L R752 S181 DOCK_AD13
114 182 250
S114 @ 100K_0402_5%~L S182 S250 DOCK_AD14
47 115 2 1 183
48 S47 S115 116 C32 C34 184 S183 252 DOCK_AD15
S48 S116 0.01U_0402_16V7K~L 0.01U_0402_16V7K~L S184 S252 DOCK_AD16
49 117 185 253
S49 S117 S185 S253 DOCK_AD17
50 118 1 2 2 1 186 254
51 S50 S118 119 187 S186 S254 255 DOCK_AD18
S51 S119 C33 C35 S187 S255 DOCK_AD19
52 120 188 256
S52 S120 0.01U_0402_16V7K~L 0.01U_0402_16V7K~L S188 S256 DOCK_AD20
53 121 189 257
54 S53 S121 122 1 2 2 1 190 S189 S257 258 DOCK_AD21
S54 S122 S190 S258 DOCK_AD22
55 259
S55 S259 DOCK_AD23
125 DOCK_LAN_TX3- <<28>> 193
S125 <<28>> DOCK_LAN_RX- S193 DOCK_AD24
126 DOCK_LAN_TX3+ <<28>> <<28>> DOCK_LAN_RX+ 194
S126 127 195 S194 DOCK_AD25
S127 DOCK_LAN_TX2- <<28>> <<28>> DOCK_LAN_TX- S195
128 196 DOCK_AD26
S128 DOCK_LAN_TX2+ <<28>> <<28>> DOCK_LAN_TX+ S196 DOCK_AD27
136 DOCK_RING DOCK_TIP 204 DOCK_AD28
M136 M204 DOCK_AD29
AMP_1473681~L AMP_1473681~L DOCK_AD30
DOCK_AD31
2

2
100_0603_5%

100_0603_5%

PLACE TERMINATIONS CLOSE TO DOCK CONNECTOR DOCK_AD[0..31] <<32>>

R18

R19
1

@ @ Q34
FDS4435_SO8~L
B U18 +3VRUN 8 B
DOCK_PWR_SRC
PWR_SRC
1 7
1 5 +3VRUN 2 6
NC VCC
05/07 2 3 5
C348 R346
<<18,32>> PCI_GNT0#
PCI_GNT0# 2 Item 122 +3VALW 0.47U_1812_50V7M~L 100K_0603_5%~D
IN A U17

4
5

2@ TC7SH08FU_SSOP5~L 1

2
3 4 Z3305 1 +5VALW
P

GND OUT Y IN1 DOCK_OWNS_PCI R362 G_DOC_PWRSRC

4
+3VRUN O 100K_0402_5%~L
2
G

TC7SH04FU_SSOP5~L IN2
2@ R377
NB no power dock
3

1
U14 100K_0402_5%~L
DOCKED <<27,28,35>>
5

2@ TC7SH08FU_SSOP5~L R343

1
PCI_IRDY# 1 100K_0402_5%~L
P

<<18,27,29,31,32>> PCI_IRDY#
1

IN1 Z3306 Q43

4
PCI_FRAME# O DTC144EKA_SC59~D
2

2
<<18,27,29,31,32>> PCI_FRAME#
G

IN2
DOCK_DET# 2
3

Z3307
PWR_SRC self power dock
TV_C
3

<<16,17>> TV_C

TV_Y
<<16,17>> TV_Y
U41

3
TV_CVBS SN74AHCT1G08DCKR_SC70-5~L
<<16,17>> TV_CVBS

1
JPH_WIRE D
2

G
B Z3308 Q38
4 2
A VGA_RED DOCK_PWR_EN Y 2N7002_SOT23~L A
<<16,17>> VGA_RED 7 <<35>> DOCK_PWR_EN 1 G
7 A

P
DOCK_RING 6 S

3
6

100K_0402_5%~L
5 5
VGA_GRN DOCK_TIP 4 5 9
<<16,17>> VGA_GRN 4 9
8 8/12 Changed by +3VSUS
8
Dell's Required DELL CONFIDENTIAL/PROPRIETARY

R363
VGA_BLU 1
<<16,17>> VGA_BLU 1
JST_SM07B-SRSS-TB~D
Compal Electronics, Inc.
VSYNC 1 2 Title
<<16,17>> VSYNC
R616
DOCKING CONN.
HSYNC @ 0_0603_5%~L Size Document Number Rev
<<16,17>> HSYNC 3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 33 of 59
5 4 3 2 1
 5 4 3 2 1

+3VALW

1
10K_0402_5%~L

10K_0402_5%~L

10K_0402_5%~L

10K_0402_5%~L

10K_0402_5%~L
R497

R270

R269

R268

R271
+3VRUN

1
DOCK_SIO_ALERT# +3VRUN
DOCK_SIO_ALERT# <<33>>
PWRSW_SIO# R274
ATF_INT# U27A R244 100K_0402_5%~L
SYS_PME# 4.7K_0402_5%~L +3VRUN
DEBUG_ENABLE H4 LPCPD# 1 2

2
LPCPD# H3 PCIRST_SIO#
D LRESET# PCIRST_SIO# <<18>> D
CBS_GRST# F13
<<29>> CBS_GRST# HP_NB_SENSE SGPIO30 D_DLRQ1#
F14 R2
D27
RB751V_SOD323~L
<<24>> HP_NB_SENSE
<<49>> 65W
65W
VAUX_EN
E16
E15
SGPIO31
SGPIO32 LPC47N254 DLDRQ1#
DLFRAME#
T2 D_LFRAME#
D_LFRAME# <<33>>
D_DLRQ1# <<33>>

KSO_17 <<40>> VAUX_EN KSO17 SGPIO33 D_LAD0

2 1 E12 N2
<<36,39>> KSO_17 USB_EN# E13 SGPIO34 MACALLEN DLAD0 P1 D_LAD1 D_LAD0 <<33>>
<<25>> USB_EN# SGPIO35 DLAD1 D_LAD1 <<33>>

1
BAY_MODPRES# D16 P2 D_LAD2
<<22>> BAY_MODPRES# SGPIO36 DLAD2 D_LAD2 <<33>>
USB_IDE# D_LAD3 R275 R276
T255
<<22>> USB_IDE# D15
SGPIO37 DOCK LPC DLAD3
N3
R4 D_SERIRQ D_LAD3 <<33>> 100K_0402_5%~L 100K_0402_5%~L
DSER_IRQ D_SERIRQ <<33>>
PAD T3 D_CLKRUN#
DCLKRUN# D_CLKRUN# <<33>>

2
R361 R3 LPC_LDRQ1#
LPC_LDRQ1# <<19>>
1

0_0402_5%~L D SIO_EXT_SMI# E14 LDRQ1# N4 LPC_LFRAME# D_CLKRUN#

<<20>> SIO_EXT_SMI# SGPIO40 LFRAME# LPC_LFRAME# <<19>>
Q100 SIO_EXT_SCI#
<<31>> MPCI_M66EN 2 1 2
G 2N7002_SOT23~L <<20>> SIO_EXT_SCI# SIO_EXT_RTE#
C16
C15
SGPIO41 LPC M3 LPC_LAD0
LPC_LAD[0..3] <<19>>
D_SERIRQ
<<20>> SIO_EXT_RTE# SIO_RCIN# SGPIO42 LAD0 LPC_LAD1
S A16 R1
3

J1397 <<18>> SIO_RCIN# NB_MUTE SGPIO43 LAD1 LPC_LAD2

D14 T1
@ 1.5mm SMT <<24>> NB_MUTE BEEP SGPIO44 LAD2 LPC_LAD3
<<24>> BEEP
1 DEBUG_ENABLE
C14
C13
SGPIO45 8051 LAD3
P3
T4 IRQ_SERIRQ
1 SGPIO46 SER_IRQ IRQ_SERIRQ <<18,29>>
2 DEBUG_OUT B14 P5 CLKRUN#
2
3
SGPIO47 GPIO CLKRUN# CLKRUN# <<18,27,29,31>>
RN5
R360 3 10K_8P4R_1206_5%~L
0_0402_5%~L L3 WRPRT# 1 8
WPROT# +5VRUN
<<28,31>> LED_WLAN24_RADIOSTATE 2 1 M1 RDATA# 2 7
T259 RDATA#
L2 3 6
PAD HDSEL# L5 INDEX# 4 5
PWRSW_SIO# T5
FDD INDEX#
M2 DISKCHG#
<<40>> PWRSW_SIO# LGPIO50 DSKCHG#
SIO_SLP_S3# N6 L4 TRK0# 1 2
<<20>> SIO_SLP_S3# LGPIO51 TRK0#
SYS_PME# L6 K1
<<27,29,31,32>> SYS_PME# LGPIO52 MTR0#
ATF_INT# R6 K2 R263
<<13>> ATF_INT# LGPIO53 DIR#
SIO_SLP_S5# T6 K4 10K_0402_5%~L
+3VALW <<20>> SIO_SLP_S5# LGPIO54 STEP#
SPDIF_SHDN L7 K3
C <<17,23>> SPDIF_SHDN LID_CL_SIO# LGPIO55 WDATA# C
P7 L1
DOCK_SIO_ALERT# LGPIO56 WGATE# +3VALW
N7 K5
LGPIO57 DS0#
M5
SIO_PWRBTN# A15 FPD J7
<<20>> SIO_PWRBTN# RUN_ON LGPIO60 DRVDEN0
D13 K7
<<16,37,40,44,48>>
R784 RUN_ON ICH_PME# LGPIO61 DRVDEN1
A14
100K_0402_5%~D <<18>> ICH_PME# SIO_THRM# LGPIO62
<<20>> SIO_THRM# C12
+3VALW SUS_ON B13 LGPIO63 G5 RXD0
<<40,48>> SUS_ON LGPIO64 RXD1 RXD0 <<37>>

1
SYS_SUSPEND TXD0
<<16,42>> SYS_SUSPEND SATA_DET#
A13
D12
LGPIO65 LPC TXD1
G2
H7 RTS0#
TXD0 <<37>>
R282
<<22>> SATA_DET# RTS0# <<37>>
2

LGPIO66 RTS1#
10K_0402_5%

DH_PWRSRC_OC F11 H8 CTS0# 100K_0402_5%~L

<<25>> DH_PWRSRC_OC LGPIO67 GPIO CTS# DTR0#
CTS0# <<37>>
COM1 DTR#
H6 DTR0# <<37>>
R405

IDE_RST_HDD B12 G1 DSR0#

2
<<20>> IDE_RST_HDD LGPIO70 DSR# DSR0# <<37>>
IDE_RST_MOD A12 H5 DCD0#
<<20>> IDE_RST_MOD LGPIO71 DCD# DCD0# <<37>>
GC_BL_SUSPEND C11
1

<<16>> GC_BL_SUSPEND DH_POWER_EN LGPIO72 RI0# R283

D11 B10 RI0# <<20,37>>
<<25>> DH_POWER_EN DH_USBPWR_EN# LGPIO73 RI1# 10_0402_5%~L
<<25>> DH_USBPWR_EN# E11
T222 PAD NC_SIO_B11 B11 LGPIO74 LID_CL_SIO# 2 1 LID_CL#
RTC_ICH LGPIO75 LID_CL# <<39>>
MODC_EN# A11
<<40>> MODC_EN# HDDC_EN# LGPIO76 D_IRMODE
C10 H15 D_IRMODE <<39>>
<<40>> HDDC_EN# LGPIO77 GPIO10/WK_SE14/IRMODE/IRRX3B IRRX
K14 IRRX <<39>>
IRRX IRTX
RTC_ICH 2 1 254VCC0 A4
IR IRTX
M4 IRTX <<39>>
VCC0/BAT
2

R228 C219 1
0_0402_5%~L 0.1U_0805_50V7M~L C1 ACK# C272
ACK# ACK# <<37>> 0.047U_0402_16V4M~L
F2 SLCT_IN#
1

SLCTIN# SLCT_IN# <<37>>

F1 INIT#
INIT# INIT# <<37>> 2
G3 AFD#
ALF# AFD# <<37>>
G4 STRB#
STROBE# STRB# <<37>>
0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

M7 D4 BUSY
+3VALW
R13
VCC1_1 LPT BUSY
B1 PE
BUSY <<37>>
B VCC1_2 PE PE <<37>> B
1 1 1 1 1 1 1 L11 B2 SLCT
VCC1_3 SLCT SLCT <<37>>
C591

C607

C599

C609

C605

C601

C592

H10 G6 ERROR#
VCC1_4 ERROR# ERROR# <<37>>
B16 F4 PD0
VCC1_5 PD0 PD0 <<37>>
PD1
2 2 2 2 2 2 2
F10
A6
VCC1_6 VCC PD1
F3
E2 PD2
PD1 <<37>>
VCC1_7 PD2 PD2 <<37>>
F5 PD3
PD3 PD3 <<37>>
E4 PD4
PD4 PD4 <<37>>
D3 D1 PD5
+3VRUN VCC2_1 PD5 PD5 <<37>>
0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L

H2 D2 PD6
VCC2_2 PD6 PD6 <<37>>
2 2 2 2 2 K6 E3 PD7
VCC2_3 PD7 PD7 <<37>>
C608

C602

C598

C593

C603

P4
VCC2_4
E1 C2
VCC2_5 VSS1
F6
1 1 1 1 1 VSS2
J5
L47 VSS3
N1
BLM11A121S_0603~L VSS4 N5
1 2 KPLLVCC R5
GND VSS5
T10
+3VRUN VCC2_6/PLL VSS6
R15
VSS7
2 J11
VSS8
G11
C269 VSS9
B15
0.1U_0402_16V4Z~L VSS10
H9
1 VSS11
D6
VSS12
P6
VSS13/PLL 256 - LBGA A2 KAGND 1 2
AGND L42
LPC47N254V12FBGA_LBGA256~L BLM11A121S_0603~L

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
SIO (1/2)
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 34 of 59
5 4 3 2 1
 5 4 3 2 1

U50D
+RTC_PWR SN74ACT08PWR_TSSOP14~L
<<40,42,49,50>> ACAV 12
IN1
11
O
13
IN2 +3VALW +3VALW

1
+5VALW +3VALW

1
R800

1
@ 0_0402_5%~D R799

1
R273

100K_0402_5%~L

10K_0402_5%~L
47K_0402_5% 1K_0402_5% R222

2
2

2
@ 10K_0402_5%

2
U27B
R231

R230
R272 @

2
D 10K_0402_5%~L D

2
L10 SIO_KAH_PGM 2 1
FPGM
1

1
DOCKED B9
<<27,28,33>> DOCKED IN0/WK_EE4
DH_MOD_PRES# B8 A10 FDD_PP#
<<25>> DH_MOD_PRES#
<<33>> DOCK_SMB_INT#
DOCK_SMB_INT#
FPVCC
A8
C8
IN1/WK_EE2
IN2/WK_EE3 LPC47N254 FDC_PP#
K12 R221
<<16>> FPVCC IN3/GPWKUP TEST_PIN

1
ACAV_R D8 10K_0402_5%~L
SBAT_ALARM# E8
IN4/WK_SE00 MACALLEN B4 XOSEL 2 1 R232
<<43>> SBAT_ALARM# IN5/WK_SE01 XOSEL
SBAT_PRES# F8 K16 1K_0402_5%~L
<<43,50>> SBAT_PRES# IN6/WK_SE05 EC_SCI#
PBAT_PRES# G8 E5 MODE 2 1
<<43>> PBAT_PRES# IN7/WK_EE1 MODE R498

2
J12 10K_0402_5%~L
FDD_LED# BAT1_LED#
J9 BAT1_LED# <<39>>
+3VALW +3VALW +3VALW +3VALW SBAT_LOW BAT_LED# LPC_LDRQ0#
<<50>> SBAT_LOW H13 M6 LPC_LDRQ0# <<19>>
H_PROCHOT_SIO# H12 GPIO0/WK_SE02 LDRQ0# J10 BAT2_LED#
<<18>> H_PROCHOT_SIO# GPIO1/WK_SE03 PWR_LED# BAT2_LED# <<39>>
SCR_DETECT_C H11
<<30>> SCR_DETECT_C GPIO2/WK_SE04
10K_0402_5%~D

4.7K_0402_5%~L

10K_0402_5%~D

AC_130W_90W G10 C7 EEPROM_WC

<<49>> AC_130W_90W GPIO3/TRIGGER OUT0 EEPROM_WC <<36>>
2

2
4.7K_0402_5%~L

KSO16 G13 F7 DOCK_PWR_EN 1

<<36>> KSO16 GPIO7/WK_SE06 OUT1 DOCK_PWR_EN <<33>>
R759

R229

R797

CAP_LED# J14 B6 HW_RADIO_DIS#

<<39>> CAP_LED# GPIO8/WK_SE12/IRRX2 OUT2 HW_RADIO_DIS# <<26,31>>
R506

NUM_LED# J16 E6 LAN_LOW_PWR

<<39>> NUM_LED# GPIO9/WK_SE13/IRTX2 OUT3 LAN_LOW_PWR <<27>>
SRL_LED# G14 C6 CHG_PBATT
<<39>> SRL_LED# GPIO17/WK_SE23/A20M OUT4 CHG_PBATT <<49,50>>
SBAT_LOW CHG_SBATT F15 A5 TI_SUSPEND#
TI_SUSPEND# <<29>>
1

<<49,50>> CHG_SBATT AC_LOW_PRES# GPIO20/WK_SE25/PS2CLK/8051RX OUT5/DS1/KBRST AUDIO_AVDD_ON

<<42>> AC_LOW_PRES#
F12
GPIO21/WK_SE26/PS2DAT/8051TX OUT6/MTR1
B5 AUDIO_AVDD_ON <<23>> 2 3
SBAT_ALARM# D7 LIVE_ON_BATT +3VALW
OUT7/SMI LIVE_ON_BATT <<40>>
B7 QBUFEN# MAX6326
OUT8/KBRST QBUFEN# <<32>>
PBAT_ALARM# FAN2_PWM R482
T257
GPIO OUT9/PWM2
E7
A7 BREATH_LED
FAN2_PWM <<13>>
10K_0402_5%~L
OUT10/PWM0 BREATH_LED <<39>>
CHG_SBATT PAD G7 FAN1_PWM 1 2 U29 2
OUT11/PWM1 FAN1_PWM <<13>>
SIO_MSCLK D10 1
SIO_MSDAT MSCLK RUNPWROK VCC C268
E10 K13 RUNPWROK <<16,38,44,45,47>>
T258 MSDAT PWRGD VCC1_PWROK 0.1U_0402_16V4Z~L
K15 3
C PAD VCC1_PWRGD H1 RESET_OUT# RESET# 1 C
RESET_OUT# RESET_OUT# <<38>>
CLK_SM1 C4 2
<<33>> CLK_SM1 EMCLK GND

2
DAT_SM1 DAT_SMB
<<33>> DAT_SM1 C3
EMDAT MISC AB1A_DATA
C9
A9 CLK_SMB
DAT_SMB <<13,25,36>>
D74 MAX6326_SOT23~L
AB1A_CLK CLK_SMB <<13,25,36>>
CLK_SM2 B3 E9 DOCK_SMB_DAT @SM05_SOT23
<<36>> CLK_SM2 IMCLK AB1B_DATA DOCK_SMB_DAT <<33>>
DAT_SM2 A1 D9 DOCK_SMB_CLK
<<36>> DAT_SM2 IMDAT AB1B_CLK DOCK_SMB_CLK <<33>>
H16 SBAT_SMBDAT
GPIO11/WK_SE15/AB2A_DATA SBAT_SMBDAT <<16,43>>
CLK_KBD J4 H14 SBAT_SMBCLK
<<33>> CLK_KBD SBAT_SMBCLK <<16,43>> VCC1_PWROK <<36>>

1
DAT_KBD KBCLK GPIO12/WK_SE16/AB2A_CLK PBAT_SMBDAT
<<33>> DAT_KBD J6 J15 PBAT_SMBDAT <<43,49>>
+5VRUN KBDAT GPIO13/WK_SE17/AB2B_DATA PBAT_SMBCLK
J13 PBAT_SMBCLK <<43,49>>
PBAT_ALARM# GPIO14/WK_SE20/AB2B_CLK G9 FAN1_TACH
<<43>> PBAT_ALARM# GPIO15/WK_SE21/FAN_TACH1 FAN1_TACH <<13>>
F9 FAN2_TACH
<<36>> KSO[0..15] GPIO16/WK_SE22/FAN_TACH2 FAN2_TACH <<13>>
G15 F16 SIO_A20GATE
GPIO6/WK_SE11/IRMODE/IRRX3A GPIO19/WK_SE24 SIO_A20GATE <<18>>
4.7K_0402_5%~L

4.7K_0402_5%~L

4.7K_0402_5%~L

4.7K_0402_5%~L

KSO15 G12
GPIO5/WK_SE10/KSO15
2

KSO14 G16
GPIO4/WK_SE07/KSO14
R478

R253

R494

R240

KSO13 R7 J3 CK_33M_SIOPCI
KSO13/GPIO18 PCI_CLK CK_33M_SIOPCI <<6>>
KSO12 T7 J2 +5VALW
KSO11 K8 KSO12/OUT8/KBRST 24MHZ_OUT D5
KSO10 J8
KSO11 CLOCK 32KHZ_OUT
J1 CK_14M_SIO R509
1

KSO10 CLOCKI CK_14M_SIO <<6>>

KSO9 L8 22K_0603_5%~L
KSO9

10_0402_5%

10_0402_5%
KSO8 M8 N12 SIO_FA0 SBAT_SMBDAT 1 2
KSO8 FA0

2
DAT_KBD KSO7 N8 T13 SIO_FA1
KSO6 KSO7 FA1 SIO_FA2 R517
P8 P12
KSO6 FA2

R510

R514
CLK_KBD KSO5 T8 T14 SIO_FA3 22K_0603_5%~L
KSO4 KSO5 FA3 SIO_FA4 SBAT_SMBCLK
CLK_SM1 KSO3
R8
R9
KSO4 K/B FA4
T15
R16 SIO_FA5
1 2

1
KSO2 KSO3 FA5 SIO_FA6 @ @ R520
T9 N13
DAT_SM1 KSO1 KSO2 FA6 SIO_FA7 22K_0603_5%~L
P9 P16
KSO0 KSO1 FA7 SIO_FA8 PBAT_SMBDAT
N9 M14 1 2

CK_33M_SIOPCI_TERM
KSO0 FA8

CK_14M_SIO_TERM
N15 SIO_FA9
<<36,39>> KSI[0..7] FA9 N16 SIO_FA10 R524
KSI7 FA10 SIO_FA11 22K_0603_5%~L
M9 M13
B KSI6 KSI7 FA11 SIO_FA12 PBAT_SMBCLK B
L9 L12 1 2
KSI5 KSI6 FA12 SIO_FA13
K9 FLASH M15
KSI4 KSI5 FA13 SIO_FA14 R480
K10 M16
KSI3 KSI4 FA14 SIO_FA15 10K_0402_5%~L
M10 L14
KSI2 KSI3 FA15 SIO_FA16 DOCK_SMB_DAT
R10 L13 1 2
KSI1 N10 KSI2 FA16 L15 SIO_FA17
KSI0 KSI1 FA17 SIO_FA18 R481
P10 L16
KSI0 FA18

4.7P_0402_50V8C

4.7P_0402_50V8C
K11 SIO_FA19 10K_0402_5%~L
FA19 R14 DOCK_SMB_CLK 1 2
FA20

2
T16
FA21

C600

C606
P13 SIO_FA[0..19] <<36>>
C596 FA22 +3VALW

1
22P_0402_50V8J~L P14 FRD#
FRD# FRD# <<36>>
N14 FWR#
FWR# FWR# <<36>>
1 2 CLK_32KX2 A3 P15 FCS#
XTAL1 FCS# FCS# <<36>>
@ @
M12 SIO_FD7
FD7 SIO_FD6
R12
1

X6 FD6 SIO_FD5
T12
FD5

10K_0402_5%~L

10K_0402_5%~L
32.768KHZ_12.5P_MC-306~L P11 SIO_FD4
FD4

10K_0402_5%~L
2

3.8X12.1mm N11 SIO_FD3

1
C597 FD3 SIO_FD2
M11
FD2

R562

R563

R564
22P_0402_50V8J~L R11 SIO_FD1
CLK_32KX1 FD1 SIO_FD0
1 2 C5
XTAL2 256 - LBGA FD0
T11

SIO_FD[0..7] <<36>>

2
LPC47N254V12FBGA_LBGA256~L

HW_RADIO_DIS#

LAN_LOW_PWR

A CHG_PBATT A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
SIO (2/2)
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 35 of 59
5 4 3 2 1
 5 4 3 2 1

+3VALW +3VALW

1
1
R555 C212
0_0402_5% 0.1U_0402_16V4Z~L
@
2

2
U23
1 8
D NC VCC EEPROM_WC D
2 7 EEPROM_WC <<35>>
+5VRUN A1 WP CLK_SMB
3 6 CLK_SMB <<13,25,35>>
4 A2 SCL 5 DAT_SMB
VSS SDA DAT_SMB <<13,25,35>>
AT24C04N_SO8~L

SUB_6782U

4.7K_0402_5%~L

4.7K_0402_5%~L
SMbus address A2

1
R193

R192
2

2
L39
BLM11A601S_0603~L
DAT_SM2 1 2 MOUSEDAT
<<35>> DAT_SM2
CLK_SM2 1 2 MOUSECLK
<<35>> CLK_SM2
L38
BLM11A601S_0603~L

10P_0402_50V8J~L

10P_0402_50V8J~L
10P_0402_50V8J~L

10P_0402_50V8J~L

+5VRUN
1 1 1 1
C196

C195

C188

C187
L40 JPALM
2 2 2 2 BLM31A260SPT_1206~L
MOUSEVDD 1 2
2 1
3 4
5 6

0.1U_0402_16V4Z~L
C 7 8 C
KSO_17 9 10 TP_Z
1 <<34,39>> KSO_17 11 12
KSI3 TP_V+
13 14

C200
KSI2 TP_Y
KSI1 15 16 TP_X
2 KSI0 17 18 TP_GND
19 20
HRS_FX6A-20P-0.8SV~L

Keep no nosie coupled,

Especially the TP_GND
JKYBRD
KSI7
KSI6 25
KSI4 24
KSI2 23 +3VALW
KSI5 22 U61
21 <<35>> SIO_FA[0..19]
KSI1
KSI3 20 SIO_FA0 21 31
19 A0 VCC

0.1U_0402_16V4Z~L

0.1U_0402_16V4Z~L
KSI0 SIO_FA1 20 30
KSO5 18 SIO_FA2 A1 VCC
19 11 1 1
KSO4 17 SIO_FA3 A2 VPP
18
16 A3

C633

C634
KSO7 TP_V+ SIO_FA4 17 25 SIO_FD0
KSO6 15 30 TP_X SIO_FA5 A4 D0 SIO_FD1
16 26
B KSO8 14 29 TP_GND SIO_FA6 A5 D1 SIO_FD2 2 2 B
15 27
KSO3 13 28 TP_Y SIO_FA7 A6 D2 SIO_FD3
14 28
KSO1 12 27 TP_Z SIO_FA8 A7 D3 SIO_FD4
8 32
KSO2 11 26 SIO_FA9 A8 D4 SIO_FD5
7 33
KSO0 10 SIO_FA10 A9 D5 SIO_FD6
36 34
KSO12 9 SIO_FA11 6 A10 D6 35 SIO_FD7
KSO16 8 31 SIO_FA12 A11 D7
<<35>> KSO16 5 SIO_FD[0..7] <<35>>
KSO15 7 32 SIO_FA13 A12
4
KSO13 6 SIO_FA14 3 A13
KSO14 5 33 SIO_FA15 A14 FWH_RST VCC1_PWROK
<<35>> KSO[0..15] 2 10 2 1 VCC1_PWROK <<35>>
KSO9 4 34 SIO_FA16 A15 RP#/RESET#
1 12
KSO15 KSO11 3 SIO_FA17 A16 WP#/RY/BY# R289
40 29
KSO14 KSO10 2 SIO_FA18 A17 NC 0_0603_5%~L
13 38
KSO13 1 SIO_FA19 A18 NC
37
KSO12 JAE_FK2S030W11~L A19
KSO11 FCS# 22
<<35>> FCS# CE#
100P_1206_8P4C_50V8~L

100P_1206_8P4C_50V8~L

100P_1206_8P4C_50V8~L

100P_1206_8P4C_50V8~L

100P_1206_8P4C_50V8~L

100P_1206_8P4C_50V8~L

KSO10 FRD# 24 23
<<35>> FRD# OE# GND
KSO9 FWR# 9 39
<<35>> FWR# WE# GND
KSO8
KSO7
8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5

KSO6 1 MX29LV008T/B_TSOP40~D
KSO5 C205
100P_0603_50V8J~L
CN12

CN11

CN10

KSO4
CN7

CN9

CN8

KSO3 @
KSO2 2
1
2
3
4

1
2
3
4

1
2
3
4

1
2
3
4

1
2
3
4

1
2
3
4

KSO1
KSO0
@ @ @ @ @ @
<<35,39>> KSI[0..7]
D C
KSI7
KSI6 1
KSI5 B E
A KSI4 A
G S 2 3
KSI3
KSI2
KSI1 2N7002 DTC114
KSI0

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
INT KB
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 36 of 59
5 4 3 2 1
 5 4 3 2 1

R11
D22 @ 0_0805_5%
RB751V_SOD323~L +LPT5V 1 2

+5VRUN
2
3@
1
+5VSUS
Parallel Port
JLPT 3@

1
STRB-_5V 1
R307 33_0402_5%~L 1 2 R10 3@ AFDF# 14
<<34>> AFD#
1K_0402_5%~L BLM15AG221PN1D_0402~L 1 2 L6 3@ PD0_INDEX# 2
<<34>> PD0
3@ BLM15AG221PN1D_0402~L 1 2 L8 3@ ERROR_HDSEL# 15
<<34>> ERROR# PD1_TRK0O#
BLM15AG221PN1D_0402~L 1 2 L7 3@ 3
<<34>> PD1

2
D R13 3@ 33_0402_5%~L 1 2 R306 3@ INIT_DIR# 16 D
<<34>> INIT#
33_0402_5%~L BLM15AG221PN1D_0402~L 1 2 L56 3@ PD2_WP# 4 29
<<34>> PD2
1 2 STRB-_5V 33_0402_5%~L 1 2 R305 3@ SLCT_IN_STEP# 17
<<34>> STRB# <<34>> SLCT_IN#
BLM15AG221PN1D_0402~L 1 2 L55 3@ PD3_RDATA# 5 28
<<34>> PD3
18
1 BLM15AG221PN1D_0402~L 1 2 L9 3@ PD4_DSKCHG# 6
C8 <<34>> PD4
CN4 3@ 19
270P_0402_50V7K~L 270P_1206_8P4C_50V8~L BLM15AG221PN1D_0402~L 1 2 L10 3@ PD5F 7
<<34>> PD5
3@ PD0_INDEX# 1 8 20
2 PD1_TRK0O# 2 7 BLM15AG221PN1D_0402~L 1 2 L54 3@ PD6F 8
<<34>> PD6
PD2_WP# 3 6 21 27
PD3_RDATA# 4 5 BLM15AG221PN1D_0402~L 1 2 L53 3@ PD7F 9
<<34>> PD7
22 26
33_0402_5%~L 1 2 R9 3@ ACK_DRV# 10
<<34>> ACK#
CN1 3@ 23
270P_1206_8P4C_50V8~L 33_0402_5%~L 1 2 R8 3@ BUSY_MTR# 11
+LPT5V PD4_DSKCHG# <<34>> BUSY
1 8 24
RN143 PD5F 2 7 BLM15AG221PN1D_0402~L 1 2 L11 3@ PE_WDATA# 12
4.7K_10P8R_1206_5%~L
3@ PD6F <<34>> PE
3 6 25
PD0 1 10 PD7F 4 5 BLM15AG221PN1D_0402~L 1 2 L12 3@ SLCT_WGATE# 13
PD1 PD7 <<34>> SLCT
2 9
PD2 3 8 PD6 FOX_DS01391-WH37~L
PD3 4 7 PD5 CN5 3@
5 6 PD4 270P_1206_8P4C_50V8~L
+LPT5V ACK_DRV# 1 8
BUSY_MTR# 2 7
PE_WDATA# 3 6
SLCT_WGATE# 4 5

+LPT5V
RN144 CN6 3@
4.7K_10P8R_1206_5%~L
3@ 270P_1206_8P4C_50V8~L
C ACK# 1 10 AFDF# 1 8 C
BUSY 2 9 AFD# ERROR_HDSEL# 2 7
PE 3 8 ERROR# INIT_DIR# 3 6
SLCT 4 7 INIT# SLCT_IN_STEP# 4 5
5 6 SLCT_IN#
+LPT5V

+5VSUS

1
C62
0.1U_0402_16V4Z~L
3@
2
C347 3@
0.47U_1206_16V7K~L
1 2
C343 3@ U32 R308 3@
26

0.1U_0402_16V4Z~L 33_0402_5%~L
1 2 3243C1+ 28 RTS0 1 2 JSIO 3@
VCC

C1+ 3243V+ C327 3@ DCD0

27 1
B C338 3@ V+ 0.47U_1206_16V7K~L DSR0 1 B
6
0.47U_1206_16V7K~L 3243C1- 3243V- R309 3@ RXD0# 6
24 3 1 2 2
3243C2+ C1- V- 33_0402_5%~L RTS0F 2
1 2 1 7
C2+ TXD0# TXD0F# 7
1 2 3
CTS0 3
8
3243C2- 2 DTR0F 4 8
TXD0 C2- TXD0# RI0 4
<<34>> TXD0 14 9 9
RTS0# T1IN T1OUT RTS0 R310 3@ CN2 3@ 9
<<34>> RTS0# 13 10 5
DTR0# 12 T2IN T2OUT 11 DTR0 33_0402_5%~L 270P_1206_8P4C_50V8~L 12 5
<<34>> DTR0# T3IN T3OUT 12
DCD0# 19 4 DCD0 DTR0 1 2 1 8 13
<<34>> DCD0# R1OUT R1IN 13
18 5 RI0 2 7
RXD0 R2OUT R2IN RXD0#
<<34>> RXD0
17 6 3 6
CTS0# R3OUT R3IN CTS0
16 7 4 5
<<34>> CTS0# DSR0# R4OUT R4IN DSR0
<<34>> DSR0#
15 8 10
R5OUT R5IN 10
20 11
R2OUTB 21 CN3 3@ 11
INVALID# 270P_1206_8P4C_50V8~L FOX_DS00191-WH37~L
23
+5VSUS FORCEON
25 1 8
GND
<<16,34,40,44,48>> RUN_ON 22 2 7
FORCEOFF#
3 6
MAX3243CAI_SSOP28~L 4 5
3@
+5VSUS
5

U38
NC
P

SN74AHCT1G04DCKR_SC70-5~L
Z3702 2 4
A Y RI0# <<20,34>>

5 4
G

A 3@ A
3

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
1 2 3 Title
LPT
Size Document Number Rev
single gate TTL 3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 37 of 59
5 4 3 2 1
 5 4 3 2 1

+5VRUN +5VSUS

+3VSUS
POWER U12B
1

R202
SEQUENCING IMVP_PWRGD
+3VSUS 74VHC08MTC_TSSOP14~L
4
100K_0402_5%~L IN1 6
1 OUT
C578 5
<<7>> ITP_DBRESET# IN2
U16A 0.1U_0402_16V4Z~L U42C
2

8
TC7W14FU_SSOP8~L U16B U12D +3VSUS 74VHC08MTC_TSSOP14~L
TC7W14FU_SSOP8~L 74VHC08MTC_TSSOP14~L 2 9
P

P
D 5VRUNRC U12C +3VSUS IN1 D
1 7 6 2 12 8 ICH_PWRGD <<20>>
A Y A Y IN1 RUNOK 74VHC08MTC_TSSOP14~L OUT
11 10 10
G

G
13 OUT IN2 8 RUNPWROK 12 IN2
IN2 OUT RUNPWROK <<16,35,44,45,47>> IN1
9 11

14
1
4

4
C208 IN1 OUT
13
0.22U_0603_10V7M~L +3VSUS <<35>> RESET_OUT# IN2 U42D
1

P
<<40>> SUSPWROK_3V_1P5V IN1
3 74VHC08MTC_TSSOP14~L
2 OUT SUSPWROK <<20,44>> CK_VTT_PG_SC450# <<47>>
2
<<40,46>> V_2P5V_PWRGD IN2

G
THERM_FF_GATE U12A
74VHC08MTC_TSSOP14~L +3VSUS

7
1P8V_PWRGD R805 @
<<44>> 1P8V_PWRGD
U42A 1 2

14
74VHC08MTC_TSSOP14~L
1 0_0402_5%

P
<<45>> VCCP_PWRGD IN1 3 EN_12V <<48>>
+3VSUS OUT
<<44>> 1P2V_PWRGD 2
IN2

G
+3VRUN
+3VSUS U42B

7
2

8
+3VSUS 74VHC08MTC_TSSOP14~L U67C
R29 4 SN74LVC3G14DCTR_SSOP8~D

P
48.7K_0402_1%~L +3VSUS IN1 IMVP_PWRGD
6 3 5 CK_VTT_PG# <<6>>
5 OUT A Y
<<47>> VCORE_PWRGD IN2

G
@ 100K_0402_1%~D
@ 2.21K_0402_1%~D

R28
HYST:

1
2

@ 48.7K_0402_1%~D

4
2 1 THERM_CPU#
R20

R23

+3VSUS MAX6509 goes in CPU cavity. VCC for 10 degree

R806 @
1

Discretes go outside. GND for 2 degree 2 1

R21 +3VRUN
@ 16.2K_0402_1%~D U2 U6 0_0402_5%
C Z3804 2 1 Z3805 1 5 MAX6509SET 1 5 C
IN+ VCC+ SET VCC

2
2 2 1
GND GND R30
Z3806 3 4 3 4 10K_0402_5%~D C921
IN- OUT OUT# HYST ICH_VGATE <<20>>
@ 1000P_0402_50V7K~D

0.1U_0402_10V6K~L
2
@ 1000P_0402_50V7K~D

@ LMV331__DCK MAX6509CHU-K_SOT23-5~L

1
24K_0603_1%
@ 100K_0402_1%~D

1 MAX6509HYST U67A U67B

2

8
R753 SN74LVC3G14DCTR_SSOP8~D SN74LVC3G14DCTR_SSOP8~D
thermistor

2 2

R24
C29 100K_0603_5%~L

P
2
C65

R53

C27

R22

0.047U_0402_10V4M~D IMVP_PWRGD 1 2 1 7 6 2 2 1
2 @
SET-HOT Vrsion R31 1
A Y A Y

G
1 1 10K_0402_5% C922 0_0402_5%
1

1
@ @ R807 @

4
0.22U_0603_10V7M~L

1
2 shall be VHC14 shall be VHC14

Thermistor goes in CPU cavity.

Dell P/N 8K573
Semitech P/N 103KT2125-1P

+RTC_PWR
1K_0402_5%~L

C 1
2

B B
R211

B E 2 3
1

3904 SYMBOL(SOT23-NEW) Z3811

U22A <<40,48>> THERM_STP#

2

SN74ACT74PWR_TSSOP14~D
14
4

R212
0_0402_5%~L R798
VDD
PRE

1
56_0402_5%~D D
R207 THERM_FF_GATE 5 THERM_PWRDWN 1 2 TH_DN 2 Q21
1

+3VSUS 8.2K_0603_5%~L Z3812 Q 2N7002_SOT23~L

2 G
D

0.22U_0603_10V7M~D
2 1 R757 1 S

3
+3VSUS

C946
+VCCP Z3813 3 @ 4.7K_0603_5%~L
CLK
2

6 1 2 ICH_THERM_PWRDN# <<19>>
R336 Q
VSS

CLR

8.2K_0603_5%~L 2
2

1
Q24
G

R342 2N7002_SOT23~L R758

1

1
1

1K_0402_5%~L D Z3809 @ 6.2K_0603_5%~L

1 3
THERM_TRUE 2 Q23
D

G 2N7002_SOT23~L
1

S R210
3

100K_0402_5%~L
ICH_THERM_PWRDN# <<19>>
1

Z3808 2 +3VSUS
1

1
R205 +RTC_PWR
Q35 @ 0_0402_5%
3

MMBT3904_SOT23~L
1

A Q82 A
47K
2 DTC144EKA_SOT23~L
<<40>> THERM_PWRDWN
5

U37
RB751V_SOD323~L

THERMTRIP_3P3# 1 TC7SH08FU_SSOP5~L
P

<<7,20>> H_THERMTRIP# IN1

20K_0603_5%~L

4 THERM_TRUE 47K
O
1

THERM_CPU# 2 OUT DELL CONFIDENTIAL/PROPRIETARY

3
G

IN2
R209
D13

IN 1 GND Compal Electronics, Inc.

3

Title
2 3
2

C211
0.1U_0402_16V4Z~L
IR,PS2,RTC
THERM_CLEAR Size Document Number Rev
<<40>> POWER_SW_DB# 1 2 DTA114YKA 3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 38 of 59
5 4 3 2 1
 5 4 3 2 1

OUT
IN 1 GND
2 3
+3VRUN
+3VRUN DTA114YKA
JLED1
R_BT_MPCI_ACT KSO_17
D 1 2 KSO_17 <<34,36>> D
BAT1_LED KSI4
3 4 KSI4 <<35,36>>
BAT2_LED KSI5
5 6 KSI5 <<35,36>>
R_BREATH_LED KSI6
7 8 KSI6 <<35,36>>

3
47K ACTLED
9 10
Q31 CAP_LED 11 12
DTA114YKA_SOT23~L NUM_LED 13 14 +RTC_PWR
<<35>> CAP_LED# 2 10K
SRL_LED 15 16
17 18 INT_MIC+
19 20 INT_MIC+ <<24>>
INT_MIC-
21 22 INT_MIC- <<24>>
R328 LID_CL#
<<34>> LID_CL# 23 24
470_0603_5%~L POWER_SW#

1
POWER_SW# <<40>>
3

R_CAP 2 1 CAP_LED 25 26
47K 27 28 POWER_SW_EMI 2 1
Q32 29 30
DTA114YKA_SOT23~L 31 32 R214
<<35>> NUM_LED# 2 10K 33 34 0_0402_5%~L
FOX_QTS1030A-2021~L @
R329
470_0603_5%~L
1
3

47K R_NUM 2 1 NUM_LED

2 Q30
<<35>> SRL_LED# 10K
DTA114YKA_SOT23~L
+5VHDD

R327
470_0603_5%~L R450 3@ R455 3@ R456 3@
1

R_SRL 2 1 SRL_LED 47_0805_5%~L 1.8_1206_5%~L 1.8_1206_5%~L

2 1 IRVCC 2 1 Z3903 2 1
C +3VRUN +3VRUN C
R454
+5VALW @ 0_0402_5%

3
47K 2 1

Q29 U52
2 DTA114YKA_SOT23~L R452 3@ 6 1 IR_ANODE
<<19>> PIDEACT# 10K VCC IRED_ANODE
0_0402_5%~L
3

47K 1 2 SD_MODE 5 4
<<34>> D_IRMODE SD_MODE RXD IRRX <<34>>

4.7U_1206_16V6K~L
Q27 R314 2 7
DTA114YKA_SOT23~L 470_0603_5%~L IRED_CATHODE MODE
2 1

1
<<35>> BAT1_LED# 10K
R_PIDEACT 2 1 ACTLED 3 8
<<34>> IRTX TXD GND

4.7U_1206_16V6K~L

C573
3@

1K_0402_5%~L

0.1U_0402_16V4Z~L
3@ 3@ 3@ TFDU6101E_TR4~L 3@

1
2

1K_0402_5%~L
R312 2 1 TFDU6102

R451

R453

C571

C570
470_0603_5%~L
1

R_PIDEACT <<33>>
3

47K R_BAT1_LED 2 1 BAT1_LED 3@

1 2

2
2 Q28
<<35>> BAT2_LED# 10K
DTA114YKA_SOT23~L

R313
470_0603_5%~L
1

R_BAT2_LED 2 1 BAT2_LED

B +3VALW B
2

LID_CL#
<<34>> LID_CL#
R320
150_0603_5%~L
1
Z3901

JLID1

3
R321
1

10K_0402_5%~L Q26
1 2 BREATH_LED_B 2 MMBT3904_SOT23~L
<<35>> BREATH_LED

4
3

ASQ00_MPU-101-6DB~L

+3VALW
2

R_BREATH_LED
R422
150_0603_5%~L
1
Z3902

A R421 A
1

10K_0402_5%~L
BT_ACTIVE 1 2 BT_MPCI_ACTIVE 2 Q50
<<26>> BT_ACTIVE
MMBT3904_SOT23~L
3

DELL CONFIDENTIAL/PROPRIETARY
R_BT_MPCI_ACT Compal Electronics, Inc.
Title
JLED/IR/PS2
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 39 of 59
5 4 3 2 1
 5 4 3 2 1

+RTC_PWR +VCC_CORE V_1P25V_DDR_VTT +3VRUN +1.2VRUN +VCCP +1.8VRUN

PWR_SRC
Run Planes Enable

1
1 1 1 1 1 1 1
R466 R536 R199 R603 R770 R771 R772
+3VSRC 100K_0402_5%~L 47_0805_5%~D 22_0805_5%~D 22_0805_5%~D 22_0805_5%~D 22_0805_5%~D 47_0805_5%~D
+3VRUN Source

1
@ @ @
R463 R464 Q12 +3VRUN

2
330K_0402_5%~L 30K_0402_5%~L SI4810DY_SO8~D

Z4005

Z4006
8 1
7 2

1
4.7U_1206_16V6K~L
6 3 1

RUN_ON#
C475
3 Z4002
5 R113 2 2 2 2 2 2 2
10K_0402_5%~L
D Q67 Q19 Q76 Q83 Q84 Q85 D

1
Q63 2 D 2N7002_SOT23~L D 2N7002_SOT23~L D 2N7002_SOT23~L D 2N7002_SOT23~L D 2N7002_SOT23~L D 2N7002_SOT23~L

2
Z4001 2 2 2 2 2 @ 2 @ 2 @
TP0610T_SOT23~L +5VSUS G G G G G G
+5VRUN Source

1
Q62 S S S S S S

3
+5VRUN DTC144EKA_SOT23~L
Q54

D
0.22U_1206_25V7M~L
RUN_ENABLE 6 SI3456DV-T1_TSOP6~L

S
47K

330K_0402_5%~L
Q61 5 4 1 2
<<16,34,37,44,48>> RUN_ON

1
4.7U_1206_16V6K~L
2N7002_SOT23~L 2
1

1
D

C471
1 1 R426
C481

R465
2 10K_0402_5%~L 47K

G
<<16,34,37,44,48>> RUN_ON 2
G

3
S
3

2
2 +1.5VSUS

2
+1.5VRUN Source
Q55 +1.5VRUN

D
6 SI3456DV-T1_TSOP6~L

S
5 4 1

1
4.7U_1206_16V6K~L
2

C480
1 R439 +3VSUS
10K_0402_5%~L

G
2

3
+5VSUS

2
+12V

5
U63
V_2P5V_PWRGD 1 TC7SH08FU_SSOP5~L

P
<<38,46>> V_2P5V_PWRGD IN1
4 +5VSUS
ENAB_1.25V <<46>>
1

2 O +12V
<<16,34,37,44,48>> RUN_ON IN2

G
R534
1
2
5
6

100K_0402_5%~L

1
C D Q66 C
G SI3456DV-T1_TSOP6~L PWR_SRC PWR_SRC R440
+5HDD Source
2

HDD_EN 3 1 1 100K_0402_5%~L

1
2
5
6
S
1

1
+5VHDD D Q4
4

2
Q69 R609 R610 G SI3456DV-T1_TSOP6~L
0.01U_0603_50V7K~L

DTC144EKA_SOT23~L 100K_0402_5%~L 100K_0402_5%~L 2 MOD_EN 3

S
47K

1
4.7U_1206_16V6K~L

2 1 1 +5VMOD

4
<<34>> HDDC_EN#
1

0.01U_0603_50V7K~L
C620

Q16
ENAB_3VLAN <<27>>
C629

R535 DTC144EKA_SOT23~L 1 1

1
D

4.7U_1206_16V6K~L
47K 100K_0402_5%~L
47K

1
2 2

C489

C477
N21917830 2 Q80 R611 2
3

<<34>> MODC_EN#

200K_0402_5%~L
Q81 G 2N7002_SOT23~L 470K_0402_5%~L R438
2

1
2N7002_SOT23~L D
S 2 2 100K_0402_5%~L

3
R612
2 47K

2
<<34>> VAUX_EN
G

2
+3.3VRTC
C679
3 S
+5VMOD Source

2
0.1U_0402_16V4Z~L
1 2
5

+3VSUS
R604 PWR_SRC PWR_SRC +3VSRC SUSPWROK_1P5V
P

<<45>> SUSPWROK_1P5V
VAUX_EN 1 1K_0402_5%~L Q77
<<34>> VAUX_EN INB

1
4 1 2 SI4810DY_SO8~D +3VSUS
OUTY THERM_STP# <<38,48>>
1

SUS_ON 2 1 1 8 1 R754 +3.3VRTC +3.3VRTC

<<34,48>> SUS_ON INA U65 R605 7 2 100K_0402_5%~L +RTC_PWR U50C
+3VSUS Source
G

TC7SH32FU_SSOP5~L 470K_0402_5%~L 6 3 SN74ACT08PWR_TSSOP14~L

8
5 1 U66A U66B 9
3

2
R606 C681 TC7W14FU_SSOP8~D TC7W14FU_SSOP8~D IN1 8 SUSPWROK_3V_1P5V

P
SUSPWROK_3V_1P5V <<38>>
2

200K_0402_5%~D 4.7U_1206_16V6K~L O
4 1 7 6 2 10
B A Y A Y IN2 B
1
2

G
Q78 2
SUSPWROK_5V <<30,45,46>>
0.1U_0603_50V4Z

2N7002_SOT23~L C923

4
1

470K_0402_5%~L

D 0.1U_0402_16V4Z~L
1

U50B 2
2 1
200K_0402_5%~L

C680

SN74ACT08PWR_TSSOP14~L Q79 G
1

D
R607

4 2N7002_SOT23~L S
3

<<34,48>> SUS_ON IN1

R608

6 SUSPWROK_5V 2
SUSPWROK_5V_GATED 5 O G 2 +5VSUS
2

IN2 +RTC_PWR +RTC_PWR

S
3

+RTC_PWR
2

1
+RTC_PWR

14

14
R755
100K_0402_5%~L

VCC

VCC
U21E U21D U50A

14
MM74HCT14_TSSOP14~L MM74HCT14_TSSOP14~L SN74ACT08PWR_TSSOP14~L

2
11 10 9 8 1

P
IN OUT IN OUT IN1 SUSPWROK_5V_GATED
<<35>> LIVE_ON_BATT 1 3
O
2

GND

GND
IN2

G
+RTC_PWR +RTC_PWR C924
+RTC_PWR +RTC_PWR +RTC_PWR 0.1U_0402_16V4Z~L

7
2
14

7
14

14
1

VCC

R208
14

VCC

VCC

<<39>> POWER_SW#
10K_0402_5%~L U21A U20D U20A U21F R796 SRCPWROK_3V
<<48>> SRCPWROK_3V
MM74HCT14_TSSOP14~L MM74HCT32_TSSOP14~L 1 MM74HCT32_TSSOP14~L MM74HCT14_TSSOP14~L @ 0_0402_5%~D
VCC

IN0 N16963693
12 3 13 12 1 2
2

<<35,42,49,50>> ACAV IN0 OUT IN OUT

11 2
OUT IN1
0_0402_5%~D

D12 1 2 13 +RTC_PWR
GND

IN OUT IN1
1

RB751V_SOD323~L
GND

R794
0.1U_0402_16V4Z~L

2 1
14
GND

GND

A ALW_ENABLE# A
1
7

ALW_ENABLE# <<48>>
C210

VCC
7

+RTC_PWR U20C
7

MM74HCT32_TSSOP14~L R795
14

2 9 0_0402_5%~D
IN0
8 1 2
DELL CONFIDENTIAL/PROPRIETARY
VCC

U21B OUT
<<38>> THERM_PWRDWN 10
IN1
3
MM74HCT14_TSSOP14~L
4
Compal Electronics, Inc.
GND

IN OUT POWER_SW_DB# <<38>> Title

POWER CONTROL
GND

PWRSW_SIO# <<34>> Size Document Number Rev

3.0
DDQ12/11/01 with LA-1901
7

Date: Wednesday, January 07, 2004 Sheet 40 of 59

5 4 3 2 1
 5 4 3 2 1

MY1 TPAD1
CLP3
EMI_CLIP
Fiducial Mark THERM PAD
1 CLP16 MYLAR(ZZZ)
GND CLP25 EMI_CLIP 1 1
FD1 FD2 FD3 FD4 FD5 FD6 NC NC
1 1 1 1 1 1 1 1 MYLAR_CARDBUS THERMAL_PAD_MCH
CLP5 CLP12 CLP20 GND GND
EMI_CLIP EMI_CLIP @ EMI_CLIP FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK
EMI_CLIP MY2 TPAD2
1 1 1 CLP6
GND GND GND CLP26 EMI_CLIP
FD7 FD8 FD9 FD10 FD11 FD12 THERM PAD
1 1 1 1 1 1 1 1 MYLAR(ZZZ)
CLP13 CLP21 CLP24 GND GND
D 1 1 D
EMI_CLIP @ EMI_CLIP @ EMI_CLIP FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK NC NC
EMI_CLIP MYLAR_HDD THERMAL_PAD_VGA
1 1 1
GND GND GND CLP27 FD13 FD14 FD15 FD16 FD17 FD18
MY3 TPAD3
1 1 1 1 1 1
1
CLP14 GND DOCK CLP FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK
EMI_CLIP THERM PAD
EMI_CLIP MYLAR(ZZZ)
1 1 1
GND NC NC
MYLAR_DIMMA THERMAL_PAD_VRAM

CLP8 CLP15
EMI_CLIP @EMI_CLIP
MY4
1 1
GND GND

MYLAR(ZZZ)
1
NC
MYLAR_DIMMB

MY5 PCB1

MYLAR(ZZZ) BARE PCB

1 1
NC NC
H10 H9 H6 H5 H12 H14 H13 H4 H3
C315D91 C315D91 C315D91 C315D91 C276D165 C276D165 C276D165 C382D382N C413D413N MYLAR_MINIPCI PCB DDQ12 LA-1901 REV0.1 M/B
1

1
C C
MY6

MYLAR(ZZZ)
H7 H17 H16 H19 H20 H11 H15 H2 H1 1
C409D252 C276D126 C276D126 C276D126 C276D126 C276D126 C276D126 C276D126 C276D126 NC
MYLAR_DOCK_FRAME
1

1
MY7 CAGE1

MYLAR(ZZZ) CARDBUS CAGE

+3.3VRTC +5VSUS 1 1
H33 NC NC
H28 H31 H32 H36 H37 H38
H_C176BC256D146 H_C276D126 C146 C177 C217 C217 C217 MYLAR_MCH_TOP FCI_57996-001(W/SC)

8
U66C U16C 2@
TC7W14FU_SSOP8~D TC7W14FU_SSOP8~L

P
3 5 3 5
1

1
A Y A Y MY8 CAGE2

G
4

4
MYLAR(ZZZ) CARDBUS CAGE
1 1
NC NC
H39 H40 H41 H42
C217 C217 C217 C217 MYLAR_MCH_BOTTOM FCI_57996-002(WO/SC)
+RTC_PWR 1@

H18 H34 H35

1

C276D126 H_O193X91D173X71 H_O193X91D173X71 MY9

U22B +12V
SN74ACT74PWR_TSSOP14~D

10

14
MYLAR(ZZZ)
1

8
U69B

PRE

VDD
B B
@ LM358M_SO8~L 1

P
NC
9 5
Q IN+ MYLAR_BATTERY
12 7
D OUT
6
IN-
11

G
CLK
8
Q

CLR
VSS

4
7

13
Z1 Z2

Switch Board Touch Pad

+RTC_PWR 1 1
NC NC
Hinge Cover Logic Up

Z3 Z4

MDC-RJ11/45 Speaker Module

1 1
NC NC
Mg-Frame Logic Low
Z5

BT-CABLE
1
NC
BlueTooth
A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PAD and Standoff
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 41 of 59
5 4 3 2 1
 5 4 3 2 1

+12V +DC_IN

2
PD4 PD1

1000P_0402_50V7K
3@ RB751V-40 3@ RB751V-40

1
+RTCSRC Source
PR7 +RTCSRC

PC15
3@ 6.2K_0603_5% PR851 4@
Z4201 1 2 Z4202 0_0603_5%~D
1 2

1
3@

3@ 4.7K_0402_5%
Remove

1
PD8 3@
bridge

2
D D
EC10QS04
charge

PR6
1 2
path
PD3

2
PFS2 3@ EC10QS04
3@0.75A_24V_miniSMDM075/24
RBAT SBATT_VCC 2 1 3 1
<<24>> RBAT PWR_SRC

100K_0402_5%
PQ35

1
PR850 3@ IRLML5103_SOT-23

PR82
@ 0_1206_5%~D

2
1 2

3@

2
Z4203

FET on when in suspend, current flow is from Rbat to

PWR_SRC to sustain system during battery swap mode

1
PWR_SRC PQ36
47K
SYS_SUSPEND 2
<<16,34>> SYS_SUSPEND
3@ DTC144EKA_SOT-23 depop pr82,pq35,pq36
47K
2200P_0603_50V7K

2200P_0603_50V7K

3
0.01U_0603_50V7K

0.01U_0603_50V7K
1

1
PC122

PC123

PC129

PC128
2

C C

1
G 2 3 S <<33>> DOCK_DC_IN
+3VALW
IRLML5103
+DC_IN Source
L20 +DC_IN

2
BLM11A121S_0603 PQ1
PWR_ID SI4825DY_SO-8 12/31 PR802 +3VALW
PS_ID <<33>>
4.7K_0402_5%
1 8
Item 31
Z-series AC Adaptor 2 7

1
Connctor PL118
@ BEAD_9A_1812
3 6
5
1000P_0402_50V7K

10K_0805_5%

2
1 2 DOCK_DC_IN 0.1U_0805_50V7M

0.1U_0805_50V7M

0.1U_0805_50V7M

0.1U_0805_50V7M
2

1
0.01U_0603_50V7K

15U_D_35VK
+ PS_ID PR70
0.47U_1812_50V7M

150K_0603_5%

<<33>> PS_ID
1

PR803
JDCIN 4.7K_0402_5%
2

PC6

PC9
PC10

PC11

PC12

PC13

PC14
1

2
PR54
PC1

1
Low_PWR PL7 AC_LOW_PRES#
9
1

2
GND_4 AC_LOW_PRES# <<35>>
2 OC8070-A301 4P
2

8 DC+_1 DCIN+ 2 3 @
B GND_3 B
3 Z4206
DC+_2
1 4
7 4
100K_0402_5%

GND_2 DC-_1
1

6 5
GND_1 DC-_2
PR57
MH1
MH2

PL119
MH1
MH2

DC PWR JACK @ BEAD_9A_1812 PR762

DCIN- 1 2 @ 0_0603_5%~L
1 2

1
@ 0_0603_5%~D
PQ91

PR801
PD58
SM05_SOT23 2N7002_SOT23~L

THE POINT THESE CAPS MUBT BE 1 3

S
2
NEXT TO JCHG

G
2
NOTE: "THE POINT LOCATED
AT PS MODULE
<<35,40,49,50>> ACAV

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
SCHEM,PLN,MN,KAPALUA II DC-IN
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 42 of 59
5 4 3 2 1
 5 4 3 2 1

+5VALW
ESD Diodes

2
+5VALW

Secondary Battery Connector

1
PD18 PD19 PD20 PD39
@ DDA204U @ DDA204U @ DDA204U @ DDA204U

1
D D
SBATT+ <<50>>
PR44

2
JSBAT 10K_0402_5%
1 PR45 PC154
BATT1+
2200P_0603_50V7K

2 100_0603_5% PR46 0.1U_0805_50V7M

2
BATT2+ 3 Z4301 100_0603_5% PR47
1 2 SBAT_SMBCLK <<16,35>>
SMB_CLK Z4302 100_0603_5%
4 1 2 SBAT_SMBDAT <<16,35>>
SMB_DAT
1
PC67

5 Z4303 1 2 PR915
BATT_PRES# SBAT_PRES# <<35,50>>
6 100_0603_5%
SYSPRES#
7 1 2 SBAT_ALARM# <<35>>
2

BATT_VOLT
10 8
GND BATT1-
11 9
GND BATT2-
SUYIN-20175A-09G1
SMSC issue

SUYIN_20175A-09G1
+5VALW
ESD Diodes

2
C +5VALW C

Primary Battery Connector

1

1
PD32 PD33 PD34 PD40

1
@ DDA204U @ DDA204U @ DDA204U @ DDA204U
PR96
PBATT+ <<50>>
10K_0402_5%

2
JPBAT
1 PR93 PC155

2
BATT1+ 100_0603_5% PR94 0.1U_0805_50V7M
2

1
BATT2+
2200P_0603_50V7K
PC56

3 Z4304 1 2 100_0603_5% PR95

SMB_CLK PBAT_SMBCLK <<35,49>>
4 Z4305 1 2 100_0603_5%
SMB_DAT PBAT_SMBDAT <<35,49>>
5 Z4306 1 2 PR916
PBAT_PRES# <<35>>
2

BATT_PRES# 6 100_0603_5%
SYSPRES#
7 1 2 PBAT_ALARM# <<35>>
BATT_VOLT
10 8
1

GND BATT1-
11 9
GND BATT2-

SUYIN-20175A-09G1
SMSC issue

B B

A A

SUYIN_20175A-09G1
TOP view
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
SCHEM,PLN,MN,KAPALUA II Battery CONN.
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 43 of 59
5 4 3 2 1
 8 7 6 5 4 3 2 1

H H
+1.2VRUN/+1.8VRUN SOURCE

+1.2VRUNP +3VSUS

PL121
5U_TPR6D38-5R0M
+3VSUS 14 6 N18039098 1 2

10K_0603_5%
VIN PH +3VSUS

10U_1206_6.3V

1
15 7

1
VIN PH

PC262

PR779
+1.2VRUNP +1.2VRUN

470U_D_4VM_R15
G PJP17 +1.8VRUNP G

0.1U_0603_16V
1 2 16 8

1
VIN PH

PC264

PC267
+ PU17

2
PU16
PAD-OPEN 4x4m 1P8V_PWRGD <<38>>
9 9 10 PL122

2
PH BATT POK

10U_1206_6.3V7K
+1.8VRUNP +1.8VRUN 20 4.7U_SLF7032T-4R7M1R7_1.7A_20%
PJP18 RT
1 8 1 2

1
PWM LX

PC302
1 2 10
PH

69.8K _0603_1%

10U_1206_6.3V7K
PC268 2 4 N17322286

1
TPS54312 0.1U_0805_25V7K GND FB

2
PAD-OPEN 4x4m

1
PR777

PC301
17 5 PC298 1 2 3 5 N17322307

75K_0603_5%
VBIAS BOOT REF COMP

1U_0603_6.3V
0.1U_0603_25V7K 6 7

105K_0603_1%

2
SHDN# PGND

PR716

PC269

2
1
PR775
2 MAX1927
VSENSE PR774
19

2
FSEL

22P_0603_50V8J~D

49.9K _0402_1%
<<16,34,37,40,48>> RUN_ON 2 1

2
11 +3VSUS

1
F PGND F

PC300

PR776
PR778
0_0603_5%~L
0_0603_5%

1500P_0402_50V7K
N18039114 18 12 1 @

2
+3VSUS SS/ENA PGND

1
PR718

PC299
13 NC_1.8V_TEST
PGND 10K_0603_5% 2
10K_0603_5%

2
1

AGND
PR265

3 4
NC PWRGD 1P2V_PWRGD <<38>>
2

PR720
@ 0_0603_5%
<<16,34,37,40,48>> RUN_ON 2 1
E E
PR766
0_0603_5%
<<16,35,38,45,47>> RUNPWROK 2 1

+RTCSRC +3.3VRTC
PU20

1 8
ERR# GND
2 7
IN GND
3 6
OUT GND
RTC_SHDN# 4 5
EN GND

@MIC5236-3.3BMM
D D

Allows SUS planes to power ALW planes when possible

+RTCSRC RTC_PWR Source
PU8 +RTC_PWR
MAX1615EUK_SOT23-5
1
IN
3
PR106 OUT
10U_1206_6.3V7K

0_0603_5%
1

1 2 RTC_SHDN# 5
#SHDN
PC139

4 +5VALW +5VSUS +3VALW +3VSUS +RTC_PWR

GND

5/3+
2

3 1 3 1
2

14
C PQ50 PQ53 C
SI2301DS_SOT-23 SI2301DS_SOT-23

VCC
2

2
N23637889 6 5
OUT IN SUSPWROK <<20,38>>
PU9
3.3VRTC Source

GND
MAX1615EUK_SOT23-5 +3.3VRTC U21C
1
IN MM74HCT14_TSSOP14~L
3

7
OUT

5
#SHDN
4
GND

5/3+
10U_1206_6.3V7K
PC143
2

B B

DELL CONFIDENTIAL/PROPRIETARY
A A
COMPAL ELECTRONICS, INC
Title
SCHEM,PLN,MN,KAPALUA II +1.2V & +1.8V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DA0JM2MBCA1 Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 3.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Dell-Compal Confidential DDQ12/11/01 with LA-1901
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Wednesday, January 07, 2004 Sheet 44 of 59
8 7 6 5 4 3 2 1
 5 4 3 2 1

D
+1.5VSUS/+1.05V(+VCCP) PL123
D
FBM-L11-453215-900LMAT_1812
N16783484 1 2 PWR_SRC

2200P_0603_50V7K

0.1U_0805_25V7M

4.7U_1210_25V6K

4.7U_1210_25V6K
1
PC271

PC272

PC273

PC274
PR721
10_1206_5% +5VSUS
RUNPWROK <<16,35,38,44,47>>

0.1U_0805_25V7M

0.1U_0603_16V

2.2U_0805_10V6K

2200P_0603_50V7K
1

1
PC279

PC297

PC275
PR722

0.1U_0603_25V

4.7U_1210_16V6K

4.7U_1210_16V6K
PR773

1
PC280

PC276

PC277

PC278
PD53
DAP202U
2.2_0603_5%

2
@ 1K_0402_5%

2
3

2
N23580443

PC281 PU18

14

28
0.01U_0603_50V7K PC282
12 17 2 1

VIN

VCC
SOFT1 SOFT2
PL124 PC283 PR723 PR724 0.01U_0805_50V7K PC284
4.7U +-20% IHLP-2525CZ-01 3.9A 0.1U_0805_25V7K 0_0603_5% 0_0603_5% 0.1U_0805_25V7K
+1.5VSUSP N17323137 6 23 N16782655
BOOT1 BOOT2
PQ81 PR725 PR726
4.7U_0805_6.3V7K
330U_D2E_2.5VM

SI4814DY 0_0603_5% 0_0603_5%

1

1 8 5 24 N16782648
D1 G1 UGATE1 UGATE2
PC285

PC286

+ 2 7
D1 S1/D2 N16782655 PL125 +1.05VSUSP
3 6 4 25
C 4 G2 S1/D2 5 PHASE1 PHASE2 5U_TPR6D38-5R0M C
2

S2 S1/D2 PR727 PR728 PQ82 1 2

732_0603_1% ISL6225B 634_0603_1% SI4814DY

0.01U_0603_50V7K

4.7U_0805_6.3V7K
7 22 1 8
0.01U_0603_50V7K

ISEN1 ISEN2 D1 G1

1.65K_0603_1%
2 7
D1 S1/D2

0_0603_5%

220U_D_2V
N16974381 2 27 10/23 By 3 6
LGATE1 LGATE2 G2 S1/D2
PC288

PR731

PC290

PR732

PC289

PC287
PR730 4 5 +
PR729 0_0603_5% Dell's S2 S1/D2
6.65K_0603_1% @ Request
3 26
PGND1 PGND2

N19400330 9 20 N16974337
N16786025 10 VOUT1 VOUT2 19 N16961944
N16151559 VSEN1 VSEN2 N23580452
8 21
N25429142 EN1 EN2 N25429081
15 16
PG1 PG2/REF

GND

DDR

@ 10K_0603_5%

10K_0603_1%

2
11 18
OCSET1 OCSET2
2

PR737

PR738
PR733 PC292 N16974340 PR784
PR783 PR734 1000P_0603_50V N23580470 PC291 0_0603_5%
IS6225B
2

13

2
@

@
0_0603_5% 10K_0603_1% 0_0603_5% 1000P_0603_50V @
@ PR769 PR735 PR736 PR770

1
0_0603_5%~L 75K_0603_1% 75K_0603_1% 0_0603_5%~L
1

NC_1.05V_TEST
1

1
NC_1.5V_TEST

PR739
0_0603_5%
2 1 PR772
<<30,40,46>> SUSPWROK_5V
@ 0_0603_5%
2 1 SUSPWROK_5V <<30,40,46>>

B B

+3VSUS +5VSUS PR740

+3VSUS +5VSUS 0_0603_5%
2 1 RUNPWROK <<16,35,38,44,47>>
1

PR767 PR742

1
@ 10K_0603_5% 10K_0603_5%
PR741 PR780
2

@ 10K_0603_5% 10K_0603_5%
PJP19 <<40>> SUSPWROK_1P5V

2
+1.5VSUSP 1 2 +1.5VSUS

PAD-OPEN 4x4m VCCP_PWRGD <<38>>

PJP20

+1.05VSUSP 1 2 +VCCP

PAD-OPEN 4x4m

A A

DELL CONFIDENTIAL/PROPRIETARY
COMPAL ELECTRONICS, INC
Title
SCHEM,PLN,MN,KAPALUA II +1.5V & +1.05V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B DDQ12/11/01 with LA-1901 3.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, January 07, 2004 Sheet 45 of 59
5 4 3 2 1
 5 4 3 2 1

PL114
D D
HCB4532K-800T90_9A
N16137547 1 2 PWR_SRC

2200P_0603_50V7K

0.1U_0805_25V7K

4.7U_1210_25V6K

4.7U_1210_25V6K

4.7U_1210_25V6K
1
PC159

PC160

PC161

PC162

PC163
PR590
51_1206_1% +5VSUS

2
+2.5V/+1.25V

0.1U_0805_25V7M

2.2U_0805_10V6K
2.2_0603_5%
1

PC165

PR764

PC164
PD41
DAP202U

8
7
6
5
+2.5V_MEMP

2
PQ60 N03711
IRF7811A_SO-8
4 N16975610
PC166 PC167

14

28
DDR Termination Voltage

4.7U_1206_16V6K
0.01U_0603_50V7K 0.01U_0603_50V7K

1
PC168
12 17

VIN

VCC
SOFT1 SOFT2

1
2
3
PL115 PC169 PR138 PR139 PC170

2
+2.5V_MEMP 4.7UH_SPC-1205P-100 0.1U_0805_25V7M 0_0603_5% 0_0603_5% 0.1U_0805_25V7M
N04392 6 23 N03699
BOOT1 BOOT2

8
7
6
5
PR592 PR593 PQ62
0_0603_5% 0_0603_5% FDS6984S
18.2K_0603_1%

1
0.01UF_0603_50V7K
220U_D2_4VM~D

EC31QS04
220UF_D_4V_FP

1 PR591 N16149117 5 24 N16149222 4 5

1

0_0603_5%

UGATE1 UGATE2 V_1P25V_DDR_VTTP

PD42

100 PU11
PC172

PC171

PR597

PC176

PR598

C + + @ 4 25 3 6 PL116 C
PHASE1 PHASE2 1.5UH_TPRH6D38
4
1000PF_50V

PR594 PR595 N04434 2 7 1 2

ISL6225B
2

2
PC173

PQ61 1K_0402_5% 2K_0603_5%

4.7U_0805_6.3V6K
FDS6672A_SO-8 7 22 1 8
ISEN1 ISEN2

150U_D2_6.3VM

150U_D2_6.3VM
PR596
1
2
3
@ 2 27 100

2
LGATE1 LGATE2

PC183

PC174

PC175
@ + +
@

1
3 26 PC177
PGND1 PGND2 1000PF_50V
@
N16149028 9 20
N16153234 VOUT1 VOUT2
10 19
VSEN1 VSEN2
8 21 ENAB_1.25V <<40>>
V_2P5V_PWRGD_R 15 EN1 EN2 16 1 2 V_DDR_MCH_REF <<11,14,15>>
2

PG1 PG2/REF

GND

DDR

2
PR781 PR599 PR600 11 18 PR713

2
10K_0603_1%~D OCSET1 OCSET2 0_0603_5%~L PR782
0_0603_5% 0_0603_5%
@ @ IS6225B PC179 0_0603_5%

13

2
PC180 PR604 1000PF_50V @
1

1000PF_50V PR601 PC178 10K_0402_5% @

1
@ 80.6K_0603_5% 4.7U_0805_6.3V6K

1
NC_2.5V_TEST
NC_1.25V_TEST

+5VSUS

+2.5V_MEMP
<<30,40,45>> SUSPWROK_5V
2

PR610
10K_0402_5% PR602
2

10K_0.1%
1

B
PR771 B
0_0603_5%~L

10n_0402_25V7K
+3VSUS +5VSUS
1

1
PC181
PR603
10K_0.1%

2
2

PR768 PR605
10K_0402_5% 10K_0402_5%
@
1

V_2P5V_PWRGD
<<38,40>> V_2P5V_PWRGD

PJP10
PAD-OPEN 4x4m
1 2

PJP8
PAD-OPEN 4x4m
+2.5V_MEMP 1 2 +2.5V_MEM
(9A,120mils ,Via NO.=15)

A A

PJP9
1 2 V_1P25V_DDR_VTT
DELL CONFIDENTIAL/PROPRIETARY
V_1P25V_DDR_VTTP
(3A,200mils ,Via NO.=6)
Compal Electronics, Inc.
PAD-OPEN 4x4m Title
SCHEM,PLN,MN,KAPALUA II 1.25V/2.5V
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 46 of 59
5 4 3 2 1
 8 7 6 5 4 3 2 1

value provied
1.04% offset;
ADD PR901, PR902 for SC1476 ISSUE_2003/06/13
old value was +5VRUN
+3VRUN +VCC_CORE +3.3VRTC PWR_SRC
for old 2.67%

100K_0402_5%
offset. PR744 BG waveforms

2
H 57.6K_0402_1% improved. may H

1
PR743
1 2 CMPRF
delete from

2200P_0603_50V7K

2200P_0603_50V7K

2200P_0603_50V7K
332_0402_1%

0.1U_0805_50V7M

0.1U_0805_50V7M

0.1U_0805_50V7M
2

4.7U_1210_25V6K

4.7U_1210_25V6K

0.1U_0603_25V7M

0.1U_0603_25V7K
1U_0805_25V4Z
PD60
future

RB751V-40
RB717F_SOT323~D

2
revision.

PD5
PR745
1

1
PC295

PC296

PC228

PC229

PC293

PC294

PC304

PC305

PC306

PC307
PC5
N16869802
<<20>> DPRSLPVR

2
+3VRUN

2
10_0402_5%

5
6
7
8

5
6
7
8
BST2_VCORE
N19111843 2 PQ84 CORE

330P_0402_50V7K
2
BSS138_SOT23 PQ4

100K_0402_5%
2
PR746
IRF7811A_SO-8 PQ7

1
BST1_VCORE @ IRF7811A_SO-8

PC3

PR4

2
3.3_0603_5%
2 2 PQ85 4 4

2
<<6,20>> H_STP_CPU#

1U_0805_25V4Z
PR747
BSS138_SOT23 PR901

1
1U_0805_10V7K

2
PQ83 100K_0402_5%

PC230
BSS138_SOT23 +VCC_CORE

2
PC4
@ PL1 PR14

3
2
1

3
2
1

@ 68_0805_5%@ 330P_0603_50V7J
G 0.36U_ETQP4R36WFC_24A_20% 0.0015_2512_1% G

23

38
2 1 1 2

3
+3VRUN PR263

5
6
7
8

5
6
7
8
0_0603_5%

CORE

V5_1

BST1
100K_0603_5%

1
PC231
VCCA 30 2 DH_VCORE 1 2 PQ3
2

0.01U_0603_50V7K
VCCA TG1

EC10QS04
PQ6 FDS6672A_SO-8

1
PR748

1 LX_VCORE FDS6672A_SO-8

1
DRN1

PC234
PD6
VID5 9
<<8>> VID5 VID5
37 DL_VCORE 4 4 PD24

2
VID4 BG1 @ EC31QS04
10
1

2
<<8>> VID4 VID4

PR749
ICH internal pull up,this 36 @

2
part not need VCORE_PWRGD VID3 SC1476 PGND1
<<8>> VID3 11
VID3 ISH1 PR12 1
34 2 10K_0402_1%

3
2
1

3
2
1
ISN1
0.1U_0402_16V

VID2 12 @

1
<<8>> VID2
1

VID2 CL1 PR10 1

33 2 619_0402_1% PR903
100K_0402_5%

CL1
PC235

VID1 13 2 1
<<8>> VID1 VID1
2

32 CMP1 PR8 1 2 750_0402_1% @ 100K_0402_5% VH_R1 PR5

2

180P_0603_50V7K
CMP1
PR750

VID0 14 1_0402_5%
<<8>> VID0 VID0 31 CLRF PR9 1 2 619_0402_1% VH_L1 1 2
F
PU1 CLRF F

@ VCORE_PWRGD 16 29 CMPRF PR1 1 2 374_0402_1%

1

1
Set up for <<38>> VCORE_PWRGD PWRGD CMPRF PR751

PC2
constant-ripple 28 CMP2 PR752 1 2 750_0402_1% 1_0402_5%
PBOOT CMP2
mode. Was 6 1 2

2
PBOOT CL2 PR11 1
27 2 619_0402_1%
constantfrequency 35 CL2 @
mode <<16,35,38,44,45>> RUNPWROK EN
26 ISH2 PR3 PR2 1 2 10K_0402_1% VH_R2
VDPR ISH2 619_0402_1%
5
VDPR 24 DAC PWR_SRC
1 2
DAC N16869992
4

1000P_0402_50V7K
<<20>> DPRSLPVR DPRSL

63.4K_0402_1%
2
18 DH_VCORE2 PQ14 PQ11

1
CLSET 7 TG2 IRF7811A_SO-8 @ IRF7811A_SO-8

2200P_0603_50V7K
<<38>> CK_VTT_PG_SC450# CLSET

PC259

PR765
19 LX_VCORE2
DRN2

0.1U_0805_50V7M

0.1U_0805_50V7M
5
6
7
8

5
6
7
8

4.7U_1210_25V6K

4.7U_1210_25V6K

4.7U_1210_25V6K

4.7U_1210_25V6K
HYS 8

2
HYS DL_VCORE2
21
6800P_0402_16V7K
61.9K_0402_1%
2

30.1K_0402_1%
2

16.5K_0402_1%

1
BG2

PC236

PC237

PC238

PC239
15
SS
2

1
PC240

PC241

PC242
PR264

BST2
22

V5_2
GND
PGND2
PR753

PR754

PR755

E 1 0_0603_5% E

2
PC243

1 2 4 4

2
1

25

20

2 17
1

2
PBOOT 2

3.3_0603_5%
PR756
@ @ PR902 +VCC_CORE

3
2
1

3
2
1
15K_0402_1%

PC244 100K_0402_5% PL2 PR15

2

1U_0805_25V4Z 0.36U_ETQP4R36WFC_24A_20% 0.0015_2512_1%

5
6
7
8

5
6
7
8
PR757

20 mil Trace list for layout BST2_VCORE 2 1 2 1 1 2

@ 68_0805_5%@ 330P_0603_50V7J

0.01U_0603_50V7K
+5VRUN
The +5VRUN (PIN38
1U_0805_10V7K

1
RB751V-40
Added
AND PIN20)
1

2
PC260

PD56
filter for

1
PC245

PC248
BST1_VCORE PBOOT VDPR 4 4 PD27
@ EC31QS04
BST2_VCORE
1

2 1
1000P_0402_50V7K

1000P_0402_50V7K

2
24.9K_0402_1%

PR904
2

3
2
1

3
2
1

2
@ 100K_0402_5% @
1

1
PC249

PC250

PR759
D PQ12 PQ9 D
PR758

FDS6672A_SO-8 FDS6672A_SO-8
+5VRUN
2

1
CMPRF
CMP1

CMP2

CLRF

ISH1

ISH2
CL1

CL2
V I D Vcore 100 mil Trace list for layout

330P_0402_50V7K

330P_0402_50V7K

1000P_0402_50V7K

330P_0402_50V7K
180P_0402_50V8J

180P_0402_50V8J

0.1U_0603_16V7K

0.1U_0603_16V7K
VID 5 VID 4 VID 3 VID 2 VID 1 VID 0 V
DH_VCORE
0 1 0 1 1 1 1.340 LX_VCORE
1

1
PC251

PC252

PC253

PC254

PC255

PC256

PC257

PC258
0 1 1 0 0 0 1.324 DL_VCORE
DH_VCORE2
2

2
C C
0 1 1 0 1 0 1.292 LX_VCORE2
0 1 1 1 0 0 1.260 DL_VCORE2
CORE

CORE
0 1 1 1 0 1 1.244

B B

A
DELL CONFIDENTIAL/PROPRIETARY A
Compal Electronics, Inc.
Title
SCHEM,PLN,MN,KAPALUA II VCC_CORE
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 47 of 59
8 7 6 5 4 3 2 1
 5 4 3 2 1

DCDC_PWRSRC
MAX163_VDD
PR24

470P_0805_100V7K
10_0402_5%

1U_0805_25V4Z

1U_0805_25V4Z
MAX1632_V+ 1 2
PD30

2
PC152

PC186

PC187
PWR_SRC PL112
FBM-L11-453215-900LMAT_1812 EC11FS2
2 1 PR129

2
22_1206

4.7U_1206_16V6K
SNB 2 1
MAX1632_VL
D D

0.1U_0805_50V7M

@1U_0805_25V4M
2200P_0603_50V7K
0.1U_0805_50V7M
4.7U_1210_25V6K

4.7U_1210_25V6K

4.7U_1210_25V6K

4.7UF_1210_25V6K

2
RB751V-40

RB751V-40
1

1
PC150

PC119

PC118

PC109

PC115
PC38

PC51

PD31

PC54

PC53

PD15
8
7
6
5

2200P_0603_50V7K
0.1U_0805_50V7M
PC31

PC32
2
+5VSUS Source
2

Z4701
1

1
PQ41

5
6
7
8
SI4410DY_SO-8 PQ39
4 PU6 PC49 SI4410DY_SO-8

2
22 5 0.1U_0805_50V7M +5VSUSP
V+ VDD PR18
1 2
+3VSRCP PR27 PL9 PC117 21 18 MAX1632_BST5 0.011_2512_1%
+3VSUS Source

2
0.012_2512_1% 10UH +-20% SPC-1203P-100 4.5A 0.1U_0805_50V7M VL BST5 MAX1632_DH5 PU6_DH5B
23 16 1 2 4 1 2

1
2
3
1 2 1 2 1 2 PR120 MAX1632_BST3 25 SHDN# DH5 17 MAX1632_LX5
BST3 LX5

1M_0603_5% 47P_0402_50V8J

2M_0402_5% @ 47P_0402_50V8J
0_0603_5% 19 MAX1632_DL5 PR119
100P_0402_50V8K

@ 100P_0402_50V8K
1

8
7
6
5
DL5
0.1U_0402_16V4Z

0.1U_0402_16V4Z
150U_D2_6.3VM_R15

150U_D2_6.3VM_R15

PC185
PU6_DH3B 1 2 PU6_DH3 27 0_0603_5%
1

3.57K_0603_1%
1

1
@ 0_0603_5%
DH3
EP10QY03

14 MAX1632_CSH5
1

3
2
1

1
CSH5
PD25

PC99

PC95

PC71

PC184

PC313

PC120
+ + PQ42 MAX1632_LX3 26 13

3
LX3 CSL5

1
PR20

PR23
SI4810DY_SO-8 12 MAX1632_FB5 PL8

5
6
7
8
FB5

150U_D2_6.3VM_R15

150U_D2_6.3VM_R15
@ EC10QS04
24 11 SDT-1403P-100-120
2

1
DL3 RESET#

PD26

PC312

EP10QY03
4 MAX1632_DL3 15
2

2
SEQ

PC110

PC35

PD10
1 6 PQ40 + +
CSH3 SYNC

PR140

@ EC10QS04
2 9 MAX1632_REF SI4810DY_SO-8

1 2
CSL3 REF
3

2
FB3
2

1U_0805_10V7K
0_0603_5%

PD11
10 4 4

1
2
3

2
10K_0603_1%
1

2
0_0603_5%

0_0603_5%
SKIP# 12OUT

PR914
MAX1632_CSH3 Z4702 7 20
TIME/ON5 PGND

PC46

PR19

PR786
28 8
RUN/ON3 AGND
PR785

PR21

MAX1632_FB3

2
MAX1632_SSOP-28
1

3
2
1

2
@ +5VSUSP @
2

1
@

@ 100K_0402_5%
2
MAX1632_VL

@ 0.1U_0603_25V7M
PR32
NC_3V_TEST

2
PC190
C C
SRCPWROK_3V <<40>>

1
make sure driving +12VP NC_5V_TEST

1
Q33, Q34, Q35, Q38 = SI4800 / FDS9412 PQ17
TP0610T_SOT-23
<<16,34,37,40,44>> RUN_ON PR31
@

100K_0402_5% MAX1632_12OUT 3 1
1 2

100K_0402_5%
<<38,40>> THERM_STP#

4.7U_1206_16V6K
Reserved PR914, PC312, and PC313

1
for reducing output cap. if MAX1902 used.

PR25
PR28

1
PC45
2.2K_0603_5%

2
<<34,40>> SUS_ON 1 2

1
PC188 PC189

@ 0.1U_0603_25V7M
2

2
Z4703
2.2U_0805_16VFZ 2.2U_0805_16VFZ

2
2
PC191
PR611
Reserve PC312, PC313, PR914

1
240K_0603_5%
1

1
47K
<<38>> EN_12V
2

PQ19 47K

3
DTC144EKA_SOT-23

+5VALW Source +3VALW Source

(120mA,20mils ,Via NO.= 1)
B
PJP3 +5VALW +3.3VRTC B
+12VP 2 1 +12V
PQ52 +3VALW
JOPEN/+12V +RTC_PWR PQ51 SI2301DS_SOT-23
SI2301DS_SOT-23

(5A,200mils ,Via NO.= 10) 3 1

PJP2 3 1
1 2 +5VSUS
+5VSUSP
PAD-OPEN 4x4m

2
2
PJP5 PR48 PR761
(5A,200mils ,Via NO.= 10)
1 2 100K_0402_5% 100K_0402_5%
+3VSRCP +3VSRC
ALW_ENABLE# 1 2 Z4704 1 2
<<40>> ALW_ENABLE#

47U _6.3VM_B
PAD-OPEN 4x4m
0.47U_0603_10V7K

0.1U_0402_16V4Z
47U _6.3VM_B

1
PC145
PD23 PD55
1

1
PC144
PC70

PC69
RB751V-40 RB751V-40
2 1 2 1

2
2

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
SCHEM,PLN,MN,KAPALUA II DC to DC
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 48 of 59
5 4 3 2 1
 5 4 3 2 1

+DC_IN
+RTC_PWR

1
75K_0402_1%

1K_0402_5%
+SDC_IN

PR613
PR612
D D
PR615

3
PR614 10K_0402_5%
0.015_2512_1% 1 2 2 PQ63
1 2 2SA1036K
+DC_IN PR618

1
2

2
4.7U_1210_25V6K
1M_0402_5%

2
1K_0402_5%
PR616 PR617 N18002939 1 2 ACAV

1
PC192

PR622
PD43 4.7_0402_1% 4.7_0402_1%
RB751V-40

3
12.7K_0603_1%
PC193

1
100K_0402_5%
0.01U_0402_50V7K

PR619

PR620
1 2 PR621 2 PU12

@
100K_0402_5% AS2431
CSSP CSSN 1 2

1
ACAV <<35,40,42,50>>

1U_0805_25V4Z

1U_0805_25V4Z

1U_0805_25V4Z

2
2

2
@ 75K_0402_1%
PC194

PC195

PC196

PR623
+SDC_IN

1
PR624 PC197

@
100K_0402_5% 1U_0603_6.3V5M

1
1 2 1 2

26

25

5
6
7
8
PC198 PR625 +SDC_IN

2200P_0603_50V7K

0.1U_0805_50V7M
0.01U_0402_50V7K 33_0402_5%

CSSN
CSSP

10U_1210_50V7M

10U_1210_50V7M

3@ 10U_1210_50V7M
0.1U_0603_25V7M
1 2 DCIN 1 2 1 2 PQ64
DCIN LDO

2
PC200

PC201
SI4800DY_SO8

2
PC199

PC203

PC204

PC202
PC205 CVS 28
0.01U_0402_50V7K CVS DLOV PD44
21 4

1
PC206 CCS DLOV RB751V-40
1 2 5

1
0.01U_0402_50V7K CCS
24 CHG_BST 1 2
PR626 CCI BST
1 2 6
C 10K_0402_5% CCI 23 N18002960 C

3
2
1
DHI +VCHGR
1 2 CCV 7
CCV N18002937 PL120
16 1 2

5
6
7
8
PDL

3@
0.01U_0402_50V7K +VCHGR 9 PU13 5.6UH_CEP125-6R0MC-H+-20%_8.8A
BATT PC207
22 1 2 CHG_CS 1 2
LX
2

2
10K_0402_5%

10K_0402_5%

1645_DAC 10 0.1U_0805_50V7M PQ65

DAC
2

10U_1210_25V6K

10U_1210_25V6K

10U_1210_25V6K

10U_1210_25V6K
PR628

PR629

PC208

1U_0603_6.3V5M
0.1U_0603_25V7K

0.1U_0805_50V7M
27 SI4810DY_SO8 1 2 PR627

2
PDS

@ 1.2K_1206_5%
CHVREF 4 PL126 0.05_2512_1%
REF
2

1
PC209

PC210

PC211

PC212

PC214

PR630

PC213

PC303
20 DLO 4 20UH_SGC134-200_3.8A
1

DLO
15
1

INT 13 1 2
PBAT_SMBCLK <<35,43>>
1

2
SCL PR804
8

3@
2

1
PR631 GND 0.05_2512_1%
14

3
2
1
SDA PBAT_SMBDAT <<35,43>>
100K_0603_1%
CHVREF CLS PD45

3@
2 1 3 19
+5VALW CLS PGND PR632 EC31QS04
75K_0402_1%
95.3K_0603_1%

43.2K_0603_1%

0.1U_0603_25V7K

1_0603_1%
2

1U_0805_25V4Z

PC216 11 18 CSIP 1 2
VDD CSIP
2
PR635

PR636

PR633

PC215

1500P_0402_50V7K
@ 10K_0402_1% @
2
PC217

1 2 12 17 CSIN 1 2
THM CSIN
1

0.1U_0603_25V7M
0.1U_0603_25V7K
TM PR634
1

2
0_0402_5%

MAX1645A 1_0603_1%
PR637

PR638

PC218

PC219
Adress : 12H
90W_S

65W_S

+3VALW

1
1

PU14
1

7SH04 PQ66 TH
5

SN7002 1N SOT-23
1

D
2 4 130W#/90W 2
<<35>> AC_130W_90W 65W <<34>>
1

G D PQ68
2

1
100K_0402_5%

100K_0402_5%

D
0_0603_5%

B SN7002 1N SOT-23 B
@

S 2
3

2
PR640

G 2 3
3

CHG_SBATT <<35,50>>
@100K_0402_5%
PR642

PR641

S G 1
3

PQ67 S 2
3

CHG_PBATT <<35,50>>
PR643

SN7002 1N SOT-23
1

PD46
1

RB495D_SOT23
@
1

For express charging

Change 1) PQ64 to IRF7811W,
2) PQ65 to FDS6670S,
Add 1) PR804 0.05_2512_1%
2) PD45 EC31QS04, and
If use 65W adapter on Lindbergh Plus only then PR633 need change from 75K to 27K for safe. 3) PC202 10uF_1210_50V7
and delpop PR635, PR636, PU14, PQ66, PR640, PQ67, PR642 4) PL120 to 5.6uH_CEP125-6R0MC-H+-20%_8.8A
Delete PL126

65W 90W 130W

(2.93A) ( 4.0A ) ( 5.85A )
65W H L L
A A
AC_130W_90W H L H

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
SCHEM,PLN,MN,KAPALUA II CHARGER CONTROL
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 49 of 59
5 4 3 2 1
 5 4 3 2 1

For long-term solution

PD48
@ 15MQ040N PWR_SRC
+DC_IN discharge path
2 1

PQ69
SI4835DY_SO-8
8 1
+SDC_IN 7 2

2200P_0603_50V7K
10K_0402_5%

0.1U_0805_50V7M
6 3

2
D 5 D

2
PR649

PC223

PC224
4
PR650 PR651

1
10K_0402_5% 100K_0402_5%

1
2 1 2 1
PR652

1
2K_0603_1% D PQ70 D
2 1 2 SN7002 1N SOT-23 2
<<35,40,42,49>> ACAV
PQ86 PR653 G G PQ71
FDS4935 100K_0402_5% S S SN7002 1N SOT-23 PD49

3
8 1CHG_SBAT 2 1 B540C
7 D2 S2 2CHG_SBATT_N 2 1
D2 G2
+VCHGR 6 3
D1 S1
5 4
D1 G1 PQ74
SI4835DY_SO-8
8 1
PR654 PR655 7 2
<<43>> SBATT+ PWR_SRC
10K_0402_5% 100K_0402_5% 6 3
CHG_SBAT_N 2 1 2 1 5

1
D PQ75 PD50

4
2 SN7002 1N SOT-23 PC225 2
<<35,49>> CHG_SBATT
G 0.1U_0603_25V7M 1 SBAT_G
2
100K_0402_5%

S 1 2 3

3
PR656

CHG_SBATT_N RB495D_SOT23
ACAV_IN_N

33K_0402_5%
1

2
D PQ76

PR657
2 SN7002 1N SOT-23
C <<35,40,42,49>> ACAV C
G
2
100K_0402_5%

S
3
PR658

CHG_PBATT_N

1
PC227
0.1U_0603_25V7M PJP21
1

1 2 <<43>> PBATT+ 1 2
3

S
G PQ77
2 SN7002 1N SOT-23
<<35,49>> CHG_PBATT PAD-OPEN 4x4m
PR660 PR661
2
100K_0402_5%

D 10K_0402_5% 100K_0402_5%
1
PR659

CHG_PBAT_N 2 1 2 1
PQ88

4
SI4835DY_SO-8 PD51
5 5 1 8 B540C
1

6 3 3 6 2 7
+VCHGR CHG_PBAT
7 2 2 7 3 6 2 1
8 1 1 8 5

PQ78 PQ79

4
SI4835DY_SO-8 SI4835DY_SO-8 PQ80
SI4835DY_SO-8
8 1
7 2

470K_0402_5%~D

470K_0402_5%~D
6 3
5
PR798

1
47K _0402_1%

4
PR796

PR797
1 2
PD52
2
1 PBAT_G

1
B 3 B

33K_0402_5%
PR799

2
N17039440 10K_0402_1%~D RB495D_SOT23

PR662
2
PBATT+

1
SBATT+
PR794

8
47K _0402_1%

1
D
1 2 5

P
+
7 2
O PQ90
6 G
-

G
2

1
PR792 PU19B S SN7002 1N SOT-23

3
PR787 147K_0402_1% 4 LM393M_SO8
2

PC308 1K_0402_1%~D 1 2 PR800

@ 0.1U_0603_25V7M PR793 470K_0402_5%~D
100K_0402_1%~D
1

2
PBATT+ 1 2
2

PR788 PR795
2

24.9K_0402_1%~D @ 560K_0402_1%
+RTC_PWR PC309
0.1U_0603_25V7M +RTC_PWR
1

PR790
14

10K_0402_1%~D
1 2 3 3
VCC

U20B +
1 1
MM74HCT32_TSSOP14~L O N17039434
1 2 2 2
G
1

D - PU19A
<<35>> SBAT_LOW 4
IN0
2

A 6 2 PR791 LM393M_SO8 A
4

OUT 100K_0402_1%~D PD57

<<35,43>> SBAT_PRES# 5 G
IN1 PQ89 S RB495D_SOT23
+RTC_PWR
3

SN7002 1N SOT-23 PR789

GND

49.9K_0402_1%~D
1

DELL CONFIDENTIAL/PROPRIETARY
7

Compal Electronics, Inc.

Title
SCHEM,PLN,MN,KAPALUA II CHARGER
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 50 of 59
5 4 3 2 1
 5 4 3 2 1

Version Change List ( P. I. R. List )

Request
Item Page# Title Date Owner Issue Description Solution Description Rev.
D D
1 27 Ethernet 8/18/2002 Dell R318 use the same value as Lindbergh R318 change the value from 1240O to 1140O X00

2 27 Ethernet 8/18/2002 Dell Netname change for A-2 chip Change netname from 4401_CLOCKRUN to 7705M_CLOCKRUN X00

3 27 Ethernet 8/18/2002 Dell Populate R549 for 5705m controller 5702 controller do not need to change X00

4 27 Ethernet 8/18/2002 Dell Delete "POP SMBUS ISOLATION FOR 5702" text Delete text X00
LAN
5 28 8/18/2002 Dell No need for RN1 pins 1,2,3,4 to ground connection Delete RN1 pins 1,2,3,4 to ground connection X00
Transformer
LAN Delete the net name LIN_1000# and rename net of Pin G12 of Delete the net name LIN_1000#, rename net of Pin G12 of
6 28 8/18/2002 Dell X00
Transformer U1A, Page 27, to DOCK_LED_1000# U1A to DOCK_LED_1000#
Banias
7 8 8/20/2002 Dell PJP11 & PJP16 text discribe error Change PJP11 to Short, and PJP16 to Open. X00
Processor
So for now we can use 1150 Ohm 1% resistor for R318 and
8 27 Ethernet 8/20/2002 Dell R318 change the value from 1140O to 1150O X00
we will continue with the 5702 controller
C C
9 31 MINI PCI 8/20/2002 Dell Change pin 17 of JPCI from PCI_PIRQB#to PCI_PIRQD# Change pin 17 of JPCI connection to PCI_PIRQD# X00

10 42 Power DC-IN 8/20/2002 Dell Change PQ32, PR73, PR74, PR77 to NP Updated PQ32, PR73, PR74, PR77 to NP X00

11 1 Cover page 8/22/2002 Dell On the title page place the name of the project Kapalua Updated Schematic cover page text X00

12 27 Ethernet 8/23/2002 Dell Changed netname from 7705M_CLOCKRUN to 5705M_CLOCKRUN Updated netname from 7705M_CLOCKRUN to 5705M_CLOCKRUN X00
LAN Add 0O (0402 resistors) resistors to LAN_TX0-/LAN_TX0+,
13 28 8/23/2002 Dell
LAN_RX1-, LAN_RX1+, LAN_TX2-, LAN_TX2+, LAN_TX3-, LAN_TX3+ Add R776, R777, R778, R779, R780, R781, R782 and R783
X00
Transformer
Power change the control signal of 1.8V rail drain from
14 40 8/29/2002 Dell Using wrong Control signal of 1.8V rail drain on Q85.2 X00
Control RUN_ON# to RUN_ON
Change the control signal of 1.2VRUN from RUN_ON to
15 44 1.8V / 1.2V 8/29/2002 Compal Add PR766 connect to RUNPWROK, and reserved PR720 to NP X00
RUNPWROK
16 47 Vcc_core 9/03/2002 Dell Banias update PBOOT voltage spec with 1.2V change PR755 to 16.5K and PR757 to 15K X00
B Power B
17 40 Control 9/04/2002 Compal System doesn't work in using battery only change R606 value from 470K to 200K X00
Power Reduce +3VSUS power rail up response time and
18 40 9/04/2002 Compal Depoplate C680 X00
Control solve unexpected step waveform
19 16 VGA Board 9/04/2002 Compal VGA no reference voltage detected Poplate R124 X00

20 45 1.5V / 1.05V 9/05/2002 Compal SUSPWROK_1P5V control signal detected glitch issue Add PR767 and reserved PR742 to NP X00

21 46 1.25V / 2.5V 9/05/2002 Compal SUSPWROK_1P5V control signal detected glitch issue Add PR768 and reserved PR605 to NP X00
Power
22 40 Control 9/26/2002 Dell Fixes the 3VSRC to 3VRUN leakage problem Change R603 to 22O X01
Power
23 40
Control 9/26/2002 Dell We need a Soft Start feature Add C680 to 0.1uF X01

24 20 ICH4-M 9/26/2002 Dell Change Board Rev resistor to X01 Depopp R287, and Pop R286 X01
A A
25 45 1.5V / 1.05V 9/26/2002 Dell Add 0 ohm resistor at PU18 pin 15 and pin 16 Add PR769 and PR770 to 0O X01

26 46 1.25V / 2.5V 9/26/2002 Dell Add a 0 Ohm resistor at PU11 pin 15 Add PR771 to 0O X01
Compal Electronics, Inc.
Title
Changed-List History
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
DELL CONFIDENTIAL/PROPRIETARY Date: Wednesday, January 07, 2004 Sheet 51 of 59
5 4 3 2 1
 5 4 3 2 1

Version Change List ( P. I. R. List )

Request
Item Page# Title Date Owner Issue Description Solution Description Rev.
NIC high po
D 27 28 issue 10/17/2002 DELL Hi-pot test fail because RN1 pitch too close change RN1 to R785~r788 to enlarge the pitch X01 D

Add PD for
28 26 10/17/2002 DELL leverage from LK Add R789 10K PD to COEX1_BT_ACTIVE X01
BT
Dog h power The current rating of MOS and Bead is too small in Dog change Q1,F1,F2,L25 part to meet Doghouse power current
29 25 rating 10/17/2002 Compal house requirement (F1&F2 create new symbol now) X01
Fan soft
30 13 start 10/17/2002 Compal No soft start will cause +5VRUN droop low change C127 and C110 pop(don't do it per Bo's command) X01
cd audio
31 22 pull down 10/18/2002 Compal when we don't plug in CDrom, audio trace will floating add R, R to tie the INT_CD_L/R ground X01
reserve change some power/gnd to NC for reserve series ATA change JMOD1pin8,10,14,16,9,11, to NC,conecct SATA_DET#
32 22 series ATA 10/18/2002 DELL interface for module bay to pin13 X01
add SATA Add net sdat_det# from module bay to EC and remove
33 20,22,34 detect 10/18/2002 DELL Add series ATA detect in module bay X01
original sio_lid_ec#
change MINI Change JPCI pin109 and pin 123 to NC and remove
34 31 PCI pin NC 10/18/2002 DELL change MINI-PCI pin NC (No use) R457,C576 X01
cr_ref
C 35 22 return cap. 10/18/2002 DELL add a pull down cap. for cd_ref near JMOD Add C from CD_REF to gnd near JMOD and let it unpop X01 C

Reserve PCMCIA
36 29 suspend pin 10/18/2002 DELL Reserve PCMCIA suspend pin not use depop D11 and reserve it for TI_SUSPEND# X01
Lindberg change Q12,Q55,Q77 to big rating, we will wait
37 40 Power Q-SW 10/18/2002 DELL the EA report and make a decision TBD X01
Add 1.8V
38 38 10/18/2002 DELL Add the 1.8V power good to power sequence change the U12 pin 13 from RUN_ON to 1P8V_PWRGD X01
PWRGD
change DH
40 25,34 enable 10/22/2002 DELL change dog house power enable pin independent Add R and R seprate the control signal of DH X01
change to
41 10 normal part 10/22/2002 Compal change to vender normal specification part change C743 and C744 from 50V to 16V rating X01
remove pin
42 31 of MINI-PCI 10/24/2002 DELL change pin def. of MINI-PCI romove pin 118, 120 ground for JPCI X01
remove
43 42 some PS_ID 10/24/2002 DELL remove some reserve PS_ID component Remove PQ32, PR77, PR74, PR73 X01
duplicate
44 26,31 10/24/2002 DELL remove duplicate pull down Remove R789 , only use R767 X01
B
pull down B

remove not
45 29 use part 10/24/2002 DELL remove the reserve part for carrbus controller Delete R185 X01
change the del U6, R30, R24, add U2, C29, R28, R20~R23, C27, R53,
46 38 thermaltrip 10/24/2002 DELL change the thermal shut down solution from MAX to discrete C65 X01
ESD Safty
47 28 issue 10/24/2002 Compal JPH_RJ layout change connection from GND to NC. JPH_RJ pin 6 change connection from GND to NC. X01
+3VRUN, +3VSUS
48 40 FET ISSUE 10/25/2002 DELL +3VSUS AND +3VRUN POWER RAIL MOSFET PARTS CHANGED Q12 AND Q77 CHANGE PARTS FROM SI3456 TO SI4810 X01
RGB Beads Change the value of L101, L102, L103, L14, L15, L16,
49 33 10/25/2002 DELL Using 0O instead of beads X01
value changed L17, L18
50 33 Rev. changed 10/25/2002 Compal PI3L301A revision change to PI3L301BA U30 Rev. changed X01
R25 changed value to 100K and R26
51 25 Dog House 10/29/2002 DELL Must Design as Lindberg X01
(10K) change to C940 (0.022u_0805)
Changed Height limit of
A 52 9,12,15 Bulk Cap. 10/29/2002 Compal Height Restriction X01 A
C933,C934,C731,C779,C788,C789 to 1.9mm
53 9 CPU Bypass 10/29/2002 DELL Changed Voltage Limit of Bulk Cap. to 2V C671~C675,C678 Changed Voltage Limit to 2V X01

Compal Electronics, Inc.

Title
Changed-List History
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
DELL CONFIDENTIAL/PROPRIETARY Date: Wednesday, January 07, 2004 Sheet 52 of 59
5 4 3 2 1
 5 4 3 2 1

Version Change List ( P. I. R. List )

Request
Item Page# Title Date Owner Issue Description Solution Description Rev.
PAD & ME Need to BLOW OUT 2.5mm Radius from Vias used to
D 54 41 Parts 10/30/2002 Compal transition Tip and Ring from InnerLayer 4 to Bottom layer Deleted H43 to meet 2.5mm Radius gap X01 D

Magnetic LAN Analog Switch ( PI3L301BA ) serial Resistors R776~R783 changed value from 0O to 15nH
55 28 10/30/2002 DELL X01
& RJ45 change type to Inductors Inductor ( TDK MLK1005S15NJ )
POP option to Depop L66, C344, C324
56 27 11/08/2002 Compal change the POP option from 5702 to 5705 X01
5705 Pop R217, R549
Thermal shut Add U6, R30, R24
57 38 11/08/2002 DELL change the thermal shut down solution from discrete to MAX Depop U2, C29, R28, R20~R23, C27, R53, C65 X01
down to 6509
58 27 LOM 11/27/2002 Compal Depop dummy parts Depop R388 (10K_0402) and C390 (0.01U_0402) X02
PAD, ME, Add Z1(Switch-FPC), Z2(Touch_pad-FPC),
59 41 11/27/2002 Compal Add Cost-BOM parts Z3(MDC-Cable), Z4(Spk-mODULE), Z5(BT_Cable). X02
SPARE PARTS
Vcore Bypass Add C941~C944 (220UF_2V)
60 9 11/29/2002 Compal Vcore by pass capacitors adjust for cost X02
CAP. Depop C671~C675, C678 (220UF_2V)

61 40 Power Control11/29/2002 Compal package change for increase voltage tolerance C680 changed package from 0402 to 0603 X02

C 62 20 ICH4 12/02/2002 Compal Depop dummy part Depop R529 (10K_0402) X02 C

63 25 Dog House 12/04/2002 Compal package change for conponent easy to buy C940 changed package from 0805 to 0603 X02
Add R12, R26, C184 , C189 ,
64 30 Smart Card 12/11/2002 DELL Need to implement 5 Smart Card changes. Change C171 value from 390P to 470P X02
BCM5705 Need to change package from 0805(4.7UF) to 1206(10UF) for
65 27 12/11/2002 DELL C339, C346, C352, C355, C393, C662, C368, C342 X02
By Pass cost
All
66 Page Symbol 12/13/2002 DELL Put “DELL CONFIDENTIAL/PROPRIETARY” on Schematics DELL CONFIDENTIAL/PROPRIETARY X02
Pages
67 20 ICH4 12/13/2002 Compal Delay Thermtrip to ICH4 so Intruder have time to get latch Add C46 (0.1UF_0402) X02
For Charger Selector Used
68 38 Thermtrip 12/17/2002 DELL (SIO_THERM_PWRDN net changed to SBAT_LOW) Delete R206 & Q22 X02

69 27 BCM5705 12/17/2002 DELL Delete 4401 Conponents Delete U43, R388, C390, R367, R368 X02
LAN 12/17/2002 DELL Delete 4401 Conponents Delete R551 ~ R554 X02
B 70 28 B
Transformer
LAN
71 28 12/18/2002 DELL Changed Spec 2KV to 3KV C1 X02
Transformer
72 17 TV OUT 12/18/2002 DELL Depop C14 for Cost Depop C14 X02

73 33 DOCKING CONN.12/18/2002 DELL Remove RGB Bead Delete L101, L102, L103, L14 ~ L18 & Trace X02

74 23 AC,97 CODEC 12/18/2002 Compal Added Resistors for TPS793475 LDO Add R792, R793 (@) X02

75 23 AC,97 CODEC 12/18/2002 DELL Change the Value from 0 ohm to 1UF_0805 C636 X02

76 17 TV OUT 12/18/2002 DELL Change RGB Bead Value & Package Changed L5, L104, L105 X02

77 35 SIO 12/18/2002 Compal ESD Cap is Needed on Reset to McCallen Add D74 for ESD (@) X02

A 78 30 Smart Card 12/19/2002 DELL Added Cap (4.7uF_0805) for SCR_VCC_C to Depop Add C945 for depop (@) X02 A

79 17 TV OUT 12/19/2002 Compal Depop C10, C11, C661 for RGB Signals Depop C10, C11, C661(@) X02

Compal Electronics, Inc.

Title
Changed-List History
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
DELL CONFIDENTIAL/PROPRIETARY Date: Wednesday, January 07, 2004 Sheet 53 of 59
5 4 3 2 1
 5 4 3 2 1

Version Change List ( P. I. R. List )

Request
Item Page# Title Date Owner Issue Description Solution Description Rev.
D 80 40 Power Control 12/19/2002 Dell Change ALW_ENABLE# control methos through OR gate Added R794, R795, R796 X02 D

81 38 Thermtrip 12/19/2002 Dell THERM_PWRDN add RC delay Added R798, C946 X02

82 26 MDC, BT 12/19/2002 Dell Pop JPT pin 7 resistor Added R765 X02

83 35 SIO 12/19/2002 Dell SBAT_LOW pull-up through 4.7K resistor Added R797 X02

84 24 Phone JACK 12/20/2002 Dell R252 to be connected to EXT_MIC_PLUG instead of EXTMIC_PLUG R252 X02
add a 100PF cap to GND on Sheet 24 on the EXTMIC_PLUG so
85 24 Phone JACK 12/20/2002 Dell that signal is terminated as well for protection purposes Added C947 X02

86 35 SIO 12/20/2002 Compal To prevent ACAV from leaking Current for OTP event Added R799, R800 & ACAV through AND gate X02

87 20 ICH4M 12/20/2002 Dell Board ID X02 Pop R278, R287 & Depop R279, R286 X02

C 88 35 SIO 12/20/2002 Dell Add Battery Selector Circuit U27.H13 netname changed to SBAT_LOW X02 C

89 28 Magantic 12/21/2002 Dell Change Magantic vendor to Transpower L24 (GB1G04-T) X02

90 19 ICH4 01/02/2003 Compal Change RTC 32.768KHz Crystal to 10ppm X5 X02

CPU,Odem,DDR
91 09,12,15 bypass 01/03/2003 Dell Reduce Component Hight from 3.1mm to 2.8mm C78, C796, C910, C935, C936 X02
Change Cap Value from 15pF to 12pF to
92 19 ICH4 01/07/2003 Compal Improve Frequency Tolerance C581, C586 X02
Change Cap Height Dimension for placing Height
93 21 ICH4 01/07/2003 Dell Restriction Area C585 X02
Pop R286
94 20 ICH4 01/20/2003 Dell Change Board ID to X03 Depop R287 X03

95 39 JLID 01/20/2003 Compal Change for Switch-Board EMI solution Depop R214 X03

B 96 35 SIO 01/22/2003 Compal Change Footprint for ESD D74 (@) X03 B

97 27 LOM 01/30/2003 Dell Change Resister Value for RDAC R318 (1.18K) X03

98 38 Thermtrip 01/30/2003 Dell Change Trip Temperature Point to 86 C for OTP R24 (22.6K) X03
Added Pull Down Resister to prevent LOM LED from doing
99 28 Magantic 01/30/2003 Compal abnormal behavior. Added R400, R401, R402 X03

100 17 TV-Out / CRT 02/06/2003 Dell CRT H/V sync Need to NO-POP Depop R6, R16 X03

101 25 USB 2.0 02/06/2003 Dell Reduce Component Hight from 3.1mm to 2.8mm C300, C304, C329 X03

102 27 LOM 01/30/2003 Dell Back to The Original Resister Value for RDAC R318 (1.15K) X03

103 38 Thermtrip 02/12/2003 Dell Change Trip Temperature Point to 84.5 Degree C for OTP R24 (24K) X03

A 104 20 ICH4M 02/17/2003 Dell Changed Board ID to A00 Pop R279, R280, R287 & Depop R278, R281, R286 A00 A

105 28 Magantic 02/17/2003 Dell Changed Reversion of LAN Analog Switch to Rev:D U30 A00

Compal Electronics, Inc.

Title
Changed-List History
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
DELL CONFIDENTIAL/PROPRIETARY Date: Wednesday, January 07, 2004 Sheet 54 of 59
5 4 3 2 1
 5 4 3 2 1

Version Change List ( P. I. R. List )

Request
Item Page# Title Date Owner Issue Description Solution Description Rev.
D 106 27 LOM 02/11/2003 Dell Added 4401 Optional Circuit Added U43, R367, R368, R388, C390 (1@) X00 D

107 25 USB 2.0 02/11/2003 Compal DH_PWRSRC_OC Pull-Down for L2 Added R403 (1@) X00

108 25 USB/DH 02/11/2003 Dell Added TPS2042 to Replace TPS2043 for Lindbergh2 Added U70 (1@) X00
Deleted PR65
109 34 SIO 02/12/2003 Compal PR65 Has Wrong Naming Rule and Have to Rename to R405 X00
Added R405
110 27 LOM 02/18/2003 Dell Need to Add Pin A7 with Bead for +3VRUN and +V_3P3_LAN Added L109(1@), L110(2@) X00

111 28 Magnetic 03/11/2003 Compal LAN Anolog Switch Pin 14 Changed to NC U30 X00
put the pads for zero ohms pop options for L21,
112 25 USB/DH 03/18/2003 Dell Added R348~R359 (@) X00
L22 , L23, L28, L41, L13 common mode choke.
113 27 LOM 03/18/2003 Dell 1K for 4401 and 4.7K for 5705M [Overlap with R317(2@)] Added R317 (1@) X00

C 114 20 ICH4M 03/18/2003 Compal Board ID X00 ( LBK-Adds ) Pop R267, R281, R279, R287 Depop R286, R278, R280, R266 X00 C

115 25 USB/DH 03/25/2003 Dell ESD diodes for the DH_SMbus Added D30 (@) X00

116 34 SIO 04/01/2003 Dell MiniVU Future Platform Requirements Added Q100, R360, R361 (@) X00
Put the Pads in to Reserve the Possiblity of
117 17 TV Out 04/04/2003 Compal Added L126 (@) X00
Removing the Transformer (L57) in the Future
CLOCK Gen Added R551~R553, C560.
118 06, 23 04/07/2003 Dell Remove 24.576MHz Crystal for Codec X00
/ CODEC Depop X7, C616 (@). C622 ( 22P to 0 ohm)
119 25 USB/DH 04/23/2003 Dell ESD diodes for the DH_SMbus (Pop Option Implement) Pop D30 (2@) X00

120 34 SIO 04/23/2003 Dell MiniVU Future Platform Requirements Pop Q100, R360, R361 X00

121 41 PAD 04/29/2003 Compal EMI CLP21 have chance to short test point. Depop CLP21 X00
U34, U35, u36,C40, C659, U3, R36,
B 122 32, 33 Docking 04/29/2003 Dell DOCK PCI Components Removed for Lindbergh Series C31, U14, U17, U18 (All for 2@) X00 B

123 20 ICH4M 05/29/2003 Compal For the DPRSLPVR issue Added R460 (100K) X01
Pop R286
124 20 ICH4M 05/29/2003 Compal Board ID X01 ( LBK-Adds ) Depop R287 X01

125 27 LOM 06/05/2003 Dell RDAC 1.18K for 4401 and 1.15K for 5705M R318 X01

126 20 ICH4M 06/13/2003 Compal Board ID A00 ( LBK-Adds ) Pop R287, R278 and depop R286, R279 A00
Pop R348~R359 and depop
127 25 USB 2.0 06/18/2003 Dell Using 0 ohm resistor to substitute common choke A00
L21, L41, L22, L23, L28, L13
ITP Debug
128 13 06/18/2003 Compal Change pullup R42, R43 to 2.2K to fix SMBus issue R42, R43 A00
CONN. & FAN
129 6 Clock Gen. 06/18/2003 Compal Change R98 and R551 to 10ohm to meet SMSc spec. R98, R551 A00

A 130 23 AC97 06/18/2003 Dell Change R284 to 49.9ohm for modem issue with BitCLK issue R284 A00 A

LAN Add diode to LAN_ACTLED to prevent damage to

131 28 06/18/2003 Dell Add D75 A00
TRANSFORMER the LAN chipset through backdrive
Compal Electronics, Inc.
Title
Changed-List History
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
DELL CONFIDENTIAL/PROPRIETARY Date: Wednesday, January 07, 2004 Sheet 55 of 59
5 4 3 2 1
 5 4 3 2 1

Version Change List ( P. I. R. List )

Request
Item Page# Title Date Owner Issue Description Solution Description Rev.
LAN
D 132 28 06/18/2003 Dell Change R374 to 150ohm for the brightness of LED R374 A00 D
TRANSFORMER
Pop R286
133 20 ICH4M 07/29/2003 Compal Board ID A01 ( LBK-Adds ) A01
Depop R287
PAD and Depop CLP15,
134 41 Standoff 10/29/2003 DELL Reducing Clipper for cost down CLP20, CLP24 A01

135 33 DOCKING CONN 12/09/2003 Compal Change Q43 to PDTC144EK for improving EDS broken issue. Q43 A01

136 9 CPU Bypass 12/18/2003 Compal Remove capacitor for cost down Depop C50, C49, C57, C61, C60, C56 A01
Depop C780, C781, C775, C779, C789, C78, C776, C460,
137 12 Odem 12/18/2003 Compal Remove capacitor for cost down C422, C407, C420, C392, C366, C351, C358, C363, C397 A01
DDR-SODIMM
138 15 12/18/2003 Compal Remove capacitor for cost down Depop C933, C936 A01
SLOT2
Depop C585, C617, C624, C631, C258, C638, C667, C240,
139 21 ICH4 12/18/2003 Compal Remove capacitor for cost down C256, C239, C243, C237, C230, C235, C255, C916, C917 A01

C 140 37 LPT 12/26/2003 Dell Remove SIO port for cost down Depop R308, R309, R310, CN2, CN3, JSIO A02 C

Depop JPLT, R11, R10, R306, R305, R9, R8, L6, L7,
141 37 LPT 12/26/2003 Dell Remove Parallel Port for cost down L8, L56, L55, L9, L10, L54, L53, L11, L12, CN4, A02
CN1, CN143, CN144, CN5, CN6, D22, R307, R13, C8
142 37 LPT 12/26/2003 Dell Remove RS-232 Transciever for cost down Depop U32, C347, C327, C62, C343, C338, U38 A02

143 37 LPT 12/26/2003 Dell Remove SPDIF function Depop U39, C349, R347, C290, L57, R311 A02

144 21 ICH4 12/26/2003 Dell ADD RTC battery for replace bridge battery Depop R804, Pop R801, R802, D76, BATT1, R803 A02
Depop R450, R452, R451, R453, R455, R456, R454,
145 39 JLED/IR/PS2 12/26/2003 Dell Remove IR function for cost down A02
U52, C571, C570, C573
147 38 IR,PS2,RTC 01/02/2004 Dell For the upcoming replacement of SC1476 with SC450 Add Depop resister R805, R806, R807 A02

148 20 ICH4M 01/07/2004 Dell Board ID A02 ( LBK-Adds, Add Linbergh Plus) Pop R280, R287, R279 and depop R281, R286, R278 A02
B B

A A

Compal Electronics, Inc.

Title
Changed-List History
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
DELL CONFIDENTIAL/PROPRIETARY Date: Wednesday, January 07, 2004 Sheet 56 of 59
5 4 3 2 1
 5 4 3 2 1

Version Change List ( P. I. R. List ) for Power Circuit

Request
Item Page# Title Date Owner Issue Description Solution Description Rev.
D D
1 42 Power DC-IN 8/20/2002 Dell Change PQ32, PR73, PR74, PR77 to NP R318 change the value from 1240O to 1140O X00
Change the control signal of 1.2VRUN from RUN_ON to
2 44 1.8V / 1.2V 8/29/2002 Compal Change netname from 4401_CLOCKRUN to 7705M_CLOCKRUN X00
RUNPWROK
3 47 Vcc_core 9/03/2002 Dell Banias update PBOOT voltage spec with 1.2V Change PR755 to 16.5K and PR757 to 15K X00

4 45 1.5V / 1.05V 9/05/2002 Compal SUSPWROK_1P5V control signal detected glitch issue Add PR767 and reserved PR742 to NP X00

5 46 1.25V / 2.5V 9/05/2002 Compal SUSPWROK_1P5V control signal detected glitch issue Add PR768 and reserved PR605 to NP X00

6 45 1.5V / 1.05V 9/26/2002 Dell Add 0 ohm resistor at PU18 pin 15 and pin 16 Add PR769 and PR770 to 0O X01

7 46 1.25V / 2.5V 9/26/2002 Dell Add a 0 Ohm resistor at PU11 pin 15 Add PR771 to 0O X01

Turn off have glitch because +3VSUS issue, Add PR780 to 10KO
8 45 1.5V / 1.05V 10/17/2002 Compal X01
C so pull high to +5VSUS can improved C

Intersil Issue can solved by Fairchild solution Add PR772, PR773 and change PC282 to 0.01U_0805 size
9 45 1.5V / 1.05V 10/17/2002 Compal Change the control signal of 1.05VSUS from X01
RUNPWROK to SUSPWROK_5V

Change the 1.8VRUN Regulator from CM3718 to

10 44 1.8V / 1.2V 10/17/2002 Dell Change +1.8V Regulator X01
MAX1927
11 45 1.5V / 1.05V 10/17/2002 Dell +1.5VSUS POWER GOOD ISSUE change PL124 to 5.0U_20%_3.0A to 4.7U_20%_3.9A X01

Add PR778, PR783, PR784, PR781, PR782, PR785, PR786

12 44-48 All Regulaters 10/17/2002 Dell Add test point for DELL testing X01
to NP for Test point

Add P303 and Change PC202, PC203, PC204, PC211, PC212,

13 X01
49 Battery charger 10/23/2002 Dell Fast Charger for short time and Cost-Down PC213 to 10U_1210 and Delete PU15's circuit
Change PR636 to 43.2K ohms for 65W Adpater plug in
B B

14 45 1.5V / 1.05V 10/23/2002 Dell Change OCSETt and SEN Resistor change PR735, PR736 to 75K ohms, Change PR727 to 330
X01
ohms, Change PR728 to 634 ohms

Change PR744, PC243, PC251, PC252, PR765

15 47 Vcc_core 10/28/2002 Dell Cost-Down and change deepsleep offset For adjusts slope and sleep offset X01
PQ7, PQ11, PD24, PD27 to NP for Cost-Down

Add PC304 PC306 to 0.1U, Add PC305 PC307 to 2200P

16 47 Vcc_core 10/28/2002 Dell EMI Broad band ISSUE X01
change PR747 PR756 to 3.3 ohms

Add PR649, Del PD48,Change PD49 PD51 to B540C

17 50 PWR_Selector 11/14/2002 Compal Charger selector ISSUE X02
and Change PR657 PR662 to 33K

A A
18 42 Power DC-IN 11/20/2002 Dell AC-IN Detect Issue Change PR70 to 4.7K X02

19 Change PR627 to 28m ohms X02

49 Battery charger 11/26/2002 Dell Charger Current to 5.3A
Compal Electronics, Inc.
Title
Changed-List History
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
DELL CONFIDENTIAL/PROPRIETARY Date: Wednesday, January 07, 2004 Sheet 57 of 59
5 4 3 2 1
 5 4 3 2 1

Version Change List ( P. I. R. List ) for Power Circuit

Request
Item Page# Title Date Owner Issue Description Solution Description Rev.
D D
20 47 Vcc_core 11/29/2002 Compal Delete V-core Cap for Cost-Down Delete PC232 PC233 PC246 PC247 for Cost-Down X02

Delete PQ72, PQ73

New Battery selector switch design to sopport Change PQ86 to Dual-Mosfet ,Add PQ88 Mosfet
21 50 PWR_Selector 12/16/2002 Dell X02
secondry battery discharge before primary Add PU19, PC308, PC309, U20B, PQ89, PQ90, PD57
And PR787, PR788, PR789, PR790, PR791, PR792, PR793
PR794, PR795@, PR796, PR797, PR798, PR799, PR800
Add PQ91, PD58
22 42 Power DC-IN 12/17/2002 Dell EFT Issue and Dell request X02
PR762 to depop

23 42 Power DC-IN 12/18/2002 Compal EFT Issue Add PR801 to depop X02

24 42 Power DC-IN 12/19/2002 Dell Added PS_ID Pull-up Add PR802 (4.7K_0402)@ X02
C Added +DC_IN 10K_0805 Pull-down to GND to solve C
25 42 Power DC-IN 12/19/2002 Dell Add PR803 (10K_0805) X02
potential adapter insertion secqurncing issue
Added mO resistor in palleal with PR627 to
26 49 Chaqrger 12/20/2002 Dell Add PR804 0.05mO_2512) X02
support 6.0Amp maximun charging current
27 49 Chaqrger 12/20/2002 Dell Changed the Value of PR627 from 0.028 to 0.05 PR627 chande to 50m ohms X02
Prevent 3.3ALW voltage droop during OTP
28 44 1.8V / 1.2V 12/20/2002 Compal Added PU20 (@) X02
& ThermTrip shutdown
29 49 Chaqrger 12/20/2002 Dell Changed the Value of PL120 from 6.0U to 5.6U PL120 chande to 5.6UH_+-20%_8.8A X02

30 42 Power DC-IN 12/20/2002 Dell Prevent Bondi PS_ID Pin Issue Add PR762 and PQ91@ X02

31 42 Power DC-IN 12/31/2002 Compal Change SI4435 to SI4825 to Increase Design Margin PQ1 X02
Pop PQ91, PR802
32 42 Power DC-IN 01/22/2003 Dell Prevent Bondi PS_ID Pin Issue X03
Depop PR762
B B
33 42 Power DC-IN 01/22/2003 Compal Change Footprint PD58 X03
Change PU11, PU18 to ISL6225CA & PC285 to 330uF_2.5V_15mO
34 45 1.5V / 1.05V 01/30/2003 Dell ISL6225B swing issue X03
Depop PR730, Pop PR734 to 0O
35 43 Battery Conn. 03/05/2003 Dell To Use Common Part as Bondi ( Change PN to DC04001440L ) JSBAT A00
To Reduce RTC Bridge Battery Leakage Current
36 49 Chaqrger 03/05/2003 Compal PU13. PC216, PR637, PC217, Depop PR641 A01
(Changed Power Plane from +RTC_PWR to +5VALW)
37 42 Power DC-IN 04/07/2003 Dell Reserve zero ohm bypass resistor for Rbatt fuse Adding PR850(@) X00
Fuse PFS2 Removed and Diode PD3 Shorted. The RBAT Blow Up Pop PFS2
38 42 Power DC-IN 04/07/2003 Dell X00
(200 deg F). POP the Fuse instead of the 0hom resister. Depop PR850
39 45 1.5V / 1.05V 04/23/2003 Dell Increased OCP for S3 Issue. (330O to 732O) PR727 X00

40 47 Vcc_core 06/13/2003 Dell CPU_core PWM SC1476 IC issue Adding PR901, PR902 to 100K, PR903(@) PR904(@) A00
A A
41 47 Vcc_core 07/29/2003 Dell PWM SC1476 Chip issue solution for First system on Adding PD60 A01

42 47 Vcc_core 10/15/2003 Compal SC1476 chip update to R6 Version for fixed Change PU1 to R6 Version chip, and delete PD60 diode A01
First start-up issue
Compal Electronics, Inc.
Title
Changed-List History-2
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
DELL CONFIDENTIAL/PROPRIETARY Date: Wednesday, January 07, 2004 Sheet 58 of 59
5 4 3 2 1
 5 4 3 2 1

Version Change List ( P. I. R. List ) for Power Circuit

Request
Item Page# Title Date Owner Issue Description Solution Description Rev.
D For using re-chargeable RTC battery instead of Depop PQ35, PQ36, PD1, PD3, PD4, PD8, PFS2, D
43 42 PWR_DCIN 12/26/2003 Compal A02
bridge battery PR6, PR7, PR82, PR850, and PC15, but pop PR851 0_0603
Second battery charge fail
44 43 Battery Conn 12/26/2003 Compal Adding PR915 and PR916 resistor. A02
SBAT_ALARM#(E8/IN4) always kept to low voltage
no-thermal function used, 1) Depop PR637, PR643, PC216, PD46, and PQ68
45 49 Charger 12/26/2003 Compal A02
conecting pin12 THM directing to GND 2) Change PR638 to 0_0402_5%; PR641 to 0_0603_5%
Reserve PR914, PC312, and PC313
46 48 3.3V/5V/12V 12/26/2003 Compal Reserved/Depop PR914, PC312, and PC313 A02
for reducing output cap. if MAX1902 used
47 44 +1.2V & +1.8V 12/26/2003 Compal Modify 3.3VRTC Source Remove PR111, T1 A02
For LindberghPlus with 65W adapter only:
48 49 Charger 01/02/2004 Compal For cost down on Lindbergh Plus with 65W adapter only delete PR635, PR636, PU14, PQ66, PQ67, PR640, and PR642 A02
change PR633 from 75K_0402_1% to 27K_0402_1%
For non-express charging function:
change 1) PQ64 to SI4800DY, 2) PQ65 to SI4810DY
C remove PD45, PL120, PR804, and PC202 add PL126 C

49 49 Charger 01/02/2004 Compal For non-express/express charging function For express charging function: (same as Kapalua)
A02
Pop : PC202, PD45, PL120, PR804
Depop: PL126
Change: 1) PQ64 to IRF7811W, 2) PQ65 to FDS6670S

50 49 Charger 01/02/2004 Compal Use double footprint for comparable PL120 and PL126 is double footprint. A02

B B

A A

First start-up issue

Compal Electronics, Inc.
Title
Changed-List History-3
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
DELL CONFIDENTIAL/PROPRIETARY Date: Wednesday, January 07, 2004 Sheet 59 of 59
5 4 3 2 1