eqs slabsrar C8051F 120NC wv adn com > silabs.rat > C8OSIF120,INC, change:2007-02-13.size1 74170 ‘Search codes } REVISION 1.6 PYLB NawE: C8051F120. TARGET ycUs: C8051°120, } DESCRIPTION: Register/bit definitions Ler tke C8051F120 product family. Ne PI21, F122, F123, P24, F125, F126, F127 {REGISTER DEFINITIONS 20 SP DeL be SFRPAGE SPRNEXT SFRUAST 2coN FLSTAT crrocy cpriey ‘TCON ‘mop ceroyp ceriy> PLLOCN osczen 10 osczen ma oscxen ‘THO TH PLLODIV cxcon PLLOMUL Pact. PLLOFLT PL SSTAO MACOBL MACORE MACOACCO MacoACCI aconcc2 SFREGCN MACOACCS MACOOVR cLKSEL scoxa SCONI SBUFO pata, DATA, DATA DATA, DATA DATA, para, DATA, DATA, DATA, DATA, DATA, Dara, Data, DATA, DATA, DATA, DATA, DATA, Dara, para, DATA, DATA, DATA, DATA, DATA, pata, DATA DATA, DATA, DATA DATA, pata, DATA DATA, DATA, DATA, DATA, DATA, ose ose 082 0834 sau oasis ose 087, ose ose open osx son 8H 89H 089 sn oss ospi api sci sce, ape 8H ope osx ose ose 90H os os 92H 0938 saw 095i oven osc 097 oot ose sen 99H PORT 0 LATCH STACK POINTER DATA POINTER LoW BYTE DATA POINTER HIGH BYTS SPR PAGE SELECT SFR STACK NEXT PAGE SFR STACK LAST PAGE POWER CONTROL FLASH STATUS COMPARATOR 9 CONTROL COMPARATOR 1 CONTROL ‘TIMER/COUNTER CONTROL ‘TIMER/COUNTER MODE COMPARATOR 0. CONFIGURATION COMPARATOR 1 CONFIGURATION PLL CONTROL INTERNAL OSCILLATOR CONTROL ‘TIMER/COUNTER 0 LOW BYTE. INTERNAL OSCILLATOR CALIBRATION TIMER/COUNTER 1 LOW BYTE, EXTERNAL OSCILLATOR CONTROL ‘TIMER/COUNTER 0 HIGH BYTE TIMER/COUNTER 1 BIGH BYTE PLL DIVIDER CLOCK CONTROL PLL MULTIPLIER FLASH WRITR/HRASE. CONTROL PLL PILTER PORT 1 LATCH UART 0 STATUS MACO B REGISTER Low BYTE MACO B REGISTER SIGH aYTE MACO ACCUMULATOR BYTE 0 ACD ACCUMULATOR BYTE 1 ACO ACCUMULATOR BYTE 2 SFR PAGE CONTROL MACO ACCUMULATOR BYTE 3 MARCO ACCUMULATOR OVERFLOW BYTE SYSTEM CLOCK SELECT ART 0 CONTROL ART 1 CONTROL ART 0 DATA BUFFER read pudn.comydownloadsi8/sourcecoda/compilr/857713/sabs/Exampes../CB0SiF120.NC_ hmeqs sBuEL SPLOCEG cceova, SPIODAT PaMpour P5MDouT SPIOCKR P6MDOUT PiMDOUT 22 Emzore cchocy ret 0cN ccuors EMLoce ccHOLe POMDOUT PIMDOUr P2Mpour e3mpour 1 SADDRO PIMDIN 23 PSBANK FLACL FLSCL IP SADENO awxoce aUK2cE auxosL BUK2S1 apcoce apcece ADCOL aDc2 aDcoa MACOSTA SMBOCN MACOAL SUBOSTA MacOAK SUBODAT MacocE SMBOADR ADCOGTL, ancagt ADcogrTH ADCOLTL, ADC2LT ADCOLTH. 24 ‘wr2en racy cwRacy rwR2ce TwRSCE ‘TwRACE RCAP2L RCAP3L, RCAPAL RAPE RCAP3E DATA, pata, DATA, DATA, DATA, DATA, DATA, DATA, DATA, DATA, DATA DATA, pata, DATA, DATA, DATA, DATA Dana, DATA, Data, para, DATA, DATA, DATA DATA, DATA DATA, para, DATA, DATA, DATA, DATA, DATA, Dara, Data, DATA, DATA, DATA, DATA, DATA, Dara, para, DATA, DATA, DATA, DATA, DATA, pata, DATA DATA, DATA, DATA DATA, pata, DATA DATA, DATA, DATA, DATA, DATA, 99H gas oon 98H ose sox 90H 9s o9Fe one onl, oats one onait asi ons, ona, ons oni oaTH one agi one 0208 oa oat oat sen 39H oan o2as aR aps osc, sci, oaEH ose oBFE ocox ocx, oct ocas can can ocae ocau ocax, ocan csi ocen ocean oct ocen ocex, ocen ocex ocan ocon ocoe ocas, ocas, ocas oc oceH slabsrar C8051F 120NC ART 1 DATA BUFFER SPI CONFIGURATION CACHE MISS ACCUMULATOR SPI DATA PORT 4 OUTPUT MODE CONFIGURATION PORT 5 OUTPUT MODE CONFIGURATION SPI CLOCK RATE CONTROL PORT 6 OUTPUT MODE CONFIGURATION PORT 7 OUTPUT MODE CONFIGURATION PORT 2 LATCH EMIF TIMING CONTROL CACHE CONTROL MIP CoNROL eacite TUNING EMIF CONFIGURATION ACHE LOCK PORT 0 OUTPUT MODE CONFIGURATION POR? 1 OUTPUT MODE CONFIGURATION PORT 2 OUTPUT MODE CONE TGURATION PORT 3 OUTPUT MODE CONFIGURATION INTERRUPT ENABLE ART 0 SLAVE ADDRESS PORT 1 INPUT MODE. PORT 3 LATCH FLASH 2ANK SELECT FLASH ACCESS LIMIT FLASH SCALE, INTERRUPT PRIORITY ART 0 SLAVE ADDRESS MASK ADCO MULTIPLEXER CONFIGURATION ADC2 MULTIPLEXER CONFIGURATION ADCO MULTIPLEXER CHANNEL SELECT |ADC2 MULTIPLEXER CHANNEL SELECT ADCO CONFIGURATION ADC? CONFIGURATION ADCO DATA WORD Lod BYTE ADC2DATA WORD ADCO DATA WORD HIGH BYTE MACO STATUS SMBUS CONTROL MACO A REGISTER LOW BYTE. SMBUS STATUS NACO A REGISTER HIGH BYTE SMBUS DATA NACO CONFIGURATION REGISTER SMBUS SLAVE ADDRESS ADCO GREATER-PHAN LOW BYTE ADC2 GREATER-THAN ADCO GRRATER-THAN HIGH BYTH ADCO LESS-THAN LOM BYTE, ADC2 LESS-THAN ADCO LESS-THAN HIGH BYTE PORT 4 LATCH ‘TIMER/COUNTER 2 CONTROL ‘TIMER 3 CONTROL, TIMER/COUNTER 4 CONTROL ‘TIMER/COUNTER 2 CONFIGURATION ‘TIMER 3 CONFIGURATION TIMER/COUNTER 4 CONFIGURATION ‘TIMER/COUNTER 2 CAPTURE/RELOAD LOW BYTE ‘TIMER 3 CAPTURE/AELOAD Low BYTE ‘TIMER/COUNTSR 4 CAPTURE/RELOAD LOW BYTE ‘TIMER/COUNTER 2 CAPTURE/RELOAD HIGH BYTE ‘TIMER 3 CAPTURE/RELOAD HIGH BYTE read pudn.comydownloadsi8/sourcecoda/compilr/857713/sabs/Exampes../CB0SiF120.NC_ hmeqs slabsrar C8051F 120NC RCAPAE DATA OCBH 7 TIMER/COUNTER 4 CAPTURE/RELOAD HIGH BYTE wR2L DATA OCcH j ‘TIMER/COUNTER 2 LOW BYTE. RIL DATA OCcH —j TIMER 3 LOW BYTE ‘wRAL DATA OCH; TIMER/COUNTER 4 Low BYTE. wR2a DATA OCH 7 ‘TIMER/COUNTER 2 HIGH BYTE era DATA OCH? TIMER 3 HIGH BYTE cera DATA OCH; ‘TIMER/COUNTZR 4 HIGH BYTE MACORNDL DATA OCEH — ; MACO ROUNDING REGISTER LOW BYTE MACORNDE DATA OCFH —j NACO ROUNDING REGISTER HIGH BYTE sMBOcR DATA OCFH SMBUS CLOCK RATE Pst DATA OD0H PROGRAM STATUS ORD REFOCN DATA ODI; VOLTAG2. REFSRENCS CONTROL. pacot. DATA O07 — > DACD Lo BYTE pacst DATA O02 j DACL Lom BYTE ACOH DATA OD3H > DACO HIGH BYTE DACA DATA OD3# —j DCL HIGH BYTE. DACOCN DATA OD4# — } DCO CONTROL DACICN DATA OD4# —} DACL CONTROL 25 DATA OD8H —} PORT 5 LATCH PCROCN DATA ODBH — 7 BCA CONTROL PcnoMD DATA ons; BCA MODE PCAOCEHO DATA ODAH —; BCA MODULE 0 MODE PCAOcetL DATA ODBH —; PCA MODULE 1 MODE REGISTER PCAOCEH2 DATA OCH —j BCA MODULE 2 MODS PCAOCEMS DATA ODDH ©; PCA MODULE 3 MODE PeaoceMa DATA ODE; BCA MODULE 4 MODE PCROCEMS, DATA ODFH —? BCA MODULE 5 MODE ace DATA CEOH — 7 ACCUMULATOR BRO DATA OEIH 7 PORT 1/0 CROSSBAR CONTROL 0 PCROCELS DATA O=18 PCA MODULE 5 CAPTURE/COMPARE LOW BYTE PCAGCEHS DATA O=2# PCA MODULE 5 CAPTURE/COMPARE HIGH BYTE, xERE DATA 02H ; PORT 1/0 CROSSBAR CONTROL 1 xBR2 DATA 03H 7 PORT 1/0 CROSSBAR CONTROL 2 BIBE DATA OR6H EXTENDED INTERRUPT ENABLE 1 Erne DATA DETH EXTENDED INTERRUPT ENABLE 2 apcocy DATA OE8H — ; ADCO CONTROL apceey DATA CEeH — ; ADC2 CONTROL 26 DATA OF8H —; PORT 6 LATCH PCAOCELE DATA OE9# —; PCA MODULE 2 CAPTURE/COMPARE LOW BYTE PCAoceH? DATA CEH 7 BCA MODULE 2 CAPTURE/COMPARE AIGH BYTE PCADCELS DATA OEBH —; BCA MODULE 3 CAPTURE/COMPARE LOW BYTE PCADCEHS DATA OBC PCA MODULE 3 CAPTURE/COMPARE HIGH BYTE, PonoceLé DATA DEDH —j BCA MODULE 4 CAPTURE/COMPARE LOW BYTE Pcnocens DATA CEEH —; BCA MODULE 4 CAPTURE/COMPARE HIGH BYTE RSTSEC DATA OEFH j RESET SOURCE 5 DATA OFOH j B REGISTER pret DATA OF6# 7 EXTERNAL INTERRUPT PRIORITY 1 Erp2 DATA OFTH EXTERNAL INTERRUPT PRIORITY 2 27 Dara OFeH PORT 7 LATCH SPIOCN DATA OF8H ©; SEI CONTROL 2CnoL, DATA OF9H —; BCA COUNTER LOW BYTE PCAOH DATA OFZ j BCA COUNTER EIGH BYTE PCAOCELO DATA OFSH —} PCA MODULE 9 CAPTURE/COMPARE LOW BYTE PCADCPHO DATA OFCH 7 BCA MODULE 9 CAPTURE/COMPARE HIGH BYTE PCAOCPLA DATA OFOH —} PCA MODULE 1 CAPTURE/COMPARE LOW BY7E Pcnoce Hl DATA OFRH PCA MODULE 1 CAPTURE/COMPARE HIGH BYTE vworen DATA OFFH — j WATCHDOG TIMER CONTROL BI? DEFINITIONS 1 TOON 088K tL BIT O8FH — TIMBR 1 OVERFLOW FLAG read pudn.comydownloadsi8/sourcecoda/compilr/857713/sabs/Exampes../CB0SiF120.NC_ hm