Addressing modes:

a) Indirect addressing, unlike the direct one, makes an address with the help of IRP bit of STATUS and
FSR registers, not from an instruction. INDF holds the address indicated by a FSR and the addressed
location is accused through this register.
b) Direct addressing, represents the most simple addressing mode of the operands stored in the
memory. Every instruction which is based on direct addressing, contains as operands, the address of
the internal memory location in which the data required for executing the instruction is memorized
Central processing unit is the brain of a uP. That part is responsible for finding and fetching the right
instruction which needs to be executed, for decoding that instruction and for executing it.
Wregister consists of a memory space that stores the operands for each instruction. It also stores the
results of each instruction.
FSR ( File rel reg. ) acts as a pointer to any other general-purpose register. It consists of a register file
address and it is used in indirect addressing.
The instruction register is an eight bit reg. and it’s used to contain the instruction just fetched from
the memory.
ADDR MUX will either take the address of the IR or the address of a result from the FSR.
The instruction register will have direct addressing so the value will be found in the memory.
Data bus ( 8 bits ) bidirectional, on this bus flows all data from the uP and is connecting all
functioning elements.
Address bus is used for accussing the internal memory, only the PC can access it.
Address registers are 16 bit registers intended for storing addrs. They may be called data counters or
pointers. They are double registers, 2x8 bit reg. Their essential characteristic is to be conn. to the
address bus, which is created by the addrs. registers. The addr. BUS appears on the left and bottom
of the illustration. In order to load the contents of these 16-bit registers, we use a data bus.
PC-> Prog. Counter
It must be present in any uP, its presence is fundamental to progr. execution. It contains the address
of the next instruction to be executed. It’s contents will be deposited on the ADR bus and
transmitted to the memory, the memory will read the contents specified by this address and send it
back to the MPU.
SP->Stack Pointer-> a dedicated register that contains the address of the top of the stack within the
memory.
Index register (IX) is a special register used to provide addressing capability called indexing. Indexing
is a facility for accessing blocks of data in the memory with a simple instruction.
ALU-> arithmetic logic unit-> a combinational digital electronic circuit that performs arithmetic and
bitwise operations on integer binary numbers. The result of the ALU will be sent to the DATA BUS.
ACCUM is a register used to store 8 bits of info, it can be read and written from it.
We have 2 ports: Port 2 and Port 0. Port2 will carry only addresses, namely the high part of
the address of the PC ( bits 8-15 ). Port 0 is multiplexed so it can send addresses ( when ALE is
on the falling edge -> the low port of the PC address ). It can also send instructions when
PSEN is on the rising edge.
INSTRUCTION FETCH
MPU will fetch instr. from an external memory and exec them.
MPU->uP, RAM, ROM -> MEMORY CHIP
PC holds the address of the next instr. to be exec. ( points to the next instruction in the
memory that needs to be exec ) PC => into ADDRESS BUS, one of the lines will be used to
select the RAM memory, the address will be presented to the memory through the address
bus and it will select an internal location in the memory, at this address will find a word.
After it was selected the MPU will promt the memory to read it. Data will appear on the
DATA pins of the memory, which are conn to the data bus. This bus is con to the 8 pins of the
MPU bus, data coming back from the memory and the instruction will now be gated back to
the MPU. These contents will be given by the control unit to the instruction register ( special
register of the control unit ). After doing the instruction, it will fetch another instr.
CONTROL UNIT-> INSIDE THE MPU CHIP
BROWN-OUT Condition
A B-OUT is a short dip in the power supply, many uP have B-OUT detection on-chip, with
programmable threshold levels. When a B-OUT occurs, the uP will reset. The uP has a
minimum operating voltage, when a glitch occurs on the power rails (Voltage drops below
minimum op. V) the uP will reset to prevent any functionality issues or major failures (wrong
instr, data results)

Role and relation between TRISA and PORTA of a PIC.

TRISA – role: pin configuration (digital I/O port module) of the port A.
TRISX.i = 1 => pin i is input
TRISX.i = 0 => output
PORTA -> data register, if this register is used as source -> it returns the data value of the pin;
destination -> the data value will be held in the port latch. (PORTX, sets the pin’s output bit
level)
Relation: both are control registers of PIC uP. Setting a TRISA bit to 1 will make the
corresponding PORTA pin an input, setting to 0, the PORTA pin will be output.