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Voltage-Balancing Method for Modular Multilevel Converters Switched at

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DOI: 10.1109/TIE.2014.2362881

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 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 62, NO. 5, MAY 2015
Voltage-Balancing Method for Modular Multilevel
Converters Switched at Grid Frequency
Fujin Deng, Member, IEEE, and Zhe Chen, Senior Member, IEEE
Abstract—The modular multilevel converter (MMC) be-
comes attractive for high-voltage and high-power applica-
tions due to its high modularity, availability, and power
quality. The voltage balance issue of capacitors is very
important in the MMC, and balancing of the capacitor volt-
age is increasingly difficult as the switching frequency is
reduced. In this paper, a voltage-balancing method is pro-
posed for the MMC switched at grid frequency with reduced
losses and does not rely on the arm current. By assigning
the low-frequency pulses with different pulsewidths, the
capacitor charge transfer in the MMC can be controlled
for keeping the capacitor voltage balancing in the MMC.
Simulations and experimental studies of the MMC are con-
ducted, and the results confirm the effectiveness of the
proposed capacitor voltage-balancing method.
Index Terms—Capacitor voltage balancing, control strat-
egy, modular multilevel converter (MMC), modulation
strategy.
I. I NTRODUCTION
M ODULAR multilevel converters (MMCs) have become
increasingly attractive for high-voltage and high-power
applications with excellent output voltage waveforms and very
high efficiency [1], [2]. The flexible operation of the MMC
by switching the submodules (SMs) can generate a multilevel
voltage configuration and reduce the device’s average switch-
ing frequency without compromising the power quality [3]–
[6]. Due to easy construction, assembling, and flexibility in
converter design, the MMC becomes attractive for high-voltage
direct-current (HVDC) transmission [7]–[12], high-power mo-
tor drives [13], [14], and electric railway supplies [15].
Capacitor voltage balancing is one of the important chal-
lenges for MMCs. Reference [8] presented a capacitor voltage-
balancing control with a sorting algorithm based on the number
of the SMs turned on and the arm current direction in each
switching period. A model predictive control strategy was
presented in [9] to carry out the capacitor voltage balancing of
the MMC. Several voltage-balancing strategies were proposed
for MMCs with reduced switching frequency in [10]. The aver-
aging and balancing control was combined in [16] to realize the
capacitor voltage balancing in the MMC without any external
Manuscript received February 18, 2014; revised May 29, 2014,
August 3, 2014, and September 13, 2014; accepted September 16,
2014. Date of publication October 14, 2014; date of current version
April 8, 2015. This work was supported by the Department of Energy
Technology, Aalborg University, Aalborg, Denmark.
The authors are with the Department of Energy Technology,
Aalborg University, 9220 Aalborg, Denmark (e-mail: fde@et.aau.dk;
zch@et.aau.dk).
Color versions of one or more of the figures in this paper are available
online at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TIE.2014.2362881
0278-0046 © 2014 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
2835
circuit. The phase-shifted carrier-based pulsewidth-modulation
method can produce a high-frequency arm current and can be
used for the capacitor voltage-balancing control [17]. Reference
[18] proposed a voltage-balancing control for a new MMC
topology, where the MMC connects the upper and the lower
arms through a middle cell. Reference [19] proposed a voltage-
balancing method for the novel diode-clamped MMC, but it
requires an external energy feedback circuit. These capacitor
voltage-balancing methods in [8]–[10] and [16]–[19] require
a high switching frequency for the MMC, which may cause
lots of losses for the MMC. Reference [20] introduced a
voltage-balancing control for MMCs at fundamental switching
frequency, where the pulsewidths are the same but their phase
angles are different in each fundamental frequency period.
Voltage balancing was realized by shifting the pulses in order
in each fundamental frequency period. However, it may need a
large number of periods for capacitor voltage balancing. Refer-
ence [21] presented a predictive sorting algorithm for capacitor
voltage balancing. However, it just gives the brief description,
and the capacitor voltage balancing relies on the arm current.
This paper proposes a novel capacitor voltage-balancing
method for MMCs with the switching frequency as grid fre-
quency, where the drive pulses have the different pulsewidths
but the same phase angle in each switching period. The
low switching frequency can effectively reduce losses and
is preferred for more efficient converters [22]. In the pro-
posed method, the capacitor charge transfer characteristic of
the SM driven by the low-frequency pulses with different
pulsewidths is analyzed, which can derive an optimal low-
frequency pulsewidth corresponding to the extreme of capacitor
charge transfer. A sorting algorithm is proposed to realize the
voltage balancing for the MMC based on the optimal low-
frequency pulsewidth but not the arm current, where elimina-
tion of the arm current signal will potentially contribute to the
improvement of the reliability of the system by reducing the
amount of components that can potentially fail.
This paper is organized as follows. In Section II, the basic
description of the MMC is presented. Section III proposes the
capacitor voltage-balancing method for the MMC. The system
simulations and experimental tests are described in Sections IV
and V, respectively, to show the effectiveness of the proposed
capacitor voltage-balancing method for the MMC. Finally, the
conclusions are presented in Section VI.
II. S TRUCTURE AND O PERATION P RINCIPLE OF MMC S
The circuit configuration of a three-phase MMC is shown in
Fig. 1(a). The converter topology consists of six converter arms
where each arm contains a series connection of n nominally
2836
Fig. 1. Block diagram of (a) three-phase MMC and (b) SM unit.
TABLE I
SM U NIT O PERATION S TATE
identical SMs and a converter inductance Ls . Each SM contains
an insulated-gate bipolar transistor-based half-bridge and a dc
storage capacitor Csm , as shown in Fig. 1(b). The upper and
lower arms in one phase comprise a phase unit [23].
There are two complementary switching states relevant to the
normal operation of the SM, as shown in Table I. One is “On”
state, when S1 is switched on and S2 is switched off. In this
situation, SM output voltage usm is equal to capacitor voltage
uc . The other one is “Off” state, and usm is equal to 0 when
S1 is switched off and S2 is switched on [8]. In the “On” state,
the charge and discharge of the capacitor depend on the arm
current flow direction. If the arm current iuj or ilj (j = a, b, and
c) is positive, as shown in Fig. 1, the capacitor in the On-state
SM would be charged and uc is increased. If the arm current is
negative, the capacitor in the On-state SM would be discharged
and uc is decreased. In the “Off” state, the capacitor in the SM
would be bypassed and uc is unchanged, irrespective of the arm
current flow direction [18].
The upper and lower arm currents iuj and ilj in the MMC
are, respectively,

i
iuj = 2j + idiffj
i (1)
ilj = − 2j + idiffj
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 62, NO. 5, MAY 2015
where ij is the line current at the ac side of the MMC. idiffj is
the inner difference current [23], which is composed of the dc
component idc /3 and the circulating current component icj as
idc
idiffj = + icj . (2)
3
In Fig. 1, considering point “o” as the fictitious dc-link
middle point, according to [7] and neglecting the arm losses,
the MMC can be described as
Ls dij
ujo = ej − (3)
2 dt
with
ulj − uuj
ej = (4)
2
where uuj and ulj are the total output voltages of the series-
connected SMs in the upper and lower arms, respectively, as
shown in Fig. 1.
III. P ROPOSED VOLTAGE -B ALANCING
M ETHOD FOR MMCs
A. MMC Analysis With Grid-Frequency Pulses
In order to reduce the losses of the MMC, a number of low-
frequency pulses are applied to the MMC, as shown in Fig. 2,
which can reduce switching frequency and generates a staircase
waveform [1]. Recently, a few modulation methods have been
developed to produce low-frequency pulses such as the nearest
level control (NLC) method [24] and the selective harmonic
elimination (SHE) method [1], [24]. Each modulation method
has unique features and drawbacks, depending on the applica-
tions, which can refer to [1] and [24] and are not described here.
This paper mainly focuses on the voltage-balancing control for
the MMC with the pulses at the grid frequency.
In this paper, the number n of SMs in each arm is even. Each
SM in the arm is driven with a grid-frequency quarter-wave
pulse, as shown in Fig. 2 (n = 4). ω = 2πf , where f is the grid
frequency. In Fig. 2, Sl1 ∼ Sln and Su1 ∼ Sun are the pulses
for the lower and upper arms, respectively, which are defined as

1, On state of SM
Sui (or Sli ) = (5)
0, Off state of SM.
The pulsewidth θl1 ∼ θln (0 ≤ θl1 ≤ θl2 ≤ · · · ≤ θln ≤ 2π)
corresponding to the n pulses Sl1 ∼ Sln in the lower arm has
the relationship as
θli = 2π − θl(n+1−i) , (1 ≤ i ≤ n/2). (6)
The n pulses Su1 ∼ Sun for the SMs in the upper arm
are complementary to those for the lower arm SMs as Suj =
/Slj (1 ≤ j ≤ n). Hence, the upper arm pulsewidth θu1 ∼ θun
can be obtained as
θui = 2π − θli , (1 ≤ i ≤ n). (7)
Suppose that the capacitor voltage in each arm of the MMC
is kept the same in Fig. 1, the ith SM output voltages usmua_i
DENG AND CHEN: VOLTAGE-BALANCING METHOD FOR MMCs SWITCHED AT GRID FREQUENCY 2837

voltage ea for the MMC. The Fourier series expansion of the

voltage ea can be expressed as
⎡ ⎤
∞
n/2 
4Vdc ⎣1 mθli ⎦
ea = sin · cos(mωt) (11)
nπ m=1,3,5 m i=1 2

where m is the order of the harmonic. In (11), it can be

observed that voltage ea only consists of the fundamental
component and the odd harmonic components. Normally, the
triplen harmonics can be excluded from the converter in a
balanced three-phase system by a Y /Δ-connected three-phase
transformer, with the Δ-connection on the converter side. In
addition, some nontriplen odd harmonics can be also eliminated
with the pulsewidth regulation to reduce the total harmonic
distortion [1], [24]. The fundamental amplitude of ea can be
calculated as

4Vdc
n/2
θli
Em = sin . (12)
nπ i=1 2

B. Charge Transfer of Capacitors in Lower Arms

Suppose that the circulating current is suppressed with the
method introduced in [25] and according to (1) and (2), arm
currents iua and ila can be described as

iua = I2m sin(ωt + α) + idc
3 (13)
ila = − I2m sin(ωt + α) + idc
3

where Im and α are the peak value and the phase angle of the
line current at the ac side of the MMC, respectively. Fig. 3(a)
shows the low-frequency pulses and the arm current in one
Fig. 2. Upper and lower arm pulses for the MMC. period. During the “On” state of the SM, its capacitor voltage
would be changed due to the charge transfer under the variable
and usmla_i with the pulses Sui and Sli in the upper and lower arm current. The charge Qla transferred to the lower arm
arms of phase A can be expressed as capacitor during one period can be obtained by the integral of
 the lower arm current ila over the on-time of the lower arm
usmua_i = Vndc Sui pulse Sl as
(8)
usmla_i = Vndc Sli
2π 
θl idc
where Vdc is the dc-link voltage of the MMC. According Qla = Sl · ila d(ωt) = −Im sin(α) sin + θl .
2 3
to (8), the total output voltages uua and ula of the series- 0
connected SMs in the upper and lower arms of phase A can be (14)
calculated as In (14), it can be observed that Qla is a function of the
⎧
⎪ n width θl of the pulse Sl in the lower arm. Fig. 3(b) shows
⎪ V
⎨ uua = ndc Sui the characteristic of the variable Qla according to the value
i=1
 (9) of θl . Qla may be positive or negative. When Qla is positive,
⎪
⎪ V
n
⎩ ula = ndc Sli . the capacitor would be charged and its voltage is increased.
i=1
On the contrary, when Qla is negative, the capacitor would be
Substituting (9) into (4), the converter output voltage ea of discharged and its voltage is decreased. Therefore, the capacitor
phase A can be obtained as voltage ripple is related to Qla in one period, which is analyzed
in the Appendix. In Fig. 3, the optimal pulsewidth for the charge
Vdc
n
transfer extreme Qla_ex is
ea = (Sli − Sui ). (10)  
2n i=1 2idc
−1
θopt_l = 2 cos . (15)
3Im sin(α)
Combining (6), (7), (10), and Fig. 2, it can be observed
that the n lower arm pulses Sl1 ∼ Sln and the n upper arm Neglecting the losses and combining (1), (12), (13), and
pulses Su1 ∼ Sun synthesize a symmetric (n + 1)-level output Fig. 3, the power-balancing relationship in the three-phase
2838 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 62, NO. 5, MAY 2015

Fig. 3. (a) Lower arm pulses and current. (b) Charge transfer charac-
teristic of the capacitor under various pulsewidths in the lower arm.
Fig. 4. (a) Upper arm pulses and current. (b) Charge transfer charac-
teristic of the capacitor under various pulsewidths in the upper arm.
MMC can be expressed as
(18) by the integral of the upper arm current iua over the upper
arm pulse Su , as shown in Fig. 4(a), as follows:
Vdc · idc = 1.5 · Em · Im · sin(α). (16)
2π 
θu idc
Substituting (12) and (16) into (15), there will be Qua = Su · iua d(ωt) = −Im sin(α) sin + θu .
2 3
⎡ ⎤ 0

n/2  (18)
−1 ⎣ 4 θli ⎦
θopt_l = 2 cos sin . (17) In (18), it can be observed that the capacitor charge transfer
nπ i=1 2
Qua is related to the width θu of the pulse Su in the upper arm.
Fig. 4(b) depicts the relationship between Qua and θu . Based
The equivalent resistor in the lower arm has low impact on on (18), the optimal pulsewidth for the charge transfer extreme
θopt_l (see the Appendix), which is neglected here. Based on Qua_ex in Fig. 4 can be calculated as
(17), the θopt_l value can be calculated with the pulsewidths  
2idc
θl1 ∼ θln . According to Fig. 3, the capacitor in the lower arm θopt_u = 2 cos−1 . (19)
3Im sin(α)
SM can be charged or discharged to different extents by the
pulses with different widths. If the pulsewidth is close to θopt_l , Substituting (12) and (16) into (19), the optimal pulsewidth
the pulse will result in more charge transferred away from the θopt_u for the charge transfer extreme can be obtained as
⎡ ⎤
capacitor under Qla < 0, or the pulse will cause less charge

n/2 
4 θui ⎦
transferred to the capacitor under Qla > 0, in comparison with θopt_u = 2 cos−1 ⎣ sin . (20)
the pulse whose width is far away from θopt_l . Consequently, nπ i=1 2
the pulse with its width close to θopt_l can result in the lower
capacitor voltage than the pulse with its width far away from The equivalent resistor in the upper arm has low impact on
θopt_l in the lower arm. The analyses for phases B and C are θopt_u , which can be analyzed with the same method in the
the same to that for phase A, which are not repeated here. Appendix for the lower arm and is neglected here. Owing to
θui + θli = 2π, there will be

C. Charge Transfer of Capacitors in Upper Arms θopt_u = θopt_l . (21)

With the same method for the lower arm, the charge transfer Similar to the discussions for the lower arm, in Fig. 4, it can
Qua of the upper arm capacitor in one period can be obtained as be observed that, if the width of a pulse is close to θopt_u in
DENG AND CHEN: VOLTAGE-BALANCING METHOD FOR MMCs SWITCHED AT GRID FREQUENCY
Fig. 5. Block diagram of (a) proposed control for MMCs and (b)
proposed voltage-balancing control for phase A.
the upper arm, the pulse will result in more charge transferred
away from the capacitor under Qua < 0, or the pulse will
cause less charge transferred to the capacitor under Qua > 0,
in comparison with the pulse whose width being far away from
θopt_u . Consequently, one pulse with its width close to θopt_u
can result in the lower capacitor voltage than the other one with
its width far away from θopt_u in the upper arm. The analysis
for phases B and C are the same to phase A, which are not
repeated here.
D. Proposed Voltage-Balancing Method
Based on the above analysis, the control structure of the
MMC with the proposed voltage-balancing method is shown
in Fig. 5(a). uag , ubg , and ucg and iag , ibg , and icg are grid
voltages and currents, respectively. ud , uq and id , iq are the
dq-axis components of grid voltages and currents, respectively.
L = Ls /2 + Lf . θu is the grid voltage phase angle obtained
with the phase-locked loop. ω is the grid angular frequency.
According to the control objective such as active power, reac-
tive power, and dc-link voltage control, the current references
id_ref and iq_ref can be obtained [8], [26]. The vector control
method is used here for grid current control [8], [26] and
to produce dq-axis reference voltages vd and vq . Finally, the
three-phase reference voltage can be calculated by the inverse
transformation from vd and vq to ua_ref , ub_ref , and uc_ref ,
which are used to produce grid-frequency pulses with low-
frequency pulse-modulation methods (e.g., NLC). In Fig. 5(a),
a polar/rectangular coordinate converter is used and the phase
angle of the three-phase reference voltage ua_ref , ub_ref , and
uc_ref can be calculated as θm = θu − θp . Referring to Fig. 2,
2839
TABLE II
SM C APACITOR VOLTAGE C ONTROL
the pulse modulation and voltage-balancing control for phases
A, B, and C can be implemented cycle by cycle and started
from π, π/3, and 5π/3 of the phase angle θm , respectively. The
implementation cycle is 2π.
Fig. 5(b) shows the proposed voltage-balancing control for
phase A of MMCs switched at grid frequency, where the
algorithm is started from θm = π and implemented cycle by
cycle. With the low-frequency pulse-modulation method, the
grid-frequency pulses for each period can be produced and
the pulsewidth can be obtained. Then, the optimal pulsewidth
θopt_l can be calculated based on (17) or (20) for this period
of 2π, which will be used as a reference value to assign the
produced pulses, as shown in Table II. If a capacitor voltage
is high, a pulse in Sk1 ∼ Skn (k = u, l) with its width close
to θopt_l may be assigned to the SM. Consequently, more
charge is transferred away from the capacitor if the charge
transferred to the capacitor is negative and the capacitor voltage
decreases more, or less charge is transferred to the capacitor
if the charge transferred to the capacitor is positive and the
capacitor voltage increases less. In contrast, if the capacitor
voltage is low, a pulse in Sk1 ∼ Skn with its width far from
θopt_l may be assigned to the SM. Consequently, less charge
is transferred away from the capacitor if the charge transferred
to the capacitor is negative and the capacitor voltage decreases
less; or more charge is transferred to the capacitor if the charge
transferred to the capacitor is positive and the capacitor voltage
increases more. As a consequence, the pulses Sk1 ∼ Skn are
sorted in ascending order according to the width of the pulses
Sk1 ∼ Skn close to θopt_l . Finally, the pulses Sd1 ∼ Sdn are
obtained, as shown in Fig. 5, in which the width of Sd1 is closest
to θopt_l and the width of Sdn is farthest from θopt_l .
To achieve the capacitor voltage-balancing task, the capacitor
voltages ucak1 ∼ ucakn (k = u, l) in each arm are monitored in
real time and sampled when θm is π, π/3, and 5π/3 for phases
A, B, and C, respectively, in each period. Then, the SMs in the
arm are sorted according to the capacitor voltage in descending
order and driven with the pulses in a sequence from Sd1 to
Sdn , which can effectively ensure capacitor voltage balancing
in each arm. The control for phases B and C is the same to that
for phase A, which is not repeated here.
In order to obtain maximum voltage capability, the third-
harmonic injection technique [22], [27] by adding a third-
harmonic zero component into the target reference waveform
of each phase leg can be also used with the proposed method,
where the optimal pulsewidth for the charge transfer extreme
can be also analyzed with the same method as above (see the
Appendix), and the pulses can be also sorted with the proposed
method as above to realize capacitor voltage balancing.
2840 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 62, NO. 5, MAY 2015

Fig. 6. Block diagram of the MMC simulation system.

IV. S IMULATION S TUDIES

To verify the proposed control strategy, a three-phase MMC
system is modeled with the time-domain simulation tool
PSCAD/EMTDC, as shown in Fig. 6. The system parameters
are shown in the Appendix.

A. Case I
Fig. 7 shows the performance of the MMC with the proposed
method in Section III. The active power P and reactive power
Q of the three-phase MMC system are initially controlled as
30 MW and −21 Mvar, respectively, as shown in Fig. 7(a) and
(b), with the power control strategy [26]. The NLC method is
used here to produce the pulses at grid frequency [24]. Circulat-
ing current suppressing refers to [25]. In the simulation, at 3.5 s,
a 65-MW active power command and a 0-Mvar reactive power
command are ramped up, respectively. At 4.8 s, the active
power is ramped down from 65 to 30 MW again and the reactive
power is ramped down from 0 to −21 Mvar again. Fig. 7(c)
shows line currents ia , ib , and ic . Fig. 7(d) shows the arm
currents iua and ila of phase A. Upper arm capacitor voltages
ucau1 −ucau32 and lower arm capacitor voltages ucal1 −ucal32
are shown in Fig. 7(e) and (f), respectively, which are kept
balanced with the proposed method. The maximum peak-to-
peak voltage ripple is about 29%, which is similar to [20] in
rectifier mode and higher than [8]–[10], [16]–[18] with a higher
switching frequency and bigger capacitance. Fig. 7(g) shows
the dc-link voltage.
Fig. 8 shows the performance of the MMC in a short
timescale in Fig. 7, where the active power and reactive power
are 65 MW and 0 Mvar, respectively. Fig. 8(a) shows line-to-
line voltages uab , ubc , and uca . Line currents ia , ib , and ic
are shown in Fig. 8(b). Arm currents iua and ila of phase A
are shown in Fig. 8(c). Fig. 8(d) and (e) shows the upper arm
capacitor voltages ucau1 −ucau32 and the lower arm capacitor
voltages ucal1 −ucal32 , respectively, which are kept balanced
with the proposed voltage-balancing method.

B. Case II
Fig. 9 shows the performance of the MMC with the pro-
posed method in Section III, where the third-harmonic injection
technique, as analyzed in the Appendix, is used here. The
active power P and reactive power Q of the MMC are initially
controlled as 10 MW and −21 Mvar, respectively, as shown in
Fig. 9(a) and (b). At 3.5 s, a 65-MW active power command and
a 0-Mvar reactive power command are ramped up, respectively.
At 4.8 s, the active power is ramped down from 65 to 35 MW Fig. 7. Simulated waveforms of MMCs with the proposed control
and the reactive power is ramped down from 0 to −10.5 Mvar. strategy. (a) Active power P . (b) Reactive power Q. (c) Three-phase
currents ia , ib , and ic . (d) Arm currents iua and ila . (e) Upper arm
Fig. 9(c) shows line currents ia , ib , and ic . Upper arm capac- capacitor voltage of phase A. (f) Lower arm capacitor voltage of phase
itor voltages ucau1 −ucau32 and lower arm capacitor voltages A. (g) DC-link voltage Vdc .
DENG AND CHEN: VOLTAGE-BALANCING METHOD FOR MMCs SWITCHED AT GRID FREQUENCY
Fig. 8. Simulated waveforms of MMCs in a short timescale in Fig. 7.
(a) Three-phase voltages uab , ubc , and uca . (b) Three-phase currents
ia , ib , and ic . (c) Arm currents iua and ila . (d) Upper arm capacitor
voltage of phase A. (e) Lower arm capacitor voltage of phase A.
ucal1 −ucal32 are shown in Fig. 9(d) and (e), respectively, which
are kept balanced with the proposed method.
C. Case III
Fig. 10 shows the performance of the MMC with the pro-
posed control under single line-to-ground (SLG) fault. The
active power and reactive power of the MMC are initially
controlled as 45 MW and 0 Mvar, respectively. An SLG fault
occurred at 0.3 s and cleared at 0.55 s. The three-phase voltages
of the transformer at the MMC side are shown in Fig. 10(a).
The negative-sequence ac current components are eliminated
with the control in [7], and three-phase line currents ia , ib ,
and ic are kept balanced during the SLG fault, as shown in
Fig. 10(b). Arm currents iua and ila are shown in Fig. 10(c).
2841
Fig. 9. Simulated waveforms of MMCs with the proposed control and
third-harmonic injection technique. (a) Active power P . (b) Reactive
power Q. (c) Three-phase currents ia , ib , and ic . (d) Upper arm
capacitor voltage of phase A. (e) Lower arm capacitor voltage of phase A.
With the proposed control, the capacitor voltage in the MMC
was still kept balanced under the SLG fault, as shown in
Fig. 10(d) and (e).
D. Case IV
Fig. 11 shows the performance of the MMC with the pro-
posed control under three phases to ground fault. The active
power and reactive power of the MMC are initially controlled
as 45 MW and 0 Mvar, respectively. The fault occurred at
0.3 s and cleared at 0.55 s. The three-phase voltages of the
transformer at the MMC side are reduced to 10% under faults,
as shown in Fig. 11(a). Fig. 11(b) shows ac currents ia , ib ,
and ic . Arm currents iub and ilb are shown in Fig. 11(c). The
2842
Fig. 10. Simulated waveforms of MMCs with the proposed control
under an SLG fault. (a) Three-phase input voltages at the MMC side of
the transformer. (b) Three-phase currents ia , ib , and ic . (c) Arm currents
iua and ila . (d) Upper arm capacitor voltage of phase A. (e) Lower arm
capacitor voltage of phase A.
capacitor voltages are shown in Fig. 11(d) and (e), which are
kept balanced with the proposed control.
V. E XPERIMENTAL S TUDIES
A three-phase MMC prototype was built in the laboratory to
confirm the proposed control strategy. The experimental circuit
is shown in Fig. 12, where each arm has four SMs. A dc power
supply (SM 600-10) is used to support the dc-link voltage. The
switches and diodes in each cell are the standard IXFK48N60P
power MOSFETs. The experimental system parameters are
shown in the Appendix.
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 62, NO. 5, MAY 2015
Fig. 11. Simulated waveforms of MMCs with the proposed control
under three phases to ground fault. (a) Three-phase input voltages at
the MMC side of the transformer. (b) Three-phase currents ia , ib , and
ic . (c) Arm currents iub and ilb . (d) Upper arm capacitor voltage of phase
B. (e) Lower arm capacitor voltage of phase B.
The MMC is operated with the proposed control in this paper,
where the pulses at grid frequency are produced by the SHE
method [1]. Line-to-line voltages uab , ubc , and uca are shown
in Fig. 13. Fig. 14 shows line currents ia , ib , and ic . Currents
iua , ila , and ia in phase A are shown in Fig. 15. Figs. 16 and
17 show the four capacitor voltages in the upper and lower
arms of phase A, respectively. With the proposed method, the
capacitor voltage in the MMC was kept balanced. The peak-to-
peak capacitor voltage ripple is about 27%.
The response to a step change of the modulation index from
0.4 to 0.95 and from 0.95 to 0.4 was also tested, respectively.
In Figs. 18 and 19, it is shown that the capacitor voltages were
DENG AND CHEN: VOLTAGE-BALANCING METHOD FOR MMCs SWITCHED AT GRID FREQUENCY 2843

Fig. 16. Experimental results, including upper arm capacitor voltages

ucau1 , ucau2 , ucau3 , and ucau4 .

Fig. 12. Block diagram of the experimental circuit.

Fig. 17. Experimental results, including lower arm capacitor voltages

ucal1 , ucal2 , ucal3 , and ucal4 .

still kept balanced with the proposed control method. Fig. 20

shows the capacitor voltages ucau1 −ucau4 in the upper arm
with and without the proposed control. In the period without
the proposed control, voltage ucau1 was gradually increased
and voltages ucau2 −ucau4 were gradually decreased when the
SM modular Cell11 −Cell14 were driven with pulses Sd4 ,
Sd3 , Sd2 , and Sd1 , respectively, as shown in Fig. 5(b). When
Fig. 13. Experimental results, including voltages uab , ubc , and uca . the proposed voltage-balancing control was available again,
voltages ucau1 −ucau4 were kept balanced again, as shown in
Fig. 20. The response to a step change of the load resistor of
phase A was tested as well. The load resistor was step changed
from 7.5 to 25Ω at 0.52 s and step changed from 25 to 7.5Ω at
1.28 s, where voltages ucau1 −ucau4 were still kept balanced, as
shown in Fig. 21.

VI. C ONCLUSION
In this paper, the MMC has been operated with its switching
frequency the same as the grid frequency to reduce converter
Fig. 14. Experimental results, including currents ia , ib , and ic . losses. A novel voltage-balancing method has been proposed
for the MMC switched at grid frequency and does not rely on
the arm current. The capacitor charge transfer characteristic of
the SM driven by the pulses with different pulsewidths but the
same phase angle is analyzed, and an optimal pulsewidth can be
calculated corresponding to the extreme of the capacitor charge
transfer. Based on the obtained optimal pulsewidth, these pulses
with different pulsewidths can be assigned to the suitable SMs
to control the capacitor charge transfer in the MMC and realize
capacitor voltage balancing. The proposed method reduces the
switching frequency with the cost of an increased capacitor
voltage ripple. A three-phase MMC system is modeled and sim-
Fig. 15. Experimental results, including currents iua , ila , and ia . ulated with the time-domain simulation tool, and a small-scale
2844 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 62, NO. 5, MAY 2015

Fig. 18. Experimental results, including (a) voltage uab . (b) Current ia . Fig. 19. Experimental results, including (a) voltage uab . (b) Current ia .
(c) Voltage ucau1 . The modulation index was step changed up. (c) Voltage ucau1 . The modulation index was step changed down.

MMC prototype was built and tested in the laboratory. The

simulation and experimental results show the effectiveness of
the proposed voltage-balancing method for the MMC switched
at grid frequency.

A PPENDIX
A. Capacitor Voltage Ripple
The lower arm capacitor voltage ripple is related to Qla
in one period. In Fig. 3, it is shown that there are two peak Fig. 20. Experimental results, including voltages ucau1 , ucau2 , ucau3 ,
values for Qla in one period. According to (14), one peak value and ucau4 . The upper arm of phase A is tested with and without the
proposed control.
appears when θl = θopt_l , which is

θopt_l idc
Qla_ex = −Im sin(α) sin + θopt_l . (22)
2 3

Substituting (12) and (15) into (22) gives

⎡ ⎛ ⎛ ⎞⎞
n/2 
4 θ
Qla_ex = Im sin(α) ⎣− sin ⎝cos−1 ⎝ ⎠⎠
li
sin
nπ i=1 2

⎛ ⎞⎤

n/2 
n/2 
4 θli 4 θli ⎠⎦
+ sin cos−1 ⎝ sin . (23) Fig. 21. Experimental results, including voltages ucau1 , ucau2 , ucau3 ,
nπ i=1 2 nπ i=1 2 and ucau4 . The resistor load of phase A is step changed.
DENG AND CHEN: VOLTAGE-BALANCING METHOD FOR MMCs SWITCHED AT GRID FREQUENCY 2845

In Fig. 3, the other peak value appears when θl = 2π and is

n/2 
4 θli
Qla_2π = Im sin(α) sin . (24)
n i=1
2

According to (23) and (24), it is easy to find that |Qla_ex | <

|Qla_2π |. Based on [22], the possible maximum capacitor volt-
age ripple in the lower arm is

Δucl_max = |Qla_2π |/Csm . (25)

The upper arm can be analyzed with the same method and
can get the same result, which is not repeated here.

B. Impact of Converter Arm Resistance on the

Proposed Method
To analyze the impact of the equivalent arm resistor on the
value θopt_l , (16) can be expressed as

Vdc · idc = 1.5 · Em · Im · sin(α) + PLoss (26)

where PLoss is the power loss of the equivalent arm resistor.

Based on (13), PLoss can be calculated as
 
PLoss = 2/3 · i2dc + 3/4 · Im
2
· Req (27)

where Req is the equivalent resistance in each arm. Substituting

(12), (26), and (27) into (15), θopt_l will be
⎡ ⎤

n/2 
4 θli
θopt_l = 2 cos−1 ⎣ sin + Δk ⎦ (28) Fig. 22. (a) Lower arm reference and current in one period. (b) Charge
transfer characteristic of the capacitor under various pulsewidths in the
nπ i=1 2
lower arm.

with

4i2dc Im
Δk = + Req . (29)
9Vdc Im sin(α) 2Vdc sin(α)

According to (26), there is

idc 3Em PLoss

= + . (30)
Im sin(α) 2Vdc Vdc Im sin(α)

In (30), it is shown that idc < Im sin(α). In the high-voltage

system, idc  Vdc and Im  Vdc sin(α). In addition, Req is
very small [20]. Consequently, Δk is very small (Δk  1) and
can be neglected in (28), which means that the impact of the
arm equivalent resistance on θopt_l is very small and can be
neglected.
C. Analysis with Third-Harmonic Injection Technique
The third-harmonic injection technique [27] is considered,
where the reference waveform for phase A can be expressed
with a fundamental wave adding a third harmonic. The
Fig. 23. Pulse in one period. (a) Type I. (b) Type II. (c) Type III.
modulation index for the fundamental component and the
third-harmonic component is M and M/6, respectively [27].
Fig. 22(a) shows the reference yref _a for phase A with the
third-harmonic
√ injection technique in one period, where y1 =
3M/2 and y2 = 5M/6 [27].
The NLC modulation method is used here, and it can produce
three types of pulses, as shown in Fig. 23(a)–(c).
2846 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 62, NO. 5, MAY 2015

1) Type I: The pulse is shown in Fig. 23(a), which is pro- TABLE III
PARAMETERS OF THE T HREE -P HASE MMC S YSTEM
duced with the reference yref _a between y2 and 1. Pulsewidth
θl is 0 ≤ θl < π/2. According to (12)–(14) and (16), the charge
Qla_I transferred to the lower arm capacitor during one period
can be obtained by the integral of the lower arm current ila over
the on-time of the Type I pulse as
  
θp1 + θp2 θl
Qla_I = Im sin(α) · − 2 cos sin
4 4

 
2θl
n/2
θli
+ sin . (31)
nπ i=1 2

The derivative of Qla_I with respect to θl is

⎡ ⎤
n/2  TABLE IV
dQla_I 2 θ E XPERIMENTAL C IRCUIT PARAMETERS
= Im sin(α) · ⎣kI + ⎦
li
sin (32)
d θl nπ i=1 2

with



1 θp1 + θp2 θl
kI = − cos cos (33)
2 4 4


2
n/2
θli 1
0≤ sin ≤ . (34)
nπ i=1 2 π
by the integral of the lower arm current ila over the on-time of
the Type III pulse as
According to [27] and Fig. 22(a), it can be obtained that kI <  


−1/π under 0 ≤ θl < π/2, which results in that dQla_I /d θl < θp3 + θp4 θl
0 and Qla_I decreases along with the increase in θl under 0 ≤ Qla_III = Im sin(α) · 2 cos cos
4 4
θl < π/2, as shown in Fig. 22(b). 

2θl
n/2
2) Type II: The pulse is shown in Fig. 23(b), which is θli
+ sin . (37)
produced with the reference yref _a between −y2 and y2 . nπ i=1 2
Pulsewidth θl is π/2 ≤ θl ≤ 3π/2. According to (12)–(14) and
(16), the charge Qla_II transferred to the lower arm capacitor The derivative of Qla_III with respect to θl is
⎡ ⎤
during one period can be obtained by the integral of the lower
n/2 

dQla_III 2 θ
= Im sin(α) · ⎣kIII +
arm current ila over the on-time of the Type II pulse as li ⎦
sin (38)
⎡ ⎤ d θl nπ i=1 2


n/2 

θ 2θ θ
Qla_II = Im sin(α) ⎣− sin
l l li ⎦
+ sin . with
2 nπ i=1 2 


1 θp3 + θp4 θl
(35) kIII = − cos sin . (39)
2 4 4
The optimal pulsewidth for the charge transfer extreme
Qla_ex shown in Fig. 22(b) can be calculated as According to [27] and Fig. 22(a), it can be obtained
that kIII > 0 under 3π/2 < θl ≤ 2π, which results in that
⎡ ⎤

n/2 
dQla_I /d θl > 0 and Qla_III increases along with the increase
4 θ in θl under 3π/2 < θl ≤ 2π, as shown in Fig. 22(b).
θopt_l = 2 cos−1 ⎣
li ⎦
sin . (36)
nπ i=1 2 The upper arm of phase A can be analyzed with the same
method as that for the lower arm of phase A, and phases B and
Substituting (34) into (36), it can be seen that π/2 < C can be analyzed with the same method as that for phase A,
θopt_l ≤ π. which are not repeated here. Then, the obtained optimal
3) Type III: The pulse is shown in Fig. 23(c), which is pulsewidth will be used for the proposed voltage-balancing
produced with the reference yref _a between −1 and −y2 . control, as proposed in Section III.
Pulsewidth θl (θl = 2π − θp4 + θp3 ) is 3π/2 < θl ≤ 2π. Ac-
cording to (12)–(14) and (16), the charge Qla_III transferred D. Simulation and Experimental System Parameters
to the lower arm capacitor during one period can be obtained The parameters are shown in Tables III and IV.
DENG AND CHEN: VOLTAGE-BALANCING METHOD FOR MMCs SWITCHED AT GRID FREQUENCY
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Fujin Deng (S’10–M’13) received the B.Eng.
degree in electrical engineering from China
University of Mining and Technology, Xuzhou,
China, in 2005, the M.Sc. degree in electrical
engineering from Shanghai Jiao Tong Univer-
sity, Shanghai, China, in 2008, and the Ph.D.
degree in energy technology from Aalborg Uni-
versity, Aalborg, Denmark, in 2012.
Currently, he is a Postdoctoral Researcher
with the Department of Energy Technology, Aal-
borg University. His main research interests in-
clude wind power generation, multilevel converters, dc grid, high-voltage
direct-current technology, and offshore wind farm-power systems
dynamics.
Zhe Chen (M’95–SM’98) received the B.Eng.
and M.Sc. degrees from Northeast China Insti-
tute of Electric Power Engineering, Jilin, China,
and the Ph.D. degree from Durham University,
Durham, U.K.
He is currently a Full Professor with the De-
partment of Energy Technology, Aalborg Univer-
sity, Aalborg, Denmark, where he is the Leader
of the Wind Power System Research Program.
He is the Danish Principle Investigator of Wind
Energy of the Sino-Danish Center for Education
and Research. He has authored or coauthored more than 320 publica-
tions in his technical field. His current research interests include power
systems, power electronics, electric machines, wind energy, and modern
power systems.
Dr. Chen is a Chartered Engineer in the U.K., a Fellow of The
Institution of Engineering and Technology, U.K., and an Associate
Editor (Renewable Energy) of the IEEE T RANSACTIONS ON P OWER
E LECTRONICS.