Beruflich Dokumente
Kultur Dokumente
AVR 255/230
7 x 50W 7.1 CHANNEL A/V RECEIVER
CONTENTS
Some semiconductor (solid state) devices can be damaged easily by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES devices are integrated circuits and some field effect transistors and
The following techniques should be used to help reduce the incidence of component damage caused by static electricity.
1. Immediately before handling any semiconductor component or semiconductor-equipped assembly, drain off any electrostatic charge on
your body by touching a known earth ground. Alternatively, obtain and wear a commercially available discharging wrist strap device,
which should be removed for potential shock reasons prior to applying power to the unit under test.
2. After removing an electrical assembly equipped with ES devices, place the assembly on a conductive surface such as aluminum foil, to
4. Use only an anti-static solder removal device. Some solder removal devices not classified as "anti-static" can generate electrical charges
5. Do not use freon-propelled chemicals. These can generate electrical change sufficient to damage ES devices.
6. Do not remove a replacement ES device from its protective package until immediately before you are ready to install it. (Most replacement
ES devices are packaged with leads electrically shorted together by conductive foam, aluminum foil or comparable conductive material.)
7. Immediately before removing the protective material from the leads of a replacement ES device, touch the protective material to the
CAUTION : Be sure no power is applied to the chassis or circuit, and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged replacement ES devices. (Otherwise harmless motion such as the brushing together
or your clothes fabric or the lifting of your foot from a carpeted floor can generate static electricity sufficient to damage an ES devices.
Components identified with the IEC symbol in the parts list are special significance to safety. When replacing a component identified with
, use only the replacement parts designated, or parts with the same ratings or resistance, wattage, or voltage that are designated in the
parts list in this manual. Leakage-current or resistance measurements must be made to determine that exposed parts are acceptably
insulated from the supply circuit before retuming the product to the customer.
2
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harman/kardon
AVR 255/230 Service Manual
Technical Specifications
ENGLISH
Audio Section FM Tuner Section
Stereo Mode Frequency Range 87.5–108MHz
Continuous Average Power (FTC) Usable Sensitivity IHF 1.3 µV/13.2dBf
65 Watts per channel, 20Hz–20kHz, Signal-to-Noise Ratio Mono/Stereo: 70/68dB (DIN)
@ < 0.07% THD, both channels driven into 8 ohms Distortion Mono/Stereo: 0.2/0.3%
Stereo Separation 40dB @ 1kHz
7 Channel Surround Modes
Selectivity ±400kHz: 70dB
Power Per Individual Channel, all channels driven simultaneously: Image Rejection 80dB
Front L&R channels: IF Rejection 90dB
50 Watts per channel,
@ < 0.07% THD, 20Hz–20kHz into 8 ohms AM Tuner Section
Center channel: Frequency Range 522–1620kHz
50 Watts, @ < 0.07% THD, 20Hz–20kHz into 8 ohms Signal-to-Noise Ratio 45dB
Usable Sensitivity Loop: 500µV
Surround (L & R Side, Back) channels:
Distortion 1kHz, 50% Mod: 0.8%
50 Watts per channel,
Selectivity ±10kHz: 30dB
@ < 0.07% THD, 20Hz–20kHz into 8 ohms
Input Sensitivity/Impedance
Video Section
Linear (High Level) 200mV/47kohms
Video Format PAL/NTSC
Signal-to-Noise Ratio (IHF-A) 100dB Input Level/Impedance 1Vp-p/75 ohms
Surround System Adjacent Channel Separation Output Level/Impedance 1Vp-p/75 ohms
Analog Decoding 40dB Video Frequency Response
(Pro Logic, etc.) (Composite and S-Video) 10Hz–8MHz (-3dB)
Dolby Digital (AC-3) 55dB Video Frequency
DTS 55dB Response (Component) 10Hz–100MHz (-3dB)
HDMI™ Audio and video processing
Frequency Response
@ 1W (+0dB, –3dB) 10Hz–130kHz
High Instantaneous General
Current Capability (HCC) ±35 Amps Power Requirement AC 220–240V/50Hz
Power Consumption 65W idle, 540W maximum
Transient Intermodulation (7 channels driven)
Distortion (TIM) Unmeasurable
Dimensions (Max)
Rise Time 16 µsec Width 440mm
Slew Rate 40V/µsec** Height 165mm
Depth 382mm
Weight 13.6 kg
TECHNICAL SPECIFICATIONS 57
harman/kardon AVR 255/230 Service Manual
Troubleshooting Guide
Unit does not function when Main • No AC Power • Make certain AC power cord is plugged
Power Switch 1 is pushed into a live outlet
• Check to see if outlet is switch controlled
Display lights, but no sound • Intermittent input connections • Make certain that all input and speaker
or picture connections are secure
• Mute is on • Press Mute button G
• Volume control is down • Turn up volume control
No sound from any speaker; • Amplifier is in protection mode • Check speaker-wire connections for shorts at receiver
Protect Warning in Display due to possible short and speaker ends
• Amplifier is in protection mode • Contact your local Harman Kardon service depot
due to internal problems
No sound from surround or • Incorrect surround mode • Select a mode other than Stereo
center speakers • Input is mono • There is no surround information from mono sources (except with
Theater and Hall surround modes)
• Incorrect configuration • Check speaker mode configuration
• Stereo or Mono program material • Some surround modes may not create rear-channel information
from nonencoded programs
Unit does not respond to • Weak batteries in remote • Change remote batteries
remote commands • Wrong device selected • Press the AVR Selector 5
• Remote sensor Ó is obscured • Make certain front-panel sensor is visible to remote or
connect remote sensor
Intermittent buzzing in tuner • Local interference • Move unit or antenna away from computers, fluorescent lights,
motors or other electrical appliances
Letters flash in the Channel Indicator • Digital audio feed paused • Resume play for DVD
Display $ and Digital Audio stops • Check that Digital Signal is fed to the Digital Input selected
Processor Reset To clear the AVR’s entire system memory NOTE: Resetting the processor will erase any
including tuner presets, output level settings, configuration settings you have made for
In the rare case where the unit’s operation or the delay times and speaker configuration data, first speakers, output levels, surround modes, digital
displays seem abnormal, the cause may involve put the unit in Standby by pressing the System input assignments as well as the tuner presets.
the erratic operation of the system’s memory or Power Control button 2. Next press and hold After a reset the unit will be returned to the
microprocessor. the OK button 6 for five seconds. factory presets, and all settings for these items
must be reentered.
To correct this problem, first unplug the unit from The unit will turn on automatically and show the
the AC wall outlet and wait at least three word RESET in the Display for a few seconds. If the system is still operating incorrectly, there
minutes. After the pause, reconnect the AC Then it reverts to normal ON status. Note that may have been an electronic discharge or severe
power cord and check the unit’s operation. If the once you have cleared the memory in this manner, AC line interference that has corrupted the
system still malfunctions, a system reset may it is necessary to re-establish all system memory or microprocessor.
clear the problem. configuration settings and tuner presets.
If these steps do not solve the problem, consult
an authorized Harman Kardon service depot.
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ENGLISH
Notes on Using the AVR Punch-Through Programming Resetting the Remote Memory
Remote With Other Devices.
• Manufacturers may use different code sets for The AVR 355/AVR 255 remote’s punch-through As you add components to your home-theater
the same product category. For that reason, it is feature allows you to select one component for system, occasionally you may wish to totally
important that you check to see if the code set the remote to operate, while simultaneously set- reprogram the remote control without the
you have entered operates as many controls as ting certain groups of controls to operate anoth- confusion of any commands, activities or ”Punch-
possible. If it appears that only a few functions er component. For example, while using the AVR Through“ programming that you may have done.
operate, check to see if another code set will to control surround modes and other audio func- To do this, it is possible to reset the remote to the
work with more buttons. tions, you may operate the transport controls of original factory defaults and command codes by
your DVD player. Or while using the remote to following these steps. Note, however, that once
• Depending on the brand and product type the remote is reset, all commands or codes that
used the functions listed in the Function List control video functions on your TV, you may use
you have entered will be erased and will need to
tables may not correspond with the function the your cable box to change channels.
be re-entered:
unit reacts on the command. In these cases it’s a To program punch-through control while operat-
good idea to edit the reaction of the unit into 1. Press the TV Device Button c and the "0"
ing any device: number Button k simultaneously. The TV button
the corresponding line of the table or to set up a
separate list. 1. Press and hold the Source Selector (or AVR lights up.
selector) for the main device the remote will 2. Press the ”3“ button k three times.
• When a button is pressed on the AVR remote,
the red light under the Input Selector cy be operating. The Source Selector will light, go 3. After a number of seconds, depending on the
for the product being operated should flash dark and then light up again, indicating the number of commands that are programmed and
briefly. If the Device Control Selector flashes for remote is in Program mode and that you may need erasing, all the Device Buttons c as well as
some but not all buttons for a particular release the button. the AVR Button y blink 3 times to indicate that
product, it does NOT indicate a problem with the the remote has been reset to the factory settings.
2. Select the type of punch-through program-
remote, but rather that no function is
ming.
programmed for the button being pushed.
a) To program channel control punch-through,
press the Channel Up Button.
b) To program transport control punch-
through, press the Play Button.
3. Press the Source Selector for the device whose
channel or transport controls you would like
to be active while operating the device you
selected in the first step. The Source Selector
will flash to confirm the programming.
For example, if you wish to watch your TV while
changing channels using your cable box, first
press the TV Button until it lights. Then press the
Channel Up Button, followed by the CBL/SAT
Button.
To undo punch-through programming, follow
the same steps as above, but press the same
Source Selector in Steps 1 and 3.
NOTE: The remote always allows volume-control
punchthrough, since the Volume and Mute con-
trols are dedicated to the AVR.
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AVR255/230
1. Instruction manual ass'y - Accessories 2. Package Drawing
7 MICROPHONE ASS'Y
1 2 3 4
1 MANUAL ASS'Y
5 6 7 8
9 10 11 12
4 SET
POLY BAG BOOKLET,INFORMATION MANUAL INSTRUCTION MANUAL SETUP GUIDE 5 BOX ,OUT CARTON
13 A
8 STAPLE CPL0905 3
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AVR255/230
10
9
11
6 7 11 10 9 8 4 3 2 1 7 6 5
12
4 8
13
14
0N
15 OFF
5 12 16
17
13
18
19
20
3 21
22 23 24 25 26 27 28 29 30 31 32 33 34
1
8 2
5
6
3
7 4
7
5
1
4
2
3
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harman/kardon
AVR255/230 EXPLODED VIEW 34
35
AVR 255/230 Service Manual
53
S10
S15
33
42
S8
36
40-4 40-1
41 S5
S5 40-3
52 39-1
S1 S13 S8
S15 S15 S8
S6 S15
32
S16 52
S7
40-5
S9 x2
31
43 S6
S7
S10
39-3
S13 30
51 50 44
29
49 38-1
40-7
38-2 S12
S10 S10
S10
23
39-2 S5
S10
25 30
S11 45
S14
S5 S5
28 NO DESCRIPTION PARTS NO. Q,ty REMARK
22 40-2
1
2
ORNAMENT,VOLUME
CAP,VOLUME
CGU1A318Y
CGX1A338MBC63
1
1
3 HOLDER,VOLUME CMH1A214 1
21 27 4 INDICATOR,VOLUME CGL1A222 1
5 BADGE, HARMAN/KARDON CGB1A158Y 1
24 26 6 SHEET,AL FRONT CGX1A390C66X 1
25 46 7 WINDOW , FIP CGU1A410A25W 1
S2 8 BADGE,AVR255 CGB1A193Z 1
S6 9 FILTER , FIP CMZ1A127 1
20 10 KNOB , STANDBY CBT1A1064 1
47 11
12
KNOB , BACK
PANEL , FRONT
CBT1A1065
CGW1A447RHWB24
1
2
13 INDICATOR , POWER CGL1A265Y 1
14 PLATE , EARTH CMC2A338 2
15 BRACKET , SIDE CMD2A443 1
37-5 16 PLATE , SHIELD CMC1A323 1
48 17
18
PLATE , EARTH
PLATE,EARTH
CMC2A325
CMC2A326
1
1
S2 S11 19 HOLDER , LED CMH2A215 1
20 BRACKET,FIP CMD1A209 2
21 CABINET,TOP CKC6B145S60 1
13 22
23
CHASSIS,BOTTOM
FOOT A
CUA1A282
CKL1A094
1
2
37-1 37-6 S3 24 24 FOOT B CKL1A095 2
25 CUSHION , FOOT CHG1A373 4
S11 26 HEAT SINK CMY2A271 1
12 S3 27 BRACKET,PCB CMD1A417 2
25 28 HOLDER,PCB CHE170 2
29 BRACKET,TRANS CMD2A487 1
S3 30 BRACKET,PCB(H/T) CMD1A398 2
10 31 BRACKET, PCB CMD1A636 1
32 BRACKET,PCB CMD1A387 1
33 PANEL,REAR CKF7A337Z 1
37-2 34 BUSHING , AC CORD KHR1A028 1
23 35 CORD,POWER CJA2B043ZA 1
9
37-4 S11 36 TRANS,POWER CLT5W032ZE 1
37 FRONT PCB ASS'Y COP12053I 1
8 25 37-1 FIP & KEY PCB 1
19 S2 37-2 VOLUME PCB 1
37-3 PHONE PCB 1
37-4 VIDEO PCB 1
7 S3 18 37-5 POWER LED PCB 1
37-3
S2 37-6 GUIDE PCB(CARD CABLE) 1
1
1
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(7 0 Ω ) E
Darlington
Silicon PNP Epitaxial Planar Transistor (Complement to type 2SD2390)
2SB1560 B
Equivalent circuit C
5.0±0.2
VCBO –160 V ICBO VCB=–160V –100max
2.0
1.8
9.6 2.0±0.1
19.9±0.3
4.0
IC –10 A hFE VCE=–4V, IC=–7A 5000min∗ a ø3.2±0.1
b
IB –1 A VCE(sat) IC=–7A, IB=–7mA –2.5max V
PC 100(Tc=25°C) W VBE(sat) IC=–7A, IB=–7mA –3.0max V
2
4.0max
20.0min
Tj 150 °C fr VCE=–12V, IE=2A 50typ MHz
3
Tstg –55 to +150 °C COB VCB=–10V, f=1MHz 230typ pF 1.05 +0.2 0.65 +0.2
-0.1 -0.1
VCC RL IC VBB1 VBB2 IB1 IB2 ton tstg tf Weight : Approx 6.0g
(V) (Ω) (A) (V) (V) (mA) (mA) (µs) (µs) (µs) a. Type No.
–70 10 –7 –10 5 –7 7 0.8typ 3.0typ 1.2typ b. Lot No.
–10 . 5m –3 –10
–2 mA
mA
– 2 .0
–10
–1 .5m A
–8 –1. 2mA –8
–2
–6 –0.8m A –6
–10A
–0.6m A
–7A
mp)
)
Temp
)
–4 –4
Temp
I B =–0.4mA I C =–5A
e Te
–1
(Case
(Cas
(Case
125˚C
–2 –2
–30˚C
25˚C
0 0 0
0 –2 –4 –6 –0.2 –0.5 –1 –5 –10 –50 –100 –200 0 –1 –2 –2.5
Collector-Emitter Voltage V C E (V) Base Current I B (mA) Base-Emittor Voltage V B E (V)
(V C E =–4V) (V C E =–4V)
40,000 50000 3
125˚C
DC Curr ent Gain h F E
Typ
10000 25˚C 1
10,000
1000
10
Maxim um Power Dissipation P C (W)
10 m
80 –10 0m s
Cut- off F req uency f T (M H Z )
s
W
–5 DC
ith
Co lle ctor Cu rre nt I C ( A)
In
fin
60 Typ
ite
he
50
at
–1
si
nk
40
–0.5
Without Heatsink
20 Natural Cooling
–0.1
Without Heatsink
3.5
0 –0.05 0
0.02 0.05 0.1 0.5 1 5 10 –3 –5 –10 –50 –100 –200 0 25 50 75 100 125 150
Emitter Current I E (A) Collector-Emitter Voltage V C E (V) Ambient Temperature Ta(˚C)
Page 50 of 144
47
harman/kardon AVR 255/230 Service Manual
Equivalent circuit C
2SD2390
B
Darlington (7 0 Ω )
E
Silicon NPN Triple Diffused Planar Transistor (Complement to type 2SB1560) Application : Audio, Series Regulator and General Purpose
■Absolute maximum ratings (Ta=25°C) ■Electrical Characteristics (Ta=25°C) External Dimensions MT-100(TO3P)
Symbol 2SD2390 Unit Symbol Conditions 2SD2390 Unit
VCBO 160 V ICBO VCB=160V 100max µA 15.6±0.4 4.8±0.2
5.0±0.2
2.0
1.8
9.6 2.0±0.1
VCEO 150 V IEBO VEB=5V 100max µA
VEBO 5 V V(BR)CEO IC=30mA 150min V
19.9±0.3
5000min∗
4.0
IC 10 A hFE VCE=4V, IC=7A a ø3.2±0.1
4.0max
20.0min
Tj 150 °C fT VCE=12V, IE=–2A 55typ MHz
3
Tstg –55 to +150 °C COB VCB=10V, f=1MHz 95typ pF
1.05 +0.2
-0.1 0.65 +0.2
-0.1
VCC RL IC VBB1 VBB2 IB1 IB2 ton tstg tf Weight : Approx 2.0g
(V) (Ω) (A) (V) (V) (mA) (mA) (µs) (µs) (µs) a. Type No.
70 10 7 10 –5 7 –7 0.5typ 10.0typ 1.1typ b. Lot No.
10 3 10
A
A
10 m A
2m 1. 5m A
5m
2.
8 1.2 mA 8
1m A
2
6 6
0.8mA
I C =10A
0.6mA I C =7A
p)
mp)
mp)
4 4
Tem
I C =5A
e Te
e Te
1
se
(Cas
(Cas
(Ca
I B =0.4mA
2 2
˚C
25˚C
–30˚C
125
0 0 0
0 2 4 6 0.2 0.5 1 5 10 50 100 200 0 1 2 2.5
Collector-Emitter Voltage V C E (V) Base Current I B (mA) Base-Emittor Voltage V B E (V)
(V C E =4V) (V C E =4V)
40000 70000 3
50000
125˚C
D C Cur r ent Gai n h F E
Typ
Transient Thermal Resistance
1
10000 10000 25˚C
5000 0.5
5000 –30˚C
1000
80 10 10
0m
Cut- off F req uency f T (M H Z )
5 DC s
ith
Collect or Cur ren t I C (A)
In
Typ
fin
60
ite
he
50
at
1
si
nk
40
0.5
Without Heatsink
20 Natural Cooling
0.1
Without Heatsink
3.5
0 0.05 0
–0.02 –0.1 –1 –10 3 5 10 50 100 200 0 25 50 75 100 125 150
Emitter Current I E (A) Collector-Emitter Voltage V C E (V) Ambient Temperature Ta(˚C)
149
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74ACT04
HEX INVERTER
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74ACT04
TRUTH TABLE
A Y
L H
H L
2/8
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74LCX32
LOW VOLTAGE CMOS QUAD 2-INPUT OR GATE
WITH 5V TOLERANT INPUTS
■ 5V TOLERANT INPUTS
■ HIGH SPEED:
tPD = 5.2ns (MAX.) at VCC = 3V
■ POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
■ SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 24mA (MIN) at VCC = 3V SOP TSSOP
■ PCI BUS LEVELS GUARANTEED AT 24 mA
■ BALANCED PROPAGATION DELAYS: Table 1: Order Codes
tPLH ≅ tPHL
■ OPERATING VOLTAGE RANGE: PACKAGE T&R
VCC(OPR) = 2.0V to 3.6V (1.5V Data
SOP 74LCX32MTR
Retention)
TSSOP 74LCX32TTR
■ PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 32
■ LATCH-UP PERFORMANCE EXCEEDS technology. It is ideal for low power and high
500mA (JESD 17) speed 3.3V applications; it can be interfaced to 5V
■ ESD PERFORMANCE: signal environment for inputs.
HBM > 2000V (MIL STD 883 method 3015); It has same speed performance at 3.3V than 5V
MM > 200V AC/ACT family, combined with a lower power
consumption.
DESCRIPTION All inputs and outputs are equipped with
The 74LCX32 is a low voltage CMOS QUAD protection circuits against static discharge, giving
2-INPUT OR GATE fabricated with sub-micron them 2KV ESD immunity and transient excess
silicon gate and double-layer metal wiring C2MOS voltage.
Rev. 6
September 2004 1/11
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74LCX32
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
1) IO absolute maximum rating must be observed
2) VO < GND
2/11
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A3S56D30ETP
A3S56D40ETP
256M Double Data Rate Synchronous DRAM
PIN FUNCTION
SYMBOL TYPE DESCRIPTION
Clock: CLK and /CLK are differential clock inputs. All address and control
input signals are sampled on the crossing of the positive edge of CLK and
CLK, /CLK Input negative edge of /CLK. Output (read) data is referenced to the crossings of
CLK and /CLK (both directions of crossing).
Clock Enable: CKE controls internal clock. When CKE is low, internal clock
CKE Input for the following cycle is ceased. CKE is also used to select auto / self refresh.
After self refresh mode is started, CKE becomes asynchronous input. Self refresh
is maintained as long as CKE is low.
/CS Input Chip Select: When /CS is high, any command means No Operation.
/RAS, /CAS, /WE Input Combination of /RAS, /CAS, /WE defines basic commands.
A0-12 specify the Row / Column Address in conjunction with BA0,1. The
Row Address is specified by A0-12. The Column Address is specified by
A0-9(x8) and A0-8(x16). A10 is also used to indicate precharge
A0-12 Input
option. When A10 is high at a read / write command, an auto precharge is
performed. When A10 is high at a precharge command, all banks are
precharged.
BA0,1 Input Bank Address: BA0,1 specifies one of four banks to which a command is
applied. BA0,1 must be set with ACT, PRE, READ, WRITE commands.
DQ0-7 (x8),
Input / Output Data Input/Output: Data bus
DQ0-15 (x16),
Data Strobe: Output with read data, input with write data. Edge-aligned
DQS (x8) with read data, centered in write data. Used to capture write data.
Input / Output
UDQS, LDQS (x16) For the x16, LDQS corresponds to the data on DQ0-DQ7; UDQS
correspond to the data on DQ8-DQ15
Input Data Mask: DM is an input mask signal for write data. Input data
is masked when DM is sampled HIGH along with that input data
DM (x8) Input during a WRITE access. DM is sampled on both edges of DQS.
UDM, LDM (x16) Although DM pins are input only, the DM loading matches the DQ
and DQS loading. For the x16, LDM corresponds to the data on DQ0-DQ7;
UDM corresponds to the data on DQ8-DQ15.
Vdd, Vss Power Supply Power Supply for the memory array and peripheral circuitry.
VddQ, VssQ Power Supply VddQ and VssQ are supplied to the Output Buffers only.
CS42528
2. PIN DESCRIPTIONS
SAI_SDOUT
CX_SDOUT
CX_SDIN2
CX_SDIN3
CX_SDIN4
SAI_LRCK
SAI_SCLK
ADCIN1
ADCIN2
OMCK
RMCK
DGND
RXP0
TXP
VLS
VD
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
CX_SDIN1 1 48 RXP1/G PO 1
CX_SCLK 2 47 RXP2/G PO 2
CX_LRCK 3 46 RXP3/G PO 3
VD 4 45 RXP4/G PO 4
DGND 5 44 RXP5/G PO 5
VLC 6 43 RXP6/G PO 6
SCL/CCLK 7 42 RXP7/G PO 7
AD1/CDIN 9 40 AG ND
AD0/CS 10 39 LPFLT
INT 11 38 MUTEC
RST 12 37 AO UTA1-
AINR- 13 36 AOUTA1+
AINR+ 14 35 AOUTB1+
AINL+ 15 34 AO UTB1-
AINL- 16 33 AO UTA2-
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
AOUTA4-
AOUTB2-
FILT+
AOUTB4+
AOUTA4+
AOUTB4-
AOUTB3-
AOUTA3-
AOUTB3+
AOUTA3+
AOUTB2+
AOUTA2+
VA
VQ
REFGND
AGND
DS586PP5 17
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CS42528
AD0/CS 10 Address Bit 0 (I2C)/Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin in I2C mode; CS
is the chip select signal in SPI mode.
INT 11 Interrupt (Output) - The CS42528 will generate an interrupt condition as per the Interrupt Mask register.
See “Interrupts” on page 40 for more details.
RST 12 Reset (Input) - The device enters a low power mode and all internal registers are reset to their default
settings when low.
AINR- 13 Differential Right Channel Analog Input (Input) - Signals are presented differentially to the delta-sigma
AINR+ 14 modulators via the AINR+/- pins.
AINL+ 15 Differential Left Channel Analog Input (Input) - Signals are presented differentially to the delta-sigma
AINL- 16 modulators via the AINL+/- pins.
VQ 17 Quiescent Voltage (Output) - Filter connection for internal quiescent reference voltage.
FILT+ 18 Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits.
REFGND 19 Reference Ground (Input) - Ground reference for the internal sampling circuits.
AOUTA1 +,- 36,37 Differential Analog Output (Output) - The full-scale differential analog output level is specified in the
AOUTB1 +,- 35,34 Analog Characteristics specification table.
AOUTA2 +,- 32,33
AOUTB2 +,- 31,30
AOUTA3 +,- 28,29
AOUTB3 +,- 27,26
AOUTA4 +,- 22,23
AOUTB4 +,- 21,20
VA 24 Analog Power (Input) - Positive power supply for the analog section.
VARX 41
AGND 25 Analog Ground (Input) - Ground reference. Should be connected to analog ground.
40
MUTEC 38 Mute Control (Output) - The Mute Control pin outputs high impedance following an initial power-on con-
dition or whenever the PDN bit is set to a ‘1’, forcing the codec into power-down mode. The signal will
remain in a high impedance state as long as the part is in power-down mode. The Mute Control pin goes
to the selected “active” state during reset, muting, or if the master clock to left/right clock frequency ratio
is incorrect. This pin is intended to be used as a control for external mute circuits to prevent the clicks
and pops that can occur in any single supply system. The use of external mute circuits are not manda-
tory but may be desired for designs requiring the absolute minimum in extraneous clicks and pops.
LPFLT 39 PLL Loop Filter (Output) - An RC network should be connected between this pin and ground.
RXP7/GPO7 42 S/PDIF Receiver Input/ General Purpose Output (Input/Output) - Receiver inputs for S/PDIF encoded
RXP6/GPO6 43 data. The CS42528 has an internal 8:2 multiplexer to select the active receiver port, according to the
RXP5/GPO5 44 Receiver Mode Control 2 register. These pins can also be configured as general purpose output pins,
RXP4/GPO4 45 ADC Overflow indicators or Mute Control outputs according to the RXP/General Purpose Pin Control
RXP3/GPO3 46 registers.
RXP2/GPO2 47
RXP1/GPO1 48
RXP0 49 S/PDIF Receiver Input (Input) - Dedicated receiver input for S/PDIF encoded data.
TXP 50 S/PDIF Transmitter Output (Output) - S/PDIF encoded data output, mapped directly from one of the
receiver inputs as indicated by the Receiver Mode Control 2 register.
VLS 53 Serial Port Interface Power (Input) - Determines the required signal level for the serial port interfaces.
SAI_SDOUT 54 Serial Audio Interface Serial Data Output (Output) - Output for two’s complement serial audio PCM
data from the S/PDIF incoming stream. This pin can also be configured to transmit the output of the inter-
nal and external ADCs.
RMCK 55 Recovered Master Clock (Output) - Recovered master clock output from the External Clock Reference
(OMCK, pin 59) or the PLL which is locked to the incoming S/PDIF stream or CX_LRCK.
18 DS586PP5
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CS42528
CX_SDOUT 56 CODEC Serial Data Output (Output) - Output for two’s complement serial audio data from the internal
and external ADCs.
ADCIN1 58 External ADC Serial Input (Input) - The CS42528 provides for up to two external stereo analog to digital
ADCIN2 57 converter inputs to provide a maximum of six channels on one serial data output line when the CS42528
is placed in One Line mode.
OMCK 59 External Reference Clock (Input) - External clock reference that must be within the ranges specified in
the register “OMCK Frequency (OMCK Freqx)” on page 54.
SAI_LRCK 60 Serial Audio Interface Left/Right Clock (Input/Output) - Determines which channel, Left or Right, is
currently active on the serial audio data line.
SAI_SCLK 61 Serial Audio Interface Serial Clock (Input/Output) - Serial clock for the Serial Audio Interface.
DS586PP5 19
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EE SS II
Excel Semiconductor inc.
RY/BY#
Analog Bias
Generator
Input/Output
Buffers
WE# Command Write
Register State
RESET# Machine
Data Latch/
Sense Amps
Sector Switches
Y-Decoder Y-Decoder
A<0:20>
Address Latch
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EE SS II
Excel Semiconductor inc.
PIN DESCRIPTION
Pin Description
A0-A20 21 Addresses
LOGIC SYMBOL
21
16 or 8
A0 ~ A20
DQ0 ~ DQ15
(A-1)
CE#
OE#
WE#
WP#/ACC
RESET#
RY/BY#
BYTE#
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SEMICONDUCTOR KIA278R00PI
TECHNICAL DATA BIPOLAR LINEAR INTEGRATED CIRCUIT
A C
The KIA278R00PI is a Low Drop Voltage Regulator suitable DIM MILLIMETERS
_ 0.20
A 10.00 +
for various electronic equipments. It provides constant voltage B 15.00 +_ 0.20
F
C _ 0.20
2.70 +
power source with TO-220-4 terminal lead full molded PKG. E
O
D _ 0.10
0.60 +
E Φ3.20 + _ 0.20
The Regulator has multi function such as over current protection,
B
F 3.50+_ 0.10
_ 0.20
overheat protection. G 15.70 +
G
H _ 0.10
0.40 +
S R J 14.3+0.2/-0.1
L V V L K 1.45+ _ 0.10
K _ 0.10
L 1.00 +
U T
FEATURES H M 2.54
_ 0.20
N 4.50 +
J
Adjustable Output Voltage (Range : 1.5~30V) D O _ 0.1
7.5 +
P _ 0.10
1.50 +
1.0A Output Low Drop Voltage Regulator. R 5
Built in Over Current Protection, Over Heat Protection Function. M
S 8
T 1.30 +_ 0.1
U 3-1.00 +_ 0.1
V 1.30 +_ 0.1
N
P 1 DC INPUT (V IN )
2 DC OUTPUT (VO )
1 2 3 4
3 GND
4 ADJUSTABLE
TERMINAL
(VADJ )
TO-220IS-4
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SEMICONDUCTOR KIA278R05PI~KIA278R15PI
TECHNICAL DATA BIPOLAR LINEAR INTEGRATED CIRCUIT
F
C 2.70 +
suitable for various electronic equipments. E
O
D _ 0.10
0.60 +
Φ3.20 + _ 0.20
It provides constant voltage power source with TO-220 4 terminal E
B
F _ 0.10
3.50 +
lead full molded PKG. The Regulator has multi function such as G 15.70 +_ 0.20
G
H _ 0.10
0.40 +
over current protection, overheat protection and ON/OFF control. S R J 14.3+0.2/-0.1
L V V L K _ 0.10
1.45 +
K L _ 0.10
1.00 +
T U
FEATURES H M 2.54
_ 0.20
N 4.50 +
J
ᴌ2.0A Output Low Drop Voltage Regulator. D O 7.5+_ 0.1
P _ 0.10
1.50 +
ᴌBuilt in ON/OFF Control Terminal. R 5
ᴌBuilt in Over Current Protection, Over Heat M
S 8
T _ 0.1
1.30 +
Protection Function. U _ 0.1
3-1.00 +
V _ 0.1
1.30 +
N
P 1 DC INPUT (V IN )
2 DC OUTPUT (VO )
1 2 3 4
3 GND
4 ON/OFF CONTROL
LINE UP
ITEM OUTPUT VOLTAGE (Typ.) UNIT
TO-220IS-4
KIA278R05PI 5
KIA278R06PI 6
KIA278R08PI 8
KIA278R09PI 9 V
KIA278R10PI 10
KIA278R12PI 12
* KIA278R15PI 15
* Note) * : Under Development.
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SEMICONDUCTOR KIA378R05PI~KIA378R15PI
TECHNICAL DATA BIPOLAR LINEAR INTEGRATED CIRCUIT
F
C _ 0.20
2.70 +
Regulator suitable for various electronic equipments. E
O
D _ 0.10
0.60 +
E Φ3.20 + _ 0.20
It provides constant voltage power source with TO-220IS-4
B
F _ 0.10
3.50 +
_ 0.20
terminal lead full molded PKG. G 15.70 +
G
H _ 0.10
0.40 +
The Regulator has multi-function such as over current S R J 14.3+0.2/-0.1
L V V L K _ 0.10
1.45 +
protection, overheat protection and ON/OFF control. K L _ 0.10
1.00 +
T U
H M 2.54
N _ 0.20
4.50 +
J
FEATURES D O 7.5+_ 0.1
P _ 0.10
1.50 +
3.0A Output Low Drop Voltage Regulator. R 5
Built in ON/OFF Control Terminal. M
S 8
T _ 0.1
1.30 +
Built in Over Current Protection, Over Heat U _ 0.1
3-1.00 +
V _ 0.1
1.30 +
Protection Function.
N
P 1 DC INPUT (V IN )
2 DC OUTPUT (VO )
1 2 3 4
3 GND
4 ON/OFF CONTROL
LINE UP
ITEM OUTPUT VOLTAGE (Typ.) UNIT TO-220IS-4
KIA378R05PI 5
KIA378R06PI 6
KIA378R08PI 8
KIA378R09PI 9 V
KIA378R10PI 10
KIA378R12PI 12
KIA378R15PI 15
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LC72723, LC72723M
Block Diagram
No. 6037-2/8
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LC72723, LC72723M
Pin Descriptions
Pin No. Pin Function I/O Pin circuit type
No. 6037-3/8
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ESMT M12L16161A
z JEDEC standard 3.3V power supply The M12L16161A is 16,777,216 bits synchronous high
z LVTTL compatible with multiplexed address data rate Dynamic RAM organized as 2 x 524,288 words by
z Dual banks operation 16 bits, fabricated with high performance CMOS technology.
z MRS cycle with address key programs Synchronous design allows precise cycle control with the
- CAS Latency (2 & 3 ) use of system clock I/O transactions are possible on every
- Burst Length (1, 2, 4, 8 & full page) clock cycle. Range of operating frequencies, programmable
- Burst Type (Sequential & Interleave) burst length and programmable latencies allow the same
z All inputs are sampled at the positive going edge of the device to be useful for a variety of high bandwidth, high
system clock performance memory system applications.
z Burst Read Single-bit Write operation
z DQM for masking ORDERING INFORMATION
z Auto & self refresh
z 32ms refresh period (2K cycle)
Part NO. MAX Freq. PACKAGE COMMENTS
M12L16161A-5TG 200MHz TSOP(II) Pb-free
M12L16161A-7TG 143MHz TSOP(II) Pb-free
M12L16161A-7BG 143MHz VFBGA Pb-free
DQ0 2 49 DQ15
B
DQ1 3 48 DQ14 DQ14 VSSQ VDDQ DQ1
VSSQ 4 47 VSSQ
C DQ13 VDDQ VSSQ DQ2
DQ2 5 46 DQ13
DQ3 6 45 DQ12 D DQ12 DQ11 DQ4 DQ3
VDDQ 7 44 VDDQ
DQ4 8 43 DQ11 E DQ10 VSSQ VDDQ DQ5
DQ5 9 42 DQ10
F DQ9 VDDQ VSSQ DQ6
VSSQ 10 41 VSSQ
DQ6 11 40 DQ9
G DQ8 NC NC DQ7
DQ7 12 39 DQ8
VDDQ 13 38 VDDQ H NC NC NC NC
LDQM 14 37 N.C/RFU
NC UDQM LDQM WE
WE 15 36 UDQM J
CAS 16 35 CLK
K NC CLK RAS CAS
RAS 17 34 CKE
CS 18 33 N.C L CKE NC NC CS
BA 19 32 A9
A10/AP 20 31 A8 M A11 A9 NC NC
A0 21 30 A7
N A8 A7 A0 A10
A1 22 29 A6
A2 23 28 A5
P A6 A5 A2 A1
A3 24 27 A4 50PIN TSOP(II)
VDD 25 26 VSS (400mil x 825mil) VSS A4 A3 VDD
60 Ball VFBGA
R (6.4x10.1mm)
(0.8 mm PIN PITCH) (0.65mm ball pitch)
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M24C64
M24C32
FEATURES SUMMARY
■ Two-Wire I2C Serial Interface Figure 1. Packages
Supports 400kHz Protocol
■ Single Supply Voltage:
– 4.5 to 5.5V for M24Cxx
– 2.5 to 5.5V for M24Cxx-W
– 1.8 to 5.5V for M24Cxx-R
■ Write Control Input
■ BYTE and PAGE WRITE (up to 32 Bytes) 8
■ RANDOM and SEQUENTIAL READ Modes
■ Self-Timed Programming Cycle
■ Automatic Address Incrementing 1
■ Enhanced ESD/Latch-Up Protection PDIP8 (BN)
■ More than 1 Million Erase/Write Cycles
■ More than 40-Year Data Retention
8
1
SO8 (MN)
150 mil width
Table 1. Product List
Reference Part Number
M24C64
M24C64 M24C64-W TSSOP8 (DW)
169 mil width
M24C64-R
M24C32
M24C32 M24C32-W
M24C32-R
UFDFPN8 (MB)
2x3mm² (MLP)
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M24C64, M24C32
SUMMARY DESCRIPTION
These I2C-compatible electrically erasable pro- Table 2. Signal Names
grammable memory (EEPROM) devices are orga-
nized as 8192 x 8 bits (M24C64) and 4096 x 8 bits E0, E1, E2 Chip Enable
(M24C32).
SDA Serial Data
VSS Ground
3
Power On Reset: VCC Lock-Out Write Protect
E0-E2 SDA
In order to prevent data corruption and inadvertent
M24C64 Write operations during Power-up, a Power On
SCL M24C32 Reset (POR) circuit is included. At Power-up, the
internal reset is held active until VCC has reached
WC the Power On Reset (POR) threshold voltage, and
all operations are disabled – the device will not re-
spond to any command. In the same way, when
VCC drops from the operating voltage, below the
Power On Reset (POR) threshold voltage, all op-
VSS erations are disabled and the device will not re-
AI01844B spond to any command.
A stable and valid VCC (as defined in Table 9. and
Table 10.) must be applied before applying any
I2C uses a two-wire serial interface, comprising a logic signal.
bi-directional data line and a clock line. The devic-
es carry a built-in 4-bit Device Type Identifier code Figure 3. DIP, SO, TSSOP and UFDFPN
(1010) in accordance with the I2C bus definition.
Connections
The device behaves as a slave in the I2C protocol,
with all memory operations synchronized by the
serial clock. Read and Write operations are initiat-
ed by a Start condition, generated by the bus mas- M24C64
ter. The Start condition is followed by a Device M24C32
Select Code and Read/Write bit (RW) (as de-
scribed in Table 3.), terminated by an acknowl- E0 1 8 VCC
edge bit. E1 2 7 WC
When writing data to the memory, the device in- E2 3 6 SCL
serts an acknowledge bit during the 9th bit time, VSS 4 5 SDA
following the bus master’s 8-bit transmission.
AI01845C
When data is read by the bus master, the bus
master acknowledges the receipt of the data byte
in the same way. Data transfers are terminated by
a Stop condition after an Ack for Write, and after a
NoAck for Read.
Note: See PACKAGE MECHANICAL section for package dimen-
sions, and how to identify pin-1.
4/26
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NJM2391
FEATURES
zOutput Current Io(max.)=1A
zHigh Precision Output Voltage Vo±1%
zLow Dropout Voltage ∆ VI-O =1.1V typ. At Io=1A
zInternal Excessive Voltage Protection Circuit
zInternal Short Circuit Current Limit
zInternal Thermal Overload Protection
zBipolar Technology
zPackage Outline TO-252
PIN CONFIGURATION
2
PIN FUNCTION
1.VIN
2.GND
3.VOUT
1 3
NJM2391DL1
NJM2595
■ FEATURES
● 5-input 3-output
● Operating Voltage ±4.0 to ±6.5V
● Operating current ±15mAtyp. at Vcc=±5V
● Crosstalk -65dBtyp.
● Internal 6dB Amplifier
● Internal 75Ω Driver
● Bipolar Technology
● Package Outline DIP16,DMP16
+
V SW2 SW1 SW5
16 10 14 2
Vin1 13
S1 S5
Vin2 9 75Ω
20k
6dB
Amp Driver 1 Vout1
20k
S2
Vin3 7
20k S4 S6
75Ω
Vin4 5
6dB
Amp Driver 15 Vout2
20k S3 20k
Vin5 3
20k S7
6dB 75Ω
Amp Driver 11 Vout3
20k
4 6 12 8
-1-
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NJM2845/46
FEATURES
High Ripple Rejection 75dB typ. (f=1kHz,3V Version)
Output Noise Voltage Vno=45µVrms typ. (Vo=3V Version)
Output capacitor with 2.2µF ceramic capacitor (Vo≥2.6V)
Output Current Io(max.)=800mA
High Precision Output Vo ±1.0%
Low Dropout Voltage 0.18V typ. (Io=500mA)
ON/OFF Control (NJM2846)
Internal Short Circuit Current Limit
Internal Thermal Overload Protection
Bipolar Technology
Package Outline TO-252-3 (NJM2845DL1), TO-252-5 (NJM2846DL3)
PIN CONFIGURATION
2 3
1.VIN 1.CONTROL
2.GND 2.VIN
3.VOUT 3.GND
4.Vo
1 3 5.NC
123 45
NJM2845DL1 NJM2846DL3
EQUIVALENT CIRCUIT
GND GND
NJM2845DL1 NJM2846DL3
Ver.2005-01-20 -1-
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NJW1197C
PIN FUNCTION 80 51
81 50
100 31
1 30
No. SYMBOL FUNCTION No. SYMBOL FUNCTION
1 ROUT Rch output 51 DCR_IN “Multi-channel selector” Rch input
2 COUT Cch output 52 DCR_OUT “Input selector” Rch output
3 LSOUT LSch output 53 GND Ground
4 RSOUT RSch output 54 DCL_IN “Multi-channel selector” Lch input
5 LBOUT LBch output 55 DCL_OUT “Input selector” Lch output
6 RBOUT RBch output 56 GND Ground
7 SWOUT SWch output 57 REC_B1R “Input selector” Rch REC output B1
8 GND Ground 58 REC_B1L “Input selector” Lch REC output B1
9 FIL_BL2 Lch Bass filter terminal 2 59 REC_A4R “Input selector” Rch REC output A4
10 FIL_BL1 Lch Bass filter terminal 1 60 REC_A4L “Input selector” Lch REC output A4
11 FIL_TL Lch Treble filter terminal 61 REC_A3R “Input selector” Rch REC output A3
12 TCAP Switching noise rejection capacitor 62 REC_A3L “Input selector” Lch REC output A3
13 FIL_BR2 Rch Bass filter terminal 2 63 REC_A2R “Input selector” Rch REC output A2
14 FIL_BR1 Rch Bass filter terminal 1 64 REC_A2L “Input selector” Lch REC output A2
15 FIL_TR Rch Treble filter terminal 65 REC_A1R “Input selector” Rch REC output A1
16 V+ + Power supply voltage input 66 REC_A1L “Input selector” Lch REC output A1
17 ADR Chip address select input 67 VDDOUT Internal Digital +Power Supply Output
18 V- - Power supply voltage input 68 DATA Control data signal input
19 L1IN “Input selector” Lch input 1 69 CLOCK Clock signal input
20 DCCAP_SW Switching noise rejection capacitor 70 LATCH Latch signal input
21 R1IN “Input selector” Rch input 1 71 MUTE External mute control
22 DCCAP_RB Switching noise rejection capacitor 72 FL+ “Input selector gain control” Lch no-inverted output
23 L2IN “Input selector” Lch input 2 73 FL- “Input selector gain control” Lch inverted output
24 DCCAP_LB Switching noise rejection capacitor 74 FR+ “Input selector gain control” Rch no-inverted output
25 R2IN “Input selector” Rch input 2 75 FR- “Input selector gain control” Rch inverted output
26 DCCAP_RS Switching noise rejection capacitor 76 GND Ground
27 L3IN “Input selector” Lch input 3 77 LSCIN Multi-channel LSch input C
28 DCCAP_LS Switching noise rejection capacitor 78 RSCIN Multi-channel RSch input C
29 R3IN “Input selector” Rch input 3 79 LBCIN Multi-channel LBch input C
30 DCCAP_C Switching noise rejection capacitor 80 RBCIN Multi-channel RBch input C
31 L4IN “Input selector” Lch input 4 81 GND Ground
32 DCCAP_R Switching noise rejection capacitor 82 LAIN Multi-channel Lch input A
33 R4IN “Input selector” Rch input 4 83 RAIN Multi-channel Rch input A
34 DCCAP_L Switching noise rejection capacitor 84 CAIN Multi-channel Cch input A
35 L5IN “Input selector” Lch input 5 85 LSAIN Multi-channel LSch input A
36 GND Ground 86 RSAIN Multi-channel RSch input A
37 R5IN “Input selector” Rch input 5 87 LBAIN Multi-channel LBch input A
38 GND Ground 88 RBAIN Multi-channel RBch input A
39 L6IN “Input selector” Lch input 6 89 SWAIN Multi-channel SWch input A
40 L9IN “Input selector” Lch input 9 90 GND Ground
41 R6IN “Input selector” Rch input 6 91 LBIN Multi-channel Lch input B
42 R9IN “Input selector” Rch input 9 92 RBIN Multi-channel Rch input B
43 L7IN “Input selector” Lch input 7 93 CBIN Multi-channel Cch input B
44 L10IN “Input selector” Lch input 10 94 LSBIN Multi-channel LSch input B
45 R7IN “Input selector” Rch input 7 95 RSBIN Multi-channel RSch input B
46 R10IN “Input selector” Rch input 10 96 LBBIN Multi-channel LBch input B
47 L8IN “Input selector” Lch input 8 97 RBBIN Multi-channel RBch input B
48 L11IN “Input selector” Lch input 11 98 SWBIN Multi-channel SWch input B
49 R8IN “Input selector” Rch input 8 99 GND Ground
50 R11IN “Input selector” Rch input 11 100 LOUT Lch output
–2–
R×5VT
PIN CONFIGURATION
• TO-92 • SOT-89 • SOT-23-5
5 4
(mark side)
(mark side) (mark side)
1 2 3 1 2 3
1 2 3
PIN DESCRIPTION
• TO-92 • SOT-89 • SOT-23-5
4 NC
5 NC
ST232
PIN CONFIGURATION
PIN DESCRIPTION
PIN No SYMBOL NAME AND F UNCTION
1 C1+ Positive Terminal for the first Charge Pump Capacitor
2 V+ Doubled Voltage Terminal
3 C1- Negative Terminal for the first Charge Pump Capacitor
4 C2+ Positive Terminal for the second Charge Pump Capacitor
5 C2- Negative Terminal for the second Charge Pump Capacitor
6 V- Inverted Voltage Terminal
7 T2OUT Second Transmitter Output Voltage
8 R2IN Second Receiver Input Voltage
9 R2OUT Second Receiver Output Voltage
10 T2IN Second Transmitter Input Voltage
11 T1IN First Transmitter Input Voltage
12 R1OUT First Receiver Output Voltage
13 R1IN First Receiver Input Voltage
14 T1OUT First Transmitter Output Voltage
15 GND Ground
16 VCC Supply Voltage
2/11
6 5 4 3 2 1
RT
LT
MIC_AMP
HP_IN
ALL version A-BUS OUT 6dB AMP +8dB MIC SIG. +40dB
AVR355 OPTION NJW1159
PRE-OUT
has TUNER module. 2CH MAIN AMP HP_AMP
VOL
PRE AMP +12V
TO FUNCTION SEL MULTI_OUT P-AMP
H_PHONE OUT
- FRONT L +29dB
TUNER L/R AVR354&355 OPTION or MIC_INPUT
+
TONE
TUNER MULTI_MUTE * 2EA FRONT L P-AMP
FRONT R +29dB
D MODULE TUNER CONT
FL/R
D
PRE AMP
1
+
ATT
TONE
3
+
SBL/R FRONT R
4
- FR
P-AMP
SBR/MULTI R +29dB
PRE AMP 5
+
CEN/SUB
-
SBL/ZONE2 LEFT
- 6
DATA CLOCK +
P-AMP
SURR L +29dB
7
+
-
SBR/ZONE2 RIGHT
SURR L 8
NJW1197FC2 -
PRE AMP
SURR R
P-AMP
9
ANALOG 5 IN +29dB
+ 10
ANALOG 4 IN 1
SURR R P-AMP
CEN +29dB
SL
PRE AMP DC/OVER CURRENT 2
ANALOG 4 OUT - SENS 3
+ Temp. Sensor SR
4
ANALOG 3 IN
POWER HEAT2
ANALOG AUDIO
CEN AMP
TEMP I/F 5
MUTE
PRE AMP CEN
ANALOG 2 IN 6
- P_LINE_FAIL
+ PROTECT
ANALOG 2 OUT
C SUBWOOFER TO XM PART C
ANALOG 1 IN PRE AMP
(TO VIDEO PART)
+5.3V
REGULATOR
(+5V)
M/P
- TO TORINO PART
+ TO TORINO PART REGULATOR REGULATOR
+9VDH
ANALOG FRONT IN +5V (+5V)
+9VDH
(+9V) ISSUE
+1.8V (+1.8V) (+1.8V)
SBL/MULTI L
XM IN
PRE AMP TO DSP PART
ANAM
REGULATOR
USA VER. ONLY -
+5VD MULTI. LAB
iPod IN + TO VIDEO PART (+5V)
STEREO or iPod IN +5V 2008.02.25
SBR/MULTI R REGULATOR
+12V
TO VIDEO PART (+12V)
(TO IPOD PART) TO DSP PART
HDMI_IN1 HDMI_IN2 HDMI_IN3 HDMI_OUT REGULATOR
+9V +15V
(+9V) REGULATOR
TO VIDEO PART
D_SW
D_SBR
D_SR
D_FR
D_CNT
D_SBL
D_SL
D_FL
D_SW
D_SBR
D_CNT
XM_RADIO
D_SBL
SII9134
D_SR
D_FR
D_SL
D_FL
XM_DAT
MODULE
XM_LRCK
AK4384
XM_DT
ADUTA1+
ADUTB1+
ADUTA2+
ADUTB2+
ADUTA3+
ADUTB3+
ADUTB4+
ADUTA1-
ADUTB1-
ADUTA2-
ADUTB2-
ADUTA3-
ADUTB3-
ADUTB4-
24.576MHz ( 24V)
XM_BICK
(SW IC) OPT.1
D+ HDMI SD
XM_R +5VL REG
XM_MCK +5VL
I2S/DSP_SPDIF
OPT.2
XIN
XOUT
I2C & GPIO CONTROL
LRCLK1
iPod L/R RT AINL
SII9135
SCLK1
SDIN1
SDIN2
SDIN3
SDIN4
MCLK
SUB TRANS
COAX.1
THE BRIDGE II
iPod IN HDMI_SPDIF
STANDBY
(HDMI RX) +VCC2
B iPod TX
I2S
UNBAL B
( iPod )
HDMI SD
HDMI LRCK
HDMI SCLK
RST
iPod CVBS
iPod CVBS
AVR354 & 355 OPTION FLI30336 COAX OUT
ST232CDR AC OUTLET AC IN
TORINO
AUDATA0
AUDATA1
AUDATA2
AUDATA3
AVR354 & 355 OPTION ADV7342 CLKIN
LRCLK0
XMCK
SCLK0
DIGITAL VIDEO
(SCALER) MAX : 1080p
(DAC) A-BUS IR IN
THE BRIDGE II IN FROM THE BRIDGE II DIN RMCK XMCK
( iPod CVBS ) ( iPod )
SPI Serial Flash
CONTROL BY DAC
COMPOSITE 1 IN
RDS CONT
DSP CONT
VOL CONT
DIR CONT
COMPOSITE FRONT
NJM2595
S-VIDEO FRONT
ANALOG FRONT
PH DET
CVBS_OUT
S-VID Y_OUT DIR MCLK
FL DISPLAY
COAX.FRONT
OPT.FRONT
S-VID C_OUT
Y_OUT HDMI MCLK
Y
S-VIDEO FRONT IN FROM FRONT Cb_OUT 74VHC157
C Cr_OUT 2CH MUX
VR ENC
KEY MATRIX
COMPO COMPO COMPO MOMS SWITCH
AMBER/BLUE
FLI30336 ANALOG INPUT INPUT1 INPUT2 INPUT3
FRONT VIDEO
STANDBY
Y1
AVR354 & 355 OPTION
CONT Y Y Y KEY0~2
V3
NJM2566 ANALOG OUTPUT
+6dB DRV Y2 EEPROM (32 Kbit)
S-VID Y (BLUE)
Cb1 Cb
V2
Cb Cb REMOTE IN VOLUME Indicator
FLI30336 ANALOG INPUT Cb2 RST IC
V1
COMPOSITE MONITOR OUT TOSHIBA
Y Cr1 CARR. OUT
+6dB DRV Cr Cr Cr POWER AMP CONT
Y 16BIT u-COM
S-VIDEO 3 IN C Cr2
C MULTI_IR IN iPod Buffer IC CONT
Y3
A Y
NJM2595 S-VIDEO MONITOR OUT Cb3
Cr3
A-BUS_IR OUT
VIDEO SWITCHING CONT REVISION 2 4 6 A
S-VIDEO 2 IN
C
1 3 5 7
COMPONENT MONITOR OUT
Y V2
S-VID C
FLI30336 ANALOG INPUT
COMP_Cb_OUTPUT
Cb
FOR BACK-UP MEMORY.
SCHEMATIC DIAGRAM SHEET
KEY
REMOTE ENC
POWER DOWN
STANDBY
VR ENC
S-VIDEO 1 IN C V1
VFD CONTROL
+6dB DRV
COMP_Cr_OUTPUT
Cr 1
MODEL AVR254/255/354/355 1
RS232C
NJM2595
COMMUNICATION BETWEEN TORINO & TOSHIBA MCU ST232CDR
VIDEO SWITCHING CONTROL BY MCU UART RX/TX DESIGN CHECK APPROVE DRAWING NO
Measurement condition
.No input signal or volume position is minimum.
Standard value
.Ideal current = 48mA (± 5%)
.Ideal DC Voltage = 25.92mV (± 5%)
DC EVM
CUP12026* (MAIN PCB)
+ -
DC VOLTMETER ; Connect to
CN66(SL),CN61(CEN),CN64(SR),CN63(FL),CN65(SBL(AVR254,255,354,355)),CN62(FR),CN67(SBR)