Sie sind auf Seite 1von 68
Dec Lab Manual, BED, NIT Silchar STUDY OF LoGic ares To study abou logic gts an verify tes truth ble, APPARATUS REQUIRED: 'SLNo.| COMPONENT (SPECIFICATION) 1. AND GATE} 2. OR GATE [3 Noraare ‘AND GATE DUP ‘OR GATE OR GATE ‘AND GATES TP IC TRAINER KIT "ATCH CORD ary | T T T T T T T = is ‘THEORY: iret that takes the logical decision andthe process are called logte gates, ach gate has one or more input end only one ouput. OR, AND and NOT are basic gates. NAND, NOR and XCOR are known as universal gates, Basic gates form these gates, AND GATE: ‘The AND gate perfoms a logical multplisation commonly known ss AND function. The ouput is high when both the input ae high. The ‘output is low level When any one ofthe inputs is low. Dee Lab Manual, BED, NIT Silchar OR GATE: The OR gate performs a logical addition commonly known as OR function. The output is high when any one of the inputs is high. The output is low Jevel when both the inputs are low. NoT Gam! ‘The NOT gate is called an inverter. The output is high when the input is low. The output is low when the input is high. NAND GATE: ‘The NAND gate is a contraction of AND-NOT. The output is high when both inputs are low and any one ofthe input is low .The output is low level when both inputs are high. NOR GATE: ‘The NOR gate is a contraction of OR-NOT. The output is high when both inputs are low. The output is low when one or both inputs are X-OR GATE: ‘5... The output is high when any one of the inputs is high. The output is low "When both te inputs are lw and oth the inputs ar high, When numberof inputs for an exor gute exceeds two the operation can be described as follows: “When the input contains odd numberof 1s ten te output becomes high, when the number of 1s in the input contains even numberof Is or zero 1s then the output becomes low. Dee Lab Manual, BED, NIT Silchar PROCEDURE: (i) Connections are given as per circuit diagram, (i) Logical inputs are given as per creit diagram, (Gi) Observe the output and verify the truth table, ‘ANDGATE: SYMBOL: PIN DIAGRAM: 4 yap ' vee fu é vem 2 somata 0 CP oer

Das könnte Ihnen auch gefallen