Compal LA-5151P KAT00 Discrete VGA POITIER Montevina M96-M92 Dell Studio 1745 PDF

A B C D E
Model Name: KAT00 DIS

PCB NO: LA-5151P
http://mycomp.su/x/
1
PCB P/N: DA80000E400 1
BOM P/N: 43169531L01 (M92)

43169531L02 (M96)
Compal Confidential
2
Schematic Document 2
POITIER Montevina M96/M92

2009 / 06/ 12 Rev:1.0 (A00)
3 3
@ : Nopop component
92@ : Use ATI M92 Graphic solution
96@ : Use ATI M96 Graphic solution
4 4
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Cover Sheet
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. R10 (A00)
LA-5151P
Date: Friday, June 12, 2009 Sheet 1 of 60
A B C D E
5 4 3 2 1
Block Diagram Clock Generator

CPU ITP Port CK505
Compal confidential FAN Thermal Pentium-M ICS9LPRS387AKLFT
+1.05VS_CK505 P.7 +3VS_CK505
Model : KAT00 +5V_ALW EMC1402 Penryn -4MB (Socket P) +1.05VS_CK505
P.7 +1.5VS P.6
+3V_ALW uFCPGA CPU
http://mycomp.su/x/
+3.3V_ALW P.7 +1.05V_VCCP
+VCC_CORE 478pin P.7,8,9
D
Memory BUS (DDR3) DDRIII-DIMM X2 D
CRT CONN VGA BANK 0, 1, 2, 3, 4 ,5 ,6 ,7 ,8
+5VS P.35 H_A#(3..35) H_D#(0..63) P.17,18
System Bus
+1.5V
LVDS CONN LVDS AMD M96(M92) FSB 1066 MHz
+LCDVDD
+3.3V_ALW P.35 Right Front Side.
PCIE-E 16X INTEL To Card-reader
+1.5V 1066 MHz USB Port X1 subboard
+5V_ALW P.32
DP CONN DPA 29 x 29 mm Cantiga
+5VS P.37
Right behind side.
+1.5VS 1329pin BGA USB Port1 X1 To Single USB
+5V_ALW
DPB +1.05V_VCCP subboard P.30
HDMI CONN P.38,39,40,41,42 +3.3VS
+5VS P.36 P.10,11,12,13,14,15,16
Bluetooth
P.30
VRAM 64Mx16 DMI
(M92x4 / M96x8)
P.43,44 Touch Screen
+1.5VS P.32
C C
100MHz
To Card-reader subboard P.32
Camera P.30
USB2.0
8 IN 1 CONN +5V_ALW INTEL
S-ATA(1)
+3VS
CardBus +5VS
ICH9-M Charge USB/E-SATA
+RTC_CELL PCI-E
+3VS
OZ888GS0 +3.3VS
Ports X1
IEEE1394 +1.8VS 676pin BGA Azalia I/F +5V_ALW P.30
+3.3V_ALW_ICH
+1.5VS S-ATA(3)
PCI Express BUS +1.05V_VCCP
P.19,20,21,22,23
Express Card SATA2 SATA1 SATA0 RTL8111DL RJ45
GPIO5
P.28 +3.3V_ALW P.24
LPC BUS E-ODD S-HDD-2 S-HDD-1
+3VS
FFS +3VS
PCIE3 PCIE2 P.20 +5VS P.29 +5VS P.29 +5VS P.29
33MHz
B Azalia Codec AMP Speaker
B
Mini Card 3 Mini Card 2 Mini Card 1 92HD73C MAX9736A

16Mx1sector +3.3VS B+ P.26
TV tuner WLAN WWAN +VDDA P.25
+3VS +3VS +3VS
+1.5VS P.28 +1.5VS P.27 +1.5VS P.27
SPI Flash ROM AMP
ENE KBC P.31 Subwoofer
USB[6] USB[4] USB[5] MAX9736A
KB926QFD3 AMP B+ P.26
MMB MAX4411x2
P.30 P.25
+RTC_CELL
DC IN +3.3V_ALW P.31
To MMB subboard Dig. MIC
P.45 P.32
HeadPhone & P.30
MIC Jack
DC/DC Interface BATT IN VCORE (IMVP-6) 1.5V/0.75V +3.3VS
P.45~52 P.52 P.51 P.49 Int.KBD & Touch Pad
A BL P.32 P.32
A
Power Sequence ME & LED CHARGER 3V/5V

P.46 P.47 DELL CONFIDENTIAL/PROPRIETARY
P.34
GPU/1.1V 1.05V/1.8V PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
Title
P.50 P.48 BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Block Diagram
LA-5151P
5 4 3 2 1
A
http://mycomp.su/x/
O MEANS ON X MEANS OFF
Voltage Rails
Symbol Note :
power +5VS : means Digital Ground

plane +3VS
+1.8VS
+5VALW +1.5V
+1.5VS : means Analog Ground
+B
+1.1VS
+3VALW
+VCCP @ : means just reserve , no build
+0.75VS DEBUG@ : means just reserve for debug.
State
+CPU_CORE
USB Port Device SATA Port Device PCIE Port Device

S0 0 0 1
1 O O O O USB&ESATA JSATA1 JWWAN1 1
1 Reader/BD 1 JSATA2 2 JWLAN1

S1 2 4 3
O O O O USB board JESA1 JWPAN1
3 NC 5 JODD 4 Reader/BD (OZ888)
S3 O O O 4 WLAN 5 JEXP1
X 5 6
WWAN RTL8111DL
S5 S4/AC 6
O O X X WPAN
7 Express
S5 S4/ Battery only 8
O X X X NC
9 Touch screen
S5 S4/AC & Battery 10 Bluetooth
don't exist X X X X 11 Camera
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Note List
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
X Date:
LA-5151P
Friday, June 12, 2009 Sheet 3 of 60
R10 (A00)
A
5 4 3 2 1
http://mycomp.su/x/
8881mA
D 44000mA D
VR_ON SI4392
ISL6266ACRZ-T +1.5VS
+CPU_CORE (Q45)
(PU10)
ADAPTER 20000mA 913mA
VGA_ON ISL6268CAZ-T RT9025
+GPU_CORE +1.1VS
(PU9) (PU15)
9794mA ?mA
SYSON TPS51117RGYR SUSP# RT9026
B+ +1.5V +0.75VS
(PU8) (PU11)
BATTERY
9857mA
SUSP# TPS51117RGYR 0 Ohm
+1.05V_VCCPP +1.05VS_CK505
(PU6)
CHARGER
C C
SUSP# TPS51427
(PU5)
+5VALW +3VALW
RUNON USB_EN# EN_EOL# SUSP SUSP SUSP#
SI4800BDY TPS2062ADR SI3456BDY FBM-11-160808-601-T SI4392DY RT9025

(Q51) (U17) (Q3) (L29) (Q50) (PU13)
4400mA
2000mA 160mA 20mA 7377mA 669mA
+LAN_IO +EC_AVCC +3VS +1.8VS
+5VS +5V_CHGUSB EN_EOL#
VDDEN EN_EOL#
RTL8111DL 0 Ohm SI2310BDS-T1-E3 SI2310BDS
B
FUSE (U9) +3VS_CK505 B
+CRT_VCC (Q25) (Q34)
+LAN_VDD 0 Ohm
0 Ohm +DVDD_AUDIO +LCDVDD +3VS_DELAY
+AVDD_AUDIO
0 Ohm
0 Ohm +3V_WLAN
+5VS_KBL
0 Ohm
+3V_WLAN
A A
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Power Rail
LA-5151P
5 4 3 2 1
5 4 3 2 1
http://mycomp.su/x/
D D
2.2K 2.2K
+3VALW +3.3VS
2.2K 2.2K
G16 ICH_SMBCLK ICH_SM_DA 200
2N7002 ICH_SM_CLK
A13 ICH_SMBDATA 202 DIMMA SMBUS Address 0xA0
2N7002
10K
ICH9-M 200
202 SMBUS Address 0XA4
DIMMB
10 SMBUS Address Read D3 (H)

CLK GEN
9 SMBUS Address Write D2 (H)
2.2K
2.2K
+3VALW FFS
C C
77 EC_SMB_CK1 100 ohm 7

SCL1 BATTERY
78 EC_SMB_DA1 100 ohm 6
SDA1 CONN
2.2K
2.2K +3VS Need make sure EC will disable this SMB port in S5 /AC mode.
KBC SCL2 32
112 EC_SMB_CK2
30
WLAN SMBUS Address [TBD]
SDA2 111 EC_SMB_DA2
32
KB926QFD3 2.2K 30 WPAN SMBUS Address [TBD]
2.2K +3VS
32
30
WWAN SMBUS Address [TBD]
17 EC_FB_SCLK MMB
B B
18 EC_FB_DATA 32
EXPRESS
SMBUS Address [TBD]
30 CARD
8
Thermal
7 Sensor SMBUS Address: 100_1100 b
I2C / SMBUS ADDRESSING
DEVICE HEX ADDRESS

DDR SO-DIMM 0 A0 10100000
DDR SO-DIMM 1 A4 10100100
CLOCK GENERATOR (EXT.) D2 11010010
A A

Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT SMBUS TOPOLOGY
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD R10 (A00)
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5151P
5 4 3 2 1
5 4 3 2 1
U1 +3VS_CK505
R10 Moidify (short directly)
R1
Routing the trace at least 10mil CLK_SMBDATA R4 1 @
+3VS 1 2
SDATA 9 2 0_0402_5% ICH_SM_DA 17,18,20,21
0_0805_5%
22U_0805_6.3V6M~D
C1
0.1U_0402_16V4Z~D
C2
0.1U_0402_16V4Z~D
C3
0.1U_0402_16V4Z~D
C4
0.1U_0402_16V4Z~D
C5
0.1U_0402_16V4Z~D
C6
0.1U_0402_16V4Z~D
C7
CLK_XTAL_OUT 6 1 1 1 1 1 1 1
+3VS_CK505 VDDREF
10 CLK_SMBCLK R3 1 @ 2 0_0402_5%
SCLK ICH_SM_CLK 17,18,20,21
2
CLK_XTAL_IN 19
R2 VDD48
@ 0_0402_5% 72 71 R_CPU_BCLK R5 2 @ 1 0_0402_5% 2 2 2 2 2 2 2
VDDCPU CPUT0_LPR_F CLK_CPU_BCLK 7
CPU
http://mycomp.su/x/
Y1 12 70 R_CPU_BCLK# R6 2 @ 1 0_0402_5%
1
VDDPCI CPUC0_LPR_F CLK_CPU_BCLK# 7
2 1
27 +1.05V_VCCP
14.318MHZ_16PF_7A14300083 VDDPLL3 R_MCH_BCLK R7 1 @
CPUT1_LPR_F 68 2 0_0402_5%
CLK_MCH_BCLK 10 +1.05VS_CK505
D
2 2 55
VDDSRC MCH D
67 R_MCH_BCLK# R8 1 @ 2 0_0402_5%
C8 C9 CPUC1_LPR_F CLK_MCH_BCLK# 10
1 2
22P_0402_50V8J~D 22P_0402_50V8J~D +1.05VS_CK505 52 R13
1 1 VDDSRC_IO
22U_0805_6.3V6M~D
C10
0.1U_0402_16V4Z~D
C11
0.1U_0402_16V4Z~D
C12
0.1U_0402_16V4Z~D
C13
0.1U_0402_16V4Z~D
C14
0.1U_0402_16V4Z~D
C15
0.1U_0402_16V4Z~D
C16
24 R_MCH_DREFCLK R9 1 @ 2 0_0402_5% 0_0805_5% 1 1 1 1 1 1 1
SRCT0_LPR/DOTT_96_LPR CLK_MCH_DREFCLK 11
38
VDDSRC_IO R_MCH_DREFCLK# R11 1 @
25 2 0_0402_5%
SRCC0_LPR/DOTC_96_LPR CLK_MCH_DREFCLK# 11
62 VDDSRC_IO
+3VS_CK505 2 2 2 2 2 2 2
R10 Moidify (short directly) R_MCH_SSCDREFCLK
31 28 R10 1 @ 2 0_0402_5%
VDDPLL3_IO 27MHz_NonSS/SRCT1_LPR/SE1 MCH_SSCDREFCLK 11
66 29 R_MCH_SSCDREFCLK# R12 1 @ 2 0_0402_5%
VDDCPU_IO 27MHz_SS/SRCC1_LPR/SE2 MCH_SSCDREFCLK# 11
1
@R548
@ R548 @ R549
@R549 23
10K_0402_5% 10K_0402_5% VDD96_IO R_CLK_SATA R42 @
32 1 2 0_0402_5%
SRCT2_LPR/SATAT_LPR CLK_PCIE_SATA 19
R_CLK_SATA# R43 @ 2 0_0402_5% +3VS
33 1 SATA
2
2 H_STP_CPU# 53
SRCC2_LPR/SATAC_LPR CLK_PCIE_SATA# 19
21 H_STP_CPU# CPU_STOP# EXP_CLKREQ# R34 1 2 10K_0402_5%
CPU_STP H_STP_PCI# 54 35 R_CLK_EXPR R16 1 @ 2 0_0402_5%
21 H_STP_PCI# PCI_STOP# SRCT3_LPR CLK_PCIE_EXPR 28 WLAN_CLKREQ# R32 1 2 10K_0402_5%
36 R_CLK_EXPR# R17 1 @ 2 0_0402_5% Express Card
SRCC3_LPR CLK_PCIE_EXPR# 28 CB_CLKREQ# R22 10K_0402_5%
1 2
13 39 R_CLK_PCIE_WLAN R18 1 @ 2 0_0402_5% GLAN_CLKREQ# R30 1 2 10K_0402_5%

PCI1 SRCT4_LPR CLK_PCIE_WLAN 27
WLAN
R941 1 2 33_0402_1% PCI2_TME 14 40 R_CLK_PCIE_WLAN# R19 1 @ 2 0_0402_5% WPAN_CLKREQ# R27 1 2 10K_0402_5%
27 CLK_DEBUG_PORT PCI2/TME SRCC4_LPR CLK_PCIE_WLAN# 27
1 R20 2 R_CLK_PCI_EC 15 MCH_CLKREQ# R36 1 2 10K_0402_5%
31 CLK_PCI_EC 33_0402_1% PCI3 R_CLK_VGA R21 @
57 1 2 0_0402_5%
27_SEL SRCT6_LPR CLK_PCIE_VGA 38 CLKSATAREQ# R29 10K_0402_5%
16 PCI4/27_SELECT VGA 1 2
R24 56 R_CLK_VGA# R23 1 @ 2 0_0402_5%
ITP_EN SRCC6_LPR CLK_PCIE_VGA# 38
1 2 17
C 20 PCI_CLK PCI_F5/ITP_EN C
33_0402_1% 61 R_CLK_CB R26 1 @ 2 0_0402_5%
SRCT7_LPR CLK_PCIE_CB 30
21 CK_PWRGD 1
CK_PWRGD/PD# Cardbus
60 R_CLK_CB# R28 1 @ 2 0_0402_5%
SRCC7_LPR CLK_PCIE_CB# 30
1 1 Port Device REQ# REQ#_NAME
@ C1509
@C1509 @C1510
@C1510 CLK_XTAL_IN 5 64 R_DMI_ICH R31 1 @ 2 0_0402_5% SRC0
10P_0402_50V8J~D 10P_0402_50V8J~D X1 CPUT2_ITP_LPR/SRCT8_LPR CLK_DMI_ICH 22
2 2 DMI (ICH)
CLK_XTAL_OUT 4 63 R_DMI_ICH# R33 1 @ 2 0_0402_5% SRC2 PCIE_SATA REQ_A# CLKSATAREQ#
X2 CPUC2_ITP_LPR/SRCC8_LPR CLK_DMI_ICH# 22
SRC3 PCIE_EXPR REQ#3 EXP_CLKREQ#
Place close U1 11 44 R_CLK_PCIE_GLAN R35 1 @ 2 0_0402_5%
NC SRCT9_LPR CLK_PCIE_GLAN 24
GLAN SRC4 PCIE_WLAN REQ#4 WLAN_CLKREQ#
45 R_CLK_PCIE_GLAN# R37 1 @ 2 0_0402_5%
SRCC9_LPR CLK_PCIE_GLAN# 24
SRC6 PCIE_VGA REQ#6
R38 1 2 33_0402_1% FSA 20
21 CLK_48M_ICH USB_48MHz/FSLA R_CLK_WPAN
SRCT10_LPR
50 R39 1 @ 2 0_0402_5%
CLK_PCIE_WPAN 28 SRC7 PCIE_CB REQ#7 CB_CLKREQ#
FSB 2 WPAN
FSLB/TEST_MODE R_CLK_WPAN#
SRCC10_LPR
51 R40 1 @ 2 0_0402_5%
CLK_PCIE_WPAN# 28 SRC8 DMI_ICH
R41 1 2 33_0402_1% FSC 7
21 CLK_14M_ICH FSLC/TEST_SEL/REF0
SRC9 PCIE_GLAN REQ#9 GLAN_CLKREQ#
1 1 PAD T1 8 48 R_MCH_3GPLL R14 1 @ 2 0_0402_5%
REF1 SRCT11_LPR CLK_MCH_3GPLL 11
MCH_3GPLL SRC10 PCIE_WPAN REQ#10 WPAN_CLKREQ#
@ C1518
@C1518 @ C1511 (14.318 reference output) 47 R_MCH_3GPLL# R15 1 @ 2 0_0402_5%
10P_0402_50V8J~D SRCC11_LPR CLK_MCH_3GPLL# 11
10P_0402_50V8J~D
2 2
SRC11 MCH_3GPLL REQ#11 MCH_CLKREQ#
69
GNDCPU
3 37 EXP_CLKREQ# 28
GNDREF CR#3
Place clolse U1 0 = SRC8/SRC8#
18 GNDPCI CR#4 41 WLAN_CLKREQ# 27 R03 Modify ITP_EN * 1 = ITP/ITP#
22 58 VGA_CLKREQ# R25 1 2 10K_0402_5%
B GND48 CR#6 B
30 65 27_SEL 0 = PIN 24/25 : DOT96 / DOT96#
26
GND
B version P/N :
CR7#
43
CB_CLKREQ# 30
GLAN_CLKREQ# 24
* PIN 28/29 : LCDCLK / LCDCLK#
GND CR#9
1 = PIN 24/25 : SRC_0 / SRC_0#
34 GNDSRC
SA000020H10 CR10# 49 WPAN_CLKREQ# 28 PIN 28/29 : 27M / 27M_SS
59 46 MCH_CLKREQ# 11
GNDSRC CR#11
0 = Overclocking of CPU and SRC Allowed
42 GNDSRC CR#A 21 CLKSATAREQ# 21 PCI2_TME
1 = Overclocking of CPU and SRC NOT allowed
ICS9LPRS387BKLFT_MLF72_10x10
*
+3VS_CK505 +3VS_CK505 +3VS_CK505
2
@R45
@ R45 @ R46
@R46 R47
FSA
FSC FSB FSA CPU SRC PCI REF DOT_96 USB R48 1 2 2.2K_0402_5% R49 1 2 1K_0402_5%
MCH_CLKSEL0 11
10K_0402_5% 10K_0402_5% 10K_0402_5%
CLKSEL2 CLKSEL1 CLKSEL0 MHz MHz MHz MHz MHz MHz
1
8 CPU_BSEL0 ITP_EN 27_SEL PCI2_TME
0 0 0 266 100 33.3 14.318 96.0 48.0
* FSB R53 1 2 1K_0402_5%
MCH_CLKSEL1 11
2
0 0 1 133 100 33.3 14.318 96.0 48.0 R50
10K_0402_5%
R51
10K_0402_5%
@R52
@ R52
R54 1 2 0_0402_5% 10K_0402_5%
8 CPU_BSEL1
0 1 0 200 100 33.3 14.318 96.0 48.0
1
FSC R55 1 2 10K_0402_5% R56 1 2 1K_0402_5%
A MCH_CLKSEL2 11 A
0 1 1 166 100 33.3 14.318 96.0 48.0
8 CPU_BSEL2
1 0 0 333 100 33.3 14.318 96.0 48.0
1 0 1 100 100 33.3 14.318 96.0 48.0
1 1 0 400 100 33.3 14.318 96.0 48.0 PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Clock Generator CK505
1 1 1 NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
Reserved PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. R10 (A00)
LA-5151P
5 4 3 2 1
5 4 3 2 1
XDP / ITP +1.05V_VCCP
XDP_TRST# R59 1 2 54.9_0402_1% XDP_TDI R57 1 2 51_0402_1%
XDP_TCK R60 1 2 54.9_0402_1% XDP_TMS R58 1 2 54.9_0402_1%
This shall place near CPU
http://mycomp.su/x/
D D
Control Thermal
+1.05V_VCCP
1
+1.05V_VCCP
@ R61
@R61
56_0402_5%
2
CONN@
10 H_A#[3..16]
2 2
JCPU1A Qual core 50 ohm R62
B
H_A#3 J4 H1 H_ADS# 49.9_0402_1%
A[3]# ADS# H_ADS# 10
ADDR GROUP 0
H_A#4 L5 E2 H_BNR#
A[4]# BNR# H_BNR# 10
E
H_A#5 L4 G5 H_BPRI# H_PROCHOT# 3 1 OCP#
H_BPRI# 10
1
A[5]# BPRI# OCP# 21
C
H_A#6 K5
H_A#7 A[6]# H_DEFER# H_IERR# @ Q1
M3 A[7]# DEFER# H5 H_DEFER# 10
H_A#8 N2 F21 H_DRDY# MMBT3904_SOT23-3~D
H_A#9 A[8]# DRDY# H_DBSY# H_DRDY# 10
J1 A[9]# DBSY# E1 H_DBSY# 10
H_A#10 N3
H_A#11 A[10]# H_BR0#
P5 F1 H_BR0# 10
H_A#12 A[11]# BR0#
P2 A[12]#
CONTROL
H_A#13 L2 D20 H_IERR#
H_A#14 A[13]# IERR# H_INIT#
P4 B3 H_INIT# 19
H_A#15 A[14]# INIT#
P1 A[15]#
H_A#16 R1 H4 H_LOCK# +3VS
10 H_ADSTB#0
H_ADSTB#0 M1
A[16]#
ADSTB[0]#
LOCK#
C1 H_RESET#
H_LOCK# 10
Thermal Sensor EMC1402-1-ACZL-TR
H_REQ#0 RESET# H_RS#0 H_RESET# 10
10 H_REQ#0 K3 REQ[0]# RS[0]# F3 H_RS#0 10 1
H_REQ#1 H2 F4 H_RS#1 H_RS#1 10 C17 U2
10 H_REQ#1 H_REQ#2 REQ[1]# RS[1]# H_RS#2
K2 G3 H_RS#2 10 0.1U_0402_16V4Z~D
10 H_REQ#2 H_REQ#3 REQ[2]# RS[2]# H_TRDY#
10 H_REQ#3 J3 G2 H_TRDY# 10
H_REQ#4 REQ[3]# TRDY# 2 EC_SMB_CK2
10 H_REQ#4 L1 1 8 EC_SMB_CK2 27,28,31,39
C REQ[4]# H_HIT# VDD SMCLK C
10 H_A#[17..35] HIT# G6 H_HIT# 10
H_A#17 Y2 E4 H_HITM# H_THERMDA 2 7 EC_SMB_DA2
A[17]# HITM# H_HITM# 10 DP SMDATA EC_SMB_DA2 27,28,31,39
H_A#18 U5
H_A#19 A[18]#
R3 A[19]# BPM[0]# AD4 C18 1 2 2200P_0402_50V7K~D H_THERMDC 3 DN ALERT# 6
ADDR GROUP 1
H_A#20 W6 AD3
H_A#21 A[20]# BPM[1]# CPU_THERM_STP# 4
U4 AD1 +3VS 1 2 5
A[21]# BPM[2]# THERM# GND
XDP/ITP SIGNALS
H_A#22 Y5 AC4 R64 10K_0402_5%

H_A#23 A[22]# BPM[3]# CPU_THERM_STP#
U1 AC2
H_A#24 A[23]# PRDY#
R4 A[24]# PREQ# AC1
H_A#25 T5 AC5 XDP_TCK EMC1402-1-ACZL-TR_MSOP8
H_A#26 A[25]# TCK XDP_TDI
H_A#27
T3
A[26]# TDI
AA6
XDP_TDO
To power
W2 A[27]# TDO AB3 T2 Address:100_1100
H_A#28 W5 AB5 XDP_TMS
H_A#29 A[28]# TMS XDP_TRST# R1563
Y4 AB6
H_A#30 A[29]# TRST# XDP_DBRESET# 0_0402_5%
U2 A[30]# DBR# C20
H_A#31 XDP_DBRESET# 21 CPU_THERM_STP#
D
V4 A[31]# 3 1 1 2
H_A#32 MAINPWON 39,47,52
W3
H_A#33 A[32]# H_PROCHOT# R63
AA4 A[33]# THERMAL 2 1 68_0402_5% +1.05V_VCCP Q53
H_A#34 AB2 SSM3K7002FU_SC70-3~D
G
2
H_A#35 A[34]#
AA3 D21
H_ADSTB#1 A[35]# PROCHOT# H_THERMDA 31,39,51 VR_ON
10 H_ADSTB#1 V1 ADSTB[1]# THERMDA A24
H_THERMDC
H_THERMDA, H_THERMDC
B25
19 H_A20M#
H_A20M# A6
THERMDC routing together,Trace width /
A20M#
ICH
H_FERR# H_THERMTRIP#
19 H_FERR# H_IGNNE#
A5 FERR# THERMTRIP# C7 H_THERMTRIP# 11,19 Spacing = 10 / 10 mil
19 H_IGNNE# C4
IGNNE# CLK_CPU_BCLK
H_STPCLK# CLK_CPU_BCLK 6
19 H_STPCLK# D5 STPCLK#
1
H_INTR C6 H CLK
19 H_INTR LINT0
H_NMI B4 A22
19 H_NMI H_SMI# LINT1 BCLK[0]
A3 A21 R932 Qual core request
19 H_SMI#
M4
SMI# BCLK[1] 100_0402_1% FAN Control circuit +FAN1_POWER
2
B RSVD[01] C19 +5VS B

N5 RSVD[02]
T2 CLK_CPU_BCLK# 10U_0805_10V4Z~D
RSVD[03] CLK_CPU_BCLK# 6
V3 2 1 1 2
RSVD[04] C21 10U_0805_10V4Z~D
B2
RESERVED
RSVD[05] C20
C3
RSVD[06] 1000P_0402_50V7K~D U3
D2 RSVD[07]
D22 RSVD[08] 2 1 1 VEN GND 8
D3 2 7
RSVD[09] VIN GND
F6 RSVD[10] 3 VO GND 6
EN_DFAN1 4 5
31 EN_DFAN1 VSET GND
+3VS RT9027BPS_SO8
Penryn
1
40mil
R65
10K_0402_5%
JFAN1
+FAN1_POWER 1
2
1
2 4
31 FAN_SPEED1 2 G
2 3 5
3 G
C22 MOLEX_53261-0371~D
0.1U_0402_16V4Z~D CONN@
1
A A
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Penryn(1/3)-AGTL+/ITP-XDP
LA-5151P
5 4 3 2 1
5 4 3 2 1
+CPU_CORE +CPU_CORE
CONN@
JCPU1C
A7 VCC[001] VCC[068] AB20
A9 VCC[002] VCC[069] AB7
A10 AC7
CONN@ VCC[003] VCC[070]
10 H_D#[0..15] H_D#[32..47] 10 A12 VCC[004] VCC[071] AC9
http://mycomp.su/x/
JCPU1B A13 AC12
H_D#0 H_D#32 VCC[005] VCC[072]
E22 Y22 A15 AC13
H_D#1 D[0]# D[32]# H_D#33 VCC[006] VCC[073]
F24 D[1]# D[33]# AB24 A17 VCC[007] VCC[074] AC15
H_D#2 E26 V24 H_D#34 A18 AC17
H_D#3 D[2]# D[34]# H_D#35 VCC[008] VCC[075]
G22 V26 A20 AC18
D[3]# D[35]# VCC[009] VCC[076]
DATA GRP 0
D H_D#4 H_D#36 D
F23 D[4]# D[36]# V23 B7 VCC[010] VCC[077] AD7
H_D#5 G25 T22 H_D#37 B9 AD9
H_D#6 D[5]# D[37]# H_D#38 VCC[011] VCC[078]
E25 U25 B10 AD10
H_D#7 D[6]# D[38]# H_D#39 VCC[012] VCC[079]
E23 D[7]# D[39]# U23 B12 VCC[013] VCC[080] AD12
H_D#8 K24 Y25 H_D#40 B14 AD14
DATA GRP 2
H_D#9 D[8]# D[40]# H_D#41 VCC[014] VCC[081]
G24 W22 B15 AD15
H_D#10 D[9]# D[41]# H_D#42 VCC[015] VCC[082]
J24 D[10]# D[42]# Y23 B17 VCC[016] VCC[083] AD17
H_D#11 J23 W24 H_D#43 B18 AD18
H_D#12 D[11]# D[43]# H_D#44 VCC[017] VCC[084]
H22 W25 B20 AE9
H_D#13 D[12]# D[44]# H_D#45 VCC[018] VCC[085]
F26 D[13]# D[45]# AA23 C9 VCC[019] VCC[086] AE10
H_D#14 K22 AA24 H_D#46 C10 AE12
H_D#15 D[14]# D[46]# H_D#47 VCC[020] VCC[087]
H23 AB25 C12 AE13
H_DSTBN#0 D[15]# D[47]# H_DSTBN#2 VCC[021] VCC[088]
10 H_DSTBN#0 J26 DSTBN[0]# DSTBN[2]# Y26 H_DSTBN#2 10 C13 VCC[022] VCC[089] AE15
H_DSTBP#0 H26 AA26 H_DSTBP#2 C15 AE17
10 H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 10 VCC[023] VCC[090]
H_DINV#0 H25 U22 H_DINV#2 C17 AE18
10 H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 10 VCC[024] VCC[091]
10 H_D#[16..31] H_D#[48..63] 10 C18 VCC[025] VCC[092] AE20
D9 AF9
H_D#16 H_D#48 VCC[026] VCC[093]
N22 D[16]# D[48]# AE24 D10 VCC[027] VCC[094] AF10
H_D#17 K25 AD24 H_D#49 D12 AF12
H_D#18 D[17]# D[49]# H_D#50 VCC[028] VCC[095]
P26 AA21 D14 AF14
H_D#19 D[18]# D[50]# H_D#51 VCC[029] VCC[096]
R23 D[19]# D[51]# AB22 D15 VCC[030] VCC[097] AF15
H_D#20 L23 AB21 H_D#52 D17 AF17
D[20]# D[52]# VCC[031] VCC[098]
DATA GRP 1
H_D#21 M24 AC26 H_D#53 D18 AF18
H_D#22 D[21]# D[53]# H_D#54 VCC[032] VCC[099] +1.05V_VCCP
L22 D[22]# D[54]# AD20 E7 VCC[033] VCC[100] AF20
H_D#23 M23 AE22 H_D#55 E9
H_D#24 D[23]# D[55]# H_D#56 VCC[034]
P25 AF23 E10 G21
H_D#25 D[24]# D[56]# H_D#57 VCC[035] VCCP[01]
P23 D[25]# D[57]# AC25 E12 VCC[036] VCCP[02] V6
H_D#26 P22 AE21 H_D#58 E13 J6
DATA GRP 3
H_D#27 D[26]# D[58]# H_D#59 VCC[037] VCCP[03]
T24 AD21 E15 K6 1
H_D#28 D[27]# D[59]# H_D#60 VCC[038] VCCP[04]
R24 D[28]# D[60]# AC22 E17 VCC[039] VCCP[05] M6
H_D#29 L25 AD23 H_D#61 E18 J21 + C23
H_D#30 D[29]# D[61]# H_D#62 VCC[040] VCCP[06] 220U_D2_4VY_R15M~D
T25 AF22 E20 K21
C H_D#31 D[30]# D[62]# H_D#63 VCC[041] VCCP[07] C
N25 D[31]# D[63]# AC23 F7 VCC[042] VCCP[08] M21
H_DSTBN#1 L26 AE25 H_DSTBN#3 F9 N21 2
10 H_DSTBN#1 DSTBN[1]# DSTBN[3]# H_DSTBN#3 10 VCC[043] VCCP[09]
H_DSTBP#1 M26 AF24 H_DSTBP#3 F10 N6
10 H_DSTBP#1 H_DINV#1 DSTBP[1]# DSTBP[3]# H_DINV#3 H_DSTBP#3 10 VCC[044] VCCP[10]
10 H_DINV#1 N24 DINV[1]# DINV[3]# AC20 H_DINV#3 10 F12 VCC[045] VCCP[11] R21
F14 R6
+V_CPU_GTLREF COMP0 VCC[046] VCCP[12]
AD26 R26 F15 T21
TEST1 GTLREF COMP[0] COMP1 VCC[047] VCCP[13]
T3 C23 TEST1 MISC COMP[1] U26 F17 VCC[048] VCCP[14] T6
TEST2 D25 AA1 COMP2 F18 V21
T4 TEST2 COMP[2] VCC[049] VCCP[15]
TEST3 C24 Y1 COMP3 F20 W21
T5 TEST4 TEST3 COMP[3] VCC[050] VCCP[16]
T6 AF26 TEST4 AA7 VCC[051]
TEST5 AF1 E5 H_DPRSTP# AA9 B26
T7 TEST5 DPRSTP# H_DPRSTP# 11,19,51 VCC[052] VCCA[01] +1.5VS
TEST6 A26 B5 H_DPSLP# AA10 C26
T8 TEST6 DPSLP# H_DPSLP# 19 VCC[053] VCCA[02]
R66
R67
R68
R69
49.9_0402_1%
24.9_0402_1%
49.9_0402_1%
24.9_0402_1%
0.01U_0402_16V7K~D
10U_0805_6.3V6M~D
D24 H_DPWR# AA12
DPWR# H_DPWR# 10 VCC[054]
1
CPU_BSEL0 B22 D6 H_PWRGOOD AA13 AD6
6 CPU_BSEL0 CPU_BSEL1 BSEL[0] PWRGOOD H_CPUSLP# H_PWRGOOD 19 VCC[055] VID[0] CPU_VID0 51
B23 BSEL[1] SLP# D7 H_CPUSLP# 10 AA15 VCC[056] VID[1] AF5 1 1
6 CPU_BSEL1 CPU_BSEL2 H_PSI# CPU_VID1 51
C21 BSEL[2] PSI# AE6 AA17 VCC[057] VID[2] AE5
6 CPU_BSEL2 H_PSI# 51 CPU_VID2 51 C24 C25
AA18 AF4
Penryn VCC[058] VID[3] CPU_VID3 51
AA20 AE3
2
VCC[059] VID[4] CPU_VID4 51 2 2
AB9 AF3
VCC[060] VID[5] CPU_VID5 51
AC10 AE2
VCC[061] VID[6] CPU_VID6 51
AB10 VCC[062]
layout note: Rout H_DPRSTP# from ICH9 to IMVP6 then to GMCH & CPU AB12
VCC[063]
AB14 AF7 VCCSENSE Near pin B26
VCC[064] VCCSENSE VCCSENSE 51
layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs Qual core value AB15 VCC[065]
AB17
VCC[066] VSSSENSE
AB18 AE7
VCC[067] VSSSENSE VSSSENSE 51
Penryn
.
B B
For 8 layer condition.

+1.05V_VCCP Length match within 25 mils.
Close to CPU pin AD26 The trace width/space/other
FSB BCLK BSEL2 BSEL1 BSEL0
1
within 500mils. Zo = 55 ohm is 20/7/25. Zo = 27.4 ohm.

R72 533 133 0 0 1
+V_CPU_GTLREF 1K_0402_1%
+CPU_CORE
2
+V_CPU_GTLREF 667 166 0 1 1

R70 1 2 100_0402_1% VCCSENSE
1
800 200 0 1 0 VSSSENSE

R71 1 2 100_0402_1%
Cpu Quad Core, R=1.74K_0402_1% R73
1.74K_0402_1% 1067 266 0 0 0
Cpu Dual Core, R=2K_0402_1% Close to CPU pin
2
within 500mils.
A A
LA-5151P
5 4 3 2 1
5 4 3 2 1
High Frequence Decoupling

10uF 0805 X5R -> 85 degree.
http://mycomp.su/x/
+CPU_CORE
D D
CONN@ 1 1 1 1 1 1 1 1 1 1
JCPU1D
A4 P6 C26 C27 C28 C29 C30 C31 C32 C33 C34 C35
VSS[001] VSS[082] 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D
A8 P21
VSS[002] VSS[083] 2 2 2 2 2 2 2 2 2 2
A11 P24
VSS[003] VSS[084]
A14 VSS[004] VSS[085] R2
A16 R5
VSS[005] VSS[086]
A19 R22
VSS[006] VSS[087]
A23 VSS[007] VSS[088] R25
AF2 T1
VSS[008] VSS[089]
B6 T4
VSS[009] VSS[090]
B8 VSS[010] VSS[091] T23
B11 T26 +CPU_CORE
VSS[011] VSS[092]
B13 VSS[012] VSS[093] U3
B16 VSS[013] VSS[094] U6
B19 U21 1 1 1 1 1 1 1 1 1 1
VSS[014] VSS[095]
B21 VSS[015] VSS[096] U24
B24 V2 C36 C37 C38 C39 C40 C41 C42 C43 C44 C45
VSS[016] VSS[097] 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D
C5 V5
VSS[017] VSS[098] 2 2 2 2 2 2 2 2 2 2
C8 VSS[018] VSS[099] V22
C11 VSS[019] VSS[100] V25
C14 W1
VSS[020] VSS[101]
C16 VSS[021] VSS[102] W4
C19 VSS[022] VSS[103] W23
C2 W26
VSS[023] VSS[104]
C22 VSS[024] VSS[105] Y3
C25 Y6 +CPU_CORE
VSS[025] VSS[106]
D1 Y21
VSS[026] VSS[107]
D4 VSS[027] VSS[108] Y24
D8 AA2 1 1 1 1 1 1
VSS[028] VSS[109]
D11 AA5
C VSS[029] VSS[110] C46 C47 C48 C49 C50 C51 C
D13 VSS[030] VSS[111] AA8
D16 AA11 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D
VSS[031] VSS[112] 2 2 2 2 2 2
D19 AA14
VSS[032] VSS[113]
D23 VSS[033] VSS[114] AA16
D26 AA19
VSS[034] VSS[115]
E3 AA22
VSS[035] VSS[116]
E6 VSS[036] VSS[117] AA25
E8 AB1
VSS[037] VSS[118]
E11 VSS[038] VSS[119] AB4
E14 VSS[039] VSS[120] AB8
E16 AB11 +CPU_CORE
VSS[040] VSS[121]
E19 VSS[041] VSS[122] AB13
E21 VSS[042] VSS[123] AB16
E24 AB19 1 1 1 1 1 1
VSS[043] VSS[124]
F5 VSS[044] VSS[125] AB23
F8 AB26 C52 C53 C54 C55 C56 C57
VSS[045] VSS[126] 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D
F11 AC3
VSS[046] VSS[127] 2 2 2 2 2 2
F13 VSS[047] VSS[128] AC6
F16 AC8
VSS[048] VSS[129]
F19 AC11
VSS[049] VSS[130]
F2 VSS[050] VSS[131] AC14
F22 AC16
VSS[051] VSS[132]
F25 AC19
VSS[052] VSS[133]
G4 VSS[053] VSS[134] AC21
G1 AC24
VSS[054] VSS[135]
G23 AD2
VSS[055] VSS[136] +CPU_CORE
G26 VSS[056] VSS[137] AD5
H3 AD8
H6
VSS[057] VSS[138]
AD11 ESR <= 1.5m ohm
VSS[058] VSS[139]
H21 VSS[059] VSS[140] AD13
330U_D2E_2.5VM_R9~D
330U_D2E_2.5VM_R9~D
330U_D2E_2.5VM_R9~D
H24 AD16
VSS[060] VSS[141] Capacitor > 880 uF
330U_D2E_2.5VM_R9~D
J2 AD19 1 1 1
B VSS[061] VSS[142] B
J5 VSS[062] VSS[143] AD22 1
C58
C59
C61
J22 AD25 + + +
VSS[063] VSS[144]
C60
J25 AE1 +
VSS[064] VSS[145]
K1 VSS[065] VSS[146] AE4
K4 AE8 2 2 2
VSS[066] VSS[147] 2
K23 VSS[067] VSS[148] AE11
K26 VSS[068] VSS[149] AE14
L3 AE16
VSS[069] VSS[150]
L6 VSS[070] VSS[151] AE19
L21 VSS[071] VSS[152] AE23
L24 AE26
VSS[072] VSS[153]
M2 VSS[073] VSS[154] A2
M5 VSS[074] VSS[155] AF6
M22 AF8
VSS[075] VSS[156]
M25 VSS[076] VSS[157] AF11
N1 AF13
VSS[077] VSS[158] +1.05V_VCCP
N4 AF16
VSS[078] VSS[159]
N23 VSS[079] VSS[160] AF19
N26 AF21
VSS[080] VSS[161]
P3 A25
VSS[081] VSS[162]
VSS[163] AF25 1 1 1 1 1 1
C62 C63 C64 C65 C66 C67
Penryn
. 0.1U_0402_10V6K~D 0.1U_0402_10V6K~D 0.1U_0402_10V6K~D 0.1U_0402_10V6K~D 0.1U_0402_10V6K~D 0.1U_0402_10V6K~D
2 2 2 2 2 2
A A
LA-5151P
5 4 3 2 1
5 4 3 2 1
H_A#[3..35] 7
http://mycomp.su/x/
U4A
8 H_D#[0..63]
A14 H_A#3
H_D#0 H_A#_3 H_A#4
F2 H_D#_0 H_A#_4 C15
Layout Note : H_D#1 G8 F16 H_A#5
H_D#2 H_D#_1 H_A#_5 H_A#6
F8 H13
D
H_RCOMP / H_VREF / H_SWNG H_D#3
H_D#4
E6
H_D#_2
H_D#_3
H_A#_6
H_A#_7 C18 H_A#7
H_A#8
Poitier D
Trace width and spacing is 10 / 20 G2 H_D#_4 H_A#_8 M16

H_D#5 H6 J13 H_A#9
H_D#6
H_D#7
H2
H_D#_5
H_D#_6
H_A#_9
H_A#_10 P16 H_A#10
H_A#11
Both DIS & UMA use Cantiga GM45
F6 H_D#_7 H_A#_11 R16
H_D#8 H_A#12
H_D#9
D4
H3
H_D#_8 H_A#_12 N17
M13 H_A#13 Note : The difference between GM45 & GM47 is
H_D#10 H_D#_9 H_A#_13 H_A#14
+1.05V_VCCP H_D#11
M9
M11
H_D#_10 H_A#_14 E17
P17 H_A#15
integrated graphic core freq @ Core voltage
H_D#12 H_D#_11 H_A#_15 H_A#16
J1 F17
H_D#13 J2
H_D#_12 H_A#_16
G20 H_A#17 GM45 : 533mHZ@1.05V
H_D#14 H_D#_13 H_A#_17 H_A#18
N12 H_D#_14 H_A#_18 B19 GM47 : 640mHZ@1.05V
1
H_D#15 J6 J16 H_A#19
R74 H_D#16 H_D#_15 H_A#_19 H_A#20
P2 H_D#_16 H_A#_20 E20
221_0402_1% H_D#17 L2 H16 H_A#21
H_D#18 H_D#_17 H_A#_21 H_A#22
R2 H_D#_18 H_A#_22 J20
H_D#19 N9 L17 H_A#23
2
H_D#20 H_D#_19 H_A#_23 H_A#24
L6 H_D#_20 H_A#_24 A17
H_SWNG H_D#21 M5 B17 H_A#25
H_D#22 H_D#_21 H_A#_25 H_A#26
J3 H_D#_22 H_A#_26 L16
Near C5 pin H_D#23 N2 C21 H_A#27
H_D#_23 H_A#_27
1
1 H_D#24 R1 J17 H_A#28
H_D#25 H_D#_24 H_A#_28 H_A#29
C68 R75
Qual core H_D#26
N5 H_D#_25 H_A#_29 H20
H_A#30
N6 H_D#_26 H_A#_30 B18
0.1U_0402_16V4Z~D 75_0402_1% H_D#27 P13 K17 H_A#31
2 H_D#28 H_D#_27 H_A#_31 H_A#32
N8 B20
2
H_D#29 H_D#_28 H_A#_32 H_A#33

L7 H_D#_29 H_A#_33 F21
H_D#30 N10 K21 H_A#34
C H_D#31 H_D#_30 H_A#_34 H_A#35 C
M3 H_D#_31 H_A#_35 L20
H_D#32 Y3
H_D#33 H_D#_32 H_ADS#
AD14 H_D#_33 H_ADS# H12 H_ADS# 7
H_D#34 Y6 B16 H_ADSTB#0 H_ADSTB#0 7
H_D#35 H_D#_34 H_ADSTB#_0 H_ADSTB#1
Y10 H_D#_35 H_ADSTB#_1 G17 H_ADSTB#1 7
R76 1 2 16.9_0402_1% H_RCOMP H_D#36 Y12 A9 H_BNR# H_BNR# 7
H_D#_36 H_BNR#
HOST
H_D#37 Y14 F11 H_BPRI#
H_D#38 H_D#_37 H_BPRI# H_BR0# H_BPRI# 7
Qual core H_D#39
Y7 H_D#_38 H_BREQ# G12
H_DEFER#
H_BR0# 7
W2 H_D#_39 H_DEFER# E9 H_DEFER# 7
H_D#40 AA8 B10 H_DBSY#
+1.05V_VCCP H_D#_40 H_DBSY# H_DBSY# 7
H_D#41 Y9 AH7 CLK_MCH_BCLK
H_D#_41 HPLL_CLK CLK_MCH_BCLK 6
H_D#42 AA13 AH6 CLK_MCH_BCLK# CLK_MCH_BCLK# 6
H_D#43 H_D#_42 HPLL_CLK# H_DPWR#
AA9 H_D#_43 H_DPW R# J11 H_DPWR# 8
H_D#44 AA11 F9 H_DRDY#
H_D#_44 H_DRDY# H_DRDY# 7
1
H_D#45 AD11 H9 H_HIT# H_HIT# 7

R77 H_D#46 H_D#_45 H_HIT# H_HITM#
AD10 H_D#_46 H_HITM# E12 H_HITM# 7
1K_0402_1% H_D#47 AD13 H11 H_LOCK#
H_D#_47 H_LOCK# H_LOCK# 7
H_D#48 AE12 C9 H_TRDY#
H_D#49 H_D#_48 H_TRDY# H_TRDY# 7
AE9
2
H_D#50 H_D#_49
AA2 H_D#_50
+H_VREF H_D#51 AD8
H_D#52 H_D#_51
AA3 H_D#_52
H_D#53 AD3 J8 H_DINV#0 H_DINV#0 8
H_D#_53 H_DINV#_0
1
1 H_D#54 AD7 L3 H_DINV#1 H_DINV#1 8

R78 H_D#55 H_D#_54 H_DINV#_1 H_DINV#2
AE14 H_D#_55 H_DINV#_2 Y13 H_DINV#2 8
@C69
@C69 2K_0402_1% H_D#56 AF3 Y1 H_DINV#3 H_DINV#3 8
0.1U_0402_16V4Z~D H_D#57 H_D#_56 H_DINV#_3
AC1 H_D#_57
2 H_D#58 H_DSTBN#0
AE3 L10 H_DSTBN#0 8
2
H_D#59 H_D#_58 H_DSTBN#_0 H_DSTBN#1

AC3 H_D#_59 H_DSTBN#_1 M7 H_DSTBN#1 8
B H_D#60 H_DSTBN#2 B
AE11 H_D#_60 H_DSTBN#_2 AA5 H_DSTBN#2 8
H_D#61 AE8 AE6 H_DSTBN#3 H_DSTBN#3 8
H_D#62 H_D#_61 H_DSTBN#_3
AG2 H_D#_62
H_D#63 AD6 L9 H_DSTBP#0 H_DSTBP#0 8
H_D#_63 H_DSTBP#_0 H_DSTBP#1
Within 100 mils from NB H_DSTBP#_1 M8
H_DSTBP#2
H_DSTBP#1 8
H_DSTBP#_2 AA6 H_DSTBP#2 8
H_SWNG C5 AE5 H_DSTBP#3 H_DSTBP#3 8
H_RCOMP H_SWING H_DSTBP#_3
E3 H_RCOMP
B15 H_REQ#0
H_REQ#_0 H_REQ#0 7
K13 H_REQ#1
H_REQ#_1 H_REQ#1 7
F13 H_REQ#2
H_REQ#_2 H_REQ#2 7
H_RCOMP Dual core 24.9 ohm_1% pull down B13 H_REQ#3
H_REQ#_3 H_REQ#3 7
7 H_RESET# H_RESET# C12 B14 H_REQ#4
H_CPURST# H_REQ#_4 H_REQ#4 7
Qual core 16.9 ohm_1% pull down 8 H_CPUSLP#
H_CPUSLP# E11 H_CPUSLP# H_RS#0
H_SWNG Dual core 100 ohm_1% pull down H_RS#_0 B6 H_RS#0 7
F12 H_RS#1
H_RS#_1 H_RS#1 7
Qual core 75 ohm_1% pull down A11 H_AVREF H_RS#_2 C8 H_RS#2
H_RS#2 7
+H_VREF B11 H_DVREF
CANTIGA ES_FCBGA1329
P/N : SA00002JT3L (S IC AC82GM45 SLB94 B3 FCBGA1329 GM )
A A
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Cantiga(1 of 7)
LA-5151P
5 4 3 2 1
5 4 3 2 1
U4B
M36 AP24 M_CLK_DDR0

T10
T11 N36
RSVD1 SA_CK_0
AT21 M_CLK_DDR1
M_CLK_DDR0 17 Compensation
RSVD2 SA_CK_1 M_CLK_DDR2 M_CLK_DDR1 17
T12 R33 RSVD3 SB_CK_0 AV24
M_CLK_DDR3
M_CLK_DDR2 18 DDR3
T20 T33 AU20 M_CLK_DDR3 18
RSVD4 SB_CK_1
COMPENSATION
T21 AH9 RSVD5
AH10 AR24 M_CLK_DDR#0 +1.5V
T22 RSVD6 SA_CK#_0 M_CLK_DDR#0 17
T23 AH12 AR21 M_CLK_DDR#1
RSVD7 SA_CK#_1 M_CLK_DDR#1 17
T13 AH13 AU24 M_CLK_DDR#2 SMRCOMP 2 1
RSVD8 SB_CK#_0 M_CLK_DDR#2 18
http://mycomp.su/x/
K12 AV20 M_CLK_DDR#3 R83 80.6_0402_1%
T24 RSVD9 SB_CK#_1 M_CLK_DDR#3 18
CFG AL34 SMRCOMP# 2 1
T14 RSVD10
AK34 BC28 DDR_CKE0_DIMMA R84 80.6_0402_1%
T25 RSVD11 SA_CKE_0 DDR_CKE0_DIMMA 17
AN35 AY28 DDR_CKE1_DIMMA
T15 RSVD12 SA_CKE_1 DDR_CKE1_DIMMA 17
@R79
@R79 1 2 2.21K_0402_1% CFG5 T26 AM35 AY36 DDR_CKE2_DIMMB
D RSVD13 SB_CKE_0 DDR_CKE3_DIMMB DDR_CKE2_DIMMB 18 D
T27 T24 RSVD14 SB_CKE_1 BB36 DDR_CKE3_DIMMB 18
@R85
@R85 1 2 2.21K_0402_1% CFG6
BA17 DDR_CS0_DIMMA#
CFG7 SA_CS#_0 DDR_CS1_DIMMA# DDR_CS0_DIMMA# 17
@R80
@R80 1 2 2.21K_0402_1% AY16 DDR3
SA_CS#_1 DDR_CS2_DIMMB# DDR_CS1_DIMMA# 17
T28 B31 AV16 DDR_CS2_DIMMB# 18
@R86
@R86 1 2.21K_0402_1% CFG9 RSVD15 SB_CS#_0 DDR_CS3_DIMMB#
2 T16 B2 AR13 DDR_CS3_DIMMB# 18
RSVD16 SB_CS#_1 +1.5V
DDR CLK/ CONTROL/

T17 M1 RSVD17
RSVD
@R81
@R81 1 2 2.21K_0402_1% CFG16 BD17 M_ODT0_DIMMA
SA_ODT_0 M_ODT0_DIMMA 17
AY17 M_ODT1_DIMMA
SA_ODT_1 M_ODT1_DIMMA 17
1
CFG[5:16] have internal pullup AY21 BF15 M_ODT2_DIMMB
T18 RSVD20 SB_ODT_O M_ODT2_DIMMB 18
AY13 M_ODT3_DIMMB R82
SB_ODT_1 M_ODT3_DIMMB 18
1K_0402_1%
BG22 SMRCOMP
SM_RCOMP SMRCOMP#
T29 BG23 BH21
2
RSVD22 SM_RCOMP# SMRCOMP_VOH
T19 BF23 RSVD23
+3VS
2.2U_0603_6.3V6K~D
0.01U_0402_16V7K~D
BH18 BF28 SMRCOMP_VOH
T30 RSVD24 SM_RCOMP_VOH +V_DDR_MCH_REF
BF18 BH28 SMRCOMP_VOL 1 1
T31 RSVD25 SM_RCOMP_VOL
@ R87 1 2 4.02K_0402_1% CFG19
1
C71
C70
SM_VREF AV42 +V_DDR_MCH_REF
@ R88 1 2 4.02K_0402_1% CFG20 AR36 SM_PWROK
SM_PWROK 2 2
0.1U_0402_16V4Z~D
BF17 R90 1 2 499_0402_1% R89
SM_REXT
CFG[19:20] have internal pulldown SM_DRAMRST# BC36 DDR3_DRAMRST# DDR3_DRAMRST# 17,18 1 3.01K_0402_1%
C72
2
DPLL_REF_CLK B38 CLK_MCH_DREFCLK 6
A38 2 SMRCOMP_VOL
DPLL_REF_CLK# CLK_MCH_DREFCLK# 6
2.2U_0603_6.3V6K~D
0.01U_0402_16V7K~D
E41
Strap Pin Table DPLL_REF_SSCLK MCH_SSCDREFCLK 6
1
DPLL_REF_SSCLK# F41 MCH_SSCDREFCLK# 6 1 1
R91
CLK
C73
C74
Low = DMI x 2 F43 CLK_MCH_3GPLL CLK_MCH_3GPLL 6 1K_0402_1%
PEG_CLK CLK_MCH_3GPLL#
CFG5 DMI X2 Select PEG_CLK#
E43 CLK_MCH_3GPLL# 6 2 2
High = DMI x 4 (Default)
2
C C
iTPM Host Low = iTPM enable

CFG6 AE41 DMI_MRX_ITX_N0
Interface High = iTPM disable(Defult)
DMI_RXN_0
AE37 DMI_MRX_ITX_N1 DMI_MRX_ITX_N0 22
DMI_RXN_1 DMI_MRX_ITX_N2 DMI_MRX_ITX_N1 22
AE47 DMI_MRX_ITX_N2 22
DMI_RXN_2 DMI_MRX_ITX_N3
Management Low = TLS cipher suite with no confidentiality DMI_RXN_3
AH39 DMI_MRX_ITX_N3 22
CFG7 Engine Crypto High = TLS cipher suite with AE40 DMI_MRX_ITX_P0
DMI_RXP_0 DMI_MRX_ITX_P0 22
Strap confidentiality(Default) 6 MCH_CLKSEL0
MCH_CLKSEL0 T25 CFG_0 DMI_RXP_1 AE38 DMI_MRX_ITX_P1
DMI_MRX_ITX_P1 22
MCH_CLKSEL1 R25 AE48 DMI_MRX_ITX_P2
6 MCH_CLKSEL1 MCH_CLKSEL2 CFG_1 DMI_RXP_2 DMI_MRX_ITX_P3 DMI_MRX_ITX_P2 22 +3VALW
PCI Express Low = Reverse Lane 6 MCH_CLKSEL2 P25
CFG_2 DMI_RXP_3
AH40 DMI_MRX_ITX_P3 22 Use for DDR3 signls,
CFG9 MCH_CFG3 P20
Graphic Lane T32
MCH_CFG4 CFG_3 DMI_MTX_IRX_N0 if support DDR2 need
High = Normal Operation(Default) T33 P24 CFG_4 DMI_TXN_0 AE35 DMI_MTX_IRX_N0 22 connect to GND
CFG5 C25 DMI_MTX_IRX_N1 C75 2 0.1U_0402_16V4Z~D
DMI
AE43 DMI_MTX_IRX_N1 22 1
CFG6 CFG_5 DMI_TXN_1 DMI_MTX_IRX_N2
N24 CFG_6 DMI_TXN_2 AE46 DMI_MTX_IRX_N2 22
FSB Dynamic Low=Dynamic ODT Disable CFG7 M24 AH42 DMI_MTX_IRX_N3 U5
CFG_7 DMI_TXN_3 DMI_MTX_IRX_N3 22
5
CFG
CFG16 T34 MCH_CFG8 E21 R92 74AHC1G08GW_SOT353-5~D
ODT High=Dynamic ODT Enable(default) CFG9 C23
CFG_8
AD35 DMI_MTX_IRX_P0 12K_0402_1% 1
P
MCH_CFG10 CFG_9 DMI_TXP_0 DMI_MTX_IRX_P1 DMI_MTX_IRX_P0 22 SM_PWROK IN1 1.5V_PGOOD 49
T35 C24 AE44 DMI_MTX_IRX_P1 22 1 2 4
CFG_10 DMI_TXP_1 DMI_MTX_IRX_P2 O
CFG19 DMI Lane Low=Normal (default) T36 N21 AF46 DMI_MTX_IRX_P2 22 2 R94 2 @ 1 0_0402_5% SLP_S4# 21,31
CFG_11 DMI_TXP_2 IN2
G
1
MCH_CFG12 P21 AH43 DMI_MTX_IRX_P3
Reversal T37 CFG_12 DMI_TXP_3 DMI_MTX_IRX_P3 22
High=Lane Reversed MCH_CFG13 T21 R93
T38
3
CFG_13 10K_0402_5%
T39 R20
MCH_CFG15 CFG_14
Low=Only digital display port (SDVO/DP/iHDMI) or T40 M20 CFG_15 R10 Moidify (short directly)
Digital Display CFG16 L21
PCIe is operational (default)
2
CFG_16
CFG20 Port T41 H21
CFG_17
High = Digital display port (SDVO/DP/iHDMI) and MCH_CFG18 P29
GRAPHICS VID
T42 CFG_18
Concurrent PCIe are operating simultaneously via the PEG
CFG19 R28
CFG_19 Follow MiniCooper
CFG20 T28 B33 GFX_VID0
Operation port CFG_20 GFX_VID_0
B32 GFX_VID1
T43
GFX_VID_1 T44
G33 GFX_VID2
GFX_VID_2 T45
SDVO_CRTL_DATA Low=No SDVO Device Present F33 GFX_VID3 T46
B PM_SYNC# GFX_VID_3 GFX_VID4 B
R29 E33 T47
(default) 21 PM_SYNC#
H_DPRSTP# B7
PM_SYNC# GFX_VID_4
8,19,51 H_DPRSTP# PM_EXTTS#0 PM_DPRSTP#
High=SDVO Device Present 17 PM_EXTTS#0 N33
PM_EXT_TS#_0
PM
PM_EXTTS#1 P32
18 PM_EXTTS#1 PM_EXT_TS#_1
Low=DisplayPort disabled (default) PM_PWROK_R AT40 C34 GFX_VR_ON T48
PLT_RST#_NB PWROK GFX_VR_EN
DDPC_CTRLDATA AT11 RSTIN# +1.05V_VCCP
High=DisplayPort device present 7,19 H_THERMTRIP# H_THERMTRIP# T20
DPRSLPVR THERMTRIP#
21,51 DPRSLPVR R32
DPRSLPVR
1
BG48 AH37 CL_CLK0 R95
NC_1 CL_CLK CL_DATA0 CL_CLK0 21
PM BF48 AH36 1K_0402_1%
NC_2 CL_DATA CL_DATA0 21
ME
BD48 AN36 M_PWROK
NC_3 CL_PWROK CL_RST# M_PWROK 21
BC48 AJ35
2
NC_4 CL_RST# +CL_VREF CL_RST# 21
BH47 NC_5 CL_VREF AH34
R96 2 1 10K_0402_5% PM_EXTTS#0 BG47
+3VS NC_6
BE47
NC_7
2
R97 2 1 10K_0402_5% PM_EXTTS#1 BH46 N28 1
+3VS NC_8 DDPC_CTRLCLK
NC
BF46 M28 R98

NC_9 DDPC_CTRLDATA C76 511_0402_1%
BG45 G36
NC_10 SDVO_CTRLCLK SDVO_CTRLDATA 0.1U_0402_16V4Z~D
R10 Moidify (short directly) BH44 NC_11 SDVO_CTRLDATA E36
MCH_CLKREQ#
T49 2
BH43 K36 MCH_CLKREQ# 6
1
NC_12 CLKREQ#
MISC
R99 2 @ 1 0_0402_5% PM_PWROK_R BH6 H36 MCH_ICH_SYNC#

21,31 ICH_PWROK NC_13 ICH_SYNC# MCH_ICH_SYNC# 21
BH5 NC_14
R100 2 @ 1 0_0402_5% BG4
21,31,51 VGATE NC_15
BH3 B12 MCH_TSATN# R101 1 2 56_0402_5% +1.05V_VCCP
NC_16 TSATN#
BF3 NC_17
R102 2 1 100_0402_5% PLT_RST#_NB BH2
20,27,30,31,38 PLT_RST# NC_18
BG2 NC_19
BE2 NC_20 HDA_BCLK B28
BG1 B30
NC_21 HDA_RST#
BF1 NC_22 HDA_SDI B29
A A
BD1 NC_23 HDA_SDO C29
@C957
@ C957 1 2 0.1U_0402_16V4Z~D H_DPRSTP# BC1 A28
HDA
NC_24 HDA_SYNC
F1 NC_25
Reserve for CPU, reference HPB A47 NC_26
LA-5151P
5 4 3 2 1
5 4 3 2 1
http://mycomp.su/x/
D D
+VCC_PEG
Place the resistor within 500mils of the GMCH
PEGCOMP trace widht and spacing is 20/25 mils.
2
R108
U4C 49.9_0402_1%
L32
1
T97 L_BKLT_CTRL PEGCOMP
G32 L_BKLT_EN PEG_COMPI T37
M32 T36
L_CTRL_CLK PEG_COMPO
M33 L_CTRL_DATA
K33 L_DDC_CLK PCIE_MRX_GTX_N[0..15] 38
J33 H44 PCIE_MRX_GTX_N0 PCE-Express Graphics
L_DDC_DATA PEG_RX#_0 PCIE_MRX_GTX_N1
M29 L_VDD_EN PEG_RX#_1 J46
L44 PCIE_MRX_GTX_N2 PCIE_MTX_C_GRX_P[0..15]
PEG_RX#_2 PCIE_MRX_GTX_N3 PCIE_MTX_C_GRX_P[0..15] 38
C44 L40
LVDS_IBG PEG_RX#_3 PCIE_MRX_GTX_N4 PCIE_MTX_C_GRX_N[0..15]
B43 LVDS_VBG PEG_RX#_4 N41 PCIE_MTX_C_GRX_N[0..15] 38
E37 P48 PCIE_MRX_GTX_N5
LVDS_VREFH PEG_RX#_5 PCIE_MRX_GTX_N6
E38 N44
LVDS_VREFL PEG_RX#_6 PCIE_MRX_GTX_N7 PCIE_MTX_GRX_P0 C77 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_P0
PEG_RX#_7 T43 2 1
C41 U43 PCIE_MRX_GTX_N8 PCIE_MTX_GRX_N0 C78 2 1 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_N0
LVDSA_CLK# PEG_RX#_8 PCIE_MRX_GTX_N9
C40 Y43
LVDSA_CLK PEG_RX#_9 PCIE_MRX_GTX_N10 PCIE_MTX_GRX_P1 C79 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_P1
B37 LVDSB_CLK# PEG_RX#_10 Y48 2 1
A37 Y36 PCIE_MRX_GTX_N11 PCIE_MTX_GRX_N1 C80 2 1 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_N1
LVDSB_CLK PEG_RX#_11
LVDS
AA43 PCIE_MRX_GTX_N12
PEG_RX#_12 PCIE_MRX_GTX_N13 PCIE_MTX_GRX_P2 C81 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_P2
H47 LVDSA_DATA#_0 PEG_RX#_13 AD37 2 1
E46 AC47 PCIE_MRX_GTX_N14 PCIE_MTX_GRX_N2 C82 2 1 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_N2
LVDSA_DATA#_1 PEG_RX#_14 PCIE_MRX_GTX_N15
G40 AD39 PCIE_MRX_GTX_P[0..15] 38
C LVDSA_DATA#_2 PEG_RX#_15 PCIE_MTX_GRX_P3 C83 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_P3 C
A40 LVDSA_DATA#_3 2 1
H43 PCIE_MRX_GTX_P0 PCIE_MTX_GRX_N3 C84 2 1 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_N3
PEG_RX_0 PCIE_MRX_GTX_P1
H48 J44
LVDSA_DATA_0 PEG_RX_1 PCIE_MRX_GTX_P2 PCIE_MTX_GRX_P4 C85 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_P4
D45 LVDSA_DATA_1 PEG_RX_2 L43 2 1
F40 L41 PCIE_MRX_GTX_P3 PCIE_MTX_GRX_N4 C86 2 1 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_N4
GRAPHICS
LVDSA_DATA_2 PEG_RX_3 PCIE_MRX_GTX_P4
B40 N40
LVDSA_DATA_3 PEG_RX_4 PCIE_MRX_GTX_P5 PCIE_MTX_GRX_P5 C87 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_P5
PEG_RX_5 P47 2 1
A41 N43 PCIE_MRX_GTX_P6 PCIE_MTX_GRX_N5 C88 2 1 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_N5
LVDSB_DATA#_0 PEG_RX_6 PCIE_MRX_GTX_P7
H38 LVDSB_DATA#_1 PEG_RX_7 T42
G37 U42 PCIE_MRX_GTX_P8 PCIE_MTX_GRX_P6 C89 2 1 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_P6
LVDSB_DATA#_2 PEG_RX_8 PCIE_MRX_GTX_P9 PCIE_MTX_GRX_N6 C90 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_N6
J37 Y42 2 1
LVDSB_DATA#_3 PEG_RX_9 PCIE_MRX_GTX_P10
PEG_RX_10 W47
B42 Y37 PCIE_MRX_GTX_P11 PCIE_MTX_GRX_P7 C91 2 1 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_P7
LVDSB_DATA_0 PEG_RX_11 PCIE_MRX_GTX_P12 PCIE_MTX_GRX_N7 C92 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_N7
G38 AA42 2 1
LVDSB_DATA_1 PEG_RX_12 PCIE_MRX_GTX_P13
F37 LVDSB_DATA_2 PEG_RX_13 AD36
K37 AC48 PCIE_MRX_GTX_P14 PCIE_MTX_GRX_P8 C93 1 2 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_P8
LVDSB_DATA_3 PCI-EXPRESS PEG_RX_14 PCIE_MRX_GTX_P15 PCIE_MTX_GRX_N8 C94 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_N8
AD40 1 2
PEG_RX_15
J41 PCIE_MTX_GRX_N0 PCIE_MTX_GRX_P9 C95 1 2 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_P9
PEG_TX#_0 PCIE_MTX_GRX_N1 PCIE_MTX_GRX_N9 C96 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_N9
M46 1 2
PEG_TX#_1
R1000 1 2 75_0402_1% TVA_DAC F25 TVA_DAC PEG_TX#_2 M47 PCIE_MTX_GRX_N2
R1001 1 2 75_0402_1% TVB_DAC H25 M40 PCIE_MTX_GRX_N3 PCIE_MTX_GRX_P10 C97 1 2 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_P10
TVB_DAC PEG_TX#_3
R1002 1 2 75_0402_1% TVC_DAC K25 M42 PCIE_MTX_GRX_N4 PCIE_MTX_GRX_N10 C98 1 2 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_N10
TVC_DAC PEG_TX#_4 PCIE_MTX_GRX_N5
PEG_TX#_5 R48
TV
H24 N38 PCIE_MTX_GRX_N6 PCIE_MTX_GRX_P11 C99 1 2 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_P11

TV_RTN PEG_TX#_6 PCIE_MTX_GRX_N7 PCIE_MTX_GRX_N11 C100 1 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_N11
T40 2
PEG_TX#_7 PCIE_MTX_GRX_N8
PEG_TX#_8 U37
U40 PCIE_MTX_GRX_N9 PCIE_MTX_GRX_P12 C101 1 2 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_P12
PEG_TX#_9 PCIE_MTX_GRX_N10 PCIE_MTX_GRX_N12 C102 1 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_N12
C31 Y40 2
TV_DCONSEL_0 PEG_TX#_10 PCIE_MTX_GRX_N11
E32 TV_DCONSEL_1 PEG_TX#_11 AA46
AA37 PCIE_MTX_GRX_N12 PCIE_MTX_GRX_P13 C103 1 2 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_P13
PEG_TX#_12 PCIE_MTX_GRX_N13 PCIE_MTX_GRX_N13 C104 1 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_N13
AA40 2
B PEG_TX#_13 PCIE_MTX_GRX_N14 B
PEG_TX#_14 AD43
AC46 PCIE_MTX_GRX_N15 PCIE_MTX_GRX_P14 C105 1 2 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_P14
PEG_TX#_15 PCIE_MTX_GRX_N14 C106 1 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_N14
2
E28 J42 PCIE_MTX_GRX_P0
CRT_BLUE PEG_TX_0 PCIE_MTX_GRX_P1 PCIE_MTX_GRX_P15 C107 1 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_P15
L46 2
PEG_TX_1 PCIE_MTX_GRX_P2 PCIE_MTX_GRX_N15 C108 1 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_N15
G28 CRT_GREEN PEG_TX_2 M48 2
M39 PCIE_MTX_GRX_P3
PEG_TX_3
VGA
J28 M43 PCIE_MTX_GRX_P4

CRT_RED PEG_TX_4 PCIE_MTX_GRX_P5
PEG_TX_5 R47
G29 N37 PCIE_MTX_GRX_P6
CRT_IRTN PEG_TX_6 PCIE_MTX_GRX_P7
T39
PEG_TX_7 PCIE_MTX_GRX_P8
H32 CRT_DDC_CLK PEG_TX_8 U36
J32 U39 PCIE_MTX_GRX_P9
CRT_DDC_DATA PEG_TX_9 PCIE_MTX_GRX_P10
J29 Y39
CRT_HSYNC PEG_TX_10 PCIE_MTX_GRX_P11
E29 CRT_TVO_IREF PEG_TX_11 Y46
AA36 PCIE_MTX_GRX_P12
AA39
L29 CRT_VSYNC PEG_TX_14 AD42
AD46 PCIE_MTX_GRX_P15
PEG_TX_15
A A
LA-5151P
5 4 3 2 1
5 4 3 2 1
http://mycomp.su/x/
D D
17 DDR_A_D[0..63]
U4D
DDR_A_D0 18 DDR_B_D[0..63]
AJ38 BD21 DDR_A_BS0 DDR_A_BS0 17
U4E
DDR_A_D1 SA_DQ_0 SA_BS_0
AJ41 SA_DQ_1 SA_BS_1 BG18 DDR_A_BS1 DDR_A_BS1 17
DDR_B_D0 AK47 SB_DQ_0 SB_BS_0 BC16 DDR_B_BS0
DDR_B_BS0 18
DDR_A_D2 AN38 AT25 DDR_A_BS2 DDR_B_D1 AH46 BB17 DDR_B_BS1
SA_DQ_2 SA_BS_2 DDR_A_BS2 17 SB_DQ_1 SB_BS_1 DDR_B_BS1 18
DDR_A_D3 AM38 DDR_B_D2 AP47 BB33 DDR_B_BS2
DDR_A_D4 SA_DQ_3 SB_DQ_2 SB_BS_2 DDR_B_BS2 18
AJ36 SA_DQ_4 SA_RAS# BB20 DDR_A_RAS# DDR_A_RAS# 17
DDR_B_D3 AP46 SB_DQ_3
DDR_A_D5 AJ40 BD20 DDR_A_CAS# DDR_B_D4 AJ46
DDR_A_D6 SA_DQ_5 SA_CAS# DDR_A_CAS# 17 SB_DQ_4
AM44 SA_DQ_6 SA_WE# AY20 DDR_A_WE# DDR_A_W E# 17
DDR_B_D5 AJ48 SB_DQ_5 SB_RAS# AU17 DDR_B_RAS#
DDR_B_RAS# 18
DDR_A_D7 AM42 DDR_B_D6 AM48 BG16 DDR_B_CAS#
SA_DQ_7 SB_DQ_6 SB_CAS# DDR_B_CAS# 18
DDR_A_D8 AN43 DDR_B_D7 AP48 BF14 DDR_B_WE#
DDR_A_D9 SA_DQ_8 DDR_B_D8 SB_DQ_7 SB_WE# DDR_B_W E# 18
AN44 SA_DQ_9 AU47 SB_DQ_8
DDR_A_D10 AU40 DDR_B_D9 AU46
DDR_A_D11 SA_DQ_10 DDR_B_D10 SB_DQ_9
AT38 DDR_A_DM[0..7] 17 BA48
AN41 SA_DQ_12 AY48 SB_DQ_11
DDR_A_D13 AN39 AM37 DDR_A_DM0 DDR_B_D12 AT47
DDR_A_D14 SA_DQ_13 SA_DM_0 DDR_A_DM1 DDR_B_D13 SB_DQ_12
AU44 AT41 AR47 DDR_B_DM[0..7] 18
DDR_A_D15 SA_DQ_14 SA_DM_1 DDR_A_DM2 DDR_B_D14 SB_DQ_13
AU42 SA_DQ_15 SA_DM_2 AY41 BA47 SB_DQ_14
DDR_A_D16 AV39 AU39 DDR_A_DM3 DDR_B_D15 BC47 AM47 DDR_B_DM0
DDR_A_D17 SA_DQ_16 SA_DM_3 DDR_A_DM4 DDR_B_D16 SB_DQ_15 SB_DM_0 DDR_B_DM1
AY44 BB12 BC46 AY47
BA40 SA_DQ_18 SA_DM_5 AY6 BC44 SB_DQ_17 SB_DM_2 BD40
DDR_A_D19 BD43 AT7 DDR_A_DM6 DDR_B_D18 BG43 BF35 DDR_B_DM3
AV41 AJ5 BF43 BG11
C DDR_A_D21 SA_DQ_20 SA_DM_7 DDR_B_D20 SB_DQ_19 SB_DM_4 DDR_B_DM5 C
AY43 SA_DQ_21 BE45 SB_DQ_20 SB_DM_5 BA3
DDR_A_D22 DDR_B_D21 DDR_B_DM6
A
BB41 DDR_A_DQS[0..7] 17 BC41 AP1
SA_DQ_22 SB_DQ_21 SB_DM_6
B
DDR_A_D23 BC40 AJ44 DDR_A_DQS0 DDR_B_D22 BF40 AK2 DDR_B_DM7
DDR_A_D24 SA_DQ_23 SA_DQS_0 DDR_A_DQS1 DDR_B_D23 SB_DQ_22 SB_DM_7
AY37 SA_DQ_24 SA_DQS_1 AT44 BF41 SB_DQ_23
DDR_A_D25 BD38 BA43 DDR_A_DQS2 DDR_B_D24 BG38
DDR_A_D26 SA_DQ_25 SA_DQS_2 DDR_A_DQS3 DDR_B_D25 SB_DQ_24 DDR_B_DQS0 DDR_B_DQS[0..7] 18
AV37 BC37 BF38 AL47
MEMORY
DDR_A_D27 SA_DQ_26 SA_DQS_3 DDR_A_DQS4 DDR_B_D26 SB_DQ_25 SB_DQS_0 DDR_B_DQS1
MEMORY
AT36 SA_DQ_27 SA_DQS_4 AW12 BH35 SB_DQ_26 SB_DQS_1 AV48
DDR_A_D28 AY38 BC8 DDR_A_DQS5 DDR_B_D27 BG35 BG41 DDR_B_DQS2
DDR_A_D29 SA_DQ_28 SA_DQS_5 DDR_A_DQS6 DDR_B_D28 SB_DQ_27 SB_DQS_2 DDR_B_DQS3
BB38 SA_DQ_29 SA_DQS_6 AU8 BH40 SB_DQ_28 SB_DQS_3 BG37
DDR_A_D30 AV36 AM7 DDR_A_DQS7 DDR_B_D29 BG39 BH9 DDR_B_DQS4
DDR_A_D31 SA_DQ_30 SA_DQS_7 DDR_B_D30 SB_DQ_29 SB_DQS_4 DDR_B_DQS5
AW36 BG34 BB2
DDR_A_D32 SA_DQ_31 DDR_B_D31 SB_DQ_30 SB_DQS_5 DDR_B_DQS6
BD13 SA_DQ_32 DDR_A_DQS#[0..7] 17 BH34 SB_DQ_31 SB_DQS_6 AU1
DDR_A_D33 AU11 AJ43 DDR_A_DQS#0 DDR_B_D32 BH14 AN6 DDR_B_DQS7
DDR_A_D34 SA_DQ_33 SA_DQS#_0 DDR_A_DQS#1 DDR_B_D33 SB_DQ_32 SB_DQS_7
BC11 AT43 BG12
DDR_A_D35 SA_DQ_34 SA_DQS#_1 DDR_A_DQS#2 DDR_B_D34 SB_DQ_33
BA12 SA_DQ_35 SA_DQS#_2 BA44 BH11 SB_DQ_34 DDR_B_DQS#[0..7] 18
DDR_A_D36 DDR_A_DQS#3 DDR_B_D35 DDR_B_DQS#0
SYSTEM
AU13 SA_DQ_36 SA_DQS#_3 BD37 BG8 SB_DQ_35 SB_DQS#_0 AL46
SYSTEM
DDR_A_D37 AV13 AY12 DDR_A_DQS#4 DDR_B_D36 BH12 AV47 DDR_B_DQS#1
DDR_A_D38 SA_DQ_37 SA_DQS#_4 DDR_A_DQS#5 DDR_B_D37 SB_DQ_36 SB_DQS#_1 DDR_B_DQS#2
BD12 SA_DQ_38 SA_DQS#_5 BD8 BF11 SB_DQ_37 SB_DQS#_2 BH41
DDR_A_D39 BC12 AU9 DDR_A_DQS#6 DDR_B_D38 BF8 BH37 DDR_B_DQS#3
DDR_A_D40 SA_DQ_39 SA_DQS#_6 DDR_A_DQS#7 DDR_B_D39 SB_DQ_38 SB_DQS#_3 DDR_B_DQS#4
BB9 AM8 BG7 BG9
DDR_A_D41 SA_DQ_40 SA_DQS#_7 DDR_B_D40 SB_DQ_39 SB_DQS#_4 DDR_B_DQS#5
BA9 SA_DQ_41 BC5 SB_DQ_40 SB_DQS#_5 BC2
DDR_A_D42 AU10 DDR_B_D41 BC6 AT2 DDR_B_DQS#6
SA_DQ_42 DDR_A_MA[0..14] 17 SB_DQ_41 SB_DQS#_6
DDR_A_D43 AV9 DDR_B_D42 AY3 AN5 DDR_B_DQS#7
DDR_A_D44 SA_DQ_43 DDR_A_MA0 DDR_B_D43 SB_DQ_42 SB_DQS#_7
BA11 SA_DQ_44 SA_MA_0 BA21 AY1 SB_DQ_43 DDR_B_MA[0..14] 18
DDR_A_D45 BD9 BC24 DDR_A_MA1 DDR_B_D44 BF6
SA_DQ_45 SA_MA_1 SB_DQ_44
DDR
DDR_A_D46 AY8 BG24 DDR_A_MA2 DDR_B_D45 BF5 AV17 DDR_B_MA0
DDR
DDR_A_D47 SA_DQ_46 SA_MA_2 DDR_A_MA3 DDR_B_D46 SB_DQ_45 SB_MA_0 DDR_B_MA1
BA6 SA_DQ_47 SA_MA_3 BH24 BA1 SB_DQ_46 SB_MA_1 BA25
DDR_A_D48 AV5 BG25 DDR_A_MA4 DDR_B_D47 BD3 BC25 DDR_B_MA2
AV7 BA24 AV2 AU25
AT9 SA_DQ_50 SA_MA_6 BD24 AU3 SB_DQ_49 SB_MA_4 AW25
DDR_A_D51 AN8 BG27 DDR_A_MA7 DDR_B_D50 AR3 BB28 DDR_B_MA5
AU5 BF25 AN2 AU28
B DDR_A_D53 SA_DQ_52 SA_MA_8 DDR_A_MA9 DDR_B_D52 SB_DQ_51 SB_MA_6 DDR_B_MA7 B
AU6 SA_DQ_53 SA_MA_9 AW24 AY2 SB_DQ_52 SB_MA_7 AW28
DDR_A_D54 AT5 BC21 DDR_A_MA10 DDR_B_D53 AV1 AT33 DDR_B_MA8
AN10 BG26 AP3 BD33
AM11 SA_DQ_56 SA_MA_12 BH26 AR1 SB_DQ_55 SB_MA_10 BB16
DDR_A_D57 AM5 BH17 DDR_A_MA13 DDR_B_D56 AL1 AW33 DDR_B_MA11
AJ9 SA_DQ_58 SA_MA_14 AY25 AL2 SB_DQ_57 SB_MA_12 AY33
DDR_A_D59 AJ8 DDR_B_D58 AJ1 BH15 DDR_B_MA13
DDR_A_D60 SA_DQ_59 DDR_B_D59 SB_DQ_58 SB_MA_13 DDR_B_MA14
AN12 AH1 AU33
DDR_A_D61 SA_DQ_60 DDR_B_D60 SB_DQ_59 SB_MA_14
AM13 SA_DQ_61 AM2 SB_DQ_60
DDR_A_D62 AJ11 DDR_B_D61 AM3
AJ12 AH3
SA_DQ_63 DDR_B_D63 SB_DQ_62
AJ3 SB_DQ_63
A A
LA-5151P
5 4 3 2 1
5 4 3 2 1
U4F
+AXG_CORE
1067M 4140mA VCC_AXG_NTCF_1 W28

DDR3 800M 3162mA AP33
VCC_SM_1 VCC_AXG_NCTF_2
V28
AN33 W26
22U_0805_6.3V6M~D
0.47U_0402_10V4Z~D
http://mycomp.su/x/
0.1U_0402_10V7K~D
1U_0603_10V6K~D
+1.5V BH32 VCC_SM_3 VCC_AXG_NCTF_4 V26
BG32 W25 1 1 1 1
330U_D2E_2.5VM_R9~D
C109
22U_0805_6.3V6M~D
C110
22U_0805_6.3V6M~D
C114
0.01U_0402_16V7K~D
C115
BF32 VCC_SM_5 VCC_AXG_NCTF_6 V25 @ @ @ @ Extnal Graphic: 3060mA
C1503
C111
C1502
C1506
1 BD32 VCC_SM_6 VCC_AXG_NCTF_7 W24 integrated Graphic: 2898mA
BC32 V24 +1.05V_VCCP
1 1 2 VCC_SM_7 VCC_AXG_NCTF_8 2 2 2 2
D + BB32 W23 U4G D
VCC
BA32 VCC_SM_9 VCC_AXG_NCTF_10 V23
AY32 AM21 AG34
2 2 2 1 VCC_SM_10 VCC_AXG_NCTF_11 VCC_1
AW32 VCC_SM_11 VCC_AXG_NCTF_12 AL21 AC34 VCC_2
AV32 AK21 AB34
VCC_SM_12 VCC_AXG_NCTF_13 VCC_3
AU32 W21 AA34
AT32 V21 Y34
SM
AR32 U21 Layout Note: V34
VCC CORE
AP32 AM20 Inside GMCH U34
AN32 VCC_SM_17 VCC_AXG_NCTF_18 AK20 AM33 VCC_8
BH31 W20 AK33
BG31 U20 AJ33
BF31 VCC_SM_20 VCC_AXG_NCTF_21 AM19 AG33 VCC_11
BG30 AL19 AF33
BH29 VCC_SM_22 VCC_AXG_NCTF_23 AK19
330U_D2_2.5VY_R15M~D
330U_D2_2.5VY_R15M~D
BG29 VCC_SM_23 VCC_AXG_NCTF_24 AJ19
BF29 AH19 1 1
@ C1500
@ C1501
BD29 VCC_SM_25 VCC_AXG_NCTF_26 AG19 AE33 VCC_13
BC29 AF19 + + AC33
BB29 AE19 AA33
220U_D2_4VY_R15M~D
C116
10U_0805_10V4Z~D
C117
0.22U_0402_10V4Z~D
C118
0.22U_0402_10V4Z~D
C119
0.1U_0402_16V4Z~D
C120
BA29 VCC_SM_28 VCC_AXG_NCTF_29 AB19 1 Y33 VCC_16
AY29 AA19 2 2 W33
VCC_SM_29 VCC_AXG_NCTF_30 1 1 1 1 VCC_17
AW29 Y19 + V33
POWER
GFX NCTF
AV29 VCC_SM_31 VCC_AXG_NCTF_32 W19 U33 VCC_19
AU29 VCC_SM_32 VCC_AXG_NCTF_33 V19 AH28 VCC_20
AT29 U19 2 2 2 2 2 AF28
AR29 VCC_SM_34 VCC_AXG_NCTF_35 AM17 AC28 VCC_22
AP29 VCC_SM_35 VCC_AXG_NCTF_36 AK17 AA28 VCC_23
AH17 AJ26
VCC_AXG_NCTF_37 VCC_24
VCC_AXG_NCTF_38 AG17 AG26 VCC_25
+1.05V_VCCP +AXG_CORE AF17 Layout Note: AE26
VCC_AXG_NCTF_39 VCC_26
BA36 AE17 AC26
C @J1
@ J1 VCC_SM_36/NC VCC_AXG_NCTF_40 VCC_27 +1.05V_VCCP C
BB24 VCC_SM_37/NC VCC_AXG_NCTF_41 AC17 Place close to GMCH AH25 VCC_28
VCC
1 2 BD16 AB17 AG25
1 2 VCC_SM_38/NC VCC_AXG_NCTF_42 VCC_29
BB21 Y17 AF25
VCC_SM_39/NC VCC_AXG_NCTF_43 VCC_30
JUMP_43X118 AW16 VCC_SM_40/NC VCC_AXG_NCTF_44 W17 AG24 VCC_31 VCC_NCTF_1 AM32
AW13 V17 AJ23 AL32
VCC_SM_41/NC VCC_AXG_NCTF_45 VCC_32 VCC_NCTF_2
AT13 AM16 AH23 AK32
@J2
@ J2 VCC_SM_42/NC VCC_AXG_NCTF_46 VCC_33 VCC_NCTF_3
VCC_AXG_NCTF_47 AL16 AF23 VCC_34 VCC_NCTF_4 AJ32
1 2 AK16 T32 AH32
1 2 VCC_AXG_NCTF_48 VCC_35 VCC_NCTF_5
POWER
VCC_AXG_NCTF_49 AJ16 VCC_NCTF_6 AG32
VCC_AXG_NCTF_50 AH16 VCC_NCTF_7 AE32
JUMP_43X118 +AXG_CORE AG16 AC32
VCC_AXG_NCTF_51 VCC_NCTF_8
VCC_AXG_NCTF_52 AF16 VCC_NCTF_9 AA32
Y26 VCC_AXG_1 VCC_AXG_NCTF_53 AE16 VCC_NCTF_10 Y32
AE25 AC16 W32
VCC_AXG_2 VCC_AXG_NCTF_54 VCC_NCTF_11
1U_0603_10V6K~D
10U_0805_10V4Z~D
10U_0805_10V4Z~D
0.1U_0402_10V7K~D
AB25 VCC_AXG_3 VCC_AXG_NCTF_55 AB16 VCC_NCTF_12 U32

1 1 1 1 AA25 VCC_AXG_4 VCC_AXG_NCTF_56 AA16 VCC_NCTF_13 AM30
@ AE24 Y16 AL30
C121
C123
C124
C125
AC24 VCC_AXG_6 VCC_AXG_NCTF_58 W16 VCC_NCTF_15 AK30

AA24 V16 AH30
2 2 2 2 VCC_AXG_7 VCC_AXG_NCTF_59 VCC_NCTF_16
Y24 U16 AG30
AE23 VCC_AXG_9 VCC_NCTF_18 AF30
AC23 AE30
VCC_AXG_10 VCC_NCTF_19
AB23 AC30
NCTF
AA23 VCC_AXG_12 VCC_NCTF_21 AB30
AJ21 AA30
AG21 Y30
AE21 VCC_AXG_15 VCC_NCTF_24 W30
AC21 V30
AA21 U30
VCC
Y21 VCC_AXG_18 VCC_NCTF_27 AL29
VCC
AH20 AK29
AF20 AJ29
B VCC_AXG_20 VCC_NCTF_29 B
AE20 VCC_AXG_21 VCC_NCTF_30 AH29
AC20 AG29
AB20 AE29
AA20 AC29
GFX
T17 AA29
T16 VCC_AXG_26 VCC_NCTF_35 Y29
AM15 VCC_AXG_27 VCC_NCTF_36 W29
AL15 V29
AE15 VCC_AXG_29 VCC_NCTF_38 AL28
AJ15 VCC_AXG_30 VCC_NCTF_39 AK28
AH15 AL26
AG15 VCC_AXG_32 VCC_NCTF_41 AK26
AF15 VCC_AXG_33 VCC_NCTF_42 AK25
AB15 AK24
AA15 VCC_AXG_35 VCC_NCTF_44 AK23
Y15
VCC_AXG_36
V15
VCC_AXG_37
U15 VCC_AXG_38
AN14
VCC_AXG_39
AM14
VCC_AXG_40
U14 AV44 VCCSM_LF1
VCC SM LF
VCC_AXG_41 VCC_SM_LF1
T14 BA37 VCCSM_LF2
VCC_AXG_42 VCC_SM_LF2
AM40 VCCSM_LF3
VCC_SM_LF3
VCC_SM_LF4 AV21 VCCSM_LF4
AY5 VCCSM_LF5 CANTIGA ES_FCBGA1329
VCC_SM_LF5
PAD T53 AJ14 VCC_AXG_SENSE VCC_SM_LF6 AM10 VCCSM_LF6
PAD T54 AH14 VSS_AXG_SENSE VCC_SM_LF7 BB13 VCCSM_LF7
C126 0.1U_0402_16V4Z~D
C127 0.1U_0402_16V4Z~D
C128
C129
C130
C131
C132
1 1 1 1 1 1 1
2 2 2 2 2 2 2
0.22U_0402_10V4Z~D
0.22U_0402_10V4Z~D
0.47U_0402_10V4Z~D
1U_0402_6.3V4Z~D
1U_0402_6.3V4Z~D
A A
LA-5151P
5 4 3 2 1
5 4 3 2 1
Place close to U4.F47

+1.05V_VCCP R119 +1.05V_M_HPLL
0_0603_5%
64.8mA Max. 1 2 U4H +1.05V_VCCP
1 1
+1.05V_M_DPLLA
4.7U_0603_6.3V6M~D
0.1U_0402_16V4Z~D
+1.05V_VCCP 852mA
C133
C134
L1500 U13
VTT_1
http://mycomp.su/x/
1 2 B27 VCCA_CRT_DAC_1 VTT_2 T13
2 2
4.7U_0603_6.3V6M~D
C138
220U_D2_4VY_R15M~D
C139
0.1U_0402_10V7K~D
10UH_LB2012T100MR_20%_0805~D A26 U12
220U_D2_4VY_R15M~D
VCCA_CRT_DAC_2 VTT_3 1
1 VTT_4 T12 1
U11 +
1 VTT_5
+ T11
VTT_6
C1504
C1505
D D
CRT
A25 VCCA_DAC_BG VTT_7 U10
T10 2 2
2 2 VTT_8
B25 U9
+1.05V_VCCP L2 +1.05V_M_MPLL VSSA_DAC_BG VTT_9
VTT_10 T9
BLM18PG121SN1D_0603 U8
VTT_11
1 2 64.8mA VTT_12
T8
VTT
+1.05V_M_DPLLA F47 VCCA_DPLLA VTT_13 U7
2
64.8mA VTT_14
T7
0_0603_5%
R120
0.1U_0402_16V4Z~D
C137
0.47U_0402_10V4Z~D
C142
2.2U_0603_10V6K~D
C143
4.7U_0603_6.3V6M~D
C144
Place close to U4.L48 1 +1.05V_M_DPLLB L48
VCCA_DPLLB VTT_15
U6
VTT_16 T6 1 1 1
PLL
24mA AD1
VCCA_HPLL VTT_17
U5
T5
1
2 VTT_18
1 139.2mA AE1 VCCA_MPLL VTT_19 V3
2 2 2
64.8mA Max. C145 U3
22U_0805_6.3V6M~D VTT_20
13.2mA VTT_21 V2
+1.05V_M_DPLLB
A PEG A LVDS
+1.05V_VCCP J48 U2
L1503 2 VCCA_LVDS VTT_22
T2
VTT_23
1 2 J47 VSSA_LVDS VTT_24 V1
+1.5VS
0.1U_0402_10V7K~D
10UH_LB2012T100MR_20%_0805~D R121 U1
VTT_25
220U_D2_4VY_R15M~D
1 0_0402_5% 414uA
1 2 1 +VCCA_PEG_BG AD48
+ VCCA_PEG_BG
1
C1519
C1520
C147
0.1U_0402_16V4Z~D 50mA
2 2 +VCC_AXF R122
+1.05V_M_PEGPLL AA48 VCCA_PEG_PLL
2 0_0603_5% +1.05V_VCCP
+VCC_AXF 1 2
+1.05V_A_SM
1U_0603_10V4Z~D
C148
+1.05V_VCCP 1 1
R123 747mA C149
100U_D2E_6.3VM_R18M~D
0_0603_5% AR20
VCCA_SM_1
POWER @ 10U_0805_10V4Z~D
C
2 1 AP20
VCCA_SM_2 2 2 DDR3 connect to 1.5V C
AN20 VCCA_SM_3
22U_0805_6.3V6M~D
C151
4.7U_0603_6.3V6M~D
C152
1U_0603_10V4Z~D
C153
1 AR17
VCCA_SM_4 321.35mA
A SM
1 1 1 AP17 R124 +1.5V
+ VCCA_SM_5 0_0805_5%
AN17 VCCA_SM_6 VCC_AXF_1 B22
C150
AXF
AT16 B21 2 1
VCCA_SM_7 VCC_AXF_2
AR16 A21
2 2 2 2 VCCA_SM_8 VCC_AXF_3
AP16 VCCA_SM_9
1
+1.5V_SM_CK
C154
0.1U_0402_16V4Z~D
1
R125
149mA 1_0402_5%
BF21
VCC_SM_CK_1 2
SM CK
BH20 C155
2
+1.05V_VCCP R126 +1.05V_A_SM_CK 37.95mA VCC_SM_CK_2 10U_0805_10V4Z~D
VCC_SM_CK_3 BG20
0_0603_5% BF20 1 2
VCC_SM_CK_4
2 1 AP28 VCCA_SM_CK_1
AN28 VCCA_SM_CK_2
C156
C157
22U_0805_6.3V6M~D
0.1U_0402_16V4Z~D
AP25
VCCA_SM_CK_3 CRB schematic
1 1 AN25 118.8mA
AN24
VCCA_SM_CK_4
K47 HPB & Avia didn't reserve
VCCA_SM_CK_5 VCC_TX_LVDS
A CK
AM28
VCCA_SM_CK_NCTF_1 +3VS @ R127
@R127
AM26 VCCA_SM_CK_NCTF_2
2 2 10_0402_5% @D1
@ D1
AM25
VCCA_SM_CK_NCTF_3 105.3mA
AL25 C35 1 2 1 2 +1.05V_VCCP
VCCA_SM_CK_NCTF_4 VCC_HV_1
AM24 VCCA_SM_CK_NCTF_5 VCC_HV_2 B35 1
HV
AL24 A35 SDMK0340L-7-F_SOD323-2~D
VCCA_SM_CK_NCTF_6 VCC_HV_3 C158
AM23
VCCA_SM_CK_NCTF_7 0.1U_0402_16V4Z~D
AL23 VCCA_SM_CK_NCTF_8 2
1782mA
TVA_DAC 24.15mA V48 +1.05V_VCCP
+1.5VS +1.5VS_QDAC VCC_PEG_1 +VCC_PEG
TVB_DAC 39.48mA VCC_PEG_2 U48
PEG
L3 V47
BLM18PG181SN1_0603~D TVC_DAC 24.15mA VCC_PEG_3
U47 1 2
B VCC_PEG_4 @ JP2 B
1 2 B24 VCCA_TV_DAC_1 VCC_PEG_5 U46
A24
VCCA_TV_DAC_2
C160
C161
C163
C164
C162
0.1U_0402_16V4Z~D
0.01U_0402_25V7K~D
4.7U_0603_6.3V6M~D
22U_0805_6.3V6M~D
220U_D2_4VY_R15M~D
TV
1
+VCC_DMI +VCC_PEG
1 1 1 1
456mA +
50mA A32 AH48 R129 1 2 0_0603_5%
VCC_HDA VCC_DMI_1
HDA
2 2 HDMI disable VCC_DMI_2 AF48 1 2 2 2
DMI
AH47
connected to GND VCC_DMI_3
AG47 C165
VCC_DMI_4 0.1U_0402_16V4Z~D
35mA
R130 M25 2
VCCD_TVDAC
D TV/CRT
0_0402_5%
+1.05V_VCCP 2 1 1mA L28 VCCD_QDAC
1 157.2mA AF1
VCCD_HPLL
C166 A8 GMCH_VTTLF1
0.1U_0402_16V4Z~D VTTLF1 GMCH_VTTLF2
50mA AA47 VCCD_PEG_PLL VTTLF VTTLF2 L1
AB2 GMCH_VTTLF3
2 VTTLF3
C167
C168
C169
0.47U_0402_10V4Z~D
0.47U_0402_10V4Z~D
0.47U_0402_10V4Z~D
60.31mA M38 VCCD_LVDS_1
LVDS
L37 1 1 1
VCCD_LVDS_2
+1.05V_VCCP L4 +1.05V_M_PEGPLL
BLM18PG121SN1D_0603 CANTIGA ES_FCBGA1329 2 2 2
1 2
C172
C173
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C171 R131
10U_0805_10V4Z~D 1_0402_5% 1 1
2 1 2 1
A A
2 2
LA-5151P
5 4 3 2 1
5 4 3 2 1
U4I U4J
AU48 AM36 BG21 AH8

VSS_1 VSS_100 VSS_199 VSS_297
AR48 VSS_2 VSS_101 AE36 L12 VSS_200 VSS_298 Y8
AL48 VSS_3 VSS_102 P36 AW21 VSS_201 VSS_299 L8
BB47 L36 AU21 E8
AW47 VSS_5 VSS_104 J36 AP21 VSS_203 VSS_301 B8
http://mycomp.su/x/
AN47 VSS_6 VSS_105 F36 AN21 VSS_204 VSS_302 AY7
AJ47 B36 AH21 AU7
AF47 VSS_8 VSS_107 AH35 AF21 VSS_206 VSS_304 AN7
AD47 VSS_9 VSS_108 AA35 AB21 VSS_207 VSS_305 AJ7
AB47 Y35 R21 AE7
D VSS_10 VSS_109 VSS_208 VSS_306 D
Y47 VSS_11 VSS_110 U35 M21 VSS_209 VSS_307 AA7
T47 VSS_12 VSS_111 T35 J21 VSS_210 VSS_308 N7
N47 BF34 G21 J7
L47 VSS_14 VSS_113 AM34 BC20 VSS_212 VSS_310 BG6
G47 AJ34 BA20 BD6
BD46 AF34 AW20 AV6
BA46 VSS_17 VSS_116 AE34 AT20 VSS_215 VSS_313 AT6
AY46 W34 AJ20 AM6
AV46 B34 AG20 M6
AR46 VSS_20 VSS_119 A34 Y20 VSS_218 VSS_316 C6
AM46 BG33 N20 BA5
V46 BC33 K20 AH5
R46 VSS_23 VSS_122 BA33 F20 VSS_221 VSS_319 AD5
P46 AV33 C20 Y5
H46 VSS_25 VSS_124 AR33 A20 VSS_223 VSS_321 L5
F46 VSS_26 VSS_125 AL33 BG19 VSS_224 VSS_322 J5
BF44 AH33 A18 H5
AH44 VSS_28 VSS_127 AB33 BG17 VSS_226 VSS_324 F5
AD44 VSS_29 VSS_128 P33 BC17 VSS_227 VSS_325 BE4
AA44 L33 AW17
VSS_30 VSS_129 VSS_228
Y44 VSS_31 VSS_130 H33 AT17 VSS_229 VSS_327 BC3
U44 VSS_32 VSS_131 N32 R17 VSS_230 VSS_328 AV3
T44 K32 M17 AL3
M44 VSS_34 VSS_133 F32 H17 VSS_232 VSS_330 R3
F44
BC43
VSS_35
VSS_36
VSS_134
VSS_135
C32
A31
C17 VSS_233 VSS VSS_331
VSS_332
P3
F3
AV43 VSS_37 VSS_136 AN29 BA16 VSS_235 VSS_333 BA2
AU43 VSS_38 VSS_137 T29 VSS_334 AW2
AM43 N29 AU16 AU2
J43 VSS_40 VSS_139 K29 AN16 VSS_238 VSS_336 AR2
C43 H29 N16 AP2
C
BG42
AY42
VSS_42
VSS_43
VSS VSS_141
VSS_142
F29
A29
K16
G16
VSS_240
VSS_241
VSS_338
VSS_339
AJ2
AH2 C
AT42 BG28 E16 AF2
AN42 BD28 BG15 AE2
AJ42 VSS_46 VSS_145 BA28 AC15 VSS_244 VSS_342 AD2
AE42 AV28 W15 AC2
N42 AT28 A15 Y2
L42 VSS_49 VSS_148 AR28 BG14 VSS_247 VSS_345 M2
BD41 AJ28 AA14 K2
AU41 VSS_51 VSS_150 AG28 C14 VSS_249 VSS_347 AM1
AM41 VSS_52 VSS_151 AE28 BG13 VSS_250 VSS_348 AA1
AH41 AB28 BC13 P1
AD41 VSS_54 VSS_153 Y28 BA13 VSS_252 VSS_350 H1
AA41 VSS_55 VSS_154 P28
Y41 K28 U24
U41 VSS_57 VSS_156 H28 AN13 VSS_255 VSS_352 U28
T41 VSS_58 VSS_157 F28 AJ13 VSS_256 VSS_353 U25
M41 C28 AE13 U29
G41 VSS_60 VSS_159 BF26 N13 VSS_258
B41 AH26 L13 AF32
VSS_61 VSS_160 VSS_259 VSS_NCTF_1
BG40 AF26 G13 AB32
BB40 VSS_63 VSS_162 AB26 E13 VSS_261 VSS_NCTF_3 V32
AV40 AA26 BF12 AJ30
AN40 C26 AV12 AM29
H40 VSS_66 VSS_165 B26 AT12 VSS_264 VSS_NCTF_6 AF29
E40 BH25 AM12 AB29
AT39 BD25 AA12 U26
VSS NCTF
AM39 VSS_69 VSS_168 BB25 J12 VSS_267 VSS_NCTF_9 U23
AJ39 AV25 A12 AL20
AE39 AR25 BD11 V20
N39 VSS_72 VSS_171 AJ25 BB11 VSS_270 VSS_NCTF_12 AC19
L39 AC25 AY11 AL17
B39 Y25 AN11 AJ17
B VSS_74 VSS_173 VSS_272 VSS_NCTF_14 B
BH38 VSS_75 VSS_174 N25 AH11 VSS_273 VSS_NCTF_15 AA17
BC38 L25 U17
VSS_76 VSS_175 VSS_NCTF_16
BA38 J25 Y11
AU38 VSS_78 VSS_177 G25 N11 VSS_276
AH38 E25 G11 BH48
VSS_79 VSS_178 VSS_277 VSS_SCB_1
AD38 VSS_80 VSS_179 BF24 C11 VSS_278 VSS_SCB_2 BH1
AA38 VSS_81 VSS_180 AD12 BG10 VSS_279 VSS_SCB_3 A48
Y38 AY24 AV10 C1
VSS SCB
VSS_82 VSS_181 VSS_280 VSS_SCB_4
U38 VSS_83 VSS_182 AT24 AT10 VSS_281 VSS_SCB_5 A3
T38 VSS_84 VSS_183 AJ24 AJ10 VSS_282
J38 AH24 AE10
F38 VSS_86 VSS_185 AF24 AA10 VSS_284
C38 VSS_87 VSS_186 AB24 M10 VSS_285
BF37 R24 BF9 E1
VSS_88 VSS_187 VSS_286 NC_26
BB37 VSS_89 VSS_188 L24 BC9 VSS_287 NC_27 D2
AW37 K24 AN9 C3
VSS_90 VSS_189 VSS_288 NC_28
AT37 J24 AM9 B4
VSS_91 VSS_190 VSS_289 NC_29
AN37 VSS_92 VSS_191 G24 AD9 VSS_290 NC_30 A5
AJ37 F24 G9 A6
VSS_93 VSS_192 VSS_291 NC_31
H37 E24 B9 A43
VSS_94 VSS_193 VSS_292 NC_32
C37 VSS_95 VSS_194 BH23 BH8 VSS_293 NC_33 A44
BG36 AG23 BB8 B45
VSS_96 VSS_195 VSS_294 NC_34
BD36 Y23 AV8 C46
NC
VSS_97 VSS_196 VSS_295 NC_35
AK15 VSS_98 VSS_197 B23 AT8 VSS_296 NC_36 D47
AU36 A23 B47
VSS_99 VSS_198 NC_37
VSS_199 AJ6 NC_38 A46
NC_39 F48
CANTIGA ES_FCBGA1329 E48
NC_40
NC_41 C48
NC_42 B48
A CANTIGA ES_FCBGA1329 A
LA-5151P
5 4 3 2 1
5 4 3 2 1
+1.5V +1.5V
+1.5V
+V_DDR_MCH_REF
JDIMM1
+V_DDR_MCH_REF 1 2
VREF_DQ VSS1 DDR_A_D4
3 4
VSS2 DQ4
2.2U_0603_6.3V6K~D
0.1U_0402_16V4Z~D
DDR_A_D0 5 6 DDR_A_D5
DQ0 DQ5
http://mycomp.su/x/
DDR_A_D1 7 8
R132 DQ1 VSS3 DDR_A_DQS#0
1 1 9 10
+V_DDR_MCH_REF VSS4 DQS#0
C175
C174
1K_0402_1% DDR_A_DM0 11 12 DDR_A_DQS0
DM0 DQS0
13 14 Note :
2
DDR_A_D2 VSS5 VSS6 DDR_A_D6

15 16
D +V_DDR_MCH_REF 2 2 DDR_A_D3 17
DQ2 DQ6
18 DDR_A_D7 DDR3 command & contorl signals need no termination. D
DQ3 DQ7
DDR_A_D8
19 VSS7 VSS8 20
DDR_A_D12
DDR2 command & command signals 56 ohm pull up to VccSus0_9
21 22
DQ8 DQ12
1
DQ9 DQ13
25 26
R133 DDR_A_DQS#1 VSS9 VSS10 DDR_A_DM1
27 28
1K_0402_1% DDR_A_DQS1 DQS#1 DM1 DDR3_DRAMRST#
29 DQS1 RESET# 30 DDR3_DRAMRST# 11,18
31 32
2

33 34
DDR_A_D11 DQ10 DQ14 DDR_A_D15
35 DQ11 DQ15 36
37 38
39 40
41 DQ17 DQ21 42 13 DDR_A_D[0..63]
43 44
DDR_A_DQS#2 VSS15 VSS16 DDR_A_DM2
45 DQS#2 DM2 46
DDR_A_DQS2 47 48
DQS2 VSS17 DDR_A_D22 13 DDR_A_DQS[0..7]
49 50
DDR_A_D18 VSS18 DQ22 DDR_A_D23
51 DQ18 DQ23 52
DDR_A_D19 53 54
DQ19 VSS19 13 DDR_A_DQS#[0..7]
55 56 DDR_A_D28
DDR_A_D24 VSS20 DQ28 DDR_A_D29
57 DQ24 DQ29 58
DDR_A_D25 59 60
DQ25 VSS21 DDR_A_DQS#3 13 DDR_A_DM[0..7]
61 62
DDR_A_DM3 VSS22 DQS#3 DDR_A_DQS3
63 DM3 DQS3 64
65 VSS23 VSS24 66 13 DDR_A_MA[0..14]
69 DQ27 DQ31 70
71 VSS25 VSS26 72
DDR_CKE0_DIMMA 73 74 DDR_CKE1_DIMMA
C 11 DDR_CKE0_DIMMA CKE0 CKE1 DDR_CKE1_DIMMA 11 C
75 VDD1 VDD2 76
+1.5V
Place close to SO-DIMM
77 78 T55
DDR_A_BS2 NC1 A15 DDR_A_MA14
13 DDR_A_BS2 79 80
BA2 A14
81 VDD3 VDD4 82
DDR_A_MA12 83 84 DDR_A_MA11
A12/BC# A11
330U_D2_2.5VY_R15M~D
C177
10U_0603_6.3V6M~D
C178
10U_0603_6.3V6M~D
C179
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
A9 A7
87 VDD5 VDD6 88 1
DDR_A_MA8 89 90 DDR_A_MA6 1 1 1 1 1 1
A8 A6
C176
C180
C181
C182
DDR_A_MA5 91 92 DDR_A_MA4 +
A5 A4
93 VDD7 VDD8 94
DDR_A_MA1 A3 A2 DDR_A_MA0 2 2 2 2 2 2 2
97 A1 A0 98
99 VDD9 VDD10 100
M_CLK_DDR0 101 102 M_CLK_DDR1
11 M_CLK_DDR0 M_CLK_DDR#0 CK0 CK1 M_CLK_DDR#1 M_CLK_DDR1 11
11 M_CLK_DDR#0 103 CK0# CK1# 104 M_CLK_DDR#1 11
105 VDD11 VDD12 106
DDR_A_MA10 107 108 DDR_A_BS1
DDR_A_BS0 A10/AP BA1 DDR_A_RAS# DDR_A_BS1 13
13 DDR_A_BS0 109 BA0 RAS# 110 DDR_A_RAS# 13
111 112
DDR_A_W E# VDD13 VDD14 DDR_CS0_DIMMA#
13 DDR_A_W E# 113 114 DDR_CS0_DIMMA# 11
WE# S0#
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
DDR_A_CAS# 115 116 M_ODT0_DIMMA
13 DDR_A_CAS# CAS# ODT0 M_ODT0_DIMMA 11
117 118 1 1 1 1
VDD15 VDD16
C186
C183
C184
C185
DDR_A_MA13 119 120 M_ODT1_DIMMA
DDR_CS1_DIMMA# A13 ODT1 M_ODT1_DIMMA 11
11 DDR_CS1_DIMMA# 121 S1# NC2 122
123 124
VDD17 VDD18 +V_DDR_MCH_REF 2 2 2 2
T56 125 126 +V_DDR_MCH_REF
NCTEST VREF_CA
127 VSS27 VSS28 128
C187
C188
0.1U_0402_16V4Z~D
2.2U_0603_6.3V6K~D
DDR_A_D32 129 130 DDR_A_D36
131 132
DQ33 DQ37
133 VSS29 VSS30 134 1 1
DDR_A_DQS#4 135 136 DDR_A_DM4
DDR_A_DQS4 DQS#4 DM4
137 138
B DQS4 VSS31 DDR_A_D38 B
139 VSS32 DQ38 140
DDR_A_D34 141 142 DDR_A_D39 2 2
DDR_A_D35 DQ34 DQ39
143 144
DQ35 VSS33 DDR_A_D44
145 VSS34 DQ44 146
DDR_A_D40 147 148 DDR_A_D45
DDR_A_D41 DQ40 DQ45 +0.75VS +0.75VS
149 DQ41 VSS35 150
151 152 DDR_A_DQS#5
DDR_A_DM5 VSS36 DQS#5 DDR_A_DQS5
153 154
DM5 DQS5
10U_0603_6.3V6M~D
155 VSS37 VSS38 156
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
DDR_A_D42 157 158 DDR_A_D46
159 160 1
DQ43 DQ47
C216
161 VSS39 VSS40 162 2 2 2 2
C189
C190
C191
C192
DDR_A_D48 163 164 DDR_A_D52
165 166
DQ49 DQ53 2
167 VSS41 VSS42 168
DDR_A_DQS#6 169 170 DDR_A_DM6 1 1 1 1
DDR_A_DQS6 DQS#6 DM6
171 172
DQS6 VSS43 DDR_A_D54
173 VSS44 DQ54 174
DDR_A_D50 175 176 DDR_A_D55
DDR_A_D51 DQ50 DQ55
177 178
DQ51 VSS45 DDR_A_D60
179 VSS46 DQ60 180
DDR_A_D56 181 182 DDR_A_D61
DDR_A_D57 DQ56 DQ61
183
DQ57 VSS47
184
DDR_A_DQS#7
Place close to JDIMM pin 203 and 204 Place between 2 DIMMs
185 VSS48 DQS#7 186
DDR_A_DM7 187 188 DDR_A_DQS7
DM7 DQS7
DDR_A_D58
189 VSS49 VSS50 190
DDR_A_D62
191 DQ58 DQ62 192
DDR_A_D59 193 194 DDR_A_D63
+3VS DQ59 DQ63 @
195 VSS51 VSS52 196
197 198 PM_EXTTS#0_R R134 1 2 0_0402_5%
SA0 EVENT# ICH_SM_DA PM_EXTTS#0 11
199 200 ICH_SM_DA 6,18,20,21
VDDSPD SDA ICH_SM_CLK
201 SA1 SCL 202 ICH_SM_CLK 6,18,20,21
A A
+0.75VS 203 VTT1 VTT2 204 +0.75VS
C193
C194
R135
R136
0.1U_0402_16V4Z~D
2.2U_0603_6.3V6K~D
10K_0402_5%
10K_0402_5%
1
205 206
1 1 G1 G2 DELL CONFIDENTIAL/PROPRIETARY
FOX_AS0A626-U4RN-7F
CONN@
2 2
2
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Compal Electronics, Inc.
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT Title
DDR3 SO-DIMM/Standard Type BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD DDRIII SO-DIMM A SLOT
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. Size Document Number Rev
R10 (A00)
LA-5151P
5 4 3 2 1
5 4 3 2 1
+1.5V +1.5V
LINK OK
+V_DDR_MCH_REF
JDIMM2
+V_DDR_MCH_REF 1 2
VREF_DQ VSS1 DDR_B_D4
3 4
VSS2 DQ4
2.2U_0603_6.3V6K~D
C195
0.1U_0402_16V4Z~D
C196
DDR_B_D0 5 6 DDR_B_D5
DQ0 DQ5
http://mycomp.su/x/
DDR_B_D1 7 8
DQ1 VSS3 DDR_B_DQS#0
1 1 9 10
DDR_B_DM0 VSS4 DQS#0 DDR_B_DQS0
11 DM0 DQS0 12
13 VSS5 VSS6 14
D 2 2 DDR_B_D3 DQ2 DQ6 DDR_B_D7 D
17 DQ3 DQ7 18
19 VSS7 VSS8 20
DDR_B_D9 DQ8 DQ12 DDR_B_D13
23 DQ9 DQ13 24 13 DDR_B_D[0..63]
25 26
DDR_B_DQS#1 VSS9 VSS10 DDR_B_DM1
27 28
DDR_B_DQS1 DQS#1 DM1 DDR3_DRAMRST#
29 DQS1 RESET# 30 DDR3_DRAMRST# 11,17 13 DDR_B_DQS[0..7]
31 32
DDR_B_D10 VSS11 VSS12 DDR_B_D14
33 34
35 DQ11 DQ15 36 13 DDR_B_DQS#[0..7]
37 38
DDR_B_D16 VSS13 VSS14 DDR_B_D20
39 40
41 DQ17 DQ21 42 13 DDR_B_DM[0..7]
43 44
DDR_B_DQS#2 VSS15 VSS16 DDR_B_DM2
45 DQS#2 DM2 46
DDR_B_DQS2 47 48
DQS2 VSS17 DDR_B_D22 13 DDR_B_MA[0..14]
49 50
DDR_B_D18 VSS18 DQ22 DDR_B_D23
51 DQ18 DQ23 52
DDR_B_D19 53 54
DQ19 VSS19 DDR_B_D28
55 56
DDR_B_D24 VSS20 DQ28 DDR_B_D29
57 DQ24 DQ29 58
DDR_B_D25 59 60
61 62
DDR_B_DM3 VSS22 DQS#3 DDR_B_DQS3
63 DM3 DQS3 64
65 VSS23 VSS24 66
69 DQ27 DQ31 70 Place close to SO-DIMM
71 VSS25 VSS26 72
+1.5V
DDR_CKE2_DIMMB 73 74 DDR_CKE3_DIMMB
C 11 DDR_CKE2_DIMMB CKE0 CKE1 DDR_CKE3_DIMMB 11 C
75 VDD1 VDD2 76
330U_D2_2.5VY_R15M~D
C197
10U_0603_6.3V6M~D
C198
10U_0603_6.3V6M~D
C199
10U_0603_6.3V6M~D
C200
10U_0603_6.3V6M~D
C201
10U_0603_6.3V6M~D
C202
10U_0603_6.3V6M~D
C203
77 78 T57
DDR_B_BS2 NC1 A15 DDR_B_MA14
13 DDR_B_BS2 79 80 1
BA2 A14
81 VDD3 VDD4 82 1 1 1 1 1 1
DDR_B_MA12 83 84 DDR_B_MA11 +
DDR_B_MA9 A12/BC# A11 DDR_B_MA7
85 86
A9 A7
87 VDD5 VDD6 88
DDR_B_MA8 89 90 DDR_B_MA6 2 2 2 2 2 2 2
DDR_B_MA5 A8 A6 DDR_B_MA4
91 A5 A4 92
93 VDD7 VDD8 94
DDR_B_MA3 95 96 DDR_B_MA2
DDR_B_MA1 A3 A2 DDR_B_MA0
97 A1 A0 98
99 VDD9 VDD10 100
M_CLK_DDR2 101 102 M_CLK_DDR3
11 M_CLK_DDR2 M_CLK_DDR#2 CK0 CK1 M_CLK_DDR#3 M_CLK_DDR3 11
11 M_CLK_DDR#2 103 CK0# CK1# 104 M_CLK_DDR#3 11
105 VDD11 VDD12 106
C204
C205
C206
C207
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
DDR_B_MA10 107 108 DDR_B_BS1
DDR_B_BS0 A10/AP BA1 DDR_B_RAS# DDR_B_BS1 13
13 DDR_B_BS0 109 BA0 RAS# 110 DDR_B_RAS# 13 1 1 1 1
111 112
DDR_B_W E# VDD13 VDD14 DDR_CS2_DIMMB#
13 DDR_B_W E# 113 114 DDR_CS2_DIMMB# 11
DDR_B_CAS# WE# S0# M_ODT2_DIMMB
13 DDR_B_CAS# 115 CAS# ODT0 116 M_ODT2_DIMMB 11
117 118 2 2 2 2
DDR_B_MA13 VDD15 VDD16 M_ODT3_DIMMB
119 120 M_ODT3_DIMMB 11
DDR_CS3_DIMMB# A13 ODT1
11 DDR_CS3_DIMMB# 121 S1# NC2 122
123 124
VDD17 VDD18 +V_DDR_MCH_REF
T58 125 126 +V_DDR_MCH_REF
NCTEST VREF_CA
127 VSS27 VSS28 128
C208
C209
0.1U_0402_16V4Z~D
2.2U_0603_6.3V6K~D
DDR_B_D32 129 130 DDR_B_D36
131 132
DQ33 DQ37
133 VSS29 VSS30 134 1 1
DDR_B_DQS#4 135 136 DDR_B_DM4
DDR_B_DQS4 DQS#4 DM4
137 138
B DQS4 VSS31 DDR_B_D38 B
139 VSS32 DQ38 140
DDR_B_D34 141 142 DDR_B_D39 2 2 +0.75VS
DDR_B_D35 DQ34 DQ39
143 144
145 VSS34 DQ44 146
DDR_B_D40 147 148 DDR_B_D45
DQ40 DQ45
C210
C211
C212
C213
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
DDR_B_D41 149 150
151 VSS36 DQS#5 152
DDR_B_DM5 153 154 DDR_B_DQS5 2 2 2 2
DM5 DQS5
155 VSS37 VSS38 156
DDR_B_D42 157 158 DDR_B_D46
159 160
DQ43 DQ47 1 1 1 1
161 VSS39 VSS40 162
DDR_B_D48 163 164 DDR_B_D52
165 166
DQ49 DQ53
167 VSS41 VSS42 168
DDR_B_DQS#6 169 170 DDR_B_DM6
DDR_B_DQS6 DQS#6 DM6
171 172
DQS6 VSS43 DDR_B_D54
173 VSS44 DQ54 174
DDR_B_D50 175 176 DDR_B_D55 Place close to JDIMM pin 203 and 204
DDR_B_D51 DQ50 DQ55
177 178
179 VSS46 DQ60 180
DDR_B_D56 181 182 DDR_B_D61
DDR_B_D57 DQ56 DQ61
183 184
185 VSS48 DQS#7 186
DDR_B_DM7 187 188 DDR_B_DQS7 R10 Moidify (short directly)
DM7 DQS7
189 VSS49 VSS50 190
DDR_B_D58 191 192 DDR_B_D62
193 194
+3VS DQ59 DQ63 @
195 VSS51 VSS52 196
197 198 PM_EXTTS#1_R R137 1 2 0_0402_5%
R138 SA0 EVENT# ICH_SM_DA PM_EXTTS#1 11
199 200 ICH_SM_DA 6,17,20,21
VDDSPD SDA ICH_SM_CLK
+3VS 1 2 201 SA1 SCL 202 ICH_SM_CLK 6,17,20,21
A A
+0.75VS 203 VTT1 VTT2 204 +0.75VS
10K_0402_5%
1
C214
C215
0.1U_0402_16V4Z~D
2.2U_0603_6.3V6K~D
1 1 205 G1 G2 206
R139
10K_0402_5% FOX_AS0A626-U8RN-7F
2 2
CONN@ DELL CONFIDENTIAL/PROPRIETARY
2

DDR3 SO-DIMM/Standard Type PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
Title
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, DDRIII SO-DIMM B SLOT
LA-5151P
5 4 3 2 1
5 4 3 2 1
http://mycomp.su/x/
C864 2 1 15P_0402_50V8J~D ICH_RTCX1
Y2
D CMOS_CLR1 CMOS setting 2 NC IN 1 D
1
Shunt Clear CMOS 3 4 R140
NC OUT 10M_0402_5%
32.768KHZ_12.5PF_1TJS125BJ4A421P R141 U6A LPC_AD[0..3] 27,31 +3VS
Open Keep CMOS 0_0402_5% LPC_AD0
C23 K5
2
C217 RTCX1 FW H0/LAD0
2 1 15P_0402_50V8J~D 1 2 ICH_RTCX2 C24 RTCX2 FW H1/LAD1 K4 LPC_AD1
L6 LPC_AD2 GATEA20 R142 2 1 10K_0402_5%
R143 1 FW H2/LAD2
+RTCVCC 2 20K_0402_5% ICH_RTCRST# A25 RTCRST# FW H3/LAD3 K2 LPC_AD3
R144 1 2 20K_0402_5% SRTCRST# F20 KB_RST# R145 2 1 10K_0402_5%
RTC
LPC
R146 1 SRTCRST#
2 1M_0402_5% INTRUDER# C22 INTRUDER# FW H4/LFRAME# K3 LPC_FRAME#
LPC_FRAME# 27,31
+RTCVCC 1 2 ICH_INTVRMEN B22 INTVRMEN LDRQ0# J3 T59

ME_CLR1 TPM setting R157 A22 J1 T60
LAN100_SLP LDRQ1#/GPIO23
1U_0603_10V4Z~D
C218
2 2 332K_0402_1% +1.05V_VCCP
1
@CMOS1
Shunt Clear ME RTC Registers @ C219 E25 N7 GATEA20
GLAN_CLK A20GATE GATEA20 31
ME1 1U_0603_10V4Z~D AJ27 H_A20M# H_FERR# R147 2 1 49.9_0402_1%
A20M# H_A20M# 7
Open Keep ME RTC Registers C13
2
1 1 LAN_RSTSYNC H_DPRSTP#
DPRSTP# AJ25 H_DPRSTP# 8,11,51
F14 AE23 H_DPSLP#
LAN_RXD0 DPSLP# H_DPSLP# 8
LAN / GLAN
G13 R148 dual core 56_5%
LAN_RXD1
D14 LAN_RXD2 FERR# AJ26 2 1 H_FERR# 7
56_0402_5% quad core 50_5%
D13 AD22 H_PWRGOOD
LAN_TXD0 CPUPWRGD H_PWRGOOD 8
D12 LAN_TXD1
E13 AF25 H_IGNNE#
LAN_TXD2 IGNNE# H_IGNNE# 7
CPU
R149 B10 AE22 H_INIT#
GPIO56 INIT# H_INIT# 7
24.9_0402_1% AG25 H_INTR +1.05V_VCCP
INTR H_INTR 7
C
+1.5VS 1 2 B28 L3 KB_RST# C
GLAN_COMPI RCIN# KB_RST# 31
B27 GLAN_COMPO
1
AF23 H_NMI dual core 56_5%
NMI H_NMI 7
R150 1 2 33_0402_5% HDA_BITCLK_ICH AF6 AF24 H_SMI# R151
25 HDA_BITCLK_AUDIO HDA_BIT_CLK SMI# H_SMI# 7
25 HDA_SYNC_AUDIO
R152 1 2 33_0402_5% HDA_SYNC_ICH AH4 49.9_0402_1% quad core 50_5%
HDA_SYNC H_STPCLK#
STPCLK# AH27 H_STPCLK# 7
R153 1 2 33_0402_5% HDA_RST_ICH# AE7
25 HDA_RST_AUDIO#
2
HDA_RST# THERMTRIP_ICH# R154
1 THRMTRIP# AG26 1 2 54.9_0402_1% H_THERMTRIP# 7,11
HDA_SDIN0 AF4
25 HDA_SDIN0 HDA_SDIN0
@C1512
@C1512 AG4 AG27 ICH_TP12 T61 placed within 2" from
10P_0402_50V8J~D HDA_SDIN1 TP12
Place close U6 AH3 ICH9M
IHDA
2 HDA_SDIN2
AE5 HDA_SDIN3
SATA4RXN AH11 SATA_IRX_DTX_N4 29
R155 1 2 33_0402_5% HDA_SDOUT_ICH AG5 AJ11
25 HDA_SDOUT_AUDIO HDA_SDOUT SATA4RXP SATA_IRX_DTX_P4 29
AG12 SATA_ITX_DRX_N4 C220 2 1 0.01U_0402_16V7K~D To ESATA
SATA4TXN SATA_ITX_DRX_P4 C221 2 SATA_ITX_C_DRX_N4 29
AG7 HDA_DOCK_EN#/GPIO33 SATA4TXP AF12 1 0.01U_0402_16V7K~D SATA_ITX_C_DRX_P4 29
T62 PAD~D AE8
T63 PAD~D HDA_DOCK_RST#/GPIO34
SATA5RXN AH9 SATA_IRX_DTX_N5 29
SATA_ACT#_R AG8 AJ9
SATALED# SATA5RXP SATA_IRX_DTX_P5 29
T84 PAD~D AE10 SATA_ITX_DRX_N5 C222 2 1 0.01U_0402_16V7K~D To ODD
SATA5TXN SATA_ITX_DRX_P5 C223 2 SATA_ITX_C_DRX_N5 29
29 SATA_IRX_DTX_N0 AJ16 SATA0RXN SATA5TXP AF10 1 0.01U_0402_16V7K~D SATA_ITX_C_DRX_P5 29
To JSATA1 29 SATA_IRX_DTX_P0
C224 2
AH16 SATA0RXP
1 0.01U_0402_16V7K~D SATA_ITX_DRX_N0 CLK_PCIE_SATA#
SATA
29 SATA_ITX_C_DRX_N0 AF17 SATA0TXN SATA_CLKN AH18 CLK_PCIE_SATA# 6
C225 2 1 0.01U_0402_16V7K~D SATA_ITX_DRX_P0 AG17 AJ18 CLK_PCIE_SATA
29 SATA_ITX_C_DRX_P0 SATA0TXP SATA_CLKP CLK_PCIE_SATA 6
29 SATA_IRX_DTX_N1 AH13 SATA1RXN SATARBIAS# AJ7

29 SATA_IRX_DTX_P1 AJ13 SATA1RXP SATARBIAS AH7 2 1
To JSATA2 C226 2 1 0.01U_0402_16V7K~D SATA_ITX_DRX_N1 AG14 R156 24.9_0402_1%
29 SATA_ITX_C_DRX_N1 C227 2 SATA1TXN
29 SATA_ITX_C_DRX_P1 1 0.01U_0402_16V7K~D SATA_ITX_DRX_P1 AF14 SATA1TXP
B B
ICH9M_FCBGA676~D
Within 500 mils
P/N : SA00002G12L (S IC AF82801IEM SLB8P A3 PBGA676P ICH9ME )
+3VS
1
XOR Chain Entrance Strap
@ R158
1K_0402_5%
ICH TP3 HDA SDOUT Description
2
0 0 RSVD HDA_SDOUT_ICH
ICH_TP3 21
1
0 1 Enter XOR Chain
@ R160
1K_0402_5%
1 0 Normal Operation (Default)
1 1 Set PCIE port config bit 1 2

A A
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, ICH9-M(1/5)
LA-5151P
5 4 3 2 1
5 4 3 2 1
+3VS
U6B
PCI_REQ0# F1 D11
R161 1 REQ0# AD0
2 8.2K_0402_5% PCI_REQ0# PCI_GNT0# PCI
PCI_REQ1#
G4
B6
GNT0# AD1 C8
D9 Boot BIOS Strap
R162 1 REQ1#/GPIO50 AD2
2 8.2K_0402_5% PCI_REQ1# A7 GNT1#/GPIO51 AD3 E12
PCI_REQ2# F13 E9
http://mycomp.su/x/
2 8.2K_0402_5% PCI_REQ2#
PCI_REQ3#
F12
E6
GNT2#/GPIO53 AD5 C9
E10 PCI_GNT0# SPI_CS#1 Boot BIOS Location
2 8.2K_0402_5% PCI_REQ3# PCI_GNT3# F6 GNT3#/GPIO55 AD7 B7
AD8 C7
D
R165 1 2 8.2K_0402_5% PCI_IRDY#
D8
B4
C/BE0# AD9 C5
G11 0 1 SPI D
C/BE1# AD10
D6 C/BE2# AD11 F8
R166 1 2 8.2K_0402_5% PCI_DEVSEL# A5 F11
C/BE3# AD12
R167 1 2 8.2K_0402_5% PCI_PERR# PCI_IRDY# D3 IRDY#
AD13
AD14
E7
A3 1 0 PCI
E3 PAR AD15 D2
R168 1 2 8.2K_0402_5% PCI_PLOCK# PCI_PCIRST# R1 F10
PCI_DEVSEL# PCIRST# AD16
R169 1 2 8.2K_0402_5% PCI_SERR# PCI_PERR#
C6
E4
DEVSEL#
PERR#
AD17
AD18
D5
D10 1 1 LPC *
PCI_PLOCK# C2 B3
R170 1 PLOCK# AD19
2 8.2K_0402_5% PCI_STOP# PCI_SERR# J4 SERR# AD20 F7
PCI_STOP# A4 C3 +3VALW
R171 1 STOP# AD21
2 8.2K_0402_5% PCI_TRDY# PCI_TRDY# F5 TRDY# AD22 F3
PCI_FRAME# D7 F4 SPI_CS1#R @ R172 1 2 1K_0402_5%
FRAME# AD23 22 SPI_CS1#R
R173 1 2 8.2K_0402_5% PCI_FRAME# C1
PCI_PLTRST# AD24
C14 PLTRST# AD25 G7
R174 1 2 8.2K_0402_5% PCI_PME# PCI_CLK D4 H7 PCI_GNT0# @ R175 1 2 1K_0402_5%
6 PCI_CLK PCICLK AD26
PCI_PME# R2 D1
PME# AD27
AD28 G5
AD29 H6
R176 1 2 8.2K_0402_5% PCI_PIRQA# G1
AD30
R177 1 AD31 H3 GNT0 & SPI_CS#1 have a weak internal pull up
2 8.2K_0402_5% PCI_PIRQB#
R178 1 2 8.2K_0402_5% PCI_PIRQC# ACCEL_INT# H4

Interrupt I/F J5 PCI_PIRQA#
PCI_PIRQF# PIRQE#/GPIO2 PIRQA# PCI_PIRQB#
K6 PIRQF#/GPIO3 PIRQB# E1
R179 1 2 8.2K_0402_5% PCI_PIRQD# PCI_PIRQG# F2 J6 PCI_PIRQC#
PCI_PIRQH# PIRQG#/GPIO4 PIRQC# PCI_PIRQD# +3VALW
G2 PIRQH#/GPIO5 PIRQD# C4
C R181 1 2 8.2K_0402_5% PCI_PIRQF# C
ICH9M_FCBGA676~D
R180 1 2 8.2K_0402_5% PCI_PIRQH# 1
R182 1 2 8.2K_0402_5% PCI_PIRQG# @ C954
0.1U_0402_16V4Z~D
R183 2 2
1 8.2K_0402_5% ACCEL_INT#
5
@ U7
PCI_PCIRST# 2
P
B
Y 4 PCI_RST# 24,27,28
C228 1 A
G
2 1 1 2 PCI_CLK MC74VHC1G08DFT2G SC70 5P
3
@ R185 @ 33_0402_5%
R184
22P_0402_50V8J~D 0_0402_5%
2 1
+3VS
Free Fall Sensor +3VALW
2 1 1
C961 C962 @ C955
0.1U_0402_16V4Z~D 10U_0805_10V4Z~D 0.1U_0402_16V4Z~D
+3VS +3VS_ACL_IO 1 2 2
5
@ U8
B @ PCI_PLTRST# B
1 2 2
P
R1004 B PLT_RST#
Y 4 PLT_RST# 11,27,30,31,38
0_0603_5% 1 A
G
MC74VHC1G08DFT2G SC70 5P
3
U43 +3VS
DE351DLTR R187
0_0402_5%
+3VS_ACL_IO 1 VDD_IO 2 1
+3VS 6 VDD GND 2
GND 4
ACCEL_INT# 8 5
INT 1 GND
9 INT 2 GND 10
12 SDO A16 swap override Strap

6,17,18,21 ICH_SM_DA 13 SDA / SDI / SDO
6,17,18,21 ICH_SM_CLK 14 SCL / SPC
3 Low= A16 swap override Enble
RSVD
+3VS 1
R1005
2
10K_0402_5%
7 CS RSVD 11
PCI_GNT3# High= Default *
DE351DLTR_LGA14_3X5
Must be placed in the center of the system. PCI_GNT3# @ R186 1 2 1K_0402_5%

P/N : SA000039C00 (S IC DE351DLTR LGA 14P MOTION SENSOR)
A A
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
ICH9-M(2/5)
R10 (A00)
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5151P
5 4 3 2 1
5 4 3 2 1
http://mycomp.su/x/
D D
+3VS
1
R188 R189
Place closely pin AF3 Place closely pin H1
2.2K_0402_5% 2.2K_0402_5%
CLK_48M_ICH CLK_14M_ICH
+3VALW
2
6,17,18,20 ICH_SM_DA 1 6 ICH_SMBDATA
1
Q2A
2N7002DW-7-F_SOT363-6~D If not used, pull-up to
1
@ R190 @ R191
Vcc3_3 or pull-down to GND
2
R192 R193 10_0402_5% 10_0402_5%

4 3ICH_SMBCLK 2.2K_0402_5% 2.2K_0402_5%
2
6,17,18,20 ICH_SM_CLK R996
Q2B U6C 10K_0402_5% 1 1
2
2N7002DW-7-F_SOT363-6~D ICH_SMBCLK G16 SMBCLK AH23 GPIO21 1 2
5
ICH_SMBDATA SATA0GP/GPIO21 GPIO19 @ C229 @ C230

+3VS A13 SMBDATA SATA1GP/GPIO19 AF19
LINKALERT# E17 LINKALERT#/GPIO60/CLGPIO4 AE21 GPIO36 4.7P_0402_50V8C~D 4.7P_0402_50V8C~D
SATA4GP/GPIO36 2 2
SATA
GPIO
ICH_SMLINK0 C17 SMLINK0 AD20 GPIO37
SMB
ICH_SMLINK1 SATA5GP/GPIO37
B18 SMLINK1
H1 CLK_14M_ICH
CLK14 CLK_14M_ICH 6
ICH_RI# F19 AF3 CLK_48M_ICH
RI# CLK48 CLK_48M_ICH 6
Clocks
+3VS T64 SUS_STAT# R4 P1 ICH_SUSCLK
SUS_STAT#/LPCPD# SUSCLK T65 PAD
XDP_DBRESET# G19
7 XDP_DBRESET# SYS_RESET#
C C16 SLP_S3# ICH_PWROK R195 1 2 100_0402_5% C
SLP_S3# SLP_S3# 31 M_PWROK 11
R194 1 2 10K_0402_5% SERIRQ PM_SYNC# M6 E16 SLP_S4#
11 PM_SYNC# PMSYNC#/GPIO0 SLP_S4# SLP_S4# 11,31
1
G17 SLP_S5#
R198 1 SLP_S5# SLP_S5# 31
2 8.2K_0402_5% EC_THERM#
31 EC_LID_OUT#
EC_LID_OUT# A17 SMBALERT#/GPIO11
R197
C10 T66 PAD 10K_0402_5%
R199 1 S4_STATE#/GPIO26
2 10K_0402_5% LAN_CABDT
6 H_STP_PCI#
H_STP_PCI# A14 STP_PCI#
H_STP_CPU# E19 G20 ICH_PWROK
ICH_PWROK 11,31
SYS GPIO
2
R200 1 6 H_STP_CPU# STP_CPU# PWROK
2 10K_0402_5% OCP#
L4 CLKRUN# DPRSLPVR/GPIO16 M2 DPRSLPVR 11,51
@ R201 1 2 8.2K_0402_5% EC_SCI#
ICH_PCIE_WAKE# E20 B13 ICH_LOW_BAT# ICH_LOW_BAT# R207 2 1 8.2K_0402_5% +3VALW
24,27,28,31 ICH_PCIE_WAKE# W AKE# BATLOW #
Power MGT
SERIRQ M5
31 SERIRQ SERIRQ
EC_THERM# AJ23 R3 PBTN_OUT#
+3VALW 31 EC_THERM# THRM# PWRBTN# PBTN_OUT# 31
R10 Moidify (short directly) @
11,31,51 VGATE 1 2 VRMPWRGD D21 VRMPW RGD LAN_RST# D20 R205
R206 1 2 10K_0402_5% LINKALERT# R203 0_0402_5% 10K_0402_5%
R211 1
1 2 T67 A20 TP11 RSMRST# D22 R_EC_RSMRST# 1 2 RSMRST circuit
2 10K_0402_5% ICH_SMLINK0 R204 100K_0402_5%PAD
OCP# AG19 R5 CK_PWRGD @ R219
7 OCP# GPIO1 CK_PWRGD CK_PWRGD 6
R213 1 2 10K_0402_5% ICH_SMLINK1 LAN_LOPWEN AH21 0_0402_5%
24 LAN_LOPWEN GPIO6 M_PWROK @
AG21 GPIO7 CLPW ROK R6 M_PWROK 11 47 POK 2 1 2 1 EC_RSMRST# 31
R209 1 2 10K_0402_5% ICH_RI# EC_SMI# A21 R220
31 EC_SMI# GPIO8
EC_SCI# C12 B16 T68 PAD 0_0402_5%
31 EC_SCI# GPIO12 SLP_M#
R210 1 2 10K_0402_5% XDP_DBRESET# PAD T69 C21 R_EC_RSMRST#
GPIO13 CL_CLK0
AE18 GPIO17 CL_CLK0 F24 CL_CLK0 11
R214 1 2 10K_0402_5% EC_LID_OUT# K1 B19
T98 GPIO18 CL_CLK1
R208 1
AF8 GPIO20 R10 Moidify (short directly)
2 1K_0402_5% ICH_PCIE_WAKE# AJ22 SCLOCK/GPIO22 CL_DATA0 F22 CL_DATA0
CL_DATA0 11
PAD T70 A9 GPIO27 CL_DATA1 C19
B B
GPIO
Controller Link
PAD T71 D19 GPIO28
CLKSATAREQ# L1 C25 CL_VREF0_ICH R212 1 2 3.24K_0402_1% +3VS
R216 1 6 CLKSATAREQ# SATACLKREQ#/GPIO35 CL_VREF0
2 8.2K_0402_5% EC_SMI# AE19 SLOAD/GPIO38 CL_VREF1 A19
1
AG22 SDATAOUT0/GPIO39 1
AF21 F21 CL_RST# C231 R215
SDATAOUT1/GPIO48 CL_RST0# CL_RST# 11
GPIO49 has a weak internal pull-up AH24 GPIO49 CL_RST1# D18 0.1U_0402_16V4Z~D 453_0402_1%
A8 GPIO57/CLGPIO5 2
A16
2
@ R218 1 MEM_LED/GPIO24
+3VS 2 10K_0402_5% SB_SPKR
25 SB_SPKR
SB_SPKR M7 SPKR GPIO10/SUS_PW R_ACK C18
MCH_ICH_SYNC# AJ24 C11
11 MCH_ICH_SYNC# MCH_SYNC# GPIO14/AC_PRESENT ACIN 25,31,45,46
ICH_TP3 B21 C20 @ R217 1 2 0_0402_5%
19 ICH_TP3 TP3 W OL_EN/GPIO9 LAN_CABDT 24
low --> default PAD T72 AH20 TP8
MISC
PAD T73 AJ20 TP9
High -->No reboot PAD T74 AJ21 TP10
ICH9M_FCBGA676~D Maybach CL_CLK1/DATA1 connect to WLAN card
to support iAMT
A A
LA-5151P
5 4 3 2 1
5 4 3 2 1
http://mycomp.su/x/
D D
U6D
N29 V27 DMI_MTX_IRX_N0
PERN1 DMI0RXN DMI_MTX_IRX_N0 11
N28 V26 DMI_MTX_IRX_P0
PERP1 DMI0RXP DMI_MTX_IRX_P0 11
P27 U29 DMI_MRX_ITX_N0
Direct Media Interface

PETN1 DMI0TXN DMI_MRX_ITX_P0 DMI_MRX_ITX_N0 11
P26 PETP1 DMI0TXP U28 DMI_MRX_ITX_P0 11
PCIE_IRX_WLANTX_N2 L29 Y27 DMI_MTX_IRX_N1
27 PCIE_IRX_WLANTX_N2 PERN2 DMI1RXN DMI_MTX_IRX_N1 11
PCIE_IRX_WLANTX_P2 L28 Y26 DMI_MTX_IRX_P1
27 PCIE_IRX_WLANTX_P2 PERP2 DMI1RXP DMI_MTX_IRX_P1 11
MiniWLAN (Mini Card 2)---> C234 1 2 0.1U_0402_10V7K~D PCIE_ITX_WLANRX_N2 M27 W 29 DMI_MRX_ITX_N1
27 PCIE_ITX_C_WLANRX_N2 C235 1 PETN2 DMI1TXN DMI_MRX_ITX_N1 11
27 PCIE_ITX_C_WLANRX_P2 2 0.1U_0402_10V7K~D PCIE_ITX_WLANRX_P2 M26 PETP2 DMI1TXP W 28 DMI_MRX_ITX_P1
DMI_MRX_ITX_P1 11
PCIE_IRX_WPANTX_N3 J29 AB27 DMI_MTX_IRX_N2
28 PCIE_IRX_WPANTX_N3 PERN3 DMI2RXN DMI_MTX_IRX_N2 11
PCIE_IRX_WPANTX_P3 J28 AB26 DMI_MTX_IRX_P2
28 PCIE_IRX_WPANTX_P3 PERP3 DMI2RXP DMI_MTX_IRX_P2 11
MiniWPAN (Mini Card 3)---> C236 1 2 0.1U_0402_10V7K~D PCIE_ITX_WPANRX_N3 K27 AA29 DMI_MRX_ITX_N2
PCI-Express
28 PCIE_ITX_C_WPANRX_N3 C237 1 PETN3 DMI2TXN DMI_MRX_ITX_N2 11
28 PCIE_ITX_C_WPANRX_P3 2 0.1U_0402_10V7K~D PCIE_ITX_WPANRX_P3 K26 PETP3 DMI2TXP AA28 DMI_MRX_ITX_P2
DMI_MRX_ITX_P2 11
PCIE_IRX_CBPTX_N4 G29 AD27 DMI_MTX_IRX_N3
30 PCIE_IRX_CBTX_N4 PERN4 DMI3RXN DMI_MTX_IRX_N3 11
PCIE_IRX_CBPTX_P4 G28 AD26 DMI_MTX_IRX_P3
30 PCIE_IRX_CBTX_P4 PERP4 DMI3RXP DMI_MTX_IRX_P3 11
Cardbus---> C238 1 2 0.1U_0402_10V7K~D PCIE_ITX_CBPRX_N4 H27 AC29 DMI_MRX_ITX_N3
30 PCIE_ITX_C_CBRX_N4 C239 1 PETN4 DMI3TXN DMI_MRX_ITX_N3 11
30 PCIE_ITX_C_CBRX_P4
2 0.1U_0402_10V7K~D PCIE_ITX_CBPRX_P4 H26 PETP4 DMI3TXP AC28 DMI_MRX_ITX_P3
DMI_MRX_ITX_P3 11
C C
PCIE_IRX_EXPTX_N5 E29 T26 CLK_DMI_ICH#
28 PCIE_IRX_EXPTX_N5 PERN5 DMI_CLKN CLK_DMI_ICH# 6
PCIE_IRX_EXPTX_P5 E28 T25 CLK_DMI_ICH Within 500 mils
28 PCIE_IRX_EXPTX_P5 PERP5 DMI_CLKP CLK_DMI_ICH 6
Express card---> C240 1 2 0.1U_0402_10V7K~D PCIE_ITX_EXPRX_N5 F27
28 PCIE_ITX_C_EXPRX_N5 C241 1 PETN5
28 PCIE_ITX_C_EXPRX_P5 2 0.1U_0402_10V7K~D PCIE_ITX_EXPRX_P5 F26 PETP5 DMI_ZCOMP AF29
AF28 DMI_IRCOMP R221 1 2 24.9_0402_1% +1.5VS
PCIE_IRX_GLANTX_N6 DMI_IRCOMP
24 PCIE_IRX_GLANTX_N6 C29 PERN6/GLAN_RXN
PCIE_IRX_GLANTX_P6 C28 AC5 USBP0-
24 PCIE_IRX_GLANTX_P6 PERP6/GLAN_RXP USBP0N USBP0- 29
C242 1 2 0.1U_0402_10V7K~D PCIE_ITX_GLANRX_N6 D27 AC4 USBP0+
24 PCIE_ITX_C_GLANRX_N6 PETN6/GLAN_TXN USBP0P USBP0+ 29
10/100/1G LAN ---> C243 1 2 0.1U_0402_10V7K~D PCIE_ITX_GLANRX_P6 D26 AD3 USBP1-
24 PCIE_ITX_C_GLANRX_P6 PETP6/GLAN_TXP USBP1N USBP1- 30
USBP1+ USB Port
D23
USBP1P AD2
AC1 USBP2-
USBP1+ 30 Device
SPI_CLK USBP2N USBP2- 30
USBP2+ 0
SPI_CS1#R
D24
F23
SPI_CS0# USBP2P AC2
AA5
USBP2+ 30 USB&ESATA
20 SPI_CS1#R SPI_CS1#/GPIO58/CLGPIO6 USBP3N
USBP3P AA4
USBP4-
1 Reader board
D25 SPI_MOSI USBP4N AB2 USBP4- 27
USBP4+ 2
E23 AB3 USBP4+ 27 USB board
SPI
+3VALW SPI_MISO USBP4P USBP5-
USBP5N AA1 USBP5- 27
ESATA_USB_OC# USBP5+ 3
R222 1 2 10K_0402_5% ESATA_USB_OC#
29 ESATA_USB_OC#
USB_OC1#
N4
N5
OC0#/GPIO59 USBP5P AA2
W5 USBP6-
USBP5+ 27 NC
30 USB_OC1# OC1#/GPIO40 USBP6N USBP6- 28
USB_OC2# USBP6+
R223 1 2 10K_0402_5% USB_OC1#
30 USB_OC2#
USB_OC3#
N6
P6
OC2#/GPIO41 USB USBP6P W4
Y3 USBP7-
USBP6+ 28 4 WLAN
OC3#/GPIO42 USBP7N USBP7- 28
USB_OC4# USBP7+ 5
R882 1 2 10K_0402_5% USB_OC2# USB_OC5#
M1
N2
OC4#/GPIO43 USBP7P Y2
W1
USBP7+ 28 WWAN
USB_OC6# OC5#/GPIO29 USBP8N
R224
M4 OC6#/GPIO30 USBP8P W2 6 WPAN
1 2 10K_0402_5% USB_OC3# USB_OC7# M3 OC7#/GPIO31 USBP9N V2 USBP9-
USBP9- 32
USB_OC8# USBP9+ 7
R225 1 2 10K_0402_5% USB_OC4# USB_OC9#
N3
N1
OC8#/GPIO44 USBP9P V3
U5 USBP10-
USBP9+ 32 Express
USB_OC10# USBP10+ 8
B R226 1 2 10K_0402_5% USB_OC5# USB_OC11#
P5
P3
OC10#/GPIO46 USBP10P U4
U1 USBP11-
USBP10+ 30 NC B
USBP11+ 9
R227 1 2 10K_0402_5% USB_OC6# 2 1 USBRBIAS AG2
USBP11P U2 USBP11+ 30 Touch screen
R232 USBRBIAS
R228
AG1 USBRBIAS# 10 Bluetooth
1 2 10K_0402_5% USB_OC7# 22.6_0402_1%
Within 500 mils ICH9M_FCBGA676~D 11
R229 1 2 10K_0402_5% USB_OC8# Camera
R230 1 2 10K_0402_5% USB_OC9#
R231 1 2 10K_0402_5% USB_OC10#
R883 1 2 10K_0402_5% USB_OC11#
A A
LA-5151P
5 4 3 2 1
5 4 3 2 1
U6E
+5VS +3VS +RTCVCC +1.05V_VCCP AA26 H5
VSS[1] VSS[107]
20 mils U6F AA27
VSS[2] VSS[108]
J23
A23 VCCRTC VCC1_05[1] A15 1634mA AA3 VSS[3] VSS[109] J26
2
VCC1_05[2] B15 AA6 VSS[4] VSS[110] J27
0.1U_0402_16V4Z~D
C244
0.1U_0402_16V4Z~D
C248
0.1U_0402_16V4Z~D
C249
R233 +ICH_V5REF_RUN 2mA A6 C15 AB1 AC22
100_0402_5% D2 V5REF VCC1_05[3] VSS[5] VSS[111]
VCC1_05[4] D15 1 1 AA23 VSS[6] VSS[112] K28
SDMK0340L-7-F_SOD323-2~D 1 1 +ICH_V5REF_SUS 2mA AE1 E15 C245 AB28 K29
V5REF_SUS VCC1_05[5] 0.1U_0402_16V4Z~D VSS[7] VSS[113]
F15 AB29 L13
1
VCC1_05[6] VSS[8] VSS[114]
646mA AA24 VCC1_5_B[1] VCC1_05[7] L11 AB4 VSS[9] VSS[115] L15
http://mycomp.su/x/
+ICH_V5REF_RUN 2 2
AA25 VCC1_5_B[2] VCC1_05[8] L12 AB5 VSS[10] VSS[116] L2
2 2
1 20 mils AB24
VCC1_5_B[3] VCC1_05[9]
L14 AC17
VSS[11] VSS[117]
L26
AB25 VCC1_5_B[4] VCC1_05[10] L16 AC26 VSS[12] VSS[118] L27
C246 AC24 L17 L6 AC27 L5
1U_0603_10V6K~D VCC1_5_B[5] VCC1_05[11] 1UH_GLF2012T1R0M_20%_0805~D VSS[13] VSS[119]
AC25 L18 AC3 L7
D 2 VCC1_5_B[6] VCC1_05[12] VSS[14] VSS[120] D
AD24 VCC1_5_B[7] VCC1_05[13] M11 1 2 +1.5VS AD1 VSS[15] VSS[121] M12
AD25 VCC1_5_B[8] VCC1_05[14] M18 AD10 VSS[16] VSS[122] M13
0.01U_0402_16V7K~D
C247
AE25 P11 1 1 AD12 M14
VCC1_5_B[9] VCC1_05[15] C250 VSS[17] VSS[123]
AE26 VCC1_5_B[10] VCC1_05[16] P18 AD13 VSS[18] VSS[124] M15
+5VALW +3VALW AE27 T11 10U_0805_10V4Z~D AD14 M16
VCC1_5_B[11] VCC1_05[17] VSS[19] VSS[125]
AE28 T18 AD17 M17
VCC1_5_B[12] VCC1_05[18] 2 2 VSS[20] VSS[126]
AE29 VCC1_5_B[13] VCC1_05[19] U11 AD18 VSS[21] VSS[127] M23
1
CORE
F25 U18 AD21 M28
R234 VCC1_5_B[14] VCC1_05[20] L5 VSS[22] VSS[128]
G25 V11 AD28 M29
100_0402_5% D3 VCC1_5_B[15] VCC1_05[21] BLM18PG600SN1_0603~D VSS[23] VSS[129]
H24 VCC1_5_B[16] VCC1_05[22] V12 AD29 VSS[24] VSS[130] N11
SDMK0340L-7-F_SOD323-2~D H25 V14 1 2 +1.05V_VCCP AD4 N12
VCC1_5_B[17] VCC1_05[23] VSS[25] VSS[131]
J24 V16 AD5 N13
2
+ICH_V5REF_SUS VCC1_5_B[18] VCC1_05[24] VSS[26] VSS[132]

J25 VCC1_5_B[19] VCC1_05[25] V17 1 AD6 VSS[27] VSS[133] N14
20 mils K24
VCC1_5_B[20] VCC1_05[26]
V18 AD7
VSS[28] VSS[134]
N15
1 K25 C251 AD9 N16
VCC1_5_B[21] VSS[29] VSS[135]
L23 VCC1_5_B[22] VCCDMIPLL R29 +VCCDMIPLL 4.7U_0603_6.3V6M~D AE12 VSS[30] VSS[136] N17
C252 2
L24
VCC1_5_B[23] 23mA AE13
VSS[31] VSS[137]
N18
1U_0603_10V6K~D L25 VCC1_5_B[24] VCC_DMI[1] W23 +VCC_DMI_ICH AE14 VSS[32] VSS[138] N26
2 +1.05V_VCCP
M24 VCC1_5_B[25] VCC_DMI[2] Y23 48mA AE16 VSS[33] VSS[139] N27
M25 AE17 P12
VCC1_5_B[26] VSS[34] VSS[140]
N23 VCC1_5_B[27] V_CPU_IO[1] AB23 AE2 VSS[35] VSS[141] P13
N24 VCC1_5_B[28] V_CPU_IO[2] AC23 2mA AE20 VSS[36] VSS[142] P14
0.1U_0402_16V4Z~D
C253
0.1U_0402_16V4Z~D
C254
4.7U_0603_6.3V6M~D
C255
N25 1 AE24 P15
+1.5VS L7 +1.5VS_PCIE_ICH VCC1_5_B[29] VSS[37] VSS[143]
P24 VCC1_5_B[30] VCC3_3[1] AG29 +3VS 1 1 AE3 VSS[38] VSS[144] P16
BLM21PG331SN1D_2P~D 40 mils P25 VCC1_5_B[31] AE4 VSS[39] VSS[145] P17
VCCA3GP
1 2 R24 AJ6 +3VS 1 AE6 P2
VCC1_5_B[32] VCC3_3[2] 2 VSS[40] VSS[146]
0.1U_0402_16V4Z~D
C259
0805 1 R25 VCC1_5_B[33] 1 2 2
AE9 VSS[41] VSS[147] P23
22U_0805_6.3V6M~D
C257
22U_0805_6.3V6M~D
C258
2.2U_0603_6.3V6K~D
C260
0.1U_0402_16V4Z~D
C262
1 1 1 R26 VCC1_5_B[34] VCC3_3[7] AC10 +3VS AF13 VSS[42] VSS[148] P28
C256 + R27 AF16 P29
VCC1_5_B[35] 1 2 VSS[43] VSS[149]
220U_D2_4VY_R15M~D T24 AD19 C261 AF18 P4
VCC1_5_B[36] VCC3_3[3] 0.1U_0402_16V4Z~D 2 VSS[44] VSS[150]
T27 AF20 AF22 P7
2 2 2 2 VCC1_5_B[37] VCC3_3[4] VSS[45] VSS[151]
VCCP_CORE
T28 AG24 AH26 R11
C VCC1_5_B[38] VCC3_3[5] 2 VSS[46] VSS[152] C
T29 VCC1_5_B[39] VCC3_3[6] AC20 AF26 VSS[47] VSS[153] R12
U24
VCC1_5_B[40] 308mA AF27
VSS[48] VSS[154]
R13
U25 B9 +3VS AF5 R14
VCC1_5_B[41] VCC3_3[8] VSS[49] VSS[155]
V24 VCC1_5_B[42] VCC3_3[9] F9 1 AF7 VSS[50] VSS[156] R15
V25 G3 AF9 R16
VCC1_5_B[43] VCC3_3[10] C263 VSS[51] VSS[157]
U23 G6 AG13 R17
VCC1_5_B[44] VCC3_3[11] 0.1U_0402_16V4Z~D VSS[52] VSS[158]
W24 VCC1_5_B[45] VCC3_3[12] J2 AG16 VSS[53] VSS[159] R18
W25 J7 2 AG18 R28
PCI
VCC1_5_B[46] VCC3_3[13] R878 VSS[54] VSS[160]
K23 VCC1_5_B[47] VCC3_3[14] K7 AG20 VSS[55] VSS[161] T12
Y24 0_0402_5% AG23 T13
+1.5VS L8 VCC1_5_B[48] VSS[56] VSS[162]
Y25 AJ4 11mA 1 2 +3VS AG3 T14
10UH_LB2012T100MR_20%_0805~D VCC1_5_B[49] VCCHDA VSS[57] VSS[163]
1 AG6 VSS[58] VSS[164] T15
1 2 +VCCSATAPLL 47mA AJ19 AJ3 11mA 1 2 C264 AG9 T16
VCCSATAPLL VCCSUSHDA +3VALW_S5_ICH VSS[59] VSS[165]
1 R880 0.1U_0402_16V4Z~D AH12 T17
VSS[60] VSS[166]
C268
C266
10U_0805_10V4Z~D
1U_0603_10V4Z~D
AC16 AC8 0_0402_5% AH14 T23

+1.5VS VCC1_5_A[1] VCCSUS1_05[1] T75 2 VSS[61] VSS[167]
1 1 AD15 F17 C265 AH17 B26
VCC1_5_A[2] VCCSUS1_05[2] T76 0.1U_0402_16V4Z~D VSS[62] VSS[168]
1 AD16 AH19 U12
VCC1_5_A[3] 2 VSS[63] VSS[169]
ARX
C267 AE15 VCC1_5_A[4] VCCSUS1_5[1] AD8 +VCCSUS1_5_ICH_1 AH2 VSS[64] VSS[170] U13
1U_0603_10V4Z~D AF15 T77 AH22 U14
2 2 VCC1_5_A[5] +VCCSUS1_5_ICH_2 VSS[65] VSS[171]
AG15 F18 1 2 AH25 U15
2 VCC1_5_A[6] VCCSUS1_5[2] C269 0.1U_0402_16V4Z~D VSS[66] VSS[172]
AH15 VCC1_5_A[7] AH28 VSS[67] VSS[173] U16
AJ15 AH5 U17
VCC1_5_A[8] VSS[68] VSS[174]
A18 +3VALW _ICH 1 2 +3VALW_S5_ICH AH8 AD23
VCCPSUS VCCSUS3_3[1] VSS[69] VSS[175]
+1.5VS 1342mA AC11 VCC1_5_A[9] VCCSUS3_3[2] D16 AJ12 VSS[70] VSS[176] U26
1 AD11 D17 R974 AJ14 U27
C270 VCC1_5_A[10] VCCSUS3_3[3] 0_0603_5% VSS[71] VSS[177]
AE11 E22 AJ17 U3
VCC1_5_A[11] VCCSUS3_3[4] VSS[72] VSS[178]
ATX
1U_0603_10V4Z~D AF11 R975 AJ8 V1

VCC1_5_A[12] 0_0603_5% VSS[73] VSS[179]
AG10
VCC1_5_A[13] 212mA B11
VSS[74] VSS[180]
V13
2 AG11 AF1 +3VALW_USB_ICH 1 2 B14 V15
VCC1_5_A[14] VCCSUS3_3[5] +3VALW_S5_ICH VSS[75] VSS[181]
AH10 VCC1_5_A[15] B17 VSS[76] VSS[182] V23
C271
C272
C273
0.022U_0402_16V7K~D
0.022U_0402_16V7K~D
0.1U_0402_16V4Z~D
AJ10 T1 B2 V28
T2 B20 V29
B VCCSUS3_3[7] VSS[78] VSS[184] B
AC9 VCC1_5_A[17] VCCSUS3_3[8] T3 1 1 1 B23 VSS[79] VSS[185] V4
VCCSUS3_3[9]
T4 Reduce ICH power sumption at S5 mode. B5
VSS[80] VSS[186]
V5
AC18 T5 B8 W26
AC19 VCC1_5_A[19] VCCSUS3_3[11] T6 C26 VSS[82] VSS[188] W27
U6 2 2 2 +3VALW +3VALW_S5_ICH C27 W3
+1.5VS VCCSUS3_3[12] VSS[83] VSS[189]
VCCPUSB
AC21 VCC1_5_A[20] VCCSUS3_3[13] U7 E11 VSS[84] VSS[190] Y1

1 V6 R1022 1 @ 2 0_0805_5% E14 Y28
VCCSUS3_3[14] VSS[85] VSS[191]
G10 V7 E18 Y29
C274 VCC1_5_A[21] VCCSUS3_3[15] VSS[86] VSS[192]
G9 VCC1_5_A[22] VCCSUS3_3[16] W6 E2 VSS[87] VSS[193] Y4
0.1U_0402_16V4Z~D W7 E21 Y5
VCCSUS3_3[17] VSS[88] VSS[194]
D
2
1U_0603_10V6K~D
AC12 Y6 B+_BIAS 6 20mil E24 AG28
S
AC13 VCC1_5_A[24] VCCSUS3_3[19] Y7 1 5 4 E5 VSS[90] VSS[196] AH6
R972
C966
300K_0402_5%
+1.5VS AC14 T7 C275 2 E8 AF2
2
1 0.1U_0402_16V4Z~D 1 Q47 F16 B25
+VCCCL1_05_ICH SI3456BDV-T1-E3_TSOP6~D VSS[92] VSS[198]
11mA AJ5 G22 1 2 F28
G
C276 VCCUSBPLL VCCCL1_05 2 VSS[93]
F29 A1
3
0.1U_0402_16V4Z~D +VCCCL1_5_ICH VSS[94] VSS_NCTF[1]
2
11mA AA7
VCC1_5_A[26] VCCCL1_5
G23 G12
VSS[95] VSS_NCTF[2]
A2
USB CORE
AB6 19/73/73mA G14 A28
1
VCC1_5_A[27] VSS[96] VSS_NCTF[3]
AB7
VCC1_5_A[28] VCCCL3_3[1]
A24 +3VS 1 @ 1 G18
VSS[97] VSS_NCTF[4]
A29
C277
1U_0603_10V4Z~D
AC6 B24 @ C278 G21 AH1

VCC1_5_A[29] VCCCL3_3[2] 0.1U_0402_16V4Z~D VSS[98] VSS_NCTF[5]
AC7 VCC1_5_A[30] G24 VSS[99] VSS_NCTF[6] AH29
1
D
2
G26 AJ1
C279 1 +VCCLAN1_05_INT_ICH 2 2 SYSON# VSS[100] VSS_NCTF[7]
2 0.1U_0402_16V4Z~D A10 33 SYSON# 2 Q46 R973 G27 AJ2
VCCLAN1_05[1] G SSM3K7002FU_SC70-3~D 2M_0402_5% VSS[101] VSS_NCTF[8]
A11 VCCLAN1_05[2] G8 VSS[102] VSS_NCTF[9] AJ28
S H2 AJ29
3
VSS[103] VSS_NCTF[10]
+3VS A12 H23 B1
1
VCCLAN3_3[1] VSS[104] VSS_NCTF[11]
1 B12 VCCLAN3_3[2] H28 VSS[105] VSS_NCTF[12] B29
C280 H29
0.1U_0402_16V4Z~D VSS[106]
23mA A27 VCCGLANPLL ICH9M_FCBGA676~D
2 +1.5VS_PCIE_ICH
GLAN POWER
80mA D28 VCCGLAN1_5[1]

D29 VCCGLAN1_5[2]
A A
E26 VCCGLAN1_5[3]
L9 E27
VCCGLAN1_5[4]
C281
4.7U_0603_6.3V6M~D
1UH_GLF2012T1R0M_20%_0805~D 1
1 2 +VCCGLANPLL A26
+1.5VS +3VS VCCGLAN3_3
C282
C283
10U_0805_10V4Z~D
2.2U_0603_6.3V6K~D
1mA
2
ICH9M_FCBGA676~D DELL CONFIDENTIAL/PROPRIETARY
1 1
2 2 TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, ICH9M (5/5)
LA-5151P
5 4 3 2 1
A B C D E
+3VALW L10
W=60mils FBMA-L11-322513-201LMA40T_1210 +LAN_IO
D
6 W=60mils
S
1 5 4 1 2
C284 2 1 1 1
C285
22U_1206_6.3V6M~D
C286
0.1U_0402_10V7K~D
C287
1U_0603_10V6K~D 1 @
22U_1206_6.3V6M~D
Q3
http://mycomp.su/x/
2 SI3456BDV-T1-E3_TSOP6~D
3
2 2 2 +LAN_VDD
R236 W=60mils
2 1 EN_WOL L11
B+_BIAS
300K_0402_5% 1 2
1 4.7UH_1008HC-472EJFS-A_5%_1008 1
1
1
2M_0402_5%
R1006
1 1
1
D C958 C306 C307
2 2200P_0402_50V7K~D 0.1U_0402_10V7K~D 22U_1206_6.3V6M~D
31 EN_WOL# 2
G
Q4 S 2 2
2
SSM3K7002FU_SC70-3~D +LAN_IO
These caps close to U9: Pin 4
1
+LAN_DVDD12
These components close to U9: Pin 48
R947
3.6K_0402_5% ( Should be place within 200 mils )
U9 1 2
2
PCIE_IRX_C_GLANTX_P6 LAN_LED3
A00 Modify
C304 2 1 .1U_0402_16V7K~D 20 33 W=30mils W=30mils @C302
@ C302 @ C303
22 PCIE_IRX_GLANTX_P6 HSOP LED3/EEDO LAN_LED2 0.1U_0402_10V7K~D 0.01U_0402_16V7K~D
34
C305 2 PCIE_IRX_C_GLANTX_N6 LED2/EEDI/AUX LAN_LED1 2 1
1 .1U_0402_16V7K~D 21 HSON LED1/EESK 35 2 @ 1 +LAN_VDD
22 PCIE_IRX_GLANTX_N6 R884 0_0603_5%
EECS 32
PCIE_ITX_C_GLANRX_P6 15 1 2
22 PCIE_ITX_C_GLANRX_P6 HSIP LAN_LED0
38 C310 1U_0603_10V6K~D
PCIE_ITX_C_GLANRX_N6 LED0
22 PCIE_ITX_C_GLANRX_N6 16 HSIN 1 2
RTL8111DL 2 LAN_MDIP0 C311 1U_0603_10V6K~D
MDIP0 LAN_MDIN0
6 CLK_PCIE_GLAN 17 REFCLK_P MDIN0 3
18 5 LAN_MDIP1
6 CLK_PCIE_GLAN# REFCLK_N MDIP1
6 LAN_MDIN1 These caps close to U9: Pin 19
MDIN1 LAN_MDIP2
25 CLKREQB MDIP2 8
6 GLAN_CLKREQ# LAN_MDIN2
MDIN2 9
27 11 LAN_MDIP3 R246
20,27,28 PCI_RST# PERSTB MDIP3 LAN_MDIN3 +LAN_DVDD12
12 220_0402_5% JRJ45
MDIN3 LAN_LED0 LAN_ACTIVITY#
1 2 13
R239 1 +LAN_DVDD12 Yellow LED-
2 2.49K_0402_1% 46 4 +LAN_DVDD12 2 @ 1 +LAN_VDD
2 RSET FB12 2
+LAN_IO 12 Yellow LED+
21,27,28,31 ICH_PCIE_WAKE# R235
26
LANWAKEB SROUT12
48 W=60mils
C296
0.1U_0402_10V7K~D
C295
0.1U_0402_10V7K~D
C294
0.1U_0402_10V7K~D
C293
0.1U_0402_10V7K~D
C292
0.1U_0402_10V7K~D
+3VS R240 1 2 1K_0402_5% ISOLATEB 28 1 1 1 1 1 0_0603_5% RJ45_TX3- 8
ISOLATEB PR4-
EVDD12 19
@ R241 1 2 0_0402_5% LAN_CKTAL1 41 30 A00 Modify RJ45_TX3+ 7
21 LAN_LOPWEN CKTAL1 DVDD12 PR4+
2
LAN_CKTAL2 42 36
R242 CKTAL2 DVDD12 2 2 2 2 2 RJ45_RX1-
DVDD12 13 6 PR2-
15K_0402_5% 10
AVDD12 RJ45_TX2- 5 PR3-
39
1
AVDD12 RJ45_TX2+
W=40mils 4
PR3+
21 LAN_CABDT 23 GPO VDDSR 44
24 45 RJ45_RX1+ 3
NC VDDSR PR2+
These caps close to U9: Pin 10, 13, 30, 36, 39 RJ45_TX0-
7 GND VDD33 29 2 PR1-
14 GND VDD33 37 GND 14
31 These caps close to U9: Pin 44.45 R244 RJ45_TX0+ 1
GND 220_0402_5% PR1+
47 GND AVDD33 1 GND 15
40 ( Should be place within 200 mils ) LED1_LED3 1 2 LINK_100_1000# 11
AVDD33 Orange LED-
LAN_CKTAL1
22
EGND ENSR
43 +LAN_IO
@
A00 Modify R245
+LAN_IO 10 Yellow LED+
2 1 +LAN_IO 220_0402_5%
LAN_CKTAL2 RTL8111DL-GR_LQFP48_7X7 R942 0_0805_5% LED2_LED3 1 2 LINK_10_1000# 9
Green LED-
C308
22U_1206_6.3V6M~D
Y3 1 1
1 2 C309 FOX_JM3611A-R4953B-7F
2 2 0.1U_0402_10V7K~D CONN@
C318 25MHZ_20PF_1BX25000CK1A C319
33P_0402_50V8J~D 27P_0402_50V8J~D 2 2
1 1
3 3
These caps close to U9: Pin 1.29, 37, 40 LAN_MDIN3 C873 1

+LAN_IO 2 6.8P_0402_50V8C~D
TS1
RP1 1 1 1 1 LAN_MDIP3 C874 1 2 6.8P_0402_50V8C~D
C288
C289
C290
C291
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C320 1 2 0.01U_0402_16V7K~D V_DAC 1 TCT1 MCT1 24 5 4
LAN_MDIN3 2 23 RJ45_TX3- 6 3 LAN_MDIN1 C875 1 2 6.8P_0402_50V8C~D
LAN_MDIP3 TD1+ MX1+ RJ45_TX3+
3 TD1- MX1- 22 7 2
2 2 2 2 LAN_MDIN2 C876 1
8 1 2 6.8P_0402_50V8C~D
C321 1 2 0.01U_0402_16V7K~D V_DAC 4 21
LAN_MDIN2 TCT2 MCT2 RJ45_TX2- 75_1206_8P4R_5% LAN_MDIP2 C877 1
5 TD2+ MX2+ 20 2 6.8P_0402_50V8C~D
LAN_MDIP2 6 19 RJ45_TX2+ 2
TD2- MX2- C323 LAN_MDIP1 C878 1 2 6.8P_0402_50V8C~D
C322 1 2 0.01U_0402_16V7K~D V_DAC 7 TCT3 MCT3 18 1000P_1206_2KV7~D
LAN_MDIN1 8 17 RJ45_RX1- LAN_MDIN0 C879 1 2 6.8P_0402_50V8C~D
LAN_MDIP1 TD3+ MX3+ RJ45_RX1+ 1 D4 D6
9 16
TD3- MX3- LAN_LED2 1 LED2_LED3 LAN_LED1 1 LED1_LED3 LAN_MDIP0 C880 1
2 2 2 6.8P_0402_50V8C~D
C324 1 2 0.01U_0402_16V7K~D V_DAC 10 15
LAN_MDIN0 TCT4 MCT4 RJ45_TX0- SDMK0340L-7-F_SOD323-2~D SDMK0340L-7-F_SOD323-2~D
11 14
LAN_MDIP0 TD4+ MX4+ RJ45_TX0+
12 TD4- MX4- 13
D5 D7
LAN_LED3 1 2 LAN_LED3 1 2
BOTH_GST5009-LF SDMK0340L-7-F_SOD323-2~D SDMK0340L-7-F_SOD323-2~D
4 4
LEDS1-0 00 01 10 11
LED0 Tx / Rx Tx / Rx Tx LINK10 / ACT

LED1 LINK100 LINK10 /100 / 1000 LINK LINK100 / ACT
LED2 LINK10 LINK10 / 100 Rx FULL PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Gigabit LAN_RTL8111DL
LED3 LINK1000 LINK1000 FULL LINK1000 / ACT NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
LA-5151P
A B C D E
A B C D E F G H
+3VS +3VS
R10 Modify C968 R10 Moidify (short directly) R10 Moidify (short directly)
1 2
+3VS +DVDD_AUDIO +3VS +AVDD_AUDIO +5VS 2
+3VS R1549 1 2 20K_0402_5% 0.1U_0402_16V4Z~D
5
U46 2 @ 1 +AVDD_AUDIO 2 @ 1 C325
EAPD# 1 1U_0603_10V4Z~D
P
IN1 1
0.1U_0402_10V6K~D
C326
1U_0402_6.3V6K~D
C330
0.1U_0402_10V6K~D
C331
10U_0603_6.3V6M~D
C332
1U_0402_6.3V6K~D
C333
0.1U_0402_10V6K~D
C327
10U_0603_6.3V6M~D
C334
1U_0402_6.3V6K~D
C335
0.1U_0402_10V6K~D
C328
O 4 EA_EC_SPK_MUTE# R247 R248
EC_SPK_HP_MUTE# 2 0_0603_5% 0_0603_5%
19
10
31 EC_SPK_HP_MUTE# IN2 1 1 1 1 1
G
1 1 1 1 U10
http://mycomp.su/x/
1 2 74AHC1G08GW_SOT353-5~D
PVDD
SVDD
+3VS
3
R1550 10K_0402_5% 14 11 HP1_AMP_R
2 2 2 2 2 SHDNR# OUTR
+3VS 2 2 2 2 HP_AMP_MUTE# HP1_AMP_L
18 SHDNL# OUTL 9
C978
1 C1507 1
1 2
270P_0402_50V7K~D 21
PAD
5
U47 0.1U_0402_16V4Z~D 75mA C336 R1028 1 2
EAPD# 132mA 2.2U_0805_10V7K~D 2K_0402_1%
25
38
1 4
P
IN1 NC-4
9
1
4 EA_EC_SUB_MUTE# U11 HP1_CD_R 1 2 HP1_CD_R1 1 2 HP1_CD_R2 15
EC_SUB_MUTE# O INR
2 6
DVDD_IO
AVDD1
AVDD2
DVDD_CORE
DVDD_CORE
31 EC_SUB_MUTE#
G
IN2 HP1_CD_L HP1_CD_L1 1 HP1_CD_L2 NC-6
1 2 2 13 INL
+3VS 1 2 74AHC1G08GW_SOT353-5~D C1508 8
3
R1551 10K_0402_5% C337 R1029 270P_0402_50V7K~D NC-8
39 HP1_CD_L 2.2U_0805_10V7K~D 2K_0402_1% 1 2 12
+3VS PORTA_L HP1_CD_R NC-12
41
C950 PORTA_R C338 1
19 HDA_BITCLK_AUDIO 6 37 2 1U_0603_10V4Z~D 1 16
BITCLK VREFOUT-A C1P NC-16
1 2
PGND
SGND
1 2 HDA_SDIN0_R 8 21 3 20
PVss
SVss
0.1U_0402_10V7K~D 19 HDA_SDIN0 SDI_CODEC PORTB_L C1N NC-20
R249 33_0402_5% 22
PORTB_R
5
U48 5 28
EA_EC_SPK_MUTE# 1 19 HDA_SDOUT_AUDIO SDO VREFOUT-B MAX4411ETP+T_TQFN20_4X4
P
17
IN1
O 4 SPK_AMP_MUTE# 26 19 HDA_SYNC_AUDIO
10 SYNC PORTC_L 23 Int. Speaker and C339
HP_JD 2 24
IN2 PORTC_R Sub woofer
G
19 HDA_RST_AUDIO# 11 29 2 1
74AHC1G08GW_SOT353-5~D RESET# VREFOUT-C
3
35 SPK_CD_L 1U_0603_10V4Z~D
PORTD_L SPK_CD_R SPK_CD_L 26
2 36 SPK_CD_R 26
30 DMIC_CLK VOL_UP/DMIC_CLK/GPIO1 PORTD_R
+3VS 4 14 MIC_CD_L
C951 30 DMIC0 VOL_DN/DMIC_0/GPIO2 PORTE_L
15 MIC_CD_R Front R251 L14 JHP1
PORTE_R
100P_0402_50V8J~D
100P_0402_50V8J~D
1 2 1 @ 1 @ 30 31 +MIC1_VREFO 68_0603_1% BLM18BD601SN1D_0603~D 1
DMIC1/GPIO5 VREFOUT-E
C341
HP1_AMP_L 1 2 HP1_AMP_L1 1 2 HP1_AMP_L1_JK 2
C342
0.1U_0402_10V7K~D SENSE_A 13 16 HP2_CD_L 6
SENSE_A PORTF_L
5
U49 SENSE_B 34 17 HP2_CD_R HP1_AMP_R 1 2 HP1_AMP_R1 1 2 HP1_AMP_R1_JK 3

EA_EC_SUB_MUTE# 1 2 2 SENSE_B PORTF_R L15
32 7
P
IN1 SENSE_C SHLD1

4 43 R252 BLM18BD601SN1D_0603~D HP1_JD 4 8
2 O SUB_AMP_MUTE# 26 PORTG_L SHLD2 2
HP_JD 2 44 68_0603_1% 9
IN2 PORTG_R NPTH1
G
PC_BEEP 12 5 10
PCBEEP NPTH2
74AHC1G08GW_SOT353-5~D 45 Place close to Jack 1 1
3
PORTH_L
1000P_0402_50V7K~D
C343
1000P_0402_50V7K~D
C344
EAPD# 47 46 FOX_JA6333L-B5S4-7F
Int. 60k pull up. EAPD/SPDIF IN/GPIO0 PORTH_R CONN@
D31
+3VS HP1_AMP_L1_JK
A00 Modify 2 2
18 PORTI_L 3
C965 19 1
PORTI_C @ R1020 HP1_AMP_R1_JK
1 2 20 PORTI_R SPDIF OUT0 48 2
SPDIF OUT1/GPIO3 40 1 2 ACIN 21,31,45,46
0.1U_0402_10V7K~D @ PACDN042Y3R_SOT23-3~D
0_0402_5%
5
U108
HP1_JD 1 7
P
INB HP_JD DVSS

Y 4 26 AVSS1 VREFFILT 27
HP2_JD 2 42 33 1 2
INA AVSS2 CAP2 +MIC1_VREFO
G
C345 1000P_0402_50V7K~D
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
TC7SZ02FU_SSOP5 1 1 +MIC1_VREFO W=10 mil
3
1
+3VS +3VS
C347
C348
C967 92HD73C1X5PRGXC1X8_QFP48_7X7 R256 R257
1 2 Rear or MIC 4.7K_0402_5% 4.7K_0402_5%
1
2 2
R1552 0.1U_0402_10V7K~D C349 L16 JMIC1
2
5
10K_0402_5% U50 2.2U_0603_10V6K~D BLM18BD601SN1D_0603~D 1

EA_EC_SPK_MUTE#1 MIC_CD_L 1 2 MIC_CD_L1 1 2 MIC_CD_L1_JK 2
P
IN1 HP_AMP_MUTE#
4 6
2
HP_JD# O MIC_CD_R MIC_CD_R1

2 IN2 1 2 1 2 MIC_CD_R1_JK 3
G
Reserved for TEST +3VS L17 SHLD1 7

1
D 74AHC1G08GW_SOT353-5~D C350 BLM18BD601SN1D_0603~D MIC_JD 4 SHLD2 8

3
HP_JD 2 Q49 2.2U_0603_10V6K~D 9

NPTH1
C352
C353
100P_0402_50V8J~D
100P_0402_50V8J~D
G SSM3K7002FU_SC70-3~D R268 1 2 0_0805_5% 2 Place close to Jack 5 NPTH2 10
S @ R269 1 2 0_0805_5%
3
3 @ R270 3
1 2 0_0805_5% C351 1 1 FOX_JA6333L-B5S4-7F
1U_0603_10V4Z~D CONN@
1 D32
MIC_CD_L1_JK
GND AGND
19
10
3
+AVDD_AUDIO U12 1 2 2
R545 2 MIC_CD_R1_JK
PVDD
SVDD
5.1K_0402_1% 14 11 HP2_AMP_R
SENSE_B SHDNR# OUTR @ PACDN042Y3R_SOT23-3~D
1 2
HP_AMP_MUTE# 18 9 HP2_AMP_L
SHDNL# OUTL
1000P_0402_50V7K~D
1
1
1
R547
R546
C866
20K_0402_1%
39.2K_0402_1%
+3VS +3VS C1529 270P_0402_50V7K~D 21

PAD
2
R1548 1 2 Center
2.2U_0805_10V7K~D 2K_0402_1% 4 R261 L19 JHP2
NC-4
1
1
100K_0402_5%
100K_0402_5%
HP2_CD_R C354 1 2 HP2_CD_R1 1 2 HP2_CD_R2 15 68_0603_1% BLM18BD601SN1D_0603~D 1

2
INR
R979
R978
6 HP2_AMP_L 1 2 HP2_AMP_L1 1 2 HP2_AMP_L1_JK 2

HP2_CD_L C355 1 HP2_CD_L1 HP2_CD_L2 NC-6
2 1 2 13 6
INL
6
R1547 C1530 270P_0402_50V7K~D 8 HP2_AMP_R 1 2 HP2_AMP_R1 1 2 HP2_AMP_R1_JK 3

2.2U_0805_10V7K~D NC-8 L18
2K_0402_1% 1 2 SHLD1 7
2
12 R262 BLM18BD601SN1D_0603~D HP2_JD 4 SHLD2 8

MIC_JD HP2_JD NC-12 68_0603_1% 1226 Modify
2 5 NPTH1 9
Q42B C358 1 2 1U_0603_10V4Z~D 1 16 5 NPTH2 10
C1P NC-16
Q42A 2N7002DW-7-F_SOT363-6~D Place close to Jack 1 1
1
PGND
SGND
C356
C357
1000P_0402_50V7K~D
1000P_0402_50V7K~D
2N7002DW-7-F_SOT363-6~D 3 20 FOX_JA6333L-B5S4-7F
PVss
SVss
C1N NC-20 CONN@

+AVDD_AUDIO
A00 Modify 2 2
MAX4411ETP+T_TQFN20_4X4
D33
5
17
R543
5.1K_0402_1% 3 HP2_AMP_L1_JK
SENSE_A 1 2 1
2 HP2_AMP_R1_JK
C360
1000P_0402_50V7K~D
1U_0603_10V4Z~D
1 C945 R264 1
1
4 4
39.2K_0402_1%
+3VS 0.1U_0402_16V4Z~D 499K_0402_1% @ PACDN042Y3R_SOT23-3~D

C865
BEEP_C# PC_BEEP
R544
31 BEEP# 1 2 1 2 PC_BEEP 26
100K_0402_5%
1
2 2
2
R971
1 2 SB_SPKR_C 1 2
2
21 SB_SPKR
R267
C946 R266 @ 10K_0402_5%
0.1U_0402_16V4Z~D 499K_0402_1%
2
D
1
HP1_JD 2 Q43 PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
G
S
SSM3K7002FU_SC70-3~D
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Codec IDT 92HD73C
3
LA-5151P
A B C D E F G H
5 4 3 2 1
19V U13 L67

B+ BLM18PG181SN1_0603~D
27 1 AMP_SPKL- 1 2 AMP_SPK_JK_L-
1A/40mil PVDD1 OUTL-1
30 PVDD2 OUTL-2 2 1
2 2 2 1 1
C906
C901 C902 C903 C904 C905 330P_0402_50V7K~D
R1.0 Modify 22U_1210_25V6K~D 22U_1210_25V6K~D 22U_1210_25V6K~D 0.1U_0603_50V4Z~D 0.1U_0603_50V4Z~D 2
1 1 1 2 2 28
PGND2
29 PGND1
http://mycomp.su/x/
L68
L79
BLM18PG181SN1_0603~D
MAX9736A High-Pass Filter, fc = 500Hz, Av = 0.631V/V 31 AMP_SPKL+ 1 2 AMP_SPKL+_L 1 2 AMP_SPK_JK_L+
R900 OUTL+1
SPK_CD_L2 1 2 SPKER_CD_L2_FBL 32 1 22UH_LQH55PN220MR0L_0.85A_20%~D
D OUTL+2 D
R1.0 Modify 11K_0402_1%
R902 C907
1 2 5 330P_0402_50V7K~D
FB_L 2
C909 182K_0402_1%
R903 2200P_0402_25V7K~D C910
25 SPK_CD_L SPK_CD_L 1 2 SPK_CD_L1 1 2 1 2SPK_CD_L3 1 2 SPK_CD_L4 6
C911 IN_L
1U_0603_10V6K~D 16.5K_0402_1% 7
0.022U_0402_25V7K~D NC1
1 2 8
R904 17.8K_0402_1% NC2
R901 17
PC_BEEP PC_BEEP_1 NC3
25 PC_BEEP 1 2 1 2
C908 0.1U_0402_10V6K~D 182K_0402_1% R905
SPK_CD_R2 1 2 SPK_CD_R2_FBL
11K_0402_1% R907
1 2 19
FB_R L69
C913 182K_0402_1% L80
R908 2200P_0402_25V7K~D C914 BLM18PG181SN1_0603~D
SPK_CD_R 1 2 SPK_CD_R1 1 2 1 2 SPK_CD_R3 1 2 SPK_CD_R4 18 25 AMP_SPKR+ 1 2 AMP_SPKR+_R 1 2 AMP_SPK_JK_R+
25 SPK_CD_R IN_R OUTR+1
C915 1U_0603_10V6K~D 16.5K_0402_1% 26 1 22UH_LQH55PN220MR0L_0.85A_20%~D
0.022U_0402_25V7K~D OUTR+2
1 2
R906 R909 17.8K_0402_1% C917
PC_BEEP 1 2 PC_BEEP_2 1 2 10 330P_0402_50V7K~D Speaker amp impedance of JBL is 4 ohm.
25 PC_BEEP SHDN# 2
C912 0.1U_0402_10V6K~D 182K_0402_1% SPK_AMP_MUTE# 11
SPK_AMP_MUTE_R# REGEN
9
MUTE#
+3VS For filterless
Speaker Connector
modualation/spread-spectrum mode L70
R910 1 2 0_0402_5% 20 MODE
BLM18PG181SN1_0603~D 15 mils trace JSPK1
23 AMP_SPKR- 1 2 AMP_SPK_JK_R- AMP_SPK_JK_L- 1
OUTR-1 AMP_SPK_JK_L+ 1
Mono Select. Set MONO high for mono mode. 4
MONO OUTR-2
24 1 2
2
AMP_SPK_JK_R- 3 5
D51 C922 C921 AMP_SPK_JK_R+ 3 G5
R1.0 add 1 2
16
VS 1U_0805_25V4Z~D 330P_0402_50V7K~D
4
4 G6
6
C Internal Regulator Output. 15 3 2 1 2 MOLEX_53261-0471 C
SDMK0340L-7-F_SOD323-2~D SPK_AMP_MUTE_R# Internal 2V Bias. REG BOOT CONN@
25 SPK_AMP_MUTE# 12
COM
R1567
2
1 2 21 C1N EP 33
330K_0402_5% 2 1 D20 D21
1U_0603_25V6-K~D
C923
1U_0603_25V6-K~D
C925
1U_0603_25V6-K~D
C926
1 1 1 C924 PESD24VS2UT_SOT23-3~D PESD24VS2UT_SOT23-3~D
C1553 0.1U_0603_50V4Z~D
2.2U_0603_10V6K~D
1 2
22
1
2 2 2 C1P
13
AGND
14 AGND
MAX9736AETJ+T_TQFN32_7X7
U14
B+ L65
1A/40mil 27 1 AMP_SW- 1 2 AMP_SW_JK-
PVDD1 OUTL-1
30 PVDD2 OUTL-2 2 BLM18PG181SN1_0603~D 1
2 2 2 1 1
C892
C977 C918 C916 C970 C980 330P_0402_50V7K~D JWFER1
R1.0 Modify 22U_1210_25V6K~D 22U_1210_25V6K~D 22U_1210_25V6K~D 0.1U_0603_50V4Z~D 0.1U_0603_50V4Z~D 2 1
1 1 1 2 2 1
28 2
PGND2 2
29 PGND1 3 G1
4
G2
L66 MOLEX_53398-0271~D
SUB_FB_L2 R1023 SUB_FB_L4 AMP_SW+ 1 AMP_SW _JK+
1 2 31 2
OUTL+1
11.5K_0402_1% 32 BLM18PG181SN1_0603~D 1
B OUTL+2 B
C979 C988 C989 C894
SUB_FB_L SUB_FB_L1 R1016 SUB_FB_L3 R1024
1 2 1 2 1 2 1 2 1 2 5 330P_0402_50V7K~D
FB_L 2
10K_0402_1% 100K_0402_1%
2
1U_0603_10V6K~D .047U_0402_16V7K~D .047U_0402_16V7K~D

SUB_IN_L 6
R1017 IN_L
NC1 7
20K_0402_1%
NC2
8
17
SUB WOOFER amp impedance of JBL is 4 ohm.
1
NC3
R1027
1 2 SUB_FB_L
R982 6.49K_0402_1%
9.09K_0402_1% R1025
SPK_CD_R 1 2 SUB_CD_R 1 2 SUB_CD_R1 1 2 SUB_CD_R2 1 2 19
25 SPK_CD_R FB_R
C973 0.47U_0603_10V7K~D 2 C976 0.01U_0402_16V7K~D
15.8K_0402_1%
25 SPK_CD_L SPK_CD_L 1 2 SUB_CD_L 1 2 C981 SUB_IN_R 18 25 AMP_SW+

C972 0.47U_0603_10V7K~D IN_R OUTR+1
.1U_0402_16V7K~D OUTR+2 26
R1026 1
9.09K_0402_1%
SUB_AMP_MUTE# 10
25 SUB_AMP_MUTE# SHDN#
11
REGEN
For filterless modualation/spread-spectrum mode 9
MUTE#
+3VS
R994 1 2 0_0402_5% 20 MODE AMP_SW-

High-Pass Filiter,fc=100 Hz, 500Hz, Av=1.45V/V 4
OUTR-1
23
24
MONO OUTR-2
16
VS C974
A Internal Regulator Output. A
15 REG BOOT 3 2 1
Internal 2V Bias. 12
COM 1U_0805_25V4Z~D
21 33
1
C1N EP DELL CONFIDENTIAL/PROPRIETARY
1U_0603_25V6-K~D
1U_0603_25V6-K~D
1U_0603_25V6-K~D
1 1 1 C971
0.1U_0603_50V4Z~D
C969
C975
C983
2
22
2 2 2 C1P Title
13
14
AGND Speaker / Subwoofer
AGND Size Document Number Rev
MAX9736AETJ+T_TQFN32_7X7 R10 (A00)
LA-5151P
5 4 3 2 1
A B C D E
+3VS +1.5VS
D41
WWAN 1 1 6
47P_0402_50V8J~D
0.01U_0402_16V7K~D
C403
.1U_0402_16V7K~D
C404
4.7U_0805_10V4Z~D
C405
330U_D2E_6.3VM_R25~D
C956
47P_0402_50V8J~D
0.01U_0402_16V7K~D
C407
.1U_0402_16V7K~D
C408
4.7U_0805_10V4Z~D
C409
1 1 1 1 1 1 1 1
@ + @
C1513
C1514
2 5
http://mycomp.su/x/
2 2 2 2 2 2 2 2 2
3 4
1 1
+UIM_PWR
SRV05-4.TCT_SOT23-6~D
JSIM1
5 GND VCC 1
UIM_VPP 6 2 UIM_RST
+3VS +1.5VS +3VS UIM_DATA VPP RST UIM_CLK
7 I/O CLK 3
8 NC NC 4
JWWAN1 9 GND
1 1 2 2 10 GND
3 4 C410 C411
3 4 MOLEX_475531001 33P_0402_50V8J~D
5 5 6 6 33P_0402_50V8J~D 1 1
7 8 +UIM_PWR CONN@
7 8 UIM_DATA C412 C413
9 9 10 10
R1.0 Modify Link ok
11 12 UIM_CLK 4.7U_0805_10V4Z~D .1U_0402_16V7K~D
11 12 UIM_RST 2 2
13 13 14 14
15 16 R285 1 @ 2 0_0402_5% UIM_VPP
15 16
17 17 18 18
19 20 WWAN_RADIO_OFF# Place as close as JSIM1
19 20 PCI_RST# WWAN_RADIO_OFF# 31
21 21 22 22 PCI_RST# 20,24,28
23 23 24 24
25 25 26 26
27 27 28 28
29 30 R911 1 2 0_0402_5%
29 30 EC_SMB_CK2 7,28,31,39
31 32 R912 1 2 0_0402_5%
31 32 EC_SMB_DA2 7,28,31,39
33 33 34 34
USBP5_D-
35
37
35 36 36
38 USBP5_D+ R1.0 Modify
2 37 38 2
39 39 40 40
R1.0 Modify 41
43
41 42 42
44
43 44 USBP5_D+ R913 @ 0_0402_5%
45 45 46 46 1 2 USBP5+ 22
47 47 48 48
R1010 1 @ 2 0_0402_5% 49 50 USBP5_D- R914 1 @ 2 0_0402_5%
31 EC_TX_P80_DATA 49 50 USBP5- 22
R1011 1 @ 2 0_0402_5% 51 52
31 EC_RX_P80_CLK 51 52
53 54
R1.0 Modify
GND1 GND2
TYCO_1775838-1~D
+3V_WLAN
WLAN @
1 2
JP1
+3VS
+3V_WLAN +1.5VS +3V_WLAN
R1.0 Modify R1.0 Modify
0.01U_0402_16V7K~D
C414
.1U_0402_16V7K~D
C415
4.7U_0805_10V4Z~D
C416
47P_0402_50V8J~D
ICH_PCIE_WAKE# JWLAN1 1 1 1 1
21,24,28,31 ICH_PCIE_WAKE# @
1 1 2 2
C1515
R291 1 @ 2 0_0402_5% 3 4
28,30 COEX2_WLAN_ACTIVE COEX1_WLAN_ACTIVE 3 4
5 5 6 6
WLAN_CLKREQ# R919 @ 0_0402_5% 2 2 2 2
6 WLAN_CLKREQ#
7 7 8 8 1 2 LPC_FRAME# 19,31
9 10 R920 1 @ 2 0_0402_5% LPC_AD3
3 CLK_PCIE_WLAN# 9 10 R915 @ 0_0402_5% LPC_AD2 3
6 CLK_PCIE_WLAN# 11 11 12 12 1 2
CLK_PCIE_WLAN 13 14 R916 1 @ 2 0_0402_5% LPC_AD1
6 CLK_PCIE_WLAN 13 14
15 16 R917 1 @ 2 0_0402_5% LPC_AD0
R918 @ 15 16
11,20,30,31,38 PLT_RST# 1 2 0_0402_5% 17 17 18 18 LPC_AD[0..3] 19,31
R921 @ 2 0_0402_5% WLAN_RADIO_OFF#
R1.0 Modify 6 CLK_DEBUG_PORT 1 19
21
19 20 20
22
WLAN_RADIO_OFF# 31
21 22 PCI_RST# 20,24,28
PCIE_IRX_WLANTX_N2 23 24
22 PCIE_IRX_WLANTX_N2 PCIE_IRX_WLANTX_P2 23 24
22 PCIE_IRX_WLANTX_P2 25 25 26 26
27 28 +1.5VS
27 28 R922 @
29 29 30 30 1 2 0_0402_5% EC_SMB_CK2 7,28,31,39
PCIE_ITX_C_WLANRX_N2 31 32 R923 1 @ 2 0_0402_5%
22 PCIE_ITX_C_WLANRX_N2 31 32 EC_SMB_DA2 7,28,31,39
PCIE_ITX_C_WLANRX_P2 33 34
22 PCIE_ITX_C_WLANRX_P2 33 34
35 36 USBP4_D-
35 36
0.01U_0402_16V7K~D
C418
USBP4_D+
37 37 38 38
R1.0 Modify
47P_0402_50V8J~D
0.01U_0402_16V7K~D
C417
39 39 40 40 1 1 1
41 42 @
41 42
C1516
43 43 44 44
45 45 46 46
D40 USBP4_D+ R924 1 @ 2 2 2
47 47 48 48 2 0_0402_5% USBP4+ 22
WPAN_ACTIVE 2 49 50
28 WPAN_ACTIVE 49 50
51 52 USBP4_D- R925 1 @ 2 0_0402_5%
51 52 USBP4- 22
1 COEX1_WLAN_ACTIVE
53 GND1 GND2 54
BT_ACTIVE 3
30 BT_ACTIVE R1.0 Modify
1
BAT54C-7-F_SOT23~D R997 TYCO_1775838-1~D

10K_0402_5%
2
4 4
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Mini Card_WLAN/WWAN
LA-5151P
A B C D E
5 4 3 2 1
+1.5VS +3VS
http://mycomp.su/x/
WPAN Card
0.047U_0402_16V4Z~D
C419
0.047U_0402_16V4Z~D
C420
0.047U_0402_16V4Z~D
C421
0.047U_0402_16V4Z~D
C422
0.1U_0402_16V4Z~D
C423
0.1U_0402_16V4Z~D
C424
4.7U_0603_6.3V6M~D
C425
D
1 1 1 1 1 1 1 D
+3VS +3VS +1.5VS
JWPAN1 2 2 2 2 2 2 2
ICH_PCIE_WAKE# 1 2
21,24,27,31 ICH_PCIE_WAKE# R292 @ 0_0402_5% 1 2
27,30 COEX2_WLAN_ACTIVE 1 2 3 4
R293 @ 0_0402_5% WPAN_ACTIVE_R 3 4
1 2 5 5 6 6
27 WPAN_ACTIVE
7 8
6 WPAN_CLKREQ# 7 8
9 10
CLK_PCIE_WPAN# 9 10
6 CLK_PCIE_WPAN# 11 11 12 12
CLK_PCIE_WPAN 13 14
6 CLK_PCIE_WPAN 13 14
15 16
15 16
17 17 18 18
19 20 WPAN_RADIO_OFF#
19 20 WPAN_RADIO_OFF# 31
21 22 PCI_RST#
PCIE_IRX_WPANTX_N3 21 22 PCI_RST# 20,24,27
22 PCIE_IRX_WPANTX_N3 23 23 24 24
PCIE_IRX_W PANTX_P3 25 26
22 PCIE_IRX_W PANTX_P3 25 26
27 27 28 28
29 30 R294 1 @ 2 0_0402_5%
29 30 EC_SMB_CK2 7,27,31,39
PCIE_ITX_C_WPANRX_N3 31 32 R298 1 @ 2 0_0402_5%
22 PCIE_ITX_C_WPANRX_N3 PCIE_ITX_C_WPANRX_P3 31 32 EC_SMB_DA2 7,27,31,39
22 PCIE_ITX_C_WPANRX_P3 33 33 34 34
35 36 USBP6_D- R295 2 @ 1 0_0402_5%
35 36 USBP6_D+ USBP6- 22
37 38 R296 2 @ 1 0_0402_5%
37 38 USBP6+ 22
39 39 40 40
41 41 42 42
43 44
43 44
45 45 46 46 R10 Moidify (short directly)
47 47 48 48
49 50
49 50
51 51 52 52
53 54
C GND1 GND2 C
TYCO_1775838-1~D
CONN@
Express Card Power

Switch (1A) +3VS_CARD
Express Card JEXP1

1
GND
C429
C430
0.1U_0402_16V4Z~D
4.7U_0805_10V4Z~D
+3VS 1 USBP7- 2
+3VALW 22 USBP7- USBP7+ USB-
+1.5VS 1 3
22 USBP7+ USB+
EXPR_CPUSB# 4
B CPUSB# B
5 REV
2 6
2 REV
C433
C431
C432
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1 1 1 EC_SMB_CK2 7
7,27,31,39 EC_SMB_CK2 EC_SMB_DA2 SMBCLK
7,27,31,39 EC_SMB_DA2 8 SMBDATE
+1.5VS_CARD 9
+1.5V
10 +1.5V
2 2 2
21,24,27,31 ICH_PCIE_WAKE# 11 WAKE#
+3VS_CARD_AUX +3VS_CARD_AUX 12
U16 PERST# +3.3VAUX
13 PERST#
2 3.3Vin 3.3Vout 3 +3VS_CARD 14 +3.3V
17 15 15
3.3Vin 3.3Vout EXP_CLKREQ# +3.3V
6 EXP_CLKREQ# 16 CLKREQ#
C434
0.1U_0402_16V4Z~D
12 11 CPPE# 17
AUX_IN AUX_OUT CPPE#
C435
4.7U_0805_10V4Z~D
1 1 CLK_PCIE_EXPR# 18
PCI_RST# 6 CLK_PCIE_EXPR# CLK_PCIE_EXPR REFCLK-
20,24,27 PCI_RST# 6 SYSRST# OCZ 19 6 CLK_PCIE_EXPR 19 REFCLK+
20
PERST# PCIE_IRX_EXPTX_N5 GND
31,33,49 SYSON 20 8 21
SHDNZ PERSTZ 2 2 22 PCIE_IRX_EXPTX_N5 PCIE_IRX_EXPTX_P5 PERn0
22 PERp0
22 PCIE_IRX_EXPTX_P5
31,33,48,49,50 SUSP# 1 4 23
STBYZ NC PCIE_ITX_C_EXPRX_N5 GND
5 22 PCIE_ITX_C_EXPRX_N5 24
CPPE# NC PCIE_ITX_C_EXPRX_P5 PETn0
10 CPPE# NC 13 22 PCIE_ITX_C_EXPRX_P5 25 PETp0
14 26
EXPR_CPUSB# NC GND
9 16
CPUSB# NC +1.5VS_CARD 27 G1
18 7 28
RCLKEN GND G2
(0.5A) 29 G3
30 G4
P2231NL E2_QFN20_4X4
C427
C428
0.1U_0402_16V4Z~D
4.7U_0805_10V4Z~D
TAITW_PXPXAE-000LBS2ZZ4N0_NR
1 1 CONN@
+1.5V_CARD Max. 650mA , Average 500mA
A +3V_CARD Max. 1300mA, Average 1000mA A
2 2
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, WPAN / Express Card
LA-5151P
5 4 3 2 1
A B C D E
+1.8VS +5V_CHGUSB
+5VALW U17
1 8 ESATA_USB_OC# ESATA_USB_OC# 22
GND OC1#
2 7
Output Swing Control Output De-emphasis Adjustment IN OUT1
10U_0805_10V4Z~D
C935
0.1U_0402_16V4Z~D
C936
0.1U_0402_16V4Z~D
C937
0.1U_0402_16V4Z~D
C938
0.1U_0402_16V4Z~D
C939
0.1U_0402_16V4Z~D
C940
3 6
EN1# OUT2
SEL2_ [A:B] Swing SEL3_ [A:B] De-emphasis 1 1 1 1 1 1 31 PWRSHARE_EN# 4 EN2# OC2# 5
0 1x 0 0dB TPS2062ADR_SO8~D
* * C462
1 1
http://mycomp.su/x/
2 2 2 2 2 2 0.1U_0402_16V4Z~D C463
1 1.2x 1 -3.5dB
10U_0805_10V4Z~D
2 2
U40
SATA_ITX_C_DRX_P4 2 1
1 19 SATA_ITX_C_DRX_P4 SATA_ITX_C_DRX_N4 AI+ VDD 1
19 SATA_ITX_C_DRX_N4 3 AI- VDD 6 2 1 ESATA_ITX_C_DRX_P4
1 2SATA_IRX_C_DTX_P4 VDD 10 C941 4700P_0402_25V7K~D
19 SATA_IRX_DTX_P4
1
C942 0.01U_0402_16V7K~D 7 23 +5V_CHGUSB
BO+ VDD
1 2SATA_IRX_C_DTX_N4 8 BO- VDD 28 R953
19 SATA_IRX_DTX_N4 C943 0.01U_0402_16V7K~D 390_0402_5% C466
5
R954 AVDD
1 2 0_0402_5% 34 0.1U_0402_16V4Z~D
SEL0_A
75K_0402_1%
R302
R955 1 2 0_0402_5% 13 27 ESATA_ITX_DRX_P4 U18 1 2
2
SEL0_B AO+
2
26 ESATA_ITX_DRX_N4 2 1 ESATA_ITX_C_DRX_N4
@ R956 AO-
1 2 0_0402_5% 33 C944 4700P_0402_25V7K~D
22 USBP0+ 1 10 +3VALW
@ R957 SEL1_A ESATA_IRX_DTX_N4 1D+ VCC
1 2 0_0402_5% 14 SEL1_B BI- 21 R301
22 ESATA_IRX_DTX_P4 43.2K_0402_1% 2 9 PWRSHARE_OE#
BI+ 22 USBP0- 1D- S PWRSHARE_OE# 31
R958 1 2 0_0402_5% 32
1
SEL2_A
1
R959 1 2 0_0402_5% 15 USB_CHARGE_D+ 3 8 USBP0_D+
SEL2_B @ R960 1 2D+ D+
17 2 0_0402_5% R303
R961 OUT+ USB_CHARGE_D- USBP0_D-
1 2 0_0402_5% 31 SEL3_A OUT- 18 @ R962 1 2 0_0402_5% 4 2D- D- 7 100K_0402_5%
+1.8VS R963 1 2 0_0402_5% 16 SEL3_B
2
36 @ R964 1 2 0_0402_5% 5 6
2
R965 SD_A GND OE#
1 2 10K_0402_1% 30 EN_A SD_B 35 @ R966 1 2 0_0402_5% R304 R305
R967 1 2 10K_0402_1% 29 49.9K_0402_1% 49.9K_0402_1%
USB_DETECT EN_B
19 25 TS3USB221RSER_QFN10_2x1P5~D
1
IREF GND
GND 20
@ R968 1 2 470_0402_5% 9
GND
GND 4 S Logic"1" Work from BKT
AGND 24
+1.8VS R969 1 @ 2 0_0402_5% 11 D34 S OE# Function
R970 @ CLKIN+ USBP0_D-
1 2 0_0402_5% 12 CLKIN- PAD 37 1 CH1 CH4 4 +5V_CHGUSB
PI2EQX3201BZFEX_TQFN36_6X5
ESATA X H Disconnect
A00 depop 1 1 L L D=1D
2 5 +5V_CHGUSB
Vn Vp + C460 C461 JESA1 H L D=2D
2 150U_D2_6.3VM~D 0.1U_0402_16V4Z~D 2
2 USB
A00 change to SA00002YQ0L (S IC PI2EQX3201BLZFEX TQFN 36P) USBP0_D+ 2 USBP0_D-
1
VBUS
3 6 2
CH2 CH3 USBP0_D+ D-
3 D+
@ CM1293-04SO_SOT23-6 4
GND
Place close JESA1 ESATA_ITX_C_DRX_P4

5
6
GND
USB_DETECT Equalizer Selection ESATA_ITX_C_DRX_N4 7
A+
A-
ESATA
SEL0_ [A:B] SEL1_ [A:B] Compliance Channel 8 GND GND 14
1
D ESATA_IRX_DTX_N4 2 1ESATA_IRX_C_DTX_N4 9 15
USB_DETECT# @ Q48 C464 4700P_0402_25V7K~D B- GND
2 0 0 no equalization ESATA_IRX_DTX_P4 2
10 B+ GND 16
G SSM3K7002FU_SC70-3~D 1ESATA_IRX_C_DTX_P4 11 GND GND 17
0 1 [0:2.5dB] @ 1.6 GHz C465 4700P_0402_25V7K~D
S
*
3
USB_DETECT# 12
32 USB_DETECT# DET1
1 0 [2.5:4.5dB] @ 1.6 GHz 13 DET2
1 1 [4.5:6.5dB] @ 1.6 GHz
FOX_3Q3813C-RB1C3B-7F
CONN@
JSATA1
SATA HDD (On board) 1
SATA_ITX_C_DRX_P1 GND
19 SATA_ITX_C_DRX_P1 2
SATA_ITX_C_DRX_N1 A+
19 SATA_ITX_C_DRX_N1 3 A-
4
GND
C442 2 1 0.01U_0402_25V7K~D SATA_IRX_C_DTX_N1 5
19 SATA_IRX_DTX_N1 B- +5VS
C443 2 1 0.01U_0402_25V7K~D SATA_IRX_C_DTX_P1 6 Close to JSATA1.
19 SATA_IRX_DTX_P1
7
B+
GND SATA HDD
3 JSATA2 3
C445
C446
C447
C448
10U_0805_10V4Z~D
.1U_0402_16V7K~D
.1U_0402_16V7K~D
1000P_0402_50V7K~D
8 1
V33 SATA_ITX_C_DRX_P0 GND
9 19 SATA_ITX_C_DRX_P0 2
V33 SATA_ITX_C_DRX_N0 RX+ +5VS
10 V33 1 1 1 1 19 SATA_ITX_C_DRX_N0 3 RX- Close to JSATA2.
11 4
GND GND
12 GND
C449 2 1 0.01U_0402_25V7K~D SATA_IRX_C_DTX_N0 5 TX-
19 SATA_IRX_DTX_N0
13 GND 19 SATA_IRX_DTX_P0
C450 2 1 0.01U_0402_25V7K~D SATA_IRX_C_DTX_P0 6 TX+
2 2 2 2
C452
C453
C454
C455
10U_0805_10V4Z~D
.1U_0402_16V7K~D
.1U_0402_16V7K~D
1000P_0402_50V7K~D
+5VS 14 7
V5 GND
15 V5
16 V5 1 1 1 1
17
GND
18 Reserved
19 GND 8 3.3V
20 23 9 2 2 2 2
V12 GND 3.3V
21 V12 GND 24 10 3.3V
22 25 11
V12 GND GND
12
GND
13 GND
MOLEX_47662-2000 +5VS 14
CONN@ 5V
15
5V
16 5V
17
GND
18
SATA ODD CONN JODD1
+5VS
19
20
Reserved
GND
12V
1 GND 21 12V GND1 23
SATA_ITX_C_DRX_P5 2 22 24
19 SATA_ITX_C_DRX_P5 SATA_ITX_C_DRX_N5 A+ 12V GND2
19 SATA_ITX_C_DRX_N5 3
A- TYCO_1770615-3~D
4 GND
C438
C439
C440
C441
10U_0805_10V4Z~D
1U_0603_10V4Z~D
0.1U_0402_16V4Z~D
1000P_0402_50V7K~D
C437 1 2 0.01U_0402_16V7K~D SATA_IRX_C_DTX_N5 5 B-

CONN@
19 SATA_IRX_DTX_N5 C436 1 2 0.01U_0402_16V7K~D SATA_IRX_C_DTX_P5 6 1 1 1 1
19 SATA_IRX_DTX_P5 B+
7 GND
4 4
2 2 2 2
8 DP
9
+5VS
10
V5
V5
11 MD G1 14
12 GND G2 15
13
GND G3
16 Compal Electronics, Inc.
MOLEX_47639-3000_13P Close to ODD Conn TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
CONN@ BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, ODD / SATA CONN
LA-5151P
A B C D E
Bluetooth
http://mycomp.su/x/
R10 Moidify (short directly) JBT1
BT_DET# 1 2 BT_ACTIVE
31 BT_DET# 1 2 BT_ACTIVE 27
JCAM1 COEX2_WLAN_ACTIVE 3 4 +3VS
USBP11+ USBP_P11 27,28 COEX2_WLAN_ACTIVE BT_OFF# 3 4 USBP10+
R297 2 @ 1 0_0402_5% 1 5 6
22 USBP11+ USBP11- USBP_N11 1 31 BT_OFF# BT_RADIO_OFF# 5 6 USBP10- USBP10+ 22
R299 2 @ 1 0_0402_5% 2 7 8
22 USBP11- 2 31 BT_RADIO_OFF# 7 8 USBP10- 22
+3VS L28 2 1 BLM18BB221SN1D_2P~D 3 9 10
DMIC_CLK 3 9 10
25 DMIC_CLK 4 4 11 11 12 12
5 13 14
DMIC0 5 13 14
25 DMIC0 6
6
7 7 15 GNDGND 16
8
@ @ GND
Layout note: Pin5 thru 9 GND
100P_0402_50V8J~D
C458
100P_0402_50V8J~D
C459
HRS_DF12(3.0)-14DP-0.5V(86)~D
individual via to GND layer 1 1 MOLEX_48227-0701 CONN@
CONN@
BT_ACTIVE USBP10-
USBP10+
2 2
2
@ @
47P_0402_50V8J~D
C456
47P_0402_50V8J~D
C457
D35 R995
USBP_P11 1 4 DMIC_CLK 10K_0402_5%
CH1 CH4
@ 1 1
1
2 5 +3VS
Vn Vp 2 2
USBP_N11 3 6 DMIC0
CH2 CH3
@ CM1293-04SO_SOT23-6
Place close JCAM1
Cardreader Connector
JCARD1
31 USB_EN# 30
29
30 G4 34
33
to Single USB board
22 USB_OC1# 29 G3
28 32
28 G2
22 USBP1+ 27 27 G1 31
22 USBP1- 26
26
25
25
+5VALW 24 24
23
23 +5VALW
22
22 JSUSB1
21 21
20 1
20 1
19 19 2 2
18 18 3 3
+3VS 17 22 USBP2- 4
17 4
16 16 22 USBP2+ 5 5
15 15 6 6
14 31 USB_EN# 7
14 7
13 13 8 8
22 USB_OC2#
12 12 31 BATT_CHG_LED# 9 9
PCIE_ITX_C_CBRX_P4 11 10
22 PCIE_ITX_C_CBRX_P4 PCIE_ITX_C_CBRX_N4 11 31 BATT_LOW_LED# 10
22 PCIE_ITX_C_CBRX_N4 10 10
9
PCIE_IRX_CBTX_P4 9
8 11
22 PCIE_IRX_CBTX_P4 PCIE_IRX_CBTX_N4 8 G1
7 7 12 G2
22 PCIE_IRX_CBTX_N4
6
CLK_PCIE_CB 6 FCI_10089709-010010-LF
6 CLK_PCIE_CB 5
CLK_PCIE_CB# 5 CONN@
6 CLK_PCIE_CB# 4 4
3
CB_CLKREQ# 3
2
6 CB_CLKREQ# PLT_RST# 2
11,20,27,31,38 PLT_RST# 1 1
FOX_GS12301-1011A-9F~D
CONN@
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, USB / ESATA / BT / CAMARA
LA-5151P
+3VALW L29
BLM18BD601SN1D_0603~D
+EC_AVCC 2 1 +3VALW
1 1 1 1 1 1
0.1U_0402_16V4Z~D
C467
0.1U_0402_16V4Z~D
C468
0.1U_0402_16V4Z~D
C469
0.1U_0402_16V4Z~D
C470
1000P_0402_50V7K~D
C471
1000P_0402_50V7K~D
C472
1 2
+3VALW C473 C474
+EC_AVCC 1000P_0402_50V7K~D 0.1U_0402_16V4Z~D
R306 2 1 10K_0402_5% PCIE_PME# 2 2 2 2 2 2 Board ID +3VALW
ECAGND 2 1 2 1
L30
http://mycomp.su/x/
BLM18BD601SN1D_0603~D
R307 1 2 470_0402_5% EC_RST# R311
111
125
100K_0402_5%
Ra
22
33
96
67
U19
9
C475 2 1 0.1U_0402_16V4Z~D
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
1
AD_BID
1
2
R926 2 1 10K_0402_5% EN_KBL#
GATEA20 1 21 EC_PW M R312 C477
R314 2 EC_SMB_DA1 19 GATEA20 KB_RST# GA20/GPIO00 INVT_PWM/PWM1/GPIO0F BEEP# EC_PW M 35
1 2.2K_0402_5% 19 KB_RST# 2 23 R10 modify Rb 33K_0402_5% 0.1U_0402_16V4Z~D
SERIRQ KBRST#/GPIO01 BEEP#/PWM2/GPIO10 PWRSHARE_EN# BEEP# 25 2
21 SERIRQ 3 26
R315 2 EC_SMB_CK1 LPC_FRAME# SERIRQ# FANPWM1/GPIO12 ACOFF PWRSHARE_EN# 29
1 2.2K_0402_5% 4 27
1
19,27 LPC_FRAME# LPC_AD3 LFRAME# ACOFF/FANPWM2/GPIO13 ACOFF 46
19,27 LPC_AD3 5 C522 1 2 0.01U_0402_16V7K~DECAGND
MSEN# LPC_AD2 LAD3
R324 1 2 10K_0402_5% 19,27 LPC_AD2 7 PWM Output C476 1 2 0.01U_0402_16V7K~DECAGND
LPC_AD1 LAD2 BATT_TEMP
19,27 LPC_AD1 8 LAD1 BATT_TEMP/AD0/GPIO38 63 BATT_TEMP 52
LPC_AD0 BATT_OVP
LAD0 LPC & MISC VCC 3.3V+/-5% 0.6V~1.6V
19,27 LPC_AD0 10 64 BATT_OVP 52
BATT_OVP/AD1/GPIO39 ADP_I
65 ADP_I 46
KSO2 CLK_PCI_EC ADP_I/AD2/GPIO3A AD_BID
R308 1 2 470_0402_5% 6 CLK_PCI_EC 12 PCICLK AD Input AD3/GPIO3B 66 Ra 100K
PLT_RST# 13 75 MSEN#
11,20,27,30,38 PLT_RST# PCIRST#/GPIO05 AD4/GPIO42 MSEN# 35
R309 1 2 470_0402_5% KSO1 EC_RST# 37 76 Board ID Rb
EC_SCI# ECRST# SELIO2#/AD5/GPIO43 POW_MON 51
20 SCI#/GPIO0E
21 EC_SCI# TOUCHKEY_TINT
For ENE strape pin 32 TOUCHKEY_TINT 38
CLKRUN#/GPIO1D EC_SUB_MUTE#
0 0 +/- 5% 0V
DAC_BRIG/DA0/GPIO3C 68
EN_DFAN1 EC_SUB_MUTE# 25
KSI[0..7] EN_DFAN1/DA1/GPIO3D 70
IREF EN_DFAN1 7 1 8.2K+/- 5% 0.250V
32 KSI[0..7] DA Output IREF/DA2/GPIO3E
71
IREF 46
KSI0 55 72 2 18K +/- 5% 0.503V
+3VS KSI1 KSI0/GPIO30 DA3/GPIO3F CHGVADJ 46
56 KSI1/GPIO31
KSI2 57 R10 modify 3 33K +/- 5% 0.819V
R317 2 1 2.2K_0402_5% EC_SMB_DA2 KSI3
KSI4
58
KSI2/GPIO32
KSI3/GPIO33 PSCLK1/GPIO4A 83 LCD_TST
USB_EN# LCD_TST 35
*
EC_SMB_CK2 KSI5
59 KSI4/GPIO34 PSDAT1/GPIO4B 84
VGA_ON USB_EN# 30 4 56K +/- 1% 1.185V
R318 2 1 2.2K_0402_5% 60 85
KSI6 KSI5/GPIO35 PSCLK2/GPIO4C KSO5 VGA_ON 50
61 KSI6/GPIO36 PS2 Interface PSDAT2/GPIO4D 86
KSO5 32 5 100K +/- 1% 1.650V
@R319
@ R319 2 1 4.7K_0402_5% LCD_TST KSO[0..18] KSI7 62 87 TP_CLK
32 KSO[0..18] KSO0 KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E TP_DATA TP_CLK 32
39 88 TP_DATA 32
KSO1 KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F
40 KSO1/GPIO21
KSO2 41
R320 2 BT_RADIO_OFF# KSO3 KSO2/GPIO22 WPAN_RADIO_OFF#
1 4.7K_0402_5%
KSO4
42
43
KSO3/GPIO23 SDICS#/GPXOA00
97
98 EN_WOL# WPAN_RADIO_OFF# 28 Follow the suggestion of EC team to
KSO6 KSO4/GPIO24 SDICLK/GPXOA01 BT_OFF# EN_WOL# 24
KSO5/GPIO25 Int. K/B follow JAT10 setting.
44 99 BT_OFF# 30
R339 2 EC_FB_SCLK KSO7 SDIDO/GPXOA02 VGATE
1 4.7K_0402_5%
KSO8
45
46
KSO6/GPIO26 Matrix
SPI Device Interface
SDIDI/GPXID0
109 VGATE 11,21,51 Place close to U19
R342 2 EC_FB_SDATA KSO9 KSO7/GPIO27
1 4.7K_0402_5% 47
KSO10 KSO8/GPIO28 FRD#SPI_SO R333
48 119
+5VS KSO11 KSO9/GPIO29 SPIDI/RD# FWR#SPI_SI 15_0402_5%
49 KSO10/GPIO2A SPIDO/WR# 120
KSO12 50 SPI Flash ROM 126 SPI_CLK 1 2 SPI_CLK_R R557
KSO13 KSO11/GPIO2B SPICLK/GPIO58 FSEL#SPICS# 0_0402_5%
51 128 1
R325 2 TP_DATA KSO14 KSO12/GPIO2C SPICS# EC_ENBKL
1 4.7K_0402_5% 52 KSO13/GPIO2D 1 2 VGA_ENBKL 39
KSO15 53 @C1517
@C1517
KSO14/GPIO2E
1
R326 2 1 4.7K_0402_5% TP_CLK KSO16 54 73 EC_SPK_HP_MUTE# 22P_0402_50V8J~D
KSO17 KSO15/GPIO2F CIR_RX/GPIO40 EC_SPK_HP_MUTE# 25 2 R383
81 KSO16/GPIO48 CIR_RLC_TX/GPIO41 74 USB_DET_DELAY# 32
KSO18 82 89 FSTCHG 100K_0402_5%
KSO17/GPIO49 FSTCHG/SELIO#/GPIO50 BATT_CHG_LED# FSTCHG 46
BATT_CHGI_LED#/GPIO52 90
BATT_CHG_LED# 30
91
2
EC_SMB_CK1 CAPS_LED#/GPIO53 BATT_LOW_LED# PWRSHARE_OE# 29
52 EC_SMB_CK1
77
SCL1/GPIO44 GPIO BATT_LOW_LED#/GPIO54
92
BATT_LOW_LED# 30
R948 1 2 200K_0402_5% KSO5 EC_SMB_DA1 78 93 BKLT_KB_DET#
52 EC_SMB_DA1 EC_SMB_CK2 SDA1/GPIO45 SUSP_LED#/GPIO55 SYSON BKLT_KB_DET# 32
7,27,28,39 EC_SMB_CK2
79 SCL2/GPIO46 SM Bus SYSON/GPIO56 95
SYSON 28,33,49
EC_SMB_DA2 80 121 VR_ON
7,27,28,39 EC_SMB_DA2 SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 ACIN VR_ON 7,39,51
EC Adam_Yang request AC_IN/GPIO59 127 ACIN 21,25,45,46
SLP_S3# 6 100 EC_RSMRST#

21 SLP_S3# SLP_S5# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 EC_LID_OUT# EC_RSMRST# 21
21 SLP_S5# 14 101
EC_SMI# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 EC_ON EC_LID_OUT# 21
15 102
21 EC_SMI# LID_SW# EC_SMI#/GPIO08 EC_ON/GPXO05 BT_RADIO_OFF# EC_ON 32
32 LID_SW# 16 LID_SW#/GPIO0A EC_SWI#/GPXO06 103
EC_FB_SCLK ICH_PWROK BT_RADIO_OFF# 30
17 104
32 EC_FB_SCLK EC_FB_SDATA SUSP#/GPIO0B ICH_PWROK/GPXO06 BKOFF# ICH_PWROK 11,21
32 EC_FB_SDATA 18
PBTN_OUT#/GPIO0C GPO BKOFF#/GPXO08
105
BKOFF# 35
R977 1 2 0_0402_5% PCIE_PME# 19 GPIO 106 WWAN_RADIO_OFF#
21,24,27,28 ICH_PCIE_WAKE# KB_BL_PW M# EC_PME#/GPIO0D WL_OFF#/GPXO09 LCD_VCC_TEST_EN WWAN_RADIO_OFF# 27
25 107
32 KB_BL_PW M# FAN_SPEED1 EC_THERM#/GPIO11 GPXO10 CP_SEL LCD_VCC_TEST_EN 35
7 FAN_SPEED1 28 108 CP_SEL 46
WLAN_RADIO_OFF# 29 FAN_SPEED1/FANFB1/GPIO14 GPXO11
27 WLAN_RADIO_OFF# EC_TX_P80_DATA 30 FANFB2/GPIO15
27 EC_TX_P80_DATA EC_RX_P80_CLK EC_TX/GPIO16 SLP_S4#
27 EC_RX_P80_CLK 31 110 SLP_S4# 11,21
ON_OFF EC_RX/GPIO17 PM_SLP_S4#/GPXID1 EC_ENBKL
32 ON_OFF 32 ON_OFF/GPIO18 ENBKL/GPXID2 112
PWR_BTN_LED# 34 114 BT_DET#
32 PWR_BTN_LED# PWR_LED#/GPIO19 GPXID3 BT_DET# 30
EN_KBL# 36 GPI 115 EC_THERM#
32 EN_KBL# NUMLED#/GPIO1A GPXID4 SUSP# EC_THERM# 21
GPXID5 116
PBTN_OUT# SUSP# 28,33,48,49,50 @ R330 @ C483
117
GPXID6 PS_ID PBTN_OUT# 21 0_0402_5% 0.1U_0402_16V4Z~D
GPXID7 118 PS_ID 45
XCLKI 122 SPI_CLK_R 2 1 2 1
CLK_PCI_EC XCLKO XCLK1 C480 1
123 124 2 1U_0603_10V4Z~D
XCLK0 V18R
1
AGND
XCLKO 1 R328 2 XCLKI

GND
GND
GND
GND
GND
@ R327
@ 20M_0603_5% C482 2 1 0.1U_0402_16V4Z~D
SPI Flash (16Mb*1)
10_0402_5% Y5 KB926QFD3_LQFP128_14X14 R329 +3VALW
11
24
35
94
113
69
1 4 10K_0402_5%
2
1 2 1
C481
22P_0402_50V8J~D
2 G 3 ECAGND 20mils 2
G
C479
22P_0402_50V8J~D
@ C478
15P_0402_50V8J~D +SPI_R C484
2 32.768KHZ_12.5PF_QTFM28-32768K1 R331 0.1U_0402_16V4Z~D
15_0402_5% U20 1
D3 Version : P/N : SA00001J580 FSEL#SPICS# 2 1 SPI_CS# 1 CS# VCC 8
FRD#SPI_SO 1 2 SPI_SO 2 7
SO HOLD# SPI_CLK_R
3 WP# SCLK 6
R332 4 5 SPI_SI 1 2 FWR#SPI_SI
15_0402_5% GND SI
MX25L1605AM2C-12G_SO8 R334
15_0402_5%
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, BIOS & EC I/O Port
LA-5151P
A B C D E
Power Button Circuit +3VALW INT_KB_Conn.1

To power board
2
JKB1
R335 30 32
100K_0402_5% KSI7 30 GND
29 29 GND 31
http://mycomp.su/x/
KSI6 28 KSI0 @ C485 100P_0402_50V8J~D KSO6 @C486
@ C486 100P_0402_50V8J~D
R896 D11 KSI4 28
27
1
200_0402_5% JPBTN1 KSI2 27 KSI1 @ C487 100P_0402_50V8J~D KSO7 @C488
@ C488 100P_0402_50V8J~D
2 26 26
ON_OFF 31 KSI[0..7]
+5VALW 1 2 PWR_LED+ 1 1
KSI5 25 25
PWR_BTN_LED# PWR_ON-OFF_BTN# 1 31 KSI[0..7] KSI1 KSI2 @ C489 100P_0402_50V8J~D KSO8 @ C490
@C490 100P_0402_50V8J~D
31 PWR_BTN_LED# 2 24
1 PWR_ON-OFF_BTN# 2 KSO[0..18] KSI3 24 1
3 3 G5 5 31 KSO[0..18] 23 23
4 6 3 51ON# KSI0 22 KSI3 @ C491 100P_0402_50V8J~D KSO9 @C492
@ C492 100P_0402_50V8J~D
4 G6 51ON# 45 KSO5 22
21
MOLEX_53261-0471 BAT54C-7-F_SOT23~D KSO4 21 KSI4 @ C493 100P_0402_50V8J~D KSO10 @
@C494
C494 100P_0402_50V8J~D
20 20
CONN@ KSO7 19
19
1
D30 D KSO6 KSI5 @ C495 100P_0402_50V8J~D KSO11 @
@C496
C496 100P_0402_50V8J~D
18
EC_ON Q6 KSO8 18
31 EC_ON 1 2 2 17 17
3PWR_ON-OFF_BTN# G SSM3K7002FU_SC70-3~D KSO3 16 KSI6 @ C497 100P_0402_50V8J~D KSO12 @
@C498
C498 100P_0402_50V8J~D
R336 KSO1 16
1 S 15
3
15
1
2 0_0402_5% KSO2 14 KSI7 @ C499 100P_0402_50V8J~D KSO13 @
@C500
C500 100P_0402_50V8J~D
R337 KSO0 14
13
PESD24VS2UT_SOT23-3~D KSO12 13 KSO0 @ C501 100P_0402_50V8J~D KSO14 @
@C502
C502 100P_0402_50V8J~D
10K_0402_5% 12
KSO16 12
11 11
KSO15 10 KSO1 @ C503 100P_0402_50V8J~D KSO15 @
@C504
C504 100P_0402_50V8J~D
2
KSO13 10
9
Place close JPBTN1 KSO14
KSO9
8
7
9
8
KSO2 @ C505 100P_0402_50V8J~D KSO16 @
@C506
C506 100P_0402_50V8J~D
KSO11 7 KSO3 @ C507 100P_0402_50V8J~D KSO17 @

@C508
C508 100P_0402_50V8J~D
6 6
KSO10 5
KSO17 5 KSO4 @ C509 100P_0402_50V8J~D KSO18 @
@C510
C510 100P_0402_50V8J~D
4
KSO18 4
3 3
2 KSO5 @ C511 100P_0402_50V8J~D
2
1
RTCVREF RTCVREF RTCVREF RTCVREF 1
JAE_FL4S030HB3R3000
For EMI
CONN@
SDMK0340L-7-F_SOD323-2~D
D46
1 @ C963
1
1
10K_0402_1%
R1007
220K_0402_1%
R1008
0.1U_0402_16V4Z~D
51ON#
2 51ON# 45
2 <BOM Structure>
Touch Screen Connector 2
2
5
C964
1
D JTCH1
1
R1.0 Modify
P
USB_DETECT# NC Q44
2 1 2 4 2
10
29 USB_DETECT# A Y G 2N7002_SOT23-3~D D36 +3VS
G
2.2U_0603_10V6K~D S 1 4 USBP9- 1
G2
+3VS
3
U44 CH1 CH4 1
2
3
1
R1559 1 @ 2 0_0402_5% VBUS 3 3 1
TC7SZ14FU_SSOP5~D R1009 4 C927
USBP9- 4 0.1U_0402_16V4Z~D
100K_0402_5% 2 5 +3VS 22 USBP9- 5
Vn Vp USBP9+ 5
<BOM structure> 22 USBP9+ 6 6 2
7
2 7
G1
8
USBP9+ 8
3 CH2 CH3 6
9
2 1 USB_DET_DELAY# @ CM1293-04SO_SOT23-6
USB_DET_DELAY# 31 JST_SM08B-SURS-TF(LF)(SN)~D
D47
Place close JTCH1 CONN@
JTP1
Power share Touch PAD/B Conn. TP_CLK
1
2
1
31 TP_CLK LID_SW# 2
3
+5VS 31 LID_SW# TP_DATA 3
4 4
31 TP_DATA +HALL_VCC 5 7
+HALL_VCC 5 G1
+3VALW 1 2 6 8
R933 0_0402_5% 6 G2
1
1 2 LID_SW# TYCO_2041084-6~D
C513
C514
100P_0402_50V8J~D
100P_0402_50V8J~D
R934 10K_0402_5% C512 1 1 CONN@
3 0.1U_0402_16V4Z~D 3
1 2 D48
C521 PESD5V2S2UT_SOT23-3~D
Keyboard back light +3VS
2
0.1U_0402_16V4Z~D 2 2
1
1
R927
10K_0402_5%
+5VS <BOM Structure>
Q38 +5VS_KBL
2
SI3456BDV-T1-E3_TSOP6~D
BKLT_KB_DET#
BKLT_KB_DET# 31
D
+5VS +3VS
1U_0603_10V6K~D
B+_BIAS 6
S
1 5 4 1 2
1
R928
C928
300K_0402_5%
2 20mil D JCAP1
2
1 R929 BKLT_KB_DET 2 Q39 6 8

6 G2
0_0805_5% 20mil G MMBF170LT1G_SOT23-3~D 5 7
Cap Sensor 31 EC_FB_SDATA
G
5 G1
1
2 S L77 1 2 BLM18BD601SN1D_0603~D FB_SDATA 4

3
R930 L78 FB_SCLK 4

31 EC_FB_SCLK 1 2 BLM18BD601SN1D_0603~D 3
100K_0402_5% TOUCHKEY_TINT 3
1 2 2
1
EN_KBL 31 TOUCHKEY_TINT 2
1
R1003 1
2
2
0_0402_5% TYCO_2041084-6
1
D CONN@
2 Q40 R931
31 EN_KBL#
G SSM3K7002FU_SC70-3~D 2M_0402_5% D49
S +5VS_KBL 1 2 FB_SDATA PESD5V2S2UT_SOT23-3~D
3
C959 33P_0402_50V8J~D
1
1
JKBL1
1
BKLT_KB_DET 1 FB_SCLK
2 2 1 2
4 C960 33P_0402_50V8J~D 4
3 3 GND 5
KB_BL_PWM 4 6
4 GND
TYCO_2041084-4
20mil CONN@ DELL CONFIDENTIAL/PROPRIETARY
1
D
31 KB_BL_PW M# 2
G
S
Q41
MMBF170LT1G_SOT23-3~D Compal Electronics, Inc.
3
20mil TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PWROK/BTN/KB/Touch Pad
LA-5151P
A B C D E
A B C D E
http://mycomp.su/x/
Voltage divider (7/8 VCC) on 3VS_gate
1 1
+3VALW to +3VS Transfer +5VALW to +5VS Transfer +1.5V to +1.5VS Transfer

+3VALW Change from U21 to Q50+3VS B+_BIAS
B+_BIAS +5VALW
Change from U22 to Q51 +5VS
Q50 +1.5V +1.5VS
SI4392DY-T1-E3_SO8~D B+_BIAS Q51 Q45
1
8 3 SI4800BDY-T1-E3_SO8~D 8 3
1
10U_0805_10V4Z~D
10U_0805_10V4Z~D
20K_0402_5%
R345
7 2 8 1 R344 7 2
1
10U_0805_10V4Z~D
C515
0.1U_0402_16V4Z~D
C516
10U_0805_10V4Z~D
C517
C518
1 6 1 1 7 2 470K_0402_5% 6 1 1
0.1U_0402_16V4Z~D
C519
10U_0805_10V4Z~D
C520
C531
R338 5 1 1 6 3 5
300K_0402_5% R343 5 1 1
2
300K_0402_5%
2
4
2 2 SI4392DY-T1-E3_SO8~D 2
2
2 2
1
1
3VS_GATE 2 2 D
1 5VS_GATE SUSP 2 R1021 C532
1 G 2M_0402_5% 470P_0402_50V7K~D
C524 Q10 S 2
3
1
D
Q7
0.01U_0402_25V7K~D C525 SSM3K7002FU_SC70-3~D
2
1
2 D
Q8
SUSP 2 R340 0.01U_0402_25V7K~D
G 2M_0402_5% SUSP 2
2
S G
3
S
2
3
2 2
+3VALW
Discharge Circuit
1
R354
100K_0402_5%
+1.05V_VCCP +5VS
2
SYSON#
23 SYSON#
1
1
D
1
SYSON 2 Q16
28,31,49 SYSON
G SSM3K7002FU_SC70-3~D R359
S R352 470_0402_5%
3
2
470_0402_5%
2
1 2
1
R355 D D
10K_0402_5% SUSP 2 Q12 SUSP 2 Q20
1
G SSM3K7002FU_SC70-3~D G SSM3K7002FU_SC70-3~D
3 3
S S
3
+5VALW +0.75VS +3VS +1.5V
1
1
R360 R353
100K_0402_5% R358 R356 470_0402_5%
470_0402_5% 470_0402_5%
2
2
SUSP
1
1
D D D D
SUSP# 2 Q21 SUSP 2 Q19 SUSP 2 Q17 SYSON# 2 Q15
28,31,48,49,50 SUSP#
G SSM3K7002FU_SC70-3~D G SSM3K7002FU_SC70-3~D G SSM3K7002FU_SC70-3~D G SSM3K7002FU_SC70-3~D
2
S S S S
3
3
R361
10K_0402_5%
1
4 4
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, DC/DC Circuits
LA-5151P
A B C D E
5 4 3 2 1
http://mycomp.su/x/
D D
ZZZ
FD1 FD2 FD3 FD4

FIDUCAL FIDUCAL FIDUCAL FIDUCAL
@ @ @ @
1
PCB
H6
@ HOLEA
H_2P2
1
C C
H2
@ HOLEA
H_1P6
1
H7 H8 H9 H10 H11 H12 H14 H15 H16 H5
@ HOLEA @ HOLEA @ HOLEA @ HOLEA @ HOLEA @ HOLEA @ HOLEA @ HOLEA @ HOLEA @ HOLEA
H_3P0
1
H17 H18 H19 H21 H23 H24 H35 H36
@ HOLEA @ HOLEA @ HOLEA @ HOLEA @ HOLEA @ HOLEA @ HOLEA @ HOLEA
1
1
H3 H4 H20
@ HOLEA @ HOLEA @ HOLEA
H_3P2
1
B B
H25 H26 H27 H28 H30 H31 H32 H33

@ HOLEA @ HOLEA @ HOLEA @ HOLEA @ HOLEA @ HOLEA @ HOLEA@ HOLEA
H_4P0
1
1
H29
@ HOLEA
H_3P0X4P0
1
A A
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Screw
LA-5151P
5 4 3 2 1
5 4 3 2 1
@D14
@ D14 @D15
@ D15 @ D16
CRT DAN217_SC59-3 DAN217_SC59-3 DAN217_SC59-3
+5VS
W=40mils +CRT_VCC
1
D17
2 1
3 NC 1
C535
+3VS_DELAY BAT1000-7-F_SOT23-3~D 1U_0603_10V6K~D
http://mycomp.su/x/
2
L31
BLM18BA220SN1D_2P~D JCRT1
VGA_CRT_R 1 2 1 2 CRT_R_L 6
D 39 VGA_CRT_R MSEN# D
R893 0_0603_5% L32 11
31 MSEN# CRT_R_L
BLM18BA220SN1D_2P~D 1
VGA_CRT_G 1 2 1 2 CRT_G_L 7
39 VGA_CRT_G CRT_DDC_DATA_C
R894 0_0603_5% L33 12
BLM18BA220SN1D_2P~D CRT_G_L 2
VGA_CRT_B 1 2 1 2 CRT_B_L 8
39 VGA_CRT_B HSYNC_L
R895 0_0603_5% 13
150_0402_1%
R366
150_0402_1%
R367
150_0402_1%
R368
22P_0402_50V8J~D
22P_0402_50V8J~D
22P_0402_50V8J~D
4.7P_0402_50V8C~D
C540
4.7P_0402_50V8C~D
C541
4.7P_0402_50V8C~D
C542
1 @ 1 @ 1 @ CRT_B_L 3
C537
C538
C539
1 1 1 9
1
For EMI VSYNC_L 14 16
G
4 G 17
2 2 2 10
2 2 2 CRT_DDC_CLK_C 15
2
1 1 5
100P_0402_50V8J~D
C543
100P_0402_50V8J~D
C544
TYCO_1775763-2
CONN@
2 2
C545 +CRT_VCC
+3VS_DELAY +3VS_DELAY +3VS_DELAY +CRT_VCC +CRT_VCC 0.1U_0402_16V4Z~D
1 2
2
1
2.2K_0402_5%
U26
2.2K_0402_5%
R369
R370
2K_0402_5%
R371
2K_0402_5%
R372
OE#
P
CRT_HSYNC 2 4 D_CRT_HSYNC R1018 1 2 0_0603_5% HSYNC_L
39 CRT_HSYNC A Y
G
1
1
74AHCT1G125GW_SOT353-5
3
D_CRT_VSYNC R1019 1 2 0_0603_5% VSYNC_L
2
G
C C
+CRT_VCC 1 1
15P_0402_50V8J~D
C547
15P_0402_50V8J~D
C548
3 1 CRT_DDC_DATA_C C546 R373
39 CRT_DDC_DATA
0.1U_0402_16V4Z~D 10K_0402_5%
S
D
2
G
Q22 1 2 1 2
SSM3K7002FU_SC70-3~D 2 2
3 1 CRT_DDC_CLK_C
39 CRT_DDC_CLK
1
U27
S
Q23
OE#
P
SSM3K7002FU_SC70-3~D CRT_VSYNC 2 4
39 CRT_VSYNC A Y
G
74AHCT1G125GW_SOT353-5
3
R03: Add EDID_CLK_LCD
R374 2 @ 1 0_0402_5%
+LCDVDD +5VALW 39 LVDS_DDC_CLK EDID_DATA_LCD
R375 2 @ 1 0_0402_5% JLVDS1
39 LVDS_DDC_DATA
W=60mils W=60mils B+ @R381
@ R381 1 2 0_0805_5% +INV_PWR_SRC 40 51
40 G11
+LCDVDD 39 50
39 G10
2
38 49
R376 R377 +3VS +LCDVDD 38 G9
+3VS 37 37 G8 48
470_0603_5% 47K_0402_5% LCD_TST
40mil Q54
31 LCD_TST EDID_CLK_LCD
36
35
36
35
G7
G6
47
46
EDID_DATA_LCD
40mil 34 45
1 1
R378 B+ SI3457BDV-T1-E3_TSOP6~D LVDS_A0- 34 G5

38 LVDS_A0- 33 44
33 G4
3
D 56K_0402_5%
S
LVDS_A0+
+INV_PWR_SRC 38 LVDS_A0+ 32 43
D
Q24
G
Q25 32 G3
2 2 1 2 6 31 42
S
SSM3K7002FU_SC70-3~D G SI2301BDS-T1-E3_SOT23-3~D LVDS_A1- 31 G2
4 5 38 LVDS_A1- 30 41
LVDS_A1+ 30 G1
S D 2 29
3
38 LVDS_A1+ 29
C1550
R1564
1000P_0402_50V7K~D
100K_0402_5%
B B
1 1 Reserve for EMI 28 28
1
C549
0.1U_0402_16V4Z~D
G
D37 1 1 LVDS_A2- 27
VGA_LVDDEN +LCDVDD (Place close to JLVDS1) 38 LVDS_A2- LVDS_A2+ 27
2 26
3
38 VGA_LVDDEN 38 LVDS_A2+ 26
1
D C1551 @ 1 2 25 25
2
0.1U_0402_16V4Z~D
1 2 Q26 1 1 0.1U_0603_50V4Z~D C1546 5P_0402_50V8C LVDS_ACLK- 24

2 2 38 LVDS_ACLK- 24
C551
G BSS138_SOT23~D LVDS_ACLK+ 23
2
38 LVDS_ACLK+ 23
1
LCD_VCC_TEST_EN 3 S @ C550 @ 1 2 22
31 LCD_VCC_TEST_EN
3
4.7U_0805_10V4Z~D PW R_SRC_ON C1547 5P_0402_50V8C LVDS_B0- 22

38 LVDS_B0- 21
BAT54C-7-F_SOT23~D R380 2 2 LVDS_B0+ 21
38 LVDS_B0+ 20 20
1
10K_0402_5% 19
R1565 LVDS_B1- 19
18
2
38 LVDS_B1- LVDS_B1+ 18
100K_0402_5% 38 LVDS_B1+ 17 17
16 16
LVDS_B2- 15
2
+LCDVDD 38 LVDS_B2- LVDS_B2+ 15

38 LVDS_B2+ 14 14
@ 1 2 13
13
1
D C1548 5P_0402_50V8C LVDS_BCLK-

38 LVDS_BCLK- 12
Q55 LVDS_BCLK+ 12
2 38 LVDS_BCLK+ 11 11
G SSM3K7002FU_SC70-3~D @ 1 2 10
C1549 5P_0402_50V8C 10
S 9
3
+3VS +3VS 9
8 8
7
INVT_PWM 7
6
6
1
DISPOFF# 5
+3VS 5
4
@ R394 4
+INV_PWR_SRC 3 3
5
U45 10K_0402_5% 2 2
1
1 1
P
38 VGA_PWM
2
R382 INA INVT_PWM 1

O 4 W=40mils
2 JAE_FI-G40SB-VF25-DT
31 EC_PW M INB
G
4.7K_0402_5% CONN@
D19 74AHC1G32GW_SOT353-5~D
2
A BKOFF# DISPOFF# A
31 BKOFF# 1 2
@R944
@ R944
0_0402_5% DELL CONFIDENTIAL/PROPRIETARY
2 1
@ R945
@R945
0_0402_5% Compal Electronics, Inc.
2 1 PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, CRT / LVDS CONN
LA-5151P
5 4 3 2 1
5 4 3 2 1
http://mycomp.su/x/
PLACE AC CAP
CLOSE TO CONNECTOR
D D
C552 1 2 0.1U_0402_10V6K~D TMDS_TXCN
39 HDMI_A3N_VGA
C553 1 2 0.1U_0402_10V6K~D TMDS_TXCP
39 HDMI_A3P_VGA
C554 1 2 0.1U_0402_10V6K~D TMDS_TX0N @ F3
39 HDMI_A2N_VGA
1.5A_6V_1206L150PR~D
C555 1 2 0.1U_0402_10V6K~D TMDS_TX0P 2 1
39 HDMI_A2P_VGA
C557 2 0.1U_0402_10V6K~D TMDS_TX1N
39 HDMI_A1N_VGA 1
R384
Co-lay
C558 1 2 0.1U_0402_10V6K~D TMDS_TX1P 0_1206_5%
39 HDMI_A1P_VGA
+5VS 2 1
C559 1 2 0.1U_0402_10V6K~D TMDS_TX2N LINK OK
39 HDMI_A0N_VGA
C560 1 2 0.1U_0402_10V6K~D TMDS_TX2P C556 JHDMI1
39 HDMI_A0P_VGA HDMI_HPLUG
1U_0402_6.3V6K~D 19
+5VS R385 2 HP_DET
1 499_0402_1% 1 2 18 +5V
17 DDC/CEC_GND
R386 2 1 499_0402_1% DDC_DAT_HDMI 16
DDC_CLK_HDMI SDA
15 SCL
R387 2 1 499_0402_1% PLACE PULL DOWN RESISTORS CLOSE TO 14 Reserved
1
D
DIFFERENTIAL PAIRS CONNECTED TO SOLID 13
Q27 R388 2 TMDS_L_TXCN CEC
2 1 499_0402_1% 12 CK-
G SSM3K7002FU_SC70-3~D GROUND FLOOD WHICH IS CONTROLLED 11
R389 2 BY THE FET TMDS_L_TXCP CK_shield
S 1 499_0402_1% 10
3
CK+
1
AVOID STUBS TO ALL DIFFERENTIAL TRACES TMDS_L_TX0N 9

R390 R391 2 D0-
1 499_0402_1% 8 D0_shield
100K_0402_5% TMDS_L_TX0P 7
R392 2 TMDS_L_TX1N D0+
1 499_0402_1% 6 D1-
5
2
R393 2 TMDS_L_TX1P D1_shield

1 499_0402_1% 4 20
C TMDS_L_TX2N D1+ GND C
3 D2- GND 21
2 22
TMDS_L_TX2P D2_shield GND
1 23
D2+ GND
FOX_QJ5119L-NVBT-7F
CONN@
DP_AUX PULLUP
POWER RAIL MUST
BE UP BEFORE
CORE POWER RAIL
+3VS_DELAY +5VS
Place close JHDMI1
1
+3VS_DELAY
R395
2K_0402_1%
2
L74
2
TMDS_TXCN 2 1 TMDS_L_TXCN
DDC_CLK_HDMI 2 1 R400
39 HDMI_DDC_CLK 1 6
1
C 150K_0402_5%
@ Q28A TMDS_TXCP 3 4 TMDS_L_TXCP 2 1 2 HDMI_HPLUG
2N7002DW-7-F_SOT363-6~D 3 4 B
DLW 21SN900HQ2L_0805_4P~D E Q29
3
1 2 MMBT3904_SOT23-3~D
1
R399 0_0402_5% L75 R401 1 @ 2 0_0402_5%
B TMDS_TX0N TMDS_L_TX0N 39 HDMI_HPD B
2 2 1 1
@ R402
1
365K_0402_1%
TMDS_TX0P 3 4 TMDS_L_TX0P R404
2
3 4
10K_0402_5%
+3VS_DELAY +5VS DLW 21SN900HQ2L_0805_4P~D
2
L76
1
TMDS_TX1N 2 1 TMDS_L_TX1N
R406 2 1
2K_0402_1%
TMDS_TX1P 3 4 TMDS_L_TX1P
3 4
5
DLW 21SN900HQ2L_0805_4P~D
4 3 DDC_DAT_HDMI
39 HDMI_DDC_DATA
L73
TMDS_TX2N 2 1 TMDS_L_TX2N
@ Q28B 2 1
2N7002DW-7-F_SOT363-6~D
1 2 TMDS_TX2P 3 4 TMDS_L_TX2P
R408 0_0402_5% 3 4
DLW 21SN900HQ2L_0805_4P~D
A A
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, HDMI CONN
LA-5151P
5 4 3 2 1
5 4 3 2 1
http://mycomp.su/x/
D D
Place close JDP1

@ D38
DISP_A0P 1 10 DISP_A0P
DISP_A0N 2 9 DISP_A0N
C561 2 0.1U_0402_10V6K~D DISP_A0N
39 DISP_A0N_VGA
C562 2
1
1 0.1U_0402_10V6K~D DISP_A0P DISP_A1N 5 6 DISP_A1N Co-lay +3VS_DP
39 DISP_A0P_VGA
F2
C563 2 1 0.1U_0402_10V6K~D DISP_A1N 3 1 2 +3VS_DP
39 DISP_A1N_VGA +3VS
C564 2 1 0.1U_0402_10V6K~D DISP_A1P 1 1
39 DISP_A1P_VGA
10U_0805_10V4Z~D
C952
0.1U_0402_16V4Z~D
C953
8 1.5A_6V_1206L150PR~D
C566 2 1 0.1U_0402_10V6K~D DISP_A2N
39 DISP_A2N_VGA DISP_A2P
C568 2 1 0.1U_0402_10V6K~D RCLAMP0524P.TCT~D R409 2 @ 1 0_1206_5%
39 DISP_A2P_VGA 2 2
C569 2 1 0.1U_0402_10V6K~D DISP_A3N
39 DISP_A3N_VGA DISP_A3P
C570 2 1 0.1U_0402_10V6K~D
39 DISP_A3P_VGA
@ D39
C DISP_A2P C
1 10 DISP_A2P
JDP1
DISP_A2N 2 9 DISP_A2N
DISP_A0P 1 LANE0_P
DISP_A3N 5 6 DISP_A3N 2 GND
DISP_A0N 3 LANE0_N
3 DISP_A1P 4 LANE1_P
5 GND
8 DISP_A1N 6 LANE1_N
DISP_A2P 7 LANE2_P
RCLAMP0524P.TCT~D 8 GND
DISP_A2N 9 LANE2_N
DISP_A3P 10 LANE3_P
11 GND
DISP_A3N 12
1
LANE3_N
DISP_EN 13
2 +5VS DISP_CEC 14 CONFIG1
CONFIG2
Q31A DISP_DDC_CLK_C 15 AUXCH_P
2N7002DW-7-F_SOT363-6~D 16 GND
DISP_DDC_DAT_C 17 AUXCH_N
1
+5VS DISP_HD 18
6
HPD
DISP_DDC_EN R414 19 RETURN
100K_0402_1% 20
3
DP_PWR
1
R410 21
2
Q31B 100K_0402_1% DISP_DDC_EN R415 22
R416
R943
C573
C572
GROUND
5 2N7002DW-7-F_SOT363-6~D 100K_0402_1% 23
6
C565 24
2
0.1U_0402_10V6K~D 1
4
1
R411 1 @ 2 0_0402_5% 2 1 DISP_DDC_CLK_C 1 1
B 39 DP_DDC_CLK B
C571 2 FOX_3V102P1-RB2BT-8F
R412 1 @ 2 0_0402_5% 2 1 DISP_DDC_DAT_C 0.1U_0402_10V6K~D Q30A CONN@
39 DP_DDC_DATA 2 2N7002DW-7-F_SOT363-6~D
1
1
3
C567 2 2
2
1
5.1M_0402_5%
1M_0402_5%
22U_0805_6.3V6M~D
0.1U_0402_10V6K~D
2 0.1U_0402_10V6K~D Close connect
R413
Q32A 100K_0402_1% 5
2N7002DW-7-F_SOT363-6~D
Q30B
6
4
DISP_DDC_EN 2N7002DW-7-F_SOT363-6~D
3
+3VS_DELAY
Q32B
5 2N7002DW-7-F_SOT363-6~D
4
+3VS_DELAY
R417
1
C 150K_0402_5%
2 1 2
B
@ E Q33
1
R418 1 2 0_0402_5% MMBT3904_SOT23-3~D
39 DP_HPD @ R419
365K_0402_1%
1
R421
2
10K_0402_5%
A A
2 DELL CONFIDENTIAL/PROPRIETARY
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Display Port
LA-5151P
5 4 3 2 1
5 4 3 2 1
http://mycomp.su/x/
D D
PCIE_MTX_C_GRX_P[0..15] PCIE_MRX_GTX_P[0..15]
12 PCIE_MTX_C_GRX_P[0..15] PCIE_MRX_GTX_P[0..15] 12
PCIE_MTX_C_GRX_N[0..15] U28A PCIE_MRX_GTX_N[0..15]
12 PCIE_MTX_C_GRX_N[0..15] PCIE_MRX_GTX_N[0..15] 12
PCIE_MTX_C_GRX_P0 AA38 Y33 PCIE_MRX_C_GTX_P0 C574 1 2 .1U_0402_16V7K~D PCIE_MRX_GTX_P0

PCIE_MTX_C_GRX_N0 PCIE_RX0P PCIE_TX0P PCIE_MRX_C_GTX_N0 C575 1 .1U_0402_16V7K~D PCIE_MRX_GTX_N0
Y37 PCIE_RX0N PCIE_TX0N Y32 2
PCIE_MTX_C_GRX_P1 Y35 W33 PCIE_MRX_C_GTX_P1 C576 1 2 .1U_0402_16V7K~D PCIE_MRX_GTX_P1 U28G R946

PCIE_MTX_C_GRX_N1 PCIE_RX1P PCIE_TX1P PCIE_MRX_C_GTX_N1 C577 1 .1U_0402_16V7K~D PCIE_MRX_GTX_N1 10K_0402_5%
W36 W32 2
PCIE_RX1N PCIE_TX1N
1 2
PCIE_MTX_C_GRX_P2 W38 U33 PCIE_MRX_C_GTX_P2 C578 1 2 .1U_0402_16V7K~D PCIE_MRX_GTX_P2 LVDS CONTROL AK27
PCIE_MTX_C_GRX_N2 PCIE_RX2P PCIE_TX2P PCIE_MRX_C_GTX_N2 C579 1 .1U_0402_16V7K~D PCIE_MRX_GTX_N2 VARY_BL VGA_PWM 35
V37 PCIE_RX2N PCIE_TX2N U32 2 DIGON AJ27 VGA_LVDDEN 35
R423
10K_0402_5%
PCIE_MTX_C_GRX_P3 V35 U30 PCIE_MRX_C_GTX_P3 C580 1 2 .1U_0402_16V7K~D PCIE_MRX_GTX_P3 1 2
U36 PCIE_RX3N PCIE_TX3N U29 2
AK35 LVDS_BCLK+
TXCLK_UP_DPF3P LVDS_BCLK- LVDS_BCLK+ 35
TXCLK_UN_DPF3N AL36
PCIE_MTX_C_GRX_P4 PCIE_MRX_C_GTX_P4 C582 1 .1U_0402_16V7K~D PCIE_MRX_GTX_P4 LVDS_BCLK- 35
U38 PCIE_RX4P PCIE_TX4P T33 2
PCIE_MTX_C_GRX_N4 T37 T32 PCIE_MRX_C_GTX_N4 C583 1 2 .1U_0402_16V7K~D PCIE_MRX_GTX_N4 AJ38 LVDS_B0+
PCIE_RX4N PCIE_TX4N TXOUT_U0P_DPF2P LVDS_B0+ 35
PCI EXPRESS INTERFACE

AK37 LVDS_B0-
TXOUT_U0N_DPF2N LVDS_B0- 35
PCIE_MTX_C_GRX_P5 T35 T30 PCIE_MRX_C_GTX_P5 C584 1 2 .1U_0402_16V7K~D PCIE_MRX_GTX_P5 AH35 LVDS_B1+
C PCIE_MTX_C_GRX_N5 PCIE_RX5P PCIE_TX5P PCIE_MRX_C_GTX_N5 C585 1 .1U_0402_16V7K~D PCIE_MRX_GTX_N5 TXOUT_U1P_DPF1P LVDS_B1- LVDS_B1+ 35 C
R36 PCIE_RX5N PCIE_TX5N T29 2 TXOUT_U1N_DPF1N AJ36
LVDS_B1- 35
AG38 LVDS_B2+
PCIE_MTX_C_GRX_P6 PCIE_MRX_C_GTX_P6 C586 1 .1U_0402_16V7K~D PCIE_MRX_GTX_P6 TXOUT_U2P_DPF0P LVDS_B2- LVDS_B2+ 35
R38 PCIE_RX6P PCIE_TX6P P33 2 TXOUT_U2N_DPF0N AH37 LVDS_B2- 35
PCIE_MTX_C_GRX_N6 P37 P32 PCIE_MRX_C_GTX_N6 C587 1 2 .1U_0402_16V7K~D PCIE_MRX_GTX_N6
PCIE_RX6N PCIE_TX6N T95
AF35
TXOUT_U3P T96
TXOUT_U3N AG36
PCIE_MTX_C_GRX_P7 P35 P30 PCIE_MRX_C_GTX_P7 C588 1 2 .1U_0402_16V7K~D PCIE_MRX_GTX_P7
N36 PCIE_RX7N PCIE_TX7N P29 2
LVTMDP
PCIE_MTX_C_GRX_P8 N38 N33 PCIE_MRX_C_GTX_P8 C590 1 2 .1U_0402_16V7K~D PCIE_MRX_GTX_P8 AP34 LVDS_ACLK+

PCIE_MTX_C_GRX_N8 PCIE_RX8P PCIE_TX8P PCIE_MRX_C_GTX_N8 C591 1 .1U_0402_16V7K~D PCIE_MRX_GTX_N8 TXCLK_LP_DPE3P LVDS_ACLK- LVDS_ACLK+ 35
M37 PCIE_RX8N PCIE_TX8N N32 2 TXCLK_LN_DPE3N AR34
LVDS_ACLK- 35
AW37 LVDS_A0+
PCIE_MTX_C_GRX_P9 PCIE_MRX_C_GTX_P9 C592 1 .1U_0402_16V7K~D PCIE_MRX_GTX_P9 TXOUT_L0P_DPE2P LVDS_A0- LVDS_A0+ 35
M35 PCIE_RX9P PCIE_TX9P N30 2 TXOUT_L0N_DPE2N AU35
PCIE_MTX_C_GRX_N9 PCIE_MRX_C_GTX_N9 C593 1 .1U_0402_16V7K~D PCIE_MRX_GTX_N9 LVDS_A0- 35
L36 N29 2
PCIE_RX9N PCIE_TX9N LVDS_A1+
TXOUT_L1P_DPE1P AR37
LVDS_A1- LVDS_A1+ 35
AU39
PCIE_MTX_C_GRX_P10 PCIE_MRX_C_GTX_P10 C594 1 .1U_0402_16V7K~D PCIE_MRX_GTX_P10 TXOUT_L1N_DPE1N LVDS_A1- 35
L38 L33 2
PCIE_MTX_C_GRX_N10 PCIE_RX10P PCIE_TX10P PCIE_MRX_C_GTX_N10 C595 1 .1U_0402_16V7K~D PCIE_MRX_GTX_N10 LVDS_A2+
K37 PCIE_RX10N PCIE_TX10N L32 2 TXOUT_L2P_DPE0P AP35
LVDS_A2- LVDS_A2+ 35
AR35
TXOUT_L2N_DPE0N LVDS_A2- 35
PCIE_MTX_C_GRX_P11 K35 L30 PCIE_MRX_C_GTX_P11 C596 1 2 .1U_0402_16V7K~D PCIE_MRX_GTX_P11 AN36 T86
PCIE_MTX_C_GRX_N11 PCIE_RX11P PCIE_TX11P PCIE_MRX_C_GTX_N11 C597 1 .1U_0402_16V7K~D PCIE_MRX_GTX_N11 TXOUT_L3P T87
J36 L29 2 AP37
PCIE_RX11N PCIE_TX11N TXOUT_L3N
PCIE_MTX_C_GRX_P12 J38 K33 PCIE_MRX_C_GTX_P12 C598 1 2 .1U_0402_16V7K~D PCIE_MRX_GTX_P12

H37 K32 2
PCIE_RX12N PCIE_TX12N 216-0729002 A12 M96_BGA962
M96@
PCIE_MTX_C_GRX_P13 H35 J33 PCIE_MRX_C_GTX_P13 C600 1 2 .1U_0402_16V7K~D PCIE_MRX_GTX_P13
B PCIE_MTX_C_GRX_N13 PCIE_RX13P PCIE_TX13P PCIE_MRX_C_GTX_N13 C601 1 .1U_0402_16V7K~D PCIE_MRX_GTX_N13 B
G36 PCIE_RX13N PCIE_TX13N J32 2
PCIE_MTX_C_GRX_P14 G38 K30 PCIE_MRX_C_GTX_P14 C602 1 2 .1U_0402_16V7K~D PCIE_MRX_GTX_P14

F37 K29 2
PCIE_RX14N PCIE_TX14N
PCIE_MTX_C_GRX_P15 F35 H33 PCIE_MRX_C_GTX_P15 C604 1 2 .1U_0402_16V7K~D PCIE_MRX_GTX_P15

E37 PCIE_RX15N PCIE_TX15N H32 2
CLOCK
CLK_PCIE_VGA AB35
6 CLK_PCIE_VGA CLK_PCIE_VGA# PCIE_REFCLKP
6 CLK_PCIE_VGA# AA36 PCIE_REFCLKN
CALIBRATION
AJ21 Y30 R424 1 2 1.27K_0402_1%
NC#1 PCIE_CALRP
AK21
NC#2 R426 1 2K_0402_1%
AH16 NC_PWRGOOD PCIE_CALRN Y29 2 +1.1VS
11,20,27,30,31 PLT_RST# AA30 PERSTB
216-0729002 A12 M96_BGA962

M96@
M96 P/N : SA00002UQ40 (S IC 216-0729042-00 A13 M96 FCBGA962 0FD)

A M92 P/N : SA00002YX20 ( S IC 216-0728014 A12 M92-M2 XT FCBGA 0FD) A
U28 DELL CONFIDENTIAL/PROPRIETARY

M92/XT GPU TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
M92@ BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, M96 PCIE/ LVDS
LA-5151P
5 4 3 2 1
5 4 3 2 1
U28B
Strap Name Pin Straps description Default
Transmitter Power Saving Enable
TX_PWRS_ENB GPIO0 0: 50% Tx output swing for mobile mode 0 TXCAP_DPA3P
AU24
HDMI_A3P_VGA 36
1: full Tx output swing (Default setting for Desktop) TXCAM_DPA3N
AV23
HDMI_A3N_VGA 36
PCI Express Transmitter De-emphasis Enable AT25 +3VS
TX_DEEMPH_EN GPIO1 0: Tx de-emphasis diabled for mobile mode 0 MUTI GFX TX0P_DPA2P
TX0M_DPA2N
AR24
HDMI_A2P_VGA
HDMI_A2N_VGA
36
36
External VGA Thermal Sensor
1: Tx de-emphasis enabled (Defailt setting for desktop) DPA
AU26 2
TX1P_DPA1P HDMI_A1P_VGA 36 C867
0= Advertises the PCI-E device as 2.5 GT/s capable at power-on TX1M_DPA1N
AV25
HDMI_A1N_VGA 36
http://mycomp.su/x/
BIF_GEN2_EN GPIO2 1= Advertises the PCI-E device as 5.0 GT/s capable at power-on 0 0.1U_0402_16V4Z~D A00 modify
5.0 GT/s capability will be controlled by software AR8
DVPCNTL_MVP_0 TX2P_DPA0P
AT27
HDMI_A0P_VGA 36
AU8 AR26 1
DVPCNTL_MVP_1 TX2M_DPA0N HDMI_A0N_VGA 36
Enable CLKREQ# Power Management AP8
DVPCNTL_0
U38
STRAP_BIF GPIO22 0: CLKREQ# power management capability is disabled 0 AW8 AR30 1 8 EC_SMB_CK2
DVPCNTL_1 TXCBP_DPB3P DISP_A3P_VGA 37 VDD SCLK EC_SMB_CK2 7,27,28,31
D _CLK_PM_EN 1: CLKREQ# power management capability is enabled AR3 DVPCNTL_2 TXCBM_DPB3N AT29 DISP_A3N_VGA 37 D
AR1 GPU_THERM_D+ 2 7 EC_SMB_DA2
DVPCLK D+ SDATA EC_SMB_DA2 7,27,28,31
GPIO13,12,11 (config 2,1,0) : memory apertures VRAM_DEC AU1 AV31 2200P_0402_50V7K~D
DVPDATA_0 TX3P_DPB2P DISP_A2P_VGA 37
CONFIG[2] GPIO13 a) If BIOS_ROM_EN = 1, then Config[2:0] defines CONFIG[3:0] VRAM_ID0 AU3
DVPDATA_1 TX3M_DPB2N
AU30
DISP_A2N_VGA 37
1 2 3
D- ALERT#
6
CONFIG[1] GPIO12 VRAM_ID1 AW3 DPB C868
the ROM type. 128 MB 000 DVPDATA_2
CONFIG[0] GPIO11 001 VRAM_ID2 AP6
DVPDATA_3 TX4P_DPB1P
AR32
DISP_A1P_VGA 37
GPU_THERM_D- 4
THERM# GND
5
b) If BIOS_ROM_EN = 0, then Config[2:0] defines 256 MB 001 AW5
AT31
DISP_A1N_VGA 37
R976
the primary memory aperture size. 64 MB 010 AU5 +3VS 1 2
DVPDATA_5 10K_0402_5% ADM1032ARMZ-2REEL_MSOP8
AR6 AT33
DVPDATA_6 TX5P_DPB0P DISP_A0P_VGA 37 VGA_THERM_STP#
BIOS_ROM_EN GPIO22 Enable external BIOS ROM device AW6
AU32
DISP_A0N_VGA 37
0: Diable, 1: Enable 0 AU6
DVPDATA_8
AT7 AU14
DVPDATA_9 TXCCP_DPC3P
AUD[1] 00: No audio function; 10: Audio for DisplayPort only; AV7
DVPDATA_10 TXCCM_DPC3N
AV13 R1560
AUD(0) HSYNC 01: Audio for DisplayPort and HDMI if adapter is detected; 11 AN7
DVPDATA_11
0_0402_5%
D
VSYNC AV9 AT15 VGA_THERM_STP# 3 1 1 2
11: Audio for both DisplayPort and HDMI DVPDATA_12 TX0P_DPC2P MAINPWON 7,47,52
AT9 AR14
DVPDATA_13 TX0M_DPC2N Q52
CCBYPASS GENERICC 0 AR10
DVPDATA_14
AW10 DPC AU16 SSM3K7002FU_SC70-3~D
G
2
DVPDATA_15 TX1P_DPC1P
SMS_EN_HARD H2SYNC 0 AU10
DVPDATA_16 TX1M_DPC1N
AV15
AP10 7,31,51 VR_ON
DVPDATA_17
If VIP_DEVICE_STRAP_EN is set to ?? then this pin is used to sense AV11
DVPDATA_18 TX2P_DPC0P
AT17
VIP_DEVICE V2SYNC whether a VIP slave device is connected to the VIP Host interface. AT11
DVPDATA_19 TX2M_DPC0N
AR16
0 MEM_ID0 AR12
_STRAP_DIS If VIP_DEVICE_STRAP_EN is set to ?? then this pin is not used as a MEM_ID1 DVPDATA_20
AW12 AU20
DVPDATA_21 TXCDP_DPD3P
strap at all (i.e. its value during reset is unimportant), and it can be MEM_ID2 AU12 AT19
MEM_ID3 DVPDATA_22 TXCDM_DPD3N
used as a regular GPIO AP12
DVPDATA_23
AT21
TX3P_DPD2P
AR20
TX3M_DPD2N
Location MEM_ID0 MEM_ID1 MEM_ID2 MEM_ID3
+3VS_DELAY DPD AU22
TX4P_DPD1P
VRAM
R428 1 2 4.7K_0402_5%
TX4M_DPD1N
AV21
+3VS_DELAY
Samsung O O O O R429 1 2 4.7K_0402_5% I2C AT23
TX5P_DPD0P
AR22
LVDS_DDC_CLK TX5M_DPD0N +3VS +3VS_DELAY
HYNIX 1 O O O 35 LVDS_DDC_CLK AK26
SCL
LVDS_DDC_DATA AJ26 100mA
35 LVDS_DDC_DATA SDA
D
3 1
+1.8VS X76@ AD39
R VGA_CRT_R 35
2
C R430 1 2 10K_0402_5% MEM_ID0 GENERAL PURPOSE I/O AD37 Q34 C
+1.8VS RB
1
1
10K_0402_5%
R885
10K_0402_5%
R886
10K_0402_5%
R887
10K_0402_5%
R888
VGA_GPIO0 AH20 SI2301BDS-T1-E3_SOT23-3~D
G
2
R432 1 @ GPIO_0
2 10K_0402_5% MEM_ID1 VGA_GPIO1 AH18 AE36 R427
VGA_GPIO2 GPIO_1 G VGA_CRT_G 35 100K_0402_5%
AN16 AD35
GPIO_2 GB
@ @ @ R433 1 @ 2 10K_0402_5% MEM_ID2 AH23
1
GPIO_3_SMBDATA
AJ23 AF37
2
VRAM_ID0 GPIO_4_SMBCLK B VGA_CRT_B 35

R434 1 @ 2 10K_0402_5% MEM_ID3 VGA_AC_DET AH17 AE38 R431
GPIO_5_AC_BATT BB
1
VRAM_ID1 DAC1 100K_0402_5% D
AJ17
VRAM_ID2 VGA_ENBKL GPIO_6 Q35
AK17 AC36 50 1.1VS_RUN_PWRGD 1 2 2
VRAM_DEC 31 VGA_ENBKL SOUT_GPIO8 GPIO_7_BLON HSYNC CRT_HSYNC 35 G SSM3K7002FU_SC70-3~D
AJ13 AC38 1
GPIO_8_ROMSO VSYNC CRT_VSYNC 35
DDR3 SIN_GPIO9 AH15 S
3
1
GPIO_9_ROMSI
10K_0402_5%
R889
10K_0402_5%
R890
10K_0402_5%
R891
10K_0402_5%
R892
AJ16 C606
VGA_GPIO11 GPIO_10_ROMSCK R441 499_0402_1% L36 0.1U_0402_16V4Z~D
AK16 AB34 1 2
VGA_GPIO12 GPIO_11 RSET 2
VRAM_DEC 1 AL16
GPIO_12 70mA BLM18PG121SN1D_0603
@ @ @ @ VGA_GPIO13 AM16 AD34 +AVDD 2 1
GPIO_13 AVDD +1.8VS
HDMI_HPD AM14 AE34
2
36 HDMI_HPD GPIO_14_HPD2 AVSSQ
1U_0402_6.3V4Z~D
C607
0.1U_0402_16V4Z~D
C608
10U_0603_6.3V6M~D
C609
GPU_VID0 AM13
50 GPU_VID0 27M_SSC_R GPIO_15_PWRCNTL_0 +VDD1DI
AK14 AC33 1 1 1
VGA_THERM# GPIO_16_SSIN VDD1DI
DP_HPD
AG30
GPIO_17_THERMAL_INT VSS1DI
AC34 42mA
37 DP_HPD AN14
GPIO_18_HPD3
AM17
+3VS_DELAY
50 GPU_VID1 T88
GPU_VID1 AL13
GPIO_19_CTF
GPIO_20_PWRCNTL_1 R2
AC30
2 2 2 PWR Sequence
BB_EN AJ14 AC31
@ R438 1 VGA_GPIO0 ROMSE_GPIO22 GPIO_21_BB_EN R2B
2 10K_0402_5% AK13 L37
@ R439 1 VGA_GPIO1 +3VS_DELAY CLKREQ_GPIO23 GPIO_22_ROMCSB
2 10K_0402_5% AN13 AD30 BLM18PG121SN1D_0603
@ R440 1 GPIO_23_CLKREQB G2
2 10K_0402_5% VGA_GPIO2 T90 AM23 AD31 2 1 +1.8VS VGA_CORE (VDDC)
VGA_THERM# T91 JTAG_TRSTB G2B
1 2 AN23
JTAG_TDI
1U_0402_6.3V4Z~D
C610
0.1U_0402_16V4Z~D
C611
10U_0603_6.3V6M~D
C612
@ R552 1 2 10K_0402_5% VGA_AC_DET R457 10K_0402_5% T92 AK23
JTAG_TCK B2
AF30 +1.8VS
1 2 T93 AL24 AF31 1 1 1
@ R442 1 SOUT_GPIO8 JTAG_TMS B2B
2 10K_0402_5% @ R458 10K_0402_5% T94 AM24 +3VS_DELAY
JTAG_TDO
AJ19
@ R443 1 SIN_GPIO9 CLKREQ_GPIO23 GENERICA
2 10K_0402_5% 1 2 AK19 AC32
@ R460 10K_0402_5% GENERICC GENERICB C 2 2 2
AJ20 AD32
R444 1 GENERICC Y
2 10K_0402_5% VGA_GPIO11 AK20 AF32
@ R445 1 VGA_GPIO12 GPU_VID1 GENERICD COMP
2 10K_0402_5% C617 1 2 100P_0402_50V8J~D AJ24
@ R446 1 GENERICE_HPD4 DAC2
2 10K_0402_5% VGA_GPIO13 AH26
GENERICF H2SYNC +3VS_DELAY
AH24 AD29
GENERICG H2SYNC V2SYNC
AC29
B V2SYNC B
@ R451 1 2 10K_0402_5% ROMSE_GPIO22
T89 AK24 40mA V2SYNC @ R449 1 2 10K_0402_5%
@ R452 1 HPD1
2 10K_0402_5% GENERICC AG31 VDD2DI R984 2 1 0_0603_5% +1.8VS H2SYNC @ R450 1 2 10K_0402_5%
VDD2DI
AG32
R1558 22_0402_5% U109 VSS2DI CRT_VSYNC R447 1 2 10K_0402_5%
XTALIN 1 2 1 6 R1555 R455 1 2 499_0402_1% 65mA CRT_HSYNC R448 1 2 10K_0402_5%
REFOUT VSS +1.8VS
33_0402_5% AG33 A2VDD R985 2 1 0_0603_5% L63
A2VDD +3VS_DELAY
SSC_OUT 2 5 1 2 27M_SSC_R R456 1 2 249_0402_1%~D BLM18PG121SN1D_0603
XOUT MODOUT +A2VDDQ HDMI_DDC_CLK @ R463 1
AD33 2 1 +1.8VS 2 10K_0402_5%
SSC_IN C613 1 A2VDDQ
3 4 +3VS_DELAY 2 0.1U_0402_16V4Z~D VGA_VREF AH13 1 1 1 HDMI_DDC_DATA @ R464 1 2 10K_0402_5%
XIN/CLKIN VDD VREFG
1U_0402_6.3V4Z~D
C881
0.1U_0402_16V4Z~D
C882
10U_0603_6.3V6M~D
C883
AF33
A2VSSQ R459
1 1
ASM3P2872AF-06OR_TSOT-23-6 +1.8VS L41 715_0402_1%
C1531 C1532 BLM18PG121SN1D_0603 2 2 2
0.01U_0402_16V7K~D 0.1U_0402_16V4Z~D
120mA DPLL_PVDD R2SET
AA29 1 2
2 1
2 2 VGA_CRT_R R553 1
1 1 1 2 150_0402_1%
0.1U_0402_16V4Z~D
C615
1U_0402_6.3V4Z~D
C616
C614 VGA_CRT_G R554 1 2 150_0402_1%

10U_0603_6.3V6M~D DDC/AUX AM26 CRT_DDC_CLK VGA_CRT_B R555 1 2 150_0402_1%
PLL/CLOCK DDC1CLK CRT_DDC_CLK 35
AN26 CRT_DDC_DATA
2 2 2 DDC1DATA CRT_DDC_DATA 35
AM32
DPLL_PVDD CRT
AN32 AM27
+1.1VS L42 DPLL_PVSS AUX1P
AL27
BLM18PG121SN1D_0603 AUX1N
150mA DPLL_VDDC HDMI_DDC_CLK
2 1 AN31
DPLL_VDDC DDC2CLK
AM19 HDMI_DDC_CLK 36
1 1 1 AL19 HDMI_DDC_DATA
DDC2DATA HDMI_DDC_DATA 36
10U_0603_6.3V6M~D
C618
0.1U_0402_16V4Z~D
C619
1U_0402_6.3V4Z~D
C620
XTALIN
HDMI
AV33 AN20
XTALIN AUX2P
AU34 AM20
2 2 2 XTALOUT AUX2N
AL30
DDCCLK_AUX3P
AM30
DDCDATA_AUX3N
M96 only
AL29
GPU_THERM_D+ DDCCLK_AUX4P
AF29 AM29
SSC_OUT SSC_IN GPU_THERM_D- DPLUS THERMAL DDCDATA_AUX4N
AG29
R465 DMINUS DP_DDC_CLK
AN21 DP_DDC_CLK 37
1M_0603_5% +1.8VS L43 DDCCLK_AUX5P DP_DDC_DATA
BLM18PG121SN1D_0603
20mA DDCDATA_AUX5N
AM21 DP_DDC_DATA 37
A AK32 A
TSVDD TS_FDO
2 1 AJ32 AJ30
Y4 TSVDD DDC6CLK
1 1 1 AJ33 AJ31
TSVSS DDC6DATA
10U_0603_6.3V6M~D
C623
1U_0402_6.3V4Z~D
C624
0.1U_0402_16V4Z~D
C625
3 4
OUT GND
AK30
NC_DDCCLK_AUX7P
2 1 AK29
GND IN 2 2 2 NC_DDCDATA_AUX7N
C621 27MHZ_16PF_X7T027000BG1H-V DELL CONFIDENTIAL/PROPRIETARY
22P_0402_50V8J~D C622
18P_0402_50V8J~D 216-0729002 A12 M96_BGA962
M96@
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, M96 GPIO/CRT/DP/HDMI
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size DocumentNumber Rev
LA-5151P
5 4 3 2 1
5 4 3 2 1
M92M Use Channel B memory interface only.
http://mycomp.su/x/
U28C U28D
MAA[0..12] MAB[0..12]
MDA[0..63] MAA[0..12] 43 MDB[0..63] MAB[0..12] 44
D 43 MDA[0..63] MDA0 MAA0 44 MDB[0..63] MDB0 MAB0 D
C37 DQA_0 MAA_0 G24 C5 DQB_0 MAB_0 P8
MDA1 C35 J23 MAA1 MDB1 C3 T9 MAB1
MEMORY INTERFACE A
MEMORY INTERFACE B
MDA2 DQA_1 MAA_1 MAA2 MDB2 DQB_1 MAB_1 MAB2
A35 H24 E3 P9
E34 DQA_3 MAA_3 J24 E1 DQB_3 MAB_3 N7
MDA4 G32 H26 MAA4 MDB4 F1 N8 MAB4
D33 J26 F3 N9
F32 DQA_6 MAA_6 H21 F5 DQB_6 MAB_6 U9
MDA7 E32 G21 MAA7 MDB7 G4 U8 MAB7
D31 H19 H5 Y9
F30 DQA_9 MAA_9 H20 H6 DQB_9 MAB_9 W9
MDA10 C30 L13 MAA10 MDB10 J4 AC8 MAB10
A30 G16 K6 AC9
MDA12 DQA_11 MAA_11 MAA12 A_BA[0..2] MDB12 DQB_11 MAB_11 MAB12 B_BA[0..2]
F28 DQA_12 MAA_12 J16 K5 DQB_12 MAB_12 AA7
MDA13 A_BA2 A_BA[0..2] 43 MDB13 B_BA2 B_BA[0..2] 44
C28 H16 L4 AA8
MDA14 DQA_13 MAA_13/BA2 A_BA0 MDB14 DQB_13 MAB_13/BA2 B_BA0
A28 DQA_14 MAA_14/BA0 J17 M6 DQB_14 MAB_14/BA0 Y8
MDA15 E28 H17 A_BA1 MDB15 M1 AA9 B_BA1
MDA16 DQA_15 MAA_15/BA1 DQMA#[0..7] MDB16 DQB_15 MAB_15/BA1 DQMB#[0..7]
D27 M3
MDA17 DQA_16 DQMA#0 DQMA#[0..7] 43 MDB17 DQB_16 DQMB#0 DQMB#[0..7] 44
F26 DQA_17 DQMA_0 A32 M5 DQB_17 DQMB_0 H3
MDA18 C26 C32 DQMA#1 MDB18 N4 H1 DQMB#1
MDA19 DQA_18 DQMA_1 DQMA#2 MDB19 DQB_18 DQMB_1 DQMB#2
A26 D23 P6 T3
F24 DQA_20 DQMA_3 E22 P5 DQB_20 DQMB_3 T5
MDA21 C24 C14 DQMA#4 MDB21 R4 AE4 DQMB#4
A24 A14 T6 AF5
E24 DQA_23 DQMA_6 E10 T1 DQB_23 DQMB_6 AK6
MDA24 C22 D9 DQMA#7 MDB24 U4 AK5 DQMB#7
MDA25 DQA_24 DQMA_7 QSA[0..7] MDB25 DQB_24 DQMB_7 QSB[0..7]
A22 V6
MDA26 DQA_25 QSA0 QSA[0..7] 43 MDB26 DQB_25 QSB0 QSB[0..7] 44
F22 DQA_26 QSA_0/RDQSA_0 C34 V1 DQB_26 QSB_0/RDQSB_0 F6
MDA27 D21 D29 QSA1 MDB27 V3 K3 QSB1
MDA28 DQA_27 QSA_1/RDQSA_1 QSA2 MDB28 DQB_27 QSB_1/RDQSB_1 QSB2
A20 D25 Y6 P3
F20 DQA_29 QSA_3/RDQSA_3 E20 Y1 DQB_29 QSB_3/RDQSB_3 V5
MDA30 D19 E16 QSA4 MDB30 Y3 AB5 QSB4
E18 E12 Y5 AH1
C MDA32 DQA_31 QSA_5/RDQSA_5 QSA6 MDB32 DQB_31 QSB_5/RDQSB_5 QSB6 C
C18 DQA_32 QSA_6/RDQSA_6 J10 AA4 DQB_32 QSB_6/RDQSB_6 AJ9
MDA33 A18 D7 QSA7 MDB33 AB6 AM5 QSB7
MDA34 DQA_33 QSA_7/RDQSA_7 QSA#[0..7] MDB34 DQB_33 QSB_7/RDQSB_7 QSB#[0..7]
F18 AB1
MDA35 DQA_34 QSA#0 QSA#[0..7] 43 MDB35 DQB_34 QSB#0 QSB#[0..7] 44
D17 DQA_35 QSA_0B/WDQSA_0 A34 AB3 DQB_35 QSB_0B/WDQSB_0 G7
MDA36 A16 E30 QSA#1 MDB36 AD6 K1 QSB#1
MDA37 DQA_36 QSA_1B/WDQSA_1 QSA#2 MDB37 DQB_36 QSB_1B/WDQSB_1 QSB#2
F16 E26 AD1 P1
D15 DQA_38 QSA_3B/WDQSA_3 C20 AD3 DQB_38 QSB_3B/WDQSB_3 W4
MDA39 E14 C16 QSA#4 MDB39 AD5 AC4 QSB#4
F14 DQA_40 QSA_5B/WDQSA_5 C12 AF1 DQB_40 QSB_5B/WDQSB_5 AH3
MDA41 D13 J11 QSA#6 MDB41 AF3 AJ8 QSB#6
F12 F8 AF6 AM3
MDA43 DQA_42 QSA_7B/WDQSA_7 MDB43 DQB_42 QSB_7B/WDQSB_7
A12 DQA_43 AG4 DQB_43
MDA44 D11 J21 ODTA0 MDB44 AH5 T7 ODTB0
MDA45 DQA_44 ODTA0 ODTA1 ODTA0 43 MDB45 DQB_44 ODTB0 ODTB1 ODTB0 44
F10 G19 AH6 W7
MDA46 DQA_45 ODTA1 ODTA1 43 MDB46 DQB_45 ODTB1 ODTB1 44
A10 DQA_46 AJ4 DQB_46
MDA47 C10 H27 CLKA0 MDB47 AK3 L9 CLKB0
MDA48 DQA_47 CLKA0 CLKA0# CLKA0 43 MDB48 DQB_47 CLKB0 CLKB0# CLKB0 44
G13 G27 AF8 L8
MDA49 DQA_48 CLKA0B CLKA0# 43 MDB49 DQB_48 CLKB0B CLKB0# 44
H13 DQA_49 AF9 DQB_49
MDA50 J13 J14 CLKA1 MDB50 AG8 AD8 CLKB1
+1.5VS MDA51 DQA_50 CLKA1 CLKA1# CLKA1 43 MDB51 DQB_50 CLKB1 CLKB1# CLKB1 44
H11 H14 AG7 AD7
MDA52 DQA_51 CLKA1B CLKA1# 43 MDB52 DQB_51 CLKB1B CLKB1# 44
G10 DQA_52 AK9 DQB_52
MDA53 G8 K23 RASA0# +1.5VS MDB53 AL7 T10 RASB0#
MDA54 DQA_53 RASA0B RASA1# RASA0# 43 MDB54 DQB_53 RASB0B RASB1# RASB0# 44
K9 K19 AM8 Y10
DQA_54 RASA1B RASA1# 43 DQB_54 RASB1B RASB1# 44
1
MDA55 K10 MDB55 AM7

R467 MDA56 DQA_55 CASA0# MDB56 DQB_55 CASB0#
G9 K20 AK1 W10
DQA_56 CASA0B CASA0# 43 DQB_56 CASB0B CASB0# 44
1
MDA57 A8 K17 CASA1# MDB57 AL4 AA10 CASB1#
100_0402_1% MDA58 DQA_57 CASA1B CASA1# 43 MDB58 DQB_57 CASB1B CASB1# 44
C8 DQA_58 AM6 DQB_58
MDA59 E8 K24 CSA0#_0 R468 MDB59 AM1 P10 CSB0#_0
2
MVREFDA MDA60 DQA_59 CSA0B_0 CSA0#_0 43 100_0402_1% MDB60 DQB_59 CSB0B_0 CSB0#_0 44
A6 K27 AN4 L10
MDA61 DQA_60 CSA0B_1 MDB61 DQB_60 CSB0B_1
C6 AP3
2
DQA_61 DQB_61
1
1 MDA62 E6 M13 CSA1#_0 MVREFDB MDB62 AP1 AD10 CSB1#_0

R469 C626 MDA63 DQA_62 CSA1B_0 CSA1#_0 43 MDB63 DQB_62 CSB1B_0 CSB1#_0 44
A5 K16 AP5 AC10
DQA_63 CSA1B_1 DQB_63 CSB1B_1
1
B B
1
100_0402_1% 0.1U_0402_16V4Z~D MVREFDA L18 K21 CKEA0 U10 CKEB0
2 MVREFSA MVREFDA CKEA0 CKEA1 CKEA0 43 R470 C627 MVREFDB Y12 CKEB0 CKEB1 CKEB0 44
L20 J20 AA11
2
MVREFSA CKEA1 CKEA1 43 100_0402_1% 0.1U_0402_16V4Z~D MVREFSB AA12 MVREFDB CKEB1 CKEB1 44
WEA0# 2 MVREFSB WEB0#
L27 K26 N10
2
NC_MEM_CALRN0 WEA0B WEA1# WEA0# 43 WEB0B WEB1# WEB0# 44
N12 NC_MEM_CALRN1 WEA1B L15 WEB1B AB11
WEA1# 43 R471 WEB1# 44
AG12 NC_MEM_CALRN2
AF28 1K_0402_5% R472
RSVD#1
M12 MEM_CALRP1 RSVD#2 AG28 1 2 TESTEN AD28 TESTEN
4.7K_0402_5%
M27 NC_MEM_CALRP0 RSVD#3 AL31 1 2 +1.5VS
AH12 +1.5VS TEST_MCLK AK10
+1.5VS NC_MEM_CALRP2 TEST_YCLK CLKTESTA
RSVD#5 H23 AL10 CLKTESTB DRAM_RST AH11 VRAM_RST# 43,44
RSVD#6 J19
1
1
RSVD#9 T8
1
1
W8 R476 R473 1
R474 RSVD#11 R475 4.7K_0402_5% 4.7K_0402_5%
100_0402_1% 216-0729002 A12 M96_BGA962 C628 @ R477
2
100_0402_1% 216-0729002 A12 M96_BGA962 M96@ 1U_0402_6.3V4Z~D 4.7K_0402_5%
2
M96@ MVREFSB 2
2
2
MVREFSA
1
1
1
1 R479 C630
R478 C629
100_0402_1% 0.1U_0402_16V4Z~D ref134-0 schematic suggested
100_0402_1% 0.1U_0402_16V4Z~D 2
2
2
2
A A
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, M96 MEMORY INTERFACE
LA-5151P
5 4 3 2 1
5 4 3 2 1
For DDR3 , MVDDQ=1.5V

+1.5VS U28E
1U_0402_6.3V4Z~D 1U_0402_6.3V4Z~D 10U_0805_6.3V6M~D

C663
1U_0402_6.3V4Z~D 1U_0402_6.3V4Z~D 10U_0805_6.3V6M~D

C631
1U_0402_6.3V4Z~D 1U_0402_6.3V4Z~D 10U_0805_6.3V6M~D

C632
1U_0402_6.3V4Z~D 1U_0402_6.3V4Z~D 10U_0805_6.3V6M~D

C633
1U_0402_6.3V4Z~D 1U_0402_6.3V4Z~D 1U_0402_6.3V4Z~D

C634
1U_0402_6.3V4Z~D 1U_0402_6.3V4Z~D 1U_0402_6.3V4Z~D

C635
1U_0402_6.3V4Z~D 1U_0402_6.3V4Z~D 1U_0402_6.3V4Z~D

C636
1U_0402_6.3V4Z~D 1U_0402_6.3V4Z~D 1U_0402_6.3V4Z~D

C664
MEM I/O L44
1 1 1 1 1 1 1 1 4000mA PCIE
504mA
BLM18PG121SN1D_0603
AC7 AA31 +PCIE_VDDR 2 1
VDDR1#1 PCIE_VDDR#1 +1.8VS
AD11 VDDR1#2 PCIE_VDDR#2 AA32
2 2 2 2 2 2 2 2
0.1U_0402_16V4Z~D
C637
0.1U_0402_16V4Z~D
C638
1U_0402_6.3V4Z~D
C639
1U_0402_6.3V4Z~D
C640
1U_0402_6.3V4Z~D
C641
1U_0402_6.3V4Z~D
C642
1U_0402_6.3V4Z~D
C643
10U_0805_6.3V6M~D
C644
AF7 AA33 1 1 1 1 1 1 1 1
VDDR1#3 PCIE_VDDR#3
AG10 VDDR1#4 PCIE_VDDR#4 AA34
http://mycomp.su/x/
AJ7 VDDR1#5 PCIE_VDDR#5 V28
AK8 W29
VDDR1#6 PCIE_VDDR#6 2 2 2 2 2 2 2 2
AL9 VDDR1#7 PCIE_VDDR#7 W30
C645
C646
C647
C648
C649
C650
C651
C652
1 1 1 1 1 1 1 1 G11 VDDR1#8 PCIE_VDDR#8 Y31
G14
VDDR1#9
PCIE_VDDC
D D
G17 VDDR1#10 2000mA
G20 VDDR1#11 PCIE_VDDC#1 G30 +1.1VS
2 2 2 2 2 2 2 2 G23 G31
VDDR1#12 PCIE_VDDC#2
1U_0402_6.3V4Z~D
C665
1U_0402_6.3V4Z~D
C654
1U_0402_6.3V4Z~D
C655
1U_0402_6.3V4Z~D
C666
1U_0402_6.3V4Z~D
C656
1U_0402_6.3V4Z~D
C657
1U_0402_6.3V4Z~D
C658
10U_0805_6.3V6M~D
C667
G26 VDDR1#13 PCIE_VDDC#3 H29 1 1 1 1 1 1 1 1
G29 H30
H10 J29
J7 VDDR1#16 PCIE_VDDC#6 J30
2 2 2 2 2 2 2 2
10U_0805_6.3V6M~D
C668
C659
C669
C660
C670
C661
C671
C672
C662
1 1 1 1 1 1 1 1 1 J9 L28
K11 M28
K13 VDDR1#19 PCIE_VDDC#9 N28
K8 R28
2 2 2 2 2 2 2 2 2 VDDR1#20 PCIE_VDDC#10
L12 T28
L16 VDDR1#22 PCIE_VDDC#12 U28
L21
VDDR1#23
L23 VDDR1#24
L26 VDDR1#25 VDDC#1 AA15 +GPU_CORE
2 1 L7 CORE AA17
+1.8VS VDDR1#26 VDDC#2
L45 1 M11 AA20
VDDR1#27 VDDC#3
10U_0805_6.3V6M~D
C673
1U_0402_6.3V4Z~D
C674
0.1U_0402_16V4Z~D
C675
1U_0402_6.3V4Z~D
C676
1U_0402_6.3V4Z~D
C677
1U_0402_6.3V4Z~D
C678
1U_0402_6.3V4Z~D
C681
1U_0402_6.3V4Z~D
C683
1U_0402_6.3V4Z~D
C684
1U_0402_6.3V4Z~D
C685
BLM18PG121SN1D_0603 1 1 N11 AA22 1 1 1 1 1 1 1
VDDR1#28 VDDC#4
P7 AA24
VDDR1#29 VDDC#5
R11 VDDR1#30 VDDC#6 AA27
2 U11 AB13
2 2 VDDR1#31 VDDC#7 2 2 2 2 2 2 2
U7 AB16
VDDR1#32 VDDC#8
Y11 VDDR1#33 VDDC#9 AB18
Y7 VDDR1#34 VDDC#10 AB21
AB23
VDDC#11
+3VS_DELAY 2 1 VDDC#12 AB26
L46 1 1 AB28
VDDC#13
10U_0805_6.3V6M~D
C686
1U_0402_6.3V4Z~D
C687
1U_0402_6.3V4Z~D
C688
BLM18PG121SN1D_0603 1 AC12
VDDC#14
1U_0402_6.3V4Z~D
C689
1U_0402_6.3V4Z~D
C690
1U_0402_6.3V4Z~D
C691
1U_0402_6.3V4Z~D
C695
1U_0402_6.3V4Z~D
C696
1U_0402_6.3V4Z~D
C697
1U_0402_6.3V4Z~D
C698
136mA LEVEL AC15 1 1 1 1 1 1 1
TRANSLATION VDDC#15
AC17
2 2 VDDC#16
POWER
+VDD_CT AF26 AC20
C 2 VDD_CT#1 VDDC#17 C
AF27 VDD_CT#2 VDDC#18 AC22
AG26 AC24 2 2 2 2 2 2 2
VDD_CT#3 VDDC#19
AG27 AC27
VDD_CT#4 VDDC#20
VDDC#21 AD13
+1.8VS 2
L47
1 60mA I/O VDDC#22
AD16
AD18
BLM18PG121SN1D_0603 +VDDR3 VDDC#23
1 1 1 AF23 VDDR3#1 VDDC#24 AD21
C699
C700
C701
10U_0805_6.3V6M~D
1U_0402_6.3V4Z~D
0.1U_0402_16V4Z~D 1U_0402_6.3V4Z~D
AF24 AD23
VDDR3#2 VDDC#25
C702
C703
C704
C705
C706
C707
C708
C709
C710
C711
1U_0402_6.3V4Z~D
1U_0402_6.3V4Z~D
1U_0402_6.3V4Z~D
1U_0402_6.3V4Z~D
1U_0402_6.3V4Z~D
1U_0402_6.3V4Z~D
1U_0402_6.3V4Z~D
1U_0402_6.3V4Z~D
1U_0402_6.3V4Z~D
1U_0402_6.3V4Z~D
AG23 VDDR3#3 VDDC#26 AD26 1 1 1 1 1 1 1 1 1 1
AG24 VDDR3#4 VDDC#27 AF17
2 2 2
170mA VDDC#28
AF20
VDDC#29 AF22
+VDDR4_5 2 2 2 2 2 2 2 2 2 2
M96 only AF13 VDDR5#1 VDDC#30 AG16
L48 AF15 AG18
VDDR5#2 VDDC#31
+1.5VS 2 1 AG13 VDDR5#3 VDDC#32 AG21
BLM18PG121SN1D_0603 AG15 AH22
VDDR5#4 VDDC#33
C712 M96@
C713 M96@
0.1U_0402_16V4Z~D
M96@ 1 1 M16
VDDC#34
170mA VDDC#35 M18 R03 add
AD12 M23
VDDR4#1 VDDC#36
C1533
C1535
C1536
C1537
C1538
C1539
C1540
C1541
C1542
1U_0402_6.3V4Z~D
1U_0402_6.3V4Z~D
1U_0402_6.3V4Z~D
1U_0402_6.3V4Z~D
1U_0402_6.3V4Z~D
1U_0402_6.3V4Z~D
1U_0402_6.3V4Z~D
1U_0402_6.3V4Z~D
1U_0402_6.3V4Z~D
AF11 M26 1 1 1 1 1 1 1 1 1
2 2 VDDR4#2 VDDC#37
AF12 VDDR4#3 VDDC#38 N15
AG11 N17
VDDR4#4 VDDC#39
N20
VDDC#40 2 2 2 2 2 2 2 2 2
VDDC#41 N22
2 1 +VDDRHB 500mA N24
+1.5VS VDDC#42
L49 1 MEM CLK N27
VDDC#43
C721
C722
1U_0402_6.3V4Z~D
0.1U_0402_16V4Z~D
BLM18PG121SN1D_0603 1 +VDDRHA M20 R13

VDDRHA VDDC#44
M21 R16
VSSRHA VDDC#45
R18
2 VDDC#46
2 500mA VDDC#47 R21
C714
C715
C716
C717
C718
C1544
C1545
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
1U_0402_6.3V4Z~D
1U_0402_6.3V4Z~D
V12 R23 1 1 1 1 1 1 1 1 1
VDDRHB VDDC#48
C719
C720
47U_0805_4V6
47U_0805_4V6
U12 R26
B VSSRHB VDDC#49 B
VDDC#50 T15
+1.8VS 2 1 T17
L50 VDDC#51 2 2 2 2 2 2 2 2 2
T20
BLM18PG121SN1D_0603 VDDC#52
2 2 2 VDDC#53 T22
C723
C724
C725
10U_0603_6.3V6M~D
0.1U_0402_16V4Z~D
1U_0402_6.3V4Z~D
PLL
+PCIE_PVDD
68mA VDDC#54
T24
AB37 PCIE_PVDD VDDC#55 T27
VDDC#56 U16
1 1 1 H7
NC_MPV18#1 VDDC#57
U18 A00 Change
H8 NC_MPV18#2 VDDC#58 U21
M97 only VDDC#59 U23
VDDC#60
U26 A00 add
AM10 NC_SPV18 VDDC#61 V15 1 1 1
C1554
C1555
C1556
47U_0805_4V6
47U_0805_4V6
47U_0805_4V6
VDDC#62 V17
2 1 +SPV10 AN9 V20
+GPU_CORE SPV10 VDDC#63
L55 136mA V22
VDDC#64 2 2 2
C734
C735
C736
10U_0603_6.3V6M~D
0.1U_0402_16V4Z~D
1U_0402_6.3V4Z~D
BLM18PG121SN1D_0603 2 2 2 AN10 V24

SPVSS VDDC#65
V27
VDDC#66
VDDC#67 Y16
Y18
1 1 1 VDDC#68
Y21
BACK BIAS VDDC#69
VDDC#70 Y23
Y26
VDDC#71
AA13 Y28
BBP#1 VDDC#72
+GPU_CORE Y13 BBP#2 VDDC#73 AH27
AH28 L54
VDDC#74
C737
C738
1U_0402_6.3V4Z~D
0.1U_0402_16V4Z~D
1 1 375mA BLM18PG121SN1D_0603
M15 +VDDC1 2 1 +GPU_CORE
ISOLATED VDDCI#1 N13
CORE I/O VDDCI#2
C731
C732
1U_0402_6.3V4Z~D
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
VDDCI#3 R12 1 1 1
2 2
C733
VDDCI#4 T12
VGA_GPIO21= 0V FOR BACK BIASING DISABLED
A
N FET A = OFF, P FET B = OFF, N FET C = ON 2 2 2 A
+BBP = +VGA_CORE 216-0729002 A12 M96_BGA962
VGA_GPIO21= +3.3V FOR BACK BIASING ENABLED M96@
N FET A = ON, P FET B = ON, N FET C = OFF
+BBP = +1.8VS
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, M96_Power/GND
LA-5151P
5 4 3 2 1
5 4 3 2 1
U28F
AB39 PCIE_VSS#1 GND#1 A3

E39 A37
PCIE_VSS#2 GND#2
F34 PCIE_VSS#3 GND#3 AA16
F39 PCIE_VSS#4 GND#4 AA18
G33 AA2
PCIE_VSS#5 GND#5
G34 PCIE_VSS#6 GND#6 AA21
http://mycomp.su/x/
H31 PCIE_VSS#7 GND#7 AA23
H34 AA26 U28H
PCIE_VSS#8 GND#8
H39 PCIE_VSS#9 GND#9 AA28
J31 AA6 DP C/D POWER DP A/B POWER
PCIE_VSS#10 GND#10
J34 AB12
D PCIE_VSS#11 GND#11 D
K31 PCIE_VSS#12 GND#12 AB15 M97 only AP20 NC_DPC_VDD18#1 NC_DPA_VDD18#1 AN24 M97 only
K34 PCIE_VSS#13 GND#13 AB17 AP21 NC_DPC_VDD18#2 NC_DPA_VDD18#2 AP24
K39 AB20
PCIE_VSS#14 GND#14 L56
L31 PCIE_VSS#15 GND#15 AB22 200mA
L34 AB24 200mA BLM18PG121SN1D_0603 For M96/92, DPx_VDD=1.1V
PCIE_VSS#16 GND#16
M34 AB27 +1.1VS R483 2 1 0_0603_5% +DPC_VDD10 AP13 AP31 +DPA_VDD10 2 1 +1.1VS
PCIE_VSS#17 GND#17 DPC_VDD10#1 DPA_VDD10#1
M39 PCIE_VSS#18 GND#18 AC11 AT13 DPC_VDD10#2 DPA_VDD10#2 AP32
0.1U_0402_16V4Z~D
C739
1U_0402_6.3V4Z~D
C740
10U_0603_6.3V6M~D
C741
N31 AC13
PCIE_VSS#19 GND#19
N34 AC16 1 1 1
PCIE_VSS#20 GND#20
P31 PCIE_VSS#21 GND#21 AC18 AN17 DPC_VSSR#1 DPA_VSSR#1 AN27
P34 AC2 AP16 AP27
PCIE_VSS#22 GND#22 DPC_VSSR#2 DPA_VSSR#2
P39 AC21 AP17 AP28
PCIE_VSS#23 GND#23 DPC_VSSR#3 DPA_VSSR#3 2 2 2
R34 PCIE_VSS#24 GND#24 AC23 AW14 DPC_VSSR#4 DPA_VSSR#4 AW24
T31 AC26 AW16 AW26
PCIE_VSS#25 GND#25 DPC_VSSR#5 DPA_VSSR#5
T34 PCIE_VSS#26 GND#26 AC28
T39 PCIE_VSS#27 GND#27 AC6
U31 AD15
PCIE_VSS#28 GND#28
U34 PCIE_VSS#29 GND#29 AD17 AP22 NC_DPD_VDD18#1 NC_DPB_VDD18#1 AP25
V34 PCIE_VSS#30 GND#30 AD20 M97 only AP23 NC_DPD_VDD18#2 NC_DPB_VDD18#2 AP26 M97 only
V39 AD22
PCIE_VSS#31 GND#31 L57
W31 PCIE_VSS#32 GND#32 AD24 200mA 200mA
W34 AD27 BLM18PG121SN1D_0603
PCIE_VSS#33 GND#33
Y34 AD9 +1.1VS R485 2 1 0_0603_5% +DPD_VDD10 AP14 AN33 +DPB_VDD10 2 1 +1.1VS
PCIE_VSS#34 GND#34 DPD_VDD10#1 DPB_VDD10#1
Y39 PCIE_VSS#35 GND#35 AE2 AP15 DPD_VDD10#2 DPB_VDD10#2 AP33
0.1U_0402_16V4Z~D
C742
1U_0402_6.3V4Z~D
C743
10U_0603_6.3V6M~D
C744
GND#36 AE6
AF10 2 2 1
GND#37
GND#38 AF16
GND#39 AF18 AN19 DPD_VSSR#1 DPB_VSSR#1 AN29
AF21 AP18 AP29
F15
GND#101
GND GND#40
GND#41
GND#42
AG17
AG2
L62
BLM18PG121SN1D_0603
+DPE_VDD18 AP19
AW20
DPD_VSSR#2
DPD_VSSR#3
DPD_VSSR#4
DPB_VSSR#2
DPB_VSSR#3
DPB_VSSR#4
AP30
AW30
1 1 2 L60
BLM18PG121SN1D_0603
F17 AG20 +1.8VS 2 1 AW22 AW32 2 1 +1.8VS
C GND#102 GND#43 DPD_VSSR#5 DPB_VSSR#5 C
F19 GND#103 GND#44 AG22
10U_0603_6.3V6M~D
C871
0.1U_0402_16V4Z~D
C870
1U_0402_6.3V4Z~D
C869
0.1U_0402_16V4Z~D
C755
1U_0402_6.3V4Z~D
C756
10U_0603_6.3V6M~D
C754
F21 AG6 1 1 1 R486 R487 1 2 1
GND#104 GND#45 150_0402_1% 150_0402_1%
F23 AG9
GND#105 GND#46
F25 GND#106 GND#47 AH21 2 1 AW18 DPCD_CALR DPAB_CALR AW28 1 2
F27 AH29
GND#107 GND#48 2 2 2 2 1 2
F29
GND#108 GND#49
AJ10 20mA
F31 GND#109 GND#50 AJ11
+DPE_VDD18
200mA DP E/F POWER DP PLL POWER
+DPA_PVDD
F33 AJ2 AH34 AU28
GND#110 GND#51 DPE_VDD18#1 DPA_PVDD
F7 GND#111 GND#52 AJ28 AJ34 DPE_VDD18#2 DPA_PVSS AV27
F9 GND#112 GND#53 AJ6
L58 +DPE_VDD10 L61
G2
GND#113 GND#54
AK11
BLM18PG121SN1D_0603
20mA BLM18PG121SN1D_0603
G6 GND#114 GND#55 AK31
+DPE_VDD10
100mA +DPB_PVDD
H9 GND#115 GND#56 AK7 +1.1VS 2 1 AL33 DPE_VDD10#1 DPB_PVDD AV29 2 1 +1.8VS
J2 AL11 AM33 AR28
GND#116 GND#57 DPE_VDD10#2 DPB_PVSS
C746
C747
C748
C757
C759
C758
10U_0603_6.3V6M~D
0.1U_0402_16V4Z~D
1U_0402_6.3V4Z~D
0.1U_0402_16V4Z~D
1U_0402_6.3V4Z~D
10U_0603_6.3V6M~D
J27 GND#117 GND#58 AL14 1 1 1 1 2 1
J6 GND#118 GND#59 AL17 20mA
J8 AL2
GND#119 GND#60 +DPC_PVDD
K14 GND#120 GND#61 AL20 AN34 DPE_VSSR#1 DPC_PVDD AU18
K7 AL21 2 2 2 AP39 AV17 2 1 2
GND#121 GND#62 DPE_VSSR#2 DPC_PVSS
L11 AL23 AR39
GND#122 GND#63 DPE_VSSR#3 R488
L17 GND#123 GND#64 AL26 AU37 DPE_VSSR#4 20mA
L2 AL32 AW35 0_0603_5%
GND#124 GND#65 DPE_VSSR#5 +DPD_PVDD
L22 AL6 AV19 2 1 +1.8VS
GND#125 GND#66 DPD_PVDD
L24 GND#126 GND#67 AL8 DPD_PVSS AR18 1
L6
GND#127 GND#68
AM11
+DPE_VDD18
200mA C745
M17
GND#128 GND#69
AM31 +DPE_VDD18 AF34
DPF_VDD18#1 20mA
M22 GND#129 GND#70 AM9 AG34 DPF_VDD18#2 0.1U_0402_16V4Z~D
M24 AN11 AM37 +DPE_PVDD 2
GND#130 GND#71 DPE_PVDD R489
N16
GND#131 GND#72
AN2 100mA DPE_PVSS
AN38
N18 AN30 0_0603_5%
GND#132 GND#73 +DPE_VDD10 +DPE_PVDD
N2 AN6 +DPE_VDD10 AK33 2 1 +1.8VS
GND#133 GND#74 DPF_VDD10#1
N21 AN8 AK34
B GND#134 GND#75 DPF_VDD10#2 +DPE_PVDD B
N23 GND#135 GND#76 AP11 NC_DPF_PVDD AL38 1
0.1U_0402_16V4Z~D
N26 AP7 AM35 1
GND#136 GND#77 NC_DPF_PVSS
C872
N6 AP9 C749
GND#137 GND#78 0.1U_0402_16V4Z~D
R15 GND#138 GND#79 AR5 AF39 DPF_VSSR#1
R17 AW34 AH39 2
GND#139 GND#80 DPF_VSSR#2 2 L64
R2 GND#140 GND#81 B11 AK39 DPF_VSSR#3
R20 B13 AL34 BLM18PG121SN1D_0603
GND#141 GND#82 DPF_VSSR#4
R22 B15 AM34 2 1 +1.8VS
GND#142 GND#83 DPF_VSSR#5
R24 GND#143 GND#84 B17 1
C753
C884
C885
0.1U_0402_16V4Z~D
1U_0402_6.3V4Z~D
10U_0603_6.3V6M~D
R27 GND#144 GND#85 B19 2 1
R6 B21 R493
GND#145 GND#86
T11 GND#146 GND#87 B23 2 1 AM39 DPEF_CALR
T13 B25 2
GND#147 GND#88 150_0402_1% 1 2
T16 B27
GND#148 GND#89 216-0729002 A12 M96_BGA962
T18 GND#149 GND#90 B29
T21 B31 M96@
GND#150 GND#91
T23 B33
GND#151 GND#92
T26 GND#152 GND#93 B7
U15 B9
GND#153 GND#94
U17 C1
GND#154 GND#95
U2 GND#155 GND#96 C39
U20 E35
GND#156 GND#97
U22 E5
GND#157 GND#98
U24 GND#158 GND#99 F11
U27 F13
GND#159 GND#100
U6 GND#160
V11 GND#161
V16
GND#162
V18 GND#163
V21 GND#164
V23
GND#165
V26 GND#166
A A
W2 GND#167
W6
GND#168
Y15 GND#169
Y17
Y20
GND#170
GND#171
Y22 GND#172 VSS_MECH#1 A39
Y24 GND#173 VSS_MECH#2 AW1
Y27
U13
GND#174 VSS_MECH#3
AW39 Compal Electronics, Inc.
GND#175 PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
V13
GND#176 TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, M96_Power/GND
216-0729002 A12 M96_BGA962 NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
M96@ LA-5151P
5 4 3 2 1
5 4 3 2 1
U30 U31 U32 U33
VREFCA_A1 M8 E3 MDA22 VREFCA_A2 M8 E3 MDA25 VREFCA_A3 M8 E3 MDA35 VREFCA_A4 M8 E3 MDA48

VREFDA_Q1 H1 VREFCA DQL0 MDA19 VREFDA_Q2 VREFCA DQL0 MDA30 VREFDA_Q3 VREFCA DQL0 MDA32 VREFDA_Q4 VREFCA DQL0 MDA51
VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7
F2 MDA21 F2 MDA24 F2 MDA38 F2 MDA55
MAA0 DQL2 MDA18 MAA0 DQL2 MDA29 MAA0 DQL2 MDA34 MAA0 DQL2 MDA54
N3 F8 N3 F8 N3 F8 N3 F8
MAA1 A0 DQL3 MDA23 MAA1 A0 DQL3 MDA26 MAA1 A0 DQL3 MDA37 MAA1 A0 DQL3 MDA50
P7 A1 DQL4 H3 P7 A1 DQL4 H3 P7 A1 DQL4 H3 P7 A1 DQL4 H3
MAA2 P3 H8 MDA16 MAA2 P3 H8 MDA31 MAA2 P3 H8 MDA36 MAA2 P3 H8 MDA52
N2 G2 N2 G2 N2 G2 N2 G2
http://mycomp.su/x/
MAA5 P2 MAA5 P2 MAA5 P2 MAA5 P2
MAA6 A5 MAA6 A5 MAA6 A5 MAA6 A5
R8 R8 R8 R8
MAA7 A6 MDA0 MAA7 A6 MDA15 MAA7 A6 MDA43 MAA7 A6 MDA63
R2 A7 DQU0 D7 R2 A7 DQU0 D7 R2 A7 DQU0 D7 R2 A7 DQU0 D7
MAA8 T8 C3 MDA5 MAA8 T8 C3 MDA11 MAA8 T8 C3 MDA44 MAA8 T8 C3 MDA58
MAA9 A8 DQU1 MDA1 MAA9 A8 DQU1 MDA14 MAA9 A8 DQU1 MDA40 MAA9 A8 DQU1 MDA60
R3 C8 R3 C8 R3 C8 R3 C8
D MAA10 A9 DQU2 MDA7 MAA10 A9 DQU2 MDA10 MAA10 A9 DQU2 MDA45 MAA10 A9 DQU2 MDA59 D
L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2
MAA11 R7 A7 MDA3 MAA11 R7 A7 MDA13 MAA11 R7 A7 MDA42 MAA11 R7 A7 MDA61
MAA12 A11 DQU4 MDA4 MAA12 A11 DQU4 MDA9 MAA12 A11 DQU4 MDA46 MAA12 A11 DQU4 MDA56
N7 A2 N7 A2 N7 A2 N7 A2
A12 DQU5 MDA2 A12 DQU5 MDA12 A12 DQU5 MDA41 A12 DQU5 MDA62
T3 A13 DQU6 B8 T3 A13 DQU6 B8 T3 A13 DQU6 B8 T3 A13 DQU6 B8
T7 A3 MDA6 T7 A3 MDA8 T7 A3 MDA47 T7 A3 MDA57
A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
M7 M7 M7 M7
A15/BA3 +1.5VS A15/BA3 +1.5VS A15/BA3 +1.5VS A15/BA3 +1.5VS
M2 B2 A_BA0 M2 B2 A_BA0 M2 B2 A_BA0 M2 B2

40 A_BA0 BA0 VDD A_BA1 BA0 VDD A_BA1 BA0 VDD A_BA1 BA0 VDD
40 A_BA1 N8 BA1 VDD D9 N8 BA1 VDD D9 N8 BA1 VDD D9 N8 BA1 VDD D9
M3 G7 A_BA2 M3 G7 A_BA2 M3 G7 A_BA2 M3 G7
40 A_BA2 BA2 VDD BA2 VDD BA2 VDD BA2 VDD
K2 K2 K2 K2
VDD VDD VDD VDD
VDD K8 VDD K8 VDD K8 VDD K8
MDA[0..63] N1 N1 N1 N1
40 MDA[0..63] VDD VDD VDD VDD
J7 N9 CLKA0 J7 N9 J7 N9 CLKA1 J7 N9
40 CLKA0 CK VDD CLKA0# CK VDD 40 CLKA1 CK VDD CLKA1# CK VDD
40 CLKA0# K7 CK VDD R1 K7 CK VDD R1 40 CLKA1# K7 CK VDD R1 K7 CK VDD R1
K9 R9 CKEA0 K9 R9 K9 R9 CKEA1 K9 R9
40 MAA[12..0] 40 CKEA0 CKE/CKE0 VDD +1.5VS CKE/CKE0 VDD +1.5VS 40 CKEA1 CKE/CKE0 VDD +1.5VS CKE/CKE0 VDD +1.5VS
K1 A1 ODTA0 K1 A1 K1 A1 ODTA1 K1 A1
40 ODTA0 ODT/ODT0 VDDQ CSA0#_0 ODT/ODT0 VDDQ 40 ODTA1 ODT/ODT0 VDDQ CSA1#_0 ODT/ODT0 VDDQ
40 CSA0#_0 L2 CS/CS0 VDDQ A8 L2 CS/CS0 VDDQ A8 40 CSA1#_0 L2 CS/CS0 VDDQ A8 L2 CS/CS0 VDDQ A8
J3 C1 RASA0# J3 C1 J3 C1 RASA1# J3 C1
40 DQMA#[7..0] 40 RASA0# RAS VDDQ CASA0# RAS VDDQ 40 RASA1# RAS VDDQ CASA1# RAS VDDQ
40 CASA0# K3 C9 K3 C9 40 CASA1# K3 C9 K3 C9
CAS VDDQ WEA0# CAS VDDQ CAS VDDQ WEA1# CAS VDDQ
40 WEA0# L3 WE VDDQ D2 L3 WE VDDQ D2 40 WEA1# L3 WE VDDQ D2 L3 WE VDDQ D2
VDDQ E9 VDDQ E9 VDDQ E9 VDDQ E9
F1 F1 F1 F1
QSA2 VDDQ QSA3 VDDQ QSA4 VDDQ QSA6 VDDQ
40 QSA[7..0] F3 DQSL VDDQ H2 F3 DQSL VDDQ H2 F3 DQSL VDDQ H2 F3 DQSL VDDQ H2
QSA0 C7 H9 QSA1 C7 H9 QSA5 C7 H9 QSA7 C7 H9
DQSU VDDQ DQSU VDDQ DQSU VDDQ DQSU VDDQ
DQMA#2 E7 A9 DQMA#3 E7 A9 DQMA#4 E7 A9 DQMA#6 E7 A9

DQMA#0 DML VSS DQMA#1 DML VSS DQMA#5 DML VSS DQMA#7 DML VSS
40 QSA#[7..0] D3 B3 D3 B3 D3 B3 D3 B3
C DMU VSS DMU VSS DMU VSS DMU VSS C
VSS E1 VSS E1 VSS E1 VSS E1
G8 G8 G8 G8
QSA#2 VSS QSA#3 VSS QSA#4 VSS QSA#6 VSS
G3 J2 G3 J2 G3 J2 G3 J2
QSA#0 DQSL VSS QSA#1 DQSL VSS QSA#5 DQSL VSS QSA#7 DQSL VSS
B7 DQSU VSS J8 B7 DQSU VSS J8 B7 DQSU VSS J8 B7 DQSU VSS J8
M1 M1 M1 M1
VSS VSS VSS VSS
M9 M9 M9 M9
VSS VSS VSS VSS
VSS P1 VSS P1 VSS P1 VSS P1
VRAM_RST# T2 P9 VRAM_RST# T2 P9 VRAM_RST# T2 P9 VRAM_RST# T2 P9
40,44 VRAM_RST# RESET VSS RESET VSS RESET VSS RESET VSS
VSS T1 VSS T1 VSS T1 VSS T1
L8 ZQ/ZQ0 VSS T9 L8 ZQ/ZQ0 VSS T9 L8 ZQ/ZQ0 VSS T9 L8 ZQ/ZQ0 VSS T9
1
1
M96@ J1 B1 M96@ J1 B1 M96@ J1 B1 M96@ J1 B1
R494 NC/ODT1 VSSQ R495 NC/ODT1 VSSQ R496 NC/ODT1 VSSQ R497 NC/ODT1 VSSQ
L1 B9 L1 B9 L1 B9 L1 B9
NC/CS1 VSSQ NC/CS1 VSSQ NC/CS1 VSSQ NC/CS1 VSSQ
243_0402_1% J9 NC/CE1 VSSQ D1 243_0402_1% J9 NC/CE1 VSSQ D1 243_0402_1% J9 NC/CE1 VSSQ D1 243_0402_1% J9 NC/CE1 VSSQ D1
L9 NCZQ1 VSSQ D8 L9 NCZQ1 VSSQ D8 L9 NCZQ1 VSSQ D8 L9 NCZQ1 VSSQ D8
E2 E2 E2 E2
2
2
VSSQ VSSQ VSSQ VSSQ
VSSQ E8 VSSQ E8 VSSQ E8 VSSQ E8
F9 F9 F9 F9
VSSQ VSSQ VSSQ VSSQ
G1 G1 G1 G1
VSSQ VSSQ VSSQ VSSQ
VSSQ G9 VSSQ G9 VSSQ G9 VSSQ G9
96-BALL 96-BALL 96-BALL 96-BALL

SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
K4B1G1646E-HC12_FBGA96 K4B1G1646E-HC12_FBGA96 K4B1G1646E-HC12_FBGA96 K4B1G1646E-HC12_FBGA96
+1.5VS X76@ +1.5VS X76@ X76@ X76@
+1.5VS +1.5VS +1.5VS +1.5VS
+1.5VS +1.5VS
1
M96@ M96@
1
1
R498 R499 M96@ M96@ M96@ M96@
1
4.99K_0402_1% 4.99K_0402_1% R500 R501 R502 R503 M96@ M96@
4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% R504 R505
B 4.99K_0402_1% 4.99K_0402_1% B
2
2
VREFCA_A1 VREFDA_Q1
2
1 1 VREFCA_A2 VREFDA_Q2 VREFCA_A3 VREFDA_Q3
1
1
0.1U_0402_10V6K~D
0.1U_0402_10V6K~D
M96@ M96@ M96@ M96@ 1 1 1 1 VREFCA_A4 VREFDA_Q4

1
1
0.1U_0402_10V6K~D
0.1U_0402_10V6K~D
0.1U_0402_10V6K~D
0.1U_0402_10V6K~D
R506 C760 R507 C761 M96@ M96@ M96@ M96@ M96@ M96@ M96@ 1 1
1
0.1U_0402_10V6K~D
0.1U_0402_10V6K~D
4.99K_0402_1% 4.99K_0402_1% R508 C762 R509 M96@ R510 C764 R511 C765 M96@ M96@ M96@
2 2 4.99K_0402_1% 4.99K_0402_1% C763 4.99K_0402_1% 4.99K_0402_1% R512 C766 R513 M96@
2 2 2 2 4.99K_0402_1% 4.99K_0402_1% C767
2
2 2
2
2
M96@ R514
56_0402_1%
1 2 +1.5VS +1.5VS
40 CLKA0
+1.5VS +1.5VS
M96@ R515
56_0402_1%
C769 M96@
C770 M96@
C771 M96@
C772 M96@
C773 M96@
C774 M96@
C775 M96@
C776 M96@
C777 M96@
C778 M96@
C779 M96@
C780 M96@
C781 M96@
C782 M96@
C783 M96@
C784 M96@
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
40 CLKA0# 1 2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
C768 M96@
C785 M96@
C786 M96@
C787 M96@
C788 M96@
C789 M96@
C790 M96@
C791 M96@
C792 M96@
C793 M96@
C794 M96@
C795 M96@
C796 M96@
C797 M96@
C798 M96@
C799 M96@
C800 M96@
0.01U_0402_25V7K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
R516 M96@
56_0402_1% +1.5VS
1 2 +1.5VS
40 CLKA1
R517 M96@
C807 M96@
C808 M96@
C809 M96@
C810 M96@
C811 M96@
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
56_0402_1% 1 1 1 1 1
C802 M96@
C803 M96@
C804 M96@
C805 M96@
C806 M96@
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
40 CLKA1# 1 2 1 1 1 1 1 VRAM P/N :

C801 M96@
0.01U_0402_25V7K~D
A A
1
Samsung : SA000035700 (S IC D3 64MX16 K4W1G1646E-HC12 FBGA 96P)
2 2 2 2 2
2 2 2 2 2 Hynix : SA000032400 (S IC D3 64MX16 H5TQ1G63BFR-12C FBGA 1.5V )
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, VRAM_DDR3 / Channel A
LA-5151P
5 4 3 2 1
5 4 3 2 1
U34 U35 U36 U37
VREFCB_A1 M8 E3 MDB26 VREFCB_A2 M8 E3 MDB22 VREFCB_A3 M8 E3 MDB34 VREFCB_A4 M8 E3 MDB52

VREFDB_Q1 H1 VREFCA DQL0 MDB28 VREFDB_Q2 H1 VREFCA DQL0 MDB20 VREFDB_Q3 H1 VREFCA DQL0 MDB37 VREFDB_Q4 H1 VREFCA DQL0 MDB51
VREFDQ DQL1 F7 VREFDQ DQL1 F7 VREFDQ DQL1 F7 VREFDQ DQL1 F7
F2 MDB27 F2 MDB21 F2 MDB32 F2 MDB55
MAB0 DQL2 MDB31 MAB0 DQL2 MDB18 MAB0 DQL2 MDB39 MAB0 DQL2 MDB48
N3 F8 N3 F8 N3 F8 N3 F8
MAB1 A0 DQL3 MDB25 MAB1 A0 DQL3 MDB19 MAB1 A0 DQL3 MDB35 MAB1 A0 DQL3 MDB53
MAB2 P3 H8 MDB30 MAB2 P3 H8 MDB17 MAB2 P3 H8 MDB38 MAB2 P3 H8 MDB49
N2 G2 N2 G2 N2 G2 N2 G2
http://mycomp.su/x/
MAB5 P2 MAB5 P2 MAB5 P2 MAB5 P2
MAB6 A5 MAB6 A5 MAB6 A5 MAB6 A5
R8 R8 R8 R8
MAB7 A6 MDB15 MAB7 A6 MDB1 MAB7 A6 MDB44 MAB7 A6 MDB56
R2 A7 DQU0 D7 R2 A7 DQU0 D7 R2 A7 DQU0 D7 R2 A7 DQU0 D7
MAB8 T8 C3 MDB10 MAB8 T8 C3 MDB6 MAB8 T8 C3 MDB43 MAB8 T8 C3 MDB59
MAB9 A8 DQU1 MDB12 MAB9 A8 DQU1 MDB0 MAB9 A8 DQU1 MDB47 MAB9 A8 DQU1 MDB63
R3 C8 R3 C8 R3 C8 R3 C8
D MAB10 A9 DQU2 MDB11 MAB10 A9 DQU2 MDB4 MAB10 A9 DQU2 MDB41 MAB10 A9 DQU2 MDB62 D
L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2
MAB11 R7 A7 MDB13 MAB11 R7 A7 MDB3 MAB11 R7 A7 MDB45 MAB11 R7 A7 MDB57
MAB12 A11 DQU4 MDB9 MAB12 A11 DQU4 MDB7 MAB12 A11 DQU4 MDB40 MAB12 A11 DQU4 MDB61
N7 A2 N7 A2 N7 A2 N7 A2
A12 DQU5 MDB14 A12 DQU5 MDB2 A12 DQU5 MDB46 A12 DQU5 MDB58
T3 A13 DQU6 B8 T3 A13 DQU6 B8 T3 A13 DQU6 B8 T3 A13 DQU6 B8
T7 A3 MDB8 T7 A3 MDB5 T7 A3 MDB42 T7 A3 MDB60
A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
M7 M7 M7 M7
A15/BA3 +1.5VS A15/BA3 +1.5VS A15/BA3 +1.5VS A15/BA3 +1.5VS
40 B_BA0 M2 B2 40 B_BA0 M2 B2 40 B_BA0 M2 B2 40 B_BA0 M2 B2

BA0 VDD BA0 VDD BA0 VDD BA0 VDD
40 B_BA1 N8 BA1 VDD D9 40 B_BA1 N8 BA1 VDD D9 40 B_BA1 N8 BA1 VDD D9 40 B_BA1 N8 BA1 VDD D9
40 B_BA2 M3 G7 40 B_BA2 M3 G7 40 B_BA2 M3 G7 40 B_BA2 M3 G7
BA2 VDD BA2 VDD BA2 VDD BA2 VDD
K2 K2 K2 K2
VDD VDD VDD VDD
VDD K8 VDD K8 VDD K8 VDD K8
MDB[0..63] N1 N1 N1 N1
40 MDB[0..63] VDD VDD VDD VDD
40 CLKB0 J7 CK VDD N9 40 CLKB0 J7 CK VDD N9 40 CLKB1 J7 CK VDD N9 40 CLKB1 J7 CK VDD N9
40 CLKB0# K7 CK VDD R1 40 CLKB0# K7 CK VDD R1 40 CLKB1# K7 CK VDD R1 40 CLKB1# K7 CK VDD R1
40 MAB[12..0] 40 CKEB0 K9 R9 40 CKEB0 K9 R9 40 CKEB1 K9 R9 K9 R9
CKE/CKE0 VDD +1.5VS CKE/CKE0 VDD +1.5VS CKE/CKE0 VDD +1.5VS40 CKEB1 CKE/CKE0 VDD +1.5VS
40 ODTB0 K1 A1 40 ODTB0 K1 A1 40 ODTB1 K1 A1 40 ODTB1 K1 A1

ODT/ODT0 VDDQ ODT/ODT0 VDDQ ODT/ODT0 VDDQ ODT/ODT0 VDDQ
40 CSB0#_0 L2 CS/CS0 VDDQ A8 40 CSB0#_0 L2 CS/CS0 VDDQ A8 40 CSB1#_0 L2 CS/CS0 VDDQ A8 40 CSB1#_0 L2 CS/CS0 VDDQ A8
40 DQMB#[7..0] 40 RASB0# J3 RAS VDDQ C1 40 RASB0# J3 RAS VDDQ C1 40 RASB1# J3 RAS VDDQ C1 40 RASB1# J3 RAS VDDQ C1
40 CASB0# K3 C9 40 CASB0# K3 C9 40 CASB1# K3 C9 40 CASB1# K3 C9
CAS VDDQ CAS VDDQ CAS VDDQ CAS VDDQ
40 WEB0# L3 WE VDDQ D2 40 WEB0# L3 WE VDDQ D2 40 WEB1# L3 WE VDDQ D2 40 WEB1# L3 WE VDDQ D2
VDDQ E9 VDDQ E9 VDDQ E9 VDDQ E9
F1 F1 F1 F1
QSB3 VDDQ QSB2 VDDQ QSB4 VDDQ QSB6 VDDQ
40 QSB[7..0] F3 DQSL VDDQ H2 F3 DQSL VDDQ H2 F3 DQSL VDDQ H2 F3 DQSL VDDQ H2
QSB1 C7 H9 QSB0 C7 H9 QSB5 C7 H9 QSB7 C7 H9
DQSU VDDQ DQSU VDDQ DQSU VDDQ DQSU VDDQ
DQMB#3 E7 A9 DQMB#2 E7 A9 DQMB#4 E7 A9 DQMB#6 E7 A9

DQMB#1 DML VSS DQMB#0 DML VSS DQMB#5 DML VSS DQMB#7 DML VSS
40 QSB#[7..0] D3 B3 D3 B3 D3 B3 D3 B3
C DMU VSS DMU VSS DMU VSS DMU VSS C
VSS E1 VSS E1 VSS E1 VSS E1
G8 G8 G8 G8
QSB#3 VSS QSB#2 VSS QSB#4 VSS QSB#6 VSS
G3 J2 G3 J2 G3 J2 G3 J2
QSB#1 DQSL VSS QSB#0 DQSL VSS QSB#5 DQSL VSS QSB#7 DQSL VSS
B7 DQSU VSS J8 B7 DQSU VSS J8 B7 DQSU VSS J8 B7 DQSU VSS J8
M1 M1 M1 M1
VSS VSS VSS VSS
M9 M9 M9 M9
VSS VSS VSS VSS
VSS P1 VSS P1 VSS P1 VSS P1
VRAM_RST# T2 P9 VRAM_RST# T2 P9 VRAM_RST# T2 P9 VRAM_RST# T2 P9
40,43 VRAM_RST# RESET VSS RESET VSS RESET VSS RESET VSS
VSS T1 VSS T1 VSS T1 VSS T1
L8 ZQ/ZQ0 VSS T9 L8 ZQ/ZQ0 VSS T9 L8 ZQ/ZQ0 VSS T9 L8 ZQ/ZQ0 VSS T9
1
1
J1 NC/ODT1 VSSQ B1 J1 NC/ODT1 VSSQ B1 J1 NC/ODT1 VSSQ B1 J1 NC/ODT1 VSSQ B1
R518 L1 B9 R519 L1 B9 R520 L1 B9 R521 L1 B9
NC/CS1 VSSQ NC/CS1 VSSQ NC/CS1 VSSQ NC/CS1 VSSQ
243_0402_1% J9 NC/CE1 VSSQ D1 243_0402_1% J9 NC/CE1 VSSQ D1 243_0402_1% J9 NC/CE1 VSSQ D1 243_0402_1% J9 NC/CE1 VSSQ D1
L9 NCZQ1 VSSQ D8 L9 NCZQ1 VSSQ D8 L9 NCZQ1 VSSQ D8 L9 NCZQ1 VSSQ D8
E2 E2 E2 E2
2
2
VSSQ VSSQ VSSQ VSSQ
VSSQ E8 VSSQ E8 VSSQ E8 VSSQ E8
F9 F9 F9 F9
VSSQ VSSQ VSSQ VSSQ
G1 G1 G1 G1
VSSQ VSSQ VSSQ VSSQ
VSSQ G9 VSSQ G9 VSSQ G9 VSSQ G9
96-BALL 96-BALL 96-BALL 96-BALL

SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
K4B1G1646E-HC12_FBGA96 K4B1G1646E-HC12_FBGA96 K4B1G1646E-HC12_FBGA96 K4B1G1646E-HC12_FBGA96
+1.5VS X76@ +1.5VS X76@ X76@ X76@
+1.5VS +1.5VS +1.5VS +1.5VS
+1.5VS +1.5VS
1
1
R522 R523
1
4.99K_0402_1% 4.99K_0402_1% R524 R525 R526 R527
4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% R528 R529
B 4.99K_0402_1% 4.99K_0402_1% B
2
2
VREFCB_A1 VREFDB_Q1
2
1 1 VREFCB_A2 VREFDB_Q2 VREFCB_A3 VREFDB_Q3
1
1
0.1U_0402_10V6K~D
0.1U_0402_10V6K~D
1 1 1 1 VREFCB_A4 VREFDB_Q4
1
1
0.1U_0402_10V6K~D
0.1U_0402_10V6K~D
0.1U_0402_10V6K~D
0.1U_0402_10V6K~D
R530 R531 C813 1 1
1
0.1U_0402_10V6K~D
0.1U_0402_10V6K~D
4.99K_0402_1% C812 4.99K_0402_1% R532 R533 C815 R534 R535 C817 C818 C819
2 2 4.99K_0402_1% C814 4.99K_0402_1% 4.99K_0402_1% C816 4.99K_0402_1% R536 R537
2 2 2 2 4.99K_0402_1% 4.99K_0402_1%
2
2 2
2
2
R538
56_0402_1%
1 2 +1.5VS +1.5VS
40 CLKB0
+1.5VS +1.5VS
R539
56_0402_1%
C821
C822
C823
C824
C825
C826
C827
C828
C829
C830
C831
C832
C833
C834
C835
C836
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
40 CLKB0# 1 2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
C820
C837
C838
C839
C840
C841
C842
C843
C844
C845
C846
C847
C848
C849
C850
C851
C852
0.01U_0402_25V7K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
R540
56_0402_1% +1.5VS
1 2 +1.5VS
40 CLKB1
R541
C859
C860
C861
C862
C863
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
56_0402_1% 1 1 1 1 1
C854
C855
C856
C857
C858
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
40 CLKB1# 1 2 1 1 1 1 1
C853
0.01U_0402_25V7K~D
A A
1
2 2 2 2 2
2 2 2 2 2
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, M96 VRAM_DDR3 / Channel A
LA-5151P
5 4 3 2 1
5 4 3 2 1
+5VALW +3VALW
ADPIN VIN
DA204U_SOT323~D
PL1
http://mycomp.su/x/
SMB3025500YA_2P
2.2K_0402_5%~D
PD4
@PR15
@ PR15 0_0402_5%~D
7 7 1 2 1 2
2
6 6
5
5
PR16
D PQ2 D
4 4 FDV301N_NL_SOT23-3~D PR17
3 3
1
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1000P_0402_50V7K~D
2 33_0402_5%~D
1
2
100P_0402_50V8J~D
100P_0402_50V8J~D
100P_0402_50V8J~D
DOCK_PSID
1 1 1
S
3 1 2 PS_ID 31
1
PC3
PC5
PC7
MOLEX_87438-0743
PC2
PC4
PC6
@PJPDC1
@ PJPDC1
G
2
2
15K_0402_1%~D 100K_0402_1%~D
+5VALW
2
+5VALW
DA204U_SOT323~D
PR18
10K_0402_1%~D
1
2
PD6
1
2
PR19
C
PL2 2 PQ3
BLM18BD102SN1D_0603~D B MMST3904-7-F_SOT323~D @
2
PSID 2 1 DOCK_PSID E
2
PR20
1
1
@ PD5
@PD5 @ PR21
SM24_SOT23 1 2
1
10K_0402_1%~D
C C
VIN
@
PC193 @ PR204
2200P_0402_50V7K~D 56K_0402_5%~D
2
PD2 1 2 1 2
PJP1
PD3 @ JUMP_43X118 RLS4148_LL34-2 @ PR202
1 1
2 1 1 2 1M_0402_1%~D
BATT+ 1 2
1
1 2
RLS4148_LL34-2 PR10 PR208 VIN
68_1206_5%~D 68_1206_5%~D VS VS VIN
0.01U_0402_25V7K~D
2
1
PQ1 @PR205
@ PR205 @PR192
@ PR192
1
PC192
CHGRTCP 3 TP0610K-T1-E3_SOT23-3
1 @PR191
@PR191 10K_0402_5%~D 1K_0402_5%~D
0.22U_1206_25V7K
82.5K_0402_1%~D 1 2 ACIN 21,25,31,46

32.8
2
1
@ PR193 @
2
1
8
PR11 22K_0402_1%~D
PC11
100K_0402_5%~D PC12 N41 1 2 VinDe_IN3 3
P
0.1U_0603_25V7K~D + VinDe_Out
1
2
B O B
.1U_0402_16V7K~D
19.6K_0402_1%~D
PR12 VinDe_Ref 2
2
G
1
1
22K_0402_5%~D @PU17A
@ PU17A
1
PC194
PR206
1 2 LM393DR_SO8 @ PR203
@PR203
4
32 51ON# 10K_0402_5%~D
@ PC191 @ PD1
1000P_0402_50V7K~D RLZ4.3B_LL34
2
@ @
2
@ PR201
@PR201
10K_0402_5%~D
2 1
RTCVREF
3.3V
8
5 @ PU17B
P
+
7
O
6
G
-
1
PR13 LM393DR_SO8
Vin Detector
4
200_0805_5%
Max. typ. Min.

2
RTCVREF
PU3
L-->H 18.234 17.841 17.449
IN 1 MAX1615_IN H-->L 17.597 17.210 16.813
3 OUT
MAX1615_#SHDN1
4.7U_0805_6.3V6K~D
#SHDN 5 2
1
1
PC13
4 PR14 0_0402_5%~D
GND
5/3+ PC14
A 1U_0805_25V4Z~D A
2
MAX1615EUK+_SOT23-5~D
2
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC,MB A5151
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. A
401695
5 4 3 2 1
A B C D E
PR115 0_1206_5%~D
PVCC_CHG 2 1
B+
VIN PQ4 PQ5
FDS6675BZ_SO8 FDS6675BZ_SO8 PR22
8 1 1 8 0.015_2512_1%
0.01U_0402_25V7K~D
7 2 2 7 PJP17
6 3 3 6 1 4 2 1 CHG_B+
2 1
1
5 5
2
2200P_0402_50V7K~D
PC21
PC17
PC22
PC18
PC23
0.1U_0603_25V7K~D
2 3 @ JUMP_43X118 PR24
http://mycomp.su/x/
PC15
3.3_1210_5%~D
100K_0402_1%~D
4
1
2
PC189
PC203
0.022U_0603_50V7~D
1
2
100K_0402_1%~D
PR23
CHGEN#
2
1
1000P_0402_50V7K~D
1000P_0402_50V7K~D
4.7U_1206_25V6K~D
4.7U_1206_25V6K~D
4.7U_1206_25V6K~D
PC16 PC24 PC20
1
2
5
6
7
8
3
2
1
PC25
0.01U_0603_50V7K~D .1U_0402_16V7K~D PU4 0.1U_0603_25V7K~D
PR26
1 PQ7 1
1 2 1 28 1 2
1 2
PR28 CHGEN PVCC PQ6 FDS6675BZ_SO8
2
1
1
340K_0402_1%~D PR25 FDS8884_SO8 4
/BATDRV
2
PR27
3.3_1210_5%~D
PC26 PC27 2.2_0603_5%~D

0.1U_0603_25V7K~D 0.1U_0603_25V7K~D 27 1 2 4
2
BTST
@ PC188 0.022U_0603_50V7~D
2
2 1 ACN 2 26 DH_CHG
ACDRV_CHG# ACP ACN HIDRV
3
3
2
1
5
6
7
8
ACP
2
PR37 0_0603_5%~D
2 1 4 25 LX_CHG PL3 PR29
ACDRV PH
2.2U_0805_25V6K
ACDET 5 PD7 10UH_SIL1045RA-100PF_4.5A_30% 0.02_2512_1%~D BATT+

1
ACDET
2 1 1 2 1 2 1 4
PC19
CP setting
10U_1206_25V6M~D
10U_1206_25V6M~D
680P_0603_50V7K~D 4.7_1206_5%~D
ACSET RLS4148_LL34-2 PC28
REGN
2 3
2
0.1U_0603_25V7K~D
5
6
7
8
1
PR32
PC31
PC32
PR31 PR89
10U_1206_25V6M~D
1
54.9K_0402_1% 97.6K_0402_1%~D 6
PC30
ACSET
2
SSM3K7002F_SC59-3
24 PQ8
2
REGN
1
0.01U_0402_25V7K~D
FDS6690AS_NL_SO8 @
11
1
D
60.4K_0402_1%
@ PC33
PR33 PC29
1
PQ25
CP_SEL 2 100K_0402_1%~D 1U_0603_10V6K~D 4
1 2
31 CP_SEL
PR30
0.1U_0402_10V7K~D
G
2
2
2
1
PC190
PC35
1 2 7 ACOP
1
PR34 PC34 23 DL_CHG
3
2
1
2
340K_0402_1%~D 0.47U_0603_16V7K~D LODRV
2
@ +3VALW @
1
22
OVPSET PGND
8 OVPSET .1U_0402_16V7K~D
1 2
2 2
9 AGND LEARN 21 ACOFF 31
2
1
PR35 PR88
54.9K_0402_1% VREF 0_0402_5%~D PC37 PC38
20 CELLS 1 2 0.1U_0603_25V7K~D 0.1U_0603_25V7K~D
2
CELLS
1
10 VREF
PQ9
1
SI2301BDS-T1-E3_SOT23-3 PC39
1U_0603_10V6K~D PR86
PR36 @ 0_0402_5%~D 19 SRP
2
100K_0402_1%~D SRP
1 2GATE 2 11 18 SRN
2
VDAC SRN
1
+3VALW 1 2 BAT 17
PC40 PR87
1
0.1U_0603_25V7K~D 0_0402_5%~D VADJ 12
2
VADJ PC41
1
ACSET 0.1U_0603_25V7K~D
2
29
TP
ACGOOD#
13 ACGOOD ICHG setting RTCVREF VREF
90W adapter PR38
16 SRSET 2 1
SRSET IREF 31
2
Icharge=(Vsrset/Vvdac)*(0.1/PR29)=3.3A REGN /BATDRV 14 51.1K_0402_1%~D
BATDRV
1
1
Iadapter=(Vacset/Vvdac)*(0.1/PR22)=4.16A PR40 PR41 PR42
1
15 1 2 100K_0402_1%~D @ PC42 47K_0402_1%~D 47K_0402_1%~D

PR43 IADAPT 0.01U_0402_25V7K~D
Input OVP : 22.3V
1
@ 0_0402_5%~D BQ24751ARHDR_QFN28_5X5 PR39
2
Input UVP : 16.98V PR44 10_0603_5%~D
210K_0402_1%~D ACIN 21,25,31,45
2
1
3 VADJ D 3
Fsw : 300KHz 31 CHGVADJ 1 2
ACGOOD# 2 PQ11
31 ADP_I
1
G SSM3K7002F_SC59-3
1
PR45 IREF Current S
3
65W adapter(CP_SEL high) 499K_0402_1%~D PC43
100P_0402_50V8J~D
2
Iadapter=(Vacset/Vvdac)*(0.1/PR22)=3A 3.3V 3.3A
2
+COINCELL
PR46
PQ12
B+ 1 2 3 TP0610K-T1-E3_SOT23-3
1 VREF
B+_BIAS
1
470K_0402_5%~D
100_0805_5%~D VREF
32.8
COIN RTC Battery
1
VREF
0.1U_0805_25V7M~N
GATE PR47
2
+5VALW PR49 1K_0402_5%~D

PR48
PC44 200K_0402_1%~D
1
2
RTCVREF
1
2
1
D +COINCELL PR51
PJPRTC
2
PR50 PQ13
Z4012
2 47K_0402_1%~D
1
1
220K_0402_5%
PD8 100K_0402_1%~D G SSM3K7002F_SC59-3 1 1

2
S 2
2
1
2
1
D
PR52
3
1SS355TE-17_SOD323-2 ACOFF 1 PQ14 G1
2 2 4 CHGEN#
G2
2
G SSM3K7002F_SC59-3
2
1
PC45 +RTCVCC D
S
1
MOLEX_53261-0271_2P
1
PQ15 D .1U_0402_16V7K~D PQ16

31 FSTCHG 2
2 PR53 @ G SSM3K7002F_SC59-3
0.1U_0603_25V7K~D
G RHU002N06_SOT323-3 340K_0402_1%~D S
3
220K_0402_5%
S PD9
3
1
2
BAT54CW_SOT323~D
1
PC47
PR54
1
4 PC46 4
1U_0603_10V4Z~D
2
401695
A B C D E
5 4 3 2 1
TPS51427_B+
TPS51427_B+
B+
http://mycomp.su/x/
PJP19 PR55
@ JUMP_43X118 0_0805_5%
1 1 2 2 1 2
D D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
4.7U_1206_25V6K~D
4.7U_1206_25V6K~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
4.7U_1206_25V6K~D
4.7U_1206_25V6K~D
1
VL
5
6
7
8
1
PC84
PC48
PC49
PC50
PC197
8
7
6
5
1
PC53
SI4686DY-T1-E3_SO8
2
PQ17
PC51
PC52
2
2
SI4686DY-T1-E3_SO8
1U_0603_10V6K~D
2
2
PQ18
4.7U_0805_6.3V6K~D
2
PC54 4
1
0.1U_0603_25V7K~D
PC55
4
1
+5VALWP
PC56
1
3
2
1
PL5
1
2
3
PL4 2.2UH_FDVE1040-2R2M=P3_14.2A_20%~D
7
2.2UH_FDVE1040-2R2M=P3_14.2A_20%~D PU5 PC59 2 1
1 2 1U_0603_10V6K~D
V5FILT
VIN
LDO
+3VALWP 33 19 1 2
4.7_1206_5%~D
TP V5DRV
5
6
7
8
1
1
8
7
6
5
DH3 26 15 DH5
680P_0603_50V7K~D 4.7_1206_5%~D
D
D
D
D
PQ19 PR59 DRVH2 DRVH1 PR60
PR56
PR58
FDS6670AS_NL_SO8
D
D
D
D
FDS6670AS_NL_SO8 1 BST3A BST5A 2
0_0402_5%~D
2 24 17 1
0.1U_0402_10V7K~D
VBST2 VBST1
2
PQ20
1 0_0603_5%~D
0_0603_5%~D
2
2
2
PR57
61.9K_0402_1%~D
2
G
1
PC60 + PC57 PC61

PC79
680P_0603_50V7K~D
G
2
0.1U_0603_25V7K~D 0.1U_0603_25V7K~D
0.1U_0402_10V7K~D
1
1
1
S
S
S
PR61
330U_D_6.3VM_R18M~D LX3 25 16 LX5 1
330U_D_6.3VM_R18M~D
2
2 LL2 LL1
S
S
S
PC58
PC62
3
2
1
1
+
PC80
PC63
C C
1
2
3
DL3 23 18 DL5
1
DRVL2 DRVL1
2
2
10K_0402_1%~D
2
PGND 22
2
PR62
FB3 30 VOUT2
PR63
10K_0402_1%~D
@ 10
VOUT1
VL 32
1
REFIN2
1
11 FB5
2VREF_TPS51427 FB1
1 2 1 VREF2
PC64 0.22U_0603_10V7K~D
VSW 9
8 LDOREFIN @ PR64 0_0402_5%~D
SKIPSEL 29 2 1 VL
PR65 0_0402_5%~D
1 2
20 NC PGOOD2 28
PD10 PR66
VS RLZ5.1B_LL34 100K_0402_1%~D
EN_LDO POK 21
1 2 1 2 4 EN_LDO PGOOD1 13 PR68
2
205K_0402_1%~D
200K_0402_5%~D
B B
PR67
PC65 TPS51427_EN1 14 12 ILM1 2 1

0.22U_0603_25V7-K EN1 TRIP1
3.3VALWP
TONSE
VREF3
1
Thermal Design Current=8.21A TPS51427_EN2

27 EN2 31 ILIM2 2 1
GND
1
TRIP2
2
Peak Current=10.27A PR69
2
@ PR70 TPS51427_QFN32_5X5 243K_0402_1%~D
0_0402_5%~D
OCP min=12.32A
21
VL 0_0402_5%~D
PR71
806K_0603_1%
Fsw=300K
2
1
PR72
Output Ripple current=

2VREF_TPS51427 1
1U_0603_10V6K~D
1
@ PR74
PR73 47K_0402_5%~D
PC66 5VALWP
Rds(on) = 11.5m ohm(max)
1
7,39,52 MAINPWON 2 1 1 2 2 @ PR75 Thermai Design Current=6.88A

2VREF_TPS51427 2
Rds(on) = 9m ohm(typical) 0_0402_5%~D
0_0402_5%~D Peak Current=8.6A
0.047U_0603_16V7K~D
0.047U_0402_16V7K~N
OCP min=10.32A
1
PJP5
2
@ JUMP_43X118
PC67
Fsw=400K
PC68
+5VALWP 1 1 2 2
2
+5VALW
PQ21 @
Output Ripple current=
PJP7 TP0610K-T1-E3_SOT23-3
@ JUMP_43X118
Rds(on) = 11.5m ohm(max) ; Rds(on) = 9m ohm(typical)
1 1 2 2 1 3
A A
PD11
PJP11
@ JUMP_43X118
1 2 DELL CONFIDENTIAL/PROPRIETARY
1 1 1SS355TE-17_SOD323-2
2 2
PJP9 PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
@ JUMP_43X118
1 1 BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC,MB A5151
+3VALWP 2 2 +3VALW NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
401695
5 4 3 2 1
A B C D
@ PJP20
VCCP_B++ 2 1 B+
+1.05V_VCCP
10U_1206_25V6M~D
2200P_0402_50V7K~D
PAD-OPEN 4x4m
Thermal Desig Current=7.88A
10U_1206_25V6M~D
0.1U_0603_25V7K~D
Peak Current=9.85A
PC70
1
http://mycomp.su/x/
PC85
PC86
OCP min=11.82A
PC69
Fsw=300KHz
2
1 <Vo=1.05V> VFB=0.75V 1
Vo=VFB*(1+PR430/PR433)=0.75*(1+8.66K/21.5K)=1.052V
PR76
267K_0402_1%~D
1 2
5
6
7
8
PR77
0_0402_5%~D PR78 PQ22
2 1 EN_VCCP BST_VCCP1 2 1 2 SI4686DY-T1-E3_SO8
28,31,33,49,50 SUSP#
1
@ PC72 0_0603_5%~D PC71 0.1U_0603_25V7K~D
PR79 .1U_0402_16V7K~D 4
30.1K_0402_1%~D
2
+5VS
15
14
2
1
PU6
3
2
1
PL6
EN_PSV
TP
VBST
2.2UH_FDVE1040-2R2M=P3_14.2A_20%~D +1.05V_VCCPP
TON_VCCP 2 13 UG_VCCP 2 1
TON DRVH
2
PR80 3 12 LX_VCCP
0.1U_0402_10V7K~D
4.7U_0805_6.3V6K~D
VOUT LL
5
6
7
8
5
6
7
8
300_0603_5%~D PR81 PR82 @ PR83
220U_D2_4VM
FDS6670AS_NL_SO8
1
1 2 V5FILT_VCCP 4 11 TRIP_VCCP
1 2 0_0603_5%~D 4.7_1206_5%~D
FDS6670AS_NL_SO8
D
D
D
D
D
D
D
D
+5VS V5FILT TRIP
1
+
PC73
PC74
PC81
13.7K_0402_1%~D
FB_VCCP 5 10 V5DRV_VCCP
2 1
VFB V5DRV
1
PQ23
PQ24
2
2
PC76 LG_VCCP @ PC75 2 2
6 PGOOD DRVL 9 4 G 4 G
PGND
1U_0603_10V6K~D 680P_0603_50V8J~D
GND
2
1
1
S
S
S
S
S
S
TPS51117RGYR_QFN14_3.5x3.5 PC77
3
2
1
3
2
1
@ PC78 4.7U_0805_10V6K~D
2
47P_0402_50V8J~D
2 1
2 1
PR84
8.66K_0402_1%~D
1
PR85
21.5K_0402_1%~D
2
@ PJP18
5
3
JUMP_43X118 PU13 RT9025 3
NC
+3VALW 1 1 2 2 3 VIN VOUT 6 +1.8VSP
1K_0402_1%~D
10U_1206_25V6M~D
1
28,31,33,49,50 SUSP# 1 2 2
EN ADJ
7
1
PR94
PC126
PC87
PR93 0_0402_5%~D 1000P_0402_50V7K~D PC88
+5VALW 4 1 10U_1206_25V6M~D
2
VDD PGOOD
2
1
@ PC171
@PC171 GND GND
0.1U_0402_16V7K~D
10U_1206_25V6M~D
8
2
PC172
1
806_0402_1%~D
1
2
PR95
PC170
1U_0402_6.3V6K~D
2
2
@PJP4
@ PJP4
JUMP_43X118
1
+1.05V_VCCPP 1 2 2 +1.05V_VCCP
@PJP6
@ PJP6
+1.8VSP
JUMP_43X118 Imax=0.67A
1 1 2 2
Vout=0.8*(PR94+PR95)/PR95=0.8*(1k+806)/806=1.79V
4 4
@ PJP27 DELL CONFIDENTIAL/PROPRIETARY

2 1 +1.8VS
+1.8VSP
PAD-OPEN 2x2m~D
401695
A B C D
A B C D
@PJP22
@ PJP22
+1.5VSP_B++ 2 1 B+
1.5V
2200P_0402_50V7K~D
Thermal Design Current=13.52A PAD-OPEN 4x4m
Peak Current=16.91A
10U_1206_25V6M~D
10U_1206_25V6M~D
10U_1206_25V6M~D
0.1U_0603_25V7K~D
OCP min=20A
1
PC184
PC185
Fsw=298KHz
http://mycomp.su/x/
PC183
PC89
PC90
2
2
<Vo=1.5V> VFB=0.75V
1
Vo=VFB*(1+PR104/PR105)=0.75*(1+22.1K/22.1K)=1.5V 1
PR96
267K_0402_1%~D
1 2
5
PR97 PR98 PC91
0_0402_5%~D 0_0603_5%~D 0.1U_0603_25V7K~D PQ27
2 1 EN_1.5 BST_1.5 1 2 1 2
28,31,33 SYSON
1
PR99 4
30.1K_0402_1%~D @ PC92
2
.1U_0402_16V7K~D
+5VALW FDMS8692_POWER56-8-5
15
14
2
1
PU8
3
2
1
PL8
TP
VBST
EN_PSV
1UH_FDUE1040D-1R0M-P3_21.3A_20%
TON_1.5 2 13 UG_1.5 1 2 +1.5VP
TON DRVH
2
PR100 3 12 LX_1.6
0.1U_0402_10V7K~D
4.7U_0805_6.3V6K~D
VOUT LL 1 1
5
6
7
8
5
6
7
8
300_0603_5%~D PR101 PR102 @ PR103
220U_D2_4VM
220U_D2_4VM
1
0_0603_5%~D + +
PC82
1 2 V5FILT_1.5 4 11 TRIP_1.51 2 4.7_1206_5%~D
FDS6670AS_NL_SO8
FDS6670AS_NL_SO8
D
D
D
D
D
D
D
D
+5VALW V5FILT TRIP
PC177
PC93
PC94
8.87K_0402_1%~D
FB_1.5 5 10 V5DRV_1.5
2 1
2
VFB V5DRV
1
2 2
PQ28
PQ42
PC96 6 9 LG_1.5 4 4
11 1.5V_PGOOD PGOOD DRVL G G
PGND
2
1U_0603_10V6K~D @ PC95 2
GND
2
680P_0603_50V8J~D
1
2
S
S
S
S
S
S
TPS51117RGYR_QFN14_3.5x3.5 PC97
3
2
1
3
2
1
@PC98
@ PC98 PR207 4.7U_0805_10V6K~D
2
47P_0402_50V8J~D 100K_0402_1%~D
2 1
1
+5VALW
2 1
PR104
22.1K_0402_1%~D
1
PR105
22.1K_0402_1%~D
2
3
PU11 3
RT9026_MSOP10
4.7U_0805_6.3V6K~D
4.7U_0805_6.3V6K~D
@PJP24
@ PJP24
1U_0603_10V6K~D
+1.5VP 1 1 2 2 1 VDDQSNS VIN 10 +3VALW
1
1
PC155
PC156
JUMP_43X118 2 VLDOIN
PC154
2
2
@ 8
GND
6
VTTREF
+0.75VSP 3 VTT
10U_0805_10V6K~D
1
1
PR174
10U_0805_10V6K~D
5 VTTSNS S5 9
PC158
0_0402_5%~D PC159
PGND
PC157
7 2 1 0.1U_0402_16V7K~D
GND
2
2
S3 SUSP# 28,31,33,48,50
+0.75VSP
1
4
11
@ PC160 Thermal Design Current:0.7A

0.1U_0402_16V7K~D
2
Peak current:1A
Vout=VDDQSNS/2=1.5V/2=0.75V
@ PJP15
JUMP_43X118
1
+1.5VP 1 2 2 +1.5V
4
@ PJP16 4
JUMP_43X118
1 1
2 2
@ PJP29
+0.75VSP 2 1
+0.75VS PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
PAD-OPEN 2x2m~D TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
401695
A B C D
5 4 3 2 1
@ PJP23 +VGA_COREP
1 2 VGA_B++ Thermal Design Current M96=22.8A , M92=12.67A
B+
Peak Current M96=30.7A , M92=15.4A
PAD-OPEN 4x4m
OCP min M96=31.7A , M92=19.3A
2200P_0402_50V7K~D
Fsw=300KHz
10U_1206_25VAK~D
10U_1206_25VAK~D
0.1U_0603_25V7K~D
PL14 6268_VGA PHASE_VGA
1 2
1
PC99
UG_VGA M96@
PC187
PC186
PC100
http://mycomp.su/x/
5
5
FBMA-L18-453215-900LMA90T_1812 PR106 PR107 PQ29 PQ48 M96 0.9V 1V 1.1v
10K_0402_1%~D 1 2 1 2 GPU_VID_0 0 1 1
FDMS8692_POWER56-8-5
FDMS8692_POWER56-8-5
2
2
PR124 GPU_VID_1 0 0 1
2.2_0603_5%~D PC101 0.1U_0603_25V7K~D
2
D
+5VALW D
VGA_PWGOD
4 4
1
BOOT_VGA M92 0.9V 0.95V 1.1V 1.2V
PR108 GPU_VID_0 0 1 0 1
1
18.2K_0402_1%~D 0_0603_5%~D
GPU_VID_1 0 0 1 1
M92@ PR109 PR110
16
15
3
2
1
3
2
1
8
PVCC_VGA
0_0603_5%~D PU9 4.7_0603_5%
2
PR122 1 2 6268_VGA
BOOT
PHASE
GND
PGOOD
UG
2
PC102 +GPU_CORE
VIN_VGA 3 14 1 2
VIN PVCC
1
2.2U_0603_6.3V6K~D
4.42K_0402_1%~D @ PC103
M92@ 0.1U_0603_25V7K~D 6268_VGA 4 13 LG_VGA PL9
2 VCC LG 0.36UH_FDUE1030D-R36M=P3 32A_20%
1
1 2
PC104
0.1U_0402_10V7K~D
2.2U_0603_6.3V6K~D ISL6268CAZ-T_SSOP16 12 1 1 1
4.7U_0805_6.3V6K~D
2
PGND
S TR FDMS8670S 1N MLP-8
S TR FDMS8670S 1N MLP-8
330U_D2_2VY_R7M~D
330U_D2_2VY_R7M~D
330U_D2_2VY_R7M~D
1
+ + +
PC83
PR111 PC109
M96@ PC105
M96@ PC106
M96@ PC107
PC108
PC105 22K_0402_1%~D 680P_0603_50V8J~D
1 2
1 2 EN_VGA 5 11 ISEN_VGA
1 2
31 VGA_ON
2
EN ISEN 2 2 2
PQ30
PQ31
COMP
1
FSET
PR113 4 4 PR112
1
7.15K_0402_1%~D
VO
FB
4.7_1206_5%~D
PC110 M96@
220U_X_2VM_R7M~D .1U_0402_16V7K~D
2
2
7
10
M92@
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
3
2
1
3
2
1
2
C C
2
PR114
PC195
PC196
FSET_VGA
PC106 COMP_VGA 10_0402_1%~D
1
1
+3VS
8.87K_0402_1%~D
1
M96@
PR124
33P_0402_50V8J~D
1
2
PR116
2
1
220U_X_2VM_R7M~D PC111 12.1K_0402_1%~D
2200P_0402_50V7K~D
2
1
M92@ PR126
2
2
10K_0402_5%~D PR117 PC112
45.3K_0402_1%~D 0.01U_0402_25V7K~D
1
1
PR118
PC113
1
2
D
1
1.5K_0402_1%
39 GPU_VID0 2 1 2
2
G
0.01U_0402_16V7K~D
PR127 S FB_VGA
3
10K_0402_5%~D
100K_0402_5%~D
1
1
PC107 1 PQ33
1
BSS138W-7-F_SOT323~D +3VS PR119
PR129
PC117
1
PR121 M92@ 0_0402_5%~D
2
0_0402_5%~D M92@ PR92 PR120
2 PR90 18.2K_0402_1%~D +3VS
2
2
10K_0402_5%~D 3.01K_0402_1%~D
2
220U_X_2VM_R7M~D
8.87K_0402_1%~D
2
1
M92@
1
D
1
0.01U_0402_16V7K~D
1
M96@
M92@ PQ47
PR122
1 2
1
1
PR113 G BSS138W-7-F_SOT323~D PR123 @ PC114
100K_0402_5%~D
B @ PC115 10K_0402_5%~D 820P_0402_50V7K~D B
M92@ PC198
S
2
M92@ PR91
820P_0402_50V7K~D
2
1
D
1
2
2 1 2 PQ32
4.75K_0402_1%~D G BSS138W-7-F_SOT323~D
0.01U_0402_16V7K~D
M92@ M92@ PD18 M92@ PD17 PR125 S
3
1 2 2 1 10K_0402_5%~D
100K_0402_5%~D
1
1
1SS355TE-17_SOD323-2 1SS355TE-17_SOD323-2
PC116
5
@ PJP26 PU15 RT9025
PR128
JUMP_43X118 NC +1.1VSP 2
+1.5VP 1 1 2 2 3 6
2
VIN VOUT 39 GPU_VID1
10U_1206_25V6M~D
1000P_0402_50V7K~D
1K_0402_1%~D
PC176
1 2 2 7
10U_1206_25V6M~D
28,31,33,48,49 SUSP# EN ADJ

1
1
PR196
PR194
PC181
PC178
0.1U_0402_16V7K~D
+5VS
2
0_0402_5%~D 4 1
39
2
VDD PGOOD
1
@ PC180
1.1VS_RUN_PWRGD
GND GND
10U_1206_25V6M~D
2
2
100K_0402_1%~D
2
8
PC182
PR209
1
2.61K_0402_1%~D
1
PR195
2
PC179
1U_0402_6.3V6K~D @ PJP21
2
A 2 1 +1.1VS A
+3VS +1.1VSP
PAD-OPEN 2x2m~D
+1.1VSP
Imax=0.91A Compal Electronics, Inc.
Vout=0.8*(PR196+PR195)/PR195=0.8*(1k+2.61k)/2.61k=1.107V PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
Title
401695
5 4 3 2 1
5 4 3 2 1
+5VS
2
PR130
PC118 +CPU_B+
1_0603_5%~D
2 1 PL10
http://mycomp.su/x/
CPU_VID38
CPU_VID28
CPU_VID18
CPU_VID08
8
8
FBMA-L18-453215-900LMA90T_1812
CPU_VID6
CPU_VID5
CPU_VID4
1
@ 1 2 B+
5600P_0402_25V7K
VR_ON
7,31,39
1U_0603_10V6K~D
2200P_0402_50V7K~D
0.1U_0603_25V7K~D
100U_25V_M~D
100U_25V_M~D
100U_25V_M~D
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
1
1
PR131 499_0402_1%~D
PC120
PC121
1 1 1
1U_0603_10V6K~D
10U_1206_25VAK~D
10U_1206_25VAK~D
10U_1206_25VAK~D
D D
1
PC119
PC122
PC123
PC124
PC125
@ PC175
PC173
PC174
11,21 DPRSLPVR 1 2
1
+ + +
PC200
PC199
PR134 0_0402_5%~D
2
PR132 0_0402_5%~D
2
1
5
8,11,19 H_DPRSTP# 1 2
2
2 2 2
PR135 0_0402_5%~D
PR142 0_0402_5%~D
PR136 0_0402_5%~D
PR137 0_0402_5%~D
PR138 0_0402_5%~D
PR139 0_0402_5%~D
PR140 0_0402_5%~D
SI7686DP-T1-E3_SO8
SI7686DP-T1-E3_SO8
1
1
PADPT1
PQ39
PQ38
2
+3VS PR141 0_0402_5%~D 4 4
DPRSLPVR_CPU
1 2 @
DPRSTP#_CPU
CLK_EN#_CPU
VR_ON_CPU
2
+3VS PC128 PL11
1U_0603_10V6K~D
3V3_CPU
1.91K_0402_1%~D
3
2
1
3
2
1
1
PR144 0.22U_0603_10V7K~D 0.36UH_FDU1040D-R36M_26A_20%
PC127
1
VID6
VID5
VID4
VID3
VID2
VID1
VID0
BOOT_CPU1 1 2 1 2 4 1 +CPU_CORE
2
PR143
4.7_1206_5%~D
2
1
@ PR145 2.2_0603_5%~D 3 2
1
499_0402_1%~D
PR146
49
48
47
46
45
44
43
42
41
40
39
38
37
3.65K_1206_1%
10K_0402_1%~D
SI4634DY-T1-E3 1N SO8
PR149
PR148
2
1_0402_5%~D
PR147
3V3
CLK_EN#
DPRSTP#
VID6
VID5
VID4
VID3
VID2
VID1
VID0
GND
DPRSLPVR
VR_ON
1
PQ35
PQ34
@ PR150
680P_0603_50V8J~D
1 2
11,21,31 VGATE 0_0402_5%~D
1 36 4 4
2
PGOOD BOOT1
PC129
8 H_PSI# 1 2
2 35 UGATE_CPU1 PC130
31 POW_MON 1U_0603_10V6K~D PC131 PR151 10K_0402_1%~D PSI# UGATE1
1 2
2
1 2 1 2 PMON_CPU3 34 PHASE_CPU1 VSUM VCC_PRM
3
2
1
3
2
1
PMON PHASE1 ISEN1
PR152 147K_0402_1%~D 4 33 0.22U_0603_16V7K~D
C RBIAS_CPU RBIAS PGND1 C
1 2 +CPU_B+
VR_TT# 5 32 LGATE_CPU1
VR_TT# LGATE1
5
@ PR153 4.22K_0402_1% @ PH1 100K_0603_1%_TH11-4H104FT
2200P_0402_50V7K~D
10U_1206_25VAK~D
10U_1206_25VAK~D
10U_1206_25VAK~D
0.1U_0603_25V7K~D
1
NTC_CPU PVCC_CPU
PC133
PC134
PC135
1 2 1 2 6 31
SI7686DP-T1-E3_SO8
NTC PVCC
SI7686DP-T1-E3_SO8
1
@ PC132 0.015U_0402_16V7K SOFT_CPU LGATE_CPU2
PC202
PC201
7 30
2
SOFT LGATE2
PQ41
PQ40
1 2
OCSET_CPU 8 29 4 4
2
PC136 0.022U_0603_25V7K OCSET ISL6266ACRZ-T_QFN48_7X7 PGND2 @
1 2 VW_CPU 9 28 PHASE_CPU2
VW PHASE2
PR154 11.5K_0402_1%~D COMP_CPU 10 27 UGATE_CPU2 PL12
3
2
1
3
2
1
COMP UGATE2 PR155 PC137 0.36UH_FDU1040D-R36M_26A_20%
1 2
FB_CPU 11 26 BOOT_CPU2
1 2 1 2 4 1
PC138 1 FB BOOT2
2
1
DROOP
1000P_0402_50V7K~D 12 25 2.2_0603_5%~D
0.22U_0603_10V7K~D 3 2
FB2 NC
1
VDIFF
ISEN2
ISEN1
VSUM
FB2_CPU
VSEN
PR156 11.3K_0402_1%~D PR157
3.65K_1206_1%
GND
VDD
RTN
DFB
1
VIN
4.7_1206_5%~D PR160
PR158
VO
1 2
10K_0402_1%~D
PR159
1 2 PU10 1_0402_5%~D
1 2
13
14
15
16
17
18
19
20
21
VDD_CPU22
23
24
PQ36
PQ37
2
PC139 1000P_0402_50V7K~D 4 4 @ PR161
2
29.1
ISEN1 PC140 0_0402_5%~D
DROOP_CPU
VDIFF_CPU
ISEN2 680P_0603_50V8J~D
VSEN_CPU
1 2
2
RTN_CPU
DFB_CPU
VIN_CPU
PR163 97.6K_0402_1%~D PC141 270P_0402_50V7K~D 1 2 +5VS

1
1 2 2 1 PC143
3
2
1
3
2
1
1
PR162 1_0603_5%~D VSUM 1 2

100K_0402_1%~D
PC144 100P_0402_50V8J~D PR164 PC142

1 2 1K_0402_1%~D 1U_0603_10V6K~D 0.22U_0603_16V7K~D
2
B B
@ PR210
2
2
VCC_PRM
PR166 ISEN2
PR165 PC145 2200P_0402_50V7K~D 10_0603_5%~D
1 2 1 2 1 2 +CPU_B+
1
100_0402_1%~D
1
1 2
PR167 1K_0402_1%~D PC146
2
0.1U_0603_25V7K~D
PR168 PC147 330P_0402_50V7K~D
8 VCCSENSE 1 2 1 2
VSUM
1
0_0402_5%~D
1
PC149 PC148
2.61K_0402_1%~D
330P_0402_50V7K~D 0.01U_0402_25V7K~D
PR169
2
1 2
11K_0402_1%~D
8 VSSSENSE
PR170 0_0402_5%~D
2
1
PC150 180P_0402_50V8J~D
PR171
1 2
2
1 2 1 2
PH2 Fsw=290KHz
2
PR172 1K_0402_1%~D PR173 3.74K_0402_1%~D 10KB_0603_ERTJ1VR103J

PC151 0.1U_0603_50V4Z~D
1
VCC_PRM 1 2
PC153 0.22U_0603_10V7K~D
PC152 2 1 2 1
A A
0.22U_0603_16V7K~D
401695
5 4 3 2 1
5 4 3 2 1
Battery Connect/OTP
+3VALWP
http://mycomp.su/x/
DA204U_SOT323~D
DA204U_SOT323~D
DA204U_SOT323~D
DA204U_SOT323~D
D D
2
PD12
PD13
PD14
PD15
@ @ @ @
BATT+
BATT++ CPU
1
PH3 under CPU botten side :
BATT+
PL13
SMB3025500YA_2P
1 2 BATT++
CPU thermal protection at 90 +-3 degree C
100P_0402_50V8J~D
Recovery at 50 +-3 degree C
1
1
100P_0402_50V8J~D
1
PC164
PC162
PC161
PC163 1000P_0402_50V7K~D
2
2
0.01U_0402_25V7K~D
2
PR175 Place clsoe to EC pin

1K_0402_5%~D VL VS
1 2 BATT_TEMP
BATT_TEMP 31
BATT_SMD
BATT_SMC
PR176
2
BATT_B/I
1K_0402_5%~D
2
PJPB1 battery connector @ PC165
1
PC166
GND 11 .1U_0402_16V7K~D
1
0.1U_0603_25V7K~D
SMART GND 10 CPU
1
9 PR177
Battery: 9 PR182
8 8 1K_0402_5%~D 10.7K_0402_1%~D VL
7
2
7 PR184
6 2 1
6
C
9.BAT+ 5 5 1 2 +3VALWP 147K_0402_1%~D C
2
4 1 2
8.BAT+ 4
3 PR178 PR185
3 205K_0402_1%~D
7.ID 2 2
6.49K_0402_1%~D
1
6.B/I 1 PR186
1
8
PJPB1 61.9K_0402_1%~D
5.TS SUYIN_200275MR009F50PZR~D
1 2 EC_SMB_DA1 31
OTP_IN OTP_IN+ PD16
1 2 3
P
4.SMD +
PR179
0 1OTP_OUT
1 2 MAINPWON 7,39,47
100_0402_5%~D 1 2 OTP_IN- 2
3.SMC VL -
G
1SS355TE-17_SOD323-2
2.GND PR188 PU12A
4
1
150K_0402_1%~D LM358ADR_SO8
1.GND 1 2 PH3
EC_SMB_CK1 31
1
100K_0603_1%_TH11-4H104FT
1
PR180
100_0402_5%~D PC168 PR190
2
1000P_0402_50V7K~D 150K_0402_1%~D
2
2
PC169
1U_0603_10V6K~D
BATT+
1
PR181
453K_0402_1%~D
B VS B
2
1
0.01U_0402_25V7K~D
PR183
499K_0402_1%~D
1
PC167
2
2
8
LM358ADR_SO8
5 BATT_IN
P
BATT_OUT 7 +
1 2 0
31 BATT_OVP
6
-
G
PR187
1
10K_0402_1%~D
4
PU12B
PR189
86.6K_0402_1%
2
LI-3S :13.5V----BATT_OVP=1.126V
A A
BATT_OVP=0.08338*BATT+
401695
5 4 3 2 1
5 4 3 2 1
V ersion Change L ist ( P . I. R . L ist ) P age 1

R equest
Item Page# Title D ate Issue D escription Solution D escription R ev.
O w ner
http://mycomp.su/x/
Compal Change PR68 from P/N:SD03429438L (294K +-1% 0402) to
01 47 +3VALWP/+5VALWP 01/22 Setiing +5VALW OCP to 10.32A X01
D Mike SD03424938L (249K +-1% 0402) D
Compal Change PR69 from P/N: SD03424938L (249K +-1% 0402) to

02 47 +3VALWP/+5VALWP 01/22 Setiing +3VALW OCP to 12.32A X01
Mike SD03429438L (294K +-1% 0402)
+1.05V_VCCP/ Compal Change PR81 from P/N: SD03480618L (8.06K +-1% 0402) to
03 48 01/22 Setiing +1.05V_VCCP OCP to 11.82A X01
+1.8VSP Mike SD03416228L (16.2K +-1% 0402)
Change PR10 from P/N: SD00103308L (33 +-5% 1206) to
Compal SD011680A8L (68 +-5% 1206)
04 45 DCIN/Precharger 01/22 Common circuit design modify X01
Mike Add PR208 SD011680A8L (68 +-5% 1206) parallel with PR10
Compal HW need to use +1.5VSP PGOOD signal,so need Add PR207 SD03410038L (100K +-1% 0402) between PU8 pin6
05 49 +1.5VSP/0.75VSP 01/22 and PR97 pin 2. X01
Mike to add a pull high resister.
Compal HW need to use +1.1VSP PGOOD signal,so need Add PR209 SD03410038L (100K +-1% 0402) between PU15 pin1
06 50 GPU_COREP/1.1VSP 01/22 and +3VS. X01
Mike to add a pull high resister.
C C
Compal Change OCP setting from 20A to 25.6A Change PR113 from P/N:SD03449910L(4.49K +-1% 0402) to
07 50 GPU_COREP/1.1VSP 02/09 SD03463418L(6.34K +-1% 0402) X01
Mike
08 46 Charger 02/09 Compal Populate PR88,take off PR37 and PQ10,change PR175 from X01
Take off Cells selector function. 47K to SD02810018L(1K +-5% 0402)
Mike
Change PQ34,PQ35,PQ36,PQ37 from

09 51 CPU_CORE 02/24 Compal (SI4430BDY-T1-E3 1N SO-8) to X01
Change CPU_CORE low-side MOSFET
Mike SB00000DA00(SI4634DY-T1-E3 1N SO8)
10 51 CPU_CORE 02/24 Compal HW don't need to use VR_TT# signal,so Depopulate PR145 SD03449908L(499 +-1% 0402) X01
Mike depopulate pull high resister.
℃) to X6S(105℃)
Change PC99,PC100,PC123,PC124,PC125,PC133,PC134,PC135
11 51 CPU_CORE 02/24 Compal from (10U 25V M X5R1206 H1.6) to X01
Change input cap from X7R(85
GPU_COREP Mike SE153106K8L(10U 25V K X6S 1206 H1.6)
B B
Compal Change PC64 from P/N: SE080224K8L (.22U 10V K X7R 0603)
12 47 +3VALWP/+5VALWP 02/24 Take off Manufacturer:COMPOSTAR from PC64 X01
Mike to SE080224M8L (.22U 10V K X7R 0603)
Compal Change PQ43,PQ44,PQ45,PQ46 from P/N:
13 52 BATTERY CONN 02/24 Take off non-PSL Manufacturer:Panjit
Mike SB000006800 (2N7002W T/R7 1N SOT-323) X01
to SB00000B30L (PMF3800SN 1N SC70-3)
Change PR29 from P/N:
14 46 Charger 02/24 Compal SD021200D0L (S RES 1W .02 +-1% 2512) X01
Take off non-Lead Free material.
Mike to SD000001F0L (S RES 1W .02 +-1% 2512 50PPM/C)
Compal Change PR117 from SD03440228L (40.2K +-1% 0402)

15 50 GPU_COREP/1.1VSP 02/24 Change frequence setting from 330KHz to 294KHz. to SD03445328L (45.3K +-1% 0402) X01
Mike
Compal Change PL4,PL5,PL6 from

16 48 +3VALWP/+5VALWP 02/24 Change choke reated current from 11A to 14.2A SH00000BQ0L (2.2UH +-20% MPLC1040L2R2 11A) X01
Mike
+1.05V_VCCP to SH00000CG0L (2.2UH 20% FDVE1040-2R2M=P3 14.2A)
A A
401695
5 4 3 2 1
5 4 3 2 1

R equest
Item Page# Title D ate O w ner Issue D escription Solution D escription R ev.
http://mycomp.su/x/
Compal Change PD3 from SCS00002G00 to SC11N414880
17 45 DCIN/Precharger 03/04 Prevent diode breakdown from battery X01
Antony
D inrush current D
Compal Change PD4 part number from SC1A204U000 to SC1A204U00L

18 45 DCIN/Precharger 03/04 Change part number to L-end X01
Antony
Compal Change Rtrip resistance to meet OCP setting Change PR68 from 249K ohm to 205K ohm
19 47 +3VALWP/+5VALWP 03/04 X01
Antony
Compal Change Rtrip resistance to meet OCP setting Change PR69 from 294K ohm to 243K ohm
20 47 +3VALWP/+5VALWP 03/04 X01
Antony
+1.05V_VCCP/ Compal Change PR81 from 16.2K ohm to 13.7K ohm

21 48 03/04 Change Rtrip resistance to meet OCP setting X01
+1.8VSP Antony
Compal Change PR101 from 13.7K ohm to 8.87K ohm

+1.5VSP/0.75VSP 03/04 Change Rtrip resistance to meet OCP setting X01
22 49 Antony
C C
Compal M96:Change PR113 from 6.35K ohm to 7.15K ohm
GPU_COREP/1.1VSP Change Rsen resistance to meet OCP setting X01
23 50 03/04 Antony M92:Change PR113 from 4.99K ohm to 4.75K ohm
X01
24 50 GPU_COREP/1.1VSP Compal Change PR116 from 13K ohm to 12.1K ohm
03/04 For better Bandwidth
Antony
25 50 GPU_COREP/1.1VSP 03/04 Compal Change PC113 part number from SE075222K8L to X01
Change part number to common part SE074222K8L
Antony
26 50 GPU_COREP/1.1VSP 03/04
Compal
Change output Capacitor
Change PC105
330uF
、PC106、PC107 Capacitor from 220uF to X01
Antony
Compal M92:Change PR122 from 4.53K ohm to 4.42K ohm

X01
27 50 GPU_COREP/1.1VSP 03/04 Change VID resistance to meet setting
Antony
B Compal M92:Change PR124 from 17.4K ohm to 18.2K ohm B

28 50 GPU_COREP/1.1VSP 03/04 Change VID resistance to meet setting X01
Antony
29 51 CPU_CORE 03/04
Compal
Antony
To avoid noise Add PC199 、PC201 0.1uF Cap to +CPU_B+ X01
30 51 CPU_CORE 03/04
Compal
Antony
To avoid noise Add PC200 、PC202 2200pF Cap to +CPU_B+ X01
Compal Reserve PR194 space

X01
31 03/04 Reserve space for load line shift control
51 CPU_CORE Antony
Compal Change PC151 from 0.068uF to 0.1uF

32 51 CPU_CORE 03/16 To improve transient response X01
Antony
A A
401695
5 4 3 2 1
5 4 3 2 1

R equest
http://mycomp.su/x/
33 51 CPU_CORE 03/16 Compal Let difference of CPU Load Line and Spec Change PR173 from 3.57K ohm to 3.74K ohm X01
D Antony smaller than 2mV D
34 52 BATTERY CONN 03/16

Compal
Antony
Disable Hardware CPU 、GPU OTP circuit
Reserve
space
、、PQ45、PQ46、PR197、PR198、PR199、PR200
PQ43 PQ44 X01
Compal Add PL14 parallel PJP23

35 50 GPU_COREP/1.1VSP 03/16 EMI solution X01
Antony
Compal
36 50 GPU_COREP/1.1VSP 03/16 EMI solution Change PR107 from 0 ohm to 2.2 ohm X01
Antony
Compal Connect PC109 series PR112 from Phase node to GND

37 50 GPU_COREP/1.1VSP 03/16 EMI solution X01
Antony
38 50 GPU_COREP/1.1VSP 03/16
Compal
Antony
Solve switching spike problem Change L/S MOS PQ30 、PQ31 from SO8 to power-PAK X01
C C
Compal Change PR89 from 143K ohm to 97.6K ohm

39 46 Charger 03/20 Change 65W CP setting from 3.3A to 3A X01
Antony
1.05V_VCCP/ Compal
40 48 03/20 For phase margin improved Add PC87 1000pF between PU13 pin6 and PU13 pin7 X01
1.8VSP Antony
1.05V_VCCP/ Compal
41 48 03/20 For phase margin improved Add PC126 10uF between PU13 pin6 and PU13 GND X01
1.8VSP Antony
Compal
42 50 GPU_COREP/1.1VSP 03/20 For phase margin improved Add PC181 1000pF between PU15 pin6 and PU15 pin7 X01
Antony
Compal
43 50 GPU_COREP/1.1VSP 03/20 For phase margin improved Add PC176 10uF between PU15 pin6 and GND X01
Antony
B Compal B
44 50 GPU_COREP/1.1VSP 04/29 To promote current sustain rating M96:Add PQ48 for GPU buck circuit X02
Antony
Compal
45 46 Charger 05/06 TI FAE request Add PR37 0 ohm resistor between PU4 pin4 and PR26 X02
Antony
Compal Change PQ4,PQ5,PQ7 from FDS4435 to

46 46 Charger 05/06 slove PQ5 design margin issue X02
Antony FDS6675 (SB966750080)
Compal
47 51 CPU_CORE 05/06 Montavina platform design Change PC136 from 15nF to 22nF X02
Antony
Compal Add PQ26,PD19,PD20,PC203,PR115,PR133,

48 46 Charger 05/06 TI FAE request X02
Antony reserve PC25 space
A A
401695
5 4 3 2 1
5 4 3 2 1

R equest
http://mycomp.su/x/
Charger 06/04 Compal TI FAE request Delete PQ26,PD19,PD20,PC203,PR115,PR133 X03
49 46
D Antony D
Compal Reserve PR90 0ohm , PR37 0ohm , PC100 space

50 46 Charger 06/04 TI request to reserve protection circuit ,PC25 0.022uF ,PC change to 0603 size X03
Antony
Compal Recover correct component PR89 to 97.6K ohm

51 46 Charger 06/04 Recover a correct component X03
Antony
Compal Change PQ2 from SB502060000 (RHU002N06_SOT323-3)

52 45 DCIN/Precharge 06/04 DELL command to SB50301008L (FDV301N 1N SOT23-3) X03
Antony
C C
B B
A A
401695
5 4 3 2 1
5 4 3 2 1

R equest
O w ner
http://mycomp.su/x/
1 06 Clock gen 2009/02/03 Adam_Lai Error connection of clock gne I2C. Correct CLK_SMBDATA connect to U1.9 , CLK_SMBCLK connect to U1.10. Rev02 (X01)
D D
Change PN: SE020105Z8L (S CER CAP 1U 50V Z Y5V 0805 H1.25)

2 26 Memo 2009/02/03 Adam_Lai No need to using new part. [NA code) to SE033105Z8L (S CER CAP 1U 25V Z F(Y5V) 0805 H0.85) Rev02 (X01)
[AP code] Location: C889, C890, C891, C922
3 25 Codec 2009/02/03 Adam_Lai Follow codec reference schematic Correct C866 connect from R545 pin 2 to R545 pin1 Rev02 (X01)
Correct C865 connect from R543 pin 2 to R543 pin 1.
4 30 BT connector 2009/02/03 Adam_Lai Update JBT1 conn SP01000SL0L (AP code) symbol. Rev02 (X01)
5 30 CRT RGB EA 2009/02/09 Adam_Lai CRT RGB signals EA failed on Rising / Falling time. Change L31~L33 from SM01000AL00 (S SUPPRE_ CHENG-HANN MBK1608301YZF Rev02 (X01)
0603) to SM01000DT0L (S SUPPRE_ MURATA BLM18BA220SN1D 0603)
6 35 CRT Diode 2009/02/23 Adam_Lai CRT diode forward current is about 1Amp, need to change part to prevent Change D17 from SC1B411D010 ( S DIO RB411DT146 SOT23 ) to SCS00002Y0L Rev02 (X01)
damage. (S SCH DIO BAT1000-7-F SOT23-3)
7 37 Display Port 2009/02/23 Adam_Lai Screen can't output to external monitor with DP under DOS mode Update Q30B Pin3 & Pin4 connection. Rev02 (X01)
(DF276959)
C
8 32 Power share 2009/02/24 Adam_Lai Power share didn't work. Add power share schematic. Rev02 (X01) C
9 5 Clock gen 2009/02/24 Adam_Lai Error connection of CLK_PCIE_WPAN & CLK_PCIE_WPAN# Correct WPAN CLK +/- signal of U1.
10 4 Power Rail 2009/02/25 Bill_Huang Correct error item. Correct +3VS, +5VS Power consumption. Rev02 (X01)
11 10~16 MCH 2009/02/26 Dell Follow Iris's mail on Feb25. Both DIS & UMA use GM45 MCH. 1. Change MCH from P/N: SA00002JJ2L (S IC AC82PM45 SLB97 B3 FCBGA1329 Rev02 (X01)
PM A31!) to SA00002JT3L (S IC AC82GM45 SLB94 B3 FCBGA1329 GM)
2. Change Connect U1 pin 24, 25 (CLK_MCH_DREFCLK) & pin 28, 29 (
MCH_SSCDREFCLK) to MCH pin A38,B38 & E41,F41
3. Change U1 pin 56,57 (CLK_PCIE_VGA) to U28 [Delete CLK_PCIE_WAN signals.]
4. Change U1 pin 16 (27_SEL) from 10K pull down to 10K pull high to +3VS_CK505.
5. Change U4 VCC_AXG power plane from connect to GND to +1.05V_VCCP.
6. Change U4 pin F47 (VCCA_DPLLA) & pin L48 (VCCA_DPLLB) from connect
to GND to +1.05V_VCCP power plane.
2009/03/06 Compal 1. LCD panel need to be turned backlight under this crisis recovery mode. add a gate to OR VGA_PWM and EC_PWM signals Rev02 (X01)
12 35 DPST 2. when FN+ D is pressed during POST, the LCD will perform the LCD
BIST test and boot to PSA directly
B B
Change ICH from P/N: SA00002JH50 (S IC AF82801IBM SLB8Q A3 PBGA Rev02 (X01)
13 19~23 ICH 2009/02/26 Compal Change ICH to consign P/N. 676P ICH9M) to SA00002G12L (S IC AF82801IEM SLB8P A3 PBGA 676P)
14 32 Keyboard 2009/02/26 Compal Follow latest Keyboard pin define, change connector pin define. modify keyboard connector pin definetion to fit keyboard module. Rev02 (X01)
15 20 FFS 2009/02/26 Compal Add FFS function Add FFS parts in page 20 Rev02 (X01)
16 30 JCARD1 2009/02/26 Compal 1. Change JCARD1 pin 1 location to prevent cable twist. Add +5VALW pin count from 2 to 7 pins. Rev02 (X01)
2. Connect contact current rating is only 0.3 Ampere max.
17 Market / Capacitor 2009/03/02 Compal Due to Janpan produce Y5V no more in the fucture. change C133,C138,C144,C152,C163,C251,C255,C281,C425 from SE000009W0L to Rev02 (X01)
SE107475M0L
18 23 ICH 2009/03/06 Compal ICH coneect to ALW power rail have power wastage at S5 mode Add MOSFET control circuit to reduce ICH power wastage at S5 mode. Rev02 (X01)
19 24 LAN 2009/03/06 Compal 1. Prevent B+_BIAS damage Q3 1. Add R1006 (1.5M_0402) Rev02 (X01)
2. Correct +LAN_DVDD12 power name 2. Correct C302 & C303 power source from +LAN_VDD12 to +LAN_DVDD12
3. To pass LAN EMI test. 3. Pop C873 ~ C880 , SE07168AC8L(S CER CAP 6.8P 50V C NPO 0402)
A A
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PWR PIR-1
LA-5151P
5 4 3 2 1
5 4 3 2 1

R equest
O w ner
http://mycomp.su/x/
20 25 Audio codec 2009/03/06 Compal 1. SPK_MUTE# change to controlled by HP1_JD or HP2_JD. 1. Add U108 OR gate. Rev02 (X01)
D 2. Change C336, C337, C349, C350 , C354, C355 from 1U_0603 to 2.2U_0805. D
21 27 WWAN 2009/03/06 Compal To supprot EC TX/RX debug card. Change EC_TX_P80_DATA & EC_RX_P80_CLK connect to JWWAN1 pin 49 & 51 Rev02 (X01)
22 30 E-SATA 2009/03/06 Compal To prevent antenna effect at E-SATA re-driver. Delete R949, R950, R951, R952 0 ohm reserve resistors. Rev02 (X01)
23 32 Powershare 2009/03/06 Compal Add powershare schematic. Rev02 (X01)
24 33 DC/DC 2009/03/06 Compal 1. To fit power budget 1a. Change U21 & U22 from DMN3030LSS-13 to SI4800BDY Rev02 (X01)
1b. Change U25 SI4800BDY to Q45 SI4329DY
25 EMI Compal For EMI concern 1. Reserve 10P_0402 cap for CLK_PCI_EC / PCI_CLK / CLK_48M_ICH / Rev02 (X01)
CLK_14M_ICH / HDA_BITCLK_AUDIO /
2. Reserve 22P_0402 cap for SPI_CLK and place close U19.
3. Reserve U109 spread spectrum circuit for U28 graphic.
26 Thermal Sensor Compal To save EC GPIO pin count. 1. Remove U2 pin 6 (CPU_THERM_ALERT#) connect to EC. Rev02 (X01)
2. Remove U38 pin6 (VGA_THERM_ALERT#) to EC.
C
27 Crystal Compal After fine tune crystal by vendor 1. Change C217, C864 from 12P_0402 to 15P_0402. (Y2) Rev02 (X01) C
2. Change C318 from 27P_0402 to 33P_0402. (Y3)

3. Change C479 & C481 from 15P_0402 to 22P_0402 (Y5)
28 WWAN Compal Due to clock gne lack of SRC output & support WWAN for USB interface Remove CLK singals from clock gen & PCIE signals from ICH. Rev02 (X01)
only.
29 SATA HDD Compal SATA port 0 & Port 1 change. Chagne SATA port 0 connect from JSATA1 to JSATA2. Rev02 (X01)
Chagne SATA port 1 connect from JSATA2 to JSATA1.
30 Screw hole Compal ME drawing change 1. Change H1 from H_2P3 to H_3P1 , H2 from H_2P4 to H_1P6. H5 from H_2P2 to Rev02 (X01)
H_3P0, H24 from H_3P2 to H_3P0.
2. Delete H13
1 32 Digitizer 2009/04/27 Compal Digitizer firmware circuit updare. (Set high=enable, low=disable) 1.JTCH1.3 change net name form GND to VBUS Rev03 (X02)
2. VBUS pull high to +3VS via R1559.
2 36 HDMI 2009/04/27 Compal HDMI EMI issue. L73~L76 parts change to DLW21SN900HQ2L Rev03 (X02)
3 28 Express card 2009/04/27 Compal Express card socket type error, change to normail type, not reverse type. JEXP1 change to TAITW_PXPXAE-000LBS2ZZ4N0_NR part. Rev03 (X02)
B B
4 6 Clock gen 2009/04/27 Compal VGA_CLKREQ# need to pull down Change VGA_CLKREQ# from pull high to +3VS to GND. Rev03 (X02)
5 31 MSEN# 2009/04/27 Compal Support S5 Power on when CRT insert MSEN# change from pull high to +3VS to pull high to +3VALW via R324 Rev03 (X02)
6 31 Sourcer 2009/04/27 Compal Soucer suggest Change C19, C21, C463, C936 fromm 10U_1206_16V4Z to 10U_0805_10V4Z. Rev03 (X02)
7 33 DC / DC 2009/04/30 Compal Voltage divider (7/8 VCC) on 3VS_gate 1. Change R338 to 300K ohm, Change Q50 to SI4392DY. Rev03 (X02)
2. Add R340 2M_0402 connect to GND.
1. Change R338 to 300K ohm, Change Q50 to SI4392DY.
8 33 DC / DC 2009/04/30 Compal Modify +5VALW to +5VS transfer circuit. 2. Add R340 2M_0402 connect to GND. Rev03 (X02)
9 29 DFx 2009/04/30 Compal DFx issue. Update JESA1 footprint to FOX_3Q3813C-RB1C3B-7F_13P-T Rev03 (X02)
10 Audio 2009/04/30 Compal Audio EA result Change C1507, C1508, C1529, C1530 from 270P_0603_50V8J to SE074271K8L Rev03 (X02)
(S CER CAP 270P 50V +-10% X7R 0402)
11 33 Power share 2009/04/30 Compal USB Power share schematic for setting resistors to +3.0V and contact to exchange MSEN# & USB_DET_DELAY# GPIO pin Rev03 (X02)
GPI42, but voltage will drop to 0.5V, change GPIO pin from GPI42 to
GPIO40 or system power ready (+3VALW is ready), Rb voltage will be
pass for +3.0V.
12 20 FFS 2009/05/04 Compal original PIRQH is by USB controller used FFS change int to PIRQ setting from PIRQH to PIRQE Rev03 (X02)
A A
13 41 VGA power 2009/05/04 Compal VGA Power Transient EA test fail Add C1533~C1545 for +CPU_CORE Rev03 (X02)
LA-5151P
5 4 3 2 1
5 4 3 2 1

R equest
O w ner
http://mycomp.su/x/
14 7 39 OTP 2009/05/04 Compal It may unbootable due to OTP sequence error. Modify CPU_THERM_STP & VGA_THERM_STP# circuit. Rev03 (X02)
D D
15 35 LVDS 2009/05/04 Compal Noise band on 850M & 900MHz. Reserve C1546~C1549 5P_0402 for LVDS clock Rev03 (X02)
Reverse ESD diode for Speaker connector. (it need high voltage
16 26 Speak ESD diode 2009/05/04 Compal rating to prevent burning) Reserve D20, D21, change from PACDN042Y34_SOT23 to PESD24VS2UT_SOT23 Rev03 (X02)
17 29 E-SATA conn 2009/05/04 Compal ME change Update JESA1 Footprint to FOX_313813C-RB1C3B-7F Rev03 (X02)
18 32 EMI for Cap sensor 2009/05/04 Compal cap sensor EMI test result Change L76, L77 from BLM18AG121SN1D_0603 to BLM18AG601SN1D_0603 Rev03 (X02)
19 33 Discharge circuit 2009/05/04 Compal double discharge for +3VS (+3V_WLAN) Delete R357, Q18 +3V_WLAN discharge circuit. Rev03 (X02)
20 35 LVDS timing 2009/05/04 Compal to meet LVDS +LCDVDD T1 timing in spec. 1. Change R378 from 1K to 56K Rev03 (X02)
2. Change C549 from 0.047U_0402 to 0.1U_0402.
21 39 EMC for VGA 2009/05/04 Compal Follow EMC team's test result Pop U109 SS circuit on Rev03 (X02)
22 41 VGA Power Transient 2009/05/04 Compal VGA Power Transient EA test fail Follow CRB, more add 13pcs 1U_0402 cap on. Rev03 (X02)
C C
23 25 Audio Codec 2009/05/05 Compal Change EAPD# pull up to +3VALW Change R1549, U46.5. U47.5 connect to +3VALW Rev03 (X02)
24 25 E-SATA 2009/05/05 Compal Change E-SATA output swing control to 1.2X 1.Depop R958, R959, Rev03 (X02)
2. Change R953 from 470 ohm to 390 ohm
25 35 LVDS 2009/05/05 Compal To prevent flash light when AC or Battery in. Add a MOSFET control circuit for LVDS converter power. Rev03 (X02)
26 39 VGA thermal 2009/05/05 Compal Gfx thermal sensor should be ADM1032ARMZ-1(108 degree C) Change U38 from ADM1032ARMZ-2REEL to ADM1032ARMZ-1 Rev03 (X02)
27 23 ICH9M(5/5)_POWER&GND 2009/05/06 COMPAL Modify +3VALW_S5_ICH circuit. R972 form 470Kohm change to 300Kohm. Rev03 (X02)
R973 form 1.5Mohm change to 2M ohm.
28 35 VGA / LVDS 2009/05/06 COMPAL Modify Keyboard back light circuit. R928 form 470Kohm change to 300Kohm.
R931 form 1.5Mohm change to 2M ohm. Rev03 (X02)
1 39 VGA spread spectrum 2009/06/03 COMPAL Schemaitc design mistake Chagne R1558 from SD028220280 (S RES 1/16W 22K +-5% 0402) to
SD028220A80 (S RES 1/16W 22 +-5% 0402) Rev1.0 (A00)
B
2 32 ESD diode 2009/06/03 COMPAL Be use PSL ESD diode. Chagne D48, D49 from SCA00000A00 (S ZEN ROW PJDLC05 3P C/A SOT23) to B
SCA00000J0L (S ZEN ROW PESD5V2S2UT 3P C/A SOT23 ESD) Rev1.0 (A00)
3 26 Cap ship schedule 2009/06/03 COMPAL SE00000NZ0L , current shipping schedule is still very bad, will be ETA in Chagne C901, C902, C903, C916, C918, C977 from SE00000NZ0L (S CER CAP
July 22U 25V K X7R 1210 H2.5) to SE00000GF8L (S CER CAP 22U 25V K X5R 1210 Rev1.0 (A00)
H2.5)
1. Change R901,R902,R906,R907 from 280K_0402 to 182K_0402 Rev1.0 (A00)

2. Change R900 & R905 from 43.2K_0402 to 11K_0402
4 26 Gain setting 2009/06/03 COMPAL gain setting, Is Sat: 13dB, (Sub:20dB)the final suggestion from JBL 3. Change R904 & R909 from 16.9K_0402 to 17.8K_0402
4. Change R903 & R908 from 25.5K_0402 to 16.5K_0402
5. Change C908 & C912 from 0.22U_0402_106K to 0.1U_0402_10V6K.
5 29 E-SATA re-driver 2009/06/03 COMPAL E-SATA connector not support detect pin. Depop Q48 for E-SATA re-driver power saving. Rev1.0 (A00)
6 25 TV turner 2009/06/03 COMPAL in order to pass AVerMedia TV turner S2a testing Change C343, C344, C356, C357 from 100P_0402_50V8J to 1000P_0402_50V7K
Rev1.0 (A00)
1. They are P2P part with exactly same setting and function
7 29 E-SATA re-driver 2009/06/03 COMPAL 2. PI2EQX3201BLZFE remove some redundant circuit in PI2EQX3201BLZFE 1. Chagne U40 from SA00002D80L (S IC PI2EQX3201BZFEX TQFN 36P) to
SA00002YQ0L (S IC PI2EQX3201BLZFEX TQFN 36P) Rev1.0 (A00)
A that will not be used in NB application A
3. The OOB signal margin of PI2EQX3201BLZFE is little bit higher than 2. Depop R969, R970
PI2EQX3201BZFE against different kinds of HD and design
4. 3201B and 3201BL) are qualified on Dell commercial model (Roush,
Roush-refresh) in Compal, and now Roush-refresh project already made DELL CONFIDENTIAL/PROPRIETARY
transition to 3201BL. Compal Electronics, Inc.
LA-5151P
5 4 3 2 1
5 4 3 2 1

R equest
O w ner
http://mycomp.su/x/
8 0 ohm resisotrs 2009/06/08 Compal Schematic confirm ready, save 0 ohm resistors and then short the signals "short parts of Rev10 (A00)
D directly. 1.(Page06)R2, R3, R4, R5, R6, R7 ,R8 ,R9 ,R10 ,R11 ,R12 ,R42 ,R43 ,R16 ,R17 D
,R18, R19, R21, R23, R26, R28, R31, R33, R35, R37, R39, R40, R14, R15,
2. (Page11) R99, R94,
3. (Page17) R134,
4. (Page18) R137,
5. (Page21) R203, R220
6. (Page20) R1004
6. (Page24) R884,R235,R942,
7. (Page25) R247, R248
8. (Page27) R285, R911, R912, R913, R914, R1010, R1011, , R919, R920, R915,
R916, R917, R922, R923, R924, R925, R291, R918, R921,
9. (Page28) R294, R298, R295, R296, R292, R293,
10. (Page30) R297, R299,
11. (Page32) R1559,
12. (Page35) R374, R375
13, (Page36) R401
14. (Page37) R411, R412, R418
9 25 Beep sound 2009/06/08 Compal To support unboot beep sound, need add back EAPD# pull high resistor. Pop R1549. Rev10 (A00)
C C
10 26 po sound noise 2009/06/08 Compal to reduce po sound noise of speaker. Add D51, R1567, and C1553 circuit. Rev10 (A00)
11 39 VGA thermal sensor 2009/06/08 Compal Both ADM1032ARMZ-1 to ADM1032ARMZ-2REEL could work between 0~120 Change U38 back from ADM1032ARMZ-1 to ADM1032ARMZ-2REEL Rev10 (A00)
degree C, the only difference is the default THERM# temperature. (
ADM1032ARMZ-1 default 108 degree, ADM1032ARMZ-2REEL default 85) ,
but Poitier has programming the thermal table.
12 41 VGA power transient 2009/06/10 Compal M96 VGA Power Transient over -8% spec. 1. Add C1554, C1555, C1556 47U_0805 caps. Rev10 (A00)
2. Modify C719, C720 fiom 10U_0805 to 47U_0805
3. Delete C1543, C1534, C694, C693, C692, C679, C680, C682 1u_0402 caps.
B B
A A
LA-5151P
5 4 3 2 1

Compal LA-5151P KAT00 Discrete VGA POITIER Montevina M96-M92 Dell Studio 1745 PDF

Hochgeladen von

Dokumentinformationen

Originaltitel

Copyright

Verfügbare Formate

Dieses Dokument teilen

Dokument teilen oder einbetten

Freigabeoptionen

Stufen Sie dieses Dokument als nützlich ein?

Sind diese Inhalte unangemessen?

Copyright:

Verfügbare Formate

Compal LA-5151P KAT00 Discrete VGA POITIER Montevina M96-M92 Dell Studio 1745 PDF

Hochgeladen von

Copyright:

Verfügbare Formate

A B C D E

Model Name: KAT00 DIS

BOM P/N: 43169531L01 (M92)

POITIER Montevina M96/M92

Block Diagram Clock Generator

Mini Card 3 Mini Card 2 Mini Card 1 92HD73C MAX9736A

Power Sequence ME & LED CHARGER 3V/5V

power +5VS : means Digital Ground

USB Port Device SATA Port Device PCIE Port Device

1 Reader/BD 1 JSATA2 2 JWLAN1

RUNON USB_EN# EN_EOL# SUSP SUSP SUSP#

SI4800BDY TPS2062ADR SI3456BDY FBM-11-160808-601-T SI4392DY RT9025

10 SMBUS Address Read D3 (H)

77 EC_SMB_CK1 100 ohm 7

I2C / SMBUS ADDRESSING

DEVICE HEX ADDRESS

Compal Electronics, Inc.

13 39 R_CLK_PCIE_WLAN R18 1 @ 2 0_0402_5% GLAN_CLKREQ# R30 1 2 10K_0402_5%

CLKSEL2 CLKSEL1 CLKSEL0 MHz MHz MHz MHz MHz MHz

XDP / ITP +1.05V_VCCP

XDP_TRST# R59 1 2 54.9_0402_1% XDP_TDI R57 1 2 51_0402_1%

XDP_TCK R60 1 2 54.9_0402_1% XDP_TMS R58 1 2 54.9_0402_1%

This shall place near CPU

H_A#22 Y5 AC4 R64 10K_0402_5%

B RSVD[01] C19 +5VS B

For 8 layer condition.

within 500mils. Zo = 55 ohm is 20/7/25. Zo = 27.4 ohm.

+V_CPU_GTLREF 667 166 0 1 1

800 200 0 1 0 VSSSENSE

High Frequence Decoupling

Trace width and spacing is 10 / 20 G2 H_D#_4 H_A#_8 M16

H_D#29 H_D#_28 H_A#_32 H_A#33

H_D#45 AD11 H9 H_HIT# H_HIT# 7

1 H_D#54 AD7 L3 H_DINV#1 H_DINV#1 8

H_D#59 H_D#_58 H_DSTBN#_0 H_DSTBN#1

P/N : SA00002JT3L (S IC AC82GM45 SLB94 B3 FCBGA1329 GM )

M36 AP24 M_CLK_DDR0

DDR CLK/ CONTROL/

iTPM Host Low = iTPM enable

BF46 M28 R98

R99 2 @ 1 0_0402_5% PM_PWROK_R BH6 H36 MCH_ICH_SYNC#

H24 N38 PCIE_MTX_GRX_N6 PCIE_MTX_GRX_P11 C99 1 2 0.1U_0402_10V7K~D PCIE_MTX_C_GRX_P11

J28 M43 PCIE_MTX_GRX_P4

DDR_A_D27 SA_DQ_26 SA_DQS_3 DDR_A_DQS4 DDR_B_D26 SB_DQ_25 SB_DQS_0 DDR_B_DQS1

AU13 SA_DQ_36 SA_DQS#_3 BD37 BG8 SB_DQ_35 SB_DQS#_0 AL46

DDR_A_D46 AY8 BG24 DDR_A_MA2 DDR_B_D45 BF5 AV17 DDR_B_MA0

1067M 4140mA VCC_AXG_NTCF_1 W28

AB25 VCC_AXG_3 VCC_AXG_NCTF_55 AB16 VCC_NCTF_12 U32

AC24 VCC_AXG_6 VCC_AXG_NCTF_58 W16 VCC_NCTF_15 AK30

Place close to U4.F47

AU48 AM36 BG21 AH8

DDR_A_D2 VSS5 VSS6 DDR_A_D6

DDR_A_D10 VSS11 VSS12 DDR_A_D14

Compal Electronics, Inc.

+RTCVCC 1 2 ICH_INTVRMEN B22 INTVRMEN LDRQ0# J3 T59

29 SATA_IRX_DTX_N1 AH13 SATA1RXN SATARBIAS# AJ7

P/N : SA00002G12L (S IC AF82801IEM SLB8P A3 PBGA676P ICH9ME )

1 1 Set PCIE port config bit 1 2

R178 1 2 8.2K_0402_5% PCI_PIRQC# ACCEL_INT# H4

Free Fall Sensor +3VALW

12 SDO A16 swap override Strap

Must be placed in the center of the system. PCI_GNT3# @ R186 1 2 1K_0402_5%

6,17,18,20 ICH_SM_DA 1 6 ICH_SMBDATA