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754
PAGE TITLE
D 01 Block Diagram D

02 ASUS ECN CONTROL VRM


03 CHANGE HISTORY
AMD K8 PROCESSOR 2 DIMMs DDR 400
SOCKET 754
04 CLOCK DISTRIBUTION
05 RESET MAP
06 POWER FLOW
07 POWER SEQUENCE CAD Note:
08 CLOCK GENERATOR Default component footprint is
SMD 0603 type. Difference
09 AMD K8 754-1 OF 3 HT footprint show on schematics.
10 AMD K8 754-2 OF 3
11 AMD K8 754-3 OF 3 NI = Not Installed Part
12 RS480 - HT / PCI-E TVOUT
13 RS480 - MEM / CRT / CLK / PM
14 RS480 - POWER
15 DDR1&2
DDR - TERMINATION
C C
16 VGA CONN ATI
17 VGA PORT RS482 100/133/200 MHz
18 PCI EXPRESS X16
CLOCK
33MHz
19 SB400 - PCI / CPU / PCI-E PCI Express
ICS951412
20 SB400 - SATA / IDE X16 SLOT 14.318MHz
21 SB400 - ACPI / AC97 / USB
22 SB400 - STRAPS 48MHz
23 PCI SLOT 1 /2
24 PCI SLOT 3 PCI EXPRESS
25 IEEE 1394 / VT6307 Gigabit NIC
26 Realtek LOM
27 IDE / SATA CONNECTOR
28 USB 2.0 Connector High-Speed USB 480Mb/s
29 AC'97 AUDIO - ALC658E 8 ports IDE BUS
PRIMARY IDE SECONDARY IDE
B 30 SIO A8000
ATI B
SB400
KEYBOARD & MOUSE CONNECTOR
Serial ATA
31 ALC658 AC'97 AC'97 LINK
Serial ATA
SERIAL / PARALLEL PORT / FLOPPY
IDE BUS
32 CODEC
33 FLASH ROM / THERMTRIP
34 FRONT PANEL / BUZZER
35 POWER SEQUENCE CONTROL/ATX PWR
36 LAN 1394
FAN / EMI CAPS REALTEK VIA VT6307
LPC BUS
37
VCORE CONTROL 8101L
38
VCORE DRIVER
39
DUAL/SB&THERMAL TRIP PCI SLOT1 A8000
LPC
40
+1.2V/+1.2VA
4MB
PCI LPC 32 PLCC
BUS I/O
PCI SLOT2

A
PCI SLOT3 A

LPTx/COMx Keyboard/Mouse
Floppy MISC HEADER
Title : BLOCK DIAGRAM
ASUSTeK COMPUTER INC Engineer: Mario Zeng
Size Project Name Rev
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 1 of 40
5 4 3 2
2004 1
5 4 3 2 1

ASUS ECN Control Table

D ECN Document Number DATE Schematics BOM Part PCBA PCB D

Revision Number Revision Revision

C C

B B

A A

Title : ECN CONTROL


ASUSTeK COMPUTER INC Engineer: Mario Zeng
Size Project Name Rev
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 2 of 40
5 4 3 2 2004 1
5 4 3 2 1

Schematics Change History


Version Date / Author Comments

D D

C C

B B

A A

Title : CHANGE HISTORY


ASUSTeK COMPUTER INC Engineer: Mario Zeng
Size Project Name Rev
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 3 of 40
5 4 3 2 2004 1
5 4 3 2 1

D D

DIMM3 DIMM4
PCI CLKFB

PCI CLK
DIMM1 DIMM2
33MHZ

PCI CLK0
PCI SLOT1
33MHZ

PCI CLK1
PCI SLOT2
33MHZ

HTREFCLK PCI CLK2


PCI SLOT3
66MHZ 33MHZ
ATI NB - RS480 ATI SB
C
ATHLON64 FX CPU 1 PAIR CPU CLK NB-OSC PCI CLK6 C
PCI SLOT4
200MHZ 14.318MHZ 33MHZ
LGA754 PACKAGE SB400
PCI CLK7
PCI SLOT5
33MHZ
NB PCIE CLK
100MHZ PCI CLK5
SB PCIE CLK LPC BIOS
33MHZ
100MHZ
SB-OSCIN SB-OSCIN
EXTERNAL PCI CLK4 24.576MHZ CRYSTAL INPUT
14.318MHZ 14.318MHZ IEEE 1394 - V6307
CLK GEN. 33MHZ
PCIE CLK
100MHZ PCIE GFX SLOT - 16 LANES PCI CLK8 25MHZ CRYSTAL INPUT
Onboard LAN
33MHZ
REALTEK 8101L
PCI CLK ETHERNET 25MHZ CRYSTAL INPUT
33MHZ Realtek 8101L
PCI CLK3 KB_CLK
A8000 KEYBOARD
33MHZ
B SIO_CLK LPC MS_CLK B

14.318MHZ I/O MOUSE


RTC_CLK
PCIE CLK 32.768KHZ
100MHZ
USB CLK
AC97_BITCLK 14.318MHZ OSC INPUT
48MHZ AC97 CODEC

14.31818MHz

A A

Title :CLOCK DISTRIBUTION


ASUSTeK COMPUTER INC Engineer: Mario Zeng
Size Project Name Rev
A3 K8AE-LA 1.00

Date: 星 期 三 , 十 二 月 29, Sheet 4 of 40


5 4 3 2 2004 1
5 4 3 2 1

K8 754
PROCESSOR

D D

SM_ALL_POW ERGOOD
+VCORE
REGULATOR RESET_CPU_L

RS480

C PCI-E_RST# C

RS480_RST#
NB_PWRGD(8) PCI-E 16X SLOT
ASIC8M_CPU_PWRGD(7)

ATX_PWRGD(4) LDT_RST# (12)


PCI SLOT 1
ASIC8M_CPU_PWRGD(7)
8282
SB_CPUPWRG (12) NB_RST#(11)
PCI SLOT 2
PCI SLOT 3
SB_PSON#(2) SLP_S3#(1) PCIRST#(13)
PCI SLOT 4
SB400
NB_PWRGD(8) Delsy SB_PWRGD(9)
PCI SLOT 5
100ms
B B

AC_RST# AC97
ALC658

1394_RST# 1394
VT6307

LAN_RST# LOM
RTL8101L
A8000 LPC SIO

A A

ATX_PSON#(3) LPC_RST# LPC


ROM
POWER Title :RESET MAP
SUPPLY ASUSTeK COMPUTER INC Engineer: Mario Zeng
Size Project Name Rev
ATX_PWRGD(4) IDE_RST# K8AE-LA
IDE A3 1.00
Date: 星 期 三 , 十 二 月 29, 2004 Sheet 5 of 40

5 4 3 2 1
5 4 3 2 1

VDDA_2.5_RUN (S0, S1) ATHLON64 CPU


VDDA 2.5V 0.1A
CPU
ATX P/S WITH 1A STBY CURRENT PW VRM SW VDD_CPUCORE_RUN (S0, S1) VDDCORE
REGULATOR 0.8-1.55V
5VSB 5V 3.3V 12V -12V 12V VTT_DDR_SUS (S0,S1,S3)
+/-5% +/-5% +/-5% +/-5% +/-5% +/-5% 80ADDR400 MEM
VDD_2.5_SUS(S0,S1,S3)
I/F VTT 0.125A,
VDDA_1V2 (S0, S1)
VDD
VLDT 1.2V 0.5A3A NB RS480M
2.5V SHUNT VDDA_2.5_RUN
REGULATOR VDDHT 1.2V 0.5A
D (S0, S1) VCC_NB (S0, S1) D
VCC 1.2V SW PCI-E CORE
REGULATOR &VCO 2.25A
2.5V SHUNT VDD_2.5_RUN NB CORE VDDC
REGULATOR
(S0, S1) 1.0-1.2V 5A
2.5V LINEAR AVDD(S0, S1)
DAC 200mA LVDS
REGULATOR 1.8V 300mA
PLL & DAC-Q 0.1A
+1.8V(S0, S1) LVDDR18
1.8V SW PCI-E I/O 750mA
REGULATOR VDDA18
LVDS 1.8V 100mA SIDE PORT
DUAL REGULATOR SIDE PORT MEM I/F 2A GDDR
DDR400 DIMMs MEMORY
2.5V VDD SW 1.25V VTT_DDR VTT_DDR_SUS (S0,S1,S3)
REGULATOR REGULATOR
VDDQ_GDDR 1A
VTT_DDR 2A +2.5VDUAL_SPMEM(S0,S1,S3)
VDD_2.5_SUS(S0,S1,S3) VDD_GDDR MEM 1.5A
VDD MEM 12A
+3.3VSB (S0, S1, S3, S4, S5) SB SB400
+3.3V_DUAL (S0, S1, S3, S4, S5) X4 PCI-E 0.8A
+3.3VSB REGULATOR ATA I/O 0.2A
C ACPI CONTROLLER
+5V_DUAL (S0, S1, S3, S4, S5) C

+5V_DUAL1 (S0, S1, S3, S4, S5) ATA PLL 0.01A


PCI-E PVDD 80mA

+5VDUAL_MEM (S0, S1, S3, S4, S5) SB CORE 0.6A


1.8V STB LDO +1.8VSB (S0, S1, S3, S4, S5) 1.8V S5 PW 0.22A
REGULATOR
3.3V S5 PW 0.01A
USB CORE I/O 0.2A
+3.3V (S0, S1) 3.3V I/O 0.45A

AC97 CODEC
3.3V CORE 0.3A
5VAA LDO 5V ANALOG 0.1A
REGULATOR
+5VAA (S0, S1,S3)

SUPER I/O

B
+5V SD 0.01A B

+5V 0.1A

ENTHERNET

3.3V 0.5A (S0, S1)


3.3V 0.1A (S3)

PCI Slot (per slot) X16 PCIE IEEE 1394 USB X4 FR USB X4 RL 2XPS/2

5V 5.0A 3.3V 3.0A 3.3V 0.3A (S0, S1) VDD VDD 5VDual
3.3V 7.6A 5VDual 5VDual DESIGN NOTICE
12V 5.5A 1.0A
12V 0.5A 2.0A 2.0A
THESE SCHEMATICS ARE THESE SCHEMATICS CONTAIN
A 3.3Vaux 0.375A SUBJECT TO MODIFICATION INFORMATION WHICH IS PROPRIETARY A
AND DESIGN IMPROVEMENTS. TO AND IS THE PROPERTY OF ATI, AND
-12V 0.1A PLEASE CONTACT ATI FIELD MAY NOT BE USED, REPRODUCED OR
APPLICATION ENGINEERS DISCLOSED IN ANY MANNER WITHOUT
PERMISSION

+3.3VDUAL (S0, S1, S3) Title :POWER FLOW


ASUSTeK COMPUTER INC Engineer: Mario Zeng
Size Project Name Rev
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 6 of 40
5 4 3 2 2004 1
5 4 3 2 1

RS480 POWER SEQUENCE

SB400 POWER SEQUENCE VDDR3 / AVDD >


3.3V
VDD_18 > VDD_HT / VDDA12 > VDDCORE
VDDMEM >
2.5V_DUAL +1.8V +1.2V +VDD_NB
S4 / S5 S0
D Wake Event
VDDR3 3.3V IO POWER 3.3V D
>200ns VDDMEM IO POWER FOR DDR MEMORY INTERFACE 2.5V
SLP_S3# / S LP_S5# VDD_18 +1.8V 1.8V
VDD_HT IO POWER FOR HT INTERFACE 1.2V
S5_3.3V
VDDA12 IO POWER FOR PCI-E INTERFACE 1.2V
VDDCO ORM POWER 1.2V

S5_1.8V SB400 GPIO TABLE


>20ms POWER Default Default Wake
GPIO TYPE DOMAIN Value Function SMI Event
RSM_RST# GPIO 0 I/OD S0 Input GPIO 0
GPIO 1 I/O S0 Input GPIO 1
GPIO 2 I/O S0 Input GPIO 2
+5Vref(+5V)
GPIO 3 I/O S0 Input GPIO 3
GPIO 4 I/O S0 Tri-state GPIO 4
VDDQ(3.3V) GPIO 5 I/O S0 Tri-state GPIO 5
C C
GPIO 6 I/OD S0 Tri-state GPIO 6
GPIO 7 I/O S0 Tri-state GPIO 7
1.8V Tri-state
GPIO 8 I/O S0 Tri-state GPIO 8
GPIO 9 I/O S0 Tri-state GPIO 9
GPIO 10 I/O S5 O Tri-state GPIO 10
CPU POWER
Tri-state
GPIO 11 I/O S0 High GPIO 11
GPIO 12 I/O S0 High GPIO 12
NB_CORE VOLTAG E(1.2V)
>15ms GPIO 13 I/O S0 Tri-state GPIO 13
GPIO 14 I/O S0 Tri-state GPIO 14
NB PWR GOOD GPIO 31 I/O S0 Tri-state GPIO 31
33-500ms
GPIO 32 I/O S0 Tri-state GPIO 32
GPIO 33 I/O S0 Tri-state GPIO 33
SB PWR GOOD
>49ms GPIO 34 I/O S0 GPIO 34
GPIO 35 I/O S0 GPIO 35
B B
LDT PWR GOOD GPIO 36 I/O S0 Tri-state GPIO 36
<80ns GPM 0 I S5 O Tri-state GPM 0 V V
GPM 1 I S5 O Tri-state GPM 1 V V
ALINK RST# V
GPM 2 I/O S5 O Tri-state GPM 2 V
>20ms V
GPM 3 I S5 O Tri-state GPM 3 V
LDT RST# GPM 4 I S5 O Tri-state GPM 4 V V
>0 V
GPM 5 I S5 O Tri-state GPM 5 V
KB RST# >51ms GPM 6 I/OD S5 O Tri-state GPM 6 V V
GPM 7 I S5 O Tri-state GPM 7 V V
PCI RST# GEVENT 0 I S5 V
I V
>1ms GEVENT 1 S0
GEVENT 2 I S5 GEVENT 2 V V
PCICLKF V
GEVENT 3 I S5 V
>5ms V V
GEVENT 4 I S5
I V V
A PCI CLOCK[0:7] GEVENT 5 S5 A

I V V
GEVENT 6 S5 GEVENT 6
GEVENT 7 I S5 GEVENT 7 V V
LDT STOP#
Title :POWER SEQUENCE
ASUSTeK COMPUTER INC Engineer: Mario Zeng
Size Project Name Rev
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 7 of 40
5 4 3 2 2004 1
5 4 3 2 1

+3V_DUAL L33 NI
Do Not Stuff 1.02 Modify
Irat=600mA for PD mode
1 2

CB485
Do Not Stuff +CLKVCC3
NI
L1
1 2
GND L2 +CLKVCC3
+3V 120Ohm/100Mhz U1 CB1 CB2 120Ohm/100Mhz
Irat=600mA 0.1UF Irat=600mA
Do Not Stuff
D 1 2 43 39 CLK_VDDA c0402 NI D
VDDCPU VDDA
14 38
CB3 CB4 CB5 CB6 CB7 CB8 VDDSRC3 GNDA
21
0.1UF 10uF 0.1UF 0.1UF 0.1UF 0.1UF 32 VDDSRC2
c0402 c0805 c0402 c0402 c0402 c0402 VDDSRC1 RCPUHCLK
35 45 R1 15Ohm
1 GND
VDDSRC0 CPUCLK8T0 RCPUHCLK# CPUCLK {10}
51 44 2
VDDPCI CPUCLK8C0 CPUCLK#
3 41 R2 1 2 15Ohm {10}
VDD48 CPUCLK8T1
GND GND 48 40
VDDHTT CPUCLK8C1
GND 56
VDDREF

CB9 CB10 CB11 CB12


0.1UF 0.1UF 0.1UF 0.1UF
c0402 c0402 c0402 c0402 5
GND1
55
GND2
36 12
close to pin3 GNDSRC0 SRCCLKT7
31 13
GNDSRC1 SRCCLKC7
GND 26 16
GNDSRC2 SRCCLKT6
20 17
GNDSRC3 SRCCLKC6
15 18
CB13 CB14 GNDSRC4 SRCCLKT5
49 19
0.1UF Do Not GNDPCI SRCCLKC5
46 22
Stuff
NI c0402 GNDHTT SRCCLKT4
42 23
GNDCPU SRCCLKC4 RSBSRCCLK R6 33
24 1 2
SRCCLKT3 RSBSRCCLK# SBSRCCLK
25 R7 1 2 33 {19}
SRCCLKC3 SBSRCCLK# {19}
27 RCK_100M_PE16 R8 1 2 33
SRCCLKT2 CK_100M_PE16 {18}
GND GND 28 RCK_100M_PE16#R9 1 2 33
SRCCLKC2 CK_100M_PE16# {18}
30 RNBSRCCLK R10 1 2 33
C SRCCLKT1 NBSRCCLK {13} C
29 RNBSRCCLK# R11 1 2 33
SRCCLKC1 NBSRCCLK# {13}
14.31818MHZ CK14M_XTALIN 1 34 RSBLINKCLK R12 1 2 33
X1 SRCCLKT0 SBLINKCLK {13}
CK14M_XTALOUT 2 33 RSBLINKCLK# R13 1 2 33
X1 X2 SRCCLKC0 SBLINKCLK# {13}
1 2 6
{21} CLOCK_PD NC
GND
3 R16 R17 R18 R19 R20 R21 R22 R23
C1 C2 49.9 49.9 49.9 49.9 49.9 49.9 49.9 49.9
CAP 33PF/50V (0603) NPO 33P 33P CAP 33PF/50V (0603) NPO 1.02 Modify. 1% 1% 1% 1% 1% 1% 1% 1%

GND
GND GND GND GND GND GND
SMBCLK 7 50 GND GND
{15,18,21,23,24,30} SMBCLK SCLK PCICLK0
SMBDAT A 8
{15,18,21,23,24,30} SMBDAT A SDATA
54 R24 1 2 33
FS0/REF0 FS1 SIO_14M NB_14M {13}
53 R25 1 2 33
CODEC_14M FS1/REF1 FS2 SIO_14M {30}
R26 1 2 33 9
{29} CODEC_14M OSC_14M R14M FS2
R27 1 2 33 52
{21} OSC_14M REF2
IREF 37 4 RUSBCLK R28 1 2 33 USBCLK
IREF USB_48M RHTREFCLK USBCLK {21}
47 R29 1 2 33 1 2
HTTCLK0 HTREFCLK {13}
R404
R30 22Ohm
475
1%
11 R31
B CLKREQ4# 49.9 B
10 CLKREQ3# 1%
GND NB_14M CB15 1 Do Not
Stuff c0402
NI
JP15 JP14 GND SIO_14M CB16 1 Do Not
Do Not Stuff ICS951412
Do Not Stuff 2 Stuff c0402
NI NI NI
USBCLK 1 Do Not
Output enable for PCI -Express (SRC) outputs. Stuff c0402
CB17
0 = enabled, 1 = tri-stated 2 NI
+CLKVCC3 OSC_14M 1 Do Not
GND Stuff c0402
NI
FS0 R34 1 2 CODEC_14M CB19 1 Do Not
CLOCK SEL. TABLE FS1 10KOhm Stuff c0402
FS2 R35 1 2 NI
10KOhm
R37 1 2 Do Not SMBCLK CB20 1 Do Not
FS_2 FS_1 FS_0 CPU CLK HTT PCI Stuff c0402
StuffN I
0 0 0 Hi-Z Hi-Z Hi-Z R39 1 2 Do Not NI
SMBDATA CB21 1 Do Not
0 0 1 X X / 3 X / 6 Follow AMD Request Stuff c0402
NI
0 1 0 180 60 30 Doc No.--> 27320 GND
GND
0 1 1 220 36 73
1 0 0 100 66 33
A A
1 0 1 133 66 33
1 1 1 200 66 33

Title : CLK ICS951412


ASUSTeK COMPUTER INC Engineer: Mario Zeng
Size Project Name Rev
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 8 of 40
5 4 3 2 2004 1
+2.5V_DUAL
5 4
R 54 1 2 820Ohm N21997123
N21997223
3 2 +2.5V 1
T1 PU_C18 3
Do Not Stuff PU_A19 680Ohm 4 RN40B
5
NI PD_SCAN1 1 680Ohm 6 RN40C
GND
680Ohm 2 RN40A
PD_AG17 2
680Ohm 1
CPU1A PD_SCAN2 1
MEM_DATA[0..63] {15,16} 680Ohm 2
SOCKET754P PD_AJ18 R99 1 2 680Ohm PD_SCAN3 7 RN17A 8 RN17D
680Ohm
PD_SCAN4 5
PD_AG18 R88 1 NI 2 Do Not PD_SCAN5 3 680Ohm 6 RN17C
PD_AH18 R94 1 NI Stuff 680Ohm 4 RN17B
ANALOG3 R100 NI 1 Do Not
ANALOG2 2 Stuff

D T7 ANALOG0
Do
ANALOG1 R104
R111
2
NI
NI
Stuff
1 Do Not
Do Not Stuff
GND
D
D22 1 NI 2 1
NC_D22
D3
NC_D3
E13
NC_E13 GND
E14
NC_E14 1 +2.5V_DUAL
F3
NC_F3
J3
MEM_DATA0 MD0 NC_J3 34.8Ohm R40
7 8 AJ16 K1
MEM_DATA1 10Ohm MD1 MEMDATA[0] NC_K1 1% 34.8Ohm
1 AJ14 R2
MEM_DAT A10 RN41D MD10 MEMDATA[1] NC_R2
5 AH5 R3 1%
MEM_DAT A11 MEMDATA[10] NC_R3
1 10Ohm 2 RN41A MD11 AG5 5/10 routing GND R42 CB47
MEMDATA[11]
MEM_DAT A12 5 10Ohm 6 MD12 AH9 C14 150 0.1UF
MEM_DAT A13 RN44C MD13 MEMDATA[12] MEMZP MEMZP
1 AJ7 D14 1% c0402
MEMDATA[13] MEMZN MEMZN
MEM_DAT A14 7 10Ohm 2 RN44A MD14 AJ6 15/20 routing
MEMDATA[14]
MEM_DAT A15 3 10Ohm 6 MD15 AJ5 AG12 +VREF_DDR_CPU
MEM_DAT A16 RN43C MD16 MEMDATA[15] MEMVREF1
3 AJ3 T6 Do Not Stuff
MEMDATA[16]
MEM_DAT A17 5 10Ohm 2 RN43A MD17 AH3 AG10 1
MEMDATA[17] MEMRESET_L
MEM_DAT A18 7 10Ohm 8 MD18 AF1 NI CB50 CB51 R43 CB48
MEM_DAT A19 RN44D MD19 MEMDATA[18]
1
10Ohm 2 RN48A AE2
MEMDATA[19] MEMBANKB[1]
L5 MEM_B_BA1 {15,16}
0.1U 1000P 150 0.1UF
MEM_DATA2 7 MD2 AJ12 J5 X7R 10% 1% c0402
MEM_DAT A20 10Ohm 8RN49D MD20 MEMDATA[2] MEMBANKB[0] MEM_B_BA0 {15,16}
7
10Ohm 8 AJ4 K3 MEM_A_BA1 {15,16}
MEM_DAT A21 MD21 MEMDATA[20] MEMBANKA[1]
1 AG3 H3
MEM_DAT A22 10Ohm 2RN48C MD22 MEMDATA[21] MEMBANKA[0] MEM_A_BA0 {15,16}
5 10Ohm 6 AE3 MEM_B_ADD[0..13] {15,16}
MEM_DAT A23 MD23 MEMDATA[22] MEM_B_ADD9
3 10Ohm 4RN48B AE1
MEMDATA[23] MEMADDB[9]
AD5
MEM_DAT A24 7 MD24 AD1 AC5 MEM_B_ADD8 GND
MEM_DAT A25 1 10Ohm 8 MD25 AC2
MEMDATA[24] MEMADDB[8]
AD4 MEM_B_ADD7
RN47D MEMDATA[25] MEMADDB[7]
MEM_DAT A26 5 MD26 Y1 AA5 MEM_B_ADD6
MEM_DAT A27 10Ohm 2 RN47A MD27 MEMDATA[26] MEMADDB[6] MEM_B_ADD5
3 W2 AB3
MEM_DAT A28 10Ohm 6 MD28 MEMDATA[27] MEMADDB[5] MEM_B_ADD4
C MEM_DAT A29
MEM_DATA3
5
3
RN46C
10Ohm 4RN42A
RN46B
MD29
MD3
AC3
AC1
AG11
MEMDATA[28]
MEMDATA[29]
MEMADDB[4]
MEMADDB[3]
Y4
W5
U5
MEM_B_ADD3
MEM_B_ADD2
C
1 MEMDATA[3] MEMADDB[2]
MEM_DAT A30 RN46D MD30 W3 E9 MEM_B_ADD13
MEM_DAT A31 2
1 MD31 MEMDATA[30] MEMADDB[13] MEM_B_ADD12
1 W1 AF6
MEM_DAT A32 10Ohm 2 RN46A MD32 MEMDATA[31] MEMADDB[12] MEM_B_ADD11
7 M1 AF4
MEM_DAT A33 10Ohm 8 RN45D MD33 MEMDATA[32] MEMADDB[11] MEM_B_ADD10
3 L2 M4
MEM_DAT A34 7 10Ohm 4 RN45B MD34 J2
MEMDATA[33] MEMADDB[10]
T4 MEM_B_ADD1
MEM_DAT A35 10Ohm 8 RN50D MD35 MEMDATA[34] MEMADDB[1] MEM_B_ADD0
1 G3 M3
MEM_DAT A36 5 10Ohm 2 RN50A MD36 L1
MEMDATA[35] MEMADDB[0]
MEM_DAT A37 10Ohm 6 RN45C MD37 MEMDATA[36] MEM_A_ADD0 MEM_A_ADD[0..13] {15,16}
1 L3 N5
MEM_DAT A38 5 10Ohm 2 RN45A MD38 G1
MEMDATA[37] MEMADDA[0]
T3 MEM_A_ADD1
MEM_DAT A39 10Ohm 6 RN50C MD39 MEMDATA[38] MEMADDA[1] MEM_A_ADD10
3 G2 M5
MEM_DATA4 5 10Ohm 4 RN50B MD4 AJ15
MEMDATA[39] MEMADDA[10]
AF3 MEM_A_ADD11
MEM_DAT A40 10Ohm 6 RN41C MD40
MEMDATA[4] MEMADDA[11]
MEM_A_ADD12
7 F1 MEMDATA[40] AE6
MEM_DAT A41 1 10Ohm 8 RN51D MD41 E3
MEMADDA[12]
E10 MEM_A_ADD13
MEM_DAT A42 10Ohm 2 RN51A MD42
MEMDATA[41] MEMADDA[13]
MEM_A_ADD2
7 B3 MEMDATA[42] T5
MEM_DAT A43 5 10Ohm 8 RN52D MD43 A3
MEMADDA[2]
V5 MEM_A_ADD3
10Ohm 6 RN52C MEMDATA[43] MEMADDA[3]
MEM_DAT A44 3 MD44 E1 Y3 MEM_A_ADD4
10Ohm 4 RN51B MEMDATA[44] MEMADDA[4]
MEM_DAT A45 5 MD45 E2 AB4 MEM_A_ADD5
10Ohm 6 RN51C MEMDATA[45] MEMADDA[5]
MEM_DAT A46 3 MD46 A4 Y5 MEM_A_ADD6
10Ohm 4 RN52B MEMDATA[46] MEMADDA[6]
MEM_DAT A47 1 MD47 C5 MEMDATA[47] AD3 MEM_A_ADD7
MEM_DAT A48 10Ohm 2 RN52A MD48
MEMADDA[7]
MEM_A_ADD8
5 B5 MEMDATA[48] MEMADDA[8] AB5
MEM_DAT A49 7 10Ohm 6 MD49 A5 AE5 MEM_A_ADD9
RN53C MEMDATA[49] MEMADDA[9]
MEM_DATA5 3 MD5 AH15
MEM_DAT A50 10Ohm 8 MD50 MEMDATA[5]
5 RN53D 6 RN54C
10Ohm A9
MEMDATA[50] MEMWEB_L
F4 MEM_B_WE# {15,16}
MEM_DAT A51 1 RN54A MD51 C11 G5
10Ohm 2 MEMDATA[51] MEMWEA_L MEM_A_WE# {15,16}
MEM_DAT A52 3 MD52 A6
RN53B
10Ohm 4 MEMDATA[52]
MEM_DAT A53 1 MD53 C7 F5
RN53A
10Ohm 2 MEMDATA[53] MEMCASB_L MEM_B_CAS# {15,16}
MEM_DAT A54 7 MD54 B9 D4
B MEM_DAT A55
MEM_DAT A56
3
7
RN54D
10Ohm 8
RN54B
10Ohm 4
MD55
MD56
A10
A11
MEMDATA[54]
MEMDATA[55]
MEMCASA_L
H4
MEM_A_CAS# {15,16}
B
10Ohm 8 RN57D MEMDATA[56] MEMRASB_L MEM_B_RAS# {15,16}
MEM_DAT A57 1 MD57
MEM_DAT A58 10Ohm 2 RN57A MD58
C13
MEMDATA[57] MEMRASA_L
H5 MEM_A_RAS# {15,16}
5 10Ohm 6RN56C A15
MEMDATA[58]
MEM_DAT A59 1 MD59 A17 D8
RN56A
10Ohm 2 MEMDATA[59] MEMCS_L[7]
MEM_DATA6 3 MD6 AJ11 C8
MEM_DAT A60 10Ohm 4 RN42B MD60 MEMDATA[6] MEMCS_L[6]
5 B11 E8
MEM_DAT A61 3 10Ohm 6 MD61 A12
MEMDATA[60] MEMCS_L[5]
E7
RN57C MEMDATA[61] MEMCS_L[4] MEM_B_CS#[0..1] {15,16}
MEM_DAT A62 7 MD62 B15 D6 MEM_B_CS#1
MEM_DAT A63 10Ohm 8
10Ohm 4 RN57B
MD63 MEMDATA[62] MEMCS_L[3] MEM_B_CS#0
3 A16 E6
MEM_DATA7 10Ohm 4 RN56B MD7 MEMDATA[63] MEMCS_L[2] MEM_A_CS#1 MEM_A_CS#[0..1] {15,16}
5 RN42C AH11 C4
MEM_DATA8 7 10Ohm 6 MD8 AJ10
MEMDATA[7] MEMCS_L[1]
E5 MEM_A_CS#0
MEM_DATA9 10Ohm 8 MD9 MEMDATA[8] MEMCS_L[0]
3 RN43D AJ9 MEMDATA[9]

AMP: 12-010707540
Foxconn: 12-010707541
MEM_B_CKE {15,16} LOTES: 12 -010707542
CLK7 MEM_A_CKE {15,16}
DIMM1: TYCO: 12-010707543
CLK5 MEM_A_CLK2# {15,16}
No P_GND:
MEM_B_CLK2# {15,16}
CLK0 MEM_A_CLK1# {15,16} temp_821310 7_dw03
A MEM_B_CLK1#
MEM_B_CLK0#
MEM_A_CLK0#
{15,16}
{15,16}
{15,16}
A
CLK6 MEM_A_CLK2 {15,16}
MEM_B_CLK2 {15,16} MEM_DQS[0..7] {15,16}
DIMM2: CLK4 MEM_A_CLK1 {15,16}
ATI RS480 1 OF
MEM_B_CLK1 {15,16} Title :
CLK1 MEM_B_CLK0 {15,16} MEM_DQM[0..7] {15,16} 4
MEM_A_CLK0 {15,16} ASUSTeK COMPUTER INC
Engineer:
Size Project Name
Mario Zeng Rev
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 9 of 40
2004
5 4 3 2 1
5 4 3 2 1
+VCORE

L3
+2.5V 120Ohm/100Mhz +2.5VA
Irat=600mA
1 2
CPU1B
CB97 CB471 CB472 CB61 CB62 CB63

D SOCKET754P Do Not Stuff0.1UF


C1206
0.1UF 10uF
c0805
0.22UF
X7R
3300P
10% D
F26 NI
VDD12
W23 F24
VDD90 VDD11
Y8 F22
VDD91 VDD10
Y10 F20 GND GND
VDD92 VDD9
Y12 F18
VDD93 VDD8
Y14 E28
VDD94 VDD7
Y16 E23
VDD95 VDD6
Y18 E21
VDD96 VDD5
Y20 E19
VDD97 VDD4 +2.5VA +2.5V +3V
Y22 D24
VDD98 VDD3
Y24
VDD99 VDD2
B24 Place R46 at SB side
AA9 B20
VDD100 VDD1 T4
AA11
VDD101
AA13 AE13 1 NI R46
VDD102 VTT_SENSE Do Not Stuff 1KOhm
AA15
VDD103
AA17 AJ25
VDD104 VDDA2 RN40D
AA19 AH25
VDD105 VDDA1 T5 R45
AA21
VDD106 B23 NI 680Ohm 680Ohm
AA23 1 SB_THERMTRIP# {21}
VDD107 CORE_SENSE
AA28 Do Not Stuff
VDD108 TP_AE11
AB10 AE11
VDD109 VDDIO_SENSE TP_AE12 3
AB12 AE12
VDD110 VDDIOFB_H TP_AF12 C Q1
AB14 AF12
VDD111 VDDIOFB_L THERMALCTL 1 B
AB16
VDD112 PMBS3904
AB18 A24 COREFB# {37}
VDD113 COREFB_L E
AB20 A23
VDD114 COREFB_H COREFB {37} 2
AB22
VDD115 H_THERMTRIP#
C AB24
AB26
AC11
VDD116
VDD117
THERMTRIP_L
THERMDC
A20
A27
A26
H_THRMDC
H_THERMTRIP# {39}
C
VDD118 THERMDA {30}
AC13 H_THRMDA {30}
VDD119 CVID0
AC15 AE15 CVID[0..4] {37}
VDD120 VID[0] CVID1
AC17 AF15
VDD121 VID[1] CVID2
AC19 AG14
VDD122 VID[2] CVID3
AC21 AF14
VDD123 VID[3] CVID4
AC23 AG13
VDD124 VID[4]
AD18
VDD125 SB_CPUPWRGD
AD20 AE18 C5 1 2
VDD126 PWROK LDT_RST# CPUCLK#
AD22 AF20 3900P
VDD127 RESET_L 10%
AD24
AE17 VDD128 FBCLKOUT_L
AJ19
VDD129 FBCLKOUT_L 169Ohm
AE25 AH19 2 R51 1
VDD130 FBCLKOUT_H 1% 80.6Ohm 1%
AE27
VDD131 CPUCLK_L
AG19 AH21
VDD132 CLKIN_L CPUCLK_H
AH24 AJ21 C6 1 2
VDD133 CLKIN_H CPUCLK
3900P

+2.5V_DUAL

+2.5V

B +VCORE Follow AMD Design Guide +2.5V_DUAL Follow AMD Design Guide 3 SB_CPUPWRGD
B
680Ohm 4 RN39B LDTSTOP#
7
5 680Ohm 8 RN39D LDT_RST#
680Ohm 6 RN39C
HDT termination is required for Rev Ax silicon only .
CB104 CB105 CB106 CB112 CB113 CB161 CB162 CB163 CB164 CB177
{19} SB_CPUPWRGD
Do Not Stuff Do Not StuffDo Not StuffDo Not StuffDo Not Stuff Do Not Stuff Do Not StuffDo Not Stuff
NI NI NI NI NI NI NI NI NI NI +2.5V_DUAL +2.5V
{11,13,19} LDTSTOP#
X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R
{19} LDT_RST#
C252 C251 C250
GND GND Do Not Stuff Do Not Stuff
10% 10% 10%
NI NI NI

GND GND GND

HDT1
+2.5V_DUAL 2 1
GND1 GND
4 3
GND2 RES1
6 5
GND3 RES2 NI NI NI NI NI NI NI NI DBREQ_L
8 7 GND
GND4 DBREQ_L
10 9 DBRDY
GND5 DBRDY TCK
12 11
A CB38 CB481 CB482 CB52 CB53 CB56 CB57 CB58 CB37 CB60
14
16
GND6
GND7
GND8
TCK
TMS
TDI
13
15
TMS
TDI
A
10UF/10V Do Not Stuff Do Not Stuff10uF/10V 10uF/10V 10uF/10V 0.1UF 18 17 TRST_L
10uF/10V c0805 c0805 1UF/10V c0402 1UF/10V GND9 TRST_L TDO
c1206_h75 c1206_h75 c1206_h75 c0805 c0805 20 19
GND10 TDO
BOT BOT BOT 22 21
NI NI 24
GND11
RES3
2.5V1
2.5V2
23 Title : ATI RS480 1 OF
26
GND12 4
ASUSTeK COMPUTER INC Engineer:
Do Not Stuff Size Project Name
Mario Zeng Rev
GND
GND
NI A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 10 of 40
2004

5 4 3 2 1
5 4 3 2 1
HT_CADIN_L[15..0] {12}
HT_CADIN_H[15..0]
{12}
HT_CADOUT_L[15..0] {12}
HT_CADOUT_H[15..0] {12}
Output from CPU CPU1D

SOCKET754P

AJ26
VSS219
D G24
G28
VSS47
VSS48
VSS218
VSS217
AJ24
AJ22 D
H2 AJ20
VSS49 VSS216
H7 AH28
VSS50 VSS215
H9 AH26
VSS51 VSS214
H11 AH22
VSS52 VSS213
H13 AH20
VSS53 VSS212
CPU1C H15 AH14
SOCKET754P VSS54 VSS211
H17 AH12
VSS55 VSS210
H19 AH10
VSS56 VSS209
H21 AH8
VSS57 VSS208
H23 AH6
VSS58 VSS207
H26 AH4
VSS59 VSS206
J6 AH2
VSS60 VSS205
J8 AG29
VSS61 VSS204
J10 AG27
VSS62 VSS203
J12 AG25
VSS63 VSS202
J14 AG24
VSS64 VSS201
Output from NB J16 AG23
VSS65 VSS200
J18 AG22
VSS66 VSS199
J20 AG21
VSS67 VSS198
J22 AG20
VSS68 VSS197
J24 AF28
HT_CADIN_L9 VSS69 VSS196
AC26 K2 AF26
HT_CADIN_L8 L0_CADIN_L[9] VSS70 VSS195
AC25 K7 AF19
HT_CADIN_L7 L0_CADIN_L[8] VSS71 VSS194
T28 K9 AF17
HT_CADIN_L6 L0_CADIN_L[7] VSS72 VSS193
U29 K11 AF2
HT_CADIN_L5 L0_CADIN_L[6] VSS73 VSS192
V28 K13 AE29
HT_CADIN_L4 L0_CADIN_L[5] VSS74 VSS191
W29 K15 AE20
HT_CADIN_L3 L0_CADIN_L[4] VSS75 VSS190
C HT_CADIN_L2
HT_CADIN_L15
AA29
AB28
R25
L0_CADIN_L[3]
L0_CADIN_L[2]
K17
K19
K21
VSS76
VSS77
VSS189
VSS188
AE16
AE14
AD26
C
HT_CADIN_L14 L0_CADIN_L[15] VSS78 VSS187
HT_CADIN_L13
U26
L0_CADIN_L[14] L0_REF0/L0_REF1 K23
VSS79 VSS186
AD23
U25 L6 AD21
HT_CADIN_L12 W26
L0_CADIN_L[13] 5/10,<1000mil L8
VSS80 VSS185
AD19
HT_CADIN_L11 L0_CADIN_L[12] VSS81 VSS184
AA26 L10 AD17
HT_CADIN_L10 L0_CADIN_L[11] VSS82 VSS183
AA25 L20 AD15
HT_CADIN_L1 L0_CADIN_L[10] VSS83 VSS182
AC29 756 C3 L22 AD13
HT_CADIN_L0 L0_CADIN_L[1] NP_NC2 +1.2VA VSS84 VSS181
AD28 755 1000P L24 AD11
L0_CADIN_L[0] NP_NC1 VSS85 VSS180
10% L28 AD9
HT_CADIN_H9 VSS86 VSS179
AC27 AJ27 LDTSTOP# {10,13,19} GND M2 AD7
HT_CADIN_H8 L0_CADIN_H[9] LDTSTOP_L VSS87 VSS178
AD25 M7 AD2
HT_CADIN_H7 L0_CADIN_H[8] L0_REF1 R47 VSS88 VSS177
T27 AF27 2 1% 1 M9 AC28
HT_CADIN_H6 L0_CADIN_H[7] L0_FEF1 L0_REF0 R48 VSS89 VSS176
V29 AE26 2 44.2Ohm M21 AC24
HT_CADIN_H5 L0_CADIN_H[6] L0_FEF0 VSS90 VSS175
V27 M23 AC22
HT_CADIN_H4 L0_CADIN_H[5] VSS91 VSS174
Y29 P25 C4 M26 AC20
HT_CADIN_H3 L0_CADIN_H[4] L0_CTLOUT_L[1] VSS92 VSS173
AB29 P27 1000P N6 AC18
HT_CADIN_H2 L0_CADIN_H[3] L0_CTLOUT_L[0] HT_CTLOUT_L0 {12} VSS93 VSS172
AB27 10% N8 AC16
L0_CADIN_H[2] VSS94 VSS171
HT_CADIN_H15 T25 N25 N10 AC14
HT_CADIN_H14 L0_CADIN_H[15] L0_CTLOUT_H[1] VSS95 VSS170
U27 P28 HT_CTLOUT_H0 {12} N20 AC12
HT_CADIN_H13 L0_CADIN_H[14] L0_CTLOUT_H[0] GND VSS96 VSS169
V25 N22 AC10
HT_CADIN_H12 L0_CADIN_H[13] VSS97 VSS168
W27 R26 N22337563
R 113 2 49.9Ohm1 N24 AC8
HT_CADIN_H11 L0_CADIN_H[12] L0_CTLIN_L[1] VSS98 VSS167
AA27 R29 HT_CTLIN_L0 {12} P2 AC6
HT_CADIN_H10 L0_CADIN_H[11] L0_CTLIN_L[0] VSS99 VSS166
AB25 P7 W24
HT_CADIN_H1 L0_CADIN_H[10] R27 R112 1 49.9Ohm 1% VSS100 VSS133
AD29 P9 W28
L0_CADIN_H[1] L0_CTLIN_H[1] VSS101 VSS134
HT_CADIN_H0 AD27 2 GND P21 Y2
L0_CADIN_H[0] L0_CTLIN_H[0] VSS102 VSS135
T29 HT_CTLIN_H0 {12} P23 Y7
VSS103 VSS136
A28 R6 Y9
KEY1 L0_CLKOUT_L[1] VSS104 VSS137
AJ28 J27 R8 Y11
B KEY0 L0_CLKOUT_L[0]
K29
HT_CLKOUT_L1 {12}
HT_CLKOUT_L0 {12} R10
R20
VSS105
VSS106
VSS138
VSS139
Y13 B
VSS107
R22
L0_CLKOUT_H[1] VSS108
J26 HT_CLKOUT_H1 {12} R24
L0_CLKOUT_H[0] VSS109
J29 R28
HT_CLKOUT_H0 {12} VSS110
T2
L0_CLKIN_L[1] VSS111
W25 HT_CLKIN_L1 {12} T7
L0_CLKIN_L[0] VSS112
Y28 HT_CLKIN_L0 {12}
L0_CLKIN_H[1]
Y25 HT_CLKIN_H1 {12}
L0_CLKIN_H[0]

+VLDT
+VTT_DDR

CB29 CB22 CB23 CB43 CB44 CB45 CB46 CB34 CB39 CB36
1UF/10VDo 10uF 10uF Do Not 0.1UF 10uF 0.1UF
D o Not Stuff
Not Stuff
c0402 c0805 c0805 Stuff0.1UFc0402
c0805 c0402 c0805 NI c0402
NI NI

+1.2VA GND
GND CPU2 CPU3
GND
Follow AMD Design Guide Place at one side of CPU Place at the other side of CPU

CB24 CB25 CB26 CB27 CB597 CB175 CB176


A Do Not Stuff10uF
c0805 c0805
0.1U
X7R
0.1UF
c0402
3300P
X7R NI
Do Not Stuff
NI
A
NI X7R X7R X-PAD RETENTION MODULE

Title : ATI RS480 1 OF


GND 4
ASUSTeK COMPUTER INC Engineer:
Size Project Name
Mario Zeng Rev
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 11 of 40
2004
5 4 3 2 1
5 4 3 2 1

D HT_CADIN_L[15..0] {11} D
HT_CADIN_H[15..0] {11}

Input to NB U4B Output from NB


HT_CADOUT_L[15..0] {11}
HT_CADOUT_H[15..0] {11} PART 2 OF 6
{18} GFX_RX0P D8 A7 GFX_TX0P {18}
GFX_RX0P GFX_TX0P
{18} GFX_RX0N D7 B7 GFX_TX0N {18}
GFX_RX0N GFX_TX0N
{18} GFX_RX1P D5 B6 GFX_TX1P {18}
GFX_RX1P GFX_TX1P
{18} GFX_RX1N D4 B5 GFX_TX1N {18}
GFX_RX1N GFX_TX1N
{18} GFX_RX2P E4 A5 GFX_TX2P {18}
GFX_RX2P GFX_TX2P
{18} GFX_RX2N F4 A4 GFX_TX2N {18}
GFX_RX2N GFX_TX2N
{18} GFX_RX3P G5 GFX_RX3P GFX_TX3P B3 GFX_TX3P {18}
{18} GFX_RX3N G4 B2 GFX_TX3N {18}
GFX_RX3N GFX_TX3N
U4A H4 C1
{18} GFX_RX4P GFX_RX4P GFX_TX4P GFX_TX4P {18}
{18} GFX_RX4N J4 GFX_RX4N D1 GFX_TX4N {18}
GFX_TX4N
HT_CADOUT_H15 HT_CADIN_H15R24 {18} GFX_RX5P H5 GFX_RX5P GFX_TX5P D2 GFX_TX5P {18}
HT_RXCAD15P HT_TXCAD15P
T26 R26 PART 1OF6 R25 HT_CADIN_L15 {18} GFX_RX5N H6 E2 GFX_TX5N {18}
HT_RXCAD15N HT_TXCAD15N GFX_RX5N GFX_TX5N
HT_CADOUT_H14 HT_CADIN_H14N26 G1 F2
HT_RXCAD14P HT_TXCAD14P {18} GFX_RX6P GFX_RX6P GFX_TX6P GFX_TX6P {18}
U25 HT_CADIN_L14P26 G2 F1
HT_RXCAD14N HT_TXCAD14N {18} GFX_RX6N GFX_RX6N GFX_TX6N GFX_TX6N {18}
HT_CADOUT_L14 V26 N24 HT_CADIN_H13 {18} GFX_RX7P K5 H2 GFX_TX7P {18}
HT_CADOUT_L13 U26 HT_RXCAD13P HT_TXCAD13P GFX_RX7P GFX_TX7P
N25 HT_CADIN_L13 {18} GFX_RX7N K4 J2 GFX_TX7N {18}
HT_RXCAD13N HT_TXCAD13N GFX_RX7N GFX_TX7N
HT_CADOUT_H12 HT_CADIN_H12L26 L4 J1
HT_RXCAD12P HT_TXCAD12P {18} GFX_RX8P GFX_RX8P GFX_TX8P GFX_TX8P {18}
W25 HT_CADIN_L12M26 M4 K1
HT_RXCAD12N HT_TXCAD12N {18} GFX_RX8N GFX_RX8N GFX_TX8N GFX_TX8N {18}
HT_CADOUT_L12 HT_CADIN_H11J26 N5 K2
HT_RXCAD11P HT_TXCAD11P {18} GFX_RX9P GFX_RX9P GFX_TX9P GFX_TX9P {18}
W24 HT_CADIN_L11K26 N4 L2
HT_RXCAD11N HT_TXCAD11N {18} GFX_RX9N GFX_RX9N GFX_TX9N GFX_TX9N {18}
HT_CADOUT_H11 AA25 HT_CADIN_H10J24 P4 M2
HT_RXCAD10P HT_TXCAD10P {18} GFX_RX10P GFX_RX10P GFX_TX10P GFX_TX10P {18}
HT_CADOUT_L11 AA24 HT_CADIN_L10J25 R4 M1
HT_RXCAD10N HT_TXCAD10N {18} GFX_RX10N GFX_RX10N GFX_TX10N GFX_TX10N {18}
HT_CADOUT_H10 AB26 HT_CADIN_H9
G26 P5 N1
C
HT_RXCAD9P HT_TXCAD9P {18} GFX_RX11P GFX_RX11P GFX_TX11P GFX_TX11P {18} C
HT_CADOUT_L10 AA26 HT_CADIN_L9
H 26 P6 N2
HT_RXCAD9N HT_TXCAD9N {18} GFX_RX11N GFX_RX11N GFX_TX11N GFX_TX11N {18}
HT_CADOUT_H9 HT_CADIN_H8
G24 P2 R1
HT_RXCAD8P HT_TXCAD8P {18} GFX_RX12P GFX_RX12P GFX_TX12P GFX_TX12P {18}
AC25 HT_CADIN_L8
G25 R2 T1
HT_RXCAD8N HT_TXCAD8N {18} GFX_RX12N GFX_RX12N GFX_TX12N GFX_TX12N {18}
HT_CADOUT_L9 T5 T2
{18} GFX_RX13P GFX_RX13P GFX_TX13P GFX_TX13P {18}
AC24 R29 L30 HT_CADIN_H7 T4 U2
HT_CADOUT_L7 HT_RXCAD7P HT_TXCAD7P {18} GFX_RX13N GFX_RX13N GFX_TX13N GFX_TX13N {18}
R28 HT_CADIN_L7
M30 U4 V2
HT_CADOUT_H6 HT_RXCAD7N HT_TXCAD7N {18} GFX_RX14P GFX_RX14P GFX_TX14P GFX_TX14P {18}
T30 HT_CADIN_H6
L28 V4 V1
HT_CADOUT_L6 HT_RXCAD6P HT_TXCAD6P {18} GFX_RX14N GFX_RX14N GFX_TX14N GFX_TX14N {18}
R30 HT_CADIN_L6
L29 W1 Y2
HT_CADOUT_H5 HT_RXCAD6N HT_TXCAD6N {18} GFX_RX15P GFX_RX15P GFX_TX15P GFX_TX15P {18}
T28 HT_CADIN_H5
J29 W2 AA2
HT_CADOUT_L5 HT_RXCAD5P HT_TXCAD5P {18} GFX_RX15N GFX_RX15N GFX_TX15N GFX_TX15N {18}
T29 HT_CADIN_L5
K29
HT_CADOUT_H4 HT_RXCAD5N HT_TXCAD5N
V29 H30 HT_CADIN_H4
HT_CADOUT_L4 HT_RXCAD4P HT_TXCAD4P
U29 HT_RXCAD4N HT_TXCAD4N H29 HT_CADIN_L4 AE1 AD2
HT_CADOUT_H3 GPP_RX0P/SB_RX2P GPP_TX0P/SB_TX2P
Y30 E29 AE2 AD1
HT_CADOUT_L3 HT_RXCAD3P HT_TXCAD3P GPP_RX0N/SB_RX2N GPP_TX0N/SB_TX2N
W30 HT_CADIN_H3
HT_RXCAD3N HT_TXCAD3N
HT_CADOUT_H2 Y28 E28 HT_CADIN_L3 AB2 AA1
HT_RXCAD2P HT_TXCAD2P GPP_RX1P/SB_RX3P GPP_TX1P/SB_TX3P
HT_CADOUT_L2 Y29 D30 HT_CADIN_H2 AC2 AB1
HT_RXCAD2N HT_TXCAD2N GPP_RX1N/SB_RX3N GPP_TX1N/SB_TX3N
HT_CADOUT_H1 D28 HT_CADIN_H1
HT_RXCAD1P HT_TXCAD1P
AB29 D29 HT_CADIN_L1 AB5 Y5
HT_CADOUT_H0
HT_RXCAD1N HT_TXCAD1N
B29 AB4 GPP_RX2P PCIE I/F TO SLOTGPP_TX2P Y6
HT_RXCAD0P HT_TXCAD0P GPP_RX2N GPP_TX2N
HT_CADOUT_L0 C29 HT_CADIN_L0
HT_RXCAD0N HT_TXCAD0N
Y4 W5
GPP_RX3P GPP_TX3P
{11} HT_CLKOUT_H1 Y26
HT_RXCLK1P HT_TXCLK1P
L24 HT_CLKIN_H1 {11} Near SB AA4
GPP_RX3N GPP_TX3N
W4 Near NB
{11} HT_CLKOUT_L1 W26 L25 HT_CLKIN_L1 {11}
HT_RXCLK1N HT_TXCLK1N
W29 F29 C119 1 0.1U NB_RX0P AG1 AF2 NB_TX0P C7 2 1 0.1U
{11} HT_CLKOUT_H0 HT_RXCLK0P HT_TXCLK0P HT_CLKIN_H0 {11} {19} SB_RX0P NB_RX0N SB_RX0P SB_TX0P SB_TX0P {19}
W28 G29 C120 1 0.1U AH1 AG2 NB_TX0N C8 2 1 0.1U
{11} HT_CLKOUT_L0 HT_RXCLK0N HT_TXCLK0N HT_CLKIN_L0 {11} {19} SB_RX0N SB_RX0N SB_TX0N SB_TX0N {19}
C121 2 NB_RX1P
PCIE I/F TO SB NB_TX1P
{11} HT_CTLOUT_H0 P29 M29 HT_CTLIN_H0 {11} {19} SB_RX1P 1 0.1U AC5 AC4 C9 2 1 0.1U SB_TX1P {19}
HT_RXCTLP HT_TXCTLP 10% 2
C122 NB_RX1N SB_RX1P SB_TX1P NB_TX1N 10% 2
{11} HT_CTLOUT_L0 N29 M28 HT_CTLIN_L0 {11} {19} SB_RX1N 1 0.1U AC6 AD4 C10 1 0.1U SB_TX1N {19}
B HT_RXCTLN HT_TXCTLN 10% SB_RX1N SB_TX1N 10% +1.2VA B
+1.2VA R75 1 2 49.9Ohm 1% B28 R761 2 R781 2 AH3 AH2 R79 1 2 150Ohm
HT_RXCALN HT_TXCALP 1% PCE_ISET PCE_PCAL
R77 2 1 49.9Ohm 1% E27 A28 R801 2 AJ3 AJ2 R81 1 2 100Ohm
HT_RXCALP HT_TXCALN PCE_TXISET PCE_NCAL

GND RS480 GND RS480


GND

A A

Title : ATI RS480 1 OF


4
ASUSTeK COMPUTER INC Engineer:
Size Project Name
Mario Zeng Rev
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 12 of 40
2004

5 4 3 2 1
5 4 3 2 1

U4C
AF17 AF28
AK17 MEM_A0 MEM_DQ0 AF27
AH16
MEM_A1 PART 3 OF 6MEM_DQ1 AG28
MEM_A2 MEM_DQ2
AF16 AF26
MEM_A3 MEM_DQ3
AJ22 AE25
MEM_A4 MEM_DQ4 +AVDD U4D
AJ21 AE24
MEM_A5 MEM_DQ5
AH20
MEM_A6 MEM_DQ6
AF24 B27
AVDD1
PART 4 O F 6
D AH21 AG23 C27 D18 D
MEM_A7 MEM_DQ7 AVSSN AVDD2 RESERVED1
AK19 AE29 D26 C18
MEM_A8 MEM_DQ8 +1.8V AVSSN1 RESERVED2
AH19 AF29 D25 B19
MEM_A9 MEM_DQ9 AVSSN2 RESERVED3
AJ17 AG30 C24 A19
MEM_A10 MEM_DQ10 GND AVDDDI RESERVED4
AG16 AG29 B24 D19
MEM_A11 MEM_DQ11 AVSSDI RESERVED5
AG17
MEM_A12 MEM_DQ12
AH28 AVDD DAC VDD (3.3V) +AVDDQ
RESERVED6
C19
AH17 AJ28 E24 D20
MEM_A13 MEM_DQ13 AVDDQ RESERVED7
AJ18
MEM_A14 MEM_DQ14
AH27 AVDDDI DIGITAL VDD (1.8V) AVSSQ D24
AVSSQ RESERVED8
C20
AJ27
MEM_DQ15
AG26
MEM_DM0 MEM_DQ16
AE23 AVDDQ DAC2 BANDGAP REF (1.8V) {17} TV_C
B25
C RESERVED9
B16
AJ29 AG22 A25 A16
MEM_DM1 MEM_DQ17 {17} TV_Y Y RESERVED10
AE21
MEM_DM2 MEM_DQ18
AF23 PLLVDD PLL VDD (1.8V) {17} TV_COMP
A24
COMP RESERVED11
D16
AH24 AF22 C16
MEM_DM3 MEM_DQ19 RED RESERVED12
AH12
MEM_DM4 MEM_DQ20
AE20 HTPVDD HT PLL VDD (1.8V) {17} VGA_RED
C25
GREEN RESERVED13
B17
AG13 AG19 A26 A17
MEM_DM5 MEM_DQ21 {17} VGA_GREEN BLUE RESERVED14
AH8 AF20 B26 E17
MEM_DM6 MEM_DQ22 {17} VGA_BLUE RESERVED15
AE8 AF19 D17
MEM_DM7 MEM_DQ23 DACVSYNC RESERVED16
AH26 A11
MEM_DQ24 {17} VGA_VSYNC
AF25 AJ26 B11 B20
MEM_DQS0P MEM_DQ25 R82 1% DACREFSET {17} VGA_HSYNC DACHSYNC RESERVED17
AH30 AK26 1 2 C26 A20
MEM_DQS1P MEM_DQ26 715 RSET RESERVED18 +1.8V
AG20 AH25 E11 B18
MEM_DQS2P MEM_DQ27 Ohm {17} DDCA_CLK DACSCL RESERVED19
AJ25 AJ24 F11 C17
MEM_DQS3P MEM_DQ28 {17} DDCA_DATA DACSDA RESERVED20
AH13 AH23
MEM_DQS4P MEM_DQ29 GND
AF14 AJ23 E18
MEM_DQS5P MEM_DQ30 +PLLVDD VDD18_E18
AJ7 AH22 F17
MEM_DQS6P MEM_DQ31 VSS_F17
AG8 AK14 A14 E19 CB28
MEM_DQS7P MEM_DQ32 C11 PLLVSS PLLVDD VDD18_E19 Do Not Stuff
AH14 B14 G20
MEM_DQ33 Do Not Stuff +HTPVDD PLLVSS VDD18_G20
AG25 AK13 H20 BOT
MEM_DQS0N MEM_DQ34 10% VDD18_H20
AH29 AJ13 M23 NI
C MEM_DQS1N MEM_DQ35 +1.8V NI HTPVSS HTPVDD C
AF21 AJ11 L23 G19
MEM_DQS2N MEM_DQ36 HTPVSS VSS_G19 GND
AK25 AH11 E20
MEM_DQS3N MEM_DQ37 VSS_E20
AJ12 AJ10 GND F20
MEM_DQS4N MEM_DQ38 VSS_F20
AF13 AH10 H18
MEM_DQS5N MEM_DQ39 VSS_H18
AK7 AE15 R83 D14 G18
MEM_DQS6N MEM_DQ40 {19} NB_RST# SYSRESET# VSS_G18
AF9 AF15 2.2KOhm B15 F19
MEM_DQS7N MEM_DQ41 {34} NB_PWRGD POWERGOOD VSS_F19
AG14 {10,11,19} LDTSTOP# B12 H19
MEM_DQ42 LDTSTOP# VSS_H19
AE17 AE14 C12 F18
MEM_RAS# MEM_DQ43 SUS_STAT# {19} ALLOW_LDTSTOP ALLOW_LDTSTOP VSS_F18
AH18 AE12 AH4
MEM_CAS# MEM_DQ44 SUS_STAT#
AE18 AF12 E14 T10 1 Do Not Stuff
MEM_WE# MEM_DQ45 GPIO3
AJ19
MEM_CS# MEM_DQ46
AG11 PA_RS400G1 +VDDR3
GPIO2
F14 GND T11 Do Not Stuff
AF18 AE11 Implement H13 F13 1 Do Not Stuff
MEM_CKE MEM_DQ47 VDDR3_1 GPIO4
AJ9 H12
T20 MEM_DQ48 VDDR3_2
1 AK16 AH9 B8
MEM_CKP MEM_DQ49 GFX_CLKP NBSRCCLK {8}
T27 1 AJ16 AJ8 A13 A8
MEM_CKN MEM_DQ50 {8} NB_14M OSCIN GFX_CLKN NBSRCCLK# {8}
AK8 T13 1 Do Not
MEM_DQ51 OSCOUT
AH7 P23 2 1
+1.8V
C14
MEM_DQ52
MEM_DQ53
AJ6
AH6
CLOCKs HTTSTCLK
HTREFCLK
R85 0Ohm

0.47U MEM_DQ54 GND


2 1 AE28 AJ5 E8 SBLINKCLK {8}
MEM_CAP1 MEM_DQ55 TVCLKIN SB_CLKP
AJ4 AG10 B9 E7 SBLINKCLK#
C15 MEM_CAP2 MEM_DQ56 {18} TVCLKIN TVCLKIN SB_CLKN
AF11 {8}
R150 0.47U MEM_DQ57
2 1 AF10
C16 150 MEM_DQ58 T3
AE9 1 Do Not C13 1 2 Do Not
Do Not Stuff 1% +1.8V MEM_DQ59 T2 1 E13D o Not Stuff DFT_GPIO3/RSV
2 1 AJ20 AG7 C14 1 2 Do Not
MEM_VMODE MEM_DQ60 DFT_GPIO0/RSV DFT_GPIO1/RSV DFT_GPIO4/RSV
NI 1KOhm AF8 R90 1 2 Do Not D13 C15 1 2 Do Not StuffNI
MEM_DQ61 DFT_GPIO2/RSV DFT_GPIO5/RSV GND
AF7
MEM_DQ62
2 1 AK20
MEM_DQ63
AE7 Internal pull up A10 TMDS_HPD {18}
GND Do Not Stuff MEM_VREF GND F10 TMDS_HPD
B
C17 R151 NI MPVDD {19} BMREQ# I2C_CLK BMREQb STRP_DATA STRP_DATA B
AJ15 AH5 C10 E10
MPVSS MEM_COMPP {18} I2C_CLK I2C_DATA I2C_CLK DDC_DATA T9
0.1UF/25V 150 AJ14 AD30 C11
1% RS480
MEM_COMPN
+1.8V
{18} I2C_DATA
AF4
AE4
I2C_DATA
THERMALDIODE_P
MIS. B10 1 +3V

R152 R160 THERMALDIODE_N Do Not Stuff


E12
Do Not Stuff Do Not TESTMODE STRP_DATA 3
L9 Stuff RS480 I2C_CLK 4.7KOhm4 RN109B
1% 1% 5
GND +1.8V NI NI JP1 I2C_DATA 4.7KOhm6 RN109C
Do Not Stuff 7
Irat=600mA TVCLKIN 4.7KOhm8 RN109D
1
N 2 MPVDD Do Not Stuff 4.7KOhm2 RN109A
GND NI
CB297
Do Not Stuff GND
NI GND
AVDDDI

GND
Enable Disable +1.8V
DFT_GPIO0 ROM STRAP 0 1 1.02 add
DFT_GPIO1 SIDE 0 1
MEMORY
CB77 CB33 CB78
1UF/10V 0.1UF/25V Do Not Stuff
BOT BOT BOT
L6 NI
L5 +3V 120Ohm/100Mhz
+1.8V 120Ohm/100Mhz +VDDR3 Don't stuff for R X480
+HTPVDD
Irat=600mA 1Irat=600mA
2 GND
1 2 L7 L8 L10
A CB301 CB296 CB72 CB71 +1.8V 120Ohm/100Mhz +3V 120Ohm/100Mhz +AVDD +1.8V 120Ohm/100Mhz +AVDDQ A
CB70 CB69 0.1UF/25V 0.1UF/25V 1UF/10V 0.1UF/25V +PLLVDD
Irat=600mA Irat=600mA Irat=600mA
1UF/10V 0.1UF/25V BOT V 2 V 2 V 2
Do Not Stuff BOT
NI1 2 CB73 CB74 CB75 CB76 CB591 CB79 CB80 CB595
Layout 1UF/10V 0.1UF 1UF/10V 0.1UF 0.1UF/25V 1UF/10V 0.1UF 0.1UF/25V
JP5 GND Do Not Stuff VGA c0402 Do Not Stuff VGA c0402 BOT Do Not Stuff VGA c0402 BOT
GND HTPVSS Consideration NI1 2 VGA NI1 2 VGA VGA NI1 2 VGA VGA
Title : ATI RS480 2 OF
JP6 JP7 JP9 ASUSTeK COMPUTER INC Engineer: Mario Zeng
GND PLLVSS GND AVSSN GND AVSSQ
Size Project Name Rev
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 13 of 40
5 4 3 2 2004 1
5 4 3 2 1

U4F

D D

RS480

GND

+1.2VA
+1.2VA U4E
PART 5 OF 6 VDDA_12_14
H9
N27 AA7
C VDD_HT1 VDDA_12_1 C
U27 G9
VDD_HT2 VDDA_12_2 +1.8V +PCIE_VDDA_18
V27 U8
VDD_HT3 VDDA_12_3 L11
G27 N7
VDD_HT4 VDDA_12_4
V24 N8 1 2
H27 VDD_HT5 VDDA_12_5 U7
VDD_HT6 VDDA_12_6 70Ohm/100Mhz CB89 CB90 CB91 CB92 CB93
K24 F9
VDD_HT7 VDDA_12_7 l0805_h43 Do Not StuffDo Not Stuff0.1UF Do Not Stuff
AB24 AA8
VDD_HT8 VDDA_12_8 Irat=3A c0805 BOT BOT NI
P27 G8
VDD_HT9 VDDA_12_9 NI NI NI
J27 G7
VDD_HT10 VDDA_12_10
AA27 J8
VDD_HT11 VDDA_12_11
K27 J7
VDD_HT12 VDDA_12_12 VDDA12_13
P24 B1 GND
VDD_HT13 VDDA_12_13 L12
AB27 AG4
VDD_HT14 VDDA_18_1 +1.8V 120Ohm/100Mhz +VDD_18
AB23 R8
VDD_HT15 VDDA_18_2 +PCIE_VDDA_18 +1.2VA +1.8V Irat=600mA
V23 AC8
VDD_HT16 VDDA_18_3
G23 AC7 1 2
VDD_HT17 VDDA_18_4
E23 AF6
VDD_HT18 VDDA_18_5 CB94 CB95 CB96
W23 AE6
VDD_HT19 VDDA_18_6 CB99 CB100 CB101 CB102 CB103 CB571 CB572 CB573 0.1UF D o Not Do Not Stuff
K23 L8
VDD_HT20 VDDA_18_7 Do Not Stuff Do Not StuffDo Not Stuff 10UF 0.1UF 0.1UF Stuff
c0805 NI
J23 W8
VDD_HT21 VDDA_18_8 c0805 c0805 NI NI c0805 NI
H23 W7
VDD_HT22 VDDA_18_9 NI BOT
U23 L7
VDD_HT23 VDDA_18_10 NI
AA23 R7
VDD_HT24 VDDA_18_11
D23 AF5 GND
VDD_HT25 VDDA_18_12 VDDA18_13
F23 AK2 GND GND
VDD_HT26 VDDA_18_13
C23 N16
VDD_HT27 VDD_CORE1
B23 M13
VDD_HT28 VDD_CORE2 +1.2V
A23 M15 +1.2V
VDDHT30 VDD_HT29 VDD_CORE3
A29 W16
B VDDHT31 VDD_HT30 VDD_CORE4 VDDA12_13 VDDA18_13 B
+NB_MEM AC30 N18
VDD_HT31 VDD_CORE5
P19
VDD_CORE6 CB107 CB108 CB109 CB114 CB562 CB564 CB115 CB116
AK23 N12 CB110 CB111
VDD_MEM1 VDD_CORE7 10UF 10UF 0.1UF Do Not Stuff Do Not Stuff10UF 0.1UF 1UF/10V 1UF/10V
AK28 P15
VDD_MEM2 VDD_CORE8 c0805 c0805 NI NI c0805
AK11 N14 NI
VDD_MEM3 VDD_CORE9 BOT BOT VSSA22 VSSA59
AK4 M17
VDD_MEM4 VDD_CORE10
AE30 T19
VDD_MEM5 VDD_CORE11
AC14 G22
VDD_MEM6 VDD_CORE12 VDDHT30 VDDHT31
AD12 R12 GND
VDD_MEM7 VDD_CORE13
AC18 P13
VDD_MEM8 VDD_CORE14 CB117 CB118
AC20 R14
VDD_MEM9 VDD_CORE15 1UF/10V 1UF/10V
AD10 V19
VDD_MEM10 VDD_CORE16 +NB_MEM +3V +1.2VA
AD14 R18
VDD_MEM11 VDD_CORE17 D10 +1.8V VSS30 VSS89
AD15
VDD_MEM12 VDD_CORE18
U16 BOTTOM LAYER CAPs
AD20 U12 2 1
VDD_MEM13 VDD_CORE19 Do Not Stuff
AC10 T13
AD18
AC12
VDD_MEM14
VDD_MEM15
VDD_CORE20
VDD_CORE21
U14
T17
For R165
NI
0OHM
SCB5
0.1UF
SCB6
0.1UF
SCB7
0.1UF
SCB8
0.1UF
SCB4
Do Not Stuff
PUT DECOUPLING CAPS ON THE TOP , CLO SE TO BALLS

AD22
VDD_MEM16
VDD_MEM17
VDD_CORE22
VDD_CORE23
U18 RS480 1 2 NI
AC22 E22
+VDD_18 VDD_MEM18 VDD_CORE24
AH15 R16 R0805
VDD_MEMCK VDD_CORE25 CLIP3
V13
VDD_CORE26 HEATSINK1
H15
VDD_18_1 VDD_CORE27
T15 GND BOTTOM LAYER CAPs CLIP3 position
AC17 P17 (5395.00, 4920.00)
VDD_18_2 VDD_CORE28 +1.2V +PCIE_VDDA_18 +VDD_18
AC15 W18 1
VDD_18_3 VDD_CORE29 D22 2 ANCHOR
VDD_CORE30 BOTTOM LAYER CAPs
B21 W12 3
VDD_CORE47 VDD_CORE31 CLIP4
C21 V15 4
VDD_CORE46 VDD_CORE32 SCB9 SCB10 SCB11 SCB12 SCB13 SCB14 SCB15
A A22 W14 CLIP4 position A
VDD_CORE45 VDD_CORE33 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
B22 V17
C22
VDD_CORE44 VDD_CORE34
M19 HEATSINK (3295.00, 3730.00)
VDD_CORE43 VDD_CORE35 ANCHOR
F21 H22 GND
VDD_CORE42 VDD_CORE36
F22 H21
VDD_CORE41 VDD_CORE37
E21 D21
VDD_CORE40 VDD_CORE38
G21 GND GND GND
VDD_CORE39
RS480
1.02 change heatsink
for RS480
Title : ATI RS480 3 OF
ASUSTeK COMPUTER INC Engineer: Mario Zeng
Size Project Name Rev
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 14 of 40
5 4 3 2 2004 1
5 4 3 2 1
+2.5V_DUAL
XMM1B

3 7
VSS0 VDD0
{9,16} MEM_DATA[0..63] 11 38
VSS1 VDD1
18 46
VSS2 VDD2
26 70
VSS3 VDD3 R101
34 85
VSS4 VDD4 150 DIMM_VREF
42 108
VSS5 VDD5
D {9,16} MEM_A_ADD[0..13]
XMM1A
{9,16} MEM_B_ADD[0..13]
XMM2A 50
58
VSS6
VSS7
VDD6
VDD7
120
148
1%
D
66 168
MEM_A_ADD0 MEM_DATA0 MEM_B_ADD0 MEM_DATA0 VSS8 VDD8
48 2 48 2 74 15
MEM_A_ADD1 A0 DQ0 MEM_DATA1 MEM_B_ADD1 A0 DQ0 MEM_DATA1 VSS9 VDDQ9
43 4 43 4 81 22
MEM_A_ADD2 A1 DQ1 MEM_DATA2 MEM_B_ADD2 A1 DQ1 MEM_DATA2 VSS10 VDDQ10 R102 CB120
41 6 41 6 89 30
MEM_A_ADD3 A2 DQ2 MEM_DATA3 MEM_B_ADD3 A2 DQ2 MEM_DATA3 VSS11 VDDQ11 150 Do Not Stuff
130 8 130 8 93 54
MEM_A_ADD4 A3 DQ3 A3 DQ3 VSS12 VDDQ12
37 94 MEM_DATA4 MEM_B_ADD4 37 94 MEM_DATA4 100 62 1% NI
MEM_A_ADD5 A4 DQ4 A4 DQ4 VSS13 VDDQ13
32 95 MEM_DATA5 MEM_B_ADD5 32 95 MEM_DATA5 116 77
MEM_A_ADD6 A5 DQ5 A5 DQ5 VSS14 VDDQ14
125 98 MEM_DATA7 MEM_B_ADD6 125 98 MEM_DATA7 124 96
MEM_A_ADD7 A6 DQ6 A6 DQ6 VSS15 VDDQ15
29 99 MEM_DATA6 MEM_B_ADD7 29 99 MEM_DATA6 132 104
MEM_A_ADD8 A7 DQ7 A7 DQ7 VSS16 VDDQ16
122 12 MEM_DATA8 MEM_B_ADD8 122 12 MEM_DATA8 139 112
MEM_A_ADD9 A8 DQ8 A8 DQ8 VSS17 VDDQ17
27 13 MEM_DATA9 MEM_B_ADD9 27 13 MEM_DATA9 145 128 GND
MEM_A_ADD10 A9 DQ9 A9 DQ9 VSS18 VDDQ18
141 19 MEM_DAT A15 MEM_B_ADD10 141 19 MEM_DAT A15 152 136
MEM_A_ADD11 A10 DQ10 A10 DQ10 VSS19 VDDQ19
118 20 MEM_DAT A11 MEM_B_ADD11 118 20 MEM_DAT A11 160 143 Place RES divider near
MEM_A_ADD12 A11 DQ11 MEM_B_ADD12 A11 DQ11 VSS20 VDDQ20
MEM_A_ADD13
115
A12 DQ12
105 MEM_DAT
MEM_B_ADD13
115
A12 DQ12
105 MEM_DAT SMBus Address: A0 176
VSS21 VDDQ21
156
DIMM
167 A12 167 A12 164
A13 DQ13 A13 DQ13 VDDQ22
106 MEM_DAT 106 MEM_DAT 181 172
DQ14 DQ14 SA0 VDDQ23
59 A13 59 A13 182 180
{9,16} MEM_A_BA0 BA0 DQ15 {9,16} MEM_B_BA0 BA0 DQ15 SA1 VDDQ24 MEM_A_CS#[0..1] {9,16}
{9,16} MEM_A_BA1 52 23
109 MEM_DAT {9,16} MEM_B_BA1 52 23
109 MEM_DAT 183
BA1 DQ16 BA1 DQ16 SA2
113 24 MEM_DAT A16 113 24 MEM_DAT A16 +2.5V_DUAL GND 157 MEM_A_CS#0
BA2 DQ17 BA2 DQ17 CS0
28 MEM_DAT A18 28 MEM_DAT A18 9 158
DQ18 DQ18 NC0 CS1
44 31 MEM_DAT A19 44 31 MEM_DAT A19 90 MEM_A_CS#1
CB0 DQ19 CB0 DQ19 NC1 CS2
45 114 MEM_DAT 45 114 MEM_DAT 101 163
CB1 DQ20 CB1 DQ20 NC2 CS3
49 A20 49 A20 102
CB2 DQ21 CB2 DQ21 NC3
51 121
117 MEM_DAT 51 121
117 MEM_DAT 173 91 SMBDAT A {8,18,21,23,24,30}
CB3 DQ22 CB3 DQ22 DIMM_VREF NC4 SDA
134 MEM_DAT A23
123 134 MEM_DAT A23
123 92
CB4 DQ23 CB4 DQ23 SCL SMBCLK {8,18,21,23,24,30}
135 MEM_DAT A24
33 135 MEM_DAT A24
33 103 +3V
CB5 DQ24 CB5 DQ24 FETEN
142 35 MEM_DAT A25 142 35 MEM_DAT A25 82
CB6 DQ25 CB6 DQ25 VDDID
39 MEM_DAT A26 MEM_DAT A26
C 144

137
CB7 DQ26
DQ27
40 MEM_DAT A27
126 MEM_DAT A28
144

137
CB7 DQ26
DQ27
39
40 MEM_DAT A27
126 MEM_DAT A28 CB119
1
VREF VDSPD
184
C
{9,16} MEM_A_CLK0 CLK0 DQ28 {9,16} MEM_B_CLK0 CLK0 DQ28
138 MEM_DAT A29
127 138 MEM_DAT A29
127 0.1UF/25V 184P
{9,16} MEM_A_CLK0# CLK#0 DQ29 {9,16} MEM_B_CLK0# CLK#0 DQ29
16 MEM_DAT A30
131 16 MEM_DAT A30
131
{9,16} MEM_A_CLK1 CLK1 DQ30 {9,16} MEM_B_CLK1 CLK1 DQ30
17 MEM_DAT A31
133 17 MEM_DAT A31
133
{9,16} MEM_A_CLK1# CLK1# DQ31 {9,16} MEM_B_CLK1# CLK1# DQ31
76 53 MEM_DAT A32 76 53 MEM_DAT A32
{9,16} MEM_A_CLK2 CLK2 DQ32 MEM_DAT A33 {16} MEM_B_CLK2 CLK2 DQ32 MEM_DAT A33
{9,16} MEM_A_CLK2# 75 55 {9,16} MEM_B_CLK2# 75 55
CLK2# DQ33 CLK2# DQ33
57 MEM_DAT A34 57 MEM_DAT A34 GND
DQ34 DQ34
21 60 MEM_DAT A35 21 60 MEM_DAT A35 +2.5V_DUAL
{9,16} MEM_A_CKE CKE0 DQ35 {9,16} MEM_A_CKE CKE0 DQ35
{9,16} MEM_B_CKE 111 146 MEM_DAT A36 {9,16} MEM_B_CKE 111 146 MEM_DAT A36
CKE1 DQ36 CKE1 DQ36 XMM2B
MEM_DAT A37
147 MEM_DAT A37
147
{9,16} MEM_DQS[0..7] MEM_DQS0 DQ37 {9,16} MEM_DQS[0..7] MEM_DQS0 DQ37
5 MEM_DAT A38
150 5 MEM_DAT A38
150
MEM_DQS1 14 DQS0 DQ38 151 MEM_DAT MEM_DQS1 14 DQS0 DQ38 151 MEM_DAT 3 7
MEM_DQS2 DQS1 DQ39 DQS1 DQ39 VSS0 VDD0
25 61 MEM_DAT A40 MEM_DQS2 25 61 MEM_DAT A40 11 38
MEM_DQS3 DQS2 DQ40 DQS2 DQ40 VSS1 VDD1
36 64 MEM_DAT A41 MEM_DQS3 36 64 MEM_DAT A41 18 46
MEM_DQS4 DQS3 DQ41 DQS3 DQ41 VSS2 VDD2
56 68 MEM_DAT A42 MEM_DQS4 56 68 MEM_DAT A42 26 70
MEM_DQS5 DQS4 DQ42 DQS4 DQ42 VSS3 VDD3
67 69 MEM_DAT A43 MEM_DQS5 67 69 MEM_DAT A43 34 85
MEM_DQS6 DQS5 DQ43 MEM_DQS6 DQS5 DQ43 VSS4 VDD4
78 153 MEM_DAT 78 153 MEM_DAT 42 108
MEM_DQS7 DQS6 DQ44 MEM_DQS7 DQS6 DQ44 VSS5 VDD5
86 A45 86 A45 50 120
DQS7 DQ45 DQS7 DQ45 VSS6 VDD6
{9,16} MEM_DQM[0..7] 47 155 MEM_DAT {9,16} MEM_DQM[0..7] 47 155 MEM_DAT 58 148
MEM_DQM0 DQS8 DQ46 MEM_DQM0 DQS8 DQ46 VSS7 VDD7
97 A44 97 A44 66 168
MEM_DQM1 DM0 DQ47 DM0 DQ47 VSS8 VDD8
107 72 MEM_DAT A49 MEM_DQM1 107 72 MEM_DAT A49 74 15
MEM_DQM2 DM1 DQ48 DM1 DQ48 VSS9 VDDQ9
119 73 MEM_DAT A48 MEM_DQM2 119 73 MEM_DAT A48 81 22
MEM_DQM3 DM2 DQ49 DM2 DQ49 VSS10 VDDQ10
129 79 MEM_DAT A50 MEM_DQM3 129 79 MEM_DAT A50 89 30
MEM_DQM4 DM3 DQ50 DM3 DQ50 VSS11 VDDQ11
149 80 MEM_DAT A51 MEM_DQM4 149 80 MEM_DAT A51 93 54
MEM_DQM5 DM4 DQ51 MEM_DQM5 DM4 DQ51 VSS12 VDDQ12
159 165 MEM_DAT 159 165 MEM_DAT 100 62
MEM_DQM6 DM5 DQ52 MEM_DQM6 DM5 DQ52 VSS13 VDDQ13
169 A52 169 A52 116 77
MEM_DQM7 DM6 DQ53 MEM_DQM7 DM6 DQ53 VSS14 VDDQ14
177 166 MEM_DAT 177 166 MEM_DAT 124 96
DM7 DQ54 DM7 DQ54 VSS15 VDDQ15
140 A53 140 A53 132 104
B 65
DM8 DQ55
DQ56
170
A54
84
MEM_DAT
65
DM8 DQ55
DQ56
170
A54
84
MEM_DAT 139
145
VSS16
VSS17
VDDQ16
VDDQ17
112
128
B
{9,16} MEM_A_CAS# CAS DQ57 {9,16} MEM_B_CAS# CAS DQ57 SMBus Address: A2 VSS18 VDDQ18
{9,16} MEM_A_RAS# 154 87 MEM_DAT A58 {9,16} MEM_B_RAS# 154 87 MEM_DAT A58 152 136
RAS DQ58 RAS DQ58 VSS19 VDDQ19
{9,16} MEM_A_WE# 63 88 MEM_DAT A59 {9,16} MEM_B_WE# 63 88 MEM_DAT A59 160 143
WE DQ59 WE DQ59 VSS20 VDDQ20
174 MEM_DAT A56 174 MEM_DAT A56 +3V 176 156
DQ60 DQ60 GND VSS21 VDDQ21
10 175 MEM_DAT 10 175 MEM_DAT 164
RESET DQ61 RESET DQ61 VDDQ22
A61 A61 181 172
DQ62 DQ62 SA0 VDDQ23
178 MEM_DAT 178 MEM_DAT 182 180 MEM_B_CS#[0..1] {9,16}
DQ63 DQ63 SA1 VDDQ24
183
184P 184P +2.5V_DUAL SA2 157
CS0
9 MEM_B_CS#0
NC0 CS1
90 158
NC1 CS2
101 MEM_B_CS#1
NC2 CS3
102
NC3
173 91 SMBDAT A {8,18,21,23,24,30}
DIMM_VREF NC4 SDA
92 SMBCLK {8,18,21,23,24,30}
SCL +3V
103
FETEN 82
VDDID
1 184
+2.5V_DUAL VREF VDSPD
CB121
0.1UF 184P
c0402

CB122 CB123 CB124 CB125 CB126 CB127 CB128 CB129 CB130 CB131 CB132 CB484 CB298 CB299 CB300 SMBCLK C274 1 Do Not
0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF Do Not Stuff 0.1UF 0.1UF c0402 GND
c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 0.1UF
NI c0402 c0402 c0402 NI
SMBDATA C275 1 Do Not
A Stuff c0402
NI
A
1229
GND
GND
Title : DIMM1&2 DDR
ASUSTek Computer Inc Engineer: HDRD2/TEAM1
Size Project Name Rev
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 15 of 40
2004
5 4 3 2 1
5 4 3 2 1
MEM_DATA[0..63] {9,15}
+VTT_DDR
MEM_DQM[0..7] {9,15} one 0402 0.1uF cap. per 4 DDR signals
MEM_DQS[0..7] {9,15}
+VTT_DDR
MEM_A_ADD[0..13] {9,15}
MEM_DATA0 MEM_A_CS#[0..1] {9,15}
RN4D 7 47Ohm
MEM_DATA1 MEM_B_ADD[0..13] {9,15}
RN4A 1 8
MEM_DATA2 MEM_B_CS#[0..1] {9,15}
RN5D 7
RN5A 1 47Ohm MEM_DATA3
2 MEM_DATA4
RN4C 5 47Ohm CB87 CB85 CB373 CB133 CB135 CB136 CB137 CB139 CB140 CB142 CB143 CB144 CB145 CB40 CB41 CB83 CB84 CB55 CB64 CB65
RN4B 3 MEM_DATA5 Do Not StuffDo Not Stuff 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
47Ohm
RN5B 3 47Ohm MEM_DATA6 c0402 c0805 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V
RN5C 5 MEM_DATA7 NI NI 1U
4 F/10V
D o Not Stuff
D RN6D 7
RN6B 3 47Ohm
6
MEM_DATA8
MEM_DATA9
MEM_DAT A10
+VTT_DDR D
RN7C 5 8 CN11D
47Ohm 6 7 22P GND
RN7A 1 MEM_DAT A11 1 2 CN8A
47Ohm GND
RN6C 5 MEM_DAT A12 CN8C
6 +VTT_DDR GND
2 MEM_DAT A13 22P GND
RN6A 1 CN12A2
47Ohm MEM_DAT A14 5 GND
RN7D 7
6 MEM_DAT A15 22P
RN7B 3 RN36D7 47Ohm
47Ohm MEM_DAT A16 1
RN15B3 RN14A1
2 MEM_DAT A17 8 22P
RN15C5 RN14C5
RN8D 7 47Ohm MEM_DAT A18 RN12A1 47Ohm MEM_A_ADD3 CB86 CB376 CB174 CB148 CB149 CB150 CB151 CB152 CB146 CB154 CB155 CB156 CB157 CB67 CB68 CB81 CB82 CB159 CB66
47Ohm 47Ohm
RN8A 1 MEM_DAT A19 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF CB160
8 0.1UF 1UF/10V 1UF/10V 1UF/10V
RN15D7 MEM_DAT A20 RN12C5 MEM_A_ADD4 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402
47Ohm 47Ohm
RN15A1 MEM_DAT A21 RN27B3 MEM_A_ADD5
8 6
RN8C 5 MEM_DAT A22 RN27A1 MEM_A_ADD6
RN8B 3 47Ohm MEM_DAT A23 RN33C5 47Ohm MEM_A_ADD7
2 MEM_DAT A24 4
RN28D7
47Ohm MEM_DAT A25 6 CN13C
RN28A1 2 5 22P GND
RN11C5 47Ohm 6 MEM_DAT A26 1 2 CN9A +2.5V_DUAL +VTT_DDR GND
47Ohm MEM_DAT A27 GND
RN11B3 5 6 CN9C
47Ohm GND
RN28C5 MEM_DAT A28 6
4 MEM_DAT A29 22P GND
RN28B3
RN11D7 47Ohm MEM_DAT A30
6 MEM_DAT A31
RN11A 1 2 1 2 GND
47Ohm MEM_DAT A32 CB473 CB474 CB475 CB476 CB153 CB134 CB141 CB375 CB138
RN13D7 47Ohm 1 2
MEM_DAT A33 GND
RN13B 3 4 3 4 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
47Ohm MEM_DAT A34 GND
RN16D7 47Ohm 5 6 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402
MEM_DAT A35 GND
RN16A1 8
RN13C5 MEM_DAT A36 RN33A1 22P
47Ohm 47Ohm
MEM_DAT A37
C RN13A1
RN16C5
RN16B3
2
47Ohm
MEM_DAT A38
MEM_DAT A39
RN10A1
RN36B3
RN10C5
2
47Ohm
MEM_A_ADD8
MEM_A_ADD10
MEM_A_ADD11
+2.5V_DUAL +VTT_DDR C
6 4
RN34D7 MEM_DAT A40
RN34A1 47Ohm MEM_DAT A41 RN3A 1 47Ohm MEM_A_ADD12
4 6
RN29D7 MEM_DAT A42 RN36C5 MEM_B_ADD0
RN29C5 47Ohm MEM_DAT A43 RN14B3 MEM_B_ADD1
8 47Ohm
RN34B3 MEM_DAT A44 RN14D7 MEM_B_ADD2 CB170 CB171 CB172 CB173 CB147 CB168 CB165 CB167 CB169 CB166
47Ohm 47Ohm
RN34C5 MEM_DAT A45 0.1UF 0.1UF 0.1UF 0.1UF Do Not Do Not Do Not Stuff
47Ohm
RN29B3 MEM_DAT A46 7 8 c0402 c0402 c0402 c0402 Stuff0.1UFc0402
c0402 Stuff0.1UFc0402
c0402 c0402 c0402
47Ohm GND
MEM_DAT A47 3 4 NI NI NI NI
1 RN29A
2 GND
RN19C5 MEM_DAT A48 5 6
47Ohm GND
RN19D7 8 MEM_DAT A49 1 CN11C
2
6 22P GND
RN21C5 MEM_DAT A50
47Ohm
RN21A1 MEM_DAT A51
6
RN19B3 4 MEM_DAT A52 3 22P 4 CN12B
47Ohm MEM_DAT A53 GND
RN19A1 7 8 CN12D
47Ohm GND
RN21D7 MEM_DAT A54 8 +VTT_DDR
2 MEM_DAT A55 22P GND
RN21B3 4 3 4CN9D GND
47Ohm MEM_DAT A56 7
RN22D7 47Ohm
RN22A1 MEM_DAT A57 RN12B3 MEM_B_ADD3
8 47Ohm
RN24C5 MEM_DAT A58 RN12D7 MEM_B_ADD4 RN35A1
47Ohm 4 47Ohm MEM_A_CAS# {9,15}
MEM_DAT A59 MEM_B_ADD5
RN24A 1 2
47Ohm RN27D 7 8
47Ohm RN31A 1 2
47Ohm MEM_A_RAS# {9,15}
RN22C5 MEM_DAT A60 RN27C5 MEM_B_ADD6 RN35D7
47Ohm 47Ohm 47Ohm MEM_A_WE# {9,15}
MEM_DAT A61
RN22B 3 4
47Ohm RN3C 5 6
47Ohm MEM_A_CKE {9,15}
RN24D7 MEM_DAT A62 RN33D7 MEM_B_ADD7
47Ohm 47Ohm
MEM_DAT A63 MEM_B_ADD8 5 6 CN10C
RN24B 3 4
47Ohm RN33B 3 4
47Ohm 22P GND
RN10B3 MEM_B_ADD9 3 4 CN18B
47Ohm GND
RN36A1 MEM_B_ADD10 6 CN18C
4 22P GND
5 6 CN17C
B R115 56Ohm
2
r0402 MEM_DQM0 1 1 CN11A
2
CN14B
4
GND
5 GND
B
22P GND
R116 1 2
56Ohm r0402 MEM_DQM1 1 3 4 CN13B GND 7 8 CN10D
GND
R118 1 2 56Ohm r0402MEM_DQM3 7 8 1 2 CN18A
GND GND
MEM_DQM4
1 R 119 2 56Ohm r0402 7 8 CN18D
22P GND
R120 1 2 56Ohm r0402MEM_DQM5 7 8 CN17D
GND
MEM_DQM6
R 133 1 2 56Ohm 7 8 GND
R134 1 2 56Ohm r0402 3 4 RN35B3 47Ohm
GND MEM_B_CAS# {9,15}
MEM_DQM7 CN10B RN31B3
22P GND 4 MEM_B_RAS# {9,15}
4 RN35C5
3 GND 47Ohm MEM_B_WE# {9,15}
RN3D 7
22P 4 MEM_B_CKE {9,15}
RN10D7 47Ohm 1
R135 1 2 56Ohm r0402 RN3B 3 8
RN9B 3 22P
MEM_DQS0
RN9A 1 47Ohm MEM_B_ADD11
R136 1 2 56Ohm r0402 4
MEM_DQS1
R144 1 2 56Ohm r0402 RN31D7 8
47Ohm MEM_B_BA0 {9,15}
R141 1 2 56Ohm r0402MEM_DQS6 RN30B3 47Ohm
R105 1 2 121Ohm
MEM_A_CLK0#
MEM_B_BA1 {9,15} {9,15} MEM_A_CLK0
MEM_DQS7
R142 1 2 56Ohm RN31C5 4 MEM_A_BA0 {9,15} {9,15}
RN30A1
47Ohm MEM_A_BA1 {9,15} 1%
{9,15} MEM_A_CLK1
5 6 1%
GND
RN30C5 47Ohm CN15C
22P GND
RN30D7 2 CN15A R107 1 2 121Ohm
6 1 GND {9,15} MEM_A_CLK2 MEM_A_CLK2#
RN9C 5 8
47Ohm 22P GND {9,15}
RN9D 7 CN15D
8 7 1%
4 CN15B
22P {9,15} MEM_B_CLK0
3 GND R108 1 2 121Ohm
MEM_B_CLK0#
A 22P
5
4 CN17B
2 CN17A
6
GND
GND
GND
{9,15} MEM_B_CLK1 {9,15}
1% A
22P R110 121Ohm
RN37C 5 6
47Ohm {15} MEM_B_CLK2 1 2 MEM_B_CLK2# 1229
RN37B3 47Ohm MEM_A_CS#0 1%
RN37D7 MEM_B_CS#0
4
RN37A1
47Ohm
MEM_B_CS#1 Title : DDR TERMINATION
ASUSTek Computer Inc Engineer: HDRD2/TEAM1
Size Project Name Rev
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 16 of 40
2004
5 4 3 2 1
5 4 3 2 1

OE A Y

H L L
H H
H
D L X Z D

+5V_VGA

L13
120Ohm/100Mhz
F1 l1206 Irat=2A
1.02 Modify 1 2 1 2

1.1A/6V CB204
0.1UF

L14 L15
1 2 RA 1 2 RED VGA1
{13} VGA_RED
0.082UH 0.082UH 16 GND
C67 R121 C68 C69 C70 6 GND2
Do Not Stuff75Ohm Do Not Stuff Do Not Stuff 18P RED 1
0.5PF 1% ± 5% ± 0.25PF 5% 11 NC2
NI 1.02 Modify 7
NI NI GREEN GND3
RDDCA_DATA R122 1 2 100 2
GND GND GND GND GND 8
BLUE GND4
L16 L17 R123 1 2 10Ohm 3
{13} VGA_HSYNC
1 2 GA 2 GREEN VHSYNC BLUE
C
{13} VGA_GREEN 13 C
0.082UH 0.082UH HSYNC
{13} VGA_VSYNC
C71 R124 C72 C73 C74 9
10
75Ohm Do Not Do Not Stuff Do Not Stuff 18P 5
Stuff
0.5PF 1% ± 5% ± 0.25PF 5% RDDCA_CLK R126 1 2 15
NI DCLK 17
NI NI SIDE_G17
C262 C263 C264 C265 15P3R
GND GND GND GND GND 100P 100P 82P 82P
+/-5% +/-5% 5% 5%

L18 L19
1 2 BA 1 2 BLUE
{13} VGA_BLUE
GND GND GND GND GND
0.082UH 0.082UH
C75 R127 C76 C77 C78
Do Not Stuff75Ohm Do Not Stuff Do Not Stuff 18P
0.5PF 1% ± 5% ± 0.25PF 5%
NI
NI NI J54 Parallel, Serial, VGA combo-connector: 20u" Au
GND GND GND GND GND
12-102160259 FOXCONN/DM11352-PG1

SCON1 NI

B Do Not Stuff B
L20 SIDE_G1
1 2 C 3 C GND1 1
{13} TV_C
SIDE_G3 7
3(D) Do Not Stuff Y 4 GND2 2
R128 C79 C80 Y
Do Not Stuff Do Not Do Not Stuff SIDE_G2
1% StuffNI 5%
5%
2N7002 +5V NI NI NI

L21
1(G) 2(S) 1 2 12-141020041 鴻 海
{13} TV_Y
D1 GND 12-141010040 英 京
SS12 Do Not Stuff
850mV/1A R129 C81 C82
+5V_VGA Do Not Stuff Do Not StuffNI Do Not Stuff
1% 5% 5%
NI
NI NI AVCON1 NI
L22
+3V 1 2 COMP 1 12-143010048 捷 泰
{13} TV_COMP C
GND1 GND3
12-143010044 榮 見
Do Not Stuff GND2
12-143010049 JT
3 4 RN63B R130 C83 C84
4.7K 12-143010045 東 滕
7 8 RN63D Do Not Stuff NIDo Not Stuff Do Not Stuff
4.7K
5 6 RN63C R131 R132 1% 5% 5%
4.7K
1 2 RN63A 2.2KOhm 2.2KOhm NI Do Not Stuff
4.7K
NI NI
A A

Q2 RDDCA_CLK GND
{13} DDCA_CLK
2N7002

Q3 RDDCA_DATA
Title : VGA PORT
{13} DDCA_DATA
2N7002 ASUSTeK COMPUTER INC Engineer: Mario Zeng
Size Project Name Rev
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 17 of 40
5 4 3 2 2004 1
5 4 3 2 1

+3VSB +3V +12V PCIEX1 +12V +3V

B1 A1
+12V_1 PRSNT1#
B2 A2
+12V_2 +12V_3
B3 A3
RSVD1 +12V_4
B4 A4
SMBCLK GND1 GND35
B5 A5 RN79C 6
{8,15,21,23,24,30} SMBCLK SMCLK JTAG2 4.7KOhm
SMBDATA B6 A6
{8,15,21,23,24,30} SMBDAT A SMDAT JTAG3 5
B7 A7
GND2 JTAG4 RN79B 4 4.7KOhm
D C86 C85 B8 A8 D
Do Not Stuff +3.3V_1 JTAG5 3
1.02 Modify RN79D 8 B9 A9 GND
4.7KOhm JTAG1 +3.3V_2
Change to c0402 c0402 B10 A10
3.3Vaux +3.3V_3
10pF NI NI B11 A11
{21} PCIE_WU# WAKE# PWRGD PCIE_RST# {30}

GND GND
C13
Do Not Stuff
B12 A12 c0402
RSVD2 GND36 CK_100M_PE16
B13 A13 CK_100M_PE16 {8}
NPO
C87 EXP_TXP0_C GND3 REFCLK+
2 1 0.1U B14 A14 CK_100M_PE16#
CK_100M_PE16# {8}
NI
{12} GFX_TX0P 10% C88 EXP_TXN0_C HSOP0 REFCLK-
2 1 0.1U B15 A15
{12} GFX_TX0N HSON0 GND37 EXP_RXP0
B16 A16 GFX_RX0P {12} GND
GND4 HSIP0 EXP_RXN0
B17 A17 GFX_RX0N {12}
{13} I2C_CLK PRSNT2_1# HSIN0
B18 GND5 A18
GND38

C89 2 1 0.1U EXP_TXP1_C B19 A19


{12} GFX_TX1P C90 2 EXP_TXN1_C HSOP1 RSVD6
1 0.1U B20 A20
{12} GFX_TX1N HSON1 GND39 EXP_RXP1
B21 A21 GFX_RX1P {12}
GND6 HSIP1 EXP_RXN1
B22 A22 GFX_RX1N {12}
C91 EXP_TXP2_C GND7 HSIN1
2 1 0.1U B23 A23
{12} GFX_TX2P C92 2 EXP_TXN2_C HSOP2 GND40 +3V 1.02 Modify
1 0.1U B24 A24
{12} GFX_TX2N HSON2 GND41 EXP_RXP2
B25 A25 GFX_RX2P {12}
GND8 HSIP2 EXP_RXN2
B26 A26 GFX_RX2N {12}
C93 1 0.1U 10% EXP_TXP3_C GND9 HSIN2
2 B27 A27
{12} GFX_TX3P C94 2 EXP_TXN3_C HSOP3 GND42
1 0.1U B28 A28 + +
{12} GFX_TX3N 10% HSON3 GND43 EXP_RXP3 CB209 CB210
B29 A29 CE2 CE3
GND10 HSIP3 GFX_RX3P {12}
B30 A30 EXP_RXN3 0.1UF Do Not Do Not Stuff1000UF/6.3V
C RSVD3 HSIN3 GFX_RX3N {12} Stuff C
B31 A31 NI
{13} I2C_DATA PRSNT2_2# GND44 NI
B32 GND11 A32
RSVD7

C95 2 1 0.1U EXP_TXP4_C B33 A33 GND


{12} GFX_TX4P C96 2 EXP_TXN4_C HSOP4 RSVD8
1 0.1U B34 A34
{12} GFX_TX4N HSON4 GND45 EXP_RXP4 +12V
B35 A35 GFX_RX4P {12}
GND12 HSIP4 EXP_RXN4
B36 A36 GFX_RX4N {12}
C97 1 0.1U EXP_TXP5_C GND13 HSIN4
2 B37 A37
{12} GFX_TX5P C98 2 EXP_TXN5_C HSOP5 GND46
1 0.1U B38 A38
{12} GFX_TX5N HSON5 GND47 EXP_RXP5 CB211 CB212
B39 A39 GFX_RX5P {12} +
GND14 HSIP5 EXP_RXN5 0.1UF Do Not
B40 A40 GFX_RX5N {12}
C99 EXP_TXP6_C GND15 HSIN5 Stuff
c0402 c0402 470UF/16V
2 1 0.1U B41 A41
{12} GFX_TX6P EXP_TXN6_C HSOP6 GND48 NI
10% 1 0.1U B42 A42
{12} GFX_TX6N HSON6 GND49 EXP_RXP6
B43 A43 GFX_RX6P {12}
GND16 HSIP6 EXP_RXN6
B44 A44 GFX_RX6N {12}
EXP_TXP7_C GND17 HSIN6
C101 1 0.1U B45 A45
{12} GFX_TX7P EXP_TXN7_C HSOP7 GND50
10% 1 0.1U B46 A46 GND
{12} GFX_TX7N HSON7 GND51 EXP_RXP7
B47 A47 GFX_RX7P {12}
GND18 HSIP7 EXP_RXN7 +3VSB
{13} TVCLKIN B48 A48 GFX_RX7N {12}
PRSNT2_3# HSIN7
B49 A49
EXP_TXP8_C GND19 GND52
C103 1 0.1U 10% B50 A50
{12} GFX_TX8P EXP_TXN8_C HSOP8 RSVD9
C104 2 1 0.1U B51 A51
{12} GFX_TX8N HSON8 GND53 EXP_RXP8 CB213
10% B52 A52
GND20 HSIP8 GFX_RX8P {12}
B53 A53 EXP_RXN8 0.1UF
EXP_TXP9_C GND21 HSIN8 GFX_RX8N {12}
C105 1 0.1U B54 A54
{12} GFX_TX9P EXP_TXN9_C HSOP9 GND54
2 10% B55 A55
{12} GFX_TX9N C106 2 HSON9 GND55 EXP_RXP9
1 0.1U B56 A56
GND22 HSIP9 GFX_RX9P {12}
10% B57 A57 EXP_RXN9
B EXP_TXP10_C GND23 HSIN9 GFX_RX9N {12} B
B58 A58 GND
{12} GFX_TX10P EXP_TXN10_C HSOP10 GND56
C107 1 0.1U B59 A59
{12} GFX_TX10N 2 10% HSON10 GND57 EXP_RXP10
B60 A60 GFX_RX10P {12}
C108 2 1 0.1U GND24 HSIP10 EXP_RXN10
B61 A61 GFX_RX10N {12}
10% EXP_TXP11_C GND25 HSIN10
B62 A62
{12} GFX_TX11P EXP_TXN11_C HSOP11 GND58
B63 A63
{12} GFX_TX11N HSON11 GND59
C109 1 0.1U B64 A64 EXP_RXP11
GND26 HSIP11 GFX_RX11P {12}
2 10% B65 A65 EXP_RXN11
GND27 HSIN11 GFX_RX11N {12}
C110 2 1 0.1U EXP_TXP12_C B66 A66
{12} GFX_TX12P 10% EXP_TXN12_C HSOP12 GND60
B67 A67
{12} GFX_TX12N HSON12 GND61
B68 A68 EXP_RXP12
GND28 HSIP12 GFX_RX12P {12}
C111 1 0.1U B69 A69 EXP_RXN12
GND29 HSIN12 GFX_RX12N {12}
2 10% EXP_TXP13_C B70 A70
{12} GFX_TX13P C112 2 1 0.1U EXP_TXN13_C HSOP13 GND62
B71 A71
{12} GFX_TX13N 10% HSON13 GND63
B72 A72 EXP_RXP13
GND30 HSIP13 GFX_RX13P {12}
C113 1 0.1U B73 A73 EXP_RXN13
2 10% EXP_TXP14_C GND31 HSIN13 GFX_RX13N {12}
B74 A74
{12} GFX_TX14P C114 2 1 0.1U EXP_TXN14_C HSOP14 GND64
B75 A75
{12} GFX_TX14N 10% HSON14 GND65 EXP_RXP14
B76 A76 GFX_RX14P {12}
GND32 HSIP14 EXP_RXN14
B77 A77 GFX_RX14N {12}
EXP_TXP15_C GND33 HSIN14
B78 A78
{12} GFX_TX15P C115 1 0.1U HSOP15 GND66
EXP_TXN15_C B79 A79
{12} GFX_TX15N 10% HSON15 GND67 EXP_RXP15
B80 A80 GFX_RX15P {12}
GND34 HSIP15 EXP_RXN15
B81 A81 GFX_RX15N {12}
{13} TMDS_HPD PRSNT2_4# HSIN15
B82 A82
RSVD4 GND68

A PCI_EXPRESS_X16 A

GND GND
Title : PCI EXPRESS 16 PORT
PCI EXPRESS X16 Graphics Card Slot ASUSTeK COMPUTER INC Engineer: Mario Zeng
Size Project Name Rev
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 18 of 40
5 4 3 2 2004 1
5 4 3 2 1

U5A
Part 1 of 4 RPCICLK_SL1
{13} NB_RST#
R140 33
1 2 AH8
A_RST# SB400 SB PCICLK0
L4 3
47Ohm 4 RN25B PCICLK_SL1 {23}
L3 RPCICLK_SL2 5
33 PCICLK1 RPCICLK_SL3 47Ohm 6 PCICLK_SL2 {23}
R143 1 2 L27 L2 7 8 RN25D PCICLK_SL3 {22,24}
{30} LPC_RST# {8} SBSRCCLK PCIE_RCLKP PCICLK2 47Ohm
K27 L1 RPCICLK_SIO 1 2 RN25A
PCIE_VSS_13 PCICLK3 47Ohm PCICLK_SIO {22,30}
D M4 RPCICLK_1394 1 2 RN26A D
PCICLK4 47Ohm PCICLK_1394 {22,25}
EE95 R147 M30 M3 RPCICLK_ROM 7 8
{12} SB_RX0P PCIE_TX0P PCICLK5 PCICLK_ROM {22,33}
Do Not Stuff N30 M2 RPCICLK_SL4 RN26D
Do Not Stuff {12} SB_RX0N PCIE_TX0N PCICLK6 47Ohm PCICLK_SL4 {22}
NI K30 M1 RPCICLK_SL5
c0402 {12} SB_RX1P PCIE_TX1P PCICLK7 PCICLK_SL5 {22}
L30 N4 RPCICLK_LAN 5
{12} SB_RX1N PCIE_TX1N PCICLK8 RPCICLK_FB PCICLK_LAN
GND H30 N3 3 46 {22,26}
PCIE_TX2P PCICLK9 PCICLK_FB
J30 N2
PCIE_TX2N PCICLK_FB
GND F30
PCIE_TX3P 33
G30 AJ7 R153 1 2 PCIRST# {23,24}
PCIE_TX3N PCIRST#
W3 A_D0 {23..26}
PCIE_RX0P AD0/ROMA18
M29 Y2
{12} SB_TX0P PCIE_RX0N AD1/ROMA17 A_D1 {23..26}
N29 W4 R154
{12} SB_TX0N AD2/ROMA16 A_D2 {23..26}
M28 Y3 Do Not Stuff EE81
{12} SB_TX1P PCIE_RX1P AD3/ROMA15 A_D3 {23..26}
N28 V1 NI Do Not Stuff
{12} SB_TX1N PCIE_RX1N AD4/ROMA14 A_D4 {23..26} PCICLK_FB
J29 Y4 c0402 C123 1 Do Not
PCIE_RX2P AD5/ROMA13 A_D5 {23..26}
K29 V2 NI c0402
PCIE_RX2N AD6/ROMA12 A_D6 {23..26}
+PCIE_VDDR J28 W2 GND NI
PCIE_RX3P AD7/ROMA11 A_D7 {23..26}
K28 AA4 A_D8 {23..26} GND
PCIE_RX3N AD8/ROMA9 PCICLK_SL1 C253 2
V4 1 Do Not Stuff
AD9/ROMA8 A_D9 {23..26}
R155 1 2 150Ohm G27 AA3 c0402
PCIE_CALRP AD10/ROMA7 A_D10 {23..26}
1% H27 U1 NI
PCIE_CALRN AD11/ROMA6 A_D11 {23..26} PCICLK_SL2
r0402 AA2 C254 1 Do Not
AD12/ROMA5 A_D12 {23..26}
+1.8V R157 1 2 4.12KOhm G28 U2 Stuff c0402
PCIE_CALI AD13/ROMA4 A_D13 {23..26} NI
L23 8/19 modify AD14/ROMA3
AA1 A_D14 {23..26}
1 2 PCIE_PVDD R30 U3 PCICLK_SL3 C255 1 Do Not
PCIE_PVDD AD15/ROMA2 A_D15 {23..26}
PCIE_CALI T4 Stuff c0402
AD16/ROMD0 A_D16 {23..26}
120Ohm/100Mhz 11、 A12 -> 4.53K CB215 CB216 F26 AC1 NI
A PCIE_VDDR_1 AD17/ROMD1 A_D17 {23..26} PCICLK_SIO
Irat=600mA Do Not R29 R2 C258 1 Do Not
PCIE_VDDR_2 AD18/ROMD2 A_D18 {23..26}
A21、 A22( RP2) -> 5.5K Stuff0.1UF G26 AD4 2 Stuff c0402
C NI PCIE_VDDR_3 AD19/ROMD3 A_D19 {23..26} C
A22( RP3) -> 4.12K P26 R3 NI
PCIE_VDDR_4 AD20/ROMD4 A_D20 {23..26} PCICLK_1394
K26 AD3 1 Do Not
PCIE_VDDR_5 AD21/ROMD5 A_D21 {23..26} Stuff c0402
L26 R4 A_D22 {23..26}
PCIE_VDDR_6 AD22/ROMD6 NI
+1.8V GND +PCIE_VDDR P28 AD2 A_D23 {22..26}
L24 N26 PCIE_VDDR_7 AD23/ROMD7 P2 PCICLK_ROM C260 1 Do Not
PCIE_VDDR_8 AD24 A_D24 {22..26}
1 2 P27 AE3 c0402
PCIE_VDDR_9 AD25 A_D25 {22..26}
P3 NI
AD26 A_D26 {22..26} PCICLK_LAN
70Ohm/100Mhz CB217 CB220 CB221 SCB17 SCB18 SCB3 H28 AE2 C261 1 Do Not
PCIE_VSS_1 AD27 A_D27 {22..26}
l0805_h43 0.1UF
Do Not Stuff 0.1UF D o Not 0.1UF 0.1UF F29 P4 c0402
Stuff PCIE_VSS_2 AD28 A_D28 {22..26}
Irat=3A c0805 H29 AF2 NI
NI PCIE_VSS_3 AD29 A_D29 {22..26}
NI H26 N1 A_D30 {22..26}
PCIE_VSS_4 AD30
F27 AF1 A_D31 {22..26} GND
PCIE_VSS_5 AD31
G29 V3 C/BE0# {23..26}
PCIE_VSS_6 CBE0#/ROMA10
GND L29 AB4 C/BE1# {23..26}
PCIE_VSS_7 CBE1#/ROMA1
J26 AC2 C/BE2# {23..26}
PCIE_VSS_8 CBE2#/ROMWE#
L28 AE4 C/BE3# {23..26}
PCIE_VSS_9 CBE3#
J27 T3 +3V
PCIE_VSS_10 FRAME# FRAME# {23..26}
N27 AC4 DEVSEL# {23,24}
PCIE_VSS_11 DEVSEL#/ROMA0
GND M26 AC3 IRDY# {23..26}
PCIE_VSS_12 IRDY# 1394_INT# RN64D
M27 T2 7 4.7KOhm8
{8} SBSRCCLK# PCIE_RCLKN TRDY#/ROMOE# TRDY# {23..26} LAN_INT#
P29 U4 1 RN64A
PCIE_VSS_14 PAR/ROMA19 PAR {23..26} 4.7KOhm2
P30 T1 INTG# 5 RN64C
PCIE_VSS_15 STOP# STOP# {23..26} 4.7KOhm6
AB2 INTH# 3 RN64B
PERR# PERR# {23..26} 4.7KOhm4
T14 NI1 Do Not StuffAJ8 AB3
CPU_STP#/DPSLP# SERR# SERR# {23,24,26} REQ4#
T15 1 NI AK7
Do Not Stuff AF4 1 RN65A
PCI_STP# REQ0# REQ0# {24,25} 4.7KOhm2
WIREX2 AG5 AF3 LDREQ1#_SB 5 RN65C
{23,24} INTA# INTA# REQ1# REQ1# {23,24} PCI_CLKRUN# 4.7KOhm6
AH5 AG2 7 RN65D
{23,24} INTB# INTB# REQ2# REQ2# {23,24} REQ5# 4.7KOhm8
AJ5 AG3 3 RN65B
{23,24} INTC# INTC# REQ3#/PDMA_REQ0# REQ4#
REQ3# {24} 4.7KOhm4
AH6 AH1
B {23,24} INTD# 1394_INT# INTD# REQ4#/PLL_BP33/PDMA_REQ1# REQ5# BMREQ# R33 B
JUMPER_WIRE AJ6 AH2 2 1
{25} 1394_INT# LAN_INT# INTE#/GPIO33 REQ5#/GPIO13
0.5*6.3*4*6.3mm AK6 AH3 REQ6# {24,26}
{26} LAN_INT# INTG# INTF#/GPIO34 REQ6#/GPIO31
AG7 AJ2 GNT0# {24,25}
INTH# INTG#/GPIO35 GNT0#
AH7 AK2 GNT1# {23,24}
INTH#/GPIO36 GNT1#
AJ3 GNT2# {23,24}
GNT2#
AK3 GNT3# {24}
X_IN GNT3#/PLL_BP66/PDMA_GNT0#
B2 AG4
X1 GNT4#/PLL_BP50/PDMA_GNT1# GNT4# {24}
1.02 GNT5#/GPIO14
AH4
GNT5# {24}
3 X2 R158 1 2 20MOhm AJ4
Modify 2 GND 1 X_OUT B1
GNT6#/GPIO32
AG1 PCI_CLKRUN# GNT6# {24,26}
X2 CLKRUN#
GND AB1 PLOCK# {23,24}
R159 4 32.768KHZ LOCK#
1MOhm AG25
LAD0 LAD0 {30,33}
C29 AH25 LAD1 {30,33}
C124 T25 CPU_PG/LDT_PG LAD1
C125 1 AJ25
INTR/LINT0 LAD2 LAD2 {30,33}
22P 22P NI C28 AH24
NMI/LINT1 LAD3 LAD3 {30,33}
5% 5% T8 1 Do Not AG24
INIT# LFRAME# LFRAME# {30,33}
NI D29 AH26
SMI# LDRQ0# LDREQ0# {30}
E4 LDREQ1#_SB
AG26
{10,11,13} LDTSTOP# SLP#/LDT_STP# LDRQ1# 1.02 Modify
B30
IGNNE#
GND F28 AK27
A20M# SERIRQ SERIRQ {30}
+1.2VA R161 1 2 Do Not Stuff
NI FERR#
E29 C2 SB_RTCCLK {22,30}
{13} ALLOW_LDTSTOP STPCLK#/ALLOW_LDTSTP RTCCLK D11
{10} SB_CPUPWRGD
D25
SSMUXSEL/GPIO0 RTC_IRQ#/ACPWR_STRAP
F3 AUTO_ON# {22}
BATT SB400 has internal
E27 1R162 1 2 1KOhm
BMREQ# D27 DPRSLPVR A2 3
BATTERY circuit,
{13} BMREQ# BMREQ# VBAT add this for A8000.
D28 A1 2
{10} LDT_RST# LDT_RST# RTC_GND CB224 CB225
A EE97 SB400 0.1UF Do Not Stuff A
NI BATTERY2 BAT54CW +3VSB BATTER Y1
Do Not Stuff 1V/0.2A BATT HOLDER/CR2032
c0402
EE96
NI KTS
Do Not Stuff
LITHIUM BATT
CR2032
GND
c0402
Title : ATI SB 400 1 OF 4
GND GND
NI 3V/220mAh

GND ASUSTeK COMPUTER INC Engineer: Mario Zeng


Size Project Name Rev
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 19 of 40
5 4 3 2 2004 1
5 4 3 2 1

+3V
U5C
U5B A30 E19
CB229 CB230 CB231 VDDQ_1Part 3 of 4 VSS_12
Part 2 of 4 D30 SB400 SB E22
CB226 CB227 CB228 Do Not StuffD o Not VDDQ_2 VSS_13
AK22 SB400 SB AD30 PIDE_DIORDY E24 E23
SATA_TX0+ PIDE_IORDY Stuff VDDQ_3 VSS_14
AJ22 AE28 {27} 0.1UF 0.1UF 0.1UF BOT E25 E26
SATA_TX0- PIDE_IRQ NI BOT
NI BOT
NI VDDQ_4 VSS_15
AD27 PIDE_IRQ14 {27}
PIDE_DA0 {27} J5 E30
SATA_RX0- PIDE_A0 VDDQ_5 VSS_16
AK21 AC27 PIDE_DA1 {27} K1 F1
SATA_RX0+ PIDE_A1 VDDQ_6 VSS_17
AJ21 AD28 PIDE_DA2 {27} K5 F4
SATA_TX1+ PIDE_A2 VDDQ_7 VSS_18
AD29 PIDE_DDACK# {22,27} N5 G5
PIDE_DACK# VDDQ_8 VSS_19
D AK19 AE27 L25 GND P5 H5 D
PIDE_DRQ PIDE_DDREQ {27} VDDQ_9 VSS_20
AJ19 AE30 +1.8V 120Ohm/100Mhz +AVDDCK R1 J1
SATA_TX1- PIDE_IOR# PIDE_DIOR# {27} VDDQ_10 VSS_21
AE29 Irat=600mA U5 J4
PIDE_IOW# PIDE_DIOW# VDDQ_11 VSS_22
AK18 AC28 {27} 1 2 U26 K4
SATA_RX1- PIDE_CS1# VDDQ_12 VSS_23
AJ18 AC29 PIDE_DCS1# {27}
PIDE_DCS3# U30 L5
SATA_RX1+ PIDE_CS3# CB232 CB233 VDDQ_13 VSS_24
PIDE_D[15..0] V5 M5
SATA_TXP0_C VDDQ_14 VSS_25
C126 1 AK14 AF29 PIDE_D0 {27} 1UF/10V 0.1UF V26 P1
{27} SATA_TXP0 SATA_TXN0_C SATA_TX2+ PIDE_D0 VDDQ_15 VSS_26
2 0.01U AJ14 AF27 PIDE_D1 Do Not Stuff Y1 R5
{27} SATA_TXN0 SATA_TX2- PIDE_D1 VDDQ_16 VSS_27
AG29 PIDE_D2 1NI 2 Y26 R26
SATA_RXN0_C PIDE_D2 VDDQ_17 VSS_28
C128 1 AK13 PIDE_D3
AH30 AA5 T5
{27} SATA_RXN0 SATA_RXP0_C SATA_RX2- PIDE_D3 VDDQ_18 VSS_29
2 0.01U AJ13 PIDE_D4
AH28 JP10 AA26 T26
{27} SATA_RXP0 SATA_RX2+ PIDE_D4 VDDQ_19 VSS_30
AK29 PIDE_D5 GND AVSSCK AB5 T30
SATA_TXP1_C PIDE_D5 VDDQ_20 VSS_31
C130 1 AK11 AK28 PIDE_D6 AC30 W1
{27} SATA_TXP1 SATA_TXN1_C SATA_TX3+ PIDE_D6 VDDQ_21 VSS_32
C131 1 AJ11 AH27 AD5 W5
{27} SATA_TXN1 SATA_TX3- PIDE_D7 +1.8V VDDQ_22 VSS_33
PIDE_D7 AD26 W26
SATA_RXN1_C PIDE_D8 VDDQ_23 VSS_34
C132 2 1 0.01U AK10 AJ28 PIDE_D9 AE1 Y5
{27} SATA_RXN1 SATA_RXP1_C SATA_RX3- PIDE_D9 VDDQ_24 VSS_35
C133 1 AJ10 AJ29 PIDE_D10 AE5 AB26
{27} SATA_RXP1 SATA_RX3+ PIDE_D10 VDDQ_25 VSS_36
AH29 PIDE_D11 AE26 AB30
PIDE_D11 CB467 CB468 CB469 CB470 VDDQ_26 VSS_37
R163 1 2 1KOhm1% AG28 AF6 AC5
SATA_CAL PIDE_D12 Do Not Stuff Do Not StuffDo Not Stuff VDDQ_27 VSS_38
C142 1 Do Not AG30 AF7 AC26
PIDE_D13 VDDQ_28 VSS_39
SATA_XIN NI AJ16 AF30 PIDE_D14 c0805 BOT BOT BOT AF24 AD1
SATA_X1 PIDE_D14 VDDQ_29 VSS_40
AF28 PIDE_D15 BOT NI NI NI AF25 AF5
GND SATA_XOUT PIDE_D15 VDDQ_30 VSS_41
AK16 NI AK1 AF8
SATA_X2 VDDQ_31 VSS_42
V29 SIDE_DIORDY AK4 AF23
SIDE_IORDY VDDQ_32 VSS_43
R164 10MOhm AK8 T27 {27} GND AK26 AF26
{27} SATALED# SATA_ACT# SIDE_IRQ VDDQ_33 VSS_44
T28 SIDE_IRQ15 {27} +1.8V AK30 AG8
X3 +PLLVDD_SAT A SIDE_A0 VDDQ_34 VSS_45
AH15 U29 SIDE_DA0 {27}
SIDE_DA1 {27} AJ1
1 2 PLLVDD_SATA SIDE_A1 VSS_46
T29 SIDE_DA2 {27} M12 AJ24
SIDE_A2 VDD_1 VSS_47
GND +XTLVDD_SATA AH16 V30 M13 AJ30
C XTLVDD_SATA SIDE_DACK# SIDE_DDACK# {27} VDD_2 VSS_48 C
3 25 MHZ U28 CB234 CB235 CB236 CB237 CB238 CB239 CB240 M18 AK5
SIDE_DRQ SIDE_DDREQ {27} VDD_3 VSS_49
AG10 W29 Do Not Do Not Stuff Do Not M19 AK25
AVDD_SATA_1 SIDE_IOR# SIDE_DIOR# {27} Stuff0.1UF Stuff0.1UF VDD_4 VSS_50
C143 C144 +1.8V_SAT A AG14 W30 c0805 BOT BOT BOT BOT N12 M14
AVDD_SATA_2 SIDE_IOW# SIDE_DIOW# VDD_5 VSS_51
22P 22P AH12 R27 {27} NI NI NI NI NI N13 M15
AVDD_SATA_3 SIDE_CS1# SIDE_DCS1# {27} VDD_6 VSS_52
5% 5% AG12 R28 N18 M16
AVDD_SATA_4 SIDE_CS3# SIDE_DCS3# {27} VDD_7 VSS_53
AG18 N19 M17
AVDD_SATA_5 VDD_8 VSS_54
AG21 SIDE_D[15..0] GND V12 N14
AVDD_SATA_6 SIDE_D0 VDD_9 VSS_55
AH18 V28 {27} V13 N15
AVDD_SATA_7 SIDE_D0/GPIO15 SIDE_D1 VDD_10 VSS_56
GND AG20 W28 V18 N16
AVDD_SATA_8 SIDE_D1/GPIO16 SIDE_D2 VDD_11 VSS_57
Y30 V19 N17
SIDE_D2/GPIO17 SIDE_D3 +1.8VSB VDD_12 VSS_58
AA30 +3VSB +1.8VSB W12 P12
SIDE_D3/GPIO18 SIDE_D4 VDD_13 VSS_59
AG9 Y28 W13 P13
AVSS_SATA_1 SIDE_D4/GPIO19 SIDE_D5 VDD_14 VSS_60
AF10 AA28 W18 P14
AVSS_SATA_2 SIDE_D5/GPIO20 SIDE_D6 +3VSB VDD_15 VSS_61
AF11 AB28 W19 P15
AVSS_SATA_3 SIDE_D6/GPIO21 SIDE_D7 CB241 CB242 CB243 CB244 CB245 CB246 VDD_16 VSS_62
AF12 AB27 P16
1.02 populate AVSS_SATA_4 SIDE_D7/GPIO22 SIDE_D8 Do Not 0.1UF Do Not StuffDo Not StuffD o Not Stuff VSS_63
AF13 AB29 A3 P17
AVSS_SATA_5 SIDE_D8/GPIO23 Stuff S5_3.3V_1 VSS_64
for full bandw idth AF14 AA27 SIDE_D9 BOT0.1UFc0402 BOT BOT BOT A7 P18
AVSS_SATA_6 SIDE_D9/GPIO24 SIDE_D10 NI NI NI NI S5_3.3V_2 VSS_65
AF15 Y27 E6 P19
AVSS_SATA_7 SIDE_D10/GPIO25 SIDE_D11 S5_3.3V_3 VSS_66
AF16 AA29 E7 R12
AVSS_SATA_8 SIDE_D11/GPIO26 SIDE_D12 S5_3.3V_4 VSS_67
AF17 W27 E1 R13
AVSS_SATA_9 SIDE_D12/GPIO27 SIDE_D13 +1.8VSB S5_3.3V_5 VSS_68
AF18 Y29 GND GND GND F5 R14
L26 AVSS_SATA_10 SIDE_D13/GPIO28 SIDE_D14 S5_3.3V_6 VSS_69
AF19 V27 R15
+1.8V 120Ohm/100Mhz +XTLVDD_SATA AVSS_SATA_11 SIDE_D14/GPIO29 SIDE_D15 VSS_70
AF20 U27 E9 R16
Irat=600mA AVSS_SATA_12 SIDE_D15/GPIO30 S5_1.8V_1 VSS_71
AF21 E10 R17
AVSS_SATA_13 S5_1.8V_2 VSS_72
1 2 AF22 E20 R18
AVSS_SATA_14 S5_1.8V_3 VSS_73
AH9 +1.8VSB E21 R19
CB248 CB249 CB460 AVSS_SATA_15 S5_1.8V_4 VSS_74
AG11 AG13 T12
Do Not Do Not Stuff AVSS_SATA_16 AVSS_SATA_33 VSS_75
AG15 AH22 E13 T13
Stuff0.1UF BOT AVSS_SATA_17 AVSS_SATA_34 USB_PHY_1.8V_1 VSS_76
AG17 AK12 E14 T14
B NI NI AVSS_SATA_18 AVSS_SATA_35 +VCORE USB_PHY_1.8V_2 VSS_77 B
AG19 AH11 E16 T15
AVSS_SATA_19 AVSS_SATA_36 USB_PHY_1.8V_3 VSS_78
AG22 AJ17 E17 T16
AVSS_SATA_20 AVSS_SATA_37 USB_PHY_1.8V_4 VSS_79
AG23 AH14 T17
AVSS_SATA_21 AVSS_SATA_38 +5V C30 VSS_80
AF9 AH19 T18
GND AVSS_SATA_22 AVSS_SATA_39 R166 1KOhm CPU_PWR VSS_81
L27 AH17 AJ20 T19
120Ohm/100Mhz +PLLVDD_SAT A AVSS_SATA_23 AVSS_SATA_40 VSS_82
AH23 AH21 1 2 AG6 U12
Irat=600mA AVSS_SATA_24 AVSS_SATA_41 +AVDDCK V5_VREF VSS_83
AH13 AJ9 U13
AVSS_SATA_25 AVSS_SATA_42 VSS_84
1 2 AH20 AG16 A24 U14
AVSS_SATA_26 AVSS_SATA_43 CB253 CB254 AVDDCK VSS_85
AK9 AH10 B24 U15
CB247 CB251 CB252 CB461 AVSS_SATA_27 AVSS_SATA_31 +3V DP1 Do Not Stuff AVSSCK VSS_86
AJ12 AJ23 U16
Do Not Do Not Stuff AVSS_SATA_28 AVSS_SATA_32 0.1UF
NI VSS_87
Do Not Stuff AK17 AK15 1 A4 U17
c0805 Stuff0.1UF AVSS_SATA_29 AVSS_SATA_44 AVSSCK VSS_1 VSS_88
BOT AK23 AK20 3 A8 U18
NI NI NI AVSS_SATA_30 AVSS_SATA_45 VSS_2 VSS_89
2 A29 U19
VSS_3 VSS_90
B28 V14
BAT54CW VSS_4 VSS_91
GND C1 V15
SB400 1V/0.2A VSS_5 VSS_92
GND GND GND GND E5 V16
VSS_6 VSS_93
E8 V17
VSS_7 VSS_94
E11 W14
VSS_8 VSS_95
E12 W15
VSS_9 VSS_96
E15 W16
VSS_10 VSS_97
E18 W17
VSS_11 VSS_98

L28
+1.8V 120Ohm/100Mhz +1.8V_SAT A GND
l1206 Irat=2A SB400 GND
1 2

A
CB255 CB256 CB257 CB259 CB260 CB457 CB458 A
10uF 0.1UF 0.1UF Do Not Stuff Do Not StuffDo Not Stuff
c0805 BOT BOT BOT BOT
NI NI NI NI

GND Title : ATI SB 400 2 OF 4


ASUSTeK COMPUTER INC Engineer: Mario Zeng
Size Project Name Rev
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 20 of 40
5 4 3 2 2004 1
5 4 3 2 1

+3VSB

+3VSB
R69
Do Not Stuff U5D
5 1.02 Modify R984 NI SB400 SB Part 4 of 4
4.7KOhm6 RN66C SLP_S5# Do Not
D 3 A15 D
1 4.7KOhm4 RN66B SLP_S3#
2 RN66A PWRBTN# 1 StuffN I 2
48M_X1/USBCLK
B15 T17 1 tp30
USBCLK
4.7KOhm {8} CLOCK_PD SB_PSON# {34} 48M_X2 {8}
7 8 RN66D PCI_PME# {30} HWM_INT
HWM_INT C6 C15 USBCOMP 1 R168 2
4.7KOhm GPM6# TALERT#/TEMP_ALERT#/GPIO10 USB_RCOMP
R71 D5 D16 T22 1 Do Not Stuff1%
PCI_PME# BLINK/GPM6# USB_VREFOUT
Do Not 3 C4 C16 T23 1 Do Not Stuff
D {23..26} PCI_PME# PCI_PME#/GEVENT4# USB_ATEST1
1 StuffN I 2 Q4 EXTEVNT0# D3 D15 T24 1 Do Not Stuff GND
2N7002 SLP_S3# RI#/EXTEVNT0# USB_ATEST0
B4 B8
4.7KOhm RN67D PCIE_WU# 7
SLP_S3# {30} SLP_S3# SLP_S5# SLP_S3# USB_OC0#/GPM0# OC0# {28}
3 4.7KOhm4 1 E3 C8
8 RN67C LPC_PME# {30} SLP_S5# PWRBTN# SLP_S5# USB_OC1#/GPM1#
5 6 B3 C7 OC2# {28}
4.7KOhm {30,33,39} PWRBTN# PWR_BTN# USB_OC2#/FANOUT1/GPM2#
1 2 RN67A S3_STATE# G
S {34} SB_PWRGD
C3 B7
4.7KOhm 2 T28 PWR_GOOD USB_OC3#/GPM3#
1 D4 B6 OC4# {28}
tp30 SB_TEST1 SUS_STAT# USB_OC4#/GPM4#
F2 A6
GND SB_TEST0 TEST1 USB_OC5#/GPM5#
R396 1 2 4.7KOhm GPM6# E2 B5 OC6# {28}
TEST 0 USB_OC6#/FAN_ALERT#/GEVENT6#
AJ26 A5
{30} A20GAT E GA20IN USB_OC7#/CASE_ALERT#/GEVENT7#
EXTEVNT0#
R397 1 2 AJ27
{30} RST_KB KBRST#
D6 A11 USBP7 {28}
{10} SB_THERMTR IP# LPC_PME# SMBALERT#/THRMTRIP#/GEVENT2# USB_HSDP7+
C5 B11 USBN7
{30} LPC_PME# LPC_PME#/GEVENT3# USB_HSDM7-
A25 {28}
{30} LPC_SMI# S3_STATE# LPC_SMI#/EXTEVNT1#
D8 A10 USBP6 {28}
{34} S3_STATE# VOLT_ALERT#/S3_STATE/GEVENT5# USB_HSDP6+
D7 B10 USBN6
{30,33,34} SYS_RST# SYS_RESET#/GPM7# USB_HSDM6-
D2 {28}
WAKE#/GEVENT8# USB_HSDP5+
PCIE_WU# A14
{18} PCIE_WU# USB_HSDM5-
D1 B14 USBP5 {28}
RSMRST# USB_HSDP4+
{30} RSMRST# USB_HSDM4- USBN5
+3VSB A23 A13 {28}
14M_X1/OSC
B13
+3V {8} OSC_14M 1 B23
D o Not
14M_X2 USBP4 {28}
A18 USBP3 {28}
AVDDRX_USB T16 USB_HSDP3+
1 Do Not Stuff
AK24 B18 USBN3
C L30 SIO_CLK USB_HSDM3- C
R361 4.7KOhm SBGPIO3
1 {28}
1 2 EXPANSION_DET0 B25 A17 USBP2 {28}
T18 ROM_CS#/GPIO1 USB_HSDP2+
5 6 RN71C EXPANSION_DET0 1 Do Not B17
1KOhm GHI#/GPIO6 USB_HSDM2- USBN2
7 8 RN71D 70Ohm/100Mhz CB266 CB267 CB268 CB464 CB465 T19 1 Do Not {28}
1KOhm AGP_STP# VGATE/GPIO7
3 4 RN71B l0805_h43 10uF 1UF/10V 0.1UF Do Not StuffDo Not D24 A21
1KOhm Stuff AGP_BUBY# AGP_STP#/GPIO4 USB_HSDP1+ USBP1 {28}
1 RN71A SMBDAT A Irat=3A c0805 BOT BOT D23 B21
1KOhm AGP_BUSY#/GPIO5 USB_HSDM1- USBN1
2 NI NI SBGPIO3 A27
FANOUT0/GPIO3 {28}
C24 A20
4.7KOhm RN68A AGP_STP# 1 2 {33} SPKR SMBCLK SPKR/GPIO2 USB_HSDP0+ USBP0 {28}
3 4.7KOhm4 RN68B AGP_BUBY# A26 B20 USBN0
+3V_AVDDC {8,15,18,23,24,30} SMBCLK SMBDATA SCL0/GPOC0# USB_HSDM0-
GND B26 {28}
{8,15,18,23,24,30} SMBDAT A SDA0/GPOC1#
5 4.7KOhm6 RN68C SB_TEST0 L31
{33} BIOS_WP#
B27
DDC1_SCL/GPIO9 AVDDTX_0
C21
7 1 2 T21 1 Do Not C18 AVDDRX_USB
4.7KOhm8 RN68D SB_TEST1 DDC1_SDA/GPIO8 AVDDTX_1
StuffC 26 D13
CB270 CB271 CB466 {27} P66DETECT DDC2_SCL/GPIO11 AVDDTX_2
1 120Ohm/100Mhz C27 D10
4.7KOhm2 RN69A AC_SDATA_IN0 {27} S66DETECT DDC2_SDA/GPIO12 AVDDTX_3
3 Irat=600mA 1UF/10V Do Not StuffDo Not Stuff D20
4.7KOhm4 RN69B AC_SDATA_IN1
BOT AVDDRX_0
5 BOT D17
4.7KOhm6 RN69C AC_SDATA_IN2 AVDDRX_1
7 NI NI C14
4.7KOhm8 RN69D AC_BITCLK AVDDRX_2
J2 C11
NC1 AVDDRX_3 +3V_AVDDC
K3
NC4
GND GND J3
NC3
K2 AVDDC A16
NC2

AVSSC B16
R170,R171,R172 near SB
AVSS_USB_1 A9
G1 AVSS_USB_2 A12
{29} AC_BITCLK 33 AC_DATA_OUT_R AC_BITCLK
R170 1 2 G2 A19
{22,29} AC_SDATA_OUT AC_SDOUT AVSS_USB_3
H4 A22
{29} AC_SDATA_IN0 AC_SDIN0 AVSS_USB_4
AC_SDATA_IN1 G3 B9
B AC_SDIN1 AVSS_USB_5 B
AC_SDATA_IN2 G4 B12
33 AC_SDIN2 AVSS_USB_6
R171 1 2 H1 B19
{29} AC_SYNC AC_SYNC_R AC_SYNC AVSS_USB_7
R172 1 2 H3 B22
{29} AC_RST# AC_RST# AVSS_USB_8
H2 C9
{22} SBSPDIF_OUT SPDIF_OUT AVSS_USB_9
C10
AVSS_USB_10
C12
EE84 EE83 AVSS_USB_11
C13
Do Not Stuff AVSS_USB_12
C17
c0402 c0402 AVSS_USB_13
C19
NI NI AVSS_USB_14
C20
AVSS_USB_15
C22
AVSS_USB_16
GND GND D9
AVSS_USB_17
D11
AVSS_USB_18
D12
AVSS_USB_19
D14
AVSS_USB_20
D18
AVSS_USB_21
D19
AVSS_USB_22
D21
AVSS_USB_23
D22
AVSS_USB_24
SB400
CLIP1
HEATSINK2
GND
1
ANCHOR 2
3
A CLIP2 4 A

HEATSINK

ANCHOR

Title : ATI SB 400 3 OF 4


GND

ASUSTeK COMPUTER INC Engineer: Mario Zeng


Size Project Name Rev
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 21 of 40
5 4 3 2 2004 1
5 4 3 2 1

PA_IXP400AC6 update
+3VSB +3VSB +3V +3V +3V +3V +3V +3V
PCI_CLK7 PCI_CLK8 ROM Type

Only this pin is Type 1 strap PULL PULL LPC ROM 1 ( LPC addresses
Others are all Type 2 strap HIGH LOW are translated to the top of
RN108B RN108C RN108D R177 R178 RN58D the 4G address space )
4.7KOhm 4.7KOhm 4.7KOhm Do Not Stuff Do Not Stuff RN58B RN58C
NI NI 4.7KOhm 4.7KOhm 4.7KOhm PULL PULL
HIGH HIGH PCI (X BUS) ROM
D D
{19} AUTO_ON#
{21,29} AC_SDATA_OUT PULL PULL
{19,30} SB_RTCCLK LOW LOW Firmware Hub
{21} SBSPDIF_OUT PCI_CLK2
{19,24} PCICLK_SL3 PCI_CLK3
{19,30} PCICLK_SIO PCI_CLK4
{19,25} PCICLK_1394 PCI_CLK5 PULL PULL LPC ROM 2 ( addresses
{19,33} PCICLK_ROM PCI_CLK6 LOW HIGH mapped to below 1M )
{19} PCICLK_SL4 PCI_CLK7
{19} PCICLK_SL5 PCI_CLK8
{19,26} PCICLK_LAN

A11-A23
RN108A R57 R187 R58
Pull down for 48MHz XTAL mode .
4.7KOhm 10KOhm 10KOhm 10KOhm RN58A
Pull up for 48MHz OSC mode . A31 4.7KOhm
and newer
Pull down for 48MHz OSC mode .
GND Pull up for 48MHz XTAL mode.
GND GND GND GND
Type II Standard and
Debug straps will be
latched after SB
PowerGood is ACPWRON AC_SDOUT RTC_CLK SPDIF_OUT PCI_CLK2 PCI_CLK3 PCI_CLK4 PCI_CLK5 PCI_CLK6 PCI_CLK7 PCI_CLK8
USE
C asserted. The DEBUG USB PHY
C
PULL MANUAL INTERNAL SIO 24MHz 48MHZ OSC USE INT. 14MHZ OSC CPU IF=K8 ROM TYPE:
Straps will be latched HIGH PWR ON STRAPS RTC MODE POWERDOWN PLL48 MODE
H, H = PCI ROM
in the window of TSc DISABLE
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT H, L = PMC LPC ROM
min = 730.5 ns to TSc
max = 1738 ns after L, H = NORMAL LPC ROM DEFAULT
PULL AUTO IGNORE EXTERNAL SIO 48MHz 48MHZ XTAL USB PHY USE EXT. 14MHZ XTAL CPU IF=P4
PowerGood. Type I LOW PWR DEBUG RTC MODE POWERDOWN 48MHZ MODE L, L = FWH ROM
ON STRAPS
straps are latched on DEFAULT DEFAULT
ENABLE

resume reset rising


edge.
+3V +3V +3V +3V +3V +3V +3V +3V +3V +3V

R193 R194 R195 R196 R197 R198 R199 R200 R201 R202
Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff
NI NI NI NI NI NI NI NI NI NI

{20,27} PIDE_DDACK#
B {19,23..26} A_D31 B
{19,23..26} A_D30 All debug straps are pulled up to +3V
{19,23..26} A_D29 in ATI latest Demo Circuit
{19,23..26} A_D28
{19,23..26} A_D27 105-A59200-00A
{19,23..26} A_D26
{19,23..26} A_D25
{19,23..26} A_D24
{19,23..26} A_D23

R203 R204 R205 R206 R207 R208 R209 R210


Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff R211 R212
NI NI NI NI NI NI NI NI Do Not Stuff Do Not Stuff
NI NI

GND GND GND GND GND GND GND GND GND GND

PDACK# PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23

PULL USE RESERVED RESERVED RESERVED RESERVED BYPASS BYPASS BYPASS IDE USE EEPROM RESERVED
HIGH SHORT PCI PLL ACPI PLL PCIE STRAPS
RESET BCLK
DEFAULT
A A

PULL USE USE PCI USE USE IDE USE DEFAULT


LOW LONG PLL ACPI PLL PCIE STRAPS
RESET BCLK DEFAULT Title : ATI SB 400 4 OF 4
DEFAULT DEFAULT DEFAULT
ASUSTeK COMPUTER INC Engineer: Mario Zeng
Size Project Name Rev
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 22 of 40
2004

5 4 3 2 1
5 4 3 2 1

PCI Device REQ?# GNT?# INT?# IDSEL

PCI SLOT1 REQ1# GNT1# INTABCD# A_D24


REQ2# GNT2# INTBCDA#
PCI SLOT2 REQ3# GNT3# INTCDAB# A_D25

PCI SLOT3 A_D26

RTL8101 REQ6# GNT6# INTF# A_D19


REQ0# GNT0#
1394 INTE# A_D21
D D
{19,22,24..26} A_D[0..31]

+3V +5V -12V +12V +5V +3V +3VSB


PCI1 PCI2
+12V
+3VSB
+5V +3V

B1 A1
-12V TRST
B2 A2 B1 A1
TCK +12V -12V TRST
B3 A3 B2 A2
GND11 TMS TCK +12V
B4 A4 B3 A3
TDO TDI GND11 TMS
B5 A5 B4 A4
+5V22 +5V1 TDO
B6 A6 INTA# {19,24} B5 TDI A5
+5V23 INTA +5V22
B7 A7 B6 +5V1 A6 INTB# {19,24}
{19,24} INTB# INTB INTC INTC# {19,24} +5V23
B8 A8 B7 INTA A7 INTD#
{19,24} INTD# INTD +5V2 {19,24} INTC# INTB INTC
B9 A9 B8 A8 {19,24}
PRSNT1 RESERVED1 {19,24} INTA# INTD +5V2
B10 A10 B9 A9
RESERVED5 +5V3 PRSNT1 RESERVED1
B11 A11 B10 A10
C145 C146 PRSNT2 RESERVED2 RESERVED5 +5V3
B12 A12 B11 A11
Do Not StuffD o Not GND12 GND1 C147 C148 PRSNT2 RESERVED2
B13 A13 B12 A12
StuffNI NI GND13 GND2 Do Not StuffDo Not GND12 GND1
B14 A14 B13 A13
RESERVED6 RESERVED3 Stuff GND13 GND2
B15 A15 PCIRST# {19,24} B14 A14
GND14 RST NI NI RESERVED6 RESERVED3
GND GND B16 A16 B15 A15 PCIRST# {19,24}
{19} PCICLK_SL1 CLK +5V4 GND14 RST
B17 A17 GNT1# {19,24} GND GND B16 A16
GND15 GNT {19} PCICLK_SL2 CLK +5V4
B18 A18 B17 A17 GNT2# {19,24}
{19,24} REQ1# REQ GND3 GND15 GNT
B19 A19 PCI_PME# {21,24..26} B18 A18
A_D31 +5V8 RESERVED4 A_D30 {19,24} REQ2# REQ GND3
B20 A20 A_D30 {19,22,24..26} B19 A19 PCI_PME# {21,24..26}
{19,22,24..26} A_D31 A_D29 AD31 AD30 A_D31 +5V8 RESERVED4 A_D30
B21 A21 B20 A20 A_D30 {19,22,24..26}
C {19,22,24..26} A_D29 AD29 +3.3V1 A_D28 {19,22,24..26} A_D31 A_D29 AD31 AD30 C
B22 A22 A_D28 {19,22,24..26} B21 A21
A_D27 GND16 AD28 A_D26 {19,22,24..26} A_D29 AD29 +3.3V1 A_D28
B23 A23 A_D26 {19,22,24..26} B22 A22 A_D28 {19,22,24..26}
{19,22,24..26} A_D27 A_D25 AD27 AD26 A_D27 GND16 AD28 A_D26
B24 A24 B23 A23 A_D26 {19,22,24..26}
{19,22,24..26} A_D25 AD25 GND4 A_D24 {19,22,24..26} A_D27 A_D25 AD27 AD26
B25 A25 A_D24 {19,22,24..26} B24 A24
+3.3V7 AD24 A_D24 {19,22,24..26} A_D25 AD25 GND4 A_D24
B26 A26 B25 A25
{19,24..26} C/BE3# C/BE3 IDSEL +3.3V7 AD24 A_D24 {19,22,24..26}
A_D23 B27 A27 B26 A26 A_D25
{19,22,24..26} A_D23 AD23 +3.3V2 A_D22 {19,24..26} C/BE3# A_D23 C/BE3 IDSEL
B28 A28 A_D22 {19,24..26} B27 A27
A_D21 GND17 AD22 A_D20 {19,22,24..26} A_D23 AD23 +3.3V2 A_D22
B29 A29 A_D20 {19,24..26} B28 A28 A_D22 {19,24..26}
{19,24..26} A_D21 A_D19 AD21 AD20 A_D21 GND17 AD22 A_D20
B30 A30 B29 A29 A_D20 {19,24..26}
{19,24..26} A_D19 AD19 GND5 A_D18 {19,24..26} A_D21 A_D19 AD21 AD20
B31 A31 A_D18 {19,24..26} B30 A30
A_D17 +3.3V8 AD18 A_D16 {19,24..26} A_D19 AD19 GND5 A_D18
B32 A32 A_D16 {19,24..26} B31 A31 A_D18 {19,24..26}
{19,24..26} A_D17 AD17 AD16 A_D17 +3.3V8 AD18 A_D16
B33 A33 B32 A32 A_D16 {19,24..26}
{19,24..26} C/BE2# C/BE2 +3.3V3 FRAME# {19,24..26} A_D17 AD17 AD16
B34 A34 FRAME# {19,24..26} B33 A33
IRDY# GND18 FRAME {19,24..26} C/BE2# C/BE2 +3.3V3 FRAME#
B35 A35 B34 A34 FRAME# {19,24..26}
{19,24..26} IRDY# IRDY GND6 TRDY# IRDY# GND18 FRAME
B36 A36 TRDY# {19,24..26} B35 A35
RDEVSEL# +3.3V9 TRDY {19,24..26} IRDY# IRDY GND6 TRDY#
B37 A37 B36 A36 TRDY# {19,24..26}
{19,24} DEVSEL# DEVSEL GND7 +3.3V9 TRDY
B38 A38 STOP# RDEVSEL# B37 A37
GND19 STOP STOP# {19,24..26} {19,24} DEVSEL# DEVSEL GND7
B39 A39 B38 A38 STOP#
{19,24} PLOCK# LOCK +3.3V4 GND19 STOP STOP# {19,24..26}
B40 A40 B39 A39
{19,24..26} PERR# PERR SDONE SMBCLK {8,15,18,21,24,30} {19,24} PLOCK# LOCK +3.3V4
B41 SBO A41 SMBDAT A {8,15,18,21,24,30} B40 A40 SMBCLK {8,15,18,21,24,30}
+3.3V10 {19,24..26} PERR# PERR SDONE
B42 A42 B41 A41 SMBDAT A {8,15,18,21,24,30}
{19,24,26} SERR# SERR GND8 +3.3V10 SBO
B43 PAR A43 PAR {19,24..26} B42 A42
+3.3V11 A_D15 {19,24,26} SERR# SERR GND8
B44 AD15 A44 A_D15 {19,24..26} B43 A43 PAR {19,24..26}
{19,24..26} C/BE1# A_D14 C/BE1 +3.3V11 PAR A_D15
B45 A45 B44 AD15 A44 A_D15 {19,24..26}
{19,24..26} A_D14 AD14 +3.3V5 A_D13 {19,24..26} C/BE1# A_D14 C/BE1
B46 A46 A_D13 {19,24..26} B45 A45
GND20 AD13 {19,24..26} A_D14 AD14 +3.3V5
A_D12 B47 A47 A_D11 B46 A46 A_D13
{19,24..26} A_D12 AD12 AD11 A_D11 {19,24..26} GND20 AD13 A_D13 {19,24..26}
A_D10 B48 A48 A_D12 B47 A47 A_D11
{19,24..26} A_D10 AD10 GND9 {19,24..26} A_D12 AD12 AD11 A_D11 {19,24..26}
B49 A49 A_D9 A_D10 B48 A48
GND21 AD9 A_D9 {19,24..26} {19,24..26} A_D10 AD10 GND9
B49 A49 A_D9
B GND21 AD9 A_D9 {19,24..26} B
A_D8 B52 A52
{19,24..26} A_D8 AD8 C/BE0 C/BE0# {19,24..26}
A_D7 B53 A53 A_D8 B52 A52
{19,24..26} A_D7 AD7 +3.3V6 {19,24..26} A_D8 AD8 C/BE0 C/BE0# {19,24..26}
B54 A54 A_D6 A_D7 B53 A53
+3.3V12 AD6 A_D6 {19,24..26} {19,24..26} A_D7 AD7 +3.3V6
A_D5 B55 A55 A_D4 B54 A54 A_D6
{19,24..26} A_D5 AD5 AD4 A_D4 {19,24..26} +3.3V12 AD6 A_D6 {19,24..26}
A_D3 B56 A56 A_D5 B55 A55 A_D4
{19,24..26} A_D3 AD3 GND10 {19,24..26} A_D5 AD5 AD4 A_D4 {19,24..26}
B57 A57 A_D2 A_D3 B56 A56
GND22 AD2 A_D2 {19,24..26} {19,24..26} A_D3 AD3 GND10
A_D1 B58 A58 A_D0 B57 A57 A_D2
{19,24..26} A_D1 AD1 AD0 A_D0 {19,24..26} GND22 AD2 A_D2 {19,24..26}
B59 A_D1 B58 A58 A_D0
ACK64# +5V9 +5V5 REQ64# {19,24..26} A_D1 AD1 A_D0 {19,24..26}
B60 A59 A60 B59 A59
{24} ACK64# ACK64 REQ64 ACK64# AD0
+5V9 +5V5
B61 A61 B60 A60 REQ64#
+5V10 +5V6 ACK64 REQ64 REQ64# {24}
B62 A62 B61 A61
+5V11 +5V7 +5V10 +5V6
B62 A62
+5V11 +5V7

GND GND
GND GND
120P
IRDY# 120P
{19,24..26} IRDY#
STOP#
{19,24..26} STOP# TRDY#
{19,24..26} TRDY# FRAME#
{19,24..26} FRAME#
DEVSEL#
{19,24} DEVSEL#

A A

Title : PCI SLOT 1


ASUSTeK COMPUTER INC Engineer: Mario Zeng
Size Project Name Rev
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 23 of 40
5 4 3 2 2004 1
5 4 3 2 1

PCI SLOT 2 CONNECTOR


Device#:0Ah

+3V +5V -12V +12V +5V +3V

D
{19,22,23,25,26} A_D[0..31] PCI3 +3VSB
D
B1 A1
-12V TRST +5V
B2 A2
TCK +12V
B3 A3
GND11 TMS
B4 A4 1 5 RP2A
TDO TDI {19,25} REQ0#
B5 A5 10
+5V22 +5V1 2.7K
B6 A6 +3V 5 RP2B
+5V23 INTA INTC# {19,23} {19,23} REQ1#
B7 A7 10
{19,23} INTD# INTB INTC INTA# {19,23}
B8 A8 3 5
{19,23} INTB# INTD +5V2 RN75C {19,23} REQ2#
B9 A9 5 4.7KOhm6 10
PRSNT1 RESERVED1 {19,23} INTD#
B10 A10 3 RN75B 4 5
RESERVED5 +5V3 {19,23} INTC# 4.7KOhm4 {19} REQ3#
B11 A11 1 RN75A RP2D
PRSNT2 RESERVED2 {19,23} INTA# 4.7KOhm2 2.7K
B12 A12 7 RN75D REQ64# 10
GND12 GND1 {19,23} INTB# 4.7KOhm8
B13 A13 5
GND13 GND2 6
C150 C151 B14 A14 ACK64# RP2E
Do Not StuffDo Not RESERVED6 RESERVED3 PCIRST# 2.7K
B15 A15 PCIRST# {19,23} 10
Stuff
NI NI GND14 RST
B16 8 5
{19,22} PCICLK_SL3 CLK +5V4
A16 {19,26} REQ6#
B17 A17 GNT3# {19} 10
GND15 GNT
B18 A18 9 5
{19} REQ3# REQ GND3
GND GND B19 A19 RP2H
+5V8 RESERVED4 PCI_PME# {21,23,25,26}
A_D31 B20 A20 A_D30 10
{19,22,23,25,26} A_D31 AD31 AD30 A_D30 {19,22,23,25,26}
A_D29
{19,22,23,25,26} A_D29
B21
AD29 +3.3V1
A21
1394 {19,25}
1 Do Not Stuff5RP3A
B22 A22 A_D28 10
GND16 AD28 A_D28 {19,22,23,25,26} NI
A_D27 A_D26
{19,22,23,25,26} A_D27
B23
AD27 AD26
A23 A_D26 {19,22,23,25,26} PCI1 {19,23}
2 Do Not Stuff5RP3B
A_D25 B24 A24
{19,22,23,25,26} A_D25 AD25 GND4 10
NI
A_D24
B25
+3.3V7 AD24
A25 A_D24 {19,22,23,25,26} PCI2 {19,23} GNT2#
3 Do Not Stuff5RP3C
C/BE3# B26 A26 A_D26 10
{19,23,25,26} C/BE3# C/BE3 IDSEL GNT3# NI
A_D23
{19,22,23,25,26} A_D23
B27
AD23 +3.3V2
A27 PCI3 {19} GNT3#
4 Do Not Stuff5RP3D +5V
B28 A28 A_D22 10 RP1A
C GND17 AD22 A_D22 {19,23,25,26} NI C
A_D21
{19,23,25,26} A_D21
B29
AD21 AD20
A29 A_D20
A_D20 {19,23,25,26} {19} GNT4#
6 Do Not Stuff5RP3E {19,23,26} SERR#
1 2.7K 5
A_D19 B30 A30 Not Use 10 10 RP1B
{19,23,25,26} A_D19 AD19 GND5 NI
B31 A31 A_D18 7 RP3F 2 5
+3.3V8 AD18 A_D18 {19,23,25,26} {19} GNT5# Do Not {19,23,25,26} PERR# 2.7K
A_D17 B32 A32 A_D16 10 10 RP1C
{19,23,25,26} A_D17 AD17 A_D16 {19,23,25,26} NI 5
C/BE2# B33 A33 LAN 8 Do Not RP3G 3 5
{19,23,25,26} C/BE2# AD16
C/BE2 +3.3V3 {19,26} GNT6# {19,23} PLOCK#
B34 A34 FRAME# 10 10 RP1D
GND18 FRAME FRAME# {19,23,25,26} NI
IRDY# B35 A35 9 Do Not RP3H 4 5
{19,23,25,26} IRDY# IRDY GND6 TRDY# {19,23} DEVSEL#
B36 A36 TRDY# {19,23,25,26} NI 10 RP1E
RDEVSEL# +3.3V9 TRDY
B37 A37 6 5
{19,23} DEVSEL# DEVSEL GND7 STOP# {19,23,25,26} IRDY#
B38 A38 STOP# {19,23,25,26} 10 RP1F
PLOCK# GND19 STOP 2.7K
B39 A39 5
{19,23} PLOCK# PERR# LOCK +3.3V4 {19,23,25,26} STOP#
B40 A40 SMBCLK {8,15,18,21,23,30} 7 10 RP1G
{19,23,25,26} PERR# PERR SDONE
B41 A41 SMBDAT A {8,15,18,21,23,30} 5
+3.3V10 SBO {19,23,25,26} TRDY# 2.7K
SERR# B42 A42 10 RP1H
{19,23,26} SERR# SERR GND8
B43 A43 PAR {19,23,25,26} 5
+3.3V11 PAR A_D15 {19,23,25,26} FRAME# 8
C/BE1# B44 A44 10
{19,23,25,26} C/BE1# C/BE1 AD15 A_D15 {19,23,25,26}
A_D14 B45 A45
{19,23,25,26} A_D14 AD14 +3.3V5
B46 A46 A_D13
GND20 AD13 A_D13 {19,23,25,26}
A_D12 B47 A47 A_D11
{19,23,25,26} A_D12 AD12 AD11 A_D11 {19,23,25,26}
A_D10 B48 A48
{19,23,25,26} A_D10 AD10 GND9
B49 A49 A_D9 CB272
GND21 AD9 A_D9 {19,23,25,26}
Do Not Stuff
NI
A_D8 B52 A52 C/BE0#
{19,23,25,26} A_D8 AD8 C/BE0 C/BE0# {19,23,25,26}
A_D7 B53 A53
{19,23,25,26} A_D7 AD7 +3.3V6
B54 A54 A_D6
+3.3V12 AD6 A_D6 {19,23,25,26}
A_D5 B55 A55 A_D4
{19,23,25,26} A_D5 AD5 AD4 A_D4 {19,23,25,26}
A_D3 B56 A56 GND
{19,23,25,26} A_D3 AD3 GND10 A_D2 +3V +5V +3VSB
B57 A57 A_D2 {19,23,25,26}
B A_D1 GND22 AD2 A_D0 B
B58 A58 A_D0 {19,23,25,26}
{19,23,25,26} A_D1 AD1 AD0
B59 A59
ACK64# +5V9 REQ64#
{23} ACK64# B60 +5V5 A60 REQ64# {23}
ACK64 REQ64
B61 A61
+5V10 +5V6
B62
+5V11 +5V7
A62 + +
+ CB273 CB274 CB275 CB276 CB277 CE8 CE7 CB278
CE6 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 1000UF/6.3V 0.1UF
Do Not Stuff Do
NI Not Stuff
NI

GND GND

120P
J20 PCI Slot: 30u" Au over 50u" NI per PCI 2.3 spec. GND GND Placed near PCI Slot
12-030011202 AMP/440043-3
12-030071201 FOXCONN/EH06003-GU-V

A A

Title : PCI SLOT 2


ASUSTeK COMPUTER INC Engineer: Mario Zeng
Size Project Name Rev
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 24 of 40
5 4 3 2 2004 1
5 4 3 2 1

TPBIAS0
{19,22..24,26} A_D[0..31]
TPA0+
TPA0-
TPB1- TPB0+ TPA1+ R226 1 2 C152 1 0.33U
{19} 1394_INT# TPB0-
TPB1+ 56Ohm
{30} 1394RST#
TPA1- 1%
{19,22} PCICLK_1394 TPA1- TPBIAS1
TPA1+ R230 6.34KOhm
{19,24} GNT0# 1% 1 +3VA_1394
+3V TPBIAS1 2 1%
{19,24} REQ0#
C154 47P TPB1+ R231 1 2 1C153 1 2
5% 2 1 1% 10%
D
+3V D
TPB1- R232 1 2 R233 1 2
56Ohm 5.1KOhm

+3V TPA0+ R234 1 2 C155 1 0.33U


56Ohm
BUS+12V R14 R15 1%
U6 4.7KOhm Do Not Stuff TPA0- TPBIAS0
U7 NI R235 1 2
1 8
A0 TPB0+
2 VCC 7 R236 1 2 0C156 1 2
R237 A1 WP SCL 1% 10%
3 6
A2 SCL SDA
4 5
11KOhm GNDSDA TPB0- R238 1 2 R239 1 2 5.1KOhm
103 64 AT24C02N 56Ohm 1%
A_D26 GND8 GNDARX0
104 63
A_D25 AD26 XCPS GND GND
105 62
A_D24 AD25 VCCATX0 1394_XO GND
106 61
C/BE3# AD24 XO 1394_XI R240
{19,23,24,26} C/BE3# 107 60
A_D21 CBE3# XI
108 59
A_D23 IDSEL GNDATX0 1KOhm
109 58
A_D22 AD23 PHYRST#
110 57
AD22 PHYLON/JMPTSI C157
111 56
A_D21 GND9 PHYLREQ/JMPTSO 0.1UF SBV23
112 55
AD21 PHYCTL1/JMPPHYPC1 c0402 GND
113 54
VCC5 PHYCTL0/JMPPHYPC0 USB_1394
114 53
VCC6 PHYD7/JMPPHYPC2 RTPB0+
115 52 1 12
A_D20 GND10 PHYD6/JMPPHYCMC +3VA_1394 VCC0 LB2+ RTPA0-
116 51 {28} LP2- 2 13
A_D19 AD20 PHYD5 GND LP0- LA2- RTPA0+
117 50 {28} LP2+ 3 LP0+ 14
C A_D18 AD19 GNDSUS1 RN78A LA2+ C
118 49 2 0Ohm 4 15
A_D17 AD18 VCCSUS1 GND1
119 48 4 5 16
A_D16 AD17 PHYD4/JMPI2CFAST R242 0Ohm 3 P_GND1
120 47 6 {28} LP3- 6 VCC1 P_GND3 17
AD16 PHYD3/JMPCARDEN RN78B 7 RN78D LP1-
121 46 1 2 8 0Ohm {28} LP3+ 7 18
C/BE2# GND11 PHYD2/JMPI2CEEEN LP1+ P_GND4
122 45 8 19
{19,23,24,26} C/BE2# CBE2# PHYD1 VP1 GND2
123 44 4.7KOhm L4 9 20
{19,23,24,26} FRAME# FRAME# PHYD0 P_GND5P_GND6
VCC
124 43 TPA1+ 1 8 RTPA1+ 10 21
{19,23,24,26} IRDY# IRDY# MODE0 RTPB0- GND3
125 42 1.02 change for 11 P_GND7P_GND8 22
VCC7 MODE1 TPA1- RTPA1- LB2-
126 41 2 7
{19,23,24,26} TRDY#
127
TRDY# GNDSUS2
40
EMI request Common USBX2_1394_CON_14P
{26} RDEVSEL# DEVSEL# PHYCLK Choke RTPB1+
128 39 TPB1+ 3 6 1 2
{19,23,24,26} STOP# STOP# VCCSUS2
CB279 TPB1- 4 5 RTPB1- R244 1MOhm
0.1UF 1 2
c0402 Do Not Stuff
NI CB280 1000P 10%
GND B1394_GND
2
0Ohm 1 For ESD
VT6307 GND R245 4
Use A4 vers ion. PHY LINK 1MOhm 6 RN77A
P/N:02-040830716 Power 1 2 8 0Ohm 3 F_1394
RN77B RTPA1+ 1 A+ A- 2 RTPA1-
Status 1394_XI X4 1394_XO 0Ohm 5 3 GND 4
GND TPA0+ 1 RN77C 8 RTPA0+ RTPB1+ 5 B+ B- 6 RTPB1-
3 24.576MHZ VP0 7 +12 +12 8 VP0
PCI_PME# {21,23,24,26}
C158 C159 TPA0- 2 7 RTPA0- GND 10 1 2
10P 10P Common 1394_CON
5% 5% TPB0+ 3 Choke
6 RTPB0+ 1394_RED R246
{19,23,24,26} PERR# 1MOhm
B {19,23,24,26} PAR RTPB0- B
GND TPB0- 4 5 GND 1 2
CB281 1000P 10%
{19,23,24,26} C/BE1#
Do Not Stuff 0630
{19,23,24,26} C/BE0#
GND NI F1394_GND GND
I2C EEPROM:
+3V Low = Disable (4-wire EEPROM interface)
+3VA_1394 High = Enable (2-wire I2C EEPROM interface P/N : 12 -06100010B
+12V
L29 using SCL / SDA)
Color : RED BUS+12V
1 2 PinSignal Name
CB282 1000P 10%
70Ohm/100Mhz CB283 CB284 CB285 CB286 1TPA+ F2 1.5A/15V D2 L34 1 2
0.1UF 0.1UF 0.1UF 0.1UF MODE[1-0] 1 2 1 2 1 2 VP1
c0402 c0402 c0402 c0402 Operation Select.
2TPA-
00 Normal Mode (all PHY / Link signals are disabled) 3Ground SS12 70Ohm/100Mhz 1 2
850mV/1A l0805_h43
01 PHY Test Mode 4Ground Irat=3A R248
10 Link Test Mode
GND
11 Watch Mode (all PHY / Link signals are outputs)
5TPB+( 1MOhm GND

Internal pull-down for default 00. 6TPB-


7+12V (Fused)
+3V PHYLPS(O) PHY Link Power Status. D3 L35 CB287
1 1000P
2 10%
PHYLREQ(IO) PHY Link
8+12V (Fused) 1 2 1 2 VP0
Request.
PHYLON(I) PHY Link On. 9Key (no pin)
PHYCLK(I) PHY Clock. SS12 70Ohm/100Mhz 1 2
CB292 CB293 CB294 CB295 CB288 CB289 CB290 CB291 10Grou nd 850mV/1A l0805_h43
0.1UF Do Not Do Not Stuff Do Not StuffDo Not StuffDo Not Stuff PHYCTL0-1(IO) PHY Control. Irat=3A R250 1MOhm
Stuff
c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 PHYD0-7(IO) PHY Data. GND
A NI NI NI NI NI NI PHYRST#(I) PHY Reset. A
XCPS(I) Cable Power Status.
XRES(A) External Resistor.

1229
GND Configuration Straps Default

JMPI2CEEEN
JMPI2CFAST
I2C EEPROM.
I2C EEPROM Fast Mode.
Low
Low
Low = Disable,High = Enable (2-wire I2C EEPROM interface using SCL / SDA)
Low = Disable, High = Enable
Title : 1394(VT6307)
JMPCARDBEN CardBus Mode. Low Low = Disable, High = Enable ASUSTek Computer Inc. Engineer: Mario Zeng
JMPPC0-2 Power Class. Used to set the three POWER_CLASS bits in the Self-ID packet. Size Project Name Rev
Programmable Contender High specifies that the node is capable of being a bus manager.
K8AE-LA
JMPCMC High
A3 1.00
/ Bus Manager Capable.
Date: 星 期 三 , 十 二 月 29, 2004 Sheet 25 of 40
5 4 3 2 1
5 4 3 2 1
X5
{19,22..25} A_D[0..31] 1 2
GND
3 25 MHZ
State Green LED Yellow LED
Close to
C268 C269
RTL8101
LINK 100/ 1000 ACTIVE
27P 27P
5% 5%
+3V OFF and bl inking
L62 Power On ON
+VDDA25 2 1
when 10/100Bas eT TX/RX
R398 + 120Ohm/100Mhz Power Off/S5 OFF OFF
D 1KOhm
If low,RTL8101L is isolated
GND CE18
100UF/16V
CB441 Irat=600mA
0.1UF
CB440
0.1UF
CB439
0.1UF
ON* D
from the PCI Bus
c0402 c0402 c0402 OFF
1.02 Change to 1% S3, S4
OFF
R401 GND GND GND GND No need Blinking in S3
R399 LAN_RTSET * When WOL_EN high
1 2 Pull high to
10KOhm 5.6KOhm
PCI_PME# {21,23..25}
Set LAN driving +3VSB +3VSB for LAN
1%
strength +3VSB
LED qunity
Detect standy power
GND GND issue
LAN_RXN R66 LAN+USB CON
LAN_RXP 4.7KOhm LEFT
LAN_TXN R400
ACTIVE
LAN_TXP
ROM_CS 1
U9
8
LAN_USB1 Yellow
220Ohm
R0805
ROM_CK CS Vcc LAN_TXP LAN_ACT
2 7 CB442 10 21
ROM_DI SK NC 0.1UF TD1+ LILEDN
3 6
+3VA ROM_DO DI ORG/NC LAN_TXN ACTP
4 5 11 22
DO GND TD1- LILEDP
C270 L R819 1 49.9Ohm2 93C46 LAN_RXP 12
TD2+
1 A 1% 19
0.01U LAN_RXN ACTLEDN
N R820 1 49.9Ohm2 13
1% TD2- LINKP
C271 GND 20
R821 1 49.9Ohm2 TD3+ ACTLEDP
GND
TD3- Right
+3VSB 14
U8
LINK CB453 CB454 CB455
15
GREEN Do Not Stuff Do Not Stuff
C GND

LAN_LED1
76
77
LED2 CLKRUNB
50
49 16
CTR
9 c0402
NI
c0402
NI
c0402
NI
C
LAN_ACT LED1 VDD_4 +VDD25 TD4+
78 48 17
LED0 VDD25_1 A_D0 TD4-
79 47 18 GND GND GND GND
INTBB AD0 LAN_GND
80 46 A_D1 30
{19} LAN_INT# INTAB AD1 A_D2 LANGND30
{30} LAN_RST# 81 45 29
RTSB AD2 LANGND29
{19,24} GNT6# 82 44 28
GNTB GND_4 A_D3 LANGND28
83 43 27
{19,24} REQ6# REQB AD3 A_D4 LANGND27
84 42 CB456
{19,23..25} C/BE3# A_D31 CBE3B AD4 A_D5
85 41 0.1UF
AD31 AD5
A_D30 86 40 A_D6 GND
A_D29 AD30 AD6 A_D7 ACTP
87 39 c0402
88 AD29 AD7 38 SBV01
GND_8 CBE0B C/BE0# {19,23..25} GND
A_D28 89 37 3 Q42
AD28 VDD_3 A_D8 C PMBS3904
90 36
A_D27 VDD_5 AD8 A_D9
91 35 B 11 2 LAN_S1 {30}
A_D26 AD27 AD9 A_D10 R964
92 34
A_D25 AD26 AD10 A_D11 E 10KOhm
93 33 7
+VDD25 AD25 AD11 A_D12 VCC2 2
94 32
VDD25_2 AD12
A_D24
95
96
VDD_6 GND_3
31
30 A_D13 {28} LP0- 5
1P- Add to meet
AD24 AD13
{19,22} PCICLK_LAN 97
PCICLK AD14
29 A_D14
A_D15
HP SPEC.GND
A_D19 98 28 23
IDSEL AD15 USBGND23
99 27 C/BE1# {19,23..25}
GPIO1 CBE1B
100 26 SERR# {19,23,24} 24
GPIO0 SERRB USBGND24
{28} LP0+ 3
1P+
25
RTL8101L USBGND25
1
GND2
26
B GND
USBGND26

B
+3V GND

8
R402 R516 R517 VCC1
+3VSB Do Not Stuff 4.7KOhm 4.7KOhm 6
{28} LP1- 2P-
NI
{19,23..25} C/BE2# PERR# {19,23..25}
{19,23..25} FRAME# PAR {19,23..25}
LAN_LED2 {30} {19,23..25} IRDY# STOP# {19,23..25}
R403
{19,23..25} TRDY#
220Ohm 3 GND
D {25} RDEVSEL#
R0805 Q6 4
{28} LP1+ 2P+
Do Not Stuff
LINKP 1 NI
G GND 2
S
2 GND1
3
D Q5
2N7002 GND
1 GND LAN_LED1 +3VSB +3VA +3VSB
G +3VSB
S 2 L63
2 1

R411 120Ohm/100Mhz
4.7KOhm Irat=600mA CB451 CB450 CB449 CB448 CB447 CB446 CB445 CB444 CB443
3 Q7 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
C PMBS3904 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402
A B 1
From SIO LEDS1-0 00 01 10 11
A
E
2 A8000 LAN_LED default
3 Q8 LINK10/ 1229
C PMBS3904 R114 GPI, can be LED0 TX/RX TX/RX TX ACT
B 1 2 1
LAN_LED {30} programmed GND GND
E 4.7KOhm to OD output LED1 LINK100 LINK10/100
LINK100/ Title : RTL8101L
LINK10/100 ACT
2
<OrgName> Engineer: Mario Zeng
Logical Devie A
GND LED2 LINK10 FULL RX FULL Size Project Name Rev
offset 47
GND A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 26 of 40
2004
5 4 3 2 1
5 4 3 2 1

{20} PIDE_D[15..0] PIDE_D0


PIDE_D1
PIDE_D2
D PIDE_D3 D
PIDE_D4
PIDE_D5 IDE1
PIDE_D6 IDERST# 1 2
RESET# GND1
PIDE_D7 PIDE_D7 3 4 PIDE_D8
DD7 DD8
PIDE_D8 PIDE_D6 5 6 PIDE_D9
DD6 DD9
PIDE_D9 PIDE_D5 7 8 PIDE_D10 GND
DD5 DD10
PIDE_D10 PIDE_D4 9 10 PIDE_D11
DD4 DD11
PIDE_D11 PIDE_D3 11 12 PIDE_D12
DD3 DD12
PIDE_D12 PIDE_D2 13 14 PIDE_D13
DD2 DD13
PIDE_D13 PIDE_D1 15 16 PIDE_D14
DD1 DD14
PIDE_D14 PIDE_D0 17 18 PIDE_D15
DD0 DD15
PIDE_D15 19 GND2
PIDE_DDREQ 21 22
GND3
PIDE_DIOW# 24
DMARQ GND4
PIDE_DIOR# 23 26 R267 470
{20} SIDE_D[15..0] SIDE_D0 PIDE_DIORDY
GND5
CAB1
DIOW# 28
CSEL 1 2
SIDE_D1 PIDE_DDACK# 25 30 GND
GND6
SIDE_D2 PIDE_IRQ14 DIOR#INTRQ 32
NC
SIDE_D3 PIDE_DA1 33 34 P66DETECT
PIDE_DA0
DA1 CABLE_80P#
PIDE_DA2 P66DETECT {21}
SIDE_D4 35 DA0 36
DA2
SIDE_D5 PIDE_DCS1# 37 38 PIDE_DCS3#
CS1#
SIDE_D6 PIDE_ACT# 40 R268
CS0# IDEACT# GND7
SIDE_D7 15KOhm +5V
SIDE_D8 BOX_HD_2X20P CB309
SIDE_D9 0.047U
SIDE_D10 GND GND ± 10%
SIDE_D11
SIDE_D12 R275
C SIDE_D13
ASUS P/N : 12 -07100040N C
GND GND 1KOhm
SIDE_D14 Color :Blue
SIDE_D15
IDERST#
{30} IDERST#
IDE2 CB311
PIDE_DCS1# IDERST# 1 2 Do Not Stuff
{20} PIDE_DCS1# RESET# GND1
PIDE_DCS3# SIDE_D7 3 4 SIDE_D8 ± 10%
{20} PIDE_DCS3# PIDE_DIOW# SIDE_D6
DD7 DD8
SIDE_D9
{20} PIDE_DIOW# 5 DD6 DD9 6
PIDE_DIOR# SIDE_D5 7 8 SIDE_D10 NI
{20} PIDE_DIOR# PIDE_DDACK# SIDE_D4
DD5 DD10
SIDE_D11
{20,22} PIDE_DDACK# 9 DD4 DD11 10 GND
PIDE_DIORDY SIDE_D3 11 12 SIDE_D12 GND
{20} PIDE_DIORDY DD3 DD12
PIDE_DDREQ SIDE_D2 13 14 SIDE_D13
{20} PIDE_DDREQ DD2 DD13
PIDE_IRQ14 SIDE_D1 15 16 SIDE_D14
{20} PIDE_IRQ14 DD1 DD14
PIDE_DA0 SIDE_D0 17 18 SIDE_D15
{20} PIDE_DA0 PIDE_DA1
DD0 DD15
{20} PIDE_DA1 19 GND2
PIDE_DA2 SIDE_DDREQ 21 22
{20} PIDE_DA2 SIDE_DIOW#
GND3
DMARQ 24
GND4
SIDE_DIOR# R271 470 D4
23 26
GND5
SIDE_DCS1# SIDE_DIORDY 28 CAB2 1 2 1 SIDE_ACT#
{20} SIDE_DCS1# SIDE_DCS3#
DIOW# CSEL
SIDE_DDACK# 25 30 3 PIDE_ACT#
{20} SIDE_DCS3# SIDE_DIOW#
GND6
GND {33} HDLED#
SIDE_IRQ15 31 2
{20} SIDE_DIOW# NC 32
SIDE_DIOR# SIDE_DA1 34 S66DETECT
{20} SIDE_DIOR# INTRQ CABLE_80P#
SIDE_DA2 S66DETECT {21}
SIDE_DDACK# SIDE_DA0 36 BAW56W
{20} SIDE_DDACK# 33 DA1 DA2
SIDE_DIORDY SIDE_DCS1# 38 SIDE_DCS3# +3V
{20} SIDE_DIORDY 35 DA0 CS1#
SIDE_DDREQ SIDE_ACT# 40 R272
{20} SIDE_DDREQ 37 IDEACT# GND7
SIDE_IRQ15 CB310 15KOhm
{20} SIDE_IRQ15 SIDE_DA0 0.047U
BOX_HD_2X20P
{20} SIDE_DA0
SIDE_DA1 ± 10% R274
B {20} SIDE_DA1 B
SIDE_DA2 GND GND 4.7KOhm
{20} SIDE_DA2
D5
GND GND
ASUS P/N :12 -071000401 1
3 SATALED# {20}
Color :B lack 2

BAW56W
+3V

SERIAL ATA CONNECTOR PIDE_DIORDY

SIDE_DIORDY
R95

R96
1
Stuff
2 Do Not

Do Not Stuff1
NI
PIDE_DDREQ R97 1 2 Do Not
Stuff
SIDE_DDREQ R98 NI
1 2 Do Not
PIDE_IRQ14 R59 2 1 Do Not
Stuff
SATA1 SATA2 SIDE_IRQ15 R60 2 NI
8 HOLD1 8 HOLD1 NI
1 1 PIDE_D7 R61 2 1 Do Not Stuff
GND1 GND1
2 A+ 2 A+ NI
{20} SATA_TXP0 {20} SATA_TXP1 SIDE_D7 R68
3 A- 3 A- 2 1 Do Not Stuff
{20} SATA_TXN0 {20} SATA_TXN1 NI
4 GN 4 GN
A 5 D2 5 D2 A
{20} SATA_RXN0 {20} SATA_RXN1
6 B- 6 B-
{20} SATA_RXP0 {20} SATA_RXP1
7 B+ 7 B+ GND
9 GN 9 GN
D3 D3

SATA _CON_7P
Title : IDE CONNECTOR
SATA _CON_7P
GND GND

ASUS P/N : 12 -156020074 ASUS P/N :12 -156020077 ASUSTeK COMPUTER INC Engineer: Mario Zeng
Color : Black Color : Blue Size Project Name Rev
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 27 of 40
5 4 3 2 2004 1
5 4 3 2 1

LAN + Dual USB CONNECTOR Port 0 & 1

6
0Ohm 5
8
RN95C

+5V_USB SBV01 +5V_USB SBV23


L36 07-014200100
D D
{21} USBP0 1 8 LP0+ {26} 07-01416010L
07-014160010
{21} USBN0 2 7 LP0- {26}
Common F3 F4
3 Choke 6
{21} USBP1 LP1+ {26} 1 2 1 2

{21} USBN1 4 5 LP1- {26} 1.6A/6V 1.6A/6V


R276 R277
2.2KOhm 2.2KOhm
Do Not Stuff + +
NI CB312 CE9 CB313 CE10
2 0.1UF 1000UF/6.3V 0.1UF 1000UF/6.3V
0Ohm 1 {21} OC0# {21} OC2#
4 c0402 c0402
RN95A
1.02 change for CB314 R278 CB315 R279
4.7KOhm
D o Not Stuff 4.7KOhm
D o Not Stuff
EMI request c0402 c0402
1394 + Dual USB CONNECTOR Port 2 & 3 NI NI

6 GND GND GND GND GND GND


0Ohm 5
8
RN96C
+5V_DUAL SBV45 +5V_DUAL SBV67

L37
{21} USBP3 1 8 LP3+ {25}
C 2 7 F5 F6 C
{21} USBN3 LP3- {25}
Common 1 2 1 2
Choke
{21} USBP2 3 6 LP2+ {25}
1.6A/6V 1.6A/6V
4 5 R280 R281
{21} USBN2 LP2- {25}
2.2KOhm 2.2KOhm
Do Not Stuff +
NI CB316 CE11 +
0.1UF 1000UF/6.3V CB317 CE12
{21} OC4# c0402 {21} OC6# 0.1UF 1000UF/6.3V
2
0Ohm 1
4 c0402
RN96A CB318 R282 CB319 R283
Do Not Stuff4.7KOhm Do Not Stuff
c0402 4.7KOhm
Front USB CONNECTOR Port 4 & 5 NI c0402
NI

4 GND GND GND GND GND GND


0Ohm 3
2
RN97B

L38 NI SBV45 SBV45


8 1 LP5- F_USB1
{21} USBN5
1 VCC VCC 2
7 2 LP5+ LP5- 3 LP1- LP2- 4 LP4-
{21} USBP5
Common LP5+ 5 LP1+ LP2+ 6 LP4+
Choke LP4-
{21} USBN4 6 3 7 GND GND 8
NC 10
B B
5 4 LP4+ USB COM
{21} USBP4
USB_WHITE ASUS P/N : 12 -061000102
Do Not Stuff
Color : WHITE
8 1 V_FP_USBPWR0
0Ohm 7
6 GND
RN97D 2 V_FP_USBPWR0
3 USB_FP_P0-
Front USB CONNECTOR Port 6 & 7 4 USB_FP_P1-
5 USB_FP_P0+
4
0Ohm 3
6 USB_FP_P1+
2
RN98B 7 Ground
0Ohm 1 SBV67 SBV67 8 Ground
RN98A F_USB2
L39 1 VCC VCC2
9 Key
8 1 LP7- LP6- 3
LP1- LP2- 4 LP7- 10 USB_FP_OC0
{21} USBN7 LP6+ LP7+
5 LP1+ LP2+ 6
7 2 LP7+ 7 GND GND 8
{21} USBP7
Common NC 10
6 Choke 3 LP6- USB COM
{21} USBN6
USB_WHITE
5 4 LP6+
{21} USBP6
Do Not Stuff
A A
GND
8
0Ohm 7
6
RN98D

Title : USB2.0 CONNECTOR


ASUSTeK COMPUTER INC Engineer: Mario Zeng
Size Project Name Rev
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 28 of 40
2004
5 4 3 2 1
5 4 3 2 1

+3V L64 +5VA L101 CHANGE 0 OHM +12V


+5V +5V 1 2 U11
SPDIF_IN1 L40
L41 1 Do Not Stuff 1 8 1 2
SPDIF_IN Vout Vin
1 2 2 NI
3 2 7 120Ohm/100Mhz
CB320 CB322 CB323 C190 GND1 GND4 CB326
Do Not Stuff + Irat=600mA
NI C191 Do Not Stuff 10uF CB321 0.1UF 0.1UF R284 CE1 10UF/10V 3 6 CB35
GND2 GND3
Do Not Stuff NI c0805 0.1UF/25V c0402 c0402 C1206 0.1UF/25V Do Not Stuff
+/-5% +3V GND Do Not Stuff Do Not Stuff NI
4 5
GND NI NI NC1 NC2
NI c0805
AGND_A
GND AGND_A AGND_A LM78L05ACM AGND_A AGND_A GND
D R86 GND GND AGND_A GND C192 Do Not StuffR285 D
C193
Do Not Stuff 4.7KOhm U12
11-040010744 禁 用 2
NI
1 1
FRONT_MIC2
2
R286 Do Not
± 5% C0805 NI 1Stuff NI VREFOUT4 +5VA
NI 2 32 R287 Do Not
{8} CODEC_14M XTL_IN NC2
31 1Stuff NI 2
NC1 STALS1 R289 R291
3 30 1 2
XTL_OUT AFILT2 Do Not StuffC194 10KOhm
29 1 2
33 I_RBITCLK AFILT1 R288 Do Not NI 1 2
R292 1 2 6 27 2 1
{21} AC_BITCLK BITCLK VREF C195 R290 Do Not Stuff C196
11
{21} AC_RST# RESET# C198 Stuff NI
C199 NI 1000P
10 1000P
C197 {21} AC_SYNC SYNC 4.7U
0.1UF C0805 Do Not Stuff C201 C202
{21,22} AC_SDATA_OUT 5
SDOUT 658C : 02-611000100H c0402 C200
NI Do Not Stuff Do Not Stuff Do Not AGND_A
Do Not Stuff R2931 2 10Ohm
NI {21} AC_SDATA_IN0 SDIN NI Stuff
NI NI L42
658D : 02-611000110H
C203 PC_BEEP FRONT_MIC_IN 1
PCBEEP PHONE 658E : 02-611000120H 2 AGND_A
GND 1 2 12
JD5 1 2 13 AGND_A AGND_AGND_A AGND_A AGND_A AGND_A 120Ohm/100Mhz
ASUS P/N : 12-080100042 EE1 EE2 R294
1000P 1000P 1UF/10V Do Not Stuff C204 VREFOUT3 FRONT_MIC21 L43 2
Color : WHITE NI 1U MONO_OUT/VREFOUT3
37
CE14 100UF/16V R295 L44 Do Not Stuff
F_ 2
AGND_A 1UF/25V (0805) Y5V
FRONT_OUT_R
36 LINE_OUT_R 22Ohm
1 2 1 2 1 2 NI AU3 4
AGND_A AGND_A 120Ohm/100Mhz 5 6
CE15 100UF/16V R296 L45 JD5 7
AUX_IN1 L46 AGND_A C205 4.7U 35 LINE_OUT_L 22Ohm
1 2 1 2 1 2 9 10
R297 AUX_IN_R C0805 AUX_R FRONT_OUT_L 120Ohm/100Mhz
4 1 2 2 1 15
AUX_R
10Ohm 2 3 120Ohm/100Mhz HD_2X5P_K8
1 J 2 L47 C207 C208
1 1 2 AUX_IN_L 2 1 AUX_L 14 R301 D6 R299 R300 1000P 1000P
R298 120Ohm/100Mhz AUX_L Do Not Stuff 22KOhm 22KOhm R302 AGND_A
VREFOUT3 1 2
C 0Ohm C206 4.7U R303 Do Not Stuff C

AGND_A
VREFOUT2
1
WAFER_HD_4P
2
BLOUT_L1
R305
2 JD2
C0805 R304
1Stuff NI
Do Not
16
17
JD2
ALC658 NI

AGND_A
Do Not Stuff
NI
AGND_A AGND_A
VREFOUT51 2

Do Not Stuff
NI

AGND_A
D7 Do1Not 22KOhm2 RN99A C209 JD1/GPIO1 R306 D8 NI AGND_A
Stuff NI Do Not Stuff Do Not Stuff C210 45 HP_DET 1 2 JD0 1 2 BLOUT_R
3 22KOhm4 RN99B NI C0805 Do Not Stuff
JD0/GPIO0 BLOUT_L
22KOhm6 RN99C NI C0805 20KOhm
7 1N4148W
22KOhm8 RN99D C211 C212 EE88
NI
CAP 1UF/25V (0805) Y5V (105) 4.7U +5VA R307 10uF/10V
0Ohm L48 Do Not Stuff
AGND_A CD_IN1 L49 AGND_A 1U C213 C0805 1 2 1 2 BLOUT_RT 1 2 LINE_OUT_RT NI
R308 4 1 2 CD_IN_R 2 1 CD_R BACK_R c0805 120Ohm/100Mhz
CD_R
2 0Ohm 1 3 120Ohm/100Mhz AGND_A L50
2 L51 1U R309 1 2 1 2 BLOUT_LT 1 2 LINE_OUT_LT AGND_A
1 1 2 CD_IN_L 2 1 CD_L c0805 120Ohm/100Mhz
120Ohm/100Mhz CD_L Do Not Stuff R310 C214 R311 C217 C218 F_AUDI:56
1U
2 1 CD_GND CAP 1UF/25V (0805) Y5V (105) NI 0Ohm 10uF/10V Do Not Stuff 100P 100P
WAFER_HD_4P CD_GND BACK_L +5V NI +/-5% R312
CAP 1UF/25V (0805) Y5V (105) R313 R314 1KOhm 1U SPDIF1 +/-5%
Do Not Stuff MINI_JUMPER_BLUE
FRONT_MIC_IN 2 1 2C219 1 2 1 34 L52 1 NI
R315 FRONT_MIC SPDIF_OUT SPDIFO F_AUDI:910
48 1 2 2
Do Not Stuff 0Ohm R316 C220Do Not SPDIFO SPDIF_IN 120Ohm/100Mhz
47 3
Stuff SPDIFI/EAPD
ASUS P/N : 12-08010004H 2 1 2 1
XTLSEL
46 XTLSEL AGND_A AGND_A
NI NI C221 WAFER_10P MINI_JUMPER_BLUE
Color : BLACK NI 41 100P
1U SURR_OUT_R
40 +/-5% GND
MIC1 NC3 VREFOUT6
2 C 21 39 P/N : 12-080100030
AGND_A MIC1 SURR_OUT_L
Color : White
B
1U
2 C MIC2 22
LFE_OUT
44
43
VREFOUT5
VREFOUT4
R317
R318
R319 R320
Do Not StuffD o Not
GND AUDIO_CON1 B
MIC2 CEN_OUT 0OhmD o Not Stuff LINE_IN_RT 35 LINE IN
VREFOUT Stuff NI NI R321 JD4 34
VREFOUT NI
28 1 2 AGND2
33 VREFOUT2 LINE_IN_LT 33
LINE_L VREFOUT2 AGND_A GND GND Do Not Stuff LINE IN LT
R65 0Ohm C224 24 GND NI
1UF/10V LINE_R C225
1 2 25 LINE/SPKR OUT
Do Not Stuff RT
ALC658 C0805 24
NI LINEOUT RT ATN
23
AGND_A GND
AGND_A AGND_A
Chagne to 658"C"(7/2) MIC2_IN_T 5 MIC
R322 R323 GND AGND_A C226 R324 0Ohm L53 JD0 PWR
Do Not Stuff LINE_IN_R 2.2UF/16V
2 1 LINE_R 1 2 1 2 3
4.7KOhm C0805 120Ohm/100Mhz MIC1_IN_T 2
R325 NI R326 L54 1 MIC
0Ohm LINE_IN_L 2 1 LINE_L 0Ohm 1
JP11 POST P1
1 2 1 2 2120Ohm/100Mhz G1 GND G4
C227 C228 C229 2 1 GND GND G3
2.2UF/16V R327 R328 100P 100P
AGND_A GND 100KOhm +/-5% +/-5% Do Not Stuff JACK_3IN1
R329 100KOhm
1 2 VREFOUT6 AGND_A NI AUGND
AGND_A AGND_A
Do Not Stuff AGND_A AGND_A JP12 place near
NI AGND_A AGND_A
A
CB247 pin2 A
R330 L55
AUGND: 20 mils
1KOhm MIC2_IN 1 2
1 2 120Ohm/100Mhz
R331 L56
1KOhm
1 2
MIC1_IN 1
2 Title : AC'97
120Ohm/100Mhz
JD1: Front Headphone R333 R332 C230 C231 C232 C233 ASUSTeK COMPUTER INC Engineer: Mario Zeng
JD2: Front Line_In(AUX-IN) 1 2 Do Not Stuff Do Not Stuff Do Not StuffDo Not Stuff 100P 100P Size Project Name Rev
NI NI
JD5: Front MIC_IN R334 Do Not NI NI A3 K8AE-LA 1.00
JD4: Rear Line_In Stuff NI AGND_A AGND_A AGND_A AGND_A Date: 星 期 三 , 十 二 月 29, Sheet 29 of 40
AGND_A AGND_A 2004
JD0: Rear MIC_IN AGND_A
GND
5 4 3 2 1
5 4 3 2 1

BATT +3V +3VSB


C236 Do Not Stuff
+3V +3VSB BATT PCICLK_SIO 0.5PF
1 2 NI

C235 Do Not Stuff


SYS_RST# 0.5PF 1 2 NI
CB327 CB328 CB329 CB330 CB331 CB332 CB333 CB334
0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 1UF/10V CB31 Do Not Stuff
U13 c0402 c0402 c0402 c0402 c0402 c0402 c0402 SMBCLK c0402 1 2 NI
73 FDDET# {32}
GP51/nDCD2 CLRPW# CB30 Do Not Stuff
71
GP50/nRI2
18 79 GND SMBDATA c0402 1 2 NI
{8} SIO_14M CLOCKI GP56/nCTS2
{19,22} SB_RTCCLK 99 80 LAN_LED2 {26} GND
CLKI32 GP57/nDTR2
D 78 GND EE93 Do Not Stuff D
GP55/nRTS2
{32} DCD1# 64
nDCD1 COM2 GP54/nDSR2
77
+3V
IDERST# c0402 1 2 NI
{32} RI1 63
nRI1 GP53/TXD2/IRTX
76 LAN_LED {26} Base I/O address 0 : 2E
69 75 EE94 Do Not Stuff
{32} CTS1#
70
nCTS1 GP52/RXD2/IRRX LAN_S1 {26} select: 1 : 4E FWH_RST#c0402 1 2 NI
{32} DTR1# nDTR1
{32} RTS1#
68
nRTS1/SYSOPT COM1 R335 1 2 Do Not
67 Stuff EE89 Do Not Stuff
{32} DSR1# nDSR1 1394RST# c0402
66 NI NI1
{32} TXD1 TXD1/SIO/XNOR_OUT RTS1#
{32} RXD1 65 107 SMBDAT A {8,15,18,21,23,24}
RXD1 SDA
106 EE90 Do Not Stuff
SCLK SMBCLK {8,15,18,21,23,24}
108 LAN_RST# c0402 1 2 NI
nHWM_INT HWM_INT {21}
2 3 GND
+5V_IN +5V
128 C237 C EE92 Do Not Stuff
+5VTR_IN 2200P 1 B Q9 PCIE_RST#c0402 1 2 NI
127 +VCORE
DENSEL# VCCP_IN 10% PMBS3904
3 1
{32} DENSEL# GP40/DRVDEN0 +12V_IN +12V E +3VSB +3VSB
IDX# 14 126 C334 Do Not Stuff
{32} INDEX# nINDEX Remote1+
{32} MTRA#
MTR0# 5
nMTR0 H/W monitor Remote1-
125 2 1394RST# c0402 1 2 NI
DRV0# 7 124
{32} DRVA# nDS0 Remote2+ H_THRMDA {10}
DIR 9 123 R336 R53 C335 Do Not Stuff
{32} DIR# STEP# nDIR Remote2- C234 Do Not StuffDo Not Stuff
10 111 LAN_RST# c0402 NI1 2
{32} STEP# nSTEP PWM1/XTESTOUT CPU_FANPWM {35}
WD# 11 110 2200P NI NI
{32} WDATA# nWDATA PWM2 CHAS_FANPWM {35}
{32} WGATE#
WG#
TRK0#
12
nWGATE FDD PWM3/ADDR_EN#
109 SM_ADD_EN# 10% SLP_S3#
SLP_S5#
EE76
RSMRST# c0402 2
Do Not Stuff
15 115 CPUFAN {35} H_THRMDC {10} 1 NI
{32} TRK0# WP# nTRK0 FANTACH1
16 114 CHASFAN {35}
{32} WPT# RD# nWRTPRT FANTACH2
17 112 R338 1 Do Not
{32} RDATA# nRDATA FANTACH4/ADDR_SEL Stuff +3VSB
HDSEL# 13 2
{32} HDSEL# DSKCHG# nHDSEL NI
6 GND
{32} DSKCHG# nDSKCHG +3VSB
1 Do Not
C Stuff
NI
+3V BATT
1.01 Modify C

62 R92
{32} XSTB# nSTROBE Do Not Stuff
61
{32} XAFD# nALF D9
{32} ERROR#
60
nERROR
R340
Clear PW Clear CMOS NI
59 R341 SLP_S3#
2
{32} ACK# nACK
58 10KOhm 1MOhm IO_PSGD 3
{32} BUSY BUSY
{32} PE 57 90 LPC_PME# {21} 1 ATX_PWRGD {34}
PE GP42/nIO_PME_S3 CLRTC1
{32} SLCT 56 92
SLCT nIO_PME_S5/GP43 CLRPW# CLRRTC# C337 R983 C338
54 94 1 2
{32} XPD7 PD7 GP60/nLED1/WDT PLED2 {33}
{32} XPD6 53
PD6 Parallel GP61/nLED2/MSLED#
93 PLED {33} 3 4 2200P
BAW56W Do Not Stuff 0.1UF
{32} XPD5 52
PD5 GP27/nIO_SMI/P17
36 LPC_SMI# {21} Default : 3_5 5 6 Default : 4_6 10%
NI
{32} XPD4 51
PD4
{32} XPD3 50
PD3 2X3P GND
{32} XPD2 49
PD2 GND GND
{32} XPD1 48
PD1 GND
{32} XPD0 47
PD0
46
{32} XSLIN# nSLCTIN
45 98 PWRBTN# {21,33,39}
{32} XINIT# nINIT PB_IN# SLP_S3#
SLP_S3#
89 SLP_S3# {21} Only 3V output from SIO, may require a level
88 SLP_S5# {21}
SLP_S5#
81 shift circuit to control dual power
nFPRST SYS_RST# {21,33,34}
PWRGD_PS
82 IO_PSGD Change to 35 Change to 46
83
PWRGD_CPU
{19,33} LAD0
LAD0 19
LAD0 PWRGD_3V
84 n3V_GATE S0/S1 S3 S5
LAD1 20 85 CLRTC:35 CLRTC:46
{19,33} LAD1 LAD1 n3VSB_GATE
{19,33} LAD2
LAD2
LAD3
21
LAD2 ASIC n3V_GATE
86 n3V_GAT E {39}
{19,33} LAD3 22 97 1394RST# {25}
LAD3 GP11/nPCIRST_OUT1
B {19,33} LFRAME# LDRQ#
23
LFRAME# LPC GP12/nPCIRST_OUT2
96 LAN_RST# {26} B
24 LDRQ# 95 PCIE_RST# {18}
PCIRST_OUT4---OD n3VSB_GATE S0/S1 S3 S5 MINI_JUMPER_BLUE MINI_JUMPER_BLUE
{19} LDREQ0# GP13/nPCIRST_OUT3 +3V
{19} LPC_RST# 25 87
PCI_RESET# GP14/nPCIRST_OUT4 FWH_RST# {33}
26 28
{19,22} PCICLK_SIO SERIRQ PCI_CLK nIDE_RSTDRV/GP10 output
{19} SERIRQ 27
SER_IRQ SPEAKER
30 Delay 22ms IDERST# {27}
100
nRSMRST +3V +3VSB
EE79 EE80
Do Not Stuff 105
c0402 c0402 SCLK1
104
GNDNI NI 37 SDA1
{31} KBDATA 103
KDAT/GP21 SCLK2
GND 38 102
{31} KBCLK KCLK/GP22 SDA2 RN100A RN100B
39 RN100C RN100D
{31} MSDAT A MDAT/GP32
{31} MSCLK 40
MCLK/GP33 MS/KB nINTRD_IN
33 CLRRTC# 4.7KOhm 4.7KOhm 4.7KOhm 4.7KOhm
41
{21} RST_KB A20GAT E GP36/nKBDRST {19,33} LAD0
42 120
{21} A20GAT E GP37/A20M VID0 CPU_FANPWM {19,33} LAD1
119
VID1 CHAS_FANPWM {19,33} LAD2
118
EE78 VID2 SM_ADD_EN# {19,33} LAD3
117
Do Not Stuff VID3 {19} LDREQ0#
116
c0402 VID4 {19} SERIRQ
113
VID5/FANTACH3 {21} A20GAT E
NI
{21} RST_KB
GND A8000
GND

Chagne to Rev.D(7/2) Do Not Stuff Do Not Stuff


NI1 2 NI1 2
A A
JP12 JP13
GND AVGND HVGND GND

Title : A8000
ASUSTeK COMPUTER INC Engineer:Mario Zeng
Size Project Name Rev
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 30 of 40
5 4 3 2 2004 1
5 4 3 2 1

+5V_F

12-141013062
for HP
PS/2 KEYBOARD & MOUSE
D
KBMS1 D
16 CMSCLK C18 2 1
SIDE_G16 NC2 6 150PF/50V
4 VCC1 CMSDATA C19 2 +5V_F
L57 2 NC1 1
KDAT 2 1 CKBDATA L58 CKBCLK C20 2 150PF/50V
17
SIDE_G17 KCLK 5 CKBCLK 1 2
120Ohm/100Mhz 1 KDATA CKBDATA C21 2 1 1
3 120Ohm/100Mhz 150PF/50V 4.7KOhm2 RN102A
3
PS2 MOUSE 4.7KOhm4 RN102B
5
4.7KOhm6 RN102C
14 SIDE_G14 GND 7
10 VCC2 NC4 12 4.7KOhm8 RN102D
8 NC3
L59
MDAT 2 1 7 MDATA L60 KDAT 1 2 RN103A
KCLK 33 KBDATA {30}
CMSDATA 9 GND2 MCLK 11 CMSCLK 2 MCLK 3 RN103B
4
33 KBCLK {30}
13 1 MDAT 5 6 RN103C
MCLK 33 MSDAT A {30}
120Ohm/100Mhz 7 8 RN103D
33 MSCLK {30}
MINI_DIN_6P

GND

C C

+5V_F
+5V_USB L61
120Ohm/100Mhz
F7 l1206 Irat=2A
1 2 1 2
MH1
MH2 1.1A/6V

1 9 CB339
GND1 NC
2 8 1 9 0.1UF/25V
GND2 GND1 NC
3 GND8 7 2 8
GND3 GND2
4 GND7 6 3 GND8 7
GND4 5 4 GND3 6
GND6 GND7 5
B GND5 GND4 B
GND6 GND
Do Not Stuff GND5
NI
MH4 Do Not Stuff
1 9
MH7
2 8 1 9
GND2 GND1 NC
3 GND8 7 2 8
GND3 GND2
4 GND7 6 3 GND8 7 1 9
GND1 NC
GND4 5 4 GND3 6 2 8
GND4 GND2
GND6 GND6 5 3 GND8 7
AGND_A Do Not Stuff 4 6
GND5 GND3
NI GND7 5
Do Not Stuff GND4
NI GND6
MH8 GND5

1 9
2 GND1 NC 8
3 GND2 7
4 GND8 6
GND3 5 AGND_A
GND7
GND GND4
GND6
GND5

ONLY FOR SCREW HOLE


A A

Title :KETBOARD & MOUSE


ASUSTeK COMPUTER INC Engineer: Mario Zeng
Size Project Name Rev
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 31 of 40
5 4 3 2 2004 1
5 4 3 2 1

LPT+5V

LPT PORT PE 3 2.7KOhm5


RP5C
STB#
AFD#
SPD0
+/-20%1
+/-20%3
5
150P
2
CN2A
4
6 CN2C
LPT1
SIDE_G26 26

SPD3 1 RN104A BUSY 8 CN2D SLCT


22Ohm 2 XPD3 {30} ACK#
2 2.7KOhm
RP5B 5 ERROR# +/-20%7
150P
SLCT
13 SLCT {30} 1.01 Modify
SLIN# 3 RN104B 25 +5V
22Ohm 4 XSLIN# 1 GND8
SPD2 5 ERROR# 12 PE
RN104C
22Ohm 6 {30} 10 PE PE
PINIT# 7 XPD2 {30} SPD7 2.7KOhm GND 24
22Ohm 8 RN104D GND7 {30}
SPD6 5 RP5D 11 BUSY WPT# 1 2 RN119A
XINIT# {30} 6 2.7KOhm10
5 BUSY BUSY 1KOhm
SPD5 8 SPD1 TRK0#
SPD4 2.7KOhm10
5
SPD2
+/-20%1 2 GND6
23
ACK#
{30}
INDEX#
3
1KOhm
4 RN119B
9 RP5H 4 10 5 6 RN119C
SPD1 2.7KOhm10
5 SLIN#
+/-20%3 ACK# ACK# DSKCHG# 1KOhm
D 1 RN105A 10 +/-20%5 CN3C
6 22 {30} 7 8 RN119D D
22Ohm 2 XPD1 {30}
SPD3
GND5
SPD7 1KOhm
SPD0 3 RN105B +/-20% CN3D
8 9
AFD# 22Ohm 4 XPD0 {30} 150P
7
SPD7
RDATA#
5 21 R933 1 2
STB# 22Ohm 6 RN105C XAFD# {30} GND4
SPD6
7 8
22Ohm 8 RN105D XSTB# {30}
LPT+5V
SPD6
GND 28 GND3
20
7 SPD5
SIDE_G28 SPD5
RP6A GND2
19
SPD7 1 RN106A SPD0 SPD4 8 CN4D SPD4
22Ohm 2 XPD7 {30} SPD1
1 5
2.7KOhm
SPD5
+/-20%7 SPD4
6
SPD6 RN106B +/-20 CN4B
% +3V
22Ohm RP6B
5 22Ohm 6 3 10
5 %5 6 5 FLOPPY1
XPD5 {30} 2.7KOhm SPD7
SPD3
SLIN#
SPD4 7 AFD# 8 GND 17
22Ohm 8 RN106D XPD4 {30} SPD3 RP6D
6 150P SLIN#
4 SPD2 1 2
10
5 SPD2 GND1 RWC# DENSEL# {30}
SLIN# 7 10
5 16 PINIT# R390 3 4
PINIT# GND2 NC1
LPT+5V SPD2 2.7KOhmRP6G 3 SPD1 1KOhm 6
SPD1 NC2
PINIT# GND 15 ERROR# 7 8
10
8 RP6H ERROR# ERROR# IDX# INDEX#
10 5
2.7KOhm SPD0
2 SPD0
{30} 9 GND4 MTR0# 10 {30}
MTRA# {30}
SLCT R352 2.2KOhm
1 ACK# 2 CN5A 14 AFD# 11 12
+/-20%1 AFD# {30} FDDET# GND5 DRV1#
BUSY 4 CN5B 1 STB# 13 14
+/-20%3 STB# GND6 DRV0# DRVA#
PE 6 15 16
GND7 MTR1# {30}
C241 CB340 +5V LPT+5V PINIT# 150P 1 2 27 17 18
+/-20% SIDE_G27 DIR DIR#
150P 0.1UF/25V D16 19 20 {30}
GND9 STEP# STEP# {30}
+/-5% 1 2 25P R351 1 2 Do Not 21 22
WD# WDATA#
± 5% GND GND Stuff 24 {30}
GND10 WG#
1N4148W 25 GND12 TRK0# WGATE#
TRK0# {30}{30}
1.25V/150mA 1.02 Modify 27
26 28
WP# WPT# {30}
GND GND R353 1 2 Do Not 30
GND13 RD# RDATA#
NI 31 {30}
GND15 HDSEL HDSEL# {30}
32 DSKCHG# {30}
33 GND16 DSKCHG#
C C
34

GND

ASUS P/N : 12 -07100034I


Color :Black

SERIAL PORT A
COM1
+12V +5V DDCD1# 1 2 RRXD1
TTXD1 3 4 DDTR1#
B DDSR1# B
U16 5 6
1 20 RRTS1# 7 8 CCTS1#
+12V -12V +5V DDCD1# VCC+ VCC DCD1# RRI1
2 19 DCD1# 9
RA1 RY1
DDSR1# 3 18 DSR1# {30}
RRXD1 RA2 RY2 RXD1 Do Not Stuff
4 17 DSR1# {30}
RXD1 {30}
CB341 CB342 CB343 RRTS1# RA3 RY3 RTS1# NI
5 16 RTS1# {30}
Do Not Stuff Do Not Stuff Do Not -12V TTXD1 DY1 DA1 TXD1
6 15 TXD1 {30} GND
Stuff
NI NI NI CCTS1# DY2 DA2 CTS1#
7 14 CTS1# {30}
RA4 RY4 DTR1#
DDTR1# 8 13
DY3 DA3 DTR1# {30}
RRI1 9 12 RI1
RA5 RY5 RI1 {30}
10 11
VCC- GND 1.02 modify 8 /19
Do Not Stuff
GND NI GND

RRTS1# 5 6
RRXD1 3
CN7C
DDSR1# 7 Do Not Stuff
CN7D
Do Not
DDCD1# NI CN6A 2
1 Do
No
t
RRI1 1 St CN7A
2
uffDo Not Stuff
DDTR1# 7 CN6D 8
Do Not Stuff
CCTS1# CN7B 4
TTXD1 NI
5 NI 6
A CN6C A
Do Not Stuff

GND

Title :Serial & Paralle Port


ASUSTeK COMPUTER INC Engineer: Mario Zeng
Size Project Name Rev
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 32 of 40
5 4 3 2 2004 1
5 4 3 2 1

CONTROL PANEL / LED CIRCUITRY 30


29 21

20
+3V

31
+5V 32 BIOS1
CB32 CB336 CB338
1 BIOS ROM
HPD PANEL
0.1UF Do Not 0.1UF
2 Stuff
c0805 c0402 c0402 PCB

R358 3 NI
D 220 4
+3V D
14
R0805 1.02 Modify PM49FL004T_3 3JC
GND
5 13
+3VSB +3V

R32
4.7KOhm
{30} FWH_RST# PCICLK_ROM {19,22}
R359
4.7K F_PANEL1 C239
1 2 FPLED1 Do Not Stuff Pin29: Mode Select
3 4 FPLED2 5% +3V
{27} HDLED#
5 6 PWRBTN# {21,30,39}
NI Pull down to
7 8 operate under
{21,30,34} SYS_RST# EE3
9
CB345 Do Not Stuff GND 5
GPI1 MODE
29 R349 LPC/FWH
Do Not Stuff HEADER_2X5P_K10 10% 6 28 mode
c0402 NI GPI0 CE#
{21} BIOS_WP# 7 27
NI WP# NC2 GND
8 26
TBL# NC1
GND 9 25
RES0 WHUB VDD
10 24 ROM_INIT#
RES1 INIT#
GND GND 11 23
RES2 LFRAME#
12
RES3
U15 NC0
22
13 21
LAD0 RES7

+5V ASUS P/N : 12 -061000101


C Color : B LACK C
R357 BUZZ1
PinDescrip tion(
1 2 1 LFRAME# {19,30}
SPKO 2 1Hard Drive Activity LED (Anode)
LAD3 {19,30}
220 2Power LED (Anode) LAD2
R0805 2400Hz {19,30}
3Hard Drive Activity LED (Cathode) LAD1
4Power LED (Cathode) GND {19,30}

5Reset Button (Optional)


6Power Bu tton SST49LF040: 05-001017110
Q17 3
R360 W39V040A : 05-001017210
C 7Reset Button (Optional)
SPKR 1 2 1 B CB346 PM49FL004T: 05-001005310
{21} SPKR Do Not Stuff 8Power Bu tton
1KOhm E c0402 9No func tion
PMBS3904 NI
10Key (no pin) Under LPC/FWH mode:

TBL#
When low, prevents programming to the boot block sectors at top of memory. When
TBL# is high it disables hardware write protection for the top block sectors. This pin
GND
cannot be left unconnected.

B Both are LED control pins from SIO A8000 WP# B


Default GPI->Logical Device A, offset +5V_DUAL When low, prevents programming to all but the highest addressable blocks.
+5V_DUAL
47/48 When WP# is high it disables hardware write protection for these blocks. This
for dual color pin cannot be left unconnected.

7
680Ohm 8 RN55D
3 7
680Ohm 4 RN55B
+3VSB 680Ohm 8 RN70D
5 3
1 680Ohm 6 RN55C
1 680Ohm 4 RN70B
680Ohm 2 RN55A 680Ohm 2 RN70A
5
680Ohm 6 RN70C
FPLED2
R380
1KOhm 3
FPLED1 R369 Q18 C EE72
Default {30} PLED2
1 2 1 B Do Not Stuff
Q19 3 NI
Low R365 C EE71 1KOhm PMBS3904 E C0603
PLED 1 2 1 B Do Not Stuff PLED/PLED2--> 2 R364
{30} PLED
NI Do Not Stuff
1K E C0603 +3VSB plane NI GND
EE14 PMBS3904
0.1UF
at SIO side
GND
for single color

A GND GND A

GND

Title
FRONT PANEL/FLASH ROM :
ASUSTeK COMPUTER INC Engineer: Mario Zeng
Size Project Name Rev
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 33 of 40
5 4 3 2 2004 1
5 4 3 2 1

+1.2V +3VSB
RS480 POWER GOOD CIRCUIT
+5VSB +3V

+3VSB +2.5V_DUAL +2.5V CB347 1.01 Modify R393 +3VSB


+1.2V 2 1 4.7KOhm
R375
20KOhm 74HC14
0.1UF/25V R64 VCC
R146 CB59 Default use ASM8903 10KOhm Q22 9 8 NB_PWRGD
4.7KOhm 0.1UF GND PMBS3904 {13}
D c0402 IT8282 as second source 3 GND D
1.02 Modify C U17D
U18 1 B R374
GND 1 Do Not Stuff
{37} VRM_PWRGD VCORE_GO SB5V 16 2 NI
2 15 CB392 GND
VLDT VLDT_EN_OD +1.2V_REF {40}
3 14 R982 1UF/10V
VDDA VDDA_EN_OD +2.5V_EN {36}
4 13 Do Not Stuff
VDIMM_DUAL VCORE_EN_OD VCORE_EN {37,39}
5 12 NI GND D18 GND
{21} SB_PSON# POSN#/PSON VDIMM_DUAL_EN_OD ASIC8M_VDIMM_DUAL_EN {36}
6 11 1
{21} S3_STATE# ACPI_S3 CPU_PWRGD_OD ASIC8M_CPU_PWRGD
7 10 SYS_RST# {21,30,33} 3
{30} ATX_PWRGD ATX_PWRGD/GND RESETBTN#/VCC ATX_PSON#
8 9 GND GND 2
GND ATX_PSON#_OD/GND
IT8282M BAT54CW
1V/0.2A
EE98 0.32V/1mA
Do Not Stuff
GND ASIC8M_CPU_PWRGD
c0402
NI
GND
EE85
Do Not Stuff SB400 POWER GOOD CIRCUIT
c0402
NI
GND

+3VSB +3VSB

C 74HC14 74HC14 C
R372 VCC VCC
1 2 1 2 3 4 SB_PWRGD {21}
{13} NB_PWRGD
VRM POWER SUPPLY CONNECTOR 270KOhm
C242
GND U17A GND
U17B R371
0.47UF/16V Do Not Stuff
NI
+12V_4P GND GND

ATX12V1
GND GND
1 3
1 3
2 4
2 4
5
NP_NC

POWER_CON_4P
CB362 CB363
0.1UF/25V 0.1UF/25V

+3VSB +3VSB +3VSB

GND GND GND

74HC14 74HC14 74HC14


VCC VCC VCC
13 12 5 6 11 10
B B

ATX POWER SUPPLY CONNECTOR GND


U17F
GND
U17C
GND
U17E
+5VSB

GND GND GND


+5V +12V +5VSB +5V +3V +3V -12V -5V +5V
ATXPWR1 R388
4.7KOhm

1 13
R389 +3V1 +3V4
2 14
+3V2 -12V
Do Not Stuff 3 15
GND1 GND4 ATX_PSON#
NI 4 16
+5V1 PSON#
5 17
GND2 GND5
6 18
+5V2 GND6
7 19
GND3 GND7
{30} ATX_PWRGD 8 20
PWR0K -5V
9 21
5VSB +5V3
10 22
+12V1 +5V4
11 23
+12V2 +5V5
12 24
CB351 +3V3 GND8 CB361
CB353 CB354 CB355 CB356 CB357 CB358 CB359
0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF Do Not Stuff0.1UF Do Not Stuff
NI NI
A 24P A

GND GND GND GND GND GND GND GND GND GND GND

Around the ATX Power Connector Title : HPQ SECURITY


Around the ATX Power Connector
ASUSTeK COMPUTER INC Engineer: Mario Zeng
Size Project Name Rev
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 34 of 40
5 4 3 2 2004 1
5 4 3 2 1

EMI CAPS.
CPU FAN +5V

Q24
Fan Voltage 7 to 12V CPU_FANPWR 1.01 Modify
+12V CPUFAN
AP3310H {30} EE4 EE5 EE6 EE13 EE8 EE12 EE7 EE10 EE11 EE20 EE53 EE28 EE31 EE34
D22 +3V 0.1UF Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not StuffD o Not
CPU_FAN1 1 R376 c0402 NI NI NI NI NI NI NI NI NI NI NI Stuff
NI NI
CPU_FANPWR 2.2KOhm
D SENSE 1 3 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 D
+12V 2 2 1 2
R378 R377 3 4
1 2 15KOhm GND NC C243 CB348
1% BAW56W Do Do Not Stuff GND
8.2KOhm WAFER_4P Not Stuff NI +3V
+ 1%
CPUFAN_CON CPUFANPWR_FB NI
GND
GND ASUS P/N : 12 -080000031
C244 R379 GND EE16 EE18 EE19 EE21 EE22 EE23 EE24 EE25 EE26 EE27 EE45 EE46
1000P 5.1KOhm Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff
Color :
+/-10%
10%
1% CHA_FANPWR 1.01 Mo CHASFAN
NI
c0402
NI
c0402
NI
c0402
NI
c0402
NI
c0402
NI
c0402
NI
c0402
NI
c0402
NI
c0402
NI
c0402
NI
c0402
NI
c0402
D23 {30}
CPUFANPWR_REF +3V
CHA_FAN1 1 R381

GND
11-040010744 禁 用 SENSE 1
2
+12V 2
3 2.2KOhm
1 2 GND +3V +1.8V
Q25 3 4
+12V AP3310H GND NC C245 CB349
WAFER_4P BAW56W Do Do Not Stuff
Not Stuff NI EE30 EE32 EE33 EE35 EE36 EE17 EE29 EE37 EE39
CHA_FANPWR NI
GND Do Not Stuff Do Not Stuff Do Not StuffDo Not Stuff
NI NI NI c0402 NI NI NI NI NI
R383 R382 GND GND c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402
1 2 15KOhm
+ 1%
8.2KOhm 1% System Fan WAFER HD 3P S/T 2.54mm
CHAFAN_CON CHASFANPWR_FB +1.2V GND +5V_DUAL +CLKVCC3 GND
W/POST change to Bro wn color.
C 12-08000003Q or 12-080020030 C
C246 R384
1000P 5.1KOhm +12V EE47 EE48 EE49 EE50 EE40 EE42 EE43 EE60 EE41 EE44
+/-10% 1% Do Not StuffDo Not StuffDo Not Stuff 0.1UF Do Not Stuff Do Not Stuff Do Not Stuff
10% NI NI NI c0402 NI NI NI NI NI NI
CHAFAN_REF C247 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402
0.1UF
U19
GND R385 CPUFANPWR_FB 3 8 GND
100KOhm + VCC CPUFAN_CON GND GND
1
1 2 CPUFANPWR_REF 2 A- AO
-
{30} CPU_FANPWM +5V_VGA BUS+12V +3V
CHASFANPWR_FB 5
B+ + BO 7 CHAFAN_CON
1 2 CHAFAN_REF 6
{30} CHAS_FANPWM - GND 4
EE15 EE9 EE54 EE55 EE56 EE59 EE75 EE61 EE74 EE86
R386 LM358MX Do Not Stuff Do Not 0.1UF Do Not Stuff Do Not Stuff Do Not Stuff
100KOhm Stuff
NI NI c0402 NI 0.1UF
NI c0402 NI NI NI NI
GND c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402
1.02 change to X7R
C248 C249
0.1U 0.1U GND GND GND
16V (0603) X7R 16V (0603) X7R
+1.8V +3VSB +1.2V
+3V +5V

GND
EE64 EE65 EE66 EE67
EE62 EE63 EE38 Do Not Stuff Do Not Stuff Do Not Stuff
B B
0.1UF 0.1UF 0.1UF NI NI NI NI
c0402 c0402 c0402 c0402 c0402 c0402 c0402

GND GND
GND

A A

1229

Title : FAN Speed Control


ASUSTek Computer Inc. Engineer: Mario Zeng
Size Project Name Rev
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 35 of 40
2004
5 4 3 2 1
5 4 3 2 +3VSB
1
VOLTAGE REFERENCE +3V_DUAL=>+2.5V_DUAL(3A/PEAK_5A)
+3VSB +5VSB +3VSB=>1.8VSB(0.2A)
+5VSB +12V PQ5
+3V_DUAL 3
PR5 C
1KOhm PRN1A 1 B
1%
PQ38 1KOhm PD1 E
BAT54CW
D2
1.81V AP9T15H PC91

D +1.8VSB_REF
1 OCP_CON 3
1KOhm
4
1000P
X7R
PRN107B
+1.8VSB
D
G
S

PC11
PR7
1.15KOhm
3 PRN1B
SB POWER 4

1KOhm
3

0.1UF +2.5V_DUAL PC86


c0402 1% 1000P +
PCE1
PU1
+3V
+2.5V_DUAL_GATE +1.8VSB_GATE 330uF/6.3V
GND GND 1 14
+2.5V_DUAL_FB OUT_1 +1.8VSB_FB
5 6 PRN1C 2 OUT_4 13
1KOhm +2.5V_DUAL_REF IN_1- IN_4- +1.8VSB_REF
3 12
IN_1+ IN_4+ GND
4 11 2D
+2.5V_EN V+ GND +1.8V_REF
5 10
+2.5V_FB IN_2+ IN_3+ +1.8V_FB
+ + PCE3 + +3V 6
IN_2- IN_3-
9 PRN107C PQ6
PCE37 PCE34 +2.5V_GATE 7 8 +1.8V_GATE 6 5 1
330uF/6.3V OUT_2
PQ39 OUT_3 G S AP9T15H
+3VSB 820UF/6.3V 820UF/6.3V 1KOhm 3
PC88 LM324MX
3 2N7002
D 1000P GND PC93
+3VSB +2.5V(0.5A) PRN1D 1000P
PR9 +2.5V 1 7 1KOhm PC15 X7R +1.8V
887Ohm G 0.1U
S 2 PRN107A
1% PR112 GND GND GND
332Ohm 2.54V 2 1
1%
1.91V PRN107D GND 1KOhm
+1.8V_REF +2.5V_EN 8 7
+2.5V_EN {34}
C PC89 PR113
1KOhm
+3V=>1.8V(1.5A)
+
PCE2 C
PR10 0.1UF 1KOhm +3V=>+2.5V(0.5A) 820UF/6.3V
PC1 1.15KOhm c0402 1% PCE35
0.1UF
c0402 1%
10UF/6.3V
need add GND

GND GND
GND GND protecy clk
GND

+2.5V_DUAL Output short protection


+3VSB
PD10 +2.5V_DUAL +3V_DUAL
1 +2.5V_DUAL
{34} ASIC8M_VDIMM_DUAL_EN 3
2
+VTT_DDR +2.5V_DUAL ==>VTT_DDR
PRN150A
BAW56W PU7
1KOhm OCP_CON 1 8
B +5VSB 2
3
VIN
NC1(GND)
GND2
GND1
7
6
B
NC2(REFEN) VCCA VTTDDR_REF
4 5
+3VSB 3 VOUT REFEN
C PQ2 VIA
R801 1 B + + PR94 CM8562P
PMBS3904 PCE30 PCE29 330Ohm
Do Not Stuff 3 E PC90
NI C PQ3 2 +2.5V_DUAL 820UF/6.3V 820UF/6.3V 0.1UF/25V
PR766 1 B PRN150B
887Ohm Do Not Stuff GND
1% E NI 1KOhm PC783 GND
3
D 2 1UF/10V
PR13 Q26
1 2 1 GND GND GND
{34} ASIC8M_VDIMM_DUAL_EN Do Not Stuff GND
G GND NI NI GND
2 S NI
PR437 Do Not Stuff GND
1KOhm NI PRN150C
1%
1KOhm
+2.5V_DUAL_REF

GND
PC781
PR432 PC701 Do Not Stuff
6.19KOhm NI
1% 1UF/10V
A PRN150D
A
1KOhm
1229

GND GND GND GND


T
+1.8V/+NB_MEM/+3VSB/DUAL
GND
ASUSTek Computer Inc. itle :
Size Project Name Rev
A3 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 36 of 40
2004

5 4 3 2 1
5 4 3 2 1

ALL OF CONTROL TRACE WIDTH ARE


10mil, BESIDES VEE PIN 20mil. K8_754pin_ADI3186_3PHASE_Channel
PU4
For phase detection
{10} CVID[0..4]

D CVID4 1 PR40 PR8 D


VID4
CVID3 2 28 PWMVCC 2 4.3Ohm +12V
CVID2 VID3 VCC 1 Do Not Stuff
3
CVID1 VID2 NI
4
CVID0 VID1
5
VID0 PC35
6
CROWBAR 0.47UF/16V

FB+

ADP3186 DGND
PC48
PR48 27 PWM1 Do Not Stuff
PC41 FB- PWM1 PWM2 PWM1 {38}
1.2KOhm 7 26 NI
1% FBRTN PWM2 PWM2 {38}
1200P 25 PWM3
PWM3 PWM4 PWM3 {38}
24
PWM4 DGND
10%
VCOREFB 8
FB
DGND
23 SW1 1 2 0Ohm PHASE1
SW1 PR29 PHASE2 PHASE1 {38}
PC39 22 1 2 0Ohm
680P SW2 SW2 PHASE3 PHASE2 {38}
21 1 2 0Ohm
PR44 VCOREFB_C PC56 SW3 PR28 PHASE3 {38}
20
+3V +3V Do Not Stuff SW4
1% 100P
NI PR53 19
16.9KOhm GND
PR99 PR11 1% PR32 PR36 PR37
C 10KOhm Do Not Stuff 82.5KOhm 82.5KOhm 82.5KOhm C
NI DGND ADP_COMP 9 DGND 1% 1% 1%
COMP

Place NTC
VCORE_PG 10 near output
{34} VRM_PWRGD PWRGD
choke
VCORE_EN 11 18 CSCOMP
{34,39} VCORE_EN EN CSCOMP

PC50 PC47
Do Not Stuff Do Not Stuff PR33
NI NI PR35
CSSUM 15KOhm Do Not Stuff
17
CSSUM 1% NI

DGND DGND PC42 PC45


DELAY 12 16 CSREF Do Not Stuff T_CSSUM
DELAY CSREF
3300P
RT 13 NI
RT
RAMPADJ
1 15 ILIMIT
RAMPADJ ILIMIT
PR3
60.4KOhm
PR51 1%
PR60 PC58 68KOhm
392KOhm 0.047U PJP9
1% 1 2
B RT_G B
10% PR55 PR49
560KOhm 560KOhm Do Not Stuff
1% 1%
PC59 GND NI DGND
100P

PWMVCC
5%
DGND DGND DGND
DGND

PR30
1 2
CSN
{38}
10Ohm
+VCORE
PR59
0Ohm PC43
1 2 1000P
PR61 OD#
{38}
15 1
3
PJP10 2
FB+ 1 2 PC38
COREFB
{10} PR63 PD4
Do Not Stuff 120KOhm Do Not 100P DGND
PC67 NI Stuff
1% NI
A Reserved Do Not Stuff A
NI
PJP11
FB- 1 2 COREFB#
{10} 1229
Do Not Stuff DGND DGND
PR67 NI
15 Title : VCORE
ASUSTek Computer Inc. Controller
Size Project Name Rev
GND A3 A8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 37 of 40
2004
5 4 3 2 1
5 4 3 2 1

CPU_12V
K8_754pin_ADI3186_3PHASE_Channel
PR2 0Ohm PL1 L+12V L+12V +VCORE
1 2 1 2 L+12V +VCORE
+12VD CPU_12V
1UH 2D
PD3

D PD2
Stuff
Do Not
(20mil) 3
2
BST1 1
PR20
2
PC31
1 2(20mil) R_HG1 1
PR24
2 HG1 1
PQ18 PC26
1U/16V + + +
D
1 2 1 (20mil) G AP60T03H c0805 + + + +
0.1U S
1Ohm 1Ohm 3
NI <Optional> C0603
+ BAW56W PR19
PU2 8.2K GND
PCE4
100UF/16V 1 8 (20mil) PL2
BST
{37} PWM1
(10mil) 2 DRVH SW 7 (20mil) PHASE1 1 1.1uH 2 NI NI NI
IN
(10mil) 6
{37} OD# OD# PGND
1 2 3 4 5 2D 2D PC33 GND
VCC DRVL
PR22 4.3 4700P (5mil) 1 2 CHOKE立 式 1.1UH 5053B 0.9f *3 NI
GND ADP3418KRZ PQ19 PQ20 {37}<Option Ir=1870mA PLACE THESE
(20mil) LG1 1 PJP1 Do Not
Stuff NI NEAR THE CPU
PC3
G
3 S AP85T03H
G
3S
Do Not Stuff
NI 1 2
GND VRM Input CAP SOCKET
PR26 {37}PR CSN (5mil) Do Not Stuff
0.47UF/16V
c0603 8.2K 1 PJP2 NI CAVITY
r1206

Place those two jumper


close to choke
GND GND GND GND GND GND
L+12V

2D +VCORE
PD5
2 PR38 PC46 PR41 PQ21
3 BST2 1 2 1 ( R_HG2 1 2 HG2 1 PC44
(20mil) 1U/16V
C 1
1Ohm 0.1U
C0603
<Optional> 1Ohm
G
3
S AP60T03H
c0805 C
PR34
BAW56W 8.2K
PU3 GND + + + + + + +
1 8 (20mil) PL3
BST
{37} PWM2
(10mil) 2
DRVH SW 7 (20mil) PHASE2 1 1.1uH 2
(10mil) 3 IN
{37} OD# 6
OD# PGND
1 2 V_+12VD2 (20mil) 5 2D 2D PC49 CHOKE立 式 1.1UH 5053B 0.9f *3
VCC DRVL 4700
P (5mil)
PR39 4.3 1 2
ADP3418KRZ PQ22 PQ23 {37}
(20mil) LG2 1 PJP3 Do Not
Stuff NI
G G Do Not Stuff
PC51 3 S AP85T03H 3S NI NI
0.47UF/16V PR43 PR42 (5mil) 1 2
c0603 8.2K {37} CSN
1 Do Not Stuff
r1206 PJP4 NI
VRM Output CAP
Place those two jumper GND
close to choke
GND GND GND GND GND GND
L+12V

2D
PD6 +VCORE
2 PR57 PC60 PR62 PQ26 PC57
3 BST3 1 2 1 (20mil) R_HG3 1 2 HG3 1 1U/16V
1 (20mil) G AP60T03H c0805
1Ohm 1Ohm S
0.1U 3
<Optional> C0603 PR56 NI NI NI NI
B BAW56W
PU5
8.2K
GND
B
1 8 (20mil) PL4
BST
{37} PWM3
(10mil)
DRVH SW 7 (20mil) PHASE3 1 1.1uH 2
IN
(10mil) 6
{37} OD# OD# PGND
1 2 3 4 5 2D 2D PC61 CHOKE立 式 1.1UH 5053B 0.9f *3
VCC DRVL 4700P
PR58 (5mil) 1 2
4.3 ADP3418KRZ PQ27 PQ28 {37}
(20mil) LG3 1 1 PJP5 Do Not Stuff
G G Do Not Stuff NI
PC62 3 S AP85T03H 3S NI (5mil) 1 2
PR65 {37}PR CSN Do Not Stuff
0.47UF/16V CAD NOTE:PLACE THESE NEAR
c0603 8.2K 1 PJP6 NI GND
r1206 THE CPU SOCKET CAVITY ---
Place those two jumper 10UF 0805 X5R X 8
close to choke

GND GND GND GND GND GND

A A
1229

Title : VCORE
ASUSTek Computer Inc. Engineer:
Size Project Name Rev
A3 A8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 38 of 40
2004

5 4 3 2 1
5 4 3 2 1

4s
PRE# CLR# CLK D /Q
+3VSB +3V L H X X L
H L X X H
CPU Thermal +VCORE L L X X N/A

Trip For
Thermal trip Thermal trip
H H H^ H L

LGA775 +1.2V_VTT H H H^ L H
D H H L X /Q D
v0.2 GND Thermal trip will have
gilithes during VCORE
+3V
ramp up +5VSB=>+3VSB(2A) +3VSB
+5VSB PQ11

3 2
VIN VOUT
PWRBTN# {21,30,33}

+3VSB
RN32B RN32C RN32D 3 AMS1085CD
4.7KOhm 4.7KOhm 4.7KOhm RN23D C
7 1 B Q12
PMBS3904
E NI PR14
PU10 2 + 121Ohm +
7 8 1% NI
PRE#
2 VCC 5
D Q
1 3
+VCORE 3 CLK Q#
6 4 GND
C CLR# GND
THERMAL_LOCK# 1 B Q14 SN74LVC2G74_TSOP
VCORE_EN {34,37}
PMBS3904
3 E 3
RN32A C 2 RN23B C
1 4.7KOhm 2 1 B Q15 3 4.7KOhm 1 B Q13 PC22
PMBS3904 PMBS3904 PR18
Do Not Stuff
C E E 210Ohm C
NI
C12 +2.5V 2 2 1%
Do Not Stuff
NI GND
GND
GND GND
R145 GND GND GND
GND
Do Not Stuff
NI GND 3 THERMAL_LOCK#
RN23A C
1 4.7KOhm
1 B Q10 3
{10} H_THERMTRIP#
PMBS3904 RN23C C
E 5 1 B Q11
4.7KOhm
2 PMBS3904
E
2
GND
GND

+5V_USB(3A)
Check OK !!
+5V_USB
+3V and +3VSB DUAL SWITCH +5V

+12V +3V_DUAL
Only S3 +3V PQ12
B PQ9 B
+5VSB
high AP9T15H 1 8
S1 D1
S0/S1 S4/S5 +3V_SW 2 N 7
PRN2A
1 G1 D1
4.7KOhm 3 6
S3 S2 D2
0 +3V_SW
+3VSB_SW4
P 5
G2 D2
+
PCE6 AP4500M
+3VSB
PQ13 3 820UF/6.3V
PRN2C C PC867
1 B NI PQ14
{30} n3V_GAT E 6 5
Do Not Stuff 2 3
E +5VSB
4.7KOhm PMBS3904 AP2301N +5V_DUAL(2A)
GND
+5V_DUAL
PRN2B
+5V
GND 4.7KOhm
GND
PQ1
Pls check +5VSB
+3VSB_SW 1 8
A
power Do Not Stuff S1 D1 A
+3V_SW 2 7
sequency PQ8 3 PC868 G1
N
D1
PRN2D C 3 6
8 7 1 B NI S2 D2 1229
+3VSB_SW4 5
E P
4.7KOhm PMBS3904
G2 D2
+2.5V_DUAL & VTT_DDR
Title :
AP4500M
ASUSTeK COMPUTER INC Engineer:
Mario Zeng
Size Project Name Rev
GND GND
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 39 of 40
2004
5 4 3 2 1
5 4 3 2 1

+5V +12V

PL7
1 2
For RT9202 For SC2608 or RT9214 +5V
80Ohm/100MHz
PL8
PR83 1 2 +1.2V_IN
PR85
4.7Ohm 80Ohm/100MHz
Do Not Stuff
D NI D
PC81
0.1UF/25V
+
PD9 PCE31
BAT54CW PCB7
3 +1.2V_VCC GND PR89 PJP7 10UF/10V 1800U/6.3V
2 1 2 1 2 ESR=12mOhm/Ir=2350mA
1%
Do Not StuffNI Do Not Stuff
PC76 For RT9202 NI
1 2 +1.2V_PHASE
GND GND
0.1U
<Optional>

PU13
+1.2V_BST 1 8 +1.2V_CTL_PH PQ31
+1.2V_DH BOOT PHASE +1.2V_DHG
2 7 +1.2V_OCSET 4 5
UGATE OPS
GND 3 6 PR91
+1.2V_DL GND FB +1.2V_PHASE
4 5 1 2 3 6
LGATE VCC
RT9214PS 0
2 7
PR92 +1.2V L98
For RT9214 8.2KOhm 1 8 70Ohm/100Mhz +1.2VA
PC77 l0805_h43
C PR502 PJP8 PL9 Irat=3A C
1 2 1 2 +1.2V_PHASE 1.2uH 2 1 2
GND AP4920M
18.7KOhm Do Not Stuff CHOKE立 式 1.2UH T4453 0.8f *2
1% NI PC82
GND 4700P +
GND + + + PCE47
PCE32 PCE33 PCE938
820UF/6.3V
820UF/6.3V 820UF/6.3V Do Not Stuff
PR84 NI
8.2KOhm PR93
1Ohm
GND

GND GND
GND GND GND

PR88
+1.2V_FB 1 2
B B
511Ohm
1%

+3VSB
+3VSB PR90
1KOhm
1%
PR4
+1.2V_OCSET
Do Not Stuff
NI
PR1 GND
3
Do Not Stuff D
NI PQ7
1
Do Not Stuff
G NI
3 2S
D
PQ10
1
{34} +1.2V_REF Do Not Stuff
G
2 S NI GND

A GND A

PR6
1 2 +1.2V_OCSET
1229
0

Title :
ASUSTeK COMPUTER INC
+1.2V
Engineer: Mario Zeng
Size Project Name Rev
A3 K8AE-LA 1.00
Date: 星 期 三 , 十 二 月 29, Sheet 40 of 40
2004
5 4 3 2 1

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