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Design Simulation and Fabrication of Hybrid

Circuits for RF Power Amplifiers Used in LTE Base


Stations

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Shalini T S R N Sathisha,M. Tech
Department of Telecomminication Engineering Department of Telecommunication Engineering
Siddaganga Institute of Technology Siddaganga Institute of Technology
Tumkuru, India Tumkuru, India
tss100shalini@gmail.com satisharyan@gmail.com

Abstract— Power amplifiers are used to convert a small II. DESIGN FLOW
high frequency signal to large high frequency signal for
transmission through a microwave antenna to another
microwave antenna. As the required distance between the
microwave antenna increases, more power is required at
the base station in order to transmit. The transistor used
here is the CREE CGH40010 transistor, Using these
transistor specifications and characterizations, The
theoretical amplifier gain is 19dB. The simulated gain
before tuning is 11dB. The tuned amplifier, i,e adjusting
the matching network in real-time is 18dB. The two stage
power amplifier gain is 33.41dB.

Keywords— Power Amplifier, Hybrid Circuits, LTE, AWR


Microwave office, Amplifier characterization, X-band, PAE.

I. INTRODUCTION
Figure 1. RF power Amplifier Design Steps
Power amplifiers are electronic devices which converts DC
power into high microwave power thereby generating high
frequency, large voltage and current waveforms. They are one III. CHARACTERIZATION
of the indispensable parts of high frequency systems including Transistor characterization is performed by a curve tracer
radars, commercial wireless communication tools such as cell element which is available in AWR microwave office tool that
phones, microwave heating devices etc. The transistor used steps the voltage from gate to source and sweeps the voltage
here is the CREE CGH40010 transistor, Cree’s CGH40010 is from drain to source. The corresponding IV curve is plotted in
an unmatched, gallium nitride (GaN) high electron mobility Figure 4. The data sheet summary is shown below, The
transistor (HEMT). This transistor operating from a 28 volt CGH40010 is a 10 W, DC - 6 GHz, RF Power GaN HEMT.
rail, by offering a general purpose and broadband solution to a Features:
variety of RF and microwave applications. GaN HEMTs offers 1. Up to 6 GHz Operation
a high efficiency, high gain and wide bandwidth capabilities 2. 16 dB Small Signal Gain at 2.0 GHz
which makes the CGH40010 transistor ideal for linear and
3. 14 dB Small Signal Gain at 4.0 GHz
compressed amplifier circuits. This transistor is characterized
at the quiescent operating point with targeted frequency of 2.5 4. 13 W typical PSAT
GHz. 5. 65 % Efficiency at PSAT
Microwave power amplifier is one of the most vital
6. 28 V Operation
components used in modern wireless communication systems
not only for mobile communication, but also used in radar,
electronic warfare, satellite communication, medical imaging Applications:
applications. The requirements that must be satisfied by a 1. 2-Way Private Radio
power amplifier differs significantly from one application to 2. Broadband Amplifiers
another, different performance parameters should be optimized
3. Cellular Infrastructure
for each application. Generally, power amplifier is a electronic
device that uses DC power to increase the power level of an 4. Test Instrumentation
input signal which is defined in a specific frequency band. 5. Class A, AB, Linear amplifiers suitable for OFDM,
Microwave power amplifiers are devices that operate in W-CDMA, EDGE, CDMA waveforms.
microwave frequency regime of radio frequency spectrum so
that they are intended to use in high frequency applications.

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Figure 2. Curve Tracer Setup Figure 4. CGH40010 IV curve

The above figure shows the gain versus frequency IV curve


IV. Transfer Characteristics of a Transistor for the CGH40010 transistor.
Field effect transistors are voltage-controlled current sources
(VCCS), the transfer characteristics of a transistor is shown in V. DESIGN OF POWER AMPLIFIER
Fig 4. When Vgs is below the threshold voltage ,the drain
current Ids will be zero. Suppose if there is an increase in Vgs, Before designing the power amplifier, It is very essential to
the transistor reaches turned on region. As soon as the check whether the transistor is stable or not, If the transistor is
transistor enters into turned on region, Ids increases in a non stable we can proceed for the designing of matching networks,
linear manner. And finally, Ids will remain almost constant. otherwise designing of stability network is done first then
proceed for the designing of the matching circuits using
distributed elements or lumped elements based on the
frequency of operation whether low frequency or high
frequency.

A. Stability
The first and very important parameter expected from a power
amplifier is not to oscillate. Due to the internal feedback
mechanism inside the transistors, the part of the output signal
may going to fed back to the input side and if actual input
signal and feedback signal may somehow have same phases
then they will add up and create oscillations. This process is
generated intentionally in oscillator circuits but for an power
amplifier it is hazardous and degrades the performance of an
amplifier. Therefore, after choosing the class of operation,
Figure 3. FET VCCS Characterstics stability analysis of a transistor should be done and a stability
circuit must be designed if necessary. The stability criteria
In the turned–on region, the non-linearity of the transistor can design equations are given below:
be read as a linear system , if the gate voltage level is very
low, that is known as a small signal analysis. 1. K-Δ Test
2. K-B1 Test
Where Stability factor K is given by:
2 2 2
1  S11  S 22  
K , K >1
2 S12 S 21

  S11 S 22  S12 S 21

2 2 2
B1  1  S11  S 22   , B>0

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PORT
P=2
Z=50 Ohm

PORT SUBCKT
1
P=1 ID=S1
Z=50 Ohm NET="cgh40010"

Figure 5. Circuit diagram for S parameters Figure 7. Stability network topologies

As we already mentioned in the above, the stability test The stability topology Figure 7.a is chosen and the stability
criteria test should satisfy for the transistor to be stable, the network is designed as shown in the below figure
stability factor K and B1 are simulated in the AWR microwave
office as shown in the below Figure.6

Figure 8. Stability network for a CGH40010 transistor

VII. Input Matching


The input matching is done using distributed elements and the
corresponding gain variation graph is plotted as shown below:
Figure 6.Stability measurement [AWR screenshot]

From the above graph plotted in AWR Simulation tool, the IND
stability factor K is 0.7601 which does not satisfy the stability ID=L2
L=1000 nH DCVS
DCVS ID=V2
test and B1 is 1.569 which is greater than zero, from the graph ID=V1
V=-2.25 V
V=28 V
IND
we can conclude that the transistor is not stable, It is very ID=L1
L=1000 nH

essential to make the transistor stable by adding a stability RES


ID=R1
network to the transistor. PORT
TLIN R=1 Ohm P=2
ID=TL1 Z=50 Ohm
Z0=50 Ohm 2
PORT1 EL=7.2 Deg
P=1 F0=2.5 GHz SUBCKT
Z=50 Ohm 1 ID=S1
VI. Stability Network Pwr=18 dBm NET="cgh40010"

To obtain a PA which is unconditionally stable at all TLOC


ID=TL2
CAP
3
Z0=50 Ohm
frequencies and at all impedances seen by transistor, the EL=72 Deg
F0=2.5 GHz
ID=C1
C=1 pF

designer, most probably, needs to add a stability network to the


circuit. In Figure 7, two different stability circuit topologies
are shown. Due to the ease of implementation using microstrip Figure 9. Input Matching [AWR Screenshot]
circuits, the stability circuit topology shown in the Figure 7-a
is chosen in this work.
As frequency increases, the physical sizes of circuit elements
will become comparable with wavelength and all circuit
elements will behave as distributed elements in reality. The
proposed R-C network is designed and realized using
distributed resistance and capacitance which will have
parasitic components around actual elements.

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ideally open circuit, compared to 50 ohms to isolate the bias
network from matching circuits at high frequencies. Bias
networks can be designed using RF chokes for low frequency
amplifiers. Bias networks are designed using λ/4 transmission
lines at microwave frequencies.
The figure 13 shows the designed biasing network for
the power amplifier design using two inductors, the baising
network had been designed with two voltage sources because
it is easy to measure with the two voltage sources
independently Vgs=-2.25V, Vdd=28V.

IND
ID=L2 DCVS
L=1000 nH ID=V2
DCVS
V=28 V
ID=V1
V=-2.25 V IND
ID=L1
L=1000 nH
Figure 10. Variation of Gain With Input Matching.
RES
ID=R1 PORT
R=1 Ohm P=2

VIII. Output Matching 2 Z=50 Ohm

SUBCKT
The output matching is done at the load side in order to match PORT
P=1
Z=50 Ohm
1
ID=S1
NET="cgh40010"
the 50ohm source to the 50ohm load, similar to the input
3
matching, the output matching is done using distributed CAP
ID=C1
elements and the corresponding gain for output matching is C=1 pF

plotted as shown in below figure,


Figure 13. Biasing network [AWR Screenshot]

IND DCVS
ID=L2 ID=V2
DCVS V=28 V
L=1000 nH
ID=V1
V=-2.25 V IND
ID=L1 TLIN
L=1000 nH ID=TL3
Z0=50 Ohm PORT
RES EL=36 Deg P=2
ID=R1 F0=2.5 GHz Z=50 Ohm
TLIN R=1 Ohm
ID=TL1
Z0=50 Ohm 2
EL=7.2 Deg
PORT1 F0=2.5 GHz TLOC
P=1 SUBCKT ID=TL4
1
Z=50 Ohm ID=S1 Z0=50 Ohm
Pwr=18 dBm NET="cgh40010" EL=59.4 Deg
F0=2.5 GHz
TLOC
ID=TL2 3
Z0=50 Ohm CAP
EL=72 Deg ID=C1
F0=2.5 GHz C=1 pF

Figure 14. Power Amplifier Gain without matching

Figure 11. Output matching [AWR Screenshot]

Figure 15. Transducer gain and return loss of amplifier circuit plotted on a
power gain in dB. vs frequency set of axes.

X. TWO STAGE POWER AMPLIFIER


Figure 12. Variation Of Gain With Output Matching

IX. BIAS NETWORK


If bias network elements are not used as matching elements
then input impedance of the bias network will be very high,

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SUBCKT SUBCKT
CAP ID=S1 CAP ID=S2 CAP
ID=C1 NET="lossy network_4" ID=C2 NET="lossy network_4" ID=C3
PORT1 C=1e6 pF C=1e6 pF C=1e6 pF
P=1 PORT
1 2 1 2
Z=50 Ohm P=2
Pwr=18 dBm Z=50 Ohm

Figure 16. Two Stage Power Amplifiers

The two stage power amplifier is designed in order to increase


the gain, in a single stage amplifier does not have the required
gain. So does a two stage amplifier design which produce a
18Db + 18Db gain. The second transistor would saturate and
which generates a lot of noise. In designing a multiple stage
amplifier, it is very important to limit the noise from being
amplified. In doing so, the first stage would have the
maximum gain and every succeeding stage would be at least
half the previous stage with the last stage having only a gain of
2. By having a large number of amplifiers in series has
diminishing returns. The number of amplifiers in series usually
should not exceed 4, and the fourth one is usually a buffer or a
2x multiplier. Using our previous designed microwave power
amplifier, a two stage amplifier is designed as shown in
Figure 17, and the simulation results are presented.

Figure 17. Gain of two stage power amplifier.

CONCLUSION
In this paper, we have successfully simulated two microwave
amplifier designs, the single stage power amplifier, and the
two stage amplifier. The single stage power amplifier gain at
2.5GHz is 11dB.The tuned single stage amplifier gain i.e
adjusting matching network real-time, is 18 dB. The two stage
amplifier gain with tuned network is 33 dB.

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