Bus

When referring to a computer, the bus also known as the address bus, data bus, or local
bus, is a data connection between two or more devices connected to the computer. For
example, a bus enables a computer processor to communicate with the memory or a video
card to with the memory. You can think of it as a public transportation or school bus.

Note

Bus is not an acronym for anything.

The bus contains multiple wires (signal lines) that contain addressing information that describes
the memory location of where the data is being sent or where it is being retrieved. Each wire in
the bus carries a single bit of information, which means the more wires a bus has the more
information it can address. For example, a computer with a 32-bit address bus can address 4
GB of memory, and a computer with a 36-bit bus can address 64 GB of memory.

A bus is capable of being a parallel or serial bus and today all computers utilize two bus types,
an internal bus or local bus and an external bus, also called the expansion bus. An internal
bus enables communication between internal components such as a video card and memory.
An external bus is capable of communicating with external components such as a USB or
SCSI device.
A computer or device's bus speed is listed in MHz, e.g.,
100 MHz FSB. The throughput of a bus is measured
in bits per second or megabytes per second.

What is Computer Bus: The electrically conducting path along which data is
transmitted inside any digital electronic device. A Computer bus consists of a set of
parallel conductors, which may be conventional wires, copper tracks on a PRINTED
CIRCUIT BOARD, or microscopic aluminum trails on the surface of a silicon chip.
Each wire carries just one bit, so the number of wires determines the largest data
WORD the bus can transmit: a bus with eight wires can carry only 8-bit data words,
and hence defines the device as an 8-bit device.
A computer bus normally has a single word memory circuit called a LATCH attached to
either end, which briefly stores the word being transmitted and ensures that each bit has
settled to its intended state before its value is transmitted.
The Computer bus helps the various parts of the PC communicate. If there was no bus, you
would have an unwieldy number of wires connecting every part to every other part. It would
be like having separate wiring for every light bulb and socket in your house.

Types of Computer Bus

There are a variety of buses found inside the computer.

Data Bus: The data bus allows data to travel back and forth between the microprocessor
(CPU) and memory (RAM).

Address Bus: The address bus carries information about the location of data in memory.

Control Bus : The control bus carries the control signals that make sure everything is flowing
smoothly from place to place.

Expansion Bus: If your computer has expansion slots, there's an expansion bus. Messages and
information pass between your computer and the add-in boards you plug in over the
expansion bus.

Although this is a bit confusing, these different buses are sometimes together called simply
"the bus." A user can think of the computer's "bus" as one unit made up of three parts: data,
address, and control, even though the three electrical pathways do not run along each other
(and therefore don't really form a single "unit") within the computer.

There are different sizes, or widths of data buses found in computers today. A data bus' width
is measured by the number of bits that can travel on it at once. The speed at which its bus can
transmit words, that is, its bus BANDWIDTH, crucially determines the speed of any digital
device. One way to make a bus faster is to increase its width;
for example a 16-bit bus can transmit two 8-bit words at once, 'side-by-side', and so carries 8-
bit data twice as fast as an 8-bit bus can. A computer's CPU will typically contain several
buses, often of differing widths, that connect its various subunits. It is common for modern
CPUs to use on-chip buses that are wider than the bus they use to communicate with external
devices such as memory, and the speed difference between on- and off-chip operations must
then be bridged by keeping a reservoir of temporary data in a CACHE. For example many of
the Pentium class of processors use 256 bits for their fastest on-chip buses, but only 64 bits
for external links.

An 8-bit bus carries data along 8 parallel lines. A 16-bit bus, also called ISA (Industry
Standard Architecture), carries data along 16 lines. A 32-bit bus, classified as EISA
(Enhanced Industry Standard Architecture) or MCA (Micro Channel Architecture), can carry
data along 32 lines.

The speed at which buses conduct signals is measured in megahertz (Mhz). Typical PCs
today run at speeds between 20 and 65Mhz. Also see CPU, Expansion Card, Memory,
Motherboard, RAM, ROM, and System Unit.
How Does Computer Bus Work?

A bus transfers electrical signals from one place to another. An actual bus appears as an
endless amount of etched copper circuits on the motherboard's surface. The bus is connected
to the CPU through the Bus Interface Unit.

Data travels between the CPU and memory along the data bus. The location (address) of that
data is carried along the address bus. A clock signal which keeps everything in synch travels
along the control bus.

The clock acts like a traffic light for all the PC's components; the "green light" goes on with
each clock tick. A PC's clock can "tick" anywhere from 20 to 65 million times per second,
which makes it seem like a computer is really fast. But since each task (such as saving a file)
is made up of several programmed instructions, and each of those instructions takes several
clock cycles to carry out, a person sometimes has to sit and wait for the computer to catch up.

Types of Buses in Computer Architecture

Inside computers, there are many internal components. In order for these components to
communicate with each other, they make use of wires that are known as a ‘bus’.
A bus is a common pathway through which information flows from one computer
component to another. This pathway is used for communication purpose and it is established
between two or more computer components. We are going to check different computer bus
architectures that are found in computers.

Different Types of Computer Buses

The Computer Buses | Source

Functions of Buses in Computers

Summary of functions of buses in computers
1. Data sharing - All types of buses found in a computer transfer data between the computer
peripherals connected to it.
The buses transfer or send data either in the serial or parallel method of data transfer. This
allows for the exchange of 1, 2, 4 or even 8 bytes of data at a time. (A byte is a group of 8
bits). Buses are classified depending on how many bits they can move at the same time,
which means that we have 8-bit, 16-bit, 32-bit or even 64-bit buses.
2. Addressing - A bus has address lines, which match those of the processor. This allows
data to be sent to or from specific memory locations.
3. Power - A bus supplies power to various peripherals connected to it.
4. Timing - The bus provides a system clock signal to synchronize the peripherals attached
to it with the rest of the system.
The expansion bus facilitates easy connection of more or additional components and devices
on a computer such as a TV card or sound card.

Bus Terminologies
Computers have two major types of buses:
1. System bus:- This is the bus that connects the CPU to the main memory on the
motherboard. The system bus is also called the front-side bus, memory bus, local bus, or host
bus.
2. A number of I/O Buses, (I/O is an acronym for input/output), connecting various
peripheral devices to the CPU. These devices connect to the system bus via a ‘bridge’
implemented in the processors' chipset. Other names for the I/O bus include “expansion bus",
"external bus” or “host bus”.

Expansion Bus Types

These are some of the common expansion bus types that have ever been used in computers:
 ISA - Industry Standard Architecture
 EISA - Extended Industry Standard Architecture
 MCA - Micro Channel Architecture
 VESA - Video Electronics Standards Association
  PCI - Peripheral Component Interconnect
 PCI Express (PCI-X)
 PCMCIA - Personal Computer Memory Card Industry Association (Also called PC
bus)
 AGP - Accelerated Graphics Port
 SCSI - Small Computer Systems Interface.

Bus Arbitration

 The device that is allowed to initiate data transfers on the bus at any given time is
called the bus master. In a computer system there may be more than one bus master
such as processor, DMA controller etc.
 They share the system bus. When current master relinquishes control of the bus,
another bus master can acquire the control of the bus.
 Bus arbitration is the process by which the next device to become the bus master is
selected and bus mastership is transferred to it. The selection of bus master is usually
done on the priority basis.
 There are two approaches to bus arbitration: Centralized and distributed.
1. Centralized Arbitration

o In centralized bus arbitration, a single bus arbiter performs the required

arbitration. The bus arbiter may be the processor or a separate controller
connected to the bus.
o There are three different arbitration schemes that use the centralized bus
arbitration approach. There schemes are:
a. Daisy chaining
b. Polling method
c. Independent request
a) Daisy chaining

o The system connections for Daisy chaining method are shown in fig below.

 It is simple and cheaper method. All masters make use of the same line for bus
request.
  In response to the bus request the controller sends a bus grant if the bus is free.
 The bus grant signal serially propagates through each master until it encounters the
first one that is requesting access to the bus. This master blocks the propagation of the
bus grant signal, activities the busy line and gains control of the bus.
 Therefore any other requesting module will not receive the grant signal and hence
cannot get the bus access.
b) Polling method

 The system connections for polling method are shown in figure above.
 In this the controller is used to generate the addresses for the master. Number of
address line required depends on the number of master connected in the system.
 For example, if there are 8 masters connected in the system, at least three address
lines are required.
 In response to the bus request controller generates a sequence of master address.
When the requesting master recognizes its address, it activated the busy line ad begins
to use the bus.
c) Independent request

 The figure below shows the system connections for the independent request scheme.
 In this scheme each master has a separate pair of bus request and bus grant lines and
each pair has a priority assigned to it.
 The built in priority decoder within the controller selects the highest priority request
and asserts the corresponding bus grant signal.
2. Distributed Arbitration
  In distributed arbitration, all devices participate in the selection of the next bus
master.
 In this scheme each device on the bus is assigned a4-bit identification number.
 The number of devices connected on the bus when one or more devices request for
the control of bus, they assert the start-arbitration signal and place their 4-bit ID
numbers on arbitration lines, ARB0 through ARB3.
 These four arbitration lines are all open-collector. Therefore, more than one device
can place their 4-bit ID number to indicate that they need to control of bus. If one
device puts 1 on the bus line and another device puts 0 on the same bus line, the bus
line status will be 0. Device reads the status of all lines through inverters buffers so
device reads bus status 0as logic 1. Scheme the device having highest ID number has
highest priority.
 When two or more devices place their ID number on bus lines then it is necessary to
identify the highest ID number on bus lines then it is necessary to identify the highest
ID number from the status of bus line. Consider that two devices A and B, having ID
number 1 and 6, respectively are requesting the use of the bus.
 Device A puts the bit pattern 0001, and device B puts the bit pattern 0110. With this
combination the status of bus-line will be 1000; however because of inverter buffers
code seen by both devices is 0111.
 Each device compares the code formed on the arbitration line to its own ID, starting
from the most significant bit. If it finds the difference at any bit position, it disables its
drives at that bit position and for all lower-order bits.
 It does so by placing a 0 at the input of their drive. In our example, device detects a
different on line ARB2 and hence it disables its drives on line ARB2, ARB1 and
ARB0. This causes the code on the arbitration lines to change to 0110. This means
that device B has won the race.
 The decentralized arbitration offers high reliability because operation of the bus is not
dependent on any single device.

In a single bus architecture when more than one device requests the bus, a
controller called bus arbiter decides who gets the bus, this is called the bus
arbitration. Arbitration is mostly done in favor of a master micro processor with
the highest priority.
Bus arbitration is the process by which the next device to become the bus master is
selected and bus mastership is transferred to it. The selection of bus master is usually done
on the priority basis. There are two approaches to this: Centralized and distributed.

Bus Arbitration refers to the process by which the current bus master accesses and
then leaves the control of the bus and passes it to the another bus requesting
processor unit. The controller that has access to a bus at an instance is known
as Bus master.
A conflict may arise if the number of DMA controllers or other controllers or
processors try to access the common bus at the same time, but access can be given
to only one of those. Only one processor or controller can be Bus master at the
same point of time. To resolve these conflicts, Bus Arbitration procedure is
implemented
to coordinate the activities of all devices requesting memory transfers. The selection
of the bus master must take into account the needs of various devices by
establishing a priority system for gaining access to the bus. The Bus Arbiter decides
who would become current bus master.
There are two approaches to bus arbitration:
1. Centralized bus arbitration – A single bus arbiter performs the required
arbitration.
2. Distributed bus arbitration – All devices participate in the selection of the next
bus master.
Methods of BUS Arbitration –
There are three bus arbitration methods:
(i) Daisy Chaining method –
It is a centralized bus arbitration method. During any bus cycle, the bus master may
be any device – the processor or any DMA controller unit, connected to the bus.

Advantages –
 Simplicity and Scalability.
 The user can add more devices anywhere along the chain, up to a certain
maximum value.
Disadvantages –
 The value of priority assigned to a device is depends on the position of master
bus.
 Propagation delay is arises in this method.
 If one device fails then entire system will stop working.
(ii) Polling or Rotating Priority method –
In this method, the devices are assigned unique priorities and complete to access
the bus, but the priorities are dynamically changed to give every device an
opportunity to access the bus.

Advantages –
 This method does not favor any particular device and processor.
 The method is also quite simple.
 If one device fails then entire system will not stop working.
Disadvantages –
 Adding bus masters is different as increases the number of address lines of the
circuit.
(iii) Fixed priority or Independent Request method –
In this method, the bus control passes from one device to another only through the
centralized bus arbiter.

Advantages –
 This method generates fast response.
Disadvantages –
 Hardware cost is high as large no. of control lines are required.