® STP22NE10L

N - CHANNEL 100V - 0.07 Ω - 22A TO-220

STripFET POWER MOSFET
TYPE V DSS R DS(on) ID
STP22NE10L 100 V < 0.085 Ω 22 A
■ TYPICAL RDS(on) = 0.07 Ω
■ LOW THRESHOLD DRIVE
■ LOGIC LEVEL DEVICE

DESCRIPTION
This Power MOSFET is the latest development of
STMicroelectronics unique "Single Feature 3
Size" strip-based process. The resulting 1
2

s)
transistor shows extremely high packing density
for low on-resistance, rugged avalanche
c t(
characteristics and less critical alignment steps
TO-220

d u
therefore a
reproducibility.
remarkable manufacturing
r o
e P
APPLICATIONS
■ HIGH CURRENT, HIGH SPEED SWITCHING
le t
INTERNAL SCHEMATIC DIAGRAM
■ SOLENOID AND RELAY DRIVERS

■ MOTOR CONTROL, AUDIO AMPLIFIERS

s o
■ DC-DC & DC-AC CONVERTERS

Ob
) -
( s
u ct
o d
ABSOLUTE MAXIMUM RATINGS
Pr
Symbol

et e Parameter Value Unit

V DS
V DGR
o l
Drain-source Voltage (V GS = 0)
Drain- gate Voltage (R GS = 20 kΩ)
100
100
V
V

b s VGS Gate-source Voltage

Drain Current (continuous) at T c = 25 o C
± 20 V

O ID
ID
I DM (•)
Drain Current (continuous) at T c = 100 C
Drain Current (pulsed)
o
22
14
88
A
A
A
P tot Total Dissipation at T c = 25 o C 90 W
Derating Factor 0.6 W/ o C
E AS ( 1 ) Single Pulse Avalanche Energy 250 mJ
o
T st g Storage Temperature -65 to 175 C
o
Tj Max. Operating Junction Temperature 175 C
(•) Pulse width limited by safe operating area ( 1) starting Tj = 25 oC, ID =22A , VDD = 50V

November 1999 1/8

 STP22NE10L

THERMAL DATA
o
R thj-case Thermal Resistance Junction-case Max 1.67 C/W
o
R thj-amb Thermal Resistance Junction-ambient Max 62.5 C/W
o
Tl Maximum Lead Temperature For Soldering Purpose 300 C

ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified)

OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V (BR)DSS Drain-source I D = 250 µA V GS = 0 100 V
Breakdown Voltage
I DSS Zero Gate Voltage V DS = Max Rating 1 µA
Drain Current (V GS = 0) V DS = Max Rating T c =125 o C 10 µA
IGSS Gate-body Leakage V GS = ± 20 V ± 100 nA
Current (V DS = 0)

ON (∗)
s)
t(
uc
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V GS(th) Gate Threshold Voltage V DS = V GS I D = 250 µA 1 1.6 2.5 V
R DS(on) Static Drain-source On V GS = 10 V I D = 15 A
o d
0.07 0.085 Ω

I D(on)
Resistance V GS = 5 V I D = 15 A
On State Drain Current V DS > I D(on) x R DS(on)max P 22
r 0.085 0.1 Ω
A

e
let
V GS = 10 V

DYNAMIC
s o
Symbol
g fs (∗)
Parameter
Forward
Ob
Test Conditions
V DS > I D(on) x R DS(on)max I D =15 A
Min. Typ.
19
Max. Unit
S
Transconductance
-
(t s)
C iss Input Capacitance V DS = 25 V f = 1 MHz V GS = 0 1750 pF
C oss Output Capacitance 165 pF
C rss Reverse Transfer
Capacitance
u c 45 pF

o d
Pr
et e
o l
b s
O

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 STP22NE10L

ELECTRICAL CHARACTERISTICS (continued)

SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t d(on) Turn-on Delay Time V DD = 50 V ID = 8 A 40 ns
tr Rise Time R G = 4.7 Ω V GS = 4.5 V 80 ns
(Resistive Load, see fig. 3)
Qg Total Gate Charge V DD = 80 V I D = 16 A V GS = 10 V 24 31 nC
Q gs Gate-Source Charge 55 nC
Q gd Gate-Drain Charge 11 nC

SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t d(of f) Turn-off Delay Time V DD = 50 V ID = 8 A 45 ns
tf Fall Time R G = 4.7 Ω V GS = 4.5 V 12 ns
(Resistive Load, see fig. 3)
t d(of f) Off-voltage Rise Time Vclamp = 80 V I D = 16 A 12
s)
ns

t(
tf Fall Time R G = 4.7 Ω V GS = 4.5 V 17 ns
tc Cross-over Time (Inductive Load, see fig. 5) 35

u c ns

SOURCE DRAIN DIODE

o d
Symbol Parameter Test Conditions
P r
Min. Typ. Max. Unit
ISD
I SDM (•)
Source-drain Current
Source-drain Current
te 22
88
A
A
(pulsed)
le
V SD (∗)
t rr
Forward On Voltage
Reverse Recovery
I SD = 16 A
I SD = 16 A
V GS = 0

b so
di/dt = 100 A/µs 100
1.5 V
ns

Q rr
Time
Reverse Recovery
V DD = 40 V

- O
(see test circuit, fig. 5)
T j = 150 o C
300 nC

(t s)
Charge
I RRM Reverse Recovery 6 A
Current

u c
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %

o d
(•) Pulse width limited by safe operating area

Safe Operating Area

Pr Thermal Impedance

et e
o l
b s
O

3/8
 STP22NE10L

Output Characteristics Transfer Characteristics

s)
Transconductance Static Drain-source On Resistance
c t(
d u
r o
e P
le t
s o
Ob
) -
( s
u ct
o d
Pr
Gate Charge vs Gate-source Voltage Capacitance Variations

et e
o l
b s
O

4/8
 STP22NE10L

Normalized Gate Threshold Voltage vs Normalized On Resistance vs Temperature

Temperature

s)
Source-drain Diode Forward Characteristics
c t(
d u
r o
e P
le t
s o
Ob
) -
( s
u ct
o d
Pr
et e
o l
b s
O

5/8
 STP22NE10L

Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform

s)
Fig. 3: Switching Times Test Circuits For Fig. 4: Gate Charge test Circuit
c t(
Resistive Load

d u
r o
e P
le t
s o
Ob
) -
( s
u ct
o d
Pr
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times

et e
o l
b s
O

6/8
 STP22NE10L

TO-220 MECHANICAL DATA

mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.40 4.60 0.173 0.181
C 1.23 1.32 0.048 0.051
D 2.40 2.72 0.094 0.107
D1 1.27 0.050
E 0.49 0.70 0.019 0.027
F 0.61 0.88 0.024 0.034
F1 1.14 1.70 0.044 0.067
F2 1.14 1.70 0.044 0.067
G 4.95 5.15 0.194 0.203
G1 2.4 2.7 0.094
)
0.106
s
H2
L2
10.0
16.4
10.40 0.393
0.645
c t(
0.409

L4 13.0 14.0 0.511

d u 0.551
L5 2.65 2.95 0.104
r o 0.116
L6
L7
15.25
6.2
15.75
6.6
0.600

e
0.244 P 0.620
0.260
L9 3.5 3.93
le t
0.137 0.154

so
DIA. 3.75 3.85 0.147 0.151

Ob E

-
A

)
D

s
C

ct (
D1

d u
r o L2

P
F1

ete
o l
s
G1

H2

b
G

O Dia.
F
F2

L5
L9
L7
L6 L4
P011C

7/8
 STP22NE10L

s)
c t(
d u
r o
e P
le t
s o
Ob
) -
( s
u ct
o d
Pr
et e
o l
b s
O
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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© 1999 STMicroelectronics – Printed in Italy – All Rights Reserved

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